drv_hwtimer.c 12 KB

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  1. /*
  2. * Copyright (c) 2006-2018, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2018-12-10 zylx first version
  9. */
  10. #include <board.h>
  11. #ifdef BSP_USING_TIM
  12. #include "drv_config.h"
  13. //#define DRV_DEBUG
  14. #define LOG_TAG "drv.hwtimer"
  15. #include <drv_log.h>
  16. #ifdef RT_USING_HWTIMER
  17. enum
  18. {
  19. #ifdef BSP_USING_TIM1
  20. TIM1_INDEX,
  21. #endif
  22. #ifdef BSP_USING_TIM2
  23. TIM2_INDEX,
  24. #endif
  25. #ifdef BSP_USING_TIM3
  26. TIM3_INDEX,
  27. #endif
  28. #ifdef BSP_USING_TIM4
  29. TIM4_INDEX,
  30. #endif
  31. #ifdef BSP_USING_TIM5
  32. TIM5_INDEX,
  33. #endif
  34. #ifdef BSP_USING_TIM6
  35. TIM6_INDEX,
  36. #endif
  37. #ifdef BSP_USING_TIM7
  38. TIM7_INDEX,
  39. #endif
  40. #ifdef BSP_USING_TIM8
  41. TIM8_INDEX,
  42. #endif
  43. #ifdef BSP_USING_TIM9
  44. TIM9_INDEX,
  45. #endif
  46. #ifdef BSP_USING_TIM10
  47. TIM10_INDEX,
  48. #endif
  49. #ifdef BSP_USING_TIM11
  50. TIM11_INDEX,
  51. #endif
  52. #ifdef BSP_USING_TIM12
  53. TIM12_INDEX,
  54. #endif
  55. #ifdef BSP_USING_TIM13
  56. TIM13_INDEX,
  57. #endif
  58. #ifdef BSP_USING_TIM14
  59. TIM14_INDEX,
  60. #endif
  61. #ifdef BSP_USING_TIM15
  62. TIM15_INDEX,
  63. #endif
  64. #ifdef BSP_USING_TIM16
  65. TIM16_INDEX,
  66. #endif
  67. #ifdef BSP_USING_TIM17
  68. TIM17_INDEX,
  69. #endif
  70. };
  71. struct stm32_hwtimer
  72. {
  73. rt_hwtimer_t time_device;
  74. TIM_HandleTypeDef tim_handle;
  75. IRQn_Type tim_irqn;
  76. char *name;
  77. };
  78. static struct stm32_hwtimer stm32_hwtimer_obj[] =
  79. {
  80. #ifdef BSP_USING_TIM1
  81. TIM1_CONFIG,
  82. #endif
  83. #ifdef BSP_USING_TIM2
  84. TIM2_CONFIG,
  85. #endif
  86. #ifdef BSP_USING_TIM3
  87. TIM3_CONFIG,
  88. #endif
  89. #ifdef BSP_USING_TIM4
  90. TIM4_CONFIG,
  91. #endif
  92. #ifdef BSP_USING_TIM5
  93. TIM5_CONFIG,
  94. #endif
  95. #ifdef BSP_USING_TIM6
  96. TIM6_CONFIG,
  97. #endif
  98. #ifdef BSP_USING_TIM7
  99. TIM7_CONFIG,
  100. #endif
  101. #ifdef BSP_USING_TIM8
  102. TIM8_CONFIG,
  103. #endif
  104. #ifdef BSP_USING_TIM9
  105. TIM9_CONFIG,
  106. #endif
  107. #ifdef BSP_USING_TIM10
  108. TIM10_CONFIG,
  109. #endif
  110. #ifdef BSP_USING_TIM11
  111. TIM11_CONFIG,
  112. #endif
  113. #ifdef BSP_USING_TIM12
  114. TIM12_CONFIG,
  115. #endif
  116. #ifdef BSP_USING_TIM13
  117. TIM13_CONFIG,
  118. #endif
  119. #ifdef BSP_USING_TIM14
  120. TIM14_CONFIG,
  121. #endif
  122. #ifdef BSP_USING_TIM15
  123. TIM15_CONFIG,
  124. #endif
  125. #ifdef BSP_USING_TIM16
  126. TIM16_CONFIG,
  127. #endif
  128. #ifdef BSP_USING_TIM17
  129. TIM17_CONFIG,
  130. #endif
  131. };
  132. static void timer_init(struct rt_hwtimer_device *timer, rt_uint32_t state)
  133. {
  134. uint32_t prescaler_value = 0;
  135. TIM_HandleTypeDef *tim = RT_NULL;
  136. struct stm32_hwtimer *tim_device = RT_NULL;
  137. RT_ASSERT(timer != RT_NULL);
  138. if (state)
  139. {
  140. tim = (TIM_HandleTypeDef *)timer->parent.user_data;
  141. tim_device = (struct stm32_hwtimer *)timer;
  142. /* time init */
  143. #if defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
  144. if (tim->Instance == TIM9 || tim->Instance == TIM10 || tim->Instance == TIM11)
  145. #elif defined(SOC_SERIES_STM32L4)
  146. if (tim->Instance == TIM15 || tim->Instance == TIM16 || tim->Instance == TIM17)
  147. #elif defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32G0)
  148. if (0)
  149. #endif
  150. {
  151. #if !defined(SOC_SERIES_STM32F0) && !defined(SOC_SERIES_STM32G0)
  152. prescaler_value = (uint32_t)(HAL_RCC_GetPCLK2Freq() * 2 / 10000) - 1;
  153. #endif
  154. }
  155. else
  156. {
  157. prescaler_value = (uint32_t)(HAL_RCC_GetPCLK1Freq() * 2 / 10000) - 1;
  158. }
  159. tim->Init.Period = 10000 - 1;
  160. tim->Init.Prescaler = prescaler_value;
  161. tim->Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
  162. if (timer->info->cntmode == HWTIMER_CNTMODE_UP)
  163. {
  164. tim->Init.CounterMode = TIM_COUNTERMODE_UP;
  165. }
  166. else
  167. {
  168. tim->Init.CounterMode = TIM_COUNTERMODE_DOWN;
  169. }
  170. tim->Init.RepetitionCounter = 0;
  171. #if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32G0)
  172. tim->Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
  173. #endif
  174. if (HAL_TIM_Base_Init(tim) != HAL_OK)
  175. {
  176. LOG_E("%s init failed", tim_device->name);
  177. return;
  178. }
  179. else
  180. {
  181. /* set the TIMx priority */
  182. HAL_NVIC_SetPriority(tim_device->tim_irqn, 3, 0);
  183. /* enable the TIMx global Interrupt */
  184. HAL_NVIC_EnableIRQ(tim_device->tim_irqn);
  185. /* clear update flag */
  186. __HAL_TIM_CLEAR_FLAG(tim, TIM_FLAG_UPDATE);
  187. /* enable update request source */
  188. __HAL_TIM_URS_ENABLE(tim);
  189. LOG_D("%s init success", tim_device->name);
  190. }
  191. }
  192. }
  193. static rt_err_t timer_start(rt_hwtimer_t *timer, rt_uint32_t t, rt_hwtimer_mode_t opmode)
  194. {
  195. rt_err_t result = RT_EOK;
  196. TIM_HandleTypeDef *tim = RT_NULL;
  197. RT_ASSERT(timer != RT_NULL);
  198. tim = (TIM_HandleTypeDef *)timer->parent.user_data;
  199. /* set tim cnt */
  200. __HAL_TIM_SET_AUTORELOAD(tim, t - 1);
  201. if (opmode == HWTIMER_MODE_ONESHOT)
  202. {
  203. /* set timer to single mode */
  204. tim->Instance->CR1 |= TIM_OPMODE_SINGLE;
  205. }
  206. else
  207. {
  208. tim->Instance->CR1 &= (~TIM_OPMODE_SINGLE);
  209. }
  210. /* start timer */
  211. if (HAL_TIM_Base_Start_IT(tim) != HAL_OK)
  212. {
  213. LOG_E("TIM start failed");
  214. result = -RT_ERROR;
  215. }
  216. return result;
  217. }
  218. static void timer_stop(rt_hwtimer_t *timer)
  219. {
  220. TIM_HandleTypeDef *tim = RT_NULL;
  221. RT_ASSERT(timer != RT_NULL);
  222. tim = (TIM_HandleTypeDef *)timer->parent.user_data;
  223. /* stop timer */
  224. HAL_TIM_Base_Stop_IT(tim);
  225. }
  226. static rt_err_t timer_ctrl(rt_hwtimer_t *timer, rt_uint32_t cmd, void *arg)
  227. {
  228. TIM_HandleTypeDef *tim = RT_NULL;
  229. rt_err_t result = RT_EOK;
  230. RT_ASSERT(timer != RT_NULL);
  231. RT_ASSERT(arg != RT_NULL);
  232. tim = (TIM_HandleTypeDef *)timer->parent.user_data;
  233. switch (cmd)
  234. {
  235. case HWTIMER_CTRL_FREQ_SET:
  236. {
  237. rt_uint32_t freq;
  238. rt_uint16_t val;
  239. /* set timer frequence */
  240. freq = *((rt_uint32_t *)arg);
  241. #if defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
  242. if (tim->Instance == TIM9 || tim->Instance == TIM10 || tim->Instance == TIM11)
  243. #elif defined(SOC_SERIES_STM32L4)
  244. if (tim->Instance == TIM15 || tim->Instance == TIM16 || tim->Instance == TIM17)
  245. #elif defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32G0)
  246. if (0)
  247. #endif
  248. {
  249. #if defined(SOC_SERIES_STM32L4)
  250. val = HAL_RCC_GetPCLK2Freq() / freq;
  251. #elif defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
  252. val = HAL_RCC_GetPCLK2Freq() * 2 / freq;
  253. #endif
  254. }
  255. else
  256. {
  257. #if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
  258. val = HAL_RCC_GetPCLK1Freq() * 2 / freq;
  259. #elif defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32G0)
  260. val = HAL_RCC_GetPCLK1Freq() / freq;
  261. #endif
  262. }
  263. __HAL_TIM_SET_PRESCALER(tim, val - 1);
  264. /* Update frequency value */
  265. tim->Instance->EGR |= TIM_EVENTSOURCE_UPDATE;
  266. }
  267. break;
  268. default:
  269. {
  270. result = -RT_ENOSYS;
  271. }
  272. break;
  273. }
  274. return result;
  275. }
  276. static rt_uint32_t timer_counter_get(rt_hwtimer_t *timer)
  277. {
  278. TIM_HandleTypeDef *tim = RT_NULL;
  279. RT_ASSERT(timer != RT_NULL);
  280. tim = (TIM_HandleTypeDef *)timer->parent.user_data;
  281. return tim->Instance->CNT;
  282. }
  283. static const struct rt_hwtimer_info _info = TIM_DEV_INFO_CONFIG;
  284. static const struct rt_hwtimer_ops _ops =
  285. {
  286. .init = timer_init,
  287. .start = timer_start,
  288. .stop = timer_stop,
  289. .count_get = timer_counter_get,
  290. .control = timer_ctrl,
  291. };
  292. #ifdef BSP_USING_TIM2
  293. void TIM2_IRQHandler(void)
  294. {
  295. /* enter interrupt */
  296. rt_interrupt_enter();
  297. HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM2_INDEX].tim_handle);
  298. /* leave interrupt */
  299. rt_interrupt_leave();
  300. }
  301. #endif
  302. #ifdef BSP_USING_TIM3
  303. void TIM3_IRQHandler(void)
  304. {
  305. /* enter interrupt */
  306. rt_interrupt_enter();
  307. HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM3_INDEX].tim_handle);
  308. /* leave interrupt */
  309. rt_interrupt_leave();
  310. }
  311. #endif
  312. #ifdef BSP_USING_TIM4
  313. void TIM4_IRQHandler(void)
  314. {
  315. /* enter interrupt */
  316. rt_interrupt_enter();
  317. HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM4_INDEX].tim_handle);
  318. /* leave interrupt */
  319. rt_interrupt_leave();
  320. }
  321. #endif
  322. #ifdef BSP_USING_TIM5
  323. void TIM5_IRQHandler(void)
  324. {
  325. /* enter interrupt */
  326. rt_interrupt_enter();
  327. HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM5_INDEX].tim_handle);
  328. /* leave interrupt */
  329. rt_interrupt_leave();
  330. }
  331. #endif
  332. #ifdef BSP_USING_TIM11
  333. void TIM1_TRG_COM_TIM11_IRQHandler(void)
  334. {
  335. /* enter interrupt */
  336. rt_interrupt_enter();
  337. HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM11_INDEX].tim_handle);
  338. /* leave interrupt */
  339. rt_interrupt_leave();
  340. }
  341. #endif
  342. #ifdef BSP_USING_TIM13
  343. void TIM8_UP_TIM13_IRQHandler(void)
  344. {
  345. /* enter interrupt */
  346. rt_interrupt_enter();
  347. HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM13_INDEX].tim_handle);
  348. /* leave interrupt */
  349. rt_interrupt_leave();
  350. }
  351. #endif
  352. #ifdef BSP_USING_TIM14
  353. #if defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
  354. void TIM8_TRG_COM_TIM14_IRQHandler(void)
  355. #elif defined(SOC_SERIES_STM32F0)
  356. void TIM14_IRQHandler(void)
  357. #endif
  358. {
  359. /* enter interrupt */
  360. rt_interrupt_enter();
  361. HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM14_INDEX].tim_handle);
  362. /* leave interrupt */
  363. rt_interrupt_leave();
  364. }
  365. #endif
  366. #ifdef BSP_USING_TIM15
  367. void TIM1_BRK_TIM15_IRQHandler(void)
  368. {
  369. /* enter interrupt */
  370. rt_interrupt_enter();
  371. HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM15_INDEX].tim_handle);
  372. /* leave interrupt */
  373. rt_interrupt_leave();
  374. }
  375. #endif
  376. #ifdef BSP_USING_TIM16
  377. #if defined(SOC_SERIES_STM32L4)
  378. void TIM1_UP_TIM16_IRQHandler(void)
  379. #elif defined(SOC_SERIES_STM32F0)
  380. void TIM16_IRQHandler(void)
  381. #endif
  382. {
  383. /* enter interrupt */
  384. rt_interrupt_enter();
  385. HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM16_INDEX].tim_handle);
  386. /* leave interrupt */
  387. rt_interrupt_leave();
  388. }
  389. #endif
  390. #ifdef BSP_USING_TIM17
  391. #if defined(SOC_SERIES_STM32L4)
  392. void TIM1_TRG_COM_TIM17_IRQHandler(void)
  393. #elif defined(SOC_SERIES_STM32F0)
  394. void TIM17_IRQHandler(void)
  395. #endif
  396. {
  397. /* enter interrupt */
  398. rt_interrupt_enter();
  399. HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM17_INDEX].tim_handle);
  400. /* leave interrupt */
  401. rt_interrupt_leave();
  402. }
  403. #endif
  404. void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
  405. {
  406. #ifdef BSP_USING_TIM2
  407. if (htim->Instance == TIM2)
  408. {
  409. rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM2_INDEX].time_device);
  410. }
  411. #endif
  412. #ifdef BSP_USING_TIM3
  413. if (htim->Instance == TIM3)
  414. {
  415. rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM3_INDEX].time_device);
  416. }
  417. #endif
  418. #ifdef BSP_USING_TIM4
  419. if (htim->Instance == TIM4)
  420. {
  421. rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM4_INDEX].time_device);
  422. }
  423. #endif
  424. #ifdef BSP_USING_TIM5
  425. if (htim->Instance == TIM5)
  426. {
  427. rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM5_INDEX].time_device);
  428. }
  429. #endif
  430. #ifdef BSP_USING_TIM11
  431. if (htim->Instance == TIM11)
  432. {
  433. rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM11_INDEX].time_device);
  434. }
  435. #endif
  436. #ifdef BSP_USING_TIM13
  437. if (htim->Instance == TIM13)
  438. {
  439. rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM13_INDEX].time_device);
  440. }
  441. #endif
  442. #ifdef BSP_USING_TIM14
  443. if (htim->Instance == TIM14)
  444. {
  445. rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM14_INDEX].time_device);
  446. }
  447. #endif
  448. #ifdef BSP_USING_TIM15
  449. if (htim->Instance == TIM15)
  450. {
  451. rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM15_INDEX].time_device);
  452. }
  453. #endif
  454. #ifdef BSP_USING_TIM16
  455. if (htim->Instance == TIM16)
  456. {
  457. rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM16_INDEX].time_device);
  458. }
  459. #endif
  460. #ifdef BSP_USING_TIM17
  461. if (htim->Instance == TIM17)
  462. {
  463. rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM17_INDEX].time_device);
  464. }
  465. #endif
  466. }
  467. static int stm32_hwtimer_init(void)
  468. {
  469. int i = 0;
  470. int result = RT_EOK;
  471. for (i = 0; i < sizeof(stm32_hwtimer_obj) / sizeof(stm32_hwtimer_obj[0]); i++)
  472. {
  473. stm32_hwtimer_obj[i].time_device.info = &_info;
  474. stm32_hwtimer_obj[i].time_device.ops = &_ops;
  475. if (rt_device_hwtimer_register(&stm32_hwtimer_obj[i].time_device, stm32_hwtimer_obj[i].name, &stm32_hwtimer_obj[i].tim_handle) == RT_EOK)
  476. {
  477. LOG_D("%s register success", stm32_hwtimer_obj[i].name);
  478. }
  479. else
  480. {
  481. LOG_E("%s register failed", stm32_hwtimer_obj[i].name);
  482. result = -RT_ERROR;
  483. }
  484. }
  485. return result;
  486. }
  487. INIT_BOARD_EXPORT(stm32_hwtimer_init);
  488. #endif /* RT_USING_HWTIMER */
  489. #endif /* BSP_USING_TIM */