mmcsd_core.c 17 KB

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  1. /*
  2. * File : mmcsd_core.c
  3. * This file is part of RT-Thread RTOS
  4. * COPYRIGHT (C) 2006, RT-Thread Development Team
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License along
  17. * with this program; if not, write to the Free Software Foundation, Inc.,
  18. * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  19. *
  20. * Change Logs:
  21. * Date Author Notes
  22. * 2011-07-25 weety first version
  23. */
  24. #include <rtthread.h>
  25. #include <drivers/mmcsd_core.h>
  26. #include <drivers/sd.h>
  27. #include <drivers/mmc.h>
  28. #include <drivers/sdio.h>
  29. #ifndef RT_MMCSD_STACK_SIZE
  30. #define RT_MMCSD_STACK_SIZE 1024
  31. #endif
  32. #ifndef RT_MMCSD_THREAD_PREORITY
  33. #if (RT_THREAD_PRIORITY_MAX == 32)
  34. #define RT_MMCSD_THREAD_PREORITY 0x16
  35. #else
  36. #define RT_MMCSD_THREAD_PREORITY 0x40
  37. #endif
  38. #endif
  39. //static struct rt_semaphore mmcsd_sem;
  40. static struct rt_thread mmcsd_detect_thread;
  41. static rt_uint8_t mmcsd_stack[RT_MMCSD_STACK_SIZE];
  42. static struct rt_mailbox mmcsd_detect_mb;
  43. static rt_uint32_t mmcsd_detect_mb_pool[4];
  44. void mmcsd_host_lock(struct rt_mmcsd_host *host)
  45. {
  46. rt_sem_take(&host->bus_lock, RT_WAITING_FOREVER);
  47. }
  48. void mmcsd_host_unlock(struct rt_mmcsd_host *host)
  49. {
  50. rt_sem_release(&host->bus_lock);
  51. }
  52. void mmcsd_req_complete(struct rt_mmcsd_host *host)
  53. {
  54. rt_sem_release(&host->sem_ack);
  55. }
  56. void mmcsd_send_request(struct rt_mmcsd_host *host, struct rt_mmcsd_req *req)
  57. {
  58. do {
  59. req->cmd->retries--;
  60. req->cmd->err = 0;
  61. req->cmd->mrq = req;
  62. if (req->data)
  63. {
  64. req->cmd->data = req->data;
  65. req->data->err = 0;
  66. req->data->mrq = req;
  67. if (req->stop)
  68. {
  69. req->data->stop = req->stop;
  70. req->stop->err = 0;
  71. req->stop->mrq = req;
  72. }
  73. }
  74. host->ops->request(host, req);
  75. rt_sem_take(&host->sem_ack, RT_WAITING_FOREVER);
  76. } while(req->cmd->err && (req->cmd->retries > 0));
  77. }
  78. rt_int32_t mmcsd_send_cmd(struct rt_mmcsd_host *host,
  79. struct rt_mmcsd_cmd *cmd,
  80. int retries)
  81. {
  82. struct rt_mmcsd_req req;
  83. rt_memset(&req, 0, sizeof(struct rt_mmcsd_req));
  84. rt_memset(cmd->resp, 0, sizeof(cmd->resp));
  85. cmd->retries = retries;
  86. req.cmd = cmd;
  87. cmd->data = RT_NULL;
  88. mmcsd_send_request(host, &req);
  89. return cmd->err;
  90. }
  91. rt_int32_t mmcsd_go_idle(struct rt_mmcsd_host *host)
  92. {
  93. rt_int32_t err;
  94. struct rt_mmcsd_cmd cmd;
  95. if (!controller_is_spi(host))
  96. {
  97. mmcsd_set_chip_select(host, MMCSD_CS_HIGH);
  98. mmcsd_delay_ms(1);
  99. }
  100. rt_memset(&cmd, 0, sizeof(struct rt_mmcsd_cmd));
  101. cmd.cmd_code = GO_IDLE_STATE;
  102. cmd.arg = 0;
  103. cmd.flags = RESP_SPI_R1 | RESP_NONE | CMD_BC;
  104. err = mmcsd_send_cmd(host, &cmd, 0);
  105. mmcsd_delay_ms(1);
  106. if (!controller_is_spi(host))
  107. {
  108. mmcsd_set_chip_select(host, MMCSD_CS_IGNORE);
  109. mmcsd_delay_ms(1);
  110. }
  111. return err;
  112. }
  113. rt_int32_t mmcsd_spi_read_ocr(struct rt_mmcsd_host *host,
  114. rt_int32_t high_capacity,
  115. rt_uint32_t *ocr)
  116. {
  117. struct rt_mmcsd_cmd cmd;
  118. rt_int32_t err;
  119. rt_memset(&cmd, 0, sizeof(struct rt_mmcsd_cmd));
  120. cmd.cmd_code = SPI_READ_OCR;
  121. cmd.arg = high_capacity ? (1 << 30) : 0;
  122. cmd.flags = RESP_SPI_R3;
  123. err = mmcsd_send_cmd(host, &cmd, 0);
  124. *ocr = cmd.resp[1];
  125. return err;
  126. }
  127. rt_int32_t mmcsd_all_get_cid(struct rt_mmcsd_host *host, rt_uint32_t *cid)
  128. {
  129. rt_int32_t err;
  130. struct rt_mmcsd_cmd cmd;
  131. rt_memset(&cmd, 0, sizeof(struct rt_mmcsd_cmd));
  132. cmd.cmd_code = ALL_SEND_CID;
  133. cmd.arg = 0;
  134. cmd.flags = RESP_R2 | CMD_BCR;
  135. err = mmcsd_send_cmd(host, &cmd, 3);
  136. if (err)
  137. return err;
  138. rt_memcpy(cid, cmd.resp, sizeof(rt_uint32_t) * 4);
  139. return 0;
  140. }
  141. rt_int32_t mmcsd_get_cid(struct rt_mmcsd_host *host, rt_uint32_t *cid)
  142. {
  143. rt_int32_t err, i;
  144. struct rt_mmcsd_req req;
  145. struct rt_mmcsd_cmd cmd;
  146. struct rt_mmcsd_data data;
  147. rt_uint32_t *buf = RT_NULL;
  148. if (!controller_is_spi(host))
  149. {
  150. if (!host->card)
  151. return -RT_ERROR;
  152. rt_memset(&cmd, 0, sizeof(struct rt_mmcsd_cmd));
  153. cmd.cmd_code = SEND_CID;
  154. cmd.arg = host->card->rca << 16;
  155. cmd.flags = RESP_R2 | CMD_AC;
  156. err = mmcsd_send_cmd(host, &cmd, 3);
  157. if (err)
  158. return err;
  159. rt_memcpy(cid, cmd.resp, sizeof(rt_uint32_t) * 4);
  160. return 0;
  161. }
  162. buf = (rt_uint32_t *)rt_malloc(16);
  163. if (!buf)
  164. {
  165. rt_kprintf("allocate memory failed\n");
  166. return -RT_ENOMEM;
  167. }
  168. rt_memset(&req, 0, sizeof(struct rt_mmcsd_req));
  169. rt_memset(&cmd, 0, sizeof(struct rt_mmcsd_cmd));
  170. rt_memset(&data, 0, sizeof(struct rt_mmcsd_data));
  171. req.cmd = &cmd;
  172. req.data = &data;
  173. cmd.cmd_code = SEND_CID;
  174. cmd.arg = 0;
  175. /* NOTE HACK: the RESP_SPI_R1 is always correct here, but we
  176. * rely on callers to never use this with "native" calls for reading
  177. * CSD or CID. Native versions of those commands use the R2 type,
  178. * not R1 plus a data block.
  179. */
  180. cmd.flags = RESP_SPI_R1 | RESP_R1 | CMD_ADTC;
  181. data.blksize = 16;
  182. data.blks = 1;
  183. data.flags = DATA_DIR_READ;
  184. data.buf = buf;
  185. /*
  186. * The spec states that CSR and CID accesses have a timeout
  187. * of 64 clock cycles.
  188. */
  189. data.timeout_ns = 0;
  190. data.timeout_clks = 64;
  191. mmcsd_send_request(host, &req);
  192. if (cmd.err || data.err)
  193. {
  194. rt_free(buf);
  195. return -RT_ERROR;
  196. }
  197. for (i = 0;i < 4;i++)
  198. cid[i] = buf[i];
  199. rt_free(buf);
  200. return 0;
  201. }
  202. rt_int32_t mmcsd_get_csd(struct rt_mmcsd_card *card, rt_uint32_t *csd)
  203. {
  204. rt_int32_t err, i;
  205. struct rt_mmcsd_req req;
  206. struct rt_mmcsd_cmd cmd;
  207. struct rt_mmcsd_data data;
  208. rt_uint32_t *buf = RT_NULL;
  209. if (!controller_is_spi(card->host))
  210. {
  211. rt_memset(&cmd, 0, sizeof(struct rt_mmcsd_cmd));
  212. cmd.cmd_code = SEND_CSD;
  213. cmd.arg = card->rca << 16;
  214. cmd.flags = RESP_R2 | CMD_AC;
  215. err = mmcsd_send_cmd(card->host, &cmd, 3);
  216. if (err)
  217. return err;
  218. rt_memcpy(csd, cmd.resp, sizeof(rt_uint32_t) * 4);
  219. return 0;
  220. }
  221. buf = (rt_uint32_t*)rt_malloc(16);
  222. if (!buf)
  223. {
  224. rt_kprintf("allocate memory failed\n");
  225. return -RT_ENOMEM;
  226. }
  227. rt_memset(&req, 0, sizeof(struct rt_mmcsd_req));
  228. rt_memset(&cmd, 0, sizeof(struct rt_mmcsd_cmd));
  229. rt_memset(&data, 0, sizeof(struct rt_mmcsd_data));
  230. req.cmd = &cmd;
  231. req.data = &data;
  232. cmd.cmd_code = SEND_CSD;
  233. cmd.arg = 0;
  234. /* NOTE HACK: the RESP_SPI_R1 is always correct here, but we
  235. * rely on callers to never use this with "native" calls for reading
  236. * CSD or CID. Native versions of those commands use the R2 type,
  237. * not R1 plus a data block.
  238. */
  239. cmd.flags = RESP_SPI_R1 | RESP_R1 | CMD_ADTC;
  240. data.blksize = 16;
  241. data.blks = 1;
  242. data.flags = DATA_DIR_READ;
  243. data.buf = buf;
  244. /*
  245. * The spec states that CSR and CID accesses have a timeout
  246. * of 64 clock cycles.
  247. */
  248. data.timeout_ns = 0;
  249. data.timeout_clks = 64;
  250. mmcsd_send_request(card->host, &req);
  251. if (cmd.err || data.err)
  252. {
  253. rt_free(buf);
  254. return -RT_ERROR;
  255. }
  256. for (i = 0;i < 4;i++)
  257. csd[i] = buf[i];
  258. rt_free(buf);
  259. return 0;
  260. }
  261. static rt_int32_t _mmcsd_select_card(struct rt_mmcsd_host *host,
  262. struct rt_mmcsd_card *card)
  263. {
  264. rt_int32_t err;
  265. struct rt_mmcsd_cmd cmd;
  266. rt_memset(&cmd, 0, sizeof(struct rt_mmcsd_cmd));
  267. cmd.cmd_code = SELECT_CARD;
  268. if (card)
  269. {
  270. cmd.arg = card->rca << 16;
  271. cmd.flags = RESP_R1 | CMD_AC;
  272. }
  273. else
  274. {
  275. cmd.arg = 0;
  276. cmd.flags = RESP_NONE | CMD_AC;
  277. }
  278. err = mmcsd_send_cmd(host, &cmd, 3);
  279. if (err)
  280. return err;
  281. return 0;
  282. }
  283. rt_int32_t mmcsd_select_card(struct rt_mmcsd_card *card)
  284. {
  285. return _mmcsd_select_card(card->host, card);
  286. }
  287. rt_int32_t mmcsd_deselect_cards(struct rt_mmcsd_card *card)
  288. {
  289. return _mmcsd_select_card(card->host, RT_NULL);
  290. }
  291. rt_int32_t mmcsd_spi_use_crc(struct rt_mmcsd_host *host, rt_int32_t use_crc)
  292. {
  293. struct rt_mmcsd_cmd cmd;
  294. rt_int32_t err;
  295. rt_memset(&cmd, 0, sizeof(struct rt_mmcsd_cmd));
  296. cmd.cmd_code = SPI_CRC_ON_OFF;
  297. cmd.flags = RESP_SPI_R1;
  298. cmd.arg = use_crc;
  299. err = mmcsd_send_cmd(host, &cmd, 0);
  300. if (!err)
  301. host->spi_use_crc = use_crc;
  302. return err;
  303. }
  304. rt_inline void mmcsd_set_iocfg(struct rt_mmcsd_host *host)
  305. {
  306. struct rt_mmcsd_io_cfg *io_cfg = &host->io_cfg;
  307. mmcsd_dbg("clock %uHz busmode %u powermode %u cs %u Vdd %u "
  308. "width %u \n",
  309. io_cfg->clock, io_cfg->bus_mode,
  310. io_cfg->power_mode, io_cfg->chip_select, io_cfg->vdd,
  311. io_cfg->bus_width);
  312. host->ops->set_iocfg(host, io_cfg);
  313. }
  314. /*
  315. * Control chip select pin on a host.
  316. */
  317. void mmcsd_set_chip_select(struct rt_mmcsd_host *host, rt_int32_t mode)
  318. {
  319. host->io_cfg.chip_select = mode;
  320. mmcsd_set_iocfg(host);
  321. }
  322. /*
  323. * Sets the host clock to the highest possible frequency that
  324. * is below "hz".
  325. */
  326. void mmcsd_set_clock(struct rt_mmcsd_host *host, rt_uint32_t clk)
  327. {
  328. if (clk < host->freq_min)
  329. {
  330. rt_kprintf("clock too low\n");
  331. }
  332. host->io_cfg.clock = clk;
  333. mmcsd_set_iocfg(host);
  334. }
  335. /*
  336. * Change the bus mode (open drain/push-pull) of a host.
  337. */
  338. void mmcsd_set_bus_mode(struct rt_mmcsd_host *host, rt_uint32_t mode)
  339. {
  340. host->io_cfg.bus_mode = mode;
  341. mmcsd_set_iocfg(host);
  342. }
  343. /*
  344. * Change data bus width of a host.
  345. */
  346. void mmcsd_set_bus_width(struct rt_mmcsd_host *host, rt_uint32_t width)
  347. {
  348. host->io_cfg.bus_width = width;
  349. mmcsd_set_iocfg(host);
  350. }
  351. void mmcsd_set_data_timeout(struct rt_mmcsd_data *data,
  352. const struct rt_mmcsd_card *card)
  353. {
  354. rt_uint32_t mult;
  355. if (card->card_type == CARD_TYPE_SDIO)
  356. {
  357. data->timeout_ns = 1000000000; /* SDIO card 1s */
  358. data->timeout_clks = 0;
  359. return;
  360. }
  361. /*
  362. * SD cards use a 100 multiplier rather than 10
  363. */
  364. mult = (card->card_type == CARD_TYPE_SD) ? 100 : 10;
  365. /*
  366. * Scale up the multiplier (and therefore the timeout) by
  367. * the r2w factor for writes.
  368. */
  369. if (data->flags & DATA_DIR_WRITE)
  370. mult <<= card->csd.r2w_factor;
  371. data->timeout_ns = card->tacc_ns * mult;
  372. data->timeout_clks = card->tacc_clks * mult;
  373. /*
  374. * SD cards also have an upper limit on the timeout.
  375. */
  376. if (card->card_type == CARD_TYPE_SD)
  377. {
  378. rt_uint32_t timeout_us, limit_us;
  379. timeout_us = data->timeout_ns / 1000;
  380. timeout_us += data->timeout_clks * 1000 /
  381. (card->host->io_cfg.clock / 1000);
  382. if (data->flags & DATA_DIR_WRITE)
  383. /*
  384. * The limit is really 250 ms, but that is
  385. * insufficient for some crappy cards.
  386. */
  387. limit_us = 300000;
  388. else
  389. limit_us = 100000;
  390. /*
  391. * SDHC cards always use these fixed values.
  392. */
  393. if (timeout_us > limit_us || card->flags & CARD_FLAG_SDHC)
  394. {
  395. data->timeout_ns = limit_us * 1000; /* SDHC card fixed 250ms */
  396. data->timeout_clks = 0;
  397. }
  398. }
  399. if (controller_is_spi(card->host))
  400. {
  401. if (data->flags & DATA_DIR_WRITE)
  402. {
  403. if (data->timeout_ns < 1000000000)
  404. data->timeout_ns = 1000000000; /* 1s */
  405. }
  406. else
  407. {
  408. if (data->timeout_ns < 100000000)
  409. data->timeout_ns = 100000000; /* 100ms */
  410. }
  411. }
  412. }
  413. /*
  414. * Mask off any voltages we don't support and select
  415. * the lowest voltage
  416. */
  417. rt_uint32_t mmcsd_select_voltage(struct rt_mmcsd_host *host, rt_uint32_t ocr)
  418. {
  419. int bit;
  420. extern int __rt_ffs(int value);
  421. ocr &= host->valid_ocr;
  422. bit = __rt_ffs(ocr);
  423. if (bit)
  424. {
  425. bit -= 1;
  426. ocr &= 3 << bit;
  427. host->io_cfg.vdd = bit;
  428. mmcsd_set_iocfg(host);
  429. }
  430. else
  431. {
  432. rt_kprintf("host doesn't support card's voltages\n");
  433. ocr = 0;
  434. }
  435. return ocr;
  436. }
  437. static void mmcsd_power_up(struct rt_mmcsd_host *host)
  438. {
  439. int bit = fls(host->valid_ocr) - 1;
  440. host->io_cfg.vdd = bit;
  441. if (controller_is_spi(host))
  442. {
  443. host->io_cfg.chip_select = MMCSD_CS_HIGH;
  444. host->io_cfg.bus_mode = MMCSD_BUSMODE_PUSHPULL;
  445. }
  446. else
  447. {
  448. host->io_cfg.chip_select = MMCSD_CS_IGNORE;
  449. host->io_cfg.bus_mode = MMCSD_BUSMODE_OPENDRAIN;
  450. }
  451. host->io_cfg.power_mode = MMCSD_POWER_UP;
  452. host->io_cfg.bus_width = MMCSD_BUS_WIDTH_1;
  453. mmcsd_set_iocfg(host);
  454. /*
  455. * This delay should be sufficient to allow the power supply
  456. * to reach the minimum voltage.
  457. */
  458. mmcsd_delay_ms(10);
  459. host->io_cfg.clock = host->freq_min;
  460. host->io_cfg.power_mode = MMCSD_POWER_ON;
  461. mmcsd_set_iocfg(host);
  462. /*
  463. * This delay must be at least 74 clock sizes, or 1 ms, or the
  464. * time required to reach a stable voltage.
  465. */
  466. mmcsd_delay_ms(10);
  467. }
  468. static void mmcsd_power_off(struct rt_mmcsd_host *host)
  469. {
  470. host->io_cfg.clock = 0;
  471. host->io_cfg.vdd = 0;
  472. if (!controller_is_spi(host))
  473. {
  474. host->io_cfg.bus_mode = MMCSD_BUSMODE_OPENDRAIN;
  475. host->io_cfg.chip_select = MMCSD_CS_IGNORE;
  476. }
  477. host->io_cfg.power_mode = MMCSD_POWER_OFF;
  478. host->io_cfg.bus_width = MMCSD_BUS_WIDTH_1;
  479. mmcsd_set_iocfg(host);
  480. }
  481. void mmcsd_change(struct rt_mmcsd_host *host)
  482. {
  483. rt_mb_send(&mmcsd_detect_mb, (rt_uint32_t)host);
  484. }
  485. void mmcsd_detect(void *param)
  486. {
  487. struct rt_mmcsd_host *host;
  488. rt_uint32_t ocr;
  489. rt_int32_t err;
  490. while (1)
  491. {
  492. if (rt_mb_recv(&mmcsd_detect_mb, (rt_uint32_t*)&host, RT_WAITING_FOREVER) == RT_EOK)
  493. {
  494. if (host->card == RT_NULL)
  495. {
  496. mmcsd_host_lock(host);
  497. mmcsd_power_up(host);
  498. mmcsd_go_idle(host);
  499. mmcsd_send_if_cond(host, host->valid_ocr);
  500. err = sdio_io_send_op_cond(host, 0, &ocr);
  501. if (!err)
  502. {
  503. if (init_sdio(host, ocr))
  504. mmcsd_power_off(host);
  505. mmcsd_host_unlock(host);
  506. continue;
  507. }
  508. /*
  509. * detect SD card
  510. */
  511. err = mmcsd_send_app_op_cond(host, 0, &ocr);
  512. if (!err)
  513. {
  514. if (init_sd(host, ocr))
  515. mmcsd_power_off(host);
  516. mmcsd_host_unlock(host);
  517. continue;
  518. }
  519. /*
  520. * detect mmc card
  521. */
  522. err = mmc_send_op_cond(host, 0, &ocr);
  523. if (!err)
  524. {
  525. if (init_mmc(host, ocr))
  526. mmcsd_power_off(host);
  527. mmcsd_host_unlock(host);
  528. continue;
  529. }
  530. mmcsd_host_unlock(host);
  531. }
  532. }
  533. }
  534. }
  535. struct rt_mmcsd_host *mmcsd_alloc_host(void)
  536. {
  537. struct rt_mmcsd_host *host;
  538. host = rt_malloc(sizeof(struct rt_mmcsd_host));
  539. if (!host)
  540. {
  541. rt_kprintf("alloc host failed\n");
  542. return RT_NULL;
  543. }
  544. rt_memset(host, 0, sizeof(struct rt_mmcsd_host));
  545. host->max_seg_size = 65535;
  546. host->max_dma_segs = 1;
  547. host->max_blk_size = 512;
  548. host->max_blk_count = 4096;
  549. rt_sem_init(&host->bus_lock, "sd_bus_lock", 1, RT_IPC_FLAG_FIFO);
  550. rt_sem_init(&host->sem_ack, "sd_ack", 0, RT_IPC_FLAG_FIFO);
  551. return host;
  552. }
  553. void mmcsd_free_host(struct rt_mmcsd_host *host)
  554. {
  555. rt_sem_detach(&host->bus_lock);
  556. rt_sem_detach(&host->sem_ack);
  557. rt_free(host);
  558. }
  559. void rt_mmcsd_core_init(void)
  560. {
  561. rt_err_t ret;
  562. /* init detect sd cart thread */
  563. /* init mailbox and create detect sd card thread */
  564. ret = rt_mb_init(&mmcsd_detect_mb, "mmcsdmb",
  565. &mmcsd_detect_mb_pool[0], sizeof(mmcsd_detect_mb_pool),
  566. RT_IPC_FLAG_FIFO);
  567. RT_ASSERT(ret == RT_EOK);
  568. ret = rt_thread_init(&mmcsd_detect_thread, "mmcsd_detect", mmcsd_detect, RT_NULL,
  569. &mmcsd_stack[0], RT_MMCSD_STACK_SIZE, RT_MMCSD_THREAD_PREORITY, 20);
  570. if (ret == RT_EOK)
  571. {
  572. rt_thread_startup(&mmcsd_detect_thread);
  573. }
  574. rt_sdio_init();
  575. }