drv_uart.c 4.2 KB

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  1. /*
  2. * Copyright (c) 2006-2019, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2013-05-18 Bernard The first version for LPC40xx
  9. * 2019-05-05 jg1uaa port to LPC1114
  10. */
  11. #include <rtthread.h>
  12. #include <rtdevice.h>
  13. #include <rthw.h>
  14. #include "board.h" // CPU_CLOCK
  15. #include "drv_uart.h"
  16. #ifdef RT_USING_SERIAL
  17. #define UART_BASE 0x40008000 // UART (only one)
  18. #define UART_IRQ 21
  19. #define UART_CLOCK (CPU_CLOCK / 1) // Hz
  20. #define URBR HWREG32(UART_BASE + 0x00) // R-
  21. #define UTHR HWREG32(UART_BASE + 0x00) // -W
  22. #define UIER HWREG32(UART_BASE + 0x04) // RW
  23. #define UIIR HWREG32(UART_BASE + 0x08) // R-
  24. #define UFCR HWREG32(UART_BASE + 0x08) // -W
  25. #define ULCR HWREG32(UART_BASE + 0x0c) // RW
  26. #define UMCR HWREG32(UART_BASE + 0x10) // RW
  27. #define ULSR HWREG32(UART_BASE + 0x14) // R-
  28. #define UMSR HWREG32(UART_BASE + 0x18) // R-
  29. #define UDLL HWREG32(UART_BASE + 0x00) // RW
  30. #define UDLM HWREG32(UART_BASE + 0x04) // RW
  31. #define IOCONFIG_BASE 0x40044000
  32. #define IOCON_PIO1_6 HWREG32(IOCONFIG_BASE + 0xa4)
  33. #define IOCON_PIO1_7 HWREG32(IOCONFIG_BASE + 0xa8)
  34. #define SYSCON_BASE 0x40048000
  35. #define AHBCLKCTRL HWREG32(SYSCON_BASE + 0x80)
  36. #define UARTCLKDIV HWREG32(SYSCON_BASE + 0x98)
  37. static rt_err_t lpc_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
  38. {
  39. rt_uint32_t Fdiv = 0;
  40. RT_ASSERT(serial != RT_NULL);
  41. /* Initialize UART Configuration parameter structure to default state:
  42. * Baudrate = 115200 bps
  43. * 8 data bit
  44. * 1 Stop bit
  45. * None parity
  46. */
  47. /* set DLAB=1 */
  48. ULCR |= 0x80;
  49. /* config uart baudrate */
  50. Fdiv = UART_CLOCK / (cfg->baud_rate * 16);
  51. UDLM = Fdiv / 256;
  52. UDLL = Fdiv % 256;
  53. /* set DLAB=0 */
  54. ULCR &= ~0x80;
  55. /* config to 8 data bit,1 Stop bit,None parity */
  56. ULCR |= 0x03;
  57. /*enable and reset FIFO*/
  58. UFCR = 0x07;
  59. return RT_EOK;
  60. }
  61. static rt_err_t lpc_control(struct rt_serial_device *serial, int cmd, void *arg)
  62. {
  63. RT_ASSERT(serial != RT_NULL);
  64. switch (cmd)
  65. {
  66. case RT_DEVICE_CTRL_CLR_INT:
  67. /* disable rx irq */
  68. UIER &= ~0x01;
  69. break;
  70. case RT_DEVICE_CTRL_SET_INT:
  71. /* enable rx irq */
  72. UIER |= 0x01;
  73. break;
  74. }
  75. return RT_EOK;
  76. }
  77. static int lpc_putc(struct rt_serial_device *serial, char c)
  78. {
  79. while (!(ULSR & 0x20));
  80. UTHR = c;
  81. return 1;
  82. }
  83. static int lpc_getc(struct rt_serial_device *serial)
  84. {
  85. if (ULSR & 0x01)
  86. return URBR;
  87. else
  88. return -1;
  89. }
  90. static const struct rt_uart_ops lpc_uart_ops =
  91. {
  92. lpc_configure,
  93. lpc_control,
  94. lpc_putc,
  95. lpc_getc,
  96. };
  97. struct rt_serial_device serial;
  98. void UART_IRQHandler(void)
  99. {
  100. /* enter interrupt */
  101. rt_interrupt_enter();
  102. switch (UIIR & 0x0e)
  103. {
  104. case 0x04:
  105. case 0x0C:
  106. rt_hw_serial_isr(&serial, RT_SERIAL_EVENT_RX_IND);
  107. break;
  108. case 0x06:
  109. (void)ULSR;
  110. break;
  111. default:
  112. (void)ULSR;
  113. break;
  114. }
  115. /* leave interrupt */
  116. rt_interrupt_leave();
  117. }
  118. int rt_hw_uart_init(void)
  119. {
  120. rt_err_t ret = RT_EOK;
  121. struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
  122. serial.ops = &lpc_uart_ops;
  123. serial.config = config;
  124. serial.parent.user_data = NULL;
  125. /*
  126. * Initialize UART pin connect
  127. * P1.6: U0_RXD
  128. * P1.7: U0_TXD
  129. */
  130. IOCON_PIO1_6 = 0xc1;
  131. IOCON_PIO1_7 = 0xc1;
  132. /* setup the uart power and clock */
  133. UARTCLKDIV = 0x01; // UART PCLK = system clock / 1
  134. AHBCLKCTRL |= (1 << 12); // UART power-up
  135. /* priority = 1 */
  136. NVIC_SetPriority(UART_IRQ, 0x01 << 6);
  137. /* Enable Interrupt for UART channel */
  138. NVIC_EnableIRQ(UART_IRQ);
  139. /* register UART device */
  140. ret = rt_hw_serial_register(&serial, "uart",
  141. RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM,
  142. NULL);
  143. return ret;
  144. }
  145. INIT_BOARD_EXPORT(rt_hw_uart_init);
  146. #endif /* RT_USING_SERIAL */