dma.c 12 KB

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  1. /*
  2. * Copyright (c) 2006-2023, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2023-02-25 GuEe-GUI the first version
  9. */
  10. #include <rthw.h>
  11. #include <rtthread.h>
  12. #include <rtdevice.h>
  13. #define DBG_TAG "rtdm.dma"
  14. #define DBG_LVL DBG_INFO
  15. #include <rtdbg.h>
  16. static rt_list_t dmac_nodes = RT_LIST_OBJECT_INIT(dmac_nodes);
  17. static RT_DEFINE_SPINLOCK(dmac_nodes_lock);
  18. rt_err_t rt_dma_controller_register(struct rt_dma_controller *ctrl)
  19. {
  20. const char *dev_name;
  21. char dma_name[RT_NAME_MAX];
  22. if (!ctrl || !ctrl->dev || !ctrl->ops)
  23. {
  24. return -RT_EINVAL;
  25. }
  26. dev_name = rt_dm_dev_get_name(ctrl->dev);
  27. if (rt_bitmap_next_set_bit(ctrl->dir_cap, 0, RT_DMA_DIR_MAX) == RT_DMA_DIR_MAX)
  28. {
  29. LOG_E("%s: Not direction capability", dev_name);
  30. return -RT_EINVAL;
  31. }
  32. rt_snprintf(dma_name, sizeof(dma_name), "%s-dmac", dev_name);
  33. rt_list_init(&ctrl->list);
  34. rt_spin_lock(&dmac_nodes_lock);
  35. rt_list_insert_before(&dmac_nodes, &ctrl->list);
  36. rt_spin_unlock(&dmac_nodes_lock);
  37. rt_list_init(&ctrl->channels_nodes);
  38. rt_mutex_init(&ctrl->mutex, dma_name, RT_IPC_FLAG_PRIO);
  39. if (ctrl->dev->ofw_node)
  40. {
  41. rt_dm_dev_bind_fwdata(ctrl->dev, RT_NULL, ctrl);
  42. }
  43. return RT_EOK;
  44. }
  45. rt_err_t rt_dma_controller_unregister(struct rt_dma_controller *ctrl)
  46. {
  47. if (!ctrl)
  48. {
  49. return -RT_EINVAL;
  50. }
  51. rt_mutex_take(&ctrl->mutex, RT_WAITING_FOREVER);
  52. if (!rt_list_isempty(&ctrl->channels_nodes))
  53. {
  54. rt_mutex_release(&ctrl->mutex);
  55. return -RT_EBUSY;
  56. }
  57. if (ctrl->dev->ofw_node)
  58. {
  59. rt_dm_dev_unbind_fwdata(ctrl->dev, RT_NULL);
  60. }
  61. rt_mutex_release(&ctrl->mutex);
  62. rt_mutex_detach(&ctrl->mutex);
  63. rt_spin_lock(&dmac_nodes_lock);
  64. rt_list_remove(&ctrl->list);
  65. rt_spin_unlock(&dmac_nodes_lock);
  66. return RT_EOK;
  67. }
  68. rt_err_t rt_dma_chan_start(struct rt_dma_chan *chan)
  69. {
  70. rt_err_t err;
  71. struct rt_dma_controller *ctrl;
  72. if (!chan)
  73. {
  74. return -RT_EINVAL;
  75. }
  76. if (chan->prep_err)
  77. {
  78. LOG_D("%s: Not config done", rt_dm_dev_get_name(chan->slave));
  79. return chan->prep_err;
  80. }
  81. ctrl = chan->ctrl;
  82. rt_mutex_take(&ctrl->mutex, RT_WAITING_FOREVER);
  83. err = ctrl->ops->start(chan);
  84. rt_mutex_release(&ctrl->mutex);
  85. return err;
  86. }
  87. rt_err_t rt_dma_chan_stop(struct rt_dma_chan *chan)
  88. {
  89. rt_err_t err;
  90. struct rt_dma_controller *ctrl;
  91. if (!chan)
  92. {
  93. return -RT_EINVAL;
  94. }
  95. if (chan->prep_err)
  96. {
  97. LOG_D("%s: Not prepare done", rt_dm_dev_get_name(chan->slave));
  98. return chan->prep_err;
  99. }
  100. ctrl = chan->ctrl;
  101. rt_mutex_take(&ctrl->mutex, RT_WAITING_FOREVER);
  102. err = ctrl->ops->stop(chan);
  103. rt_mutex_release(&ctrl->mutex);
  104. return err;
  105. }
  106. rt_err_t rt_dma_chan_config(struct rt_dma_chan *chan,
  107. struct rt_dma_slave_config *conf)
  108. {
  109. rt_err_t err;
  110. struct rt_dma_controller *ctrl;
  111. enum rt_dma_transfer_direction dir;
  112. if (!chan || !conf)
  113. {
  114. err = -RT_EINVAL;
  115. goto _end;
  116. }
  117. dir = conf->direction;
  118. if (dir >= RT_DMA_DIR_MAX)
  119. {
  120. err = -RT_EINVAL;
  121. goto _end;
  122. }
  123. if (conf->src_addr_width >= RT_DMA_SLAVE_BUSWIDTH_BYTES_MAX ||
  124. conf->dst_addr_width >= RT_DMA_SLAVE_BUSWIDTH_BYTES_MAX)
  125. {
  126. err = -RT_EINVAL;
  127. goto _end;
  128. }
  129. ctrl = chan->ctrl;
  130. if (!rt_bitmap_test_bit(ctrl->dir_cap, dir))
  131. {
  132. err = -RT_ENOSYS;
  133. goto _end;
  134. }
  135. if (!chan->name && dir != RT_DMA_MEM_TO_MEM)
  136. {
  137. LOG_E("%s: illegal config for uname channels",
  138. rt_dm_dev_get_name(ctrl->dev));
  139. err = -RT_EINVAL;
  140. goto _end;
  141. }
  142. rt_mutex_take(&ctrl->mutex, RT_WAITING_FOREVER);
  143. err = ctrl->ops->config(chan, conf);
  144. rt_mutex_release(&ctrl->mutex);
  145. if (!err)
  146. {
  147. rt_memcpy(&chan->conf, conf, sizeof(*conf));
  148. }
  149. _end:
  150. chan->conf_err = err;
  151. return err;
  152. }
  153. rt_err_t rt_dma_chan_done(struct rt_dma_chan *chan, rt_size_t size)
  154. {
  155. if (!chan)
  156. {
  157. return -RT_EINVAL;
  158. }
  159. if (chan->callback)
  160. {
  161. chan->callback(chan, size);
  162. }
  163. return RT_EOK;
  164. }
  165. static rt_bool_t range_is_illegal(const char *name, const char *desc,
  166. rt_ubase_t addr0, rt_ubase_t addr1)
  167. {
  168. rt_bool_t illegal = addr0 < addr1;
  169. if (illegal)
  170. {
  171. LOG_E("%s: %s %p is out of config %p", name, desc, addr0, addr1);
  172. }
  173. return illegal;
  174. }
  175. rt_err_t rt_dma_prep_memcpy(struct rt_dma_chan *chan,
  176. struct rt_dma_slave_transfer *transfer)
  177. {
  178. rt_err_t err;
  179. rt_size_t len;
  180. rt_ubase_t dma_addr_src, dma_addr_dst;
  181. struct rt_dma_controller *ctrl;
  182. struct rt_dma_slave_config *conf;
  183. if (!chan || !transfer)
  184. {
  185. return -RT_EINVAL;
  186. }
  187. ctrl = chan->ctrl;
  188. conf = &chan->conf;
  189. if (chan->conf_err)
  190. {
  191. LOG_D("%s: Not config done", rt_dm_dev_get_name(chan->slave));
  192. return chan->conf_err;
  193. }
  194. RT_ASSERT(chan->conf.direction == RT_DMA_MEM_TO_MEM);
  195. dma_addr_src = transfer->src_addr;
  196. dma_addr_dst = transfer->dst_addr;
  197. len = transfer->buffer_len;
  198. if (range_is_illegal(rt_dm_dev_get_name(ctrl->dev), "source",
  199. dma_addr_src, conf->src_addr))
  200. {
  201. return -RT_EINVAL;
  202. }
  203. if (range_is_illegal(rt_dm_dev_get_name(ctrl->dev), "dest",
  204. dma_addr_dst, conf->dst_addr))
  205. {
  206. return -RT_EINVAL;
  207. }
  208. if (ctrl->ops->prep_memcpy)
  209. {
  210. rt_mutex_take(&ctrl->mutex, RT_WAITING_FOREVER);
  211. err = ctrl->ops->prep_memcpy(chan, dma_addr_dst, dma_addr_src, len);
  212. rt_mutex_release(&ctrl->mutex);
  213. }
  214. else
  215. {
  216. err = -RT_ENOSYS;
  217. }
  218. if (!err)
  219. {
  220. rt_memcpy(&chan->transfer, transfer, sizeof(*transfer));
  221. }
  222. chan->prep_err = err;
  223. return err;
  224. }
  225. rt_err_t rt_dma_prep_cyclic(struct rt_dma_chan *chan,
  226. struct rt_dma_slave_transfer *transfer)
  227. {
  228. rt_err_t err;
  229. rt_ubase_t dma_buf_addr;
  230. struct rt_dma_controller *ctrl;
  231. struct rt_dma_slave_config *conf;
  232. enum rt_dma_transfer_direction dir;
  233. if (!chan || !transfer)
  234. {
  235. return -RT_EINVAL;
  236. }
  237. ctrl = chan->ctrl;
  238. conf = &chan->conf;
  239. if (chan->conf_err)
  240. {
  241. LOG_D("%s: Not config done", rt_dm_dev_get_name(chan->slave));
  242. return chan->conf_err;
  243. }
  244. dir = chan->conf.direction;
  245. if (dir == RT_DMA_MEM_TO_DEV || dir == RT_DMA_MEM_TO_MEM)
  246. {
  247. dma_buf_addr = transfer->src_addr;
  248. if (range_is_illegal(rt_dm_dev_get_name(ctrl->dev), "source",
  249. dma_buf_addr, conf->src_addr))
  250. {
  251. return -RT_EINVAL;
  252. }
  253. }
  254. else if (dir == RT_DMA_DEV_TO_MEM)
  255. {
  256. dma_buf_addr = transfer->dst_addr;
  257. if (range_is_illegal(rt_dm_dev_get_name(ctrl->dev), "dest",
  258. dma_buf_addr, conf->dst_addr))
  259. {
  260. return -RT_EINVAL;
  261. }
  262. }
  263. else
  264. {
  265. dma_buf_addr = ~0UL;
  266. }
  267. if (ctrl->ops->prep_cyclic)
  268. {
  269. rt_mutex_take(&ctrl->mutex, RT_WAITING_FOREVER);
  270. err = ctrl->ops->prep_cyclic(chan, dma_buf_addr,
  271. transfer->buffer_len, transfer->period_len, dir);
  272. rt_mutex_release(&ctrl->mutex);
  273. }
  274. else
  275. {
  276. err = -RT_ENOSYS;
  277. }
  278. if (!err)
  279. {
  280. rt_memcpy(&chan->transfer, transfer, sizeof(*transfer));
  281. }
  282. chan->prep_err = err;
  283. return err;
  284. }
  285. rt_err_t rt_dma_prep_single(struct rt_dma_chan *chan,
  286. struct rt_dma_slave_transfer *transfer)
  287. {
  288. rt_err_t err;
  289. rt_ubase_t dma_buf_addr;
  290. struct rt_dma_controller *ctrl;
  291. struct rt_dma_slave_config *conf;
  292. enum rt_dma_transfer_direction dir;
  293. if (!chan || !transfer)
  294. {
  295. return -RT_EINVAL;
  296. }
  297. ctrl = chan->ctrl;
  298. conf = &chan->conf;
  299. if (chan->conf_err)
  300. {
  301. LOG_D("%s: Not config done", rt_dm_dev_get_name(chan->slave));
  302. return chan->conf_err;
  303. }
  304. dir = chan->conf.direction;
  305. if (dir == RT_DMA_MEM_TO_DEV || dir == RT_DMA_MEM_TO_MEM)
  306. {
  307. dma_buf_addr = transfer->src_addr;
  308. if (range_is_illegal(rt_dm_dev_get_name(ctrl->dev), "source",
  309. dma_buf_addr, conf->src_addr))
  310. {
  311. return -RT_EINVAL;
  312. }
  313. }
  314. else if (dir == RT_DMA_DEV_TO_MEM)
  315. {
  316. dma_buf_addr = transfer->dst_addr;
  317. if (range_is_illegal(rt_dm_dev_get_name(ctrl->dev), "dest",
  318. dma_buf_addr, conf->dst_addr))
  319. {
  320. return -RT_EINVAL;
  321. }
  322. }
  323. else
  324. {
  325. dma_buf_addr = ~0UL;
  326. }
  327. if (ctrl->ops->prep_single)
  328. {
  329. rt_mutex_take(&ctrl->mutex, RT_WAITING_FOREVER);
  330. err = ctrl->ops->prep_single(chan, dma_buf_addr,
  331. transfer->buffer_len, dir);
  332. rt_mutex_release(&ctrl->mutex);
  333. }
  334. else
  335. {
  336. err = -RT_ENOSYS;
  337. }
  338. if (!err)
  339. {
  340. rt_memcpy(&chan->transfer, transfer, sizeof(*transfer));
  341. }
  342. chan->prep_err = err;
  343. return err;
  344. }
  345. static struct rt_dma_controller *ofw_find_dma_controller(struct rt_device *dev,
  346. const char *name, struct rt_ofw_cell_args *args)
  347. {
  348. struct rt_dma_controller *ctrl = RT_NULL;
  349. #ifdef RT_USING_OFW
  350. int index;
  351. struct rt_ofw_node *np = dev->ofw_node, *ctrl_np;
  352. if (!np)
  353. {
  354. return RT_NULL;
  355. }
  356. index = rt_ofw_prop_index_of_string(np, "dma-names", name);
  357. if (index < 0)
  358. {
  359. return RT_NULL;
  360. }
  361. if (!rt_ofw_parse_phandle_cells(np, "dmas", "#dma-cells", index, args))
  362. {
  363. ctrl_np = args->data;
  364. if (!rt_ofw_data(ctrl_np))
  365. {
  366. rt_platform_ofw_request(ctrl_np);
  367. }
  368. ctrl = rt_ofw_data(ctrl_np);
  369. rt_ofw_node_put(ctrl_np);
  370. }
  371. #endif /* RT_USING_OFW */
  372. return ctrl;
  373. }
  374. struct rt_dma_chan *rt_dma_chan_request(struct rt_device *dev, const char *name)
  375. {
  376. void *fw_data = RT_NULL;
  377. struct rt_dma_chan *chan;
  378. struct rt_ofw_cell_args dma_args;
  379. struct rt_dma_controller *ctrl = RT_NULL;
  380. if (!dev)
  381. {
  382. return rt_err_ptr(-RT_EINVAL);
  383. }
  384. if (name)
  385. {
  386. fw_data = &dma_args;
  387. ctrl = ofw_find_dma_controller(dev, name, &dma_args);
  388. }
  389. else
  390. {
  391. struct rt_dma_controller *ctrl_tmp;
  392. rt_spin_lock(&dmac_nodes_lock);
  393. rt_list_for_each_entry(ctrl_tmp, &dmac_nodes, list)
  394. {
  395. /* Only memory to memory for uname request */
  396. if (rt_bitmap_test_bit(ctrl_tmp->dir_cap, RT_DMA_MEM_TO_MEM))
  397. {
  398. ctrl = ctrl_tmp;
  399. break;
  400. }
  401. }
  402. rt_spin_unlock(&dmac_nodes_lock);
  403. }
  404. if (rt_is_err_or_null(ctrl))
  405. {
  406. return ctrl ? ctrl : rt_err_ptr(-RT_ENOSYS);
  407. }
  408. if (ctrl->ops->request_chan)
  409. {
  410. chan = ctrl->ops->request_chan(ctrl, dev, fw_data);
  411. }
  412. else
  413. {
  414. chan = rt_calloc(1, sizeof(*chan));
  415. if (!chan)
  416. {
  417. chan = rt_err_ptr(-RT_ENOMEM);
  418. }
  419. }
  420. if (rt_is_err(chan))
  421. {
  422. return chan;
  423. }
  424. if (!chan)
  425. {
  426. LOG_E("%s: unset request channels error", rt_dm_dev_get_name(ctrl->dev));
  427. return rt_err_ptr(-RT_ERROR);
  428. }
  429. chan->name = name;
  430. chan->ctrl = ctrl;
  431. chan->slave = dev;
  432. rt_list_init(&chan->list);
  433. chan->conf_err = -RT_ERROR;
  434. chan->prep_err = -RT_ERROR;
  435. rt_mutex_take(&ctrl->mutex, RT_WAITING_FOREVER);
  436. rt_list_insert_before(&ctrl->channels_nodes, &chan->list);
  437. rt_mutex_release(&ctrl->mutex);
  438. return chan;
  439. }
  440. rt_err_t rt_dma_chan_release(struct rt_dma_chan *chan)
  441. {
  442. rt_err_t err = RT_EOK;
  443. if (!chan)
  444. {
  445. return -RT_EINVAL;
  446. }
  447. rt_mutex_take(&chan->ctrl->mutex, RT_WAITING_FOREVER);
  448. rt_list_remove(&chan->list);
  449. rt_mutex_release(&chan->ctrl->mutex);
  450. if (chan->ctrl->ops->release_chan)
  451. {
  452. err = chan->ctrl->ops->release_chan(chan);
  453. }
  454. else
  455. {
  456. rt_free(chan);
  457. }
  458. return err;
  459. }