drv_i2c.c 12 KB

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  1. /*
  2. * Copyright (c) 2006-2018, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2017-08-08 Yang the first version
  9. * 2018-03-24 LaiYiKeTang add hardware iic
  10. */
  11. #include <rtthread.h>
  12. #include <rtdevice.h>
  13. #include "board.h"
  14. #include "fsl_gpio.h"
  15. #include "fsl_lpi2c.h"
  16. #include "drv_i2c.h"
  17. //#define DRV_I2C_DEBUG
  18. #ifdef RT_USING_I2C
  19. #define I2C1BUS_NAME "i2c1"
  20. #define I2C2BUS_NAME "i2c2"
  21. #define I2C3BUS_NAME "i2c3"
  22. #define I2C4BUS_NAME "i2c4"
  23. #define LPI2C_CLOCK_SOURCE_DIVIDER 4
  24. /* Get frequency of lpi2c clock */
  25. #define LPI2C_CLOCK_FREQUENCY ((CLOCK_GetFreq(kCLOCK_Usb1PllClk) / 8) / (LPI2C_CLOCK_SOURCE_DIVIDER))
  26. #ifdef RT_USING_HW_I2C1
  27. static struct rt1052_i2c_bus lpi2c1 =
  28. {
  29. .I2C = LPI2C1,
  30. .device_name = I2C1BUS_NAME,
  31. };
  32. #endif /* RT_USING_HW_I2C1 */
  33. #ifdef RT_USING_HW_I2C2
  34. static struct rt1052_i2c_bus lpi2c2 =
  35. {
  36. .I2C = LPI2C2,
  37. .device_name = I2C2BUS_NAME,
  38. };
  39. #endif /* RT_USING_HW_I2C2 */
  40. #ifdef RT_USING_HW_I2C3
  41. static struct rt1052_i2c_bus lpi2c3 =
  42. {
  43. .I2C = LPI2C3,
  44. .device_name = I2C3BUS_NAME,
  45. };
  46. #endif /* RT_USING_HW_I2C3 */
  47. #ifdef RT_USING_HW_I2C4
  48. static struct rt1052_i2c_bus lpi2c4 =
  49. {
  50. .I2C = LPI2C4,
  51. .device_name = I2C4BUS_NAME,
  52. };
  53. #endif /* RT_USING_HW_I2C4 */
  54. #if (defined(RT_USING_HW_I2C1) || defined(RT_USING_HW_I2C2) || defined(RT_USING_HW_I2C3) || defined(RT_USING_HW_I2C4))
  55. static rt_size_t imxrt_i2c_mst_xfer(struct rt_i2c_bus_device *bus,
  56. struct rt_i2c_msg msgs[],
  57. rt_uint32_t num);
  58. static rt_size_t imxrt_i2c_slv_xfer(struct rt_i2c_bus_device *bus,
  59. struct rt_i2c_msg msgs[],
  60. rt_uint32_t num);
  61. static rt_err_t imxrt_i2c_bus_control(struct rt_i2c_bus_device *bus,
  62. rt_uint32_t,
  63. rt_uint32_t);
  64. static const struct rt_i2c_bus_device_ops imxrt_i2c_ops =
  65. {
  66. imxrt_i2c_mst_xfer,
  67. imxrt_i2c_slv_xfer,
  68. imxrt_i2c_bus_control,
  69. };
  70. void imxrt_lpi2c_gpio_init(struct rt1052_i2c_bus *bus)
  71. {
  72. if (bus->I2C == LPI2C1)
  73. {
  74. IOMUXC_SetPinMux(
  75. IOMUXC_GPIO_AD_B1_00_LPI2C1_SCL,
  76. 1U);
  77. IOMUXC_SetPinMux(
  78. IOMUXC_GPIO_AD_B1_01_LPI2C1_SDA,
  79. 1U);
  80. IOMUXC_SetPinConfig(
  81. IOMUXC_GPIO_AD_B1_00_LPI2C1_SCL,
  82. 0xD8B0u);
  83. IOMUXC_SetPinConfig(
  84. IOMUXC_GPIO_AD_B1_01_LPI2C1_SDA,
  85. 0xD8B0u);
  86. }
  87. else if (bus->I2C == LPI2C2)
  88. {
  89. IOMUXC_SetPinMux(
  90. IOMUXC_GPIO_B0_04_LPI2C2_SCL,
  91. 1U);
  92. IOMUXC_SetPinMux(
  93. IOMUXC_GPIO_B0_05_LPI2C2_SDA,
  94. 1U);
  95. IOMUXC_SetPinConfig(
  96. IOMUXC_GPIO_B0_04_LPI2C2_SCL,
  97. 0xD8B0u);
  98. IOMUXC_SetPinConfig(
  99. IOMUXC_GPIO_B0_05_LPI2C2_SDA,
  100. 0xD8B0u);
  101. }
  102. else if (bus->I2C == LPI2C3)
  103. {
  104. IOMUXC_SetPinMux(
  105. IOMUXC_GPIO_AD_B1_07_LPI2C3_SCL,
  106. 1U);
  107. IOMUXC_SetPinMux(
  108. IOMUXC_GPIO_AD_B1_06_LPI2C3_SDA,
  109. 1U);
  110. IOMUXC_SetPinConfig(
  111. IOMUXC_GPIO_AD_B1_07_LPI2C3_SCL,
  112. 0xD8B0u);
  113. IOMUXC_SetPinConfig(
  114. IOMUXC_GPIO_AD_B1_06_LPI2C3_SDA,
  115. 0xD8B0u);
  116. }
  117. else if (bus->I2C == LPI2C4)
  118. {
  119. IOMUXC_SetPinMux(
  120. IOMUXC_GPIO_EMC_12_LPI2C4_SCL,
  121. 1U);
  122. IOMUXC_SetPinMux(
  123. IOMUXC_GPIO_EMC_11_LPI2C4_SDA,
  124. 1U);
  125. IOMUXC_SetPinConfig(
  126. IOMUXC_GPIO_EMC_12_LPI2C4_SCL,
  127. 0xD8B0u);
  128. IOMUXC_SetPinConfig(
  129. IOMUXC_GPIO_EMC_11_LPI2C4_SDA,
  130. 0xD8B0u);
  131. }
  132. else
  133. {
  134. RT_ASSERT(RT_NULL);
  135. }
  136. }
  137. static rt_err_t imxrt_lpi2c_configure(struct rt1052_i2c_bus *bus, lpi2c_master_config_t *cfg)
  138. {
  139. RT_ASSERT(bus != RT_NULL);
  140. RT_ASSERT(cfg != RT_NULL);
  141. imxrt_lpi2c_gpio_init(bus);
  142. bus->parent.ops = &imxrt_i2c_ops;
  143. LPI2C_MasterInit(bus->I2C, cfg, LPI2C_CLOCK_FREQUENCY);
  144. return RT_EOK;
  145. }
  146. status_t LPI2C_MasterCheck(LPI2C_Type *base, uint32_t status)
  147. {
  148. status_t result = kStatus_Success;
  149. /* Check for error. These errors cause a stop to automatically be sent. We must */
  150. /* clear the errors before a new transfer can start. */
  151. status &= 0x3c00;
  152. if (status)
  153. {
  154. /* Select the correct error code. Ordered by severity, with bus issues first. */
  155. if (status & kLPI2C_MasterPinLowTimeoutFlag)
  156. {
  157. result = kStatus_LPI2C_PinLowTimeout;
  158. }
  159. else if (status & kLPI2C_MasterArbitrationLostFlag)
  160. {
  161. result = kStatus_LPI2C_ArbitrationLost;
  162. }
  163. else if (status & kLPI2C_MasterNackDetectFlag)
  164. {
  165. result = kStatus_LPI2C_Nak;
  166. }
  167. else if (status & kLPI2C_MasterFifoErrFlag)
  168. {
  169. result = kStatus_LPI2C_FifoError;
  170. }
  171. else
  172. {
  173. assert(false);
  174. }
  175. /* Clear the flags. */
  176. LPI2C_MasterClearStatusFlags(base, status);
  177. /* Reset fifos. These flags clear automatically. */
  178. base->MCR |= LPI2C_MCR_RRF_MASK | LPI2C_MCR_RTF_MASK;
  179. }
  180. return result;
  181. }
  182. /*!
  183. * @brief Wait until the tx fifo all empty.
  184. * @param base The LPI2C peripheral base address.
  185. * @retval #kStatus_Success
  186. * @retval #kStatus_LPI2C_PinLowTimeout
  187. * @retval #kStatus_LPI2C_ArbitrationLost
  188. * @retval #kStatus_LPI2C_Nak
  189. * @retval #kStatus_LPI2C_FifoError
  190. */
  191. static status_t LPI2C_MasterWaitForTxFifoAllEmpty(LPI2C_Type *base)
  192. {
  193. uint32_t status;
  194. size_t txCount;
  195. do
  196. {
  197. status_t result;
  198. /* Get the number of words in the tx fifo and compute empty slots. */
  199. LPI2C_MasterGetFifoCounts(base, NULL, &txCount);
  200. /* Check for error flags. */
  201. status = LPI2C_MasterGetStatusFlags(base);
  202. result = LPI2C_MasterCheck(base, status);
  203. if (result)
  204. {
  205. return result;
  206. }
  207. }
  208. while (txCount);
  209. return kStatus_Success;
  210. }
  211. static rt_size_t imxrt_i2c_mst_xfer(struct rt_i2c_bus_device *bus,
  212. struct rt_i2c_msg msgs[],
  213. rt_uint32_t num)
  214. {
  215. struct rt1052_i2c_bus *rt1052_i2c;
  216. rt_size_t i;
  217. RT_ASSERT(bus != RT_NULL);
  218. rt1052_i2c = (struct rt1052_i2c_bus *) bus;
  219. rt1052_i2c->msg = msgs;
  220. rt1052_i2c->msg_ptr = 0;
  221. rt1052_i2c->msg_cnt = num;
  222. rt1052_i2c->dptr = 0;
  223. for (i = 0; i < num; i++)
  224. {
  225. if (rt1052_i2c->msg[i].flags & RT_I2C_RD)
  226. {
  227. if (LPI2C_MasterStart(rt1052_i2c->I2C, rt1052_i2c->msg[i].addr, kLPI2C_Read) != kStatus_Success)
  228. {
  229. i = 0;
  230. break;
  231. }
  232. if (LPI2C_MasterWaitForTxFifoAllEmpty(rt1052_i2c->I2C) != kStatus_Success)
  233. {
  234. i = 0;
  235. break;
  236. }
  237. if (LPI2C_MasterReceive(rt1052_i2c->I2C, rt1052_i2c->msg[i].buf, rt1052_i2c->msg[i].len) != kStatus_Success)
  238. {
  239. i = 0;
  240. break;
  241. }
  242. if (LPI2C_MasterWaitForTxFifoAllEmpty(rt1052_i2c->I2C) != kStatus_Success)
  243. {
  244. i = 0;
  245. break;
  246. }
  247. }
  248. else
  249. {
  250. if (LPI2C_MasterStart(rt1052_i2c->I2C, rt1052_i2c->msg[i].addr, kLPI2C_Write) != kStatus_Success)
  251. {
  252. i = 0;
  253. break;
  254. }
  255. if (LPI2C_MasterWaitForTxFifoAllEmpty(rt1052_i2c->I2C) != kStatus_Success)
  256. {
  257. i = 0;
  258. break;
  259. }
  260. if (LPI2C_MasterSend(rt1052_i2c->I2C, rt1052_i2c->msg[i].buf, rt1052_i2c->msg[i].len) != kStatus_Success)
  261. {
  262. i = 0;
  263. break;
  264. }
  265. if (LPI2C_MasterWaitForTxFifoAllEmpty(rt1052_i2c->I2C) != kStatus_Success)
  266. {
  267. i = 0;
  268. break;
  269. }
  270. }
  271. }
  272. i2c_dbg("send stop condition\n");
  273. if (LPI2C_MasterStop(rt1052_i2c->I2C) != kStatus_Success)
  274. {
  275. i = 0;
  276. }
  277. rt1052_i2c->msg = RT_NULL;
  278. rt1052_i2c->msg_ptr = 0;
  279. rt1052_i2c->msg_cnt = 0;
  280. rt1052_i2c->dptr = 0;
  281. return i;
  282. }
  283. static rt_size_t imxrt_i2c_slv_xfer(struct rt_i2c_bus_device *bus,
  284. struct rt_i2c_msg msgs[],
  285. rt_uint32_t num)
  286. {
  287. return 0;
  288. }
  289. static rt_err_t imxrt_i2c_bus_control(struct rt_i2c_bus_device *bus,
  290. rt_uint32_t cmd,
  291. rt_uint32_t arg)
  292. {
  293. return RT_ERROR;
  294. }
  295. #endif
  296. int rt_hw_i2c_init(void)
  297. {
  298. #if (defined(RT_USING_HW_I2C1) || defined(RT_USING_HW_I2C2) || defined(RT_USING_HW_I2C3) || defined(RT_USING_HW_I2C4))
  299. lpi2c_master_config_t masterConfig = {0};
  300. /*Clock setting for LPI2C*/
  301. CLOCK_SetMux(kCLOCK_Lpi2cMux, 0);
  302. CLOCK_SetDiv(kCLOCK_Lpi2cDiv, LPI2C_CLOCK_SOURCE_DIVIDER - 1);
  303. #endif
  304. #if defined(RT_USING_HW_I2C1)
  305. LPI2C_MasterGetDefaultConfig(&masterConfig);
  306. #if defined(HW_I2C1_BADURATE_400kHZ)
  307. masterConfig.baudRate_Hz = 400000U;
  308. #elif defined(HW_I2C1_BADURATE_100kHZ)
  309. masterConfig.baudRate_Hz = 100000U;
  310. #endif
  311. imxrt_lpi2c_configure(&lpi2c1, &masterConfig);
  312. rt_i2c_bus_device_register(&lpi2c1.parent, lpi2c1.device_name);
  313. #endif
  314. #if defined(RT_USING_HW_I2C2)
  315. LPI2C_MasterGetDefaultConfig(&masterConfig);
  316. #if defined(HW_I2C2_BADURATE_400kHZ)
  317. masterConfig.baudRate_Hz = 400000U;
  318. #elif defined(HW_I2C2_BADURATE_100kHZ)
  319. masterConfig.baudRate_Hz = 100000U;
  320. #endif
  321. imxrt_lpi2c_configure(&lpi2c2, &masterConfig);
  322. rt_i2c_bus_device_register(&lpi2c2.parent, lpi2c2.device_name);
  323. #endif
  324. #if defined(RT_USING_HW_I2C3)
  325. LPI2C_MasterGetDefaultConfig(&masterConfig);
  326. #if defined(HW_I2C3_BADURATE_400kHZ)
  327. masterConfig.baudRate_Hz = 400000U;
  328. #elif defined(HW_I2C3_BADURATE_100kHZ)
  329. masterConfig.baudRate_Hz = 100000U;
  330. #endif
  331. imxrt_lpi2c_configure(&lpi2c3, &masterConfig);
  332. rt_i2c_bus_device_register(&lpi2c3.parent, lpi2c3.device_name);
  333. #endif
  334. #if defined(RT_USING_HW_I2C4)
  335. LPI2C_MasterGetDefaultConfig(&masterConfig);
  336. #if defined(HW_I2C4_BADURATE_400kHZ)
  337. masterConfig.baudRate_Hz = 400000U;
  338. #elif defined(HW_I2C4_BADURATE_100kHZ)
  339. masterConfig.baudRate_Hz = 100000U;
  340. #endif
  341. imxrt_lpi2c_configure(&lpi2c4, &masterConfig);
  342. rt_i2c_bus_device_register(&lpi2c4.parent, lpi2c4.device_name);
  343. #endif
  344. return 0;
  345. }
  346. INIT_DEVICE_EXPORT(rt_hw_i2c_init);
  347. #if defined(RT_USING_FINSH) && defined(DRV_I2C_DEBUG)
  348. #include <finsh.h>
  349. static rt_device_t _i2c_find(const char *name)
  350. {
  351. rt_device_t dev;
  352. dev = rt_device_find(name);
  353. if (!dev)
  354. {
  355. rt_kprintf("search device failed: %s\n", name);
  356. return RT_NULL;
  357. }
  358. if (rt_device_open(dev, RT_DEVICE_OFLAG_RDWR) != RT_EOK)
  359. {
  360. rt_kprintf("open device failed: %s\n", name);
  361. return RT_NULL;
  362. }
  363. rt_kprintf("open i2c bus: %s\n", name);
  364. return dev;
  365. }
  366. static void _search_i2c_device(rt_device_t dev, uint8_t cmd)
  367. {
  368. int count = 0;
  369. struct rt_i2c_msg msgs[2];
  370. uint8_t buf = 0;
  371. msgs[0].flags = RT_I2C_WR;
  372. msgs[0].buf = &cmd;
  373. msgs[0].len = sizeof(cmd);
  374. msgs[1].flags = RT_I2C_RD;
  375. msgs[1].buf = &buf;
  376. msgs[1].len = 1;
  377. for (int i = 0; i <= 0x7f; i++)
  378. {
  379. int len;
  380. msgs[0].addr = i;
  381. msgs[1].addr = i;
  382. len = rt_i2c_transfer((struct rt_i2c_bus_device *)dev, msgs, 2);
  383. if (len == 2)
  384. {
  385. count++;
  386. rt_kprintf("add:%02X transfer success, id: %02X\n", i, buf);
  387. }
  388. }
  389. rt_kprintf("i2c device: %d\n", count);
  390. }
  391. static int i2c_test(const char *name, uint8_t cmd)
  392. {
  393. rt_device_t dev = _i2c_find(name);
  394. if (dev == RT_NULL)
  395. {
  396. rt_kprintf("search i2c device faild\n");
  397. return -1;
  398. }
  399. _search_i2c_device(dev, cmd);
  400. rt_device_close(dev);
  401. return 0;
  402. }
  403. FINSH_FUNCTION_EXPORT(i2c_test, e.g: i2c_test("i2c1", 0xA3));
  404. #endif
  405. #endif /* RT_USING_I2C */