serial.c 14 KB

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  1. /*
  2. * File : serial.c
  3. * This file is part of RT-Thread RTOS
  4. * COPYRIGHT (C) 2006, RT-Thread Development Team
  5. *
  6. * The license and distribution terms for this file may be
  7. * found in the file LICENSE in this distribution or at
  8. * http://openlab.rt-thread.com/license/LICENSE
  9. *
  10. * Change Logs:
  11. * Date Author Notes
  12. * 2009-02-05 Bernard first version
  13. */
  14. #include "serial.h"
  15. #include <stm32f10x_dma.h>
  16. static void rt_serial_enable_dma(DMA_Channel_TypeDef* dma_channel,
  17. rt_uint32_t address, rt_uint32_t size);
  18. /**
  19. * @addtogroup STM32
  20. */
  21. /*@{*/
  22. /**
  23. * This function read a character from serial without interrupt enable mode
  24. *
  25. * @return the read char
  26. */
  27. int rt_serial_getc(struct stm32_serial_device* uart)
  28. {
  29. rt_base_t level;
  30. int ch = -1;
  31. /* disable interrupt */
  32. level = rt_hw_interrupt_disable();
  33. if (uart->int_rx->read_index != uart->int_rx->save_index)
  34. {
  35. ch = uart->int_rx->rx_buffer[uart->int_rx->read_index];
  36. uart->int_rx->read_index ++;
  37. if (uart->int_rx->read_index >= UART_RX_BUFFER_SIZE)
  38. uart->int_rx->read_index = 0;
  39. }
  40. /* enable interrupt */
  41. rt_hw_interrupt_enable(level);
  42. return ch;
  43. }
  44. /* save a char to serial buffer */
  45. void rt_serial_savechar(struct stm32_serial_device* uart, char ch)
  46. {
  47. rt_base_t level;
  48. /* disable interrupt */
  49. level = rt_hw_interrupt_disable();
  50. uart->int_rx->rx_buffer[uart->int_rx->save_index] = ch;
  51. uart->int_rx->save_index ++;
  52. if (uart->int_rx->save_index >= UART_RX_BUFFER_SIZE)
  53. uart->int_rx->save_index = 0;
  54. /* if the next position is read index, discard this 'read char' */
  55. if (uart->int_rx->save_index == uart->int_rx->read_index)
  56. {
  57. uart->int_rx->read_index ++;
  58. if (uart->int_rx->read_index >= UART_RX_BUFFER_SIZE)
  59. uart->int_rx->read_index = 0;
  60. }
  61. /* enable interrupt */
  62. rt_hw_interrupt_enable(level);
  63. }
  64. /**
  65. * This function will write a character to serial without interrupt enable mode
  66. *
  67. * @param c the char to write
  68. */
  69. void rt_serial_putc(rt_device_t device, const char c)
  70. {
  71. struct stm32_serial_device* uart = (struct stm32_serial_device*) device->private;
  72. /*
  73. * to be polite with serial console add a line feed
  74. * to the carriage return character
  75. */
  76. if (c=='\n' && (device->flag & RT_DEVICE_FLAG_STREAM))
  77. rt_serial_putc(device, '\r');
  78. while (!(uart->uart_device->SR & USART_FLAG_TXE));
  79. uart->uart_device->DR = (c & 0x1FF);
  80. }
  81. /* RT-Thread Device Interface */
  82. static rt_err_t rt_serial_init (rt_device_t dev)
  83. {
  84. struct stm32_serial_device* uart = (struct stm32_serial_device*) dev->private;
  85. if (!(dev->flag & RT_DEVICE_FLAG_ACTIVATED))
  86. {
  87. if (dev->flag & RT_DEVICE_FLAG_INT_RX)
  88. {
  89. rt_memset(uart->int_rx->rx_buffer, 0,
  90. sizeof(uart->int_rx->rx_buffer));
  91. uart->int_rx->read_index = 0;
  92. uart->int_rx->save_index = 0;
  93. }
  94. if (dev->flag & RT_DEVICE_FLAG_DMA_RX)
  95. {
  96. RT_ASSERT(uart->dma_rx->dma_channel != RT_NULL);
  97. uart->dma_rx->read_index = uart->dma_rx->read_descriptor = 0;
  98. uart->dma_rx->is_full = RT_FALSE;
  99. }
  100. if (dev->flag & RT_DEVICE_FLAG_INT_TX)
  101. {
  102. rt_memset(uart->int_tx->tx_buffer, 0,
  103. sizeof(uart->int_tx->tx_buffer));
  104. uart->int_tx->write_index = uart->int_tx->save_index = 0;
  105. }
  106. if (dev->flag & RT_DEVICE_FLAG_DMA_TX)
  107. {
  108. RT_ASSERT(uart->dma_rx->dma_channel != RT_NULL);
  109. uart->dma_tx->list_head = uart->dma_tx->list_tail = RT_NULL;
  110. }
  111. /* Enable USART */
  112. USART_Cmd(uart->uart_device, ENABLE);
  113. dev->flag |= RT_DEVICE_FLAG_ACTIVATED;
  114. }
  115. return RT_EOK;
  116. }
  117. static rt_err_t rt_serial_open(rt_device_t dev, rt_uint16_t oflag)
  118. {
  119. struct stm32_serial_device* uart;
  120. RT_ASSERT(dev != RT_NULL);
  121. uart = (struct stm32_serial_device*)dev->private;
  122. if (dev->flag & RT_DEVICE_FLAG_DMA_RX)
  123. {
  124. /* enable Rx DMA */
  125. rt_serial_enable_dma(uart->dma_rx->dma_channel,
  126. (rt_uint32_t)&(uart->dma_rx->rx_buffer[uart->dma_rx->save_descriptor][0]),
  127. UART_DMA_RX_BUFFER_SIZE);
  128. }
  129. return RT_EOK;
  130. }
  131. static rt_err_t rt_serial_close(rt_device_t dev)
  132. {
  133. struct stm32_serial_device* uart;
  134. RT_ASSERT(dev != RT_NULL);
  135. uart = (struct stm32_serial_device*)dev->private;
  136. if (dev->flag & RT_DEVICE_FLAG_DMA_RX)
  137. {
  138. /* disable DMA */
  139. DMA_Cmd(uart->dma_rx->dma_channel, DISABLE);
  140. }
  141. return RT_EOK;
  142. }
  143. static rt_size_t rt_serial_read (rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size)
  144. {
  145. rt_uint8_t* ptr;
  146. rt_err_t err_code;
  147. struct stm32_serial_device* uart;
  148. ptr = buffer;
  149. err_code = RT_EOK;
  150. uart = (struct stm32_serial_device*)dev->private;
  151. if (dev->flag & RT_DEVICE_FLAG_INT_RX)
  152. {
  153. rt_int32_t ch;
  154. /* interrupt mode Rx */
  155. while (size)
  156. {
  157. /* get a character */
  158. ch = rt_serial_getc(uart);
  159. if (ch < 0)
  160. {
  161. /* set error code */
  162. err_code = -RT_EEMPTY;
  163. }
  164. else
  165. {
  166. *ptr++ = ch;
  167. size --;
  168. }
  169. }
  170. }
  171. else if (dev->flag & RT_DEVICE_FLAG_DMA_RX)
  172. {
  173. /* check queue empty */
  174. if ((uart->dma_rx->read_descriptor == uart->dma_rx->save_descriptor))
  175. {
  176. /* set error code */
  177. err_code = -RT_EEMPTY;
  178. }
  179. else
  180. {
  181. /* read data */
  182. while ((rt_uint32_t)ptr - (rt_uint32_t)buffer < size)
  183. {
  184. /* read buffer */
  185. *ptr ++ = uart->dma_rx->
  186. rx_buffer[uart->dma_rx->read_descriptor][uart->dma_rx->read_index];
  187. /* move to next position */
  188. uart->dma_rx->read_index ++;
  189. /* wrap read index */
  190. if (uart->dma_rx->read_index >= UART_DMA_RX_BUFFER_SIZE)
  191. {
  192. /* wrap read index */
  193. uart->dma_rx->read_index = 0;
  194. /* move to next read descriptor */
  195. uart->dma_rx->read_descriptor ++;
  196. /* wrap read descriptor */
  197. if (uart->dma_rx->read_descriptor >= UART_DMA_RX_DESCRIPTOR)
  198. uart->dma_rx->read_descriptor = 0;
  199. if (uart->dma_rx->is_full == RT_TRUE)
  200. {
  201. rt_uint32_t level;
  202. level = rt_hw_interrupt_disable();
  203. uart->dma_rx->save_descriptor ++;
  204. if (uart->dma_rx->save_descriptor >= UART_DMA_RX_DESCRIPTOR)
  205. uart->dma_rx->save_descriptor = 0;
  206. rt_hw_interrupt_enable(level);
  207. /* re-enable DMA to receive */
  208. rt_serial_enable_dma(uart->dma_rx->dma_channel,
  209. (rt_uint32_t)&(uart->dma_rx->rx_buffer[uart->dma_rx->save_descriptor][0]),
  210. UART_DMA_RX_BUFFER_SIZE);
  211. }
  212. /* check queue empty */
  213. if ((uart->dma_rx->read_descriptor == uart->dma_rx->save_descriptor))
  214. {
  215. /* set error code */
  216. err_code = -RT_EEMPTY;
  217. break;
  218. }
  219. }
  220. }
  221. }
  222. }
  223. else
  224. {
  225. /* polling mode */
  226. while ((rt_uint32_t)ptr - (rt_uint32_t)buffer < size)
  227. {
  228. while (uart->uart_device->SR & USART_FLAG_RXNE)
  229. {
  230. *ptr = uart->uart_device->DR & 0xff;
  231. ptr ++;
  232. }
  233. }
  234. }
  235. /* set error code */
  236. rt_set_errno(err_code);
  237. return (rt_uint32_t)ptr - (rt_uint32_t)buffer;
  238. }
  239. static void rt_serial_enable_dma(DMA_Channel_TypeDef* dma_channel,
  240. rt_uint32_t address, rt_uint32_t size)
  241. {
  242. RT_ASSERT(dma_channel != RT_NULL);
  243. /* disable DMA */
  244. DMA_Cmd(dma_channel, DISABLE);
  245. /* set buffer address */
  246. dma_channel->CMAR = address;
  247. /* set size */
  248. dma_channel->CNDTR = size;
  249. /* enable DMA */
  250. DMA_Cmd(dma_channel, ENABLE);
  251. }
  252. static rt_size_t rt_serial_write (rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size)
  253. {
  254. rt_uint8_t* ptr;
  255. rt_err_t err_code;
  256. struct stm32_serial_device* uart;
  257. err_code = RT_EOK;
  258. ptr = (rt_uint8_t*)buffer;
  259. uart = (struct stm32_serial_device*)dev->private;
  260. if (dev->flag & RT_DEVICE_FLAG_INT_TX)
  261. {
  262. /* interrupt mode Tx */
  263. while (uart->int_tx->save_index != uart->int_tx->write_index)
  264. {
  265. /* save on tx buffer */
  266. uart->int_tx->tx_buffer[uart->int_tx->save_index] = *ptr++;
  267. -- size;
  268. /* move to next position */
  269. uart->int_tx->save_index ++;
  270. /* wrap save index */
  271. if (uart->int_tx->save_index >= UART_TX_BUFFER_SIZE)
  272. uart->int_tx->save_index = 0;
  273. }
  274. /* set error code */
  275. if (size > 0)
  276. err_code = -RT_EFULL;
  277. }
  278. else if (dev->flag & RT_DEVICE_FLAG_DMA_TX)
  279. {
  280. /* DMA mode Tx */
  281. /* allocate a data node */
  282. struct stm32_serial_data_node* data_node =
  283. (struct stm32_serial_data_node*) rt_malloc (sizeof(struct stm32_serial_data_node));
  284. if (data_node == RT_NULL)
  285. {
  286. /* set error code */
  287. err_code = -RT_ENOMEM;
  288. }
  289. else
  290. {
  291. rt_uint32_t level;
  292. /* fill data node */
  293. data_node->data_ptr = ptr;
  294. data_node->data_size = size;
  295. /* insert to data link */
  296. data_node->next = RT_NULL;
  297. /* disable interrupt */
  298. level = rt_hw_interrupt_disable();
  299. data_node->prev = uart->dma_tx->list_tail;
  300. if (uart->dma_tx->list_tail != RT_NULL)
  301. uart->dma_tx->list_tail->next = data_node;
  302. uart->dma_tx->list_tail = data_node;
  303. if (uart->dma_tx->list_head == RT_NULL)
  304. {
  305. /* start DMA to transmit data */
  306. uart->dma_tx->list_head = data_node;
  307. /* Enable DMA Channel */
  308. rt_serial_enable_dma(uart->dma_tx->dma_channel,
  309. (rt_uint32_t)uart->dma_tx->list_head->data_ptr,
  310. uart->dma_tx->list_head->data_size);
  311. }
  312. /* enable interrupt */
  313. rt_hw_interrupt_enable(level);
  314. }
  315. }
  316. else
  317. {
  318. /* polling mode */
  319. while (size)
  320. {
  321. rt_serial_putc(dev, *ptr);
  322. ++ptr; --size;
  323. }
  324. }
  325. /* set error code */
  326. rt_set_errno(err_code);
  327. return (rt_uint32_t)ptr - (rt_uint32_t)buffer;
  328. }
  329. static rt_err_t rt_serial_control (rt_device_t dev, rt_uint8_t cmd, void *args)
  330. {
  331. struct stm32_serial_device* uart;
  332. RT_ASSERT(dev != RT_NULL);
  333. uart = (struct stm32_serial_device*)dev->private;
  334. switch (cmd)
  335. {
  336. case RT_DEVICE_CTRL_SUSPEND:
  337. /* suspend device */
  338. dev->flag |= RT_DEVICE_FLAG_SUSPENDED;
  339. USART_Cmd(uart->uart_device, DISABLE);
  340. break;
  341. case RT_DEVICE_CTRL_RESUME:
  342. /* resume device */
  343. dev->flag &= ~RT_DEVICE_FLAG_SUSPENDED;
  344. USART_Cmd(uart->uart_device, ENABLE);
  345. break;
  346. }
  347. return RT_EOK;
  348. }
  349. /*
  350. * serial register for STM32
  351. * support STM32F103VB and STM32F103ZE
  352. */
  353. rt_err_t rt_hw_serial_register(rt_device_t device, const char* name, rt_uint32_t flag, struct stm32_serial_device *serial)
  354. {
  355. RT_ASSERT(device != RT_NULL);
  356. device->type = RT_Device_Class_Char;
  357. device->rx_indicate = RT_NULL;
  358. device->tx_complete = RT_NULL;
  359. device->init = rt_serial_init;
  360. device->open = rt_serial_open;
  361. device->close = rt_serial_close;
  362. device->read = rt_serial_read;
  363. device->write = rt_serial_write;
  364. device->control = rt_serial_control;
  365. device->private = serial;
  366. /* register a character device */
  367. return rt_device_register(device, name, RT_DEVICE_FLAG_RDWR | flag);
  368. }
  369. /* ISR for serial interrupt */
  370. void rt_hw_serial_isr(rt_device_t device)
  371. {
  372. struct stm32_serial_device* uart = (struct stm32_serial_device*) device->private;
  373. if(USART_GetITStatus(uart->uart_device, USART_IT_RXNE) != RESET)
  374. {
  375. /* interrupt mode receive */
  376. RT_ASSERT(device->flag & RT_DEVICE_FLAG_INT_RX);
  377. /* save on rx buffer */
  378. while (uart->uart_device->SR & USART_FLAG_RXNE)
  379. {
  380. rt_serial_savechar(uart, uart->uart_device->DR & 0xff);
  381. }
  382. /* clear interrupt */
  383. USART_ClearITPendingBit(uart->uart_device, USART_IT_RXNE);
  384. /* invoke callback */
  385. if (device->rx_indicate != RT_NULL)
  386. {
  387. rt_size_t rx_length;
  388. /* get rx length */
  389. rx_length = uart->int_rx->read_index > uart->int_rx->save_index ?
  390. UART_RX_BUFFER_SIZE - uart->int_rx->read_index + uart->int_rx->save_index :
  391. uart->int_rx->save_index - uart->int_rx->read_index;
  392. device->rx_indicate(device, rx_length);
  393. }
  394. }
  395. if (USART_GetITStatus(uart->uart_device, USART_IT_TC) != RESET)
  396. {
  397. /* interrupt mode transmission */
  398. RT_ASSERT(device->flag & RT_DEVICE_FLAG_INT_TX);
  399. /* transmission completed */
  400. uart->int_tx->write_index ++;
  401. if (uart->int_tx->write_index >= UART_TX_BUFFER_SIZE)
  402. uart->int_tx->write_index = 0;
  403. /* clear interrupt */
  404. USART_ClearITPendingBit(uart->uart_device, USART_IT_RXNE);
  405. /* start next transmission */
  406. if (uart->int_tx->write_index <
  407. uart->int_tx->save_index)
  408. {
  409. uart->uart_device->DR = uart->int_tx
  410. ->tx_buffer[uart->int_tx->write_index];
  411. }
  412. }
  413. }
  414. /*
  415. * ISR for DMA mode Rx
  416. */
  417. void rt_hw_serial_dma_rx_isr(rt_device_t device)
  418. {
  419. rt_uint32_t next_descriptor;
  420. struct stm32_serial_device* uart = (struct stm32_serial_device*) device->private;
  421. /* DMA mode receive */
  422. RT_ASSERT(device->flag & RT_DEVICE_FLAG_DMA_RX);
  423. /* invoke callback */
  424. if (device->rx_indicate != RT_NULL)
  425. device->rx_indicate(device, UART_DMA_RX_BUFFER_SIZE);
  426. next_descriptor = uart->dma_rx->save_descriptor;
  427. /* move to next descriptor */
  428. next_descriptor ++;
  429. if (next_descriptor >= UART_DMA_RX_DESCRIPTOR)
  430. next_descriptor = 0;
  431. if (next_descriptor != uart->dma_rx->read_descriptor)
  432. {
  433. uart->dma_rx->save_descriptor = next_descriptor;
  434. /* enable next DMA */
  435. rt_serial_enable_dma(uart->dma_rx->dma_channel,
  436. (rt_uint32_t)&(uart->dma_rx->rx_buffer[uart->dma_rx->save_descriptor][0]),
  437. UART_DMA_RX_BUFFER_SIZE);
  438. }
  439. else
  440. {
  441. /* no descriptor yet, disable DMA */
  442. DMA_Cmd(uart->dma_rx->dma_channel, DISABLE);
  443. uart->dma_rx->is_full = RT_TRUE;
  444. }
  445. }
  446. /*
  447. * ISR for DMA mode Tx
  448. */
  449. void rt_hw_serial_dma_tx_isr(rt_device_t device)
  450. {
  451. rt_uint32_t level;
  452. struct stm32_serial_data_node* data_node;
  453. struct stm32_serial_device* uart = (struct stm32_serial_device*) device->private;
  454. /* DMA mode receive */
  455. RT_ASSERT(device->flag & RT_DEVICE_FLAG_DMA_TX);
  456. /* get the first data node */
  457. data_node = uart->dma_tx->list_head;
  458. RT_ASSERT(data_node != RT_NULL);
  459. /* invoke call to notify tx complete */
  460. if (device->tx_complete != RT_NULL)
  461. device->tx_complete(device, data_node->data_ptr);
  462. /* disable interrupt */
  463. level = rt_hw_interrupt_disable();
  464. /* remove list tail */
  465. uart->dma_tx->list_tail = data_node->prev;
  466. if (uart->dma_tx->list_tail == RT_NULL)
  467. uart->dma_tx->list_head = RT_NULL;
  468. /* enable interrupt */
  469. rt_hw_interrupt_enable(level);
  470. /* free data node memory */
  471. rt_free(data_node);
  472. if (uart->dma_tx->list_tail != RT_NULL)
  473. {
  474. /* transmit next data node */
  475. rt_serial_enable_dma(uart->dma_tx->dma_channel,
  476. (rt_uint32_t)uart->dma_tx->list_tail->data_ptr,
  477. uart->dma_tx->list_tail->data_size);
  478. }
  479. else
  480. {
  481. /* no data to be transmitted, disable DMA */
  482. DMA_Cmd(uart->dma_tx->dma_channel, DISABLE);
  483. }
  484. }
  485. /*@}*/