drv_hwtimer.c 13 KB

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  1. /*
  2. * Copyright (c) 2006-2018, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2018-12-10 zylx first version
  9. * 2020-06-16 thread-liu Porting for stm32mp1
  10. * 2020-08-25 linyongkang Fix the timer clock frequency doubling problem
  11. */
  12. #include <board.h>
  13. #ifdef BSP_USING_TIM
  14. #include "drv_config.h"
  15. //#define DRV_DEBUG
  16. #define LOG_TAG "drv.hwtimer"
  17. #include <drv_log.h>
  18. #ifdef RT_USING_HWTIMER
  19. enum
  20. {
  21. #ifdef BSP_USING_TIM1
  22. TIM1_INDEX,
  23. #endif
  24. #ifdef BSP_USING_TIM2
  25. TIM2_INDEX,
  26. #endif
  27. #ifdef BSP_USING_TIM3
  28. TIM3_INDEX,
  29. #endif
  30. #ifdef BSP_USING_TIM4
  31. TIM4_INDEX,
  32. #endif
  33. #ifdef BSP_USING_TIM5
  34. TIM5_INDEX,
  35. #endif
  36. #ifdef BSP_USING_TIM6
  37. TIM6_INDEX,
  38. #endif
  39. #ifdef BSP_USING_TIM7
  40. TIM7_INDEX,
  41. #endif
  42. #ifdef BSP_USING_TIM8
  43. TIM8_INDEX,
  44. #endif
  45. #ifdef BSP_USING_TIM9
  46. TIM9_INDEX,
  47. #endif
  48. #ifdef BSP_USING_TIM10
  49. TIM10_INDEX,
  50. #endif
  51. #ifdef BSP_USING_TIM11
  52. TIM11_INDEX,
  53. #endif
  54. #ifdef BSP_USING_TIM12
  55. TIM12_INDEX,
  56. #endif
  57. #ifdef BSP_USING_TIM13
  58. TIM13_INDEX,
  59. #endif
  60. #ifdef BSP_USING_TIM14
  61. TIM14_INDEX,
  62. #endif
  63. #ifdef BSP_USING_TIM15
  64. TIM15_INDEX,
  65. #endif
  66. #ifdef BSP_USING_TIM16
  67. TIM16_INDEX,
  68. #endif
  69. #ifdef BSP_USING_TIM17
  70. TIM17_INDEX,
  71. #endif
  72. };
  73. struct stm32_hwtimer
  74. {
  75. rt_hwtimer_t time_device;
  76. TIM_HandleTypeDef tim_handle;
  77. IRQn_Type tim_irqn;
  78. char *name;
  79. };
  80. static struct stm32_hwtimer stm32_hwtimer_obj[] =
  81. {
  82. #ifdef BSP_USING_TIM1
  83. TIM1_CONFIG,
  84. #endif
  85. #ifdef BSP_USING_TIM2
  86. TIM2_CONFIG,
  87. #endif
  88. #ifdef BSP_USING_TIM3
  89. TIM3_CONFIG,
  90. #endif
  91. #ifdef BSP_USING_TIM4
  92. TIM4_CONFIG,
  93. #endif
  94. #ifdef BSP_USING_TIM5
  95. TIM5_CONFIG,
  96. #endif
  97. #ifdef BSP_USING_TIM6
  98. TIM6_CONFIG,
  99. #endif
  100. #ifdef BSP_USING_TIM7
  101. TIM7_CONFIG,
  102. #endif
  103. #ifdef BSP_USING_TIM8
  104. TIM8_CONFIG,
  105. #endif
  106. #ifdef BSP_USING_TIM9
  107. TIM9_CONFIG,
  108. #endif
  109. #ifdef BSP_USING_TIM10
  110. TIM10_CONFIG,
  111. #endif
  112. #ifdef BSP_USING_TIM11
  113. TIM11_CONFIG,
  114. #endif
  115. #ifdef BSP_USING_TIM12
  116. TIM12_CONFIG,
  117. #endif
  118. #ifdef BSP_USING_TIM13
  119. TIM13_CONFIG,
  120. #endif
  121. #ifdef BSP_USING_TIM14
  122. TIM14_CONFIG,
  123. #endif
  124. #ifdef BSP_USING_TIM15
  125. TIM15_CONFIG,
  126. #endif
  127. #ifdef BSP_USING_TIM16
  128. TIM16_CONFIG,
  129. #endif
  130. #ifdef BSP_USING_TIM17
  131. TIM17_CONFIG,
  132. #endif
  133. };
  134. static void pclkx_doubler_get(uint32_t *pclk1_doubler, uint32_t *pclk2_doubler)
  135. {
  136. uint32_t flatency = 0;
  137. RCC_ClkInitTypeDef RCC_ClkInitStruct;
  138. RT_ASSERT(pclk1_doubler != RT_NULL);
  139. RT_ASSERT(pclk1_doubler != RT_NULL);
  140. HAL_RCC_GetClockConfig(&RCC_ClkInitStruct, &flatency);
  141. *pclk1_doubler = 1;
  142. *pclk2_doubler = 1;
  143. if(RCC_ClkInitStruct.APB1CLKDivider != RCC_HCLK_DIV1)
  144. {
  145. *pclk1_doubler = 2;
  146. }
  147. if(RCC_ClkInitStruct.APB2CLKDivider != RCC_HCLK_DIV1)
  148. {
  149. *pclk2_doubler = 2;
  150. }
  151. }
  152. static void timer_init(struct rt_hwtimer_device *timer, rt_uint32_t state)
  153. {
  154. uint32_t prescaler_value = 0;
  155. uint32_t pclk1_doubler, pclk2_doubler;
  156. TIM_HandleTypeDef *tim = RT_NULL;
  157. struct stm32_hwtimer *tim_device = RT_NULL;
  158. RT_ASSERT(timer != RT_NULL);
  159. if (state)
  160. {
  161. tim = (TIM_HandleTypeDef *)timer->parent.user_data;
  162. tim_device = (struct stm32_hwtimer *)timer;
  163. pclkx_doubler_get(&pclk1_doubler, &pclk2_doubler);
  164. /* time init */
  165. #if defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
  166. if (tim->Instance == TIM9 || tim->Instance == TIM10 || tim->Instance == TIM11)
  167. #elif defined(SOC_SERIES_STM32L4)
  168. if (tim->Instance == TIM15 || tim->Instance == TIM16 || tim->Instance == TIM17)
  169. #elif defined(SOC_SERIES_STM32MP1)
  170. if(tim->Instance == TIM14 || tim->Instance == TIM16 || tim->Instance == TIM17)
  171. #elif defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32G0)
  172. if (0)
  173. #endif
  174. {
  175. #if !defined(SOC_SERIES_STM32F0) && !defined(SOC_SERIES_STM32G0)
  176. prescaler_value = (uint32_t)(HAL_RCC_GetPCLK2Freq() * pclk2_doubler / 10000) - 1;
  177. #endif
  178. }
  179. else
  180. {
  181. prescaler_value = (uint32_t)(HAL_RCC_GetPCLK1Freq() * pclk1_doubler / 10000) - 1;
  182. }
  183. tim->Init.Period = 10000 - 1;
  184. tim->Init.Prescaler = prescaler_value;
  185. tim->Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
  186. if (timer->info->cntmode == HWTIMER_CNTMODE_UP)
  187. {
  188. tim->Init.CounterMode = TIM_COUNTERMODE_UP;
  189. }
  190. else
  191. {
  192. tim->Init.CounterMode = TIM_COUNTERMODE_DOWN;
  193. }
  194. tim->Init.RepetitionCounter = 0;
  195. #if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32G0) || defined(SOC_SERIES_STM32MP1)
  196. tim->Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
  197. #endif
  198. if (HAL_TIM_Base_Init(tim) != HAL_OK)
  199. {
  200. LOG_E("%s init failed", tim_device->name);
  201. return;
  202. }
  203. else
  204. {
  205. /* set the TIMx priority */
  206. HAL_NVIC_SetPriority(tim_device->tim_irqn, 3, 0);
  207. /* enable the TIMx global Interrupt */
  208. HAL_NVIC_EnableIRQ(tim_device->tim_irqn);
  209. /* clear update flag */
  210. __HAL_TIM_CLEAR_FLAG(tim, TIM_FLAG_UPDATE);
  211. /* enable update request source */
  212. __HAL_TIM_URS_ENABLE(tim);
  213. LOG_D("%s init success", tim_device->name);
  214. }
  215. }
  216. }
  217. static rt_err_t timer_start(rt_hwtimer_t *timer, rt_uint32_t t, rt_hwtimer_mode_t opmode)
  218. {
  219. rt_err_t result = RT_EOK;
  220. TIM_HandleTypeDef *tim = RT_NULL;
  221. RT_ASSERT(timer != RT_NULL);
  222. tim = (TIM_HandleTypeDef *)timer->parent.user_data;
  223. /* set tim cnt */
  224. __HAL_TIM_SET_COUNTER(tim, 0);
  225. /* set tim arr */
  226. __HAL_TIM_SET_AUTORELOAD(tim, t - 1);
  227. if (opmode == HWTIMER_MODE_ONESHOT)
  228. {
  229. /* set timer to single mode */
  230. tim->Instance->CR1 |= TIM_OPMODE_SINGLE;
  231. }
  232. else
  233. {
  234. tim->Instance->CR1 &= (~TIM_OPMODE_SINGLE);
  235. }
  236. /* start timer */
  237. if (HAL_TIM_Base_Start_IT(tim) != HAL_OK)
  238. {
  239. LOG_E("TIM start failed");
  240. result = -RT_ERROR;
  241. }
  242. return result;
  243. }
  244. static void timer_stop(rt_hwtimer_t *timer)
  245. {
  246. TIM_HandleTypeDef *tim = RT_NULL;
  247. RT_ASSERT(timer != RT_NULL);
  248. tim = (TIM_HandleTypeDef *)timer->parent.user_data;
  249. /* stop timer */
  250. HAL_TIM_Base_Stop_IT(tim);
  251. /* set tim cnt */
  252. __HAL_TIM_SET_COUNTER(tim, 0);
  253. }
  254. static rt_err_t timer_ctrl(rt_hwtimer_t *timer, rt_uint32_t cmd, void *arg)
  255. {
  256. TIM_HandleTypeDef *tim = RT_NULL;
  257. rt_err_t result = RT_EOK;
  258. uint32_t pclk1_doubler, pclk2_doubler;
  259. RT_ASSERT(timer != RT_NULL);
  260. RT_ASSERT(arg != RT_NULL);
  261. tim = (TIM_HandleTypeDef *)timer->parent.user_data;
  262. switch (cmd)
  263. {
  264. case HWTIMER_CTRL_FREQ_SET:
  265. {
  266. rt_uint32_t freq;
  267. rt_uint16_t val;
  268. /* set timer frequence */
  269. freq = *((rt_uint32_t *)arg);
  270. pclkx_doubler_get(&pclk1_doubler, &pclk2_doubler);
  271. #if defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
  272. if (tim->Instance == TIM9 || tim->Instance == TIM10 || tim->Instance == TIM11)
  273. #elif defined(SOC_SERIES_STM32L4)
  274. if (tim->Instance == TIM15 || tim->Instance == TIM16 || tim->Instance == TIM17)
  275. #elif defined(SOC_SERIES_STM32MP1)
  276. if(tim->Instance == TIM14 || tim->Instance == TIM16 || tim->Instance == TIM17)
  277. #elif defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32G0)
  278. if (0)
  279. #endif
  280. {
  281. #if !defined(SOC_SERIES_STM32F0) && !defined(SOC_SERIES_STM32G0)
  282. val = HAL_RCC_GetPCLK2Freq() * pclk2_doubler / freq;
  283. #endif
  284. }
  285. else
  286. {
  287. val = HAL_RCC_GetPCLK1Freq() * pclk1_doubler / freq;
  288. }
  289. __HAL_TIM_SET_PRESCALER(tim, val - 1);
  290. /* Update frequency value */
  291. tim->Instance->EGR |= TIM_EVENTSOURCE_UPDATE;
  292. }
  293. break;
  294. default:
  295. {
  296. result = -RT_ENOSYS;
  297. }
  298. break;
  299. }
  300. return result;
  301. }
  302. static rt_uint32_t timer_counter_get(rt_hwtimer_t *timer)
  303. {
  304. TIM_HandleTypeDef *tim = RT_NULL;
  305. RT_ASSERT(timer != RT_NULL);
  306. tim = (TIM_HandleTypeDef *)timer->parent.user_data;
  307. return tim->Instance->CNT;
  308. }
  309. static const struct rt_hwtimer_info _info = TIM_DEV_INFO_CONFIG;
  310. static const struct rt_hwtimer_ops _ops =
  311. {
  312. .init = timer_init,
  313. .start = timer_start,
  314. .stop = timer_stop,
  315. .count_get = timer_counter_get,
  316. .control = timer_ctrl,
  317. };
  318. #ifdef BSP_USING_TIM2
  319. void TIM2_IRQHandler(void)
  320. {
  321. /* enter interrupt */
  322. rt_interrupt_enter();
  323. HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM2_INDEX].tim_handle);
  324. /* leave interrupt */
  325. rt_interrupt_leave();
  326. }
  327. #endif
  328. #ifdef BSP_USING_TIM3
  329. void TIM3_IRQHandler(void)
  330. {
  331. /* enter interrupt */
  332. rt_interrupt_enter();
  333. HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM3_INDEX].tim_handle);
  334. /* leave interrupt */
  335. rt_interrupt_leave();
  336. }
  337. #endif
  338. #ifdef BSP_USING_TIM4
  339. void TIM4_IRQHandler(void)
  340. {
  341. /* enter interrupt */
  342. rt_interrupt_enter();
  343. HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM4_INDEX].tim_handle);
  344. /* leave interrupt */
  345. rt_interrupt_leave();
  346. }
  347. #endif
  348. #ifdef BSP_USING_TIM5
  349. void TIM5_IRQHandler(void)
  350. {
  351. /* enter interrupt */
  352. rt_interrupt_enter();
  353. HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM5_INDEX].tim_handle);
  354. /* leave interrupt */
  355. rt_interrupt_leave();
  356. }
  357. #endif
  358. #ifdef BSP_USING_TIM11
  359. void TIM1_TRG_COM_TIM11_IRQHandler(void)
  360. {
  361. /* enter interrupt */
  362. rt_interrupt_enter();
  363. HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM11_INDEX].tim_handle);
  364. /* leave interrupt */
  365. rt_interrupt_leave();
  366. }
  367. #endif
  368. #ifdef BSP_USING_TIM13
  369. void TIM8_UP_TIM13_IRQHandler(void)
  370. {
  371. /* enter interrupt */
  372. rt_interrupt_enter();
  373. HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM13_INDEX].tim_handle);
  374. /* leave interrupt */
  375. rt_interrupt_leave();
  376. }
  377. #endif
  378. #ifdef BSP_USING_TIM14
  379. #if defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
  380. void TIM8_TRG_COM_TIM14_IRQHandler(void)
  381. #elif defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32MP1)
  382. void TIM14_IRQHandler(void)
  383. #endif
  384. {
  385. /* enter interrupt */
  386. rt_interrupt_enter();
  387. HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM14_INDEX].tim_handle);
  388. /* leave interrupt */
  389. rt_interrupt_leave();
  390. }
  391. #endif
  392. #ifdef BSP_USING_TIM15
  393. void TIM1_BRK_TIM15_IRQHandler(void)
  394. {
  395. /* enter interrupt */
  396. rt_interrupt_enter();
  397. HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM15_INDEX].tim_handle);
  398. /* leave interrupt */
  399. rt_interrupt_leave();
  400. }
  401. #endif
  402. #ifdef BSP_USING_TIM16
  403. #if defined(SOC_SERIES_STM32L4)
  404. void TIM1_UP_TIM16_IRQHandler(void)
  405. #elif defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32MP1)
  406. void TIM16_IRQHandler(void)
  407. #endif
  408. {
  409. /* enter interrupt */
  410. rt_interrupt_enter();
  411. HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM16_INDEX].tim_handle);
  412. /* leave interrupt */
  413. rt_interrupt_leave();
  414. }
  415. #endif
  416. #ifdef BSP_USING_TIM17
  417. #if defined(SOC_SERIES_STM32L4)
  418. void TIM1_TRG_COM_TIM17_IRQHandler(void)
  419. #elif defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32MP1)
  420. void TIM17_IRQHandler(void)
  421. #endif
  422. {
  423. /* enter interrupt */
  424. rt_interrupt_enter();
  425. HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM17_INDEX].tim_handle);
  426. /* leave interrupt */
  427. rt_interrupt_leave();
  428. }
  429. #endif
  430. void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
  431. {
  432. #ifdef BSP_USING_TIM2
  433. if (htim->Instance == TIM2)
  434. {
  435. rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM2_INDEX].time_device);
  436. }
  437. #endif
  438. #ifdef BSP_USING_TIM3
  439. if (htim->Instance == TIM3)
  440. {
  441. rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM3_INDEX].time_device);
  442. }
  443. #endif
  444. #ifdef BSP_USING_TIM4
  445. if (htim->Instance == TIM4)
  446. {
  447. rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM4_INDEX].time_device);
  448. }
  449. #endif
  450. #ifdef BSP_USING_TIM5
  451. if (htim->Instance == TIM5)
  452. {
  453. rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM5_INDEX].time_device);
  454. }
  455. #endif
  456. #ifdef BSP_USING_TIM11
  457. if (htim->Instance == TIM11)
  458. {
  459. rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM11_INDEX].time_device);
  460. }
  461. #endif
  462. #ifdef BSP_USING_TIM13
  463. if (htim->Instance == TIM13)
  464. {
  465. rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM13_INDEX].time_device);
  466. }
  467. #endif
  468. #ifdef BSP_USING_TIM14
  469. if (htim->Instance == TIM14)
  470. {
  471. rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM14_INDEX].time_device);
  472. }
  473. #endif
  474. #ifdef BSP_USING_TIM15
  475. if (htim->Instance == TIM15)
  476. {
  477. rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM15_INDEX].time_device);
  478. }
  479. #endif
  480. #ifdef BSP_USING_TIM16
  481. if (htim->Instance == TIM16)
  482. {
  483. rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM16_INDEX].time_device);
  484. }
  485. #endif
  486. #ifdef BSP_USING_TIM17
  487. if (htim->Instance == TIM17)
  488. {
  489. rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM17_INDEX].time_device);
  490. }
  491. #endif
  492. }
  493. static int stm32_hwtimer_init(void)
  494. {
  495. int i = 0;
  496. int result = RT_EOK;
  497. for (i = 0; i < sizeof(stm32_hwtimer_obj) / sizeof(stm32_hwtimer_obj[0]); i++)
  498. {
  499. stm32_hwtimer_obj[i].time_device.info = &_info;
  500. stm32_hwtimer_obj[i].time_device.ops = &_ops;
  501. if (rt_device_hwtimer_register(&stm32_hwtimer_obj[i].time_device, stm32_hwtimer_obj[i].name, &stm32_hwtimer_obj[i].tim_handle) == RT_EOK)
  502. {
  503. LOG_D("%s register success", stm32_hwtimer_obj[i].name);
  504. }
  505. else
  506. {
  507. LOG_E("%s register failed", stm32_hwtimer_obj[i].name);
  508. result = -RT_ERROR;
  509. }
  510. }
  511. return result;
  512. }
  513. INIT_BOARD_EXPORT(stm32_hwtimer_init);
  514. #endif /* RT_USING_HWTIMER */
  515. #endif /* BSP_USING_TIM */