drv_usart.c 31 KB

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  1. /*
  2. * Copyright (c) 2006-2018, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2018-10-30 SummerGift first version
  9. * 2020-03-16 SummerGift add device close feature
  10. * 2020-03-20 SummerGift fix bug caused by ORE
  11. * 2020-05-02 whj4674672 support stm32h7 uart dma
  12. */
  13. #include "board.h"
  14. #include "drv_usart.h"
  15. #include "drv_config.h"
  16. #ifdef RT_USING_SERIAL
  17. //#define DRV_DEBUG
  18. #define LOG_TAG "drv.usart"
  19. #include <drv_log.h>
  20. #if !defined(BSP_USING_UART1) && !defined(BSP_USING_UART2) && !defined(BSP_USING_UART3) && \
  21. !defined(BSP_USING_UART4) && !defined(BSP_USING_UART5) && !defined(BSP_USING_UART6) && \
  22. !defined(BSP_USING_UART7) && !defined(BSP_USING_UART8) && !defined(BSP_USING_LPUART1)
  23. #error "Please define at least one BSP_USING_UARTx"
  24. /* this driver can be disabled at menuconfig -> RT-Thread Components -> Device Drivers */
  25. #endif
  26. #ifdef RT_SERIAL_USING_DMA
  27. static void stm32_dma_config(struct rt_serial_device *serial, rt_ubase_t flag);
  28. #endif
  29. enum
  30. {
  31. #ifdef BSP_USING_UART1
  32. UART1_INDEX,
  33. #endif
  34. #ifdef BSP_USING_UART2
  35. UART2_INDEX,
  36. #endif
  37. #ifdef BSP_USING_UART3
  38. UART3_INDEX,
  39. #endif
  40. #ifdef BSP_USING_UART4
  41. UART4_INDEX,
  42. #endif
  43. #ifdef BSP_USING_UART5
  44. UART5_INDEX,
  45. #endif
  46. #ifdef BSP_USING_UART6
  47. UART6_INDEX,
  48. #endif
  49. #ifdef BSP_USING_UART7
  50. UART7_INDEX,
  51. #endif
  52. #ifdef BSP_USING_UART8
  53. UART8_INDEX,
  54. #endif
  55. #ifdef BSP_USING_LPUART1
  56. LPUART1_INDEX,
  57. #endif
  58. };
  59. static struct stm32_uart_config uart_config[] =
  60. {
  61. #ifdef BSP_USING_UART1
  62. UART1_CONFIG,
  63. #endif
  64. #ifdef BSP_USING_UART2
  65. UART2_CONFIG,
  66. #endif
  67. #ifdef BSP_USING_UART3
  68. UART3_CONFIG,
  69. #endif
  70. #ifdef BSP_USING_UART4
  71. UART4_CONFIG,
  72. #endif
  73. #ifdef BSP_USING_UART5
  74. UART5_CONFIG,
  75. #endif
  76. #ifdef BSP_USING_UART6
  77. UART6_CONFIG,
  78. #endif
  79. #ifdef BSP_USING_UART7
  80. UART7_CONFIG,
  81. #endif
  82. #ifdef BSP_USING_UART8
  83. UART8_CONFIG,
  84. #endif
  85. #ifdef BSP_USING_LPUART1
  86. LPUART1_CONFIG,
  87. #endif
  88. };
  89. static struct stm32_uart uart_obj[sizeof(uart_config) / sizeof(uart_config[0])] = {0};
  90. static rt_err_t stm32_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
  91. {
  92. struct stm32_uart *uart;
  93. RT_ASSERT(serial != RT_NULL);
  94. RT_ASSERT(cfg != RT_NULL);
  95. uart = rt_container_of(serial, struct stm32_uart, serial);
  96. uart->handle.Instance = uart->config->Instance;
  97. uart->handle.Init.BaudRate = cfg->baud_rate;
  98. uart->handle.Init.HwFlowCtl = UART_HWCONTROL_NONE;
  99. uart->handle.Init.Mode = UART_MODE_TX_RX;
  100. uart->handle.Init.OverSampling = UART_OVERSAMPLING_16;
  101. switch (cfg->data_bits)
  102. {
  103. case DATA_BITS_8:
  104. uart->handle.Init.WordLength = UART_WORDLENGTH_8B;
  105. break;
  106. case DATA_BITS_9:
  107. uart->handle.Init.WordLength = UART_WORDLENGTH_9B;
  108. break;
  109. default:
  110. uart->handle.Init.WordLength = UART_WORDLENGTH_8B;
  111. break;
  112. }
  113. switch (cfg->stop_bits)
  114. {
  115. case STOP_BITS_1:
  116. uart->handle.Init.StopBits = UART_STOPBITS_1;
  117. break;
  118. case STOP_BITS_2:
  119. uart->handle.Init.StopBits = UART_STOPBITS_2;
  120. break;
  121. default:
  122. uart->handle.Init.StopBits = UART_STOPBITS_1;
  123. break;
  124. }
  125. switch (cfg->parity)
  126. {
  127. case PARITY_NONE:
  128. uart->handle.Init.Parity = UART_PARITY_NONE;
  129. break;
  130. case PARITY_ODD:
  131. uart->handle.Init.Parity = UART_PARITY_ODD;
  132. break;
  133. case PARITY_EVEN:
  134. uart->handle.Init.Parity = UART_PARITY_EVEN;
  135. break;
  136. default:
  137. uart->handle.Init.Parity = UART_PARITY_NONE;
  138. break;
  139. }
  140. #ifdef RT_SERIAL_USING_DMA
  141. uart->dma_rx.last_index = 0;
  142. #endif
  143. if (HAL_UART_Init(&uart->handle) != HAL_OK)
  144. {
  145. return -RT_ERROR;
  146. }
  147. return RT_EOK;
  148. }
  149. static rt_err_t stm32_control(struct rt_serial_device *serial, int cmd, void *arg)
  150. {
  151. struct stm32_uart *uart;
  152. #ifdef RT_SERIAL_USING_DMA
  153. rt_ubase_t ctrl_arg = (rt_ubase_t)arg;
  154. #endif
  155. RT_ASSERT(serial != RT_NULL);
  156. uart = rt_container_of(serial, struct stm32_uart, serial);
  157. switch (cmd)
  158. {
  159. /* disable interrupt */
  160. case RT_DEVICE_CTRL_CLR_INT:
  161. /* disable rx irq */
  162. NVIC_DisableIRQ(uart->config->irq_type);
  163. /* disable interrupt */
  164. __HAL_UART_DISABLE_IT(&(uart->handle), UART_IT_RXNE);
  165. #ifdef RT_SERIAL_USING_DMA
  166. /* disable DMA */
  167. if (ctrl_arg == RT_DEVICE_FLAG_DMA_RX)
  168. {
  169. HAL_NVIC_DisableIRQ(uart->config->dma_rx->dma_irq);
  170. if (HAL_DMA_Abort(&(uart->dma_rx.handle)) != HAL_OK)
  171. {
  172. RT_ASSERT(0);
  173. }
  174. if (HAL_DMA_DeInit(&(uart->dma_rx.handle)) != HAL_OK)
  175. {
  176. RT_ASSERT(0);
  177. }
  178. }
  179. else if(ctrl_arg == RT_DEVICE_FLAG_DMA_TX)
  180. {
  181. HAL_NVIC_DisableIRQ(uart->config->dma_tx->dma_irq);
  182. if (HAL_DMA_DeInit(&(uart->dma_tx.handle)) != HAL_OK)
  183. {
  184. RT_ASSERT(0);
  185. }
  186. }
  187. #endif
  188. break;
  189. /* enable interrupt */
  190. case RT_DEVICE_CTRL_SET_INT:
  191. /* enable rx irq */
  192. HAL_NVIC_SetPriority(uart->config->irq_type, 1, 0);
  193. HAL_NVIC_EnableIRQ(uart->config->irq_type);
  194. /* enable interrupt */
  195. __HAL_UART_ENABLE_IT(&(uart->handle), UART_IT_RXNE);
  196. break;
  197. #ifdef RT_SERIAL_USING_DMA
  198. case RT_DEVICE_CTRL_CONFIG:
  199. stm32_dma_config(serial, ctrl_arg);
  200. break;
  201. #endif
  202. case RT_DEVICE_CTRL_CLOSE:
  203. if (HAL_UART_DeInit(&(uart->handle)) != HAL_OK )
  204. {
  205. RT_ASSERT(0)
  206. }
  207. break;
  208. }
  209. return RT_EOK;
  210. }
  211. static int stm32_putc(struct rt_serial_device *serial, char c)
  212. {
  213. struct stm32_uart *uart;
  214. RT_ASSERT(serial != RT_NULL);
  215. uart = rt_container_of(serial, struct stm32_uart, serial);
  216. UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_TC);
  217. #if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32F0) \
  218. || defined(SOC_SERIES_STM32L0) || defined(SOC_SERIES_STM32G0) || defined(SOC_SERIES_STM32H7) \
  219. || defined(SOC_SERIES_STM32G4) || defined(SOC_SERIES_STM32MP1)
  220. uart->handle.Instance->TDR = c;
  221. #else
  222. uart->handle.Instance->DR = c;
  223. #endif
  224. while (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_TC) == RESET);
  225. return 1;
  226. }
  227. static int stm32_getc(struct rt_serial_device *serial)
  228. {
  229. int ch;
  230. struct stm32_uart *uart;
  231. RT_ASSERT(serial != RT_NULL);
  232. uart = rt_container_of(serial, struct stm32_uart, serial);
  233. ch = -1;
  234. if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_RXNE) != RESET)
  235. {
  236. #if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32F0) \
  237. || defined(SOC_SERIES_STM32L0) || defined(SOC_SERIES_STM32G0) || defined(SOC_SERIES_STM32H7) \
  238. || defined(SOC_SERIES_STM32G4) || defined(SOC_SERIES_STM32MP1)
  239. ch = uart->handle.Instance->RDR & 0xff;
  240. #else
  241. ch = uart->handle.Instance->DR & 0xff;
  242. #endif
  243. }
  244. return ch;
  245. }
  246. static rt_size_t stm32_dma_transmit(struct rt_serial_device *serial, rt_uint8_t *buf, rt_size_t size, int direction)
  247. {
  248. struct stm32_uart *uart;
  249. RT_ASSERT(serial != RT_NULL);
  250. RT_ASSERT(buf != RT_NULL);
  251. uart = rt_container_of(serial, struct stm32_uart, serial);
  252. if (size == 0)
  253. {
  254. return 0;
  255. }
  256. if (RT_SERIAL_DMA_TX == direction)
  257. {
  258. if (HAL_UART_Transmit_DMA(&uart->handle, buf, size) == HAL_OK)
  259. {
  260. return size;
  261. }
  262. else
  263. {
  264. return 0;
  265. }
  266. }
  267. return 0;
  268. }
  269. /**
  270. * Uart common interrupt process. This need add to uart ISR.
  271. *
  272. * @param serial serial device
  273. */
  274. static void uart_isr(struct rt_serial_device *serial)
  275. {
  276. struct stm32_uart *uart;
  277. #ifdef RT_SERIAL_USING_DMA
  278. rt_size_t recv_total_index, recv_len;
  279. rt_base_t level;
  280. #endif
  281. RT_ASSERT(serial != RT_NULL);
  282. uart = rt_container_of(serial, struct stm32_uart, serial);
  283. /* UART in mode Receiver -------------------------------------------------*/
  284. if ((__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_RXNE) != RESET) &&
  285. (__HAL_UART_GET_IT_SOURCE(&(uart->handle), UART_IT_RXNE) != RESET))
  286. {
  287. rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND);
  288. }
  289. #ifdef RT_SERIAL_USING_DMA
  290. else if ((uart->uart_dma_flag) && (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_IDLE) != RESET)
  291. && (__HAL_UART_GET_IT_SOURCE(&(uart->handle), UART_IT_IDLE) != RESET))
  292. {
  293. level = rt_hw_interrupt_disable();
  294. recv_total_index = serial->config.bufsz - __HAL_DMA_GET_COUNTER(&(uart->dma_rx.handle));
  295. recv_len = recv_total_index - uart->dma_rx.last_index;
  296. uart->dma_rx.last_index = recv_total_index;
  297. rt_hw_interrupt_enable(level);
  298. if (recv_len)
  299. {
  300. rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_DMADONE | (recv_len << 8));
  301. }
  302. __HAL_UART_CLEAR_IDLEFLAG(&uart->handle);
  303. }
  304. else if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_TC) &&
  305. (__HAL_UART_GET_IT_SOURCE(&(uart->handle), UART_IT_TC) != RESET))
  306. {
  307. if ((serial->parent.open_flag & RT_DEVICE_FLAG_DMA_TX) != 0)
  308. {
  309. HAL_UART_IRQHandler(&(uart->handle));
  310. }
  311. UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_TC);
  312. }
  313. #endif
  314. else
  315. {
  316. if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_ORE) != RESET)
  317. {
  318. __HAL_UART_CLEAR_OREFLAG(&uart->handle);
  319. }
  320. if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_NE) != RESET)
  321. {
  322. __HAL_UART_CLEAR_NEFLAG(&uart->handle);
  323. }
  324. if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_FE) != RESET)
  325. {
  326. __HAL_UART_CLEAR_FEFLAG(&uart->handle);
  327. }
  328. if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_PE) != RESET)
  329. {
  330. __HAL_UART_CLEAR_PEFLAG(&uart->handle);
  331. }
  332. #if !defined(SOC_SERIES_STM32L4) && !defined(SOC_SERIES_STM32F7) && !defined(SOC_SERIES_STM32F0) \
  333. && !defined(SOC_SERIES_STM32L0) && !defined(SOC_SERIES_STM32G0) && !defined(SOC_SERIES_STM32H7) \
  334. && !defined(SOC_SERIES_STM32G4) && !defined(SOC_SERIES_STM32MP1)
  335. if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_LBD) != RESET)
  336. {
  337. UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_LBD);
  338. }
  339. #endif
  340. if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_CTS) != RESET)
  341. {
  342. UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_CTS);
  343. }
  344. if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_TXE) != RESET)
  345. {
  346. UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_TXE);
  347. }
  348. if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_TC) != RESET)
  349. {
  350. UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_TC);
  351. }
  352. if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_RXNE) != RESET)
  353. {
  354. UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_RXNE);
  355. }
  356. }
  357. }
  358. #ifdef RT_SERIAL_USING_DMA
  359. static void dma_isr(struct rt_serial_device *serial)
  360. {
  361. struct stm32_uart *uart;
  362. rt_size_t recv_total_index, recv_len;
  363. rt_base_t level;
  364. RT_ASSERT(serial != RT_NULL);
  365. uart = rt_container_of(serial, struct stm32_uart, serial);
  366. if ((__HAL_DMA_GET_IT_SOURCE(&(uart->dma_rx.handle), DMA_IT_TC) != RESET) ||
  367. (__HAL_DMA_GET_IT_SOURCE(&(uart->dma_rx.handle), DMA_IT_HT) != RESET))
  368. {
  369. level = rt_hw_interrupt_disable();
  370. recv_total_index = serial->config.bufsz - __HAL_DMA_GET_COUNTER(&(uart->dma_rx.handle));
  371. if (recv_total_index == 0)
  372. {
  373. recv_len = serial->config.bufsz - uart->dma_rx.last_index;
  374. }
  375. else
  376. {
  377. recv_len = recv_total_index - uart->dma_rx.last_index;
  378. }
  379. uart->dma_rx.last_index = recv_total_index;
  380. rt_hw_interrupt_enable(level);
  381. if (recv_len)
  382. {
  383. rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_DMADONE | (recv_len << 8));
  384. }
  385. }
  386. }
  387. #endif
  388. #if defined(BSP_USING_UART1)
  389. void USART1_IRQHandler(void)
  390. {
  391. /* enter interrupt */
  392. rt_interrupt_enter();
  393. uart_isr(&(uart_obj[UART1_INDEX].serial));
  394. /* leave interrupt */
  395. rt_interrupt_leave();
  396. }
  397. #if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART1_RX_USING_DMA)
  398. void UART1_DMA_RX_IRQHandler(void)
  399. {
  400. /* enter interrupt */
  401. rt_interrupt_enter();
  402. HAL_DMA_IRQHandler(&uart_obj[UART1_INDEX].dma_rx.handle);
  403. /* leave interrupt */
  404. rt_interrupt_leave();
  405. }
  406. #endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART1_RX_USING_DMA) */
  407. #if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART1_TX_USING_DMA)
  408. void UART1_DMA_TX_IRQHandler(void)
  409. {
  410. /* enter interrupt */
  411. rt_interrupt_enter();
  412. HAL_DMA_IRQHandler(&uart_obj[UART1_INDEX].dma_tx.handle);
  413. /* leave interrupt */
  414. rt_interrupt_leave();
  415. }
  416. #endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART1_TX_USING_DMA) */
  417. #endif /* BSP_USING_UART1 */
  418. #if defined(BSP_USING_UART2)
  419. void USART2_IRQHandler(void)
  420. {
  421. /* enter interrupt */
  422. rt_interrupt_enter();
  423. uart_isr(&(uart_obj[UART2_INDEX].serial));
  424. /* leave interrupt */
  425. rt_interrupt_leave();
  426. }
  427. #if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART2_RX_USING_DMA)
  428. void UART2_DMA_RX_IRQHandler(void)
  429. {
  430. /* enter interrupt */
  431. rt_interrupt_enter();
  432. HAL_DMA_IRQHandler(&uart_obj[UART2_INDEX].dma_rx.handle);
  433. /* leave interrupt */
  434. rt_interrupt_leave();
  435. }
  436. #endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART2_RX_USING_DMA) */
  437. #if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART2_TX_USING_DMA)
  438. void UART2_DMA_TX_IRQHandler(void)
  439. {
  440. /* enter interrupt */
  441. rt_interrupt_enter();
  442. HAL_DMA_IRQHandler(&uart_obj[UART2_INDEX].dma_tx.handle);
  443. /* leave interrupt */
  444. rt_interrupt_leave();
  445. }
  446. #endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART2_TX_USING_DMA) */
  447. #endif /* BSP_USING_UART2 */
  448. #if defined(BSP_USING_UART3)
  449. void USART3_IRQHandler(void)
  450. {
  451. /* enter interrupt */
  452. rt_interrupt_enter();
  453. uart_isr(&(uart_obj[UART3_INDEX].serial));
  454. /* leave interrupt */
  455. rt_interrupt_leave();
  456. }
  457. #if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART3_RX_USING_DMA)
  458. void UART3_DMA_RX_IRQHandler(void)
  459. {
  460. /* enter interrupt */
  461. rt_interrupt_enter();
  462. HAL_DMA_IRQHandler(&uart_obj[UART3_INDEX].dma_rx.handle);
  463. /* leave interrupt */
  464. rt_interrupt_leave();
  465. }
  466. #endif /* defined(BSP_UART_USING_DMA_RX) && defined(BSP_UART3_RX_USING_DMA) */
  467. #if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART3_TX_USING_DMA)
  468. void UART3_DMA_TX_IRQHandler(void)
  469. {
  470. /* enter interrupt */
  471. rt_interrupt_enter();
  472. HAL_DMA_IRQHandler(&uart_obj[UART3_INDEX].dma_tx.handle);
  473. /* leave interrupt */
  474. rt_interrupt_leave();
  475. }
  476. #endif /* defined(BSP_UART_USING_DMA_TX) && defined(BSP_UART3_TX_USING_DMA) */
  477. #endif /* BSP_USING_UART3*/
  478. #if defined(BSP_USING_UART4)
  479. void UART4_IRQHandler(void)
  480. {
  481. /* enter interrupt */
  482. rt_interrupt_enter();
  483. uart_isr(&(uart_obj[UART4_INDEX].serial));
  484. /* leave interrupt */
  485. rt_interrupt_leave();
  486. }
  487. #if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART4_RX_USING_DMA)
  488. void UART4_DMA_RX_IRQHandler(void)
  489. {
  490. /* enter interrupt */
  491. rt_interrupt_enter();
  492. HAL_DMA_IRQHandler(&uart_obj[UART4_INDEX].dma_rx.handle);
  493. /* leave interrupt */
  494. rt_interrupt_leave();
  495. }
  496. #endif /* defined(BSP_UART_USING_DMA_RX) && defined(BSP_UART4_RX_USING_DMA) */
  497. #if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART4_TX_USING_DMA)
  498. void UART4_DMA_TX_IRQHandler(void)
  499. {
  500. /* enter interrupt */
  501. rt_interrupt_enter();
  502. HAL_DMA_IRQHandler(&uart_obj[UART4_INDEX].dma_tx.handle);
  503. /* leave interrupt */
  504. rt_interrupt_leave();
  505. }
  506. #endif /* defined(BSP_UART_USING_DMA_TX) && defined(BSP_UART4_TX_USING_DMA) */
  507. #endif /* BSP_USING_UART4*/
  508. #if defined(BSP_USING_UART5)
  509. void UART5_IRQHandler(void)
  510. {
  511. /* enter interrupt */
  512. rt_interrupt_enter();
  513. uart_isr(&(uart_obj[UART5_INDEX].serial));
  514. /* leave interrupt */
  515. rt_interrupt_leave();
  516. }
  517. #if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART5_RX_USING_DMA)
  518. void UART5_DMA_RX_IRQHandler(void)
  519. {
  520. /* enter interrupt */
  521. rt_interrupt_enter();
  522. HAL_DMA_IRQHandler(&uart_obj[UART5_INDEX].dma_rx.handle);
  523. /* leave interrupt */
  524. rt_interrupt_leave();
  525. }
  526. #endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART5_RX_USING_DMA) */
  527. #if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART5_TX_USING_DMA)
  528. void UART5_DMA_TX_IRQHandler(void)
  529. {
  530. /* enter interrupt */
  531. rt_interrupt_enter();
  532. HAL_DMA_IRQHandler(&uart_obj[UART5_INDEX].dma_tx.handle);
  533. /* leave interrupt */
  534. rt_interrupt_leave();
  535. }
  536. #endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART5_TX_USING_DMA) */
  537. #endif /* BSP_USING_UART5*/
  538. #if defined(BSP_USING_UART6)
  539. void USART6_IRQHandler(void)
  540. {
  541. /* enter interrupt */
  542. rt_interrupt_enter();
  543. uart_isr(&(uart_obj[UART6_INDEX].serial));
  544. /* leave interrupt */
  545. rt_interrupt_leave();
  546. }
  547. #if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART6_RX_USING_DMA)
  548. void UART6_DMA_RX_IRQHandler(void)
  549. {
  550. /* enter interrupt */
  551. rt_interrupt_enter();
  552. HAL_DMA_IRQHandler(&uart_obj[UART6_INDEX].dma_rx.handle);
  553. /* leave interrupt */
  554. rt_interrupt_leave();
  555. }
  556. #endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART6_RX_USING_DMA) */
  557. #if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART6_TX_USING_DMA)
  558. void UART6_DMA_TX_IRQHandler(void)
  559. {
  560. /* enter interrupt */
  561. rt_interrupt_enter();
  562. HAL_DMA_IRQHandler(&uart_obj[UART6_INDEX].dma_tx.handle);
  563. /* leave interrupt */
  564. rt_interrupt_leave();
  565. }
  566. #endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART6_TX_USING_DMA) */
  567. #endif /* BSP_USING_UART6*/
  568. #if defined(BSP_USING_UART7)
  569. void UART7_IRQHandler(void)
  570. {
  571. /* enter interrupt */
  572. rt_interrupt_enter();
  573. uart_isr(&(uart_obj[UART7_INDEX].serial));
  574. /* leave interrupt */
  575. rt_interrupt_leave();
  576. }
  577. #if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART7_RX_USING_DMA)
  578. void UART7_DMA_RX_IRQHandler(void)
  579. {
  580. /* enter interrupt */
  581. rt_interrupt_enter();
  582. HAL_DMA_IRQHandler(&uart_obj[UART7_INDEX].dma_rx.handle);
  583. /* leave interrupt */
  584. rt_interrupt_leave();
  585. }
  586. #endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART7_RX_USING_DMA) */
  587. #if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART7_TX_USING_DMA)
  588. void UART7_DMA_TX_IRQHandler(void)
  589. {
  590. /* enter interrupt */
  591. rt_interrupt_enter();
  592. HAL_DMA_IRQHandler(&uart_obj[UART7_INDEX].dma_tx.handle);
  593. /* leave interrupt */
  594. rt_interrupt_leave();
  595. }
  596. #endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART7_TX_USING_DMA) */
  597. #endif /* BSP_USING_UART7*/
  598. #if defined(BSP_USING_UART8)
  599. void UART8_IRQHandler(void)
  600. {
  601. /* enter interrupt */
  602. rt_interrupt_enter();
  603. uart_isr(&(uart_obj[UART8_INDEX].serial));
  604. /* leave interrupt */
  605. rt_interrupt_leave();
  606. }
  607. #if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART8_RX_USING_DMA)
  608. void UART8_DMA_RX_IRQHandler(void)
  609. {
  610. /* enter interrupt */
  611. rt_interrupt_enter();
  612. HAL_DMA_IRQHandler(&uart_obj[UART8_INDEX].dma_rx.handle);
  613. /* leave interrupt */
  614. rt_interrupt_leave();
  615. }
  616. #endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART8_RX_USING_DMA) */
  617. #if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART8_TX_USING_DMA)
  618. void UART8_DMA_TX_IRQHandler(void)
  619. {
  620. /* enter interrupt */
  621. rt_interrupt_enter();
  622. HAL_DMA_IRQHandler(&uart_obj[UART8_INDEX].dma_tx.handle);
  623. /* leave interrupt */
  624. rt_interrupt_leave();
  625. }
  626. #endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART8_TX_USING_DMA) */
  627. #endif /* BSP_USING_UART8*/
  628. #if defined(BSP_USING_LPUART1)
  629. void LPUART1_IRQHandler(void)
  630. {
  631. /* enter interrupt */
  632. rt_interrupt_enter();
  633. uart_isr(&(uart_obj[LPUART1_INDEX].serial));
  634. /* leave interrupt */
  635. rt_interrupt_leave();
  636. }
  637. #if defined(RT_SERIAL_USING_DMA) && defined(BSP_LPUART1_RX_USING_DMA)
  638. void LPUART1_DMA_RX_IRQHandler(void)
  639. {
  640. /* enter interrupt */
  641. rt_interrupt_enter();
  642. HAL_DMA_IRQHandler(&uart_obj[LPUART1_INDEX].dma_rx.handle);
  643. /* leave interrupt */
  644. rt_interrupt_leave();
  645. }
  646. #endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_LPUART1_RX_USING_DMA) */
  647. #endif /* BSP_USING_LPUART1*/
  648. static void stm32_uart_get_dma_config(void)
  649. {
  650. #ifdef BSP_USING_UART1
  651. uart_obj[UART1_INDEX].uart_dma_flag = 0;
  652. #ifdef BSP_UART1_RX_USING_DMA
  653. uart_obj[UART1_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_RX;
  654. static struct dma_config uart1_dma_rx = UART1_DMA_RX_CONFIG;
  655. uart_config[UART1_INDEX].dma_rx = &uart1_dma_rx;
  656. #endif
  657. #ifdef BSP_UART1_TX_USING_DMA
  658. uart_obj[UART1_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_TX;
  659. static struct dma_config uart1_dma_tx = UART1_DMA_TX_CONFIG;
  660. uart_config[UART1_INDEX].dma_tx = &uart1_dma_tx;
  661. #endif
  662. #endif
  663. #ifdef BSP_USING_UART2
  664. uart_obj[UART2_INDEX].uart_dma_flag = 0;
  665. #ifdef BSP_UART2_RX_USING_DMA
  666. uart_obj[UART2_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_RX;
  667. static struct dma_config uart2_dma_rx = UART2_DMA_RX_CONFIG;
  668. uart_config[UART2_INDEX].dma_rx = &uart2_dma_rx;
  669. #endif
  670. #ifdef BSP_UART2_TX_USING_DMA
  671. uart_obj[UART2_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_TX;
  672. static struct dma_config uart2_dma_tx = UART2_DMA_TX_CONFIG;
  673. uart_config[UART2_INDEX].dma_tx = &uart2_dma_tx;
  674. #endif
  675. #endif
  676. #ifdef BSP_USING_UART3
  677. uart_obj[UART3_INDEX].uart_dma_flag = 0;
  678. #ifdef BSP_UART3_RX_USING_DMA
  679. uart_obj[UART3_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_RX;
  680. static struct dma_config uart3_dma_rx = UART3_DMA_RX_CONFIG;
  681. uart_config[UART3_INDEX].dma_rx = &uart3_dma_rx;
  682. #endif
  683. #ifdef BSP_UART3_TX_USING_DMA
  684. uart_obj[UART3_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_TX;
  685. static struct dma_config uart3_dma_tx = UART3_DMA_TX_CONFIG;
  686. uart_config[UART3_INDEX].dma_tx = &uart3_dma_tx;
  687. #endif
  688. #endif
  689. #ifdef BSP_USING_UART4
  690. uart_obj[UART4_INDEX].uart_dma_flag = 0;
  691. #ifdef BSP_UART4_RX_USING_DMA
  692. uart_obj[UART4_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_RX;
  693. static struct dma_config uart4_dma_rx = UART4_DMA_RX_CONFIG;
  694. uart_config[UART4_INDEX].dma_rx = &uart4_dma_rx;
  695. #endif
  696. #ifdef BSP_UART4_TX_USING_DMA
  697. uart_obj[UART4_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_TX;
  698. static struct dma_config uart4_dma_tx = UART4_DMA_TX_CONFIG;
  699. uart_config[UART4_INDEX].dma_tx = &uart4_dma_tx;
  700. #endif
  701. #endif
  702. #ifdef BSP_USING_UART5
  703. uart_obj[UART5_INDEX].uart_dma_flag = 0;
  704. #ifdef BSP_UART5_RX_USING_DMA
  705. uart_obj[UART5_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_RX;
  706. static struct dma_config uart5_dma_rx = UART5_DMA_RX_CONFIG;
  707. uart_config[UART5_INDEX].dma_rx = &uart5_dma_rx;
  708. #endif
  709. #ifdef BSP_UART5_TX_USING_DMA
  710. uart_obj[UART5_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_TX;
  711. static struct dma_config uart5_dma_tx = UART5_DMA_TX_CONFIG;
  712. uart_config[UART5_INDEX].dma_tx = &uart5_dma_tx;
  713. #endif
  714. #endif
  715. #ifdef BSP_USING_UART6
  716. uart_obj[UART6_INDEX].uart_dma_flag = 0;
  717. #ifdef BSP_UART6_RX_USING_DMA
  718. uart_obj[UART6_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_RX;
  719. static struct dma_config uart6_dma_rx = UART6_DMA_RX_CONFIG;
  720. uart_config[UART6_INDEX].dma_rx = &uart6_dma_rx;
  721. #endif
  722. #ifdef BSP_UART6_TX_USING_DMA
  723. uart_obj[UART6_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_TX;
  724. static struct dma_config uart6_dma_tx = UART6_DMA_TX_CONFIG;
  725. uart_config[UART6_INDEX].dma_tx = &uart6_dma_tx;
  726. #endif
  727. #endif
  728. }
  729. #ifdef RT_SERIAL_USING_DMA
  730. static void stm32_dma_config(struct rt_serial_device *serial, rt_ubase_t flag)
  731. {
  732. struct rt_serial_rx_fifo *rx_fifo;
  733. DMA_HandleTypeDef *DMA_Handle;
  734. struct dma_config *dma_config;
  735. struct stm32_uart *uart;
  736. RT_ASSERT(serial != RT_NULL);
  737. uart = rt_container_of(serial, struct stm32_uart, serial);
  738. if (RT_DEVICE_FLAG_DMA_RX == flag)
  739. {
  740. DMA_Handle = &uart->dma_rx.handle;
  741. dma_config = uart->config->dma_rx;
  742. }
  743. else if (RT_DEVICE_FLAG_DMA_TX == flag)
  744. {
  745. DMA_Handle = &uart->dma_tx.handle;
  746. dma_config = uart->config->dma_tx;
  747. }
  748. LOG_D("%s dma config start", uart->config->name);
  749. {
  750. rt_uint32_t tmpreg = 0x00U;
  751. #if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32G0) \
  752. || defined(SOC_SERIES_STM32L0)
  753. /* enable DMA clock && Delay after an RCC peripheral clock enabling*/
  754. SET_BIT(RCC->AHBENR, dma_config->dma_rcc);
  755. tmpreg = READ_BIT(RCC->AHBENR, dma_config->dma_rcc);
  756. #elif defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32L4) \
  757. || defined(SOC_SERIES_STM32G4)|| defined(SOC_SERIES_STM32H7)
  758. /* enable DMA clock && Delay after an RCC peripheral clock enabling*/
  759. SET_BIT(RCC->AHB1ENR, dma_config->dma_rcc);
  760. tmpreg = READ_BIT(RCC->AHB1ENR, dma_config->dma_rcc);
  761. #if (defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32G4)) && defined(DMAMUX1)
  762. /* enable DMAMUX clock for L4+ and G4 */
  763. __HAL_RCC_DMAMUX1_CLK_ENABLE();
  764. #elif defined(SOC_SERIES_STM32MP1)
  765. __HAL_RCC_DMAMUX_CLK_ENABLE();
  766. __HAL_RCC_DMA2_CLK_ENABLE();
  767. #endif
  768. #endif
  769. UNUSED(tmpreg); /* To avoid compiler warnings */
  770. }
  771. if (RT_DEVICE_FLAG_DMA_RX == flag)
  772. {
  773. __HAL_LINKDMA(&(uart->handle), hdmarx, uart->dma_rx.handle);
  774. }
  775. else if (RT_DEVICE_FLAG_DMA_TX == flag)
  776. {
  777. __HAL_LINKDMA(&(uart->handle), hdmatx, uart->dma_tx.handle);
  778. }
  779. #if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32L0)
  780. DMA_Handle->Instance = dma_config->Instance;
  781. #elif defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
  782. DMA_Handle->Instance = dma_config->Instance;
  783. DMA_Handle->Init.Channel = dma_config->channel;
  784. #elif defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32G0) || defined(SOC_SERIES_STM32G4)\
  785. || defined(SOC_SERIES_STM32H7) || defined(SOC_SERIES_STM32MP1)
  786. DMA_Handle->Instance = dma_config->Instance;
  787. DMA_Handle->Init.Request = dma_config->request;
  788. #endif
  789. DMA_Handle->Init.PeriphInc = DMA_PINC_DISABLE;
  790. DMA_Handle->Init.MemInc = DMA_MINC_ENABLE;
  791. DMA_Handle->Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
  792. DMA_Handle->Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
  793. if (RT_DEVICE_FLAG_DMA_RX == flag)
  794. {
  795. DMA_Handle->Init.Direction = DMA_PERIPH_TO_MEMORY;
  796. DMA_Handle->Init.Mode = DMA_CIRCULAR;
  797. }
  798. else if (RT_DEVICE_FLAG_DMA_TX == flag)
  799. {
  800. DMA_Handle->Init.Direction = DMA_MEMORY_TO_PERIPH;
  801. DMA_Handle->Init.Mode = DMA_NORMAL;
  802. }
  803. DMA_Handle->Init.Priority = DMA_PRIORITY_MEDIUM;
  804. #if defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32H7) || defined(SOC_SERIES_STM32MP1)
  805. DMA_Handle->Init.FIFOMode = DMA_FIFOMODE_DISABLE;
  806. #endif
  807. if (HAL_DMA_DeInit(DMA_Handle) != HAL_OK)
  808. {
  809. RT_ASSERT(0);
  810. }
  811. if (HAL_DMA_Init(DMA_Handle) != HAL_OK)
  812. {
  813. RT_ASSERT(0);
  814. }
  815. /* enable interrupt */
  816. if (flag == RT_DEVICE_FLAG_DMA_RX)
  817. {
  818. rx_fifo = (struct rt_serial_rx_fifo *)serial->serial_rx;
  819. /* Start DMA transfer */
  820. if (HAL_UART_Receive_DMA(&(uart->handle), rx_fifo->buffer, serial->config.bufsz) != HAL_OK)
  821. {
  822. /* Transfer error in reception process */
  823. RT_ASSERT(0);
  824. }
  825. CLEAR_BIT(uart->handle.Instance->CR3, USART_CR3_EIE);
  826. __HAL_UART_ENABLE_IT(&(uart->handle), UART_IT_IDLE);
  827. }
  828. /* DMA irq should set in DMA TX mode, or HAL_UART_TxCpltCallback function will not be called */
  829. HAL_NVIC_SetPriority(dma_config->dma_irq, 0, 0);
  830. HAL_NVIC_EnableIRQ(dma_config->dma_irq);
  831. HAL_NVIC_SetPriority(uart->config->irq_type, 1, 0);
  832. HAL_NVIC_EnableIRQ(uart->config->irq_type);
  833. LOG_D("%s dma %s instance: %x", uart->config->name, flag == RT_DEVICE_FLAG_DMA_RX ? "RX" : "TX", DMA_Handle->Instance);
  834. LOG_D("%s dma config done", uart->config->name);
  835. }
  836. /**
  837. * @brief UART error callbacks
  838. * @param huart: UART handle
  839. * @note This example shows a simple way to report transfer error, and you can
  840. * add your own implementation.
  841. * @retval None
  842. */
  843. void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart)
  844. {
  845. RT_ASSERT(huart != NULL);
  846. struct stm32_uart *uart = (struct stm32_uart *)huart;
  847. LOG_D("%s: %s %d\n", __FUNCTION__, uart->config->name, huart->ErrorCode);
  848. UNUSED(uart);
  849. }
  850. /**
  851. * @brief Rx Transfer completed callback
  852. * @param huart: UART handle
  853. * @note This example shows a simple way to report end of DMA Rx transfer, and
  854. * you can add your own implementation.
  855. * @retval None
  856. */
  857. void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart)
  858. {
  859. struct stm32_uart *uart;
  860. RT_ASSERT(huart != NULL);
  861. uart = (struct stm32_uart *)huart;
  862. dma_isr(&uart->serial);
  863. }
  864. /**
  865. * @brief Rx Half transfer completed callback
  866. * @param huart: UART handle
  867. * @note This example shows a simple way to report end of DMA Rx Half transfer,
  868. * and you can add your own implementation.
  869. * @retval None
  870. */
  871. void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart)
  872. {
  873. struct stm32_uart *uart;
  874. RT_ASSERT(huart != NULL);
  875. uart = (struct stm32_uart *)huart;
  876. dma_isr(&uart->serial);
  877. }
  878. static void _dma_tx_complete(struct rt_serial_device *serial)
  879. {
  880. struct stm32_uart *uart;
  881. rt_size_t trans_total_index;
  882. rt_base_t level;
  883. RT_ASSERT(serial != RT_NULL);
  884. uart = rt_container_of(serial, struct stm32_uart, serial);
  885. level = rt_hw_interrupt_disable();
  886. trans_total_index = __HAL_DMA_GET_COUNTER(&(uart->dma_tx.handle));
  887. rt_hw_interrupt_enable(level);
  888. if (trans_total_index == 0)
  889. {
  890. rt_hw_serial_isr(serial, RT_SERIAL_EVENT_TX_DMADONE);
  891. }
  892. }
  893. /**
  894. * @brief HAL_UART_TxCpltCallback
  895. * @param huart: UART handle
  896. * @note This callback can be called by two functions, first in UART_EndTransmit_IT when
  897. * UART Tx complete and second in UART_DMATransmitCplt function in DMA Circular mode.
  898. * @retval None
  899. */
  900. void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart)
  901. {
  902. struct stm32_uart *uart;
  903. RT_ASSERT(huart != NULL);
  904. uart = (struct stm32_uart *)huart;
  905. _dma_tx_complete(&uart->serial);
  906. }
  907. #endif /* RT_SERIAL_USING_DMA */
  908. static const struct rt_uart_ops stm32_uart_ops =
  909. {
  910. .configure = stm32_configure,
  911. .control = stm32_control,
  912. .putc = stm32_putc,
  913. .getc = stm32_getc,
  914. .dma_transmit = stm32_dma_transmit
  915. };
  916. int rt_hw_usart_init(void)
  917. {
  918. rt_size_t obj_num = sizeof(uart_obj) / sizeof(struct stm32_uart);
  919. struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
  920. rt_err_t result = 0;
  921. stm32_uart_get_dma_config();
  922. for (int i = 0; i < obj_num; i++)
  923. {
  924. /* init UART object */
  925. uart_obj[i].config = &uart_config[i];
  926. uart_obj[i].serial.ops = &stm32_uart_ops;
  927. uart_obj[i].serial.config = config;
  928. /* register UART device */
  929. result = rt_hw_serial_register(&uart_obj[i].serial, uart_obj[i].config->name,
  930. RT_DEVICE_FLAG_RDWR
  931. | RT_DEVICE_FLAG_INT_RX
  932. | RT_DEVICE_FLAG_INT_TX
  933. | uart_obj[i].uart_dma_flag
  934. , NULL);
  935. RT_ASSERT(result == RT_EOK);
  936. }
  937. return result;
  938. }
  939. #endif /* RT_USING_SERIAL */