rt-thread/bsp/nxp/imx/imx6ull-smart/libraries/sdk/devices/MCIMX6Y2/MCIMX6Y2.xml

<?xml version="1.0" encoding="UTF-8"?>
<device schemaVersion="1.1" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="CMSIS-SVD.xsd">
  <vendor>nxp.com</vendor>
  <name>MCIMX6Y2</name>
  <version>1.0</version>
  <description>MCIMX6Y0DVM05, MCIMX6Y0CVM05, MCIMX6Y1DVM05, MCIMX6Y1DVK05, MCIMX6Y1CVM05, MCIMX6Y1CVK05, MCIMX6Y2DVM05, MCIMX6Y7DVK05</description>
  <cpu>
    <name>other</name>
    <revision>r2p0</revision>
    <endian>little</endian>
    <mpuPresent>false</mpuPresent>
    <fpuPresent>false</fpuPresent>
    <vtorPresent>true</vtorPresent>
    <nvicPrioBits>0</nvicPrioBits>
    <vendorSystickConfig>false</vendorSystickConfig>
  </cpu>
  <addressUnitBits>8</addressUnitBits>
  <width>32</width>
  <peripherals>
    <peripheral>
      <name>APBH</name>
      <description>APBH Register Reference Index</description>
      <groupName>APBH</groupName>
      <prependToName>APBH_</prependToName>
      <baseAddress>0x1804000</baseAddress>
      <addressBlock>
        <offset>0</offset>
        <size>0x804</size>
        <usage>registers</usage>
      </addressBlock>
      <interrupt>
        <name>APBH</name>
        <value>45</value>
      </interrupt>
      <registers>
        <register>
          <name>CTRL0</name>
          <description>AHB to APBH Bridge Control and Status Register 0</description>
          <addressOffset>0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0xE0000000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>CLKGATE_CHANNEL</name>
              <description>These bits must be set to zero for normal operation of each channel</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NAND0</name>
                  <description>no description available</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND1</name>
                  <description>no description available</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND2</name>
                  <description>no description available</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND3</name>
                  <description>no description available</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND4</name>
                  <description>no description available</description>
                  <value>0x10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND5</name>
                  <description>no description available</description>
                  <value>0x20</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND6</name>
                  <description>no description available</description>
                  <value>0x40</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND7</name>
                  <description>no description available</description>
                  <value>0x80</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SSP</name>
                  <description>no description available</description>
                  <value>0x100</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>APB_BURST_EN</name>
              <description>Set this bit to one to enable apb master do a continous transfers when a device request a burst dma</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>AHB_BURST8_EN</name>
              <description>Set this bit to one (default) to enable AHB 8-beat burst</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CLKGATE</name>
              <description>This bit must be set to zero for normal operation</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SFTRST</name>
              <description>Set this bit to zero to enable normal APBH DMA operation</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CTRL0_SET</name>
          <description>AHB to APBH Bridge Control and Status Register 0</description>
          <addressOffset>0x4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0xE0000000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>CLKGATE_CHANNEL</name>
              <description>These bits must be set to zero for normal operation of each channel</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NAND0</name>
                  <description>no description available</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND1</name>
                  <description>no description available</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND2</name>
                  <description>no description available</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND3</name>
                  <description>no description available</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND4</name>
                  <description>no description available</description>
                  <value>0x10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND5</name>
                  <description>no description available</description>
                  <value>0x20</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND6</name>
                  <description>no description available</description>
                  <value>0x40</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND7</name>
                  <description>no description available</description>
                  <value>0x80</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SSP</name>
                  <description>no description available</description>
                  <value>0x100</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>APB_BURST_EN</name>
              <description>Set this bit to one to enable apb master do a continous transfers when a device request a burst dma</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>AHB_BURST8_EN</name>
              <description>Set this bit to one (default) to enable AHB 8-beat burst</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CLKGATE</name>
              <description>This bit must be set to zero for normal operation</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SFTRST</name>
              <description>Set this bit to zero to enable normal APBH DMA operation</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CTRL0_CLR</name>
          <description>AHB to APBH Bridge Control and Status Register 0</description>
          <addressOffset>0x8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0xE0000000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>CLKGATE_CHANNEL</name>
              <description>These bits must be set to zero for normal operation of each channel</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NAND0</name>
                  <description>no description available</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND1</name>
                  <description>no description available</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND2</name>
                  <description>no description available</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND3</name>
                  <description>no description available</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND4</name>
                  <description>no description available</description>
                  <value>0x10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND5</name>
                  <description>no description available</description>
                  <value>0x20</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND6</name>
                  <description>no description available</description>
                  <value>0x40</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND7</name>
                  <description>no description available</description>
                  <value>0x80</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SSP</name>
                  <description>no description available</description>
                  <value>0x100</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>APB_BURST_EN</name>
              <description>Set this bit to one to enable apb master do a continous transfers when a device request a burst dma</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>AHB_BURST8_EN</name>
              <description>Set this bit to one (default) to enable AHB 8-beat burst</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CLKGATE</name>
              <description>This bit must be set to zero for normal operation</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SFTRST</name>
              <description>Set this bit to zero to enable normal APBH DMA operation</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CTRL0_TOG</name>
          <description>AHB to APBH Bridge Control and Status Register 0</description>
          <addressOffset>0xC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0xE0000000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>CLKGATE_CHANNEL</name>
              <description>These bits must be set to zero for normal operation of each channel</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NAND0</name>
                  <description>no description available</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND1</name>
                  <description>no description available</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND2</name>
                  <description>no description available</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND3</name>
                  <description>no description available</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND4</name>
                  <description>no description available</description>
                  <value>0x10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND5</name>
                  <description>no description available</description>
                  <value>0x20</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND6</name>
                  <description>no description available</description>
                  <value>0x40</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND7</name>
                  <description>no description available</description>
                  <value>0x80</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SSP</name>
                  <description>no description available</description>
                  <value>0x100</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>APB_BURST_EN</name>
              <description>Set this bit to one to enable apb master do a continous transfers when a device request a burst dma</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>AHB_BURST8_EN</name>
              <description>Set this bit to one (default) to enable AHB 8-beat burst</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CLKGATE</name>
              <description>This bit must be set to zero for normal operation</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SFTRST</name>
              <description>Set this bit to zero to enable normal APBH DMA operation</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CTRL1</name>
          <description>AHB to APBH Bridge Control and Status Register 1</description>
          <addressOffset>0x10</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>CH0_CMDCMPLT_IRQ</name>
              <description>Interrupt request status bit for APBH DMA channel 0</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH1_CMDCMPLT_IRQ</name>
              <description>Interrupt request status bit for APBH DMA channel 1</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH2_CMDCMPLT_IRQ</name>
              <description>Interrupt request status bit for APBH DMA channel 2</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH3_CMDCMPLT_IRQ</name>
              <description>Interrupt request status bit for APBH DMA channel 3</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH4_CMDCMPLT_IRQ</name>
              <description>Interrupt request status bit for APBH DMA channel 4</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH5_CMDCMPLT_IRQ</name>
              <description>Interrupt request status bit for APBH DMA channel 5</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH6_CMDCMPLT_IRQ</name>
              <description>Interrupt request status bit for APBH DMA channel 6</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH7_CMDCMPLT_IRQ</name>
              <description>Interrupt request status bit for APBH DMA channel 7</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH8_CMDCMPLT_IRQ</name>
              <description>Interrupt request status bit for APBH DMA Channel 8</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH9_CMDCMPLT_IRQ</name>
              <description>Interrupt request status bit for APBH DMA Channel 9</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH10_CMDCMPLT_IRQ</name>
              <description>Interrupt request status bit for APBH DMA Channel 10</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH11_CMDCMPLT_IRQ</name>
              <description>Interrupt request status bit for APBH DMA Channel 11</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH12_CMDCMPLT_IRQ</name>
              <description>Interrupt request status bit for APBH DMA Channel 12</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH13_CMDCMPLT_IRQ</name>
              <description>Interrupt request status bit for APBH DMA Channel 13</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH14_CMDCMPLT_IRQ</name>
              <description>Interrupt request status bit for APBH DMA Channel 14</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH15_CMDCMPLT_IRQ</name>
              <description>Interrupt request status bit for APBH DMA Channel 15</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH0_CMDCMPLT_IRQ_EN</name>
              <description>Setting this bit enables the generation of an interrupt request for APBH DMA channel 0.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH1_CMDCMPLT_IRQ_EN</name>
              <description>Setting this bit enables the generation of an interrupt request for APBH DMA channel 1.</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH2_CMDCMPLT_IRQ_EN</name>
              <description>Setting this bit enables the generation of an interrupt request for APBH DMA channel 2.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH3_CMDCMPLT_IRQ_EN</name>
              <description>Setting this bit enables the generation of an interrupt request for APBH DMA channel 3.</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH4_CMDCMPLT_IRQ_EN</name>
              <description>Setting this bit enables the generation of an interrupt request for APBH DMA channel 4.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH5_CMDCMPLT_IRQ_EN</name>
              <description>Setting this bit enables the generation of an interrupt request for APBH DMA channel 5.</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH6_CMDCMPLT_IRQ_EN</name>
              <description>Setting this bit enables the generation of an interrupt request for APBH DMA channel 6.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH7_CMDCMPLT_IRQ_EN</name>
              <description>Setting this bit enables the generation of an interrupt request for APBH DMA channel 7.</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH8_CMDCMPLT_IRQ_EN</name>
              <description>Setting this bit enables the generation of an interrupt request for APBH DMA channel 8.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH9_CMDCMPLT_IRQ_EN</name>
              <description>Setting this bit enables the generation of an interrupt request for APBH DMA channel 9.</description>
              <bitOffset>0x19</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH10_CMDCMPLT_IRQ_EN</name>
              <description>Setting this bit enables the generation of an interrupt request for APBH DMA channel 10.</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH11_CMDCMPLT_IRQ_EN</name>
              <description>Setting this bit enables the generation of an interrupt request for APBH DMA channel 11.</description>
              <bitOffset>0x1B</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH12_CMDCMPLT_IRQ_EN</name>
              <description>Setting this bit enables the generation of an interrupt request for APBH DMA channel 12.</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH13_CMDCMPLT_IRQ_EN</name>
              <description>Setting this bit enables the generation of an interrupt request for APBH DMA channel 13.</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH14_CMDCMPLT_IRQ_EN</name>
              <description>Setting this bit enables the generation of an interrupt request for APBH DMA channel 14.</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH15_CMDCMPLT_IRQ_EN</name>
              <description>Setting this bit enables the generation of an interrupt request for APBH DMA channel 15.</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CTRL1_SET</name>
          <description>AHB to APBH Bridge Control and Status Register 1</description>
          <addressOffset>0x14</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>CH0_CMDCMPLT_IRQ</name>
              <description>Interrupt request status bit for APBH DMA channel 0</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH1_CMDCMPLT_IRQ</name>
              <description>Interrupt request status bit for APBH DMA channel 1</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH2_CMDCMPLT_IRQ</name>
              <description>Interrupt request status bit for APBH DMA channel 2</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH3_CMDCMPLT_IRQ</name>
              <description>Interrupt request status bit for APBH DMA channel 3</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH4_CMDCMPLT_IRQ</name>
              <description>Interrupt request status bit for APBH DMA channel 4</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH5_CMDCMPLT_IRQ</name>
              <description>Interrupt request status bit for APBH DMA channel 5</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH6_CMDCMPLT_IRQ</name>
              <description>Interrupt request status bit for APBH DMA channel 6</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH7_CMDCMPLT_IRQ</name>
              <description>Interrupt request status bit for APBH DMA channel 7</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH8_CMDCMPLT_IRQ</name>
              <description>Interrupt request status bit for APBH DMA Channel 8</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH9_CMDCMPLT_IRQ</name>
              <description>Interrupt request status bit for APBH DMA Channel 9</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH10_CMDCMPLT_IRQ</name>
              <description>Interrupt request status bit for APBH DMA Channel 10</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH11_CMDCMPLT_IRQ</name>
              <description>Interrupt request status bit for APBH DMA Channel 11</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH12_CMDCMPLT_IRQ</name>
              <description>Interrupt request status bit for APBH DMA Channel 12</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH13_CMDCMPLT_IRQ</name>
              <description>Interrupt request status bit for APBH DMA Channel 13</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH14_CMDCMPLT_IRQ</name>
              <description>Interrupt request status bit for APBH DMA Channel 14</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH15_CMDCMPLT_IRQ</name>
              <description>Interrupt request status bit for APBH DMA Channel 15</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH0_CMDCMPLT_IRQ_EN</name>
              <description>Setting this bit enables the generation of an interrupt request for APBH DMA channel 0.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH1_CMDCMPLT_IRQ_EN</name>
              <description>Setting this bit enables the generation of an interrupt request for APBH DMA channel 1.</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH2_CMDCMPLT_IRQ_EN</name>
              <description>Setting this bit enables the generation of an interrupt request for APBH DMA channel 2.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH3_CMDCMPLT_IRQ_EN</name>
              <description>Setting this bit enables the generation of an interrupt request for APBH DMA channel 3.</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH4_CMDCMPLT_IRQ_EN</name>
              <description>Setting this bit enables the generation of an interrupt request for APBH DMA channel 4.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH5_CMDCMPLT_IRQ_EN</name>
              <description>Setting this bit enables the generation of an interrupt request for APBH DMA channel 5.</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH6_CMDCMPLT_IRQ_EN</name>
              <description>Setting this bit enables the generation of an interrupt request for APBH DMA channel 6.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH7_CMDCMPLT_IRQ_EN</name>
              <description>Setting this bit enables the generation of an interrupt request for APBH DMA channel 7.</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH8_CMDCMPLT_IRQ_EN</name>
              <description>Setting this bit enables the generation of an interrupt request for APBH DMA channel 8.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH9_CMDCMPLT_IRQ_EN</name>
              <description>Setting this bit enables the generation of an interrupt request for APBH DMA channel 9.</description>
              <bitOffset>0x19</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH10_CMDCMPLT_IRQ_EN</name>
              <description>Setting this bit enables the generation of an interrupt request for APBH DMA channel 10.</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH11_CMDCMPLT_IRQ_EN</name>
              <description>Setting this bit enables the generation of an interrupt request for APBH DMA channel 11.</description>
              <bitOffset>0x1B</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH12_CMDCMPLT_IRQ_EN</name>
              <description>Setting this bit enables the generation of an interrupt request for APBH DMA channel 12.</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH13_CMDCMPLT_IRQ_EN</name>
              <description>Setting this bit enables the generation of an interrupt request for APBH DMA channel 13.</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH14_CMDCMPLT_IRQ_EN</name>
              <description>Setting this bit enables the generation of an interrupt request for APBH DMA channel 14.</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH15_CMDCMPLT_IRQ_EN</name>
              <description>Setting this bit enables the generation of an interrupt request for APBH DMA channel 15.</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CTRL1_CLR</name>
          <description>AHB to APBH Bridge Control and Status Register 1</description>
          <addressOffset>0x18</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>CH0_CMDCMPLT_IRQ</name>
              <description>Interrupt request status bit for APBH DMA channel 0</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH1_CMDCMPLT_IRQ</name>
              <description>Interrupt request status bit for APBH DMA channel 1</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH2_CMDCMPLT_IRQ</name>
              <description>Interrupt request status bit for APBH DMA channel 2</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH3_CMDCMPLT_IRQ</name>
              <description>Interrupt request status bit for APBH DMA channel 3</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH4_CMDCMPLT_IRQ</name>
              <description>Interrupt request status bit for APBH DMA channel 4</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH5_CMDCMPLT_IRQ</name>
              <description>Interrupt request status bit for APBH DMA channel 5</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH6_CMDCMPLT_IRQ</name>
              <description>Interrupt request status bit for APBH DMA channel 6</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH7_CMDCMPLT_IRQ</name>
              <description>Interrupt request status bit for APBH DMA channel 7</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH8_CMDCMPLT_IRQ</name>
              <description>Interrupt request status bit for APBH DMA Channel 8</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH9_CMDCMPLT_IRQ</name>
              <description>Interrupt request status bit for APBH DMA Channel 9</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH10_CMDCMPLT_IRQ</name>
              <description>Interrupt request status bit for APBH DMA Channel 10</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH11_CMDCMPLT_IRQ</name>
              <description>Interrupt request status bit for APBH DMA Channel 11</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH12_CMDCMPLT_IRQ</name>
              <description>Interrupt request status bit for APBH DMA Channel 12</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH13_CMDCMPLT_IRQ</name>
              <description>Interrupt request status bit for APBH DMA Channel 13</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH14_CMDCMPLT_IRQ</name>
              <description>Interrupt request status bit for APBH DMA Channel 14</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH15_CMDCMPLT_IRQ</name>
              <description>Interrupt request status bit for APBH DMA Channel 15</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH0_CMDCMPLT_IRQ_EN</name>
              <description>Setting this bit enables the generation of an interrupt request for APBH DMA channel 0.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH1_CMDCMPLT_IRQ_EN</name>
              <description>Setting this bit enables the generation of an interrupt request for APBH DMA channel 1.</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH2_CMDCMPLT_IRQ_EN</name>
              <description>Setting this bit enables the generation of an interrupt request for APBH DMA channel 2.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH3_CMDCMPLT_IRQ_EN</name>
              <description>Setting this bit enables the generation of an interrupt request for APBH DMA channel 3.</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH4_CMDCMPLT_IRQ_EN</name>
              <description>Setting this bit enables the generation of an interrupt request for APBH DMA channel 4.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH5_CMDCMPLT_IRQ_EN</name>
              <description>Setting this bit enables the generation of an interrupt request for APBH DMA channel 5.</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH6_CMDCMPLT_IRQ_EN</name>
              <description>Setting this bit enables the generation of an interrupt request for APBH DMA channel 6.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH7_CMDCMPLT_IRQ_EN</name>
              <description>Setting this bit enables the generation of an interrupt request for APBH DMA channel 7.</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH8_CMDCMPLT_IRQ_EN</name>
              <description>Setting this bit enables the generation of an interrupt request for APBH DMA channel 8.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH9_CMDCMPLT_IRQ_EN</name>
              <description>Setting this bit enables the generation of an interrupt request for APBH DMA channel 9.</description>
              <bitOffset>0x19</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH10_CMDCMPLT_IRQ_EN</name>
              <description>Setting this bit enables the generation of an interrupt request for APBH DMA channel 10.</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH11_CMDCMPLT_IRQ_EN</name>
              <description>Setting this bit enables the generation of an interrupt request for APBH DMA channel 11.</description>
              <bitOffset>0x1B</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH12_CMDCMPLT_IRQ_EN</name>
              <description>Setting this bit enables the generation of an interrupt request for APBH DMA channel 12.</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH13_CMDCMPLT_IRQ_EN</name>
              <description>Setting this bit enables the generation of an interrupt request for APBH DMA channel 13.</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH14_CMDCMPLT_IRQ_EN</name>
              <description>Setting this bit enables the generation of an interrupt request for APBH DMA channel 14.</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH15_CMDCMPLT_IRQ_EN</name>
              <description>Setting this bit enables the generation of an interrupt request for APBH DMA channel 15.</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CTRL1_TOG</name>
          <description>AHB to APBH Bridge Control and Status Register 1</description>
          <addressOffset>0x1C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>CH0_CMDCMPLT_IRQ</name>
              <description>Interrupt request status bit for APBH DMA channel 0</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH1_CMDCMPLT_IRQ</name>
              <description>Interrupt request status bit for APBH DMA channel 1</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH2_CMDCMPLT_IRQ</name>
              <description>Interrupt request status bit for APBH DMA channel 2</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH3_CMDCMPLT_IRQ</name>
              <description>Interrupt request status bit for APBH DMA channel 3</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH4_CMDCMPLT_IRQ</name>
              <description>Interrupt request status bit for APBH DMA channel 4</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH5_CMDCMPLT_IRQ</name>
              <description>Interrupt request status bit for APBH DMA channel 5</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH6_CMDCMPLT_IRQ</name>
              <description>Interrupt request status bit for APBH DMA channel 6</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH7_CMDCMPLT_IRQ</name>
              <description>Interrupt request status bit for APBH DMA channel 7</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH8_CMDCMPLT_IRQ</name>
              <description>Interrupt request status bit for APBH DMA Channel 8</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH9_CMDCMPLT_IRQ</name>
              <description>Interrupt request status bit for APBH DMA Channel 9</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH10_CMDCMPLT_IRQ</name>
              <description>Interrupt request status bit for APBH DMA Channel 10</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH11_CMDCMPLT_IRQ</name>
              <description>Interrupt request status bit for APBH DMA Channel 11</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH12_CMDCMPLT_IRQ</name>
              <description>Interrupt request status bit for APBH DMA Channel 12</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH13_CMDCMPLT_IRQ</name>
              <description>Interrupt request status bit for APBH DMA Channel 13</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH14_CMDCMPLT_IRQ</name>
              <description>Interrupt request status bit for APBH DMA Channel 14</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH15_CMDCMPLT_IRQ</name>
              <description>Interrupt request status bit for APBH DMA Channel 15</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH0_CMDCMPLT_IRQ_EN</name>
              <description>Setting this bit enables the generation of an interrupt request for APBH DMA channel 0.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH1_CMDCMPLT_IRQ_EN</name>
              <description>Setting this bit enables the generation of an interrupt request for APBH DMA channel 1.</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH2_CMDCMPLT_IRQ_EN</name>
              <description>Setting this bit enables the generation of an interrupt request for APBH DMA channel 2.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH3_CMDCMPLT_IRQ_EN</name>
              <description>Setting this bit enables the generation of an interrupt request for APBH DMA channel 3.</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH4_CMDCMPLT_IRQ_EN</name>
              <description>Setting this bit enables the generation of an interrupt request for APBH DMA channel 4.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH5_CMDCMPLT_IRQ_EN</name>
              <description>Setting this bit enables the generation of an interrupt request for APBH DMA channel 5.</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH6_CMDCMPLT_IRQ_EN</name>
              <description>Setting this bit enables the generation of an interrupt request for APBH DMA channel 6.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH7_CMDCMPLT_IRQ_EN</name>
              <description>Setting this bit enables the generation of an interrupt request for APBH DMA channel 7.</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH8_CMDCMPLT_IRQ_EN</name>
              <description>Setting this bit enables the generation of an interrupt request for APBH DMA channel 8.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH9_CMDCMPLT_IRQ_EN</name>
              <description>Setting this bit enables the generation of an interrupt request for APBH DMA channel 9.</description>
              <bitOffset>0x19</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH10_CMDCMPLT_IRQ_EN</name>
              <description>Setting this bit enables the generation of an interrupt request for APBH DMA channel 10.</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH11_CMDCMPLT_IRQ_EN</name>
              <description>Setting this bit enables the generation of an interrupt request for APBH DMA channel 11.</description>
              <bitOffset>0x1B</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH12_CMDCMPLT_IRQ_EN</name>
              <description>Setting this bit enables the generation of an interrupt request for APBH DMA channel 12.</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH13_CMDCMPLT_IRQ_EN</name>
              <description>Setting this bit enables the generation of an interrupt request for APBH DMA channel 13.</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH14_CMDCMPLT_IRQ_EN</name>
              <description>Setting this bit enables the generation of an interrupt request for APBH DMA channel 14.</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH15_CMDCMPLT_IRQ_EN</name>
              <description>Setting this bit enables the generation of an interrupt request for APBH DMA channel 15.</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CTRL2</name>
          <description>AHB to APBH Bridge Control and Status Register 2</description>
          <addressOffset>0x20</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>CH0_ERROR_IRQ</name>
              <description>Error interrupt status bit for APBX DMA Channel 0</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH1_ERROR_IRQ</name>
              <description>Error interrupt status bit for APBX DMA Channel 1</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH2_ERROR_IRQ</name>
              <description>Error interrupt status bit for APBX DMA Channel 2</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH3_ERROR_IRQ</name>
              <description>Error interrupt status bit for APBX DMA Channel 3</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH4_ERROR_IRQ</name>
              <description>Error interrupt status bit for APBX DMA Channel 4</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH5_ERROR_IRQ</name>
              <description>Error interrupt status bit for APBX DMA Channel 5</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH6_ERROR_IRQ</name>
              <description>Error interrupt status bit for APBX DMA Channel 6</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH7_ERROR_IRQ</name>
              <description>Error interrupt status bit for APBX DMA Channel 7</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH8_ERROR_IRQ</name>
              <description>Error interrupt status bit for APBH DMA Channel 8</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH9_ERROR_IRQ</name>
              <description>Error interrupt status bit for APBH DMA Channel 9</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH10_ERROR_IRQ</name>
              <description>Error interrupt status bit for APBH DMA Channel 10</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH11_ERROR_IRQ</name>
              <description>Error interrupt status bit for APBH DMA Channel 11</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH12_ERROR_IRQ</name>
              <description>Error interrupt status bit for APBH DMA Channel 12</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH13_ERROR_IRQ</name>
              <description>Error interrupt status bit for APBH DMA Channel 13</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH14_ERROR_IRQ</name>
              <description>Error interrupt status bit for APBH DMA Channel 14</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH15_ERROR_IRQ</name>
              <description>Error interrupt status bit for APBH DMA Channel 15</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH0_ERROR_STATUS</name>
              <description>Error status bit for APBX DMA Channel 0</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TERMINATION</name>
                  <description>An early termination from the device causes error IRQ.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BUS_ERROR</name>
                  <description>An AHB bus error causes error IRQ.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CH1_ERROR_STATUS</name>
              <description>Error status bit for APBX DMA Channel 1</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TERMINATION</name>
                  <description>An early termination from the device causes error IRQ.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BUS_ERROR</name>
                  <description>An AHB bus error causes error IRQ.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CH2_ERROR_STATUS</name>
              <description>Error status bit for APBX DMA Channel 2</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TERMINATION</name>
                  <description>An early termination from the device causes error IRQ.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BUS_ERROR</name>
                  <description>An AHB bus error causes error IRQ.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CH3_ERROR_STATUS</name>
              <description>Error status bit for APBX DMA Channel 3</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TERMINATION</name>
                  <description>An early termination from the device causes error IRQ.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BUS_ERROR</name>
                  <description>An AHB bus error causes error IRQ.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CH4_ERROR_STATUS</name>
              <description>Error status bit for APBX DMA Channel 4</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TERMINATION</name>
                  <description>An early termination from the device causes error IRQ.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BUS_ERROR</name>
                  <description>An AHB bus error causes error IRQ.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CH5_ERROR_STATUS</name>
              <description>Error status bit for APBX DMA Channel 5</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TERMINATION</name>
                  <description>An early termination from the device causes error IRQ.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BUS_ERROR</name>
                  <description>An AHB bus error causes error IRQ.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CH6_ERROR_STATUS</name>
              <description>Error status bit for APBX DMA Channel 6</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TERMINATION</name>
                  <description>An early termination from the device causes error IRQ.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BUS_ERROR</name>
                  <description>An AHB bus error causes error IRQ.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CH7_ERROR_STATUS</name>
              <description>Error status bit for APBX DMA Channel 7</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TERMINATION</name>
                  <description>An early termination from the device causes error IRQ.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BUS_ERROR</name>
                  <description>An AHB bus error causes error IRQ.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CH8_ERROR_STATUS</name>
              <description>Error status bit for APBH DMA Channel 8</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TERMINATION</name>
                  <description>An early termination from the device causes error IRQ.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BUS_ERROR</name>
                  <description>An AHB bus error causes error IRQ.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CH9_ERROR_STATUS</name>
              <description>Error status bit for APBH DMA Channel 9</description>
              <bitOffset>0x19</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TERMINATION</name>
                  <description>An early termination from the device causes error IRQ.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BUS_ERROR</name>
                  <description>An AHB bus error causes error IRQ.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CH10_ERROR_STATUS</name>
              <description>Error status bit for APBH DMA Channel 10</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TERMINATION</name>
                  <description>An early termination from the device causes error IRQ.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BUS_ERROR</name>
                  <description>An AHB bus error causes error IRQ.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CH11_ERROR_STATUS</name>
              <description>Error status bit for APBH DMA Channel 11</description>
              <bitOffset>0x1B</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TERMINATION</name>
                  <description>An early termination from the device causes error IRQ.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BUS_ERROR</name>
                  <description>An AHB bus error causes error IRQ.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CH12_ERROR_STATUS</name>
              <description>Error status bit for APBH DMA Channel 12</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TERMINATION</name>
                  <description>An early termination from the device causes error IRQ.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BUS_ERROR</name>
                  <description>An AHB bus error causes error IRQ.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CH13_ERROR_STATUS</name>
              <description>Error status bit for APBH DMA Channel 13</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TERMINATION</name>
                  <description>An early termination from the device causes error IRQ.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BUS_ERROR</name>
                  <description>An AHB bus error causes error IRQ.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CH14_ERROR_STATUS</name>
              <description>Error status bit for APBH DMA Channel 14</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TERMINATION</name>
                  <description>An early termination from the device causes error IRQ.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BUS_ERROR</name>
                  <description>An AHB bus error causes error IRQ.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CH15_ERROR_STATUS</name>
              <description>Error status bit for APBH DMA Channel 15</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TERMINATION</name>
                  <description>An early termination from the device causes error IRQ.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BUS_ERROR</name>
                  <description>An AHB bus error causes error IRQ.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>CTRL2_SET</name>
          <description>AHB to APBH Bridge Control and Status Register 2</description>
          <addressOffset>0x24</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>CH0_ERROR_IRQ</name>
              <description>Error interrupt status bit for APBX DMA Channel 0</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH1_ERROR_IRQ</name>
              <description>Error interrupt status bit for APBX DMA Channel 1</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH2_ERROR_IRQ</name>
              <description>Error interrupt status bit for APBX DMA Channel 2</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH3_ERROR_IRQ</name>
              <description>Error interrupt status bit for APBX DMA Channel 3</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH4_ERROR_IRQ</name>
              <description>Error interrupt status bit for APBX DMA Channel 4</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH5_ERROR_IRQ</name>
              <description>Error interrupt status bit for APBX DMA Channel 5</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH6_ERROR_IRQ</name>
              <description>Error interrupt status bit for APBX DMA Channel 6</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH7_ERROR_IRQ</name>
              <description>Error interrupt status bit for APBX DMA Channel 7</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH8_ERROR_IRQ</name>
              <description>Error interrupt status bit for APBH DMA Channel 8</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH9_ERROR_IRQ</name>
              <description>Error interrupt status bit for APBH DMA Channel 9</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH10_ERROR_IRQ</name>
              <description>Error interrupt status bit for APBH DMA Channel 10</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH11_ERROR_IRQ</name>
              <description>Error interrupt status bit for APBH DMA Channel 11</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH12_ERROR_IRQ</name>
              <description>Error interrupt status bit for APBH DMA Channel 12</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH13_ERROR_IRQ</name>
              <description>Error interrupt status bit for APBH DMA Channel 13</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH14_ERROR_IRQ</name>
              <description>Error interrupt status bit for APBH DMA Channel 14</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH15_ERROR_IRQ</name>
              <description>Error interrupt status bit for APBH DMA Channel 15</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH0_ERROR_STATUS</name>
              <description>Error status bit for APBX DMA Channel 0</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TERMINATION</name>
                  <description>An early termination from the device causes error IRQ.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BUS_ERROR</name>
                  <description>An AHB bus error causes error IRQ.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CH1_ERROR_STATUS</name>
              <description>Error status bit for APBX DMA Channel 1</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TERMINATION</name>
                  <description>An early termination from the device causes error IRQ.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BUS_ERROR</name>
                  <description>An AHB bus error causes error IRQ.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CH2_ERROR_STATUS</name>
              <description>Error status bit for APBX DMA Channel 2</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TERMINATION</name>
                  <description>An early termination from the device causes error IRQ.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BUS_ERROR</name>
                  <description>An AHB bus error causes error IRQ.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CH3_ERROR_STATUS</name>
              <description>Error status bit for APBX DMA Channel 3</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TERMINATION</name>
                  <description>An early termination from the device causes error IRQ.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BUS_ERROR</name>
                  <description>An AHB bus error causes error IRQ.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CH4_ERROR_STATUS</name>
              <description>Error status bit for APBX DMA Channel 4</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TERMINATION</name>
                  <description>An early termination from the device causes error IRQ.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BUS_ERROR</name>
                  <description>An AHB bus error causes error IRQ.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CH5_ERROR_STATUS</name>
              <description>Error status bit for APBX DMA Channel 5</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TERMINATION</name>
                  <description>An early termination from the device causes error IRQ.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BUS_ERROR</name>
                  <description>An AHB bus error causes error IRQ.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CH6_ERROR_STATUS</name>
              <description>Error status bit for APBX DMA Channel 6</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TERMINATION</name>
                  <description>An early termination from the device causes error IRQ.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BUS_ERROR</name>
                  <description>An AHB bus error causes error IRQ.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CH7_ERROR_STATUS</name>
              <description>Error status bit for APBX DMA Channel 7</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TERMINATION</name>
                  <description>An early termination from the device causes error IRQ.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BUS_ERROR</name>
                  <description>An AHB bus error causes error IRQ.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CH8_ERROR_STATUS</name>
              <description>Error status bit for APBH DMA Channel 8</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TERMINATION</name>
                  <description>An early termination from the device causes error IRQ.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BUS_ERROR</name>
                  <description>An AHB bus error causes error IRQ.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CH9_ERROR_STATUS</name>
              <description>Error status bit for APBH DMA Channel 9</description>
              <bitOffset>0x19</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TERMINATION</name>
                  <description>An early termination from the device causes error IRQ.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BUS_ERROR</name>
                  <description>An AHB bus error causes error IRQ.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CH10_ERROR_STATUS</name>
              <description>Error status bit for APBH DMA Channel 10</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TERMINATION</name>
                  <description>An early termination from the device causes error IRQ.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BUS_ERROR</name>
                  <description>An AHB bus error causes error IRQ.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CH11_ERROR_STATUS</name>
              <description>Error status bit for APBH DMA Channel 11</description>
              <bitOffset>0x1B</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TERMINATION</name>
                  <description>An early termination from the device causes error IRQ.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BUS_ERROR</name>
                  <description>An AHB bus error causes error IRQ.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CH12_ERROR_STATUS</name>
              <description>Error status bit for APBH DMA Channel 12</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TERMINATION</name>
                  <description>An early termination from the device causes error IRQ.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BUS_ERROR</name>
                  <description>An AHB bus error causes error IRQ.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CH13_ERROR_STATUS</name>
              <description>Error status bit for APBH DMA Channel 13</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TERMINATION</name>
                  <description>An early termination from the device causes error IRQ.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BUS_ERROR</name>
                  <description>An AHB bus error causes error IRQ.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CH14_ERROR_STATUS</name>
              <description>Error status bit for APBH DMA Channel 14</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TERMINATION</name>
                  <description>An early termination from the device causes error IRQ.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BUS_ERROR</name>
                  <description>An AHB bus error causes error IRQ.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CH15_ERROR_STATUS</name>
              <description>Error status bit for APBH DMA Channel 15</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TERMINATION</name>
                  <description>An early termination from the device causes error IRQ.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BUS_ERROR</name>
                  <description>An AHB bus error causes error IRQ.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>CTRL2_CLR</name>
          <description>AHB to APBH Bridge Control and Status Register 2</description>
          <addressOffset>0x28</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>CH0_ERROR_IRQ</name>
              <description>Error interrupt status bit for APBX DMA Channel 0</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH1_ERROR_IRQ</name>
              <description>Error interrupt status bit for APBX DMA Channel 1</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH2_ERROR_IRQ</name>
              <description>Error interrupt status bit for APBX DMA Channel 2</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH3_ERROR_IRQ</name>
              <description>Error interrupt status bit for APBX DMA Channel 3</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH4_ERROR_IRQ</name>
              <description>Error interrupt status bit for APBX DMA Channel 4</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH5_ERROR_IRQ</name>
              <description>Error interrupt status bit for APBX DMA Channel 5</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH6_ERROR_IRQ</name>
              <description>Error interrupt status bit for APBX DMA Channel 6</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH7_ERROR_IRQ</name>
              <description>Error interrupt status bit for APBX DMA Channel 7</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH8_ERROR_IRQ</name>
              <description>Error interrupt status bit for APBH DMA Channel 8</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH9_ERROR_IRQ</name>
              <description>Error interrupt status bit for APBH DMA Channel 9</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH10_ERROR_IRQ</name>
              <description>Error interrupt status bit for APBH DMA Channel 10</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH11_ERROR_IRQ</name>
              <description>Error interrupt status bit for APBH DMA Channel 11</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH12_ERROR_IRQ</name>
              <description>Error interrupt status bit for APBH DMA Channel 12</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH13_ERROR_IRQ</name>
              <description>Error interrupt status bit for APBH DMA Channel 13</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH14_ERROR_IRQ</name>
              <description>Error interrupt status bit for APBH DMA Channel 14</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH15_ERROR_IRQ</name>
              <description>Error interrupt status bit for APBH DMA Channel 15</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH0_ERROR_STATUS</name>
              <description>Error status bit for APBX DMA Channel 0</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TERMINATION</name>
                  <description>An early termination from the device causes error IRQ.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BUS_ERROR</name>
                  <description>An AHB bus error causes error IRQ.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CH1_ERROR_STATUS</name>
              <description>Error status bit for APBX DMA Channel 1</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TERMINATION</name>
                  <description>An early termination from the device causes error IRQ.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BUS_ERROR</name>
                  <description>An AHB bus error causes error IRQ.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CH2_ERROR_STATUS</name>
              <description>Error status bit for APBX DMA Channel 2</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TERMINATION</name>
                  <description>An early termination from the device causes error IRQ.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BUS_ERROR</name>
                  <description>An AHB bus error causes error IRQ.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CH3_ERROR_STATUS</name>
              <description>Error status bit for APBX DMA Channel 3</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TERMINATION</name>
                  <description>An early termination from the device causes error IRQ.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BUS_ERROR</name>
                  <description>An AHB bus error causes error IRQ.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CH4_ERROR_STATUS</name>
              <description>Error status bit for APBX DMA Channel 4</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TERMINATION</name>
                  <description>An early termination from the device causes error IRQ.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BUS_ERROR</name>
                  <description>An AHB bus error causes error IRQ.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CH5_ERROR_STATUS</name>
              <description>Error status bit for APBX DMA Channel 5</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TERMINATION</name>
                  <description>An early termination from the device causes error IRQ.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BUS_ERROR</name>
                  <description>An AHB bus error causes error IRQ.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CH6_ERROR_STATUS</name>
              <description>Error status bit for APBX DMA Channel 6</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TERMINATION</name>
                  <description>An early termination from the device causes error IRQ.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BUS_ERROR</name>
                  <description>An AHB bus error causes error IRQ.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CH7_ERROR_STATUS</name>
              <description>Error status bit for APBX DMA Channel 7</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TERMINATION</name>
                  <description>An early termination from the device causes error IRQ.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BUS_ERROR</name>
                  <description>An AHB bus error causes error IRQ.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CH8_ERROR_STATUS</name>
              <description>Error status bit for APBH DMA Channel 8</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TERMINATION</name>
                  <description>An early termination from the device causes error IRQ.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BUS_ERROR</name>
                  <description>An AHB bus error causes error IRQ.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CH9_ERROR_STATUS</name>
              <description>Error status bit for APBH DMA Channel 9</description>
              <bitOffset>0x19</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TERMINATION</name>
                  <description>An early termination from the device causes error IRQ.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BUS_ERROR</name>
                  <description>An AHB bus error causes error IRQ.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CH10_ERROR_STATUS</name>
              <description>Error status bit for APBH DMA Channel 10</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TERMINATION</name>
                  <description>An early termination from the device causes error IRQ.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BUS_ERROR</name>
                  <description>An AHB bus error causes error IRQ.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CH11_ERROR_STATUS</name>
              <description>Error status bit for APBH DMA Channel 11</description>
              <bitOffset>0x1B</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TERMINATION</name>
                  <description>An early termination from the device causes error IRQ.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BUS_ERROR</name>
                  <description>An AHB bus error causes error IRQ.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CH12_ERROR_STATUS</name>
              <description>Error status bit for APBH DMA Channel 12</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TERMINATION</name>
                  <description>An early termination from the device causes error IRQ.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BUS_ERROR</name>
                  <description>An AHB bus error causes error IRQ.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CH13_ERROR_STATUS</name>
              <description>Error status bit for APBH DMA Channel 13</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TERMINATION</name>
                  <description>An early termination from the device causes error IRQ.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BUS_ERROR</name>
                  <description>An AHB bus error causes error IRQ.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CH14_ERROR_STATUS</name>
              <description>Error status bit for APBH DMA Channel 14</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TERMINATION</name>
                  <description>An early termination from the device causes error IRQ.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BUS_ERROR</name>
                  <description>An AHB bus error causes error IRQ.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CH15_ERROR_STATUS</name>
              <description>Error status bit for APBH DMA Channel 15</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TERMINATION</name>
                  <description>An early termination from the device causes error IRQ.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BUS_ERROR</name>
                  <description>An AHB bus error causes error IRQ.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>CTRL2_TOG</name>
          <description>AHB to APBH Bridge Control and Status Register 2</description>
          <addressOffset>0x2C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>CH0_ERROR_IRQ</name>
              <description>Error interrupt status bit for APBX DMA Channel 0</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH1_ERROR_IRQ</name>
              <description>Error interrupt status bit for APBX DMA Channel 1</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH2_ERROR_IRQ</name>
              <description>Error interrupt status bit for APBX DMA Channel 2</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH3_ERROR_IRQ</name>
              <description>Error interrupt status bit for APBX DMA Channel 3</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH4_ERROR_IRQ</name>
              <description>Error interrupt status bit for APBX DMA Channel 4</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH5_ERROR_IRQ</name>
              <description>Error interrupt status bit for APBX DMA Channel 5</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH6_ERROR_IRQ</name>
              <description>Error interrupt status bit for APBX DMA Channel 6</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH7_ERROR_IRQ</name>
              <description>Error interrupt status bit for APBX DMA Channel 7</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH8_ERROR_IRQ</name>
              <description>Error interrupt status bit for APBH DMA Channel 8</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH9_ERROR_IRQ</name>
              <description>Error interrupt status bit for APBH DMA Channel 9</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH10_ERROR_IRQ</name>
              <description>Error interrupt status bit for APBH DMA Channel 10</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH11_ERROR_IRQ</name>
              <description>Error interrupt status bit for APBH DMA Channel 11</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH12_ERROR_IRQ</name>
              <description>Error interrupt status bit for APBH DMA Channel 12</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH13_ERROR_IRQ</name>
              <description>Error interrupt status bit for APBH DMA Channel 13</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH14_ERROR_IRQ</name>
              <description>Error interrupt status bit for APBH DMA Channel 14</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH15_ERROR_IRQ</name>
              <description>Error interrupt status bit for APBH DMA Channel 15</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH0_ERROR_STATUS</name>
              <description>Error status bit for APBX DMA Channel 0</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TERMINATION</name>
                  <description>An early termination from the device causes error IRQ.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BUS_ERROR</name>
                  <description>An AHB bus error causes error IRQ.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CH1_ERROR_STATUS</name>
              <description>Error status bit for APBX DMA Channel 1</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TERMINATION</name>
                  <description>An early termination from the device causes error IRQ.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BUS_ERROR</name>
                  <description>An AHB bus error causes error IRQ.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CH2_ERROR_STATUS</name>
              <description>Error status bit for APBX DMA Channel 2</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TERMINATION</name>
                  <description>An early termination from the device causes error IRQ.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BUS_ERROR</name>
                  <description>An AHB bus error causes error IRQ.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CH3_ERROR_STATUS</name>
              <description>Error status bit for APBX DMA Channel 3</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TERMINATION</name>
                  <description>An early termination from the device causes error IRQ.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BUS_ERROR</name>
                  <description>An AHB bus error causes error IRQ.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CH4_ERROR_STATUS</name>
              <description>Error status bit for APBX DMA Channel 4</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TERMINATION</name>
                  <description>An early termination from the device causes error IRQ.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BUS_ERROR</name>
                  <description>An AHB bus error causes error IRQ.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CH5_ERROR_STATUS</name>
              <description>Error status bit for APBX DMA Channel 5</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TERMINATION</name>
                  <description>An early termination from the device causes error IRQ.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BUS_ERROR</name>
                  <description>An AHB bus error causes error IRQ.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CH6_ERROR_STATUS</name>
              <description>Error status bit for APBX DMA Channel 6</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TERMINATION</name>
                  <description>An early termination from the device causes error IRQ.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BUS_ERROR</name>
                  <description>An AHB bus error causes error IRQ.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CH7_ERROR_STATUS</name>
              <description>Error status bit for APBX DMA Channel 7</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TERMINATION</name>
                  <description>An early termination from the device causes error IRQ.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BUS_ERROR</name>
                  <description>An AHB bus error causes error IRQ.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CH8_ERROR_STATUS</name>
              <description>Error status bit for APBH DMA Channel 8</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TERMINATION</name>
                  <description>An early termination from the device causes error IRQ.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BUS_ERROR</name>
                  <description>An AHB bus error causes error IRQ.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CH9_ERROR_STATUS</name>
              <description>Error status bit for APBH DMA Channel 9</description>
              <bitOffset>0x19</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TERMINATION</name>
                  <description>An early termination from the device causes error IRQ.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BUS_ERROR</name>
                  <description>An AHB bus error causes error IRQ.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CH10_ERROR_STATUS</name>
              <description>Error status bit for APBH DMA Channel 10</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TERMINATION</name>
                  <description>An early termination from the device causes error IRQ.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BUS_ERROR</name>
                  <description>An AHB bus error causes error IRQ.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CH11_ERROR_STATUS</name>
              <description>Error status bit for APBH DMA Channel 11</description>
              <bitOffset>0x1B</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TERMINATION</name>
                  <description>An early termination from the device causes error IRQ.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BUS_ERROR</name>
                  <description>An AHB bus error causes error IRQ.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CH12_ERROR_STATUS</name>
              <description>Error status bit for APBH DMA Channel 12</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TERMINATION</name>
                  <description>An early termination from the device causes error IRQ.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BUS_ERROR</name>
                  <description>An AHB bus error causes error IRQ.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CH13_ERROR_STATUS</name>
              <description>Error status bit for APBH DMA Channel 13</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TERMINATION</name>
                  <description>An early termination from the device causes error IRQ.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BUS_ERROR</name>
                  <description>An AHB bus error causes error IRQ.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CH14_ERROR_STATUS</name>
              <description>Error status bit for APBH DMA Channel 14</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TERMINATION</name>
                  <description>An early termination from the device causes error IRQ.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BUS_ERROR</name>
                  <description>An AHB bus error causes error IRQ.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CH15_ERROR_STATUS</name>
              <description>Error status bit for APBH DMA Channel 15</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TERMINATION</name>
                  <description>An early termination from the device causes error IRQ.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BUS_ERROR</name>
                  <description>An AHB bus error causes error IRQ.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>CHANNEL_CTRL</name>
          <description>AHB to APBH Bridge Channel Register</description>
          <addressOffset>0x30</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>FREEZE_CHANNEL</name>
              <description>Setting a bit in this field will freeze the DMA channel associated with it</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NAND0</name>
                  <description>no description available</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND1</name>
                  <description>no description available</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND2</name>
                  <description>no description available</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND3</name>
                  <description>no description available</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND4</name>
                  <description>no description available</description>
                  <value>0x10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND5</name>
                  <description>no description available</description>
                  <value>0x20</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND6</name>
                  <description>no description available</description>
                  <value>0x40</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND7</name>
                  <description>no description available</description>
                  <value>0x80</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SSP</name>
                  <description>no description available</description>
                  <value>0x100</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RESET_CHANNEL</name>
              <description>Setting a bit in this field causes the DMA controller to take the corresponding channel through its reset state</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NAND0</name>
                  <description>no description available</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND1</name>
                  <description>no description available</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND2</name>
                  <description>no description available</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND3</name>
                  <description>no description available</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND4</name>
                  <description>no description available</description>
                  <value>0x10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND5</name>
                  <description>no description available</description>
                  <value>0x20</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND6</name>
                  <description>no description available</description>
                  <value>0x40</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND7</name>
                  <description>no description available</description>
                  <value>0x80</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SSP</name>
                  <description>no description available</description>
                  <value>0x100</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>CHANNEL_CTRL_SET</name>
          <description>AHB to APBH Bridge Channel Register</description>
          <addressOffset>0x34</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>FREEZE_CHANNEL</name>
              <description>Setting a bit in this field will freeze the DMA channel associated with it</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NAND0</name>
                  <description>no description available</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND1</name>
                  <description>no description available</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND2</name>
                  <description>no description available</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND3</name>
                  <description>no description available</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND4</name>
                  <description>no description available</description>
                  <value>0x10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND5</name>
                  <description>no description available</description>
                  <value>0x20</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND6</name>
                  <description>no description available</description>
                  <value>0x40</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND7</name>
                  <description>no description available</description>
                  <value>0x80</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SSP</name>
                  <description>no description available</description>
                  <value>0x100</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RESET_CHANNEL</name>
              <description>Setting a bit in this field causes the DMA controller to take the corresponding channel through its reset state</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NAND0</name>
                  <description>no description available</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND1</name>
                  <description>no description available</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND2</name>
                  <description>no description available</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND3</name>
                  <description>no description available</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND4</name>
                  <description>no description available</description>
                  <value>0x10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND5</name>
                  <description>no description available</description>
                  <value>0x20</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND6</name>
                  <description>no description available</description>
                  <value>0x40</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND7</name>
                  <description>no description available</description>
                  <value>0x80</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SSP</name>
                  <description>no description available</description>
                  <value>0x100</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>CHANNEL_CTRL_CLR</name>
          <description>AHB to APBH Bridge Channel Register</description>
          <addressOffset>0x38</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>FREEZE_CHANNEL</name>
              <description>Setting a bit in this field will freeze the DMA channel associated with it</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NAND0</name>
                  <description>no description available</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND1</name>
                  <description>no description available</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND2</name>
                  <description>no description available</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND3</name>
                  <description>no description available</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND4</name>
                  <description>no description available</description>
                  <value>0x10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND5</name>
                  <description>no description available</description>
                  <value>0x20</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND6</name>
                  <description>no description available</description>
                  <value>0x40</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND7</name>
                  <description>no description available</description>
                  <value>0x80</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SSP</name>
                  <description>no description available</description>
                  <value>0x100</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RESET_CHANNEL</name>
              <description>Setting a bit in this field causes the DMA controller to take the corresponding channel through its reset state</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NAND0</name>
                  <description>no description available</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND1</name>
                  <description>no description available</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND2</name>
                  <description>no description available</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND3</name>
                  <description>no description available</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND4</name>
                  <description>no description available</description>
                  <value>0x10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND5</name>
                  <description>no description available</description>
                  <value>0x20</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND6</name>
                  <description>no description available</description>
                  <value>0x40</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND7</name>
                  <description>no description available</description>
                  <value>0x80</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SSP</name>
                  <description>no description available</description>
                  <value>0x100</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>CHANNEL_CTRL_TOG</name>
          <description>AHB to APBH Bridge Channel Register</description>
          <addressOffset>0x3C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>FREEZE_CHANNEL</name>
              <description>Setting a bit in this field will freeze the DMA channel associated with it</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NAND0</name>
                  <description>no description available</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND1</name>
                  <description>no description available</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND2</name>
                  <description>no description available</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND3</name>
                  <description>no description available</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND4</name>
                  <description>no description available</description>
                  <value>0x10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND5</name>
                  <description>no description available</description>
                  <value>0x20</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND6</name>
                  <description>no description available</description>
                  <value>0x40</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND7</name>
                  <description>no description available</description>
                  <value>0x80</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SSP</name>
                  <description>no description available</description>
                  <value>0x100</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RESET_CHANNEL</name>
              <description>Setting a bit in this field causes the DMA controller to take the corresponding channel through its reset state</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NAND0</name>
                  <description>no description available</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND1</name>
                  <description>no description available</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND2</name>
                  <description>no description available</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND3</name>
                  <description>no description available</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND4</name>
                  <description>no description available</description>
                  <value>0x10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND5</name>
                  <description>no description available</description>
                  <value>0x20</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND6</name>
                  <description>no description available</description>
                  <value>0x40</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND7</name>
                  <description>no description available</description>
                  <value>0x80</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SSP</name>
                  <description>no description available</description>
                  <value>0x100</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>DEVSEL</name>
          <description>AHB to APBH DMA Device Assignment Register</description>
          <addressOffset>0x40</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
        </register>
        <register>
          <name>DMA_BURST_SIZE</name>
          <description>AHB to APBH DMA burst size</description>
          <addressOffset>0x50</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x555555</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>CH0</name>
              <description>DMA burst size for GPMI channel 0. Do not change. GPMI only support burst size 4.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH1</name>
              <description>DMA burst size for GPMI channel 1. Do not change. GPMI only support burst size 4.</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH2</name>
              <description>DMA burst size for GPMI channel 2. Do not change. GPMI only support burst size 4.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH3</name>
              <description>DMA burst size for GPMI channel 3. Do not change. GPMI only support burst size 4.</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH4</name>
              <description>DMA burst size for GPMI channel 4. Do not change. GPMI only support burst size 4.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH5</name>
              <description>DMA burst size for GPMI channel 5. Do not change. GPMI only support burst size 4.</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH6</name>
              <description>DMA burst size for GPMI channel 6. Do not change. GPMI only support burst size 4.</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH7</name>
              <description>DMA burst size for GPMI channel 7. Do not change. GPMI only support burst size 4.</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH8</name>
              <description>DMA burst size for SSP.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>BURST0</name>
                  <description>no description available</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BURST4</name>
                  <description>no description available</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BURST8</name>
                  <description>no description available</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>DEBUG</name>
          <description>AHB to APBH DMA Debug Register</description>
          <addressOffset>0x60</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>GPMI_ONE_FIFO</name>
              <description>Set to 0ne and the 8 GPMI channels will share the DMA FIFO, and when set to zero, the 8 GPMI channels will use its own DMA FIFO</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <dim>16</dim>
          <dimIncrement>0x70</dimIncrement>
          <name>CH%s_CURCMDAR</name>
          <description>APBH DMA Channel n Current Command Address Register</description>
          <addressOffset>0x100</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>CMD_ADDR</name>
              <description>Pointer to command structure currently being processed for channel n.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <dim>16</dim>
          <dimIncrement>0x70</dimIncrement>
          <name>CH%s_NXTCMDAR</name>
          <description>APBH DMA Channel n Next Command Address Register</description>
          <addressOffset>0x110</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>CMD_ADDR</name>
              <description>Pointer to next command structure for channel n.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <dim>16</dim>
          <dimIncrement>0x70</dimIncrement>
          <name>CH%s_CMD</name>
          <description>APBH DMA Channel n Command Register</description>
          <addressOffset>0x120</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>COMMAND</name>
              <description>This bitfield indicates the type of current command:</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NO_DMA_XFER</name>
                  <description>Perform any requested PIO word transfers but terminate command before any DMA transfer.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DMA_WRITE</name>
                  <description>Perform any requested PIO word transfers and then perform a DMA transfer from the peripheral for the specified number of bytes.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DMA_READ</name>
                  <description>Perform any requested PIO word transfers and then perform a DMA transfer to the peripheral for the specified number of bytes.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DMA_SENSE</name>
                  <description>Perform any requested PIO word transfers and then perform a conditional branch to the next chained device. Follow the NEXCMD_ADDR pointer if the perpheral sense is true. Follow the BUFFER_ADDRESS as a chain pointer if the peripheral sense line is false.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CHAIN</name>
              <description>A value of one indicates that another command is chained onto the end of the current command structure</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>IRQONCMPLT</name>
              <description>A value of one indicates that the channel will cause the interrupt status bit to be set upon completion of the current command, i</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>NANDLOCK</name>
              <description>A value of one indicates that the NAND DMA channel will remain &quot;locked&quot; in the arbiter at the expense of other NAND DMA channels</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>NANDWAIT4READY</name>
              <description>A value of one indicates that the NAND DMA channel will will wait until the NAND device reports &quot;ready&quot; before executing the command</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>SEMAPHORE</name>
              <description>A value of one indicates that the channel will decrement its semaphore at the completion of the current command structure</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>WAIT4ENDCMD</name>
              <description>A value of one indicates that the channel will wait for the end of command signal to be sent from the APBH device to the DMA before starting the next DMA command</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>HALTONTERMINATE</name>
              <description>A value of one indicates that the channel will immeditately terminate the current descriptor and halt the DMA channel if a terminate signal is set</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>CMDWORDS</name>
              <description>This field indicates the number of command words to send to the GPMI0, starting with the base PIO address of the GPMI0 control register and incrementing from there</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>XFER_COUNT</name>
              <description>This field indicates the number of bytes to transfer to or from the appropriate PIO register in the GPMI0 device</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <dim>16</dim>
          <dimIncrement>0x70</dimIncrement>
          <name>CH%s_BAR</name>
          <description>APBH DMA Channel n Buffer Address Register</description>
          <addressOffset>0x130</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ADDRESS</name>
              <description>Address of system memory buffer to be read or written over the AHB bus.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <dim>16</dim>
          <dimIncrement>0x70</dimIncrement>
          <name>CH%s_SEMA</name>
          <description>APBH DMA Channel n Semaphore Register</description>
          <addressOffset>0x140</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>INCREMENT_SEMA</name>
              <description>The value written to this field is added to the semaphore count in an atomic way such that simultaneous software adds and DMA hardware substracts happening on the same clock are protected</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PHORE</name>
              <description>This read-only field shows the current (instantaneous) value of the semaphore counter.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <dim>16</dim>
          <dimIncrement>0x70</dimIncrement>
          <name>CH%s_DEBUG1</name>
          <description>AHB to APBH DMA Channel n Debug Information</description>
          <addressOffset>0x150</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0xA00000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>STATEMACHINE</name>
              <description>PIO Display of the DMA Channel n state machine state.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>IDLE</name>
                  <description>This is the idle state of the DMA state machine.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REQ_CMD1</name>
                  <description>State in which the DMA is waiting to receive the first word of a command.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REQ_CMD3</name>
                  <description>State in which the DMA is waiting to receive the third word of a command.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REQ_CMD2</name>
                  <description>State in which the DMA is waiting to receive the second word of a command.</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>XFER_DECODE</name>
                  <description>The state machine processes the descriptor command field in this state and branches accordingly.</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REQ_WAIT</name>
                  <description>The state machine waits in this state for the PIO APB cycles to complete.</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REQ_CMD4</name>
                  <description>State in which the DMA is waiting to receive the fourth word of a command, or waiting to receive the PIO words when PIO count is greater than 1.</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PIO_REQ</name>
                  <description>This state determines whether another PIO cycle needs to occur before starting DMA transfers.</description>
                  <value>0x7</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>READ_FLUSH</name>
                  <description>During a read transfers, the state machine enters this state waiting for the last bytes to be pushed out on the APB.</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>READ_WAIT</name>
                  <description>When an AHB read request occurs, the state machine waits in this state for the AHB transfer to complete.</description>
                  <value>0x9</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WRITE</name>
                  <description>During DMA Write transfers, the state machine waits in this state until the AHB master arbiter accepts the request from this channel.</description>
                  <value>0xC</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>READ_REQ</name>
                  <description>During DMA Read transfers, the state machine waits in this state until the AHB master arbiter accepts the request from this channel.</description>
                  <value>0xD</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CHECK_CHAIN</name>
                  <description>Upon completion of the DMA transfers, this state checks the value of the Chain bit and branches accordingly.</description>
                  <value>0xE</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>XFER_COMPLETE</name>
                  <description>The state machine goes to this state after the DMA transfers are complete, and determines what step to take next.</description>
                  <value>0xF</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TERMINATE</name>
                  <description>When a terminate signal is set, the state machine enters this state until the current AHB transfer is completed.</description>
                  <value>0x14</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WAIT_END</name>
                  <description>When the Wait for Command End bit is set, the state machine enters this state until the DMA device indicates that the command is complete.</description>
                  <value>0x15</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WRITE_WAIT</name>
                  <description>During DMA Write transfers, the state machine waits in this state until the AHB master completes the write to the AHB memory space.</description>
                  <value>0x1C</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HALT_AFTER_TERM</name>
                  <description>If HALTONTERMINATE is set and a terminate signal is set, the state machine enters this state and effectively halts. A channel reset is required to exit this state</description>
                  <value>0x1D</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CHECK_WAIT</name>
                  <description>If the Chain bit is a 0, the state machine enters this state and effectively halts.</description>
                  <value>0x1E</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WAIT_READY</name>
                  <description>When the NAND Wait for Ready bit is set, the state machine enters this state until the GPMI device indicates that the external device is ready.</description>
                  <value>0x1F</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WR_FIFO_FULL</name>
              <description>This bit reflects the current state of the DMA Channel's Write FIFO Full signal.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>WR_FIFO_EMPTY</name>
              <description>This bit reflects the current state of the DMA Channel's Write FIFO Empty signal.</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>RD_FIFO_FULL</name>
              <description>This bit reflects the current state of the DMA Channel's Read FIFO Full signal.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>RD_FIFO_EMPTY</name>
              <description>This bit reflects the current state of the DMA Channel's Read FIFO Empty signal.</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>NEXTCMDADDRVALID</name>
              <description>This bit reflects the internal bit which indicates whether the channel's next command address is valid</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>READY</name>
              <description>This bit is reserved for this DMA Channel and always reads 0.</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>END</name>
              <description>This bit reflects the current state of the DMA End Command Signal sent from the APB Device</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>KICK</name>
              <description>This bit reflects the current state of the DMA Kick Signal sent to the APB Device</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>BURST</name>
              <description>This bit reflects the current state of the DMA Burst Signal from the APB device</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>REQ</name>
              <description>This bit reflects the current state of the DMA Request Signal from the APB device</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <dim>16</dim>
          <dimIncrement>0x70</dimIncrement>
          <name>CH%s_DEBUG2</name>
          <description>AHB to APBH DMA Channel n Debug Information</description>
          <addressOffset>0x160</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>AHB_BYTES</name>
              <description>This value reflects the current number of AHB bytes remaining to be transfered in the current transfer</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>APB_BYTES</name>
              <description>This value reflects the current number of APB bytes remaining to be transfered in the current transfer</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>VERSION</name>
          <description>APBH Bridge Version Register</description>
          <addressOffset>0x800</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0x3010000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>STEP</name>
              <description>Fixed read-only value reflecting the stepping of the RTL version.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>MINOR</name>
              <description>Fixed read-only value reflecting the MINOR field of the RTL version.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>MAJOR</name>
              <description>Fixed read-only value reflecting the MAJOR field of the RTL version.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
      </registers>
    </peripheral>
    <peripheral>
      <name>GPMI</name>
      <description>GPMI</description>
      <groupName>GPMI</groupName>
      <prependToName>GPMI_</prependToName>
      <baseAddress>0x1806000</baseAddress>
      <addressBlock>
        <offset>0</offset>
        <size>0x134</size>
        <usage>registers</usage>
      </addressBlock>
      <interrupt>
        <name>RAWNAND_GPMI</name>
        <value>48</value>
      </interrupt>
      <registers>
        <register>
          <name>CTRL0</name>
          <description>GPMI Control Register 0 Description</description>
          <addressOffset>0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0xC0000000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>XFER_COUNT</name>
              <description>Number of bytes to transfer for this command. A value of zero will transfer 64K bytes.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ADDRESS_INCREMENT</name>
              <description>In ATA mode, the address will increment with each cycle</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ADDRESS_INCREMENT_0</name>
                  <description>Address does not increment.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ADDRESS_INCREMENT_1</name>
                  <description>Increment address.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ADDRESS</name>
              <description>Specifies the three address lines for ATA mode</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CS</name>
              <description>Selects which chip select is active for this command</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>WORD_LENGTH</name>
              <description>This bit should only be changed when RUN==0</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>WORD_LENGTH_1</name>
                  <description>8-bit Data Bus mode.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>COMMAND_MODE</name>
              <description>WRITE = 0x0 Write mode</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>COMMAND_MODE_0</name>
                  <description>Write mode.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>COMMAND_MODE_1</name>
                  <description>Read Mode.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>COMMAND_MODE_2</name>
                  <description>Read and Compare Mode (setting sense flop).</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>COMMAND_MODE_3</name>
                  <description>Wait for Ready.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>UDMA</name>
              <description>DISABLED = 0x0 Use ATA-PIO mode on the external bus</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>UDMA_0</name>
                  <description>Use ATA-PIO mode on the external bus.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>UDMA_1</name>
                  <description>Use ATA-Ultra DMA mode on the external bus.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>LOCK_CS</name>
              <description>For ATA/NAND mode: 0= Deassert chip select (CS) after RUN is complete</description>
              <bitOffset>0x1B</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DEV_IRQ_EN</name>
              <description>When set to '1' and ATA_IRQ pin is asserted, the GPMI_IRQ output will assert.</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RUN</name>
              <description>The GPMI is busy running a command whenever this bit is set to '1'</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CLKGATE</name>
              <description>Set this bit zero for normal operation</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SFTRST</name>
              <description>Set to zero for normal operation</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CTRL0_SET</name>
          <description>GPMI Control Register 0 Description</description>
          <addressOffset>0x4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0xC0000000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>XFER_COUNT</name>
              <description>Number of bytes to transfer for this command. A value of zero will transfer 64K bytes.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ADDRESS_INCREMENT</name>
              <description>In ATA mode, the address will increment with each cycle</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ADDRESS_INCREMENT_0</name>
                  <description>Address does not increment.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ADDRESS_INCREMENT_1</name>
                  <description>Increment address.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ADDRESS</name>
              <description>Specifies the three address lines for ATA mode</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CS</name>
              <description>Selects which chip select is active for this command</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>WORD_LENGTH</name>
              <description>This bit should only be changed when RUN==0</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>WORD_LENGTH_1</name>
                  <description>8-bit Data Bus mode.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>COMMAND_MODE</name>
              <description>WRITE = 0x0 Write mode</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>COMMAND_MODE_0</name>
                  <description>Write mode.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>COMMAND_MODE_1</name>
                  <description>Read Mode.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>COMMAND_MODE_2</name>
                  <description>Read and Compare Mode (setting sense flop).</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>COMMAND_MODE_3</name>
                  <description>Wait for Ready.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>UDMA</name>
              <description>DISABLED = 0x0 Use ATA-PIO mode on the external bus</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>UDMA_0</name>
                  <description>Use ATA-PIO mode on the external bus.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>UDMA_1</name>
                  <description>Use ATA-Ultra DMA mode on the external bus.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>LOCK_CS</name>
              <description>For ATA/NAND mode: 0= Deassert chip select (CS) after RUN is complete</description>
              <bitOffset>0x1B</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DEV_IRQ_EN</name>
              <description>When set to '1' and ATA_IRQ pin is asserted, the GPMI_IRQ output will assert.</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RUN</name>
              <description>The GPMI is busy running a command whenever this bit is set to '1'</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CLKGATE</name>
              <description>Set this bit zero for normal operation</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SFTRST</name>
              <description>Set to zero for normal operation</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CTRL0_CLR</name>
          <description>GPMI Control Register 0 Description</description>
          <addressOffset>0x8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0xC0000000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>XFER_COUNT</name>
              <description>Number of bytes to transfer for this command. A value of zero will transfer 64K bytes.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ADDRESS_INCREMENT</name>
              <description>In ATA mode, the address will increment with each cycle</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ADDRESS_INCREMENT_0</name>
                  <description>Address does not increment.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ADDRESS_INCREMENT_1</name>
                  <description>Increment address.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ADDRESS</name>
              <description>Specifies the three address lines for ATA mode</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CS</name>
              <description>Selects which chip select is active for this command</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>WORD_LENGTH</name>
              <description>This bit should only be changed when RUN==0</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>WORD_LENGTH_1</name>
                  <description>8-bit Data Bus mode.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>COMMAND_MODE</name>
              <description>WRITE = 0x0 Write mode</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>COMMAND_MODE_0</name>
                  <description>Write mode.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>COMMAND_MODE_1</name>
                  <description>Read Mode.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>COMMAND_MODE_2</name>
                  <description>Read and Compare Mode (setting sense flop).</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>COMMAND_MODE_3</name>
                  <description>Wait for Ready.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>UDMA</name>
              <description>DISABLED = 0x0 Use ATA-PIO mode on the external bus</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>UDMA_0</name>
                  <description>Use ATA-PIO mode on the external bus.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>UDMA_1</name>
                  <description>Use ATA-Ultra DMA mode on the external bus.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>LOCK_CS</name>
              <description>For ATA/NAND mode: 0= Deassert chip select (CS) after RUN is complete</description>
              <bitOffset>0x1B</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DEV_IRQ_EN</name>
              <description>When set to '1' and ATA_IRQ pin is asserted, the GPMI_IRQ output will assert.</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RUN</name>
              <description>The GPMI is busy running a command whenever this bit is set to '1'</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CLKGATE</name>
              <description>Set this bit zero for normal operation</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SFTRST</name>
              <description>Set to zero for normal operation</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CTRL0_TOG</name>
          <description>GPMI Control Register 0 Description</description>
          <addressOffset>0xC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0xC0000000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>XFER_COUNT</name>
              <description>Number of bytes to transfer for this command. A value of zero will transfer 64K bytes.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ADDRESS_INCREMENT</name>
              <description>In ATA mode, the address will increment with each cycle</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ADDRESS_INCREMENT_0</name>
                  <description>Address does not increment.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ADDRESS_INCREMENT_1</name>
                  <description>Increment address.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ADDRESS</name>
              <description>Specifies the three address lines for ATA mode</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CS</name>
              <description>Selects which chip select is active for this command</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>WORD_LENGTH</name>
              <description>This bit should only be changed when RUN==0</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>WORD_LENGTH_1</name>
                  <description>8-bit Data Bus mode.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>COMMAND_MODE</name>
              <description>WRITE = 0x0 Write mode</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>COMMAND_MODE_0</name>
                  <description>Write mode.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>COMMAND_MODE_1</name>
                  <description>Read Mode.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>COMMAND_MODE_2</name>
                  <description>Read and Compare Mode (setting sense flop).</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>COMMAND_MODE_3</name>
                  <description>Wait for Ready.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>UDMA</name>
              <description>DISABLED = 0x0 Use ATA-PIO mode on the external bus</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>UDMA_0</name>
                  <description>Use ATA-PIO mode on the external bus.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>UDMA_1</name>
                  <description>Use ATA-Ultra DMA mode on the external bus.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>LOCK_CS</name>
              <description>For ATA/NAND mode: 0= Deassert chip select (CS) after RUN is complete</description>
              <bitOffset>0x1B</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DEV_IRQ_EN</name>
              <description>When set to '1' and ATA_IRQ pin is asserted, the GPMI_IRQ output will assert.</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RUN</name>
              <description>The GPMI is busy running a command whenever this bit is set to '1'</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CLKGATE</name>
              <description>Set this bit zero for normal operation</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SFTRST</name>
              <description>Set to zero for normal operation</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>COMPARE</name>
          <description>GPMI Compare Register Description</description>
          <addressOffset>0x10</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>REFERENCE</name>
              <description>16-bit value which is XORed with data read from the NAND device.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>MASK</name>
              <description>16-bit mask which is applied after the read data is XORed with the REFERENCE bit field.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ECCCTRL</name>
          <description>GPMI Integrated ECC Control Register Description</description>
          <addressOffset>0x20</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BUFFER_MASK</name>
              <description>ECC buffer information</description>
              <bitOffset>0</bitOffset>
              <bitWidth>9</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Always write zeroes to this bit field.</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>ENABLE_ECC</name>
              <description>Enable ECC processing of GPMI transfers</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ECC_CMD</name>
              <description>ECC Command information</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD2</name>
              <description>Always write zeroes to this bit field.</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>HANDLE</name>
              <description>This is a register available to software to attach an identifier to a transaction in progress</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ECCCTRL_SET</name>
          <description>GPMI Integrated ECC Control Register Description</description>
          <addressOffset>0x24</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BUFFER_MASK</name>
              <description>ECC buffer information</description>
              <bitOffset>0</bitOffset>
              <bitWidth>9</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Always write zeroes to this bit field.</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>ENABLE_ECC</name>
              <description>Enable ECC processing of GPMI transfers</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ECC_CMD</name>
              <description>ECC Command information</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD2</name>
              <description>Always write zeroes to this bit field.</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>HANDLE</name>
              <description>This is a register available to software to attach an identifier to a transaction in progress</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ECCCTRL_CLR</name>
          <description>GPMI Integrated ECC Control Register Description</description>
          <addressOffset>0x28</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BUFFER_MASK</name>
              <description>ECC buffer information</description>
              <bitOffset>0</bitOffset>
              <bitWidth>9</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Always write zeroes to this bit field.</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>ENABLE_ECC</name>
              <description>Enable ECC processing of GPMI transfers</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ECC_CMD</name>
              <description>ECC Command information</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD2</name>
              <description>Always write zeroes to this bit field.</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>HANDLE</name>
              <description>This is a register available to software to attach an identifier to a transaction in progress</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ECCCTRL_TOG</name>
          <description>GPMI Integrated ECC Control Register Description</description>
          <addressOffset>0x2C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BUFFER_MASK</name>
              <description>ECC buffer information</description>
              <bitOffset>0</bitOffset>
              <bitWidth>9</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Always write zeroes to this bit field.</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>ENABLE_ECC</name>
              <description>Enable ECC processing of GPMI transfers</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ECC_CMD</name>
              <description>ECC Command information</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD2</name>
              <description>Always write zeroes to this bit field.</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>HANDLE</name>
              <description>This is a register available to software to attach an identifier to a transaction in progress</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ECCCOUNT</name>
          <description>GPMI Integrated ECC Transfer Count Register Description</description>
          <addressOffset>0x30</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>COUNT</name>
              <description>Number of bytes to pass through ECC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD2</name>
              <description>Always write zeroes to this bit field.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>PAYLOAD</name>
          <description>GPMI Payload Address Register Description</description>
          <addressOffset>0x40</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RSVD0</name>
              <description>Always write zeroes to this bit field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>ADDRESS</name>
              <description>Pointer to an array of one or more 512 byte payload buffers.</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>30</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>AUXILIARY</name>
          <description>GPMI Auxiliary Address Register Description</description>
          <addressOffset>0x50</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RSVD0</name>
              <description>Always write zeroes to this bit field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>ADDRESS</name>
              <description>Pointer to ECC control structure and meta-data storage.</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>30</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CTRL1</name>
          <description>GPMI Control Register 1 Description</description>
          <addressOffset>0x60</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x40004</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>GPMI_MODE</name>
              <description>ATA mode is only supported on channel zero</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>GPMI_MODE_0</name>
                  <description>NAND mode.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>GPMI_MODE_1</name>
                  <description>ATA mode.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CAMERA_MODE</name>
              <description>When set to 1 and ATA UDMA is enabled the UDMA interface becomes a camera interface.</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ATA_IRQRDY_POLARITY</name>
              <description>For ATA MODE: Note NAND_RDY_BUSY[3:2] are not affected by this bit</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ATA_IRQRDY_POLARITY_0</name>
                  <description>External RDY_BUSY[1] and RDY_BUSY[0] pins are ready when low and busy when high.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ATA_IRQRDY_POLARITY_1</name>
                  <description>External RDY_BUSY[1] and RDY_BUSY[0] pins are ready when high and busy when low.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DEV_RESET</name>
              <description>ENABLED = 0x0 NANDF_WP_B(WPN) pin is held low (asserted)</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DEV_RESET_0</name>
                  <description>NANDF_WP_B pin is held low (asserted).</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DEV_RESET_1</name>
                  <description>NANDF_WP_B pin is held high (de-asserted).</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ABORT_WAIT_FOR_READY_CHANNEL</name>
              <description>Abort a wait for ready command on selected channel</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ABORT_WAIT_REQUEST</name>
              <description>Request to abort &quot;wait for ready&quot; command on channel indicated by ABORT_WAIT_FOR_READY_CHANNEL</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BURST_EN</name>
              <description>When set to 1 each DMA request will generate a 4-transfer burst on the APB bus.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TIMEOUT_IRQ</name>
              <description>This bit is set when a timeout occurs using the Device_Busy_Timeout value. Write 0 to clear.</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DEV_IRQ</name>
              <description>This bit is set when an Interrupt is received from the ATA device. Write 0 to clear.</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DMA2ECC_MODE</name>
              <description>This is mainly for testing HWECC without involving the Nand device</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RDN_DELAY</name>
              <description>This variable is a factor in the calculated delay to apply to the internal read strobe for correct read data sampling</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>HALF_PERIOD</name>
              <description>Set this bit to 1 if the GPMI clock period is greater than 16ns for proper DLL operation</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DLL_ENABLE</name>
              <description>Set this bit to 1 to enable the GPMI DLL</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BCH_MODE</name>
              <description>This bit selects which error correction unit will access GPMI</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>GANGED_RDYBUSY</name>
              <description>Set this bit to 1 will force all Nand RDY_BUSY inputs to be sourced from (tied to) RDY_BUSY0</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TIMEOUT_IRQ_EN</name>
              <description>Setting this bit to '1' will enable timeout IRQ for transfers in ATA mode only, and for WAIT_FOR_READY commands in both ATA and Nand mode</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TEST_TRIGGER</name>
              <description>Test Trigger Enable</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TEST_TRIGGER_0</name>
                  <description>Disable</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TEST_TRIGGER_1</name>
                  <description>Enable</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WRN_DLY_SEL</name>
              <description>Since the GPMI write strobe (WRN) is a fast clock pin, the delay on this signal can be programmed to match the load on this pin</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DECOUPLE_CS</name>
              <description>Decouple Chip Select from DMA Channel</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SSYNCMODE</name>
              <description>source synchronouse mode 1 or asynchrous mode 0</description>
              <bitOffset>0x19</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>UPDATE_CS</name>
              <description>force the CS value is be updated to external chip select pin, even GPMI is idle.</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>GPMI_CLK_DIV2_EN</name>
              <description>This bit should be reset to 0 in asynchronous mode</description>
              <bitOffset>0x1B</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>GPMI_CLK_DIV2_EN_0</name>
                  <description>internal factor-2 clock divider is disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>GPMI_CLK_DIV2_EN_1</name>
                  <description>internal factor-2 clock divider is enabled.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TOGGLE_MODE</name>
              <description>enable samsung toggle mode.</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>WRITE_CLK_STOP</name>
              <description>In onfi source synchronous mode, host may save power during the data write cycles by holding the CLK signal high (i</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SSYNC_CLK_STOP</name>
              <description>set this bit to 1 will stop the source synchronous mode clk.</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DEV_CLK_STOP</name>
              <description>set this bit to 1 will stop gpmi io working clk.</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CTRL1_SET</name>
          <description>GPMI Control Register 1 Description</description>
          <addressOffset>0x64</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x40004</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>GPMI_MODE</name>
              <description>ATA mode is only supported on channel zero</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>GPMI_MODE_0</name>
                  <description>NAND mode.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>GPMI_MODE_1</name>
                  <description>ATA mode.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CAMERA_MODE</name>
              <description>When set to 1 and ATA UDMA is enabled the UDMA interface becomes a camera interface.</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ATA_IRQRDY_POLARITY</name>
              <description>For ATA MODE: Note NAND_RDY_BUSY[3:2] are not affected by this bit</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ATA_IRQRDY_POLARITY_0</name>
                  <description>External RDY_BUSY[1] and RDY_BUSY[0] pins are ready when low and busy when high.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ATA_IRQRDY_POLARITY_1</name>
                  <description>External RDY_BUSY[1] and RDY_BUSY[0] pins are ready when high and busy when low.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DEV_RESET</name>
              <description>ENABLED = 0x0 NANDF_WP_B(WPN) pin is held low (asserted)</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DEV_RESET_0</name>
                  <description>NANDF_WP_B pin is held low (asserted).</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DEV_RESET_1</name>
                  <description>NANDF_WP_B pin is held high (de-asserted).</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ABORT_WAIT_FOR_READY_CHANNEL</name>
              <description>Abort a wait for ready command on selected channel</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ABORT_WAIT_REQUEST</name>
              <description>Request to abort &quot;wait for ready&quot; command on channel indicated by ABORT_WAIT_FOR_READY_CHANNEL</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BURST_EN</name>
              <description>When set to 1 each DMA request will generate a 4-transfer burst on the APB bus.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TIMEOUT_IRQ</name>
              <description>This bit is set when a timeout occurs using the Device_Busy_Timeout value. Write 0 to clear.</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DEV_IRQ</name>
              <description>This bit is set when an Interrupt is received from the ATA device. Write 0 to clear.</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DMA2ECC_MODE</name>
              <description>This is mainly for testing HWECC without involving the Nand device</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RDN_DELAY</name>
              <description>This variable is a factor in the calculated delay to apply to the internal read strobe for correct read data sampling</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>HALF_PERIOD</name>
              <description>Set this bit to 1 if the GPMI clock period is greater than 16ns for proper DLL operation</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DLL_ENABLE</name>
              <description>Set this bit to 1 to enable the GPMI DLL</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BCH_MODE</name>
              <description>This bit selects which error correction unit will access GPMI</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>GANGED_RDYBUSY</name>
              <description>Set this bit to 1 will force all Nand RDY_BUSY inputs to be sourced from (tied to) RDY_BUSY0</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TIMEOUT_IRQ_EN</name>
              <description>Setting this bit to '1' will enable timeout IRQ for transfers in ATA mode only, and for WAIT_FOR_READY commands in both ATA and Nand mode</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TEST_TRIGGER</name>
              <description>Test Trigger Enable</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TEST_TRIGGER_0</name>
                  <description>Disable</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TEST_TRIGGER_1</name>
                  <description>Enable</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WRN_DLY_SEL</name>
              <description>Since the GPMI write strobe (WRN) is a fast clock pin, the delay on this signal can be programmed to match the load on this pin</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DECOUPLE_CS</name>
              <description>Decouple Chip Select from DMA Channel</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SSYNCMODE</name>
              <description>source synchronouse mode 1 or asynchrous mode 0</description>
              <bitOffset>0x19</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>UPDATE_CS</name>
              <description>force the CS value is be updated to external chip select pin, even GPMI is idle.</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>GPMI_CLK_DIV2_EN</name>
              <description>This bit should be reset to 0 in asynchronous mode</description>
              <bitOffset>0x1B</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>GPMI_CLK_DIV2_EN_0</name>
                  <description>internal factor-2 clock divider is disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>GPMI_CLK_DIV2_EN_1</name>
                  <description>internal factor-2 clock divider is enabled.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TOGGLE_MODE</name>
              <description>enable samsung toggle mode.</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>WRITE_CLK_STOP</name>
              <description>In onfi source synchronous mode, host may save power during the data write cycles by holding the CLK signal high (i</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SSYNC_CLK_STOP</name>
              <description>set this bit to 1 will stop the source synchronous mode clk.</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DEV_CLK_STOP</name>
              <description>set this bit to 1 will stop gpmi io working clk.</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CTRL1_CLR</name>
          <description>GPMI Control Register 1 Description</description>
          <addressOffset>0x68</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x40004</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>GPMI_MODE</name>
              <description>ATA mode is only supported on channel zero</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>GPMI_MODE_0</name>
                  <description>NAND mode.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>GPMI_MODE_1</name>
                  <description>ATA mode.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CAMERA_MODE</name>
              <description>When set to 1 and ATA UDMA is enabled the UDMA interface becomes a camera interface.</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ATA_IRQRDY_POLARITY</name>
              <description>For ATA MODE: Note NAND_RDY_BUSY[3:2] are not affected by this bit</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ATA_IRQRDY_POLARITY_0</name>
                  <description>External RDY_BUSY[1] and RDY_BUSY[0] pins are ready when low and busy when high.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ATA_IRQRDY_POLARITY_1</name>
                  <description>External RDY_BUSY[1] and RDY_BUSY[0] pins are ready when high and busy when low.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DEV_RESET</name>
              <description>ENABLED = 0x0 NANDF_WP_B(WPN) pin is held low (asserted)</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DEV_RESET_0</name>
                  <description>NANDF_WP_B pin is held low (asserted).</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DEV_RESET_1</name>
                  <description>NANDF_WP_B pin is held high (de-asserted).</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ABORT_WAIT_FOR_READY_CHANNEL</name>
              <description>Abort a wait for ready command on selected channel</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ABORT_WAIT_REQUEST</name>
              <description>Request to abort &quot;wait for ready&quot; command on channel indicated by ABORT_WAIT_FOR_READY_CHANNEL</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BURST_EN</name>
              <description>When set to 1 each DMA request will generate a 4-transfer burst on the APB bus.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TIMEOUT_IRQ</name>
              <description>This bit is set when a timeout occurs using the Device_Busy_Timeout value. Write 0 to clear.</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DEV_IRQ</name>
              <description>This bit is set when an Interrupt is received from the ATA device. Write 0 to clear.</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DMA2ECC_MODE</name>
              <description>This is mainly for testing HWECC without involving the Nand device</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RDN_DELAY</name>
              <description>This variable is a factor in the calculated delay to apply to the internal read strobe for correct read data sampling</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>HALF_PERIOD</name>
              <description>Set this bit to 1 if the GPMI clock period is greater than 16ns for proper DLL operation</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DLL_ENABLE</name>
              <description>Set this bit to 1 to enable the GPMI DLL</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BCH_MODE</name>
              <description>This bit selects which error correction unit will access GPMI</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>GANGED_RDYBUSY</name>
              <description>Set this bit to 1 will force all Nand RDY_BUSY inputs to be sourced from (tied to) RDY_BUSY0</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TIMEOUT_IRQ_EN</name>
              <description>Setting this bit to '1' will enable timeout IRQ for transfers in ATA mode only, and for WAIT_FOR_READY commands in both ATA and Nand mode</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TEST_TRIGGER</name>
              <description>Test Trigger Enable</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TEST_TRIGGER_0</name>
                  <description>Disable</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TEST_TRIGGER_1</name>
                  <description>Enable</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WRN_DLY_SEL</name>
              <description>Since the GPMI write strobe (WRN) is a fast clock pin, the delay on this signal can be programmed to match the load on this pin</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DECOUPLE_CS</name>
              <description>Decouple Chip Select from DMA Channel</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SSYNCMODE</name>
              <description>source synchronouse mode 1 or asynchrous mode 0</description>
              <bitOffset>0x19</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>UPDATE_CS</name>
              <description>force the CS value is be updated to external chip select pin, even GPMI is idle.</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>GPMI_CLK_DIV2_EN</name>
              <description>This bit should be reset to 0 in asynchronous mode</description>
              <bitOffset>0x1B</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>GPMI_CLK_DIV2_EN_0</name>
                  <description>internal factor-2 clock divider is disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>GPMI_CLK_DIV2_EN_1</name>
                  <description>internal factor-2 clock divider is enabled.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TOGGLE_MODE</name>
              <description>enable samsung toggle mode.</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>WRITE_CLK_STOP</name>
              <description>In onfi source synchronous mode, host may save power during the data write cycles by holding the CLK signal high (i</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SSYNC_CLK_STOP</name>
              <description>set this bit to 1 will stop the source synchronous mode clk.</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DEV_CLK_STOP</name>
              <description>set this bit to 1 will stop gpmi io working clk.</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CTRL1_TOG</name>
          <description>GPMI Control Register 1 Description</description>
          <addressOffset>0x6C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x40004</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>GPMI_MODE</name>
              <description>ATA mode is only supported on channel zero</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>GPMI_MODE_0</name>
                  <description>NAND mode.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>GPMI_MODE_1</name>
                  <description>ATA mode.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CAMERA_MODE</name>
              <description>When set to 1 and ATA UDMA is enabled the UDMA interface becomes a camera interface.</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ATA_IRQRDY_POLARITY</name>
              <description>For ATA MODE: Note NAND_RDY_BUSY[3:2] are not affected by this bit</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ATA_IRQRDY_POLARITY_0</name>
                  <description>External RDY_BUSY[1] and RDY_BUSY[0] pins are ready when low and busy when high.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ATA_IRQRDY_POLARITY_1</name>
                  <description>External RDY_BUSY[1] and RDY_BUSY[0] pins are ready when high and busy when low.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DEV_RESET</name>
              <description>ENABLED = 0x0 NANDF_WP_B(WPN) pin is held low (asserted)</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DEV_RESET_0</name>
                  <description>NANDF_WP_B pin is held low (asserted).</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DEV_RESET_1</name>
                  <description>NANDF_WP_B pin is held high (de-asserted).</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ABORT_WAIT_FOR_READY_CHANNEL</name>
              <description>Abort a wait for ready command on selected channel</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ABORT_WAIT_REQUEST</name>
              <description>Request to abort &quot;wait for ready&quot; command on channel indicated by ABORT_WAIT_FOR_READY_CHANNEL</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BURST_EN</name>
              <description>When set to 1 each DMA request will generate a 4-transfer burst on the APB bus.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TIMEOUT_IRQ</name>
              <description>This bit is set when a timeout occurs using the Device_Busy_Timeout value. Write 0 to clear.</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DEV_IRQ</name>
              <description>This bit is set when an Interrupt is received from the ATA device. Write 0 to clear.</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DMA2ECC_MODE</name>
              <description>This is mainly for testing HWECC without involving the Nand device</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RDN_DELAY</name>
              <description>This variable is a factor in the calculated delay to apply to the internal read strobe for correct read data sampling</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>HALF_PERIOD</name>
              <description>Set this bit to 1 if the GPMI clock period is greater than 16ns for proper DLL operation</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DLL_ENABLE</name>
              <description>Set this bit to 1 to enable the GPMI DLL</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BCH_MODE</name>
              <description>This bit selects which error correction unit will access GPMI</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>GANGED_RDYBUSY</name>
              <description>Set this bit to 1 will force all Nand RDY_BUSY inputs to be sourced from (tied to) RDY_BUSY0</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TIMEOUT_IRQ_EN</name>
              <description>Setting this bit to '1' will enable timeout IRQ for transfers in ATA mode only, and for WAIT_FOR_READY commands in both ATA and Nand mode</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TEST_TRIGGER</name>
              <description>Test Trigger Enable</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TEST_TRIGGER_0</name>
                  <description>Disable</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TEST_TRIGGER_1</name>
                  <description>Enable</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WRN_DLY_SEL</name>
              <description>Since the GPMI write strobe (WRN) is a fast clock pin, the delay on this signal can be programmed to match the load on this pin</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DECOUPLE_CS</name>
              <description>Decouple Chip Select from DMA Channel</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SSYNCMODE</name>
              <description>source synchronouse mode 1 or asynchrous mode 0</description>
              <bitOffset>0x19</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>UPDATE_CS</name>
              <description>force the CS value is be updated to external chip select pin, even GPMI is idle.</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>GPMI_CLK_DIV2_EN</name>
              <description>This bit should be reset to 0 in asynchronous mode</description>
              <bitOffset>0x1B</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>GPMI_CLK_DIV2_EN_0</name>
                  <description>internal factor-2 clock divider is disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>GPMI_CLK_DIV2_EN_1</name>
                  <description>internal factor-2 clock divider is enabled.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TOGGLE_MODE</name>
              <description>enable samsung toggle mode.</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>WRITE_CLK_STOP</name>
              <description>In onfi source synchronous mode, host may save power during the data write cycles by holding the CLK signal high (i</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SSYNC_CLK_STOP</name>
              <description>set this bit to 1 will stop the source synchronous mode clk.</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DEV_CLK_STOP</name>
              <description>set this bit to 1 will stop gpmi io working clk.</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>TIMING0</name>
          <description>GPMI Timing Register 0 Description</description>
          <addressOffset>0x70</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10203</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_SETUP</name>
              <description>Data bus setup time in GPMICLK cycles</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_HOLD</name>
              <description>Data bus hold time in GPMICLK cycles</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ADDRESS_SETUP</name>
              <description>Number of GPMICLK cycles that the CE/ADDR signals are active before a strobe is asserted</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Always write zeroes to this bit field.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>write-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>TIMING1</name>
          <description>GPMI Timing Register 1 Description</description>
          <addressOffset>0x80</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RSVD1</name>
              <description>Always write zeroes to this bit field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>DEVICE_BUSY_TIMEOUT</name>
              <description>Timeout waiting for NAND Ready/Busy or ATA IRQ</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>TIMING2</name>
          <description>GPMI Timing Register 2 Description</description>
          <addressOffset>0x90</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x3023336</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_PAUSE</name>
              <description>GPMI delay time from data pause to data resume in GPMICLK cycles</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CMDADD_PAUSE</name>
              <description>GPMI delay time from command or addres pause to command or address resume in GPMICLK cycles</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>POSTAMBLE_DELAY</name>
              <description>GPMI post-amble delay in GPMICLK cycles. A value of zero is interpreted as 16.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PREAMBLE_DELAY</name>
              <description>GPMI pre-amble delay in GPMICLK cycles. A value of zero is interpreted as 16.</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CE_DELAY</name>
              <description>GPMI dealy from CEn assert to W/Rn changing edge. value of zero is interpreted as 32.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Always write zeroes to this bit field.</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>READ_LATENCY</name>
              <description>This field is for double data rate read latency configuration. others READ LATENCY is 3</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>READ_LATENCY_0</name>
                  <description>READ LATENCY is 0</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>READ_LATENCY_1</name>
                  <description>READ LATENCY is 1</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>READ_LATENCY_2</name>
                  <description>READ LATENCY is 2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>READ_LATENCY_3</name>
                  <description>READ LATENCY is 3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>READ_LATENCY_4</name>
                  <description>READ LATENCY is 4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>READ_LATENCY_5</name>
                  <description>READ LATENCY is 5</description>
                  <value>0x5</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TCR</name>
              <description>Only for Toggle NAND timing control delay (TCR+1) GPMICLK cycles for CEn_B low to RE_B low, 0 is less than or equal to TCR, which is less than the PREAMBLE_DELAY</description>
              <bitOffset>0x1B</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TRPSTH</name>
              <description>Only for Toggle NAND timing control delay TRPSTH GPMICLK cycles for CEn_B high to RE_B high, A value of zero is interpreted as 8</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>DATA</name>
          <description>GPMI DMA Data Transfer Register Description</description>
          <addressOffset>0xA0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA</name>
              <description>In 8-bit mode, one, two, three or four bytes can can be accessed to send the same number of bus cycles</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>STAT</name>
          <description>GPMI Status Register Description</description>
          <addressOffset>0xB0</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>PRESENT</name>
              <description>UNAVAILABLE = 0x0 GPMI is not present in this product</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PRESENT_0</name>
                  <description>GPMI is not present in this product.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PRESENT_1</name>
                  <description>GPMI is present is in this product.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>FIFO_FULL</name>
              <description>NOT_FULL = 0x0 FIFO is not full. FULL = 0x1 FIFO is full.</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>FIFO_FULL_0</name>
                  <description>FIFO is not full.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FIFO_FULL_1</name>
                  <description>FIFO is full.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>FIFO_EMPTY</name>
              <description>NOT_EMPTY = 0x0 FIFO is not empty. EMPTY = 0x1 FIFO is empty.</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>FIFO_EMPTY_0</name>
                  <description>FIFO is not empty.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FIFO_EMPTY_1</name>
                  <description>FIFO is empty.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>INVALID_BUFFER_MASK</name>
              <description>Buffer Mask Validity bit.</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>INVALID_BUFFER_MASK_0</name>
                  <description>ECC Buffer Mask is not invalid.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>INVALID_BUFFER_MASK_1</name>
                  <description>ECC Buffer Mask is invalid.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ATA_IRQ</name>
              <description>Status of the ATA_IRQ input pin.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Always write zeroes to this bit field.</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>DEV0_ERROR</name>
              <description>DMA channel 0 (Timeout or compare failure, depending on COMMAND_MODE).</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DEV0_ERROR_0</name>
                  <description>No error condition present on ATA/NAND Device accessed by DMA channel 0.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DEV0_ERROR_1</name>
                  <description>An Error has occurred on ATA/NAND Device accessed by</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DEV1_ERROR</name>
              <description>DMA channel 1 (Timeout or compare failure, depending on COMMAND_MODE).</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DEV1_ERROR_0</name>
                  <description>No error condition present on ATA/NAND Device accessed by DMA channel 1.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DEV1_ERROR_1</name>
                  <description>An Error has occurred on ATA/NAND Device accessed by</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DEV2_ERROR</name>
              <description>DMA channel 2 (Timeout or compare failure, depending on COMMAND_MODE).</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DEV2_ERROR_0</name>
                  <description>No error condition present on ATA/NAND Device accessed by DMA channel 2.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DEV2_ERROR_1</name>
                  <description>An Error has occurred on ATA/NAND Device accessed by</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DEV3_ERROR</name>
              <description>DMA channel 3 (Timeout or compare failure, depending on COMMAND_MODE).</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DEV3_ERROR_0</name>
                  <description>No error condition present on ATA/NAND Device accessed by DMA channel 3.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DEV3_ERROR_1</name>
                  <description>An Error has occurred on ATA/NAND Device accessed by</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DEV4_ERROR</name>
              <description>DMA channel 4 (Timeout or compare failure, depending on COMMAND_MODE).</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DEV4_ERROR_0</name>
                  <description>No error condition present on ATA/NAND Device accessed by DMA channel 4.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DEV4_ERROR_1</name>
                  <description>An Error has occurred on ATA/NAND Device accessed by</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DEV5_ERROR</name>
              <description>DMA channel 5 (Timeout or compare failure, depending on COMMAND_MODE).</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DEV5_ERROR_0</name>
                  <description>No error condition present on ATA/NAND Device accessed by DMA channel 5.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DEV5_ERROR_1</name>
                  <description>An Error has occurred on ATA/NAND Device accessed by</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DEV6_ERROR</name>
              <description>DMA channel 6 (Timeout or compare failure, depending on COMMAND_MODE).</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DEV6_ERROR_0</name>
                  <description>No error condition present on ATA/NAND Device accessed by DMA channel 6.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DEV6_ERROR_1</name>
                  <description>An Error has occurred on ATA/NAND Device accessed by</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DEV7_ERROR</name>
              <description>DMA channel 7 (Timeout or compare failure, depending on COMMAND_MODE).</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DEV7_ERROR_0</name>
                  <description>No error condition present on ATA/NAND Device accessed by DMA channel 7.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DEV7_ERROR_1</name>
                  <description>An Error has occurred on ATA/NAND Device accessed by</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RDY_TIMEOUT</name>
              <description>State of the RDY/BUSY Timeout Flags</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>READY_BUSY</name>
              <description>Read-only view of NAND Ready_Busy Input pins.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>DEBUG</name>
          <description>GPMI Debug Information Register Description</description>
          <addressOffset>0xC0</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>CMD_END</name>
              <description>Read Only view of the Command End toggle signals to DMA. One per channel</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>DMAREQ</name>
              <description>Read-only view of DMA request line for 8 DMA channels</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>DMA_SENSE</name>
              <description>Read-only view of sense state of the 8 DMA channels</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>WAIT_FOR_READY_END</name>
              <description>Read Only view of the Wait_For_Ready End toggle signals to DMA. One per channel</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>VERSION</name>
          <description>GPMI Version Register Description</description>
          <addressOffset>0xD0</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0x5020000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>STEP</name>
              <description>Fixed read-only value reflecting the stepping of the RTL version.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>MINOR</name>
              <description>Fixed read-only value reflecting the MINOR field of the RTL version.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>MAJOR</name>
              <description>Fixed read-only value reflecting the MAJOR field of the RTL version.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>DEBUG2</name>
          <description>GPMI Debug2 Information Register Description</description>
          <addressOffset>0xE0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0xF100</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RDN_TAP</name>
              <description>This is the DLL tap calculated by the DLL controller</description>
              <bitOffset>0</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>UPDATE_WINDOW</name>
              <description>A 1 indicates that the DLL is busy generating the required delay.</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>VIEW_DELAYED_RDN</name>
              <description>Set to a 1 to select the delayed feedback RE_B to drive the GPMI_ADDR[0] (Nand CLE) pin</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SYND2GPMI_READY</name>
              <description>Data handshake Input from BCH.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>SYND2GPMI_VALID</name>
              <description>Data handshake Input from BCH.</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>GPMI2SYND_READY</name>
              <description>Data handshake output to BCH.</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>GPMI2SYND_VALID</name>
              <description>Data handshake output to BCH.</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>SYND2GPMI_BE</name>
              <description>Data byte enable Input from BCH.</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>MAIN_STATE</name>
              <description>parameter MSM_IDLE = 4'h0, MSM_BYTCNT = 4'h1, MSM_WAITFE = 4'h2, MSM_WAITFR = 4'h3, MSM_DMAREQ = 4'h4, MSM_DMAACK = 4'h5, MSM_WAITFF = 4'h6, MSM_LDFIFO = 4'h7, MSM_LDDMAR = 4'h8, MSM_RDCMP = 4'h9, MSM_DONE = 4'hA</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>PIN_STATE</name>
              <description>parameter PSM_IDLE = 3'h0, PSM_BYTCNT = 3'h1, PSM_ADDR = 3'h2, PSM_STALL = 3'h3, PSM_STROBE = 3'h4, PSM_ATARDY = 3'h5, PSM_DHOLD = 3'h6, PSM_DONE = 3'h7</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>BUSY</name>
              <description>When asserted the GPMI is busy</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>UDMA_STATE</name>
              <description>USM_IDLE = 4'h0, idle USM_DMARQ = 4'h1, DMA req USM_ACK = 4'h2, DMA ACK USM_FIFO_E = 4'h3, Fifo empty USM_WPAUSE = 4'h4, WR DMA Paused by device USM_TSTRB = 4'h5, Toggle HSTROBE USM_CAPTUR = 4'h6, Capture Stage, (data sampled with DSTROBE is valid) USM_DATOUT = 4'h7, Change Burst DATAOUT USM_CRC = 4'h8, Source CRC to Device USM_WAIT_R = 4'h9, Waiting for DDMARDY- USM_END = 4'ha; Negate DMAACK (end of DMA) USM_WAIT_S = 4'hb, Waiting for DSTROBE USM_RPAUSE = 4'hc, Rd DMA Paused by Host USM_RSTOP = 4'hd, Rd DMA Stopped by Host USM_WTERM = 4'he, Wr DMA Termination State USM_RTERM = 4'hf, Rd DMA Termination state</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Always write zeroes to this bit field.</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>DEBUG3</name>
          <description>GPMI Debug3 Information Register Description</description>
          <addressOffset>0xF0</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DEV_WORD_CNTR</name>
              <description>Reflects the number of bytes remains to be transferred on the ATA/Nand bus.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>APB_WORD_CNTR</name>
              <description>Reflects the number of bytes remains to be transferred on the APB bus.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>READ_DDR_DLL_CTRL</name>
          <description>GPMI Double Rate Read DLL Control Register Description</description>
          <addressOffset>0x100</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x38</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ENABLE</name>
              <description>Set this bit to 1 to enable the DLL and delay chain; otherwise; set to 0 to bypasses DLL</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RESET</name>
              <description>Setting this bit to 1 force a reset on DLL</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SLV_FORCE_UPD</name>
              <description>Setting this bit to 1, forces the slave delay line to update to the DLL calibrated value immediately</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SLV_DLY_TARGET</name>
              <description>The delay target for the read clock is can be programmed in 1/16th increments of an GPMICLK half-period</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>GATE_UPDATE</name>
              <description>Setting this bit to 1, forces the slave delay line not update</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>REFCLK_ON</name>
              <description>set this bit to 1 will turn on the reference clock</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SLV_OVERRIDE</name>
              <description>Set this bit to 1 to Enable manual override for slave delay chain using SLV_OVERRIDE_VAL; to set 0 to disable manual override</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SLV_OVERRIDE_VAL</name>
              <description>When SLV_OVERRIDE=1 This field is used to select 1 of 256 physical taps manually</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>SLV_UPDATE_INT</name>
              <description>Setting a value greater than 0 in this field, shall over-ride the default slave delay-line update interval of 256 GPMICLK cycles</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>REF_UPDATE_INT</name>
              <description>This field allows the user to add additional delay cycles to the DLL control loop (reference delay line control)</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WRITE_DDR_DLL_CTRL</name>
          <description>GPMI Double Rate Write DLL Control Register Description</description>
          <addressOffset>0x110</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x38</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ENABLE</name>
              <description>Set this bit to 1 to enable the DLL and delay chain; otherwise; set to 0 to bypasses DLL</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RESET</name>
              <description>Setting this bit to 1 force a reset on DLL</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SLV_FORCE_UPD</name>
              <description>Setting this bit to 1, forces the slave delay line to update to the DLL calibrated value immediately</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SLV_DLY_TARGET</name>
              <description>The delay target for the read clock can be programmed in 1/16th increments of an GPMICLK half-period</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>GATE_UPDATE</name>
              <description>Setting this bit to 1, forces the slave delay line not update</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>REFCLK_ON</name>
              <description>set this bit to 1 will turn on the reference clock</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SLV_OVERRIDE</name>
              <description>Set this bit to 1 to Enable manual override for slave delay chain using SLV_OVERRIDE_VAL; to set 0 to disable manual override</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SLV_OVERRIDE_VAL</name>
              <description>When SLV_OVERRIDE=1 This field is used to select 1 of 256 physical taps manually</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>SLV_UPDATE_INT</name>
              <description>Setting a value greater than 0 in this field, shall over-ride the default slave delay-line update interval of 256 GPMICLK cycles</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>REF_UPDATE_INT</name>
              <description>This field allows the user to add additional delay cycles to the DLL control loop (reference delay line control)</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>READ_DDR_DLL_STS</name>
          <description>GPMI Double Rate Read DLL Status Register Description</description>
          <addressOffset>0x120</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SLV_LOCK</name>
              <description>Slave delay-line lock status</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>SLV_SEL</name>
              <description>Slave delay line select status</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>7</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>REF_LOCK</name>
              <description>Reference DLL lock status</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>REF_SEL</name>
              <description>Reference delay line select status.</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved</description>
              <bitOffset>0x19</bitOffset>
              <bitWidth>7</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WRITE_DDR_DLL_STS</name>
          <description>GPMI Double Rate Write DLL Status Register Description</description>
          <addressOffset>0x130</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SLV_LOCK</name>
              <description>Slave delay-line lock status</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>SLV_SEL</name>
              <description>Slave delay line select status</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>7</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>REF_LOCK</name>
              <description>Reference DLL lock status</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>REF_SEL</name>
              <description>Reference delay line select status.</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved</description>
              <bitOffset>0x19</bitOffset>
              <bitWidth>7</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
      </registers>
    </peripheral>
    <peripheral>
      <name>BCH</name>
      <description>BCH Register Reference Index</description>
      <groupName>BCH</groupName>
      <prependToName>BCH_</prependToName>
      <baseAddress>0x1808000</baseAddress>
      <addressBlock>
        <offset>0</offset>
        <size>0x180</size>
        <usage>registers</usage>
      </addressBlock>
      <interrupt>
        <name>RAWNAND_BCH</name>
        <value>47</value>
      </interrupt>
      <registers>
        <register>
          <name>CTRL</name>
          <description>Hardware BCH ECC Accelerator Control Register</description>
          <addressOffset>0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0xC0000000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>COMPLETE_IRQ</name>
              <description>This bit indicates the state of the external interrupt line</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD0</name>
              <description>This field is reserved.</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>DEBUG_STALL_IRQ</name>
              <description>DEBUG STALL Interrupt Status. Write a 1 to the SCT clear address to clear the interrupt status bit.</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BM_ERROR_IRQ</name>
              <description>AHB Bus interface Error Interrupt Status</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>This field is reserved.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>COMPLETE_IRQ_EN</name>
              <description>1 = interrupt on completion of correction is enabled.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD2</name>
              <description>This field is reserved.</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>DEBUG_STALL_IRQ_EN</name>
              <description>1 = interrupt on debug stall mode is enabled. The IRQ is raised on every block</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD3</name>
              <description>This field is reserved.</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>M2M_ENABLE</name>
              <description>NOTE! WRITING THIS BIT INITIATES A MEMORY-TO-MEMORY OPERATION</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>M2M_ENCODE</name>
              <description>Selects encode (parity generation) or decode (correction) mode for memory-to-memory operations.</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>M2M_LAYOUT</name>
              <description>Selects the flash page format for memory-to-memory operations.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD4</name>
              <description>This field is reserved.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>DEBUGSYNDROME</name>
              <description>(For debug purposes only)</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD5</name>
              <description>This field is reserved.</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>7</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>CLKGATE</name>
              <description>This bit must be set to 0 for normal operation. When set to 1 it gates off the clocks to the block.</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RUN</name>
                  <description>Allow BCH to operate normally.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NO_CLKS</name>
                  <description>Do not clock BCH gates in order to minimize power consumption.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SFTRST</name>
              <description>Set this bit to 0 to enable normal BCH operation</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RUN</name>
                  <description>Allow BCH to operate normally.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RESET</name>
                  <description>Hold BCH in reset.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>CTRL_SET</name>
          <description>Hardware BCH ECC Accelerator Control Register</description>
          <addressOffset>0x4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0xC0000000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>COMPLETE_IRQ</name>
              <description>This bit indicates the state of the external interrupt line</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD0</name>
              <description>This field is reserved.</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>DEBUG_STALL_IRQ</name>
              <description>DEBUG STALL Interrupt Status. Write a 1 to the SCT clear address to clear the interrupt status bit.</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BM_ERROR_IRQ</name>
              <description>AHB Bus interface Error Interrupt Status</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>This field is reserved.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>COMPLETE_IRQ_EN</name>
              <description>1 = interrupt on completion of correction is enabled.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD2</name>
              <description>This field is reserved.</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>DEBUG_STALL_IRQ_EN</name>
              <description>1 = interrupt on debug stall mode is enabled. The IRQ is raised on every block</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD3</name>
              <description>This field is reserved.</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>M2M_ENABLE</name>
              <description>NOTE! WRITING THIS BIT INITIATES A MEMORY-TO-MEMORY OPERATION</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>M2M_ENCODE</name>
              <description>Selects encode (parity generation) or decode (correction) mode for memory-to-memory operations.</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>M2M_LAYOUT</name>
              <description>Selects the flash page format for memory-to-memory operations.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD4</name>
              <description>This field is reserved.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>DEBUGSYNDROME</name>
              <description>(For debug purposes only)</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD5</name>
              <description>This field is reserved.</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>7</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>CLKGATE</name>
              <description>This bit must be set to 0 for normal operation. When set to 1 it gates off the clocks to the block.</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RUN</name>
                  <description>Allow BCH to operate normally.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NO_CLKS</name>
                  <description>Do not clock BCH gates in order to minimize power consumption.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SFTRST</name>
              <description>Set this bit to 0 to enable normal BCH operation</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RUN</name>
                  <description>Allow BCH to operate normally.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RESET</name>
                  <description>Hold BCH in reset.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>CTRL_CLR</name>
          <description>Hardware BCH ECC Accelerator Control Register</description>
          <addressOffset>0x8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0xC0000000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>COMPLETE_IRQ</name>
              <description>This bit indicates the state of the external interrupt line</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD0</name>
              <description>This field is reserved.</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>DEBUG_STALL_IRQ</name>
              <description>DEBUG STALL Interrupt Status. Write a 1 to the SCT clear address to clear the interrupt status bit.</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BM_ERROR_IRQ</name>
              <description>AHB Bus interface Error Interrupt Status</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>This field is reserved.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>COMPLETE_IRQ_EN</name>
              <description>1 = interrupt on completion of correction is enabled.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD2</name>
              <description>This field is reserved.</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>DEBUG_STALL_IRQ_EN</name>
              <description>1 = interrupt on debug stall mode is enabled. The IRQ is raised on every block</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD3</name>
              <description>This field is reserved.</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>M2M_ENABLE</name>
              <description>NOTE! WRITING THIS BIT INITIATES A MEMORY-TO-MEMORY OPERATION</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>M2M_ENCODE</name>
              <description>Selects encode (parity generation) or decode (correction) mode for memory-to-memory operations.</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>M2M_LAYOUT</name>
              <description>Selects the flash page format for memory-to-memory operations.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD4</name>
              <description>This field is reserved.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>DEBUGSYNDROME</name>
              <description>(For debug purposes only)</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD5</name>
              <description>This field is reserved.</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>7</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>CLKGATE</name>
              <description>This bit must be set to 0 for normal operation. When set to 1 it gates off the clocks to the block.</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RUN</name>
                  <description>Allow BCH to operate normally.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NO_CLKS</name>
                  <description>Do not clock BCH gates in order to minimize power consumption.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SFTRST</name>
              <description>Set this bit to 0 to enable normal BCH operation</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RUN</name>
                  <description>Allow BCH to operate normally.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RESET</name>
                  <description>Hold BCH in reset.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>CTRL_TOG</name>
          <description>Hardware BCH ECC Accelerator Control Register</description>
          <addressOffset>0xC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0xC0000000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>COMPLETE_IRQ</name>
              <description>This bit indicates the state of the external interrupt line</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD0</name>
              <description>This field is reserved.</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>DEBUG_STALL_IRQ</name>
              <description>DEBUG STALL Interrupt Status. Write a 1 to the SCT clear address to clear the interrupt status bit.</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BM_ERROR_IRQ</name>
              <description>AHB Bus interface Error Interrupt Status</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>This field is reserved.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>COMPLETE_IRQ_EN</name>
              <description>1 = interrupt on completion of correction is enabled.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD2</name>
              <description>This field is reserved.</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>DEBUG_STALL_IRQ_EN</name>
              <description>1 = interrupt on debug stall mode is enabled. The IRQ is raised on every block</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD3</name>
              <description>This field is reserved.</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>M2M_ENABLE</name>
              <description>NOTE! WRITING THIS BIT INITIATES A MEMORY-TO-MEMORY OPERATION</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>M2M_ENCODE</name>
              <description>Selects encode (parity generation) or decode (correction) mode for memory-to-memory operations.</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>M2M_LAYOUT</name>
              <description>Selects the flash page format for memory-to-memory operations.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD4</name>
              <description>This field is reserved.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>DEBUGSYNDROME</name>
              <description>(For debug purposes only)</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD5</name>
              <description>This field is reserved.</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>7</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>CLKGATE</name>
              <description>This bit must be set to 0 for normal operation. When set to 1 it gates off the clocks to the block.</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RUN</name>
                  <description>Allow BCH to operate normally.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NO_CLKS</name>
                  <description>Do not clock BCH gates in order to minimize power consumption.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SFTRST</name>
              <description>Set this bit to 0 to enable normal BCH operation</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RUN</name>
                  <description>Allow BCH to operate normally.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RESET</name>
                  <description>Hold BCH in reset.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>STATUS0</name>
          <description>Hardware ECC Accelerator Status Register 0</description>
          <addressOffset>0x10</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0x10</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RSVD0</name>
              <description>This field is reserved.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>UNCORRECTABLE</name>
              <description>1 = Uncorrectable error encountered during last processing cycle.</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>CORRECTED</name>
              <description>1 = At least one correctable error encountered during last processing cycle.</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>ALLONES</name>
              <description>1 = All data bits of this transaction are ONE.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>This field is reserved.</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>STATUS_BLK0</name>
              <description>Count of symbols in error during processing of first block of flash (metadata block)</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ZERO</name>
                  <description>No errors found on block.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ERROR1</name>
                  <description>One error found on block.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ERROR2</name>
                  <description>One errors found on block.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ERROR3</name>
                  <description>One errors found on block.</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ERROR4</name>
                  <description>One errors found on block.</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>UNCORRECTABLE</name>
                  <description>Block exhibited uncorrectable errors.</description>
                  <value>0xFE</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ERASED</name>
                  <description>Page is erased.</description>
                  <value>0xFF</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>COMPLETED_CE</name>
              <description>This is the chip enable number corresponding to the NAND device from which this data came.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>HANDLE</name>
              <description>Software supplies a 12 bit handle for this transfer as part of the GPMI DMA PIO operation that started the transaction</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>12</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>STATUS0_SET</name>
          <description>Hardware ECC Accelerator Status Register 0</description>
          <addressOffset>0x14</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0x10</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RSVD0</name>
              <description>This field is reserved.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>UNCORRECTABLE</name>
              <description>1 = Uncorrectable error encountered during last processing cycle.</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>CORRECTED</name>
              <description>1 = At least one correctable error encountered during last processing cycle.</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>ALLONES</name>
              <description>1 = All data bits of this transaction are ONE.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>This field is reserved.</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>STATUS_BLK0</name>
              <description>Count of symbols in error during processing of first block of flash (metadata block)</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ZERO</name>
                  <description>No errors found on block.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ERROR1</name>
                  <description>One error found on block.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ERROR2</name>
                  <description>One errors found on block.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ERROR3</name>
                  <description>One errors found on block.</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ERROR4</name>
                  <description>One errors found on block.</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>UNCORRECTABLE</name>
                  <description>Block exhibited uncorrectable errors.</description>
                  <value>0xFE</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ERASED</name>
                  <description>Page is erased.</description>
                  <value>0xFF</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>COMPLETED_CE</name>
              <description>This is the chip enable number corresponding to the NAND device from which this data came.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>HANDLE</name>
              <description>Software supplies a 12 bit handle for this transfer as part of the GPMI DMA PIO operation that started the transaction</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>12</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>STATUS0_CLR</name>
          <description>Hardware ECC Accelerator Status Register 0</description>
          <addressOffset>0x18</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0x10</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RSVD0</name>
              <description>This field is reserved.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>UNCORRECTABLE</name>
              <description>1 = Uncorrectable error encountered during last processing cycle.</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>CORRECTED</name>
              <description>1 = At least one correctable error encountered during last processing cycle.</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>ALLONES</name>
              <description>1 = All data bits of this transaction are ONE.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>This field is reserved.</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>STATUS_BLK0</name>
              <description>Count of symbols in error during processing of first block of flash (metadata block)</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ZERO</name>
                  <description>No errors found on block.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ERROR1</name>
                  <description>One error found on block.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ERROR2</name>
                  <description>One errors found on block.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ERROR3</name>
                  <description>One errors found on block.</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ERROR4</name>
                  <description>One errors found on block.</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>UNCORRECTABLE</name>
                  <description>Block exhibited uncorrectable errors.</description>
                  <value>0xFE</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ERASED</name>
                  <description>Page is erased.</description>
                  <value>0xFF</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>COMPLETED_CE</name>
              <description>This is the chip enable number corresponding to the NAND device from which this data came.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>HANDLE</name>
              <description>Software supplies a 12 bit handle for this transfer as part of the GPMI DMA PIO operation that started the transaction</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>12</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>STATUS0_TOG</name>
          <description>Hardware ECC Accelerator Status Register 0</description>
          <addressOffset>0x1C</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0x10</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RSVD0</name>
              <description>This field is reserved.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>UNCORRECTABLE</name>
              <description>1 = Uncorrectable error encountered during last processing cycle.</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>CORRECTED</name>
              <description>1 = At least one correctable error encountered during last processing cycle.</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>ALLONES</name>
              <description>1 = All data bits of this transaction are ONE.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>This field is reserved.</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>STATUS_BLK0</name>
              <description>Count of symbols in error during processing of first block of flash (metadata block)</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ZERO</name>
                  <description>No errors found on block.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ERROR1</name>
                  <description>One error found on block.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ERROR2</name>
                  <description>One errors found on block.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ERROR3</name>
                  <description>One errors found on block.</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ERROR4</name>
                  <description>One errors found on block.</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>UNCORRECTABLE</name>
                  <description>Block exhibited uncorrectable errors.</description>
                  <value>0xFE</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ERASED</name>
                  <description>Page is erased.</description>
                  <value>0xFF</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>COMPLETED_CE</name>
              <description>This is the chip enable number corresponding to the NAND device from which this data came.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>HANDLE</name>
              <description>Software supplies a 12 bit handle for this transfer as part of the GPMI DMA PIO operation that started the transaction</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>12</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>MODE</name>
          <description>Hardware ECC Accelerator Mode Register</description>
          <addressOffset>0x20</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ERASE_THRESHOLD</name>
              <description>This value indicates the maximum number of zero bits on a flash subpage for it to be considered erased</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD</name>
              <description>This field is reserved.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>24</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>MODE_SET</name>
          <description>Hardware ECC Accelerator Mode Register</description>
          <addressOffset>0x24</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ERASE_THRESHOLD</name>
              <description>This value indicates the maximum number of zero bits on a flash subpage for it to be considered erased</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD</name>
              <description>This field is reserved.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>24</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>MODE_CLR</name>
          <description>Hardware ECC Accelerator Mode Register</description>
          <addressOffset>0x28</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ERASE_THRESHOLD</name>
              <description>This value indicates the maximum number of zero bits on a flash subpage for it to be considered erased</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD</name>
              <description>This field is reserved.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>24</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>MODE_TOG</name>
          <description>Hardware ECC Accelerator Mode Register</description>
          <addressOffset>0x2C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ERASE_THRESHOLD</name>
              <description>This value indicates the maximum number of zero bits on a flash subpage for it to be considered erased</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD</name>
              <description>This field is reserved.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>24</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ENCODEPTR</name>
          <description>Hardware BCH ECC Loopback Encode Buffer Register</description>
          <addressOffset>0x30</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ADDR</name>
              <description>Address pointer to encode buffer</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ENCODEPTR_SET</name>
          <description>Hardware BCH ECC Loopback Encode Buffer Register</description>
          <addressOffset>0x34</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ADDR</name>
              <description>Address pointer to encode buffer</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ENCODEPTR_CLR</name>
          <description>Hardware BCH ECC Loopback Encode Buffer Register</description>
          <addressOffset>0x38</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ADDR</name>
              <description>Address pointer to encode buffer</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ENCODEPTR_TOG</name>
          <description>Hardware BCH ECC Loopback Encode Buffer Register</description>
          <addressOffset>0x3C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ADDR</name>
              <description>Address pointer to encode buffer</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>DATAPTR</name>
          <description>Hardware BCH ECC Loopback Data Buffer Register</description>
          <addressOffset>0x40</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ADDR</name>
              <description>Address pointer to data buffer</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>DATAPTR_SET</name>
          <description>Hardware BCH ECC Loopback Data Buffer Register</description>
          <addressOffset>0x44</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ADDR</name>
              <description>Address pointer to data buffer</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>DATAPTR_CLR</name>
          <description>Hardware BCH ECC Loopback Data Buffer Register</description>
          <addressOffset>0x48</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ADDR</name>
              <description>Address pointer to data buffer</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>DATAPTR_TOG</name>
          <description>Hardware BCH ECC Loopback Data Buffer Register</description>
          <addressOffset>0x4C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ADDR</name>
              <description>Address pointer to data buffer</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>METAPTR</name>
          <description>Hardware BCH ECC Loopback Metadata Buffer Register</description>
          <addressOffset>0x50</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ADDR</name>
              <description>Address pointer to metadata buffer</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>METAPTR_SET</name>
          <description>Hardware BCH ECC Loopback Metadata Buffer Register</description>
          <addressOffset>0x54</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ADDR</name>
              <description>Address pointer to metadata buffer</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>METAPTR_CLR</name>
          <description>Hardware BCH ECC Loopback Metadata Buffer Register</description>
          <addressOffset>0x58</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ADDR</name>
              <description>Address pointer to metadata buffer</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>METAPTR_TOG</name>
          <description>Hardware BCH ECC Loopback Metadata Buffer Register</description>
          <addressOffset>0x5C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ADDR</name>
              <description>Address pointer to metadata buffer</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>LAYOUTSELECT</name>
          <description>Hardware ECC Accelerator Layout Select Register</description>
          <addressOffset>0x70</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0xE4E4E4E4</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>CS0_SELECT</name>
              <description>Selects which layout is used for chip select 0.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CS1_SELECT</name>
              <description>Selects which layout is used for chip select 1.</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CS2_SELECT</name>
              <description>Selects which layout is used for chip select 2.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CS3_SELECT</name>
              <description>Selects which layout is used for chip select 3.</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CS4_SELECT</name>
              <description>Selects which layout is used for chip select 4.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CS5_SELECT</name>
              <description>Selects which layout is used for chip select 5.</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CS6_SELECT</name>
              <description>Selects which layout is used for chip select 6.</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CS7_SELECT</name>
              <description>Selects which layout is used for chip select 7.</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CS8_SELECT</name>
              <description>Selects which layout is used for chip select 8.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CS9_SELECT</name>
              <description>Selects which layout is used for chip select 9.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CS10_SELECT</name>
              <description>Selects which layout is used for chip select 10.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CS11_SELECT</name>
              <description>Selects which layout is used for chip select 11.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CS12_SELECT</name>
              <description>Selects which layout is used for chip select 12.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CS13_SELECT</name>
              <description>Selects which layout is used for chip select 13.</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CS14_SELECT</name>
              <description>Selects which layout is used for chip select 14.</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CS15_SELECT</name>
              <description>Selects which layout is used for chip select 15.</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>LAYOUTSELECT_SET</name>
          <description>Hardware ECC Accelerator Layout Select Register</description>
          <addressOffset>0x74</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0xE4E4E4E4</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>CS0_SELECT</name>
              <description>Selects which layout is used for chip select 0.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CS1_SELECT</name>
              <description>Selects which layout is used for chip select 1.</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CS2_SELECT</name>
              <description>Selects which layout is used for chip select 2.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CS3_SELECT</name>
              <description>Selects which layout is used for chip select 3.</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CS4_SELECT</name>
              <description>Selects which layout is used for chip select 4.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CS5_SELECT</name>
              <description>Selects which layout is used for chip select 5.</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CS6_SELECT</name>
              <description>Selects which layout is used for chip select 6.</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CS7_SELECT</name>
              <description>Selects which layout is used for chip select 7.</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CS8_SELECT</name>
              <description>Selects which layout is used for chip select 8.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CS9_SELECT</name>
              <description>Selects which layout is used for chip select 9.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CS10_SELECT</name>
              <description>Selects which layout is used for chip select 10.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CS11_SELECT</name>
              <description>Selects which layout is used for chip select 11.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CS12_SELECT</name>
              <description>Selects which layout is used for chip select 12.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CS13_SELECT</name>
              <description>Selects which layout is used for chip select 13.</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CS14_SELECT</name>
              <description>Selects which layout is used for chip select 14.</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CS15_SELECT</name>
              <description>Selects which layout is used for chip select 15.</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>LAYOUTSELECT_CLR</name>
          <description>Hardware ECC Accelerator Layout Select Register</description>
          <addressOffset>0x78</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0xE4E4E4E4</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>CS0_SELECT</name>
              <description>Selects which layout is used for chip select 0.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CS1_SELECT</name>
              <description>Selects which layout is used for chip select 1.</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CS2_SELECT</name>
              <description>Selects which layout is used for chip select 2.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CS3_SELECT</name>
              <description>Selects which layout is used for chip select 3.</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CS4_SELECT</name>
              <description>Selects which layout is used for chip select 4.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CS5_SELECT</name>
              <description>Selects which layout is used for chip select 5.</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CS6_SELECT</name>
              <description>Selects which layout is used for chip select 6.</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CS7_SELECT</name>
              <description>Selects which layout is used for chip select 7.</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CS8_SELECT</name>
              <description>Selects which layout is used for chip select 8.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CS9_SELECT</name>
              <description>Selects which layout is used for chip select 9.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CS10_SELECT</name>
              <description>Selects which layout is used for chip select 10.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CS11_SELECT</name>
              <description>Selects which layout is used for chip select 11.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CS12_SELECT</name>
              <description>Selects which layout is used for chip select 12.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CS13_SELECT</name>
              <description>Selects which layout is used for chip select 13.</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CS14_SELECT</name>
              <description>Selects which layout is used for chip select 14.</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CS15_SELECT</name>
              <description>Selects which layout is used for chip select 15.</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>LAYOUTSELECT_TOG</name>
          <description>Hardware ECC Accelerator Layout Select Register</description>
          <addressOffset>0x7C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0xE4E4E4E4</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>CS0_SELECT</name>
              <description>Selects which layout is used for chip select 0.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CS1_SELECT</name>
              <description>Selects which layout is used for chip select 1.</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CS2_SELECT</name>
              <description>Selects which layout is used for chip select 2.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CS3_SELECT</name>
              <description>Selects which layout is used for chip select 3.</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CS4_SELECT</name>
              <description>Selects which layout is used for chip select 4.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CS5_SELECT</name>
              <description>Selects which layout is used for chip select 5.</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CS6_SELECT</name>
              <description>Selects which layout is used for chip select 6.</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CS7_SELECT</name>
              <description>Selects which layout is used for chip select 7.</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CS8_SELECT</name>
              <description>Selects which layout is used for chip select 8.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CS9_SELECT</name>
              <description>Selects which layout is used for chip select 9.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CS10_SELECT</name>
              <description>Selects which layout is used for chip select 10.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CS11_SELECT</name>
              <description>Selects which layout is used for chip select 11.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CS12_SELECT</name>
              <description>Selects which layout is used for chip select 12.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CS13_SELECT</name>
              <description>Selects which layout is used for chip select 13.</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CS14_SELECT</name>
              <description>Selects which layout is used for chip select 14.</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CS15_SELECT</name>
              <description>Selects which layout is used for chip select 15.</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>FLASH0LAYOUT0</name>
          <description>Hardware BCH ECC Flash 0 Layout 0 Register</description>
          <addressOffset>0x80</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x70A4080</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA0_SIZE</name>
              <description>Indicates the size of the data 0 block (in DWORDS / four bytes) to be stored on the flash page</description>
              <bitOffset>0</bitOffset>
              <bitWidth>10</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>GF13_0_GF14_1</name>
              <description>Select GF13 or GF14: 0-GF13; 1-GF14</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ECC0</name>
              <description>Indicates the ECC level for the first block on the flash page</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NONE</name>
                  <description>No ECC to be performed</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC2</name>
                  <description>ECC 2 to be performed</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC4</name>
                  <description>ECC 4 to be performed</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC6</name>
                  <description>ECC 6 to be performed</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC8</name>
                  <description>ECC 8 to be performed</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC10</name>
                  <description>ECC 10 to be performed</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC12</name>
                  <description>ECC 12 to be performed</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC14</name>
                  <description>ECC 14 to be performed</description>
                  <value>0x7</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC16</name>
                  <description>ECC 16 to be performed</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC18</name>
                  <description>ECC 18 to be performed</description>
                  <value>0x9</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC20</name>
                  <description>ECC 20 to be performed</description>
                  <value>0xA</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC22</name>
                  <description>ECC 22 to be performed</description>
                  <value>0xB</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC24</name>
                  <description>ECC 24 to be performed</description>
                  <value>0xC</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC26</name>
                  <description>ECC 26 to be performed</description>
                  <value>0xD</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC28</name>
                  <description>ECC 28 to be performed</description>
                  <value>0xE</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC30</name>
                  <description>ECC 30 to be performed</description>
                  <value>0xF</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC32</name>
                  <description>ECC 32 to be performed</description>
                  <value>0x10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC34</name>
                  <description>ECC 34 to be performed</description>
                  <value>0x11</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC36</name>
                  <description>ECC 36 to be performed</description>
                  <value>0x12</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC38</name>
                  <description>ECC 38 to be performed</description>
                  <value>0x13</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC40</name>
                  <description>ECC 40 to be performed</description>
                  <value>0x14</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>META_SIZE</name>
              <description>Indicates the size of the metadata (in bytes) to be stored on a flash page</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>NBLOCKS</name>
              <description>Number of subsequent blocks on the flash page (excluding the data0 block)</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>FLASH0LAYOUT0_SET</name>
          <description>Hardware BCH ECC Flash 0 Layout 0 Register</description>
          <addressOffset>0x84</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x70A4080</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA0_SIZE</name>
              <description>Indicates the size of the data 0 block (in DWORDS / four bytes) to be stored on the flash page</description>
              <bitOffset>0</bitOffset>
              <bitWidth>10</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>GF13_0_GF14_1</name>
              <description>Select GF13 or GF14: 0-GF13; 1-GF14</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ECC0</name>
              <description>Indicates the ECC level for the first block on the flash page</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NONE</name>
                  <description>No ECC to be performed</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC2</name>
                  <description>ECC 2 to be performed</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC4</name>
                  <description>ECC 4 to be performed</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC6</name>
                  <description>ECC 6 to be performed</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC8</name>
                  <description>ECC 8 to be performed</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC10</name>
                  <description>ECC 10 to be performed</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC12</name>
                  <description>ECC 12 to be performed</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC14</name>
                  <description>ECC 14 to be performed</description>
                  <value>0x7</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC16</name>
                  <description>ECC 16 to be performed</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC18</name>
                  <description>ECC 18 to be performed</description>
                  <value>0x9</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC20</name>
                  <description>ECC 20 to be performed</description>
                  <value>0xA</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC22</name>
                  <description>ECC 22 to be performed</description>
                  <value>0xB</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC24</name>
                  <description>ECC 24 to be performed</description>
                  <value>0xC</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC26</name>
                  <description>ECC 26 to be performed</description>
                  <value>0xD</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC28</name>
                  <description>ECC 28 to be performed</description>
                  <value>0xE</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC30</name>
                  <description>ECC 30 to be performed</description>
                  <value>0xF</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC32</name>
                  <description>ECC 32 to be performed</description>
                  <value>0x10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC34</name>
                  <description>ECC 34 to be performed</description>
                  <value>0x11</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC36</name>
                  <description>ECC 36 to be performed</description>
                  <value>0x12</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC38</name>
                  <description>ECC 38 to be performed</description>
                  <value>0x13</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC40</name>
                  <description>ECC 40 to be performed</description>
                  <value>0x14</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>META_SIZE</name>
              <description>Indicates the size of the metadata (in bytes) to be stored on a flash page</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>NBLOCKS</name>
              <description>Number of subsequent blocks on the flash page (excluding the data0 block)</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>FLASH0LAYOUT0_CLR</name>
          <description>Hardware BCH ECC Flash 0 Layout 0 Register</description>
          <addressOffset>0x88</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x70A4080</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA0_SIZE</name>
              <description>Indicates the size of the data 0 block (in DWORDS / four bytes) to be stored on the flash page</description>
              <bitOffset>0</bitOffset>
              <bitWidth>10</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>GF13_0_GF14_1</name>
              <description>Select GF13 or GF14: 0-GF13; 1-GF14</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ECC0</name>
              <description>Indicates the ECC level for the first block on the flash page</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NONE</name>
                  <description>No ECC to be performed</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC2</name>
                  <description>ECC 2 to be performed</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC4</name>
                  <description>ECC 4 to be performed</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC6</name>
                  <description>ECC 6 to be performed</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC8</name>
                  <description>ECC 8 to be performed</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC10</name>
                  <description>ECC 10 to be performed</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC12</name>
                  <description>ECC 12 to be performed</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC14</name>
                  <description>ECC 14 to be performed</description>
                  <value>0x7</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC16</name>
                  <description>ECC 16 to be performed</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC18</name>
                  <description>ECC 18 to be performed</description>
                  <value>0x9</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC20</name>
                  <description>ECC 20 to be performed</description>
                  <value>0xA</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC22</name>
                  <description>ECC 22 to be performed</description>
                  <value>0xB</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC24</name>
                  <description>ECC 24 to be performed</description>
                  <value>0xC</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC26</name>
                  <description>ECC 26 to be performed</description>
                  <value>0xD</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC28</name>
                  <description>ECC 28 to be performed</description>
                  <value>0xE</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC30</name>
                  <description>ECC 30 to be performed</description>
                  <value>0xF</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC32</name>
                  <description>ECC 32 to be performed</description>
                  <value>0x10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC34</name>
                  <description>ECC 34 to be performed</description>
                  <value>0x11</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC36</name>
                  <description>ECC 36 to be performed</description>
                  <value>0x12</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC38</name>
                  <description>ECC 38 to be performed</description>
                  <value>0x13</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC40</name>
                  <description>ECC 40 to be performed</description>
                  <value>0x14</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>META_SIZE</name>
              <description>Indicates the size of the metadata (in bytes) to be stored on a flash page</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>NBLOCKS</name>
              <description>Number of subsequent blocks on the flash page (excluding the data0 block)</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>FLASH0LAYOUT0_TOG</name>
          <description>Hardware BCH ECC Flash 0 Layout 0 Register</description>
          <addressOffset>0x8C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x70A4080</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA0_SIZE</name>
              <description>Indicates the size of the data 0 block (in DWORDS / four bytes) to be stored on the flash page</description>
              <bitOffset>0</bitOffset>
              <bitWidth>10</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>GF13_0_GF14_1</name>
              <description>Select GF13 or GF14: 0-GF13; 1-GF14</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ECC0</name>
              <description>Indicates the ECC level for the first block on the flash page</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NONE</name>
                  <description>No ECC to be performed</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC2</name>
                  <description>ECC 2 to be performed</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC4</name>
                  <description>ECC 4 to be performed</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC6</name>
                  <description>ECC 6 to be performed</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC8</name>
                  <description>ECC 8 to be performed</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC10</name>
                  <description>ECC 10 to be performed</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC12</name>
                  <description>ECC 12 to be performed</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC14</name>
                  <description>ECC 14 to be performed</description>
                  <value>0x7</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC16</name>
                  <description>ECC 16 to be performed</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC18</name>
                  <description>ECC 18 to be performed</description>
                  <value>0x9</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC20</name>
                  <description>ECC 20 to be performed</description>
                  <value>0xA</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC22</name>
                  <description>ECC 22 to be performed</description>
                  <value>0xB</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC24</name>
                  <description>ECC 24 to be performed</description>
                  <value>0xC</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC26</name>
                  <description>ECC 26 to be performed</description>
                  <value>0xD</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC28</name>
                  <description>ECC 28 to be performed</description>
                  <value>0xE</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC30</name>
                  <description>ECC 30 to be performed</description>
                  <value>0xF</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC32</name>
                  <description>ECC 32 to be performed</description>
                  <value>0x10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC34</name>
                  <description>ECC 34 to be performed</description>
                  <value>0x11</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC36</name>
                  <description>ECC 36 to be performed</description>
                  <value>0x12</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC38</name>
                  <description>ECC 38 to be performed</description>
                  <value>0x13</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC40</name>
                  <description>ECC 40 to be performed</description>
                  <value>0x14</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>META_SIZE</name>
              <description>Indicates the size of the metadata (in bytes) to be stored on a flash page</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>NBLOCKS</name>
              <description>Number of subsequent blocks on the flash page (excluding the data0 block)</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>FLASH0LAYOUT1</name>
          <description>Hardware BCH ECC Flash 0 Layout 1 Register</description>
          <addressOffset>0x90</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10DA4080</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATAN_SIZE</name>
              <description>Indicates the size of the subsequent data blocks (in DWORDS / four bytes) to be stored on the flash page</description>
              <bitOffset>0</bitOffset>
              <bitWidth>10</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>GF13_0_GF14_1</name>
              <description>Select GF13 or GF14: 0-GF13; 1-GF14</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ECCN</name>
              <description>Indicates the ECC level for the subsequent blocks on the flash page (blocks 1-n)</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NONE</name>
                  <description>No ECC to be performed</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC2</name>
                  <description>ECC 2 to be performed</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC4</name>
                  <description>ECC 4 to be performed</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC6</name>
                  <description>ECC 6 to be performed</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC8</name>
                  <description>ECC 8 to be performed</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC10</name>
                  <description>ECC 10 to be performed</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC12</name>
                  <description>ECC 12 to be performed</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC14</name>
                  <description>ECC 14 to be performed</description>
                  <value>0x7</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC16</name>
                  <description>ECC 16 to be performed</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC18</name>
                  <description>ECC 18 to be performed</description>
                  <value>0x9</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC20</name>
                  <description>ECC 20 to be performed</description>
                  <value>0xA</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC22</name>
                  <description>ECC 22 to be performed</description>
                  <value>0xB</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC24</name>
                  <description>ECC 24 to be performed</description>
                  <value>0xC</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC26</name>
                  <description>ECC 26 to be performed</description>
                  <value>0xD</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC28</name>
                  <description>ECC 28 to be performed</description>
                  <value>0xE</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC30</name>
                  <description>ECC 30 to be performed</description>
                  <value>0xF</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC32</name>
                  <description>ECC 32 to be performed</description>
                  <value>0x10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC34</name>
                  <description>ECC 34 to be performed</description>
                  <value>0x11</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC36</name>
                  <description>ECC 36 to be performed</description>
                  <value>0x12</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC38</name>
                  <description>ECC 38 to be performed</description>
                  <value>0x13</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC40</name>
                  <description>ECC 40 to be performed</description>
                  <value>0x14</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PAGE_SIZE</name>
              <description>Indicates the total size of the flash page (in bytes)</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>FLASH0LAYOUT1_SET</name>
          <description>Hardware BCH ECC Flash 0 Layout 1 Register</description>
          <addressOffset>0x94</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10DA4080</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATAN_SIZE</name>
              <description>Indicates the size of the subsequent data blocks (in DWORDS / four bytes) to be stored on the flash page</description>
              <bitOffset>0</bitOffset>
              <bitWidth>10</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>GF13_0_GF14_1</name>
              <description>Select GF13 or GF14: 0-GF13; 1-GF14</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ECCN</name>
              <description>Indicates the ECC level for the subsequent blocks on the flash page (blocks 1-n)</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NONE</name>
                  <description>No ECC to be performed</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC2</name>
                  <description>ECC 2 to be performed</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC4</name>
                  <description>ECC 4 to be performed</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC6</name>
                  <description>ECC 6 to be performed</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC8</name>
                  <description>ECC 8 to be performed</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC10</name>
                  <description>ECC 10 to be performed</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC12</name>
                  <description>ECC 12 to be performed</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC14</name>
                  <description>ECC 14 to be performed</description>
                  <value>0x7</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC16</name>
                  <description>ECC 16 to be performed</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC18</name>
                  <description>ECC 18 to be performed</description>
                  <value>0x9</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC20</name>
                  <description>ECC 20 to be performed</description>
                  <value>0xA</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC22</name>
                  <description>ECC 22 to be performed</description>
                  <value>0xB</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC24</name>
                  <description>ECC 24 to be performed</description>
                  <value>0xC</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC26</name>
                  <description>ECC 26 to be performed</description>
                  <value>0xD</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC28</name>
                  <description>ECC 28 to be performed</description>
                  <value>0xE</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC30</name>
                  <description>ECC 30 to be performed</description>
                  <value>0xF</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC32</name>
                  <description>ECC 32 to be performed</description>
                  <value>0x10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC34</name>
                  <description>ECC 34 to be performed</description>
                  <value>0x11</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC36</name>
                  <description>ECC 36 to be performed</description>
                  <value>0x12</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC38</name>
                  <description>ECC 38 to be performed</description>
                  <value>0x13</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC40</name>
                  <description>ECC 40 to be performed</description>
                  <value>0x14</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PAGE_SIZE</name>
              <description>Indicates the total size of the flash page (in bytes)</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>FLASH0LAYOUT1_CLR</name>
          <description>Hardware BCH ECC Flash 0 Layout 1 Register</description>
          <addressOffset>0x98</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10DA4080</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATAN_SIZE</name>
              <description>Indicates the size of the subsequent data blocks (in DWORDS / four bytes) to be stored on the flash page</description>
              <bitOffset>0</bitOffset>
              <bitWidth>10</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>GF13_0_GF14_1</name>
              <description>Select GF13 or GF14: 0-GF13; 1-GF14</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ECCN</name>
              <description>Indicates the ECC level for the subsequent blocks on the flash page (blocks 1-n)</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NONE</name>
                  <description>No ECC to be performed</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC2</name>
                  <description>ECC 2 to be performed</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC4</name>
                  <description>ECC 4 to be performed</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC6</name>
                  <description>ECC 6 to be performed</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC8</name>
                  <description>ECC 8 to be performed</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC10</name>
                  <description>ECC 10 to be performed</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC12</name>
                  <description>ECC 12 to be performed</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC14</name>
                  <description>ECC 14 to be performed</description>
                  <value>0x7</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC16</name>
                  <description>ECC 16 to be performed</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC18</name>
                  <description>ECC 18 to be performed</description>
                  <value>0x9</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC20</name>
                  <description>ECC 20 to be performed</description>
                  <value>0xA</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC22</name>
                  <description>ECC 22 to be performed</description>
                  <value>0xB</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC24</name>
                  <description>ECC 24 to be performed</description>
                  <value>0xC</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC26</name>
                  <description>ECC 26 to be performed</description>
                  <value>0xD</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC28</name>
                  <description>ECC 28 to be performed</description>
                  <value>0xE</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC30</name>
                  <description>ECC 30 to be performed</description>
                  <value>0xF</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC32</name>
                  <description>ECC 32 to be performed</description>
                  <value>0x10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC34</name>
                  <description>ECC 34 to be performed</description>
                  <value>0x11</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC36</name>
                  <description>ECC 36 to be performed</description>
                  <value>0x12</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC38</name>
                  <description>ECC 38 to be performed</description>
                  <value>0x13</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC40</name>
                  <description>ECC 40 to be performed</description>
                  <value>0x14</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PAGE_SIZE</name>
              <description>Indicates the total size of the flash page (in bytes)</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>FLASH0LAYOUT1_TOG</name>
          <description>Hardware BCH ECC Flash 0 Layout 1 Register</description>
          <addressOffset>0x9C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10DA4080</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATAN_SIZE</name>
              <description>Indicates the size of the subsequent data blocks (in DWORDS / four bytes) to be stored on the flash page</description>
              <bitOffset>0</bitOffset>
              <bitWidth>10</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>GF13_0_GF14_1</name>
              <description>Select GF13 or GF14: 0-GF13; 1-GF14</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ECCN</name>
              <description>Indicates the ECC level for the subsequent blocks on the flash page (blocks 1-n)</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NONE</name>
                  <description>No ECC to be performed</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC2</name>
                  <description>ECC 2 to be performed</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC4</name>
                  <description>ECC 4 to be performed</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC6</name>
                  <description>ECC 6 to be performed</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC8</name>
                  <description>ECC 8 to be performed</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC10</name>
                  <description>ECC 10 to be performed</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC12</name>
                  <description>ECC 12 to be performed</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC14</name>
                  <description>ECC 14 to be performed</description>
                  <value>0x7</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC16</name>
                  <description>ECC 16 to be performed</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC18</name>
                  <description>ECC 18 to be performed</description>
                  <value>0x9</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC20</name>
                  <description>ECC 20 to be performed</description>
                  <value>0xA</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC22</name>
                  <description>ECC 22 to be performed</description>
                  <value>0xB</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC24</name>
                  <description>ECC 24 to be performed</description>
                  <value>0xC</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC26</name>
                  <description>ECC 26 to be performed</description>
                  <value>0xD</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC28</name>
                  <description>ECC 28 to be performed</description>
                  <value>0xE</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC30</name>
                  <description>ECC 30 to be performed</description>
                  <value>0xF</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC32</name>
                  <description>ECC 32 to be performed</description>
                  <value>0x10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC34</name>
                  <description>ECC 34 to be performed</description>
                  <value>0x11</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC36</name>
                  <description>ECC 36 to be performed</description>
                  <value>0x12</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC38</name>
                  <description>ECC 38 to be performed</description>
                  <value>0x13</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC40</name>
                  <description>ECC 40 to be performed</description>
                  <value>0x14</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PAGE_SIZE</name>
              <description>Indicates the total size of the flash page (in bytes)</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>FLASH1LAYOUT0</name>
          <description>Hardware BCH ECC Flash 1 Layout 0 Register</description>
          <addressOffset>0xA0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x70A4080</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA0_SIZE</name>
              <description>Indicates the size of the data 0 block (in DWORDS / four bytes) to be stored on the flash page</description>
              <bitOffset>0</bitOffset>
              <bitWidth>10</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>GF13_0_GF14_1</name>
              <description>Select GF13 or GF14: 0-GF13; 1-GF14</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ECC0</name>
              <description>Indicates the ECC level for the first block on the flash page</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NONE</name>
                  <description>No ECC to be performed</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC2</name>
                  <description>ECC 2 to be performed</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC4</name>
                  <description>ECC 4 to be performed</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC6</name>
                  <description>ECC 6 to be performed</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC8</name>
                  <description>ECC 8 to be performed</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC10</name>
                  <description>ECC 10 to be performed</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC12</name>
                  <description>ECC 12 to be performed</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC14</name>
                  <description>ECC 14 to be performed</description>
                  <value>0x7</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC16</name>
                  <description>ECC 16 to be performed</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC18</name>
                  <description>ECC 18 to be performed</description>
                  <value>0x9</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC20</name>
                  <description>ECC 20 to be performed</description>
                  <value>0xA</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC22</name>
                  <description>ECC 22 to be performed</description>
                  <value>0xB</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC24</name>
                  <description>ECC 24 to be performed</description>
                  <value>0xC</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC26</name>
                  <description>ECC 26 to be performed</description>
                  <value>0xD</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC28</name>
                  <description>ECC 28 to be performed</description>
                  <value>0xE</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC30</name>
                  <description>ECC 30 to be performed</description>
                  <value>0xF</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC32</name>
                  <description>ECC 32 to be performed</description>
                  <value>0x10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC34</name>
                  <description>ECC 34 to be performed</description>
                  <value>0x11</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC36</name>
                  <description>ECC 36 to be performed</description>
                  <value>0x12</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC38</name>
                  <description>ECC 38 to be performed</description>
                  <value>0x13</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC40</name>
                  <description>ECC 40 to be performed</description>
                  <value>0x14</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>META_SIZE</name>
              <description>Indicates the size of the metadata (in bytes) to be stored on a flash page</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>NBLOCKS</name>
              <description>Number of subsequent blocks on the flash page (excluding the data0 block)</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>FLASH1LAYOUT0_SET</name>
          <description>Hardware BCH ECC Flash 1 Layout 0 Register</description>
          <addressOffset>0xA4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x70A4080</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA0_SIZE</name>
              <description>Indicates the size of the data 0 block (in DWORDS / four bytes) to be stored on the flash page</description>
              <bitOffset>0</bitOffset>
              <bitWidth>10</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>GF13_0_GF14_1</name>
              <description>Select GF13 or GF14: 0-GF13; 1-GF14</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ECC0</name>
              <description>Indicates the ECC level for the first block on the flash page</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NONE</name>
                  <description>No ECC to be performed</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC2</name>
                  <description>ECC 2 to be performed</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC4</name>
                  <description>ECC 4 to be performed</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC6</name>
                  <description>ECC 6 to be performed</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC8</name>
                  <description>ECC 8 to be performed</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC10</name>
                  <description>ECC 10 to be performed</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC12</name>
                  <description>ECC 12 to be performed</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC14</name>
                  <description>ECC 14 to be performed</description>
                  <value>0x7</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC16</name>
                  <description>ECC 16 to be performed</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC18</name>
                  <description>ECC 18 to be performed</description>
                  <value>0x9</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC20</name>
                  <description>ECC 20 to be performed</description>
                  <value>0xA</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC22</name>
                  <description>ECC 22 to be performed</description>
                  <value>0xB</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC24</name>
                  <description>ECC 24 to be performed</description>
                  <value>0xC</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC26</name>
                  <description>ECC 26 to be performed</description>
                  <value>0xD</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC28</name>
                  <description>ECC 28 to be performed</description>
                  <value>0xE</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC30</name>
                  <description>ECC 30 to be performed</description>
                  <value>0xF</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC32</name>
                  <description>ECC 32 to be performed</description>
                  <value>0x10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC34</name>
                  <description>ECC 34 to be performed</description>
                  <value>0x11</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC36</name>
                  <description>ECC 36 to be performed</description>
                  <value>0x12</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC38</name>
                  <description>ECC 38 to be performed</description>
                  <value>0x13</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC40</name>
                  <description>ECC 40 to be performed</description>
                  <value>0x14</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>META_SIZE</name>
              <description>Indicates the size of the metadata (in bytes) to be stored on a flash page</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>NBLOCKS</name>
              <description>Number of subsequent blocks on the flash page (excluding the data0 block)</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>FLASH1LAYOUT0_CLR</name>
          <description>Hardware BCH ECC Flash 1 Layout 0 Register</description>
          <addressOffset>0xA8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x70A4080</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA0_SIZE</name>
              <description>Indicates the size of the data 0 block (in DWORDS / four bytes) to be stored on the flash page</description>
              <bitOffset>0</bitOffset>
              <bitWidth>10</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>GF13_0_GF14_1</name>
              <description>Select GF13 or GF14: 0-GF13; 1-GF14</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ECC0</name>
              <description>Indicates the ECC level for the first block on the flash page</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NONE</name>
                  <description>No ECC to be performed</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC2</name>
                  <description>ECC 2 to be performed</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC4</name>
                  <description>ECC 4 to be performed</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC6</name>
                  <description>ECC 6 to be performed</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC8</name>
                  <description>ECC 8 to be performed</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC10</name>
                  <description>ECC 10 to be performed</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC12</name>
                  <description>ECC 12 to be performed</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC14</name>
                  <description>ECC 14 to be performed</description>
                  <value>0x7</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC16</name>
                  <description>ECC 16 to be performed</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC18</name>
                  <description>ECC 18 to be performed</description>
                  <value>0x9</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC20</name>
                  <description>ECC 20 to be performed</description>
                  <value>0xA</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC22</name>
                  <description>ECC 22 to be performed</description>
                  <value>0xB</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC24</name>
                  <description>ECC 24 to be performed</description>
                  <value>0xC</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC26</name>
                  <description>ECC 26 to be performed</description>
                  <value>0xD</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC28</name>
                  <description>ECC 28 to be performed</description>
                  <value>0xE</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC30</name>
                  <description>ECC 30 to be performed</description>
                  <value>0xF</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC32</name>
                  <description>ECC 32 to be performed</description>
                  <value>0x10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC34</name>
                  <description>ECC 34 to be performed</description>
                  <value>0x11</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC36</name>
                  <description>ECC 36 to be performed</description>
                  <value>0x12</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC38</name>
                  <description>ECC 38 to be performed</description>
                  <value>0x13</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC40</name>
                  <description>ECC 40 to be performed</description>
                  <value>0x14</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>META_SIZE</name>
              <description>Indicates the size of the metadata (in bytes) to be stored on a flash page</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>NBLOCKS</name>
              <description>Number of subsequent blocks on the flash page (excluding the data0 block)</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>FLASH1LAYOUT0_TOG</name>
          <description>Hardware BCH ECC Flash 1 Layout 0 Register</description>
          <addressOffset>0xAC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x70A4080</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA0_SIZE</name>
              <description>Indicates the size of the data 0 block (in DWORDS / four bytes) to be stored on the flash page</description>
              <bitOffset>0</bitOffset>
              <bitWidth>10</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>GF13_0_GF14_1</name>
              <description>Select GF13 or GF14: 0-GF13; 1-GF14</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ECC0</name>
              <description>Indicates the ECC level for the first block on the flash page</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NONE</name>
                  <description>No ECC to be performed</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC2</name>
                  <description>ECC 2 to be performed</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC4</name>
                  <description>ECC 4 to be performed</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC6</name>
                  <description>ECC 6 to be performed</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC8</name>
                  <description>ECC 8 to be performed</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC10</name>
                  <description>ECC 10 to be performed</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC12</name>
                  <description>ECC 12 to be performed</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC14</name>
                  <description>ECC 14 to be performed</description>
                  <value>0x7</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC16</name>
                  <description>ECC 16 to be performed</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC18</name>
                  <description>ECC 18 to be performed</description>
                  <value>0x9</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC20</name>
                  <description>ECC 20 to be performed</description>
                  <value>0xA</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC22</name>
                  <description>ECC 22 to be performed</description>
                  <value>0xB</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC24</name>
                  <description>ECC 24 to be performed</description>
                  <value>0xC</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC26</name>
                  <description>ECC 26 to be performed</description>
                  <value>0xD</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC28</name>
                  <description>ECC 28 to be performed</description>
                  <value>0xE</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC30</name>
                  <description>ECC 30 to be performed</description>
                  <value>0xF</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC32</name>
                  <description>ECC 32 to be performed</description>
                  <value>0x10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC34</name>
                  <description>ECC 34 to be performed</description>
                  <value>0x11</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC36</name>
                  <description>ECC 36 to be performed</description>
                  <value>0x12</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC38</name>
                  <description>ECC 38 to be performed</description>
                  <value>0x13</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC40</name>
                  <description>ECC 40 to be performed</description>
                  <value>0x14</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>META_SIZE</name>
              <description>Indicates the size of the metadata (in bytes) to be stored on a flash page</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>NBLOCKS</name>
              <description>Number of subsequent blocks on the flash page (excluding the data0 block)</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>FLASH1LAYOUT1</name>
          <description>Hardware BCH ECC Flash 1 Layout 1 Register</description>
          <addressOffset>0xB0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10DA4080</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATAN_SIZE</name>
              <description>Indicates the size of the subsequent data blocks (in DWORDS / four bytes) to be stored on the flash page</description>
              <bitOffset>0</bitOffset>
              <bitWidth>10</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>GF13_0_GF14_1</name>
              <description>Select GF13 or GF14: 0-GF13; 1-GF14</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ECCN</name>
              <description>Indicates the ECC level for the subsequent blocks on the flash page (blocks 1-n)</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NONE</name>
                  <description>No ECC to be performed</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC2</name>
                  <description>ECC 2 to be performed</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC4</name>
                  <description>ECC 4 to be performed</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC6</name>
                  <description>ECC 6 to be performed</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC8</name>
                  <description>ECC 8 to be performed</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC10</name>
                  <description>ECC 10 to be performed</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC12</name>
                  <description>ECC 12 to be performed</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC14</name>
                  <description>ECC 14 to be performed</description>
                  <value>0x7</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC16</name>
                  <description>ECC 16 to be performed</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC18</name>
                  <description>ECC 18 to be performed</description>
                  <value>0x9</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC20</name>
                  <description>ECC 20 to be performed</description>
                  <value>0xA</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC22</name>
                  <description>ECC 22 to be performed</description>
                  <value>0xB</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC24</name>
                  <description>ECC 24 to be performed</description>
                  <value>0xC</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC26</name>
                  <description>ECC 26 to be performed</description>
                  <value>0xD</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC28</name>
                  <description>ECC 28 to be performed</description>
                  <value>0xE</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC30</name>
                  <description>ECC 30 to be performed</description>
                  <value>0xF</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC32</name>
                  <description>ECC 32 to be performed</description>
                  <value>0x10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC34</name>
                  <description>ECC 34 to be performed</description>
                  <value>0x11</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC36</name>
                  <description>ECC 36 to be performed</description>
                  <value>0x12</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC38</name>
                  <description>ECC 38 to be performed</description>
                  <value>0x13</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC40</name>
                  <description>ECC 40 to be performed</description>
                  <value>0x14</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PAGE_SIZE</name>
              <description>Indicates the total size of the flash page (in bytes)</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>FLASH1LAYOUT1_SET</name>
          <description>Hardware BCH ECC Flash 1 Layout 1 Register</description>
          <addressOffset>0xB4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10DA4080</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATAN_SIZE</name>
              <description>Indicates the size of the subsequent data blocks (in DWORDS / four bytes) to be stored on the flash page</description>
              <bitOffset>0</bitOffset>
              <bitWidth>10</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>GF13_0_GF14_1</name>
              <description>Select GF13 or GF14: 0-GF13; 1-GF14</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ECCN</name>
              <description>Indicates the ECC level for the subsequent blocks on the flash page (blocks 1-n)</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NONE</name>
                  <description>No ECC to be performed</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC2</name>
                  <description>ECC 2 to be performed</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC4</name>
                  <description>ECC 4 to be performed</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC6</name>
                  <description>ECC 6 to be performed</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC8</name>
                  <description>ECC 8 to be performed</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC10</name>
                  <description>ECC 10 to be performed</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC12</name>
                  <description>ECC 12 to be performed</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC14</name>
                  <description>ECC 14 to be performed</description>
                  <value>0x7</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC16</name>
                  <description>ECC 16 to be performed</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC18</name>
                  <description>ECC 18 to be performed</description>
                  <value>0x9</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC20</name>
                  <description>ECC 20 to be performed</description>
                  <value>0xA</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC22</name>
                  <description>ECC 22 to be performed</description>
                  <value>0xB</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC24</name>
                  <description>ECC 24 to be performed</description>
                  <value>0xC</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC26</name>
                  <description>ECC 26 to be performed</description>
                  <value>0xD</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC28</name>
                  <description>ECC 28 to be performed</description>
                  <value>0xE</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC30</name>
                  <description>ECC 30 to be performed</description>
                  <value>0xF</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC32</name>
                  <description>ECC 32 to be performed</description>
                  <value>0x10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC34</name>
                  <description>ECC 34 to be performed</description>
                  <value>0x11</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC36</name>
                  <description>ECC 36 to be performed</description>
                  <value>0x12</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC38</name>
                  <description>ECC 38 to be performed</description>
                  <value>0x13</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC40</name>
                  <description>ECC 40 to be performed</description>
                  <value>0x14</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PAGE_SIZE</name>
              <description>Indicates the total size of the flash page (in bytes)</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>FLASH1LAYOUT1_CLR</name>
          <description>Hardware BCH ECC Flash 1 Layout 1 Register</description>
          <addressOffset>0xB8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10DA4080</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATAN_SIZE</name>
              <description>Indicates the size of the subsequent data blocks (in DWORDS / four bytes) to be stored on the flash page</description>
              <bitOffset>0</bitOffset>
              <bitWidth>10</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>GF13_0_GF14_1</name>
              <description>Select GF13 or GF14: 0-GF13; 1-GF14</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ECCN</name>
              <description>Indicates the ECC level for the subsequent blocks on the flash page (blocks 1-n)</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NONE</name>
                  <description>No ECC to be performed</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC2</name>
                  <description>ECC 2 to be performed</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC4</name>
                  <description>ECC 4 to be performed</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC6</name>
                  <description>ECC 6 to be performed</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC8</name>
                  <description>ECC 8 to be performed</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC10</name>
                  <description>ECC 10 to be performed</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC12</name>
                  <description>ECC 12 to be performed</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC14</name>
                  <description>ECC 14 to be performed</description>
                  <value>0x7</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC16</name>
                  <description>ECC 16 to be performed</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC18</name>
                  <description>ECC 18 to be performed</description>
                  <value>0x9</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC20</name>
                  <description>ECC 20 to be performed</description>
                  <value>0xA</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC22</name>
                  <description>ECC 22 to be performed</description>
                  <value>0xB</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC24</name>
                  <description>ECC 24 to be performed</description>
                  <value>0xC</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC26</name>
                  <description>ECC 26 to be performed</description>
                  <value>0xD</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC28</name>
                  <description>ECC 28 to be performed</description>
                  <value>0xE</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC30</name>
                  <description>ECC 30 to be performed</description>
                  <value>0xF</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC32</name>
                  <description>ECC 32 to be performed</description>
                  <value>0x10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC34</name>
                  <description>ECC 34 to be performed</description>
                  <value>0x11</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC36</name>
                  <description>ECC 36 to be performed</description>
                  <value>0x12</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC38</name>
                  <description>ECC 38 to be performed</description>
                  <value>0x13</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC40</name>
                  <description>ECC 40 to be performed</description>
                  <value>0x14</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PAGE_SIZE</name>
              <description>Indicates the total size of the flash page (in bytes)</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>FLASH1LAYOUT1_TOG</name>
          <description>Hardware BCH ECC Flash 1 Layout 1 Register</description>
          <addressOffset>0xBC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10DA4080</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATAN_SIZE</name>
              <description>Indicates the size of the subsequent data blocks (in DWORDS / four bytes) to be stored on the flash page</description>
              <bitOffset>0</bitOffset>
              <bitWidth>10</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>GF13_0_GF14_1</name>
              <description>Select GF13 or GF14: 0-GF13; 1-GF14</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ECCN</name>
              <description>Indicates the ECC level for the subsequent blocks on the flash page (blocks 1-n)</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NONE</name>
                  <description>No ECC to be performed</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC2</name>
                  <description>ECC 2 to be performed</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC4</name>
                  <description>ECC 4 to be performed</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC6</name>
                  <description>ECC 6 to be performed</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC8</name>
                  <description>ECC 8 to be performed</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC10</name>
                  <description>ECC 10 to be performed</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC12</name>
                  <description>ECC 12 to be performed</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC14</name>
                  <description>ECC 14 to be performed</description>
                  <value>0x7</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC16</name>
                  <description>ECC 16 to be performed</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC18</name>
                  <description>ECC 18 to be performed</description>
                  <value>0x9</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC20</name>
                  <description>ECC 20 to be performed</description>
                  <value>0xA</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC22</name>
                  <description>ECC 22 to be performed</description>
                  <value>0xB</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC24</name>
                  <description>ECC 24 to be performed</description>
                  <value>0xC</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC26</name>
                  <description>ECC 26 to be performed</description>
                  <value>0xD</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC28</name>
                  <description>ECC 28 to be performed</description>
                  <value>0xE</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC30</name>
                  <description>ECC 30 to be performed</description>
                  <value>0xF</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC32</name>
                  <description>ECC 32 to be performed</description>
                  <value>0x10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC34</name>
                  <description>ECC 34 to be performed</description>
                  <value>0x11</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC36</name>
                  <description>ECC 36 to be performed</description>
                  <value>0x12</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC38</name>
                  <description>ECC 38 to be performed</description>
                  <value>0x13</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC40</name>
                  <description>ECC 40 to be performed</description>
                  <value>0x14</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PAGE_SIZE</name>
              <description>Indicates the total size of the flash page (in bytes)</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>FLASH2LAYOUT0</name>
          <description>Hardware BCH ECC Flash 2 Layout 0 Register</description>
          <addressOffset>0xC0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x70A4080</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA0_SIZE</name>
              <description>Indicates the size of the data 0 block (in DWORDS / four bytes) to be stored on the flash page</description>
              <bitOffset>0</bitOffset>
              <bitWidth>10</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>GF13_0_GF14_1</name>
              <description>Select GF13 or GF14: 0-GF13; 1-GF14</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ECC0</name>
              <description>Indicates the ECC level for the first block on the flash page</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NONE</name>
                  <description>No ECC to be performed</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC2</name>
                  <description>ECC 2 to be performed</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC4</name>
                  <description>ECC 4 to be performed</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC6</name>
                  <description>ECC 6 to be performed</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC8</name>
                  <description>ECC 8 to be performed</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC10</name>
                  <description>ECC 10 to be performed</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC12</name>
                  <description>ECC 12 to be performed</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC14</name>
                  <description>ECC 14 to be performed</description>
                  <value>0x7</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC16</name>
                  <description>ECC 16 to be performed</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC18</name>
                  <description>ECC 18 to be performed</description>
                  <value>0x9</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC20</name>
                  <description>ECC 20 to be performed</description>
                  <value>0xA</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC22</name>
                  <description>ECC 22 to be performed</description>
                  <value>0xB</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC24</name>
                  <description>ECC 24 to be performed</description>
                  <value>0xC</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC26</name>
                  <description>ECC 26 to be performed</description>
                  <value>0xD</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC28</name>
                  <description>ECC 28 to be performed</description>
                  <value>0xE</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC30</name>
                  <description>ECC 30 to be performed</description>
                  <value>0xF</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC32</name>
                  <description>ECC 32 to be performed</description>
                  <value>0x10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC34</name>
                  <description>ECC 34 to be performed</description>
                  <value>0x11</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC36</name>
                  <description>ECC 36 to be performed</description>
                  <value>0x12</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC38</name>
                  <description>ECC 38 to be performed</description>
                  <value>0x13</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC40</name>
                  <description>ECC 40 to be performed</description>
                  <value>0x14</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>META_SIZE</name>
              <description>Indicates the size of the metadata (in bytes) to be stored on a flash page</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>NBLOCKS</name>
              <description>Number of subsequent blocks on the flash page (excluding the data0 block)</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>FLASH2LAYOUT0_SET</name>
          <description>Hardware BCH ECC Flash 2 Layout 0 Register</description>
          <addressOffset>0xC4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x70A4080</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA0_SIZE</name>
              <description>Indicates the size of the data 0 block (in DWORDS / four bytes) to be stored on the flash page</description>
              <bitOffset>0</bitOffset>
              <bitWidth>10</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>GF13_0_GF14_1</name>
              <description>Select GF13 or GF14: 0-GF13; 1-GF14</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ECC0</name>
              <description>Indicates the ECC level for the first block on the flash page</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NONE</name>
                  <description>No ECC to be performed</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC2</name>
                  <description>ECC 2 to be performed</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC4</name>
                  <description>ECC 4 to be performed</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC6</name>
                  <description>ECC 6 to be performed</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC8</name>
                  <description>ECC 8 to be performed</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC10</name>
                  <description>ECC 10 to be performed</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC12</name>
                  <description>ECC 12 to be performed</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC14</name>
                  <description>ECC 14 to be performed</description>
                  <value>0x7</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC16</name>
                  <description>ECC 16 to be performed</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC18</name>
                  <description>ECC 18 to be performed</description>
                  <value>0x9</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC20</name>
                  <description>ECC 20 to be performed</description>
                  <value>0xA</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC22</name>
                  <description>ECC 22 to be performed</description>
                  <value>0xB</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC24</name>
                  <description>ECC 24 to be performed</description>
                  <value>0xC</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC26</name>
                  <description>ECC 26 to be performed</description>
                  <value>0xD</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC28</name>
                  <description>ECC 28 to be performed</description>
                  <value>0xE</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC30</name>
                  <description>ECC 30 to be performed</description>
                  <value>0xF</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC32</name>
                  <description>ECC 32 to be performed</description>
                  <value>0x10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC34</name>
                  <description>ECC 34 to be performed</description>
                  <value>0x11</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC36</name>
                  <description>ECC 36 to be performed</description>
                  <value>0x12</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC38</name>
                  <description>ECC 38 to be performed</description>
                  <value>0x13</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC40</name>
                  <description>ECC 40 to be performed</description>
                  <value>0x14</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>META_SIZE</name>
              <description>Indicates the size of the metadata (in bytes) to be stored on a flash page</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>NBLOCKS</name>
              <description>Number of subsequent blocks on the flash page (excluding the data0 block)</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>FLASH2LAYOUT0_CLR</name>
          <description>Hardware BCH ECC Flash 2 Layout 0 Register</description>
          <addressOffset>0xC8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x70A4080</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA0_SIZE</name>
              <description>Indicates the size of the data 0 block (in DWORDS / four bytes) to be stored on the flash page</description>
              <bitOffset>0</bitOffset>
              <bitWidth>10</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>GF13_0_GF14_1</name>
              <description>Select GF13 or GF14: 0-GF13; 1-GF14</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ECC0</name>
              <description>Indicates the ECC level for the first block on the flash page</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NONE</name>
                  <description>No ECC to be performed</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC2</name>
                  <description>ECC 2 to be performed</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC4</name>
                  <description>ECC 4 to be performed</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC6</name>
                  <description>ECC 6 to be performed</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC8</name>
                  <description>ECC 8 to be performed</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC10</name>
                  <description>ECC 10 to be performed</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC12</name>
                  <description>ECC 12 to be performed</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC14</name>
                  <description>ECC 14 to be performed</description>
                  <value>0x7</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC16</name>
                  <description>ECC 16 to be performed</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC18</name>
                  <description>ECC 18 to be performed</description>
                  <value>0x9</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC20</name>
                  <description>ECC 20 to be performed</description>
                  <value>0xA</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC22</name>
                  <description>ECC 22 to be performed</description>
                  <value>0xB</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC24</name>
                  <description>ECC 24 to be performed</description>
                  <value>0xC</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC26</name>
                  <description>ECC 26 to be performed</description>
                  <value>0xD</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC28</name>
                  <description>ECC 28 to be performed</description>
                  <value>0xE</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC30</name>
                  <description>ECC 30 to be performed</description>
                  <value>0xF</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC32</name>
                  <description>ECC 32 to be performed</description>
                  <value>0x10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC34</name>
                  <description>ECC 34 to be performed</description>
                  <value>0x11</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC36</name>
                  <description>ECC 36 to be performed</description>
                  <value>0x12</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC38</name>
                  <description>ECC 38 to be performed</description>
                  <value>0x13</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC40</name>
                  <description>ECC 40 to be performed</description>
                  <value>0x14</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>META_SIZE</name>
              <description>Indicates the size of the metadata (in bytes) to be stored on a flash page</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>NBLOCKS</name>
              <description>Number of subsequent blocks on the flash page (excluding the data0 block)</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>FLASH2LAYOUT0_TOG</name>
          <description>Hardware BCH ECC Flash 2 Layout 0 Register</description>
          <addressOffset>0xCC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x70A4080</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA0_SIZE</name>
              <description>Indicates the size of the data 0 block (in DWORDS / four bytes) to be stored on the flash page</description>
              <bitOffset>0</bitOffset>
              <bitWidth>10</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>GF13_0_GF14_1</name>
              <description>Select GF13 or GF14: 0-GF13; 1-GF14</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ECC0</name>
              <description>Indicates the ECC level for the first block on the flash page</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NONE</name>
                  <description>No ECC to be performed</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC2</name>
                  <description>ECC 2 to be performed</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC4</name>
                  <description>ECC 4 to be performed</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC6</name>
                  <description>ECC 6 to be performed</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC8</name>
                  <description>ECC 8 to be performed</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC10</name>
                  <description>ECC 10 to be performed</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC12</name>
                  <description>ECC 12 to be performed</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC14</name>
                  <description>ECC 14 to be performed</description>
                  <value>0x7</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC16</name>
                  <description>ECC 16 to be performed</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC18</name>
                  <description>ECC 18 to be performed</description>
                  <value>0x9</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC20</name>
                  <description>ECC 20 to be performed</description>
                  <value>0xA</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC22</name>
                  <description>ECC 22 to be performed</description>
                  <value>0xB</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC24</name>
                  <description>ECC 24 to be performed</description>
                  <value>0xC</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC26</name>
                  <description>ECC 26 to be performed</description>
                  <value>0xD</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC28</name>
                  <description>ECC 28 to be performed</description>
                  <value>0xE</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC30</name>
                  <description>ECC 30 to be performed</description>
                  <value>0xF</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC32</name>
                  <description>ECC 32 to be performed</description>
                  <value>0x10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC34</name>
                  <description>ECC 34 to be performed</description>
                  <value>0x11</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC36</name>
                  <description>ECC 36 to be performed</description>
                  <value>0x12</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC38</name>
                  <description>ECC 38 to be performed</description>
                  <value>0x13</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC40</name>
                  <description>ECC 40 to be performed</description>
                  <value>0x14</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>META_SIZE</name>
              <description>Indicates the size of the metadata (in bytes) to be stored on a flash page</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>NBLOCKS</name>
              <description>Number of subsequent blocks on the flash page (excluding the data0 block)</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>FLASH2LAYOUT1</name>
          <description>Hardware BCH ECC Flash 2 Layout 1 Register</description>
          <addressOffset>0xD0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10DA4080</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATAN_SIZE</name>
              <description>Indicates the size of the subsequent data blocks (in DWORDS / four bytes) to be stored on the flash page</description>
              <bitOffset>0</bitOffset>
              <bitWidth>10</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>GF13_0_GF14_1</name>
              <description>Select GF13 or GF14: 0-GF13; 1-GF14</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ECCN</name>
              <description>Indicates the ECC level for the subsequent blocks on the flash page (blocks 1-n)</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NONE</name>
                  <description>No ECC to be performed</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC2</name>
                  <description>ECC 2 to be performed</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC4</name>
                  <description>ECC 4 to be performed</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC6</name>
                  <description>ECC 6 to be performed</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC8</name>
                  <description>ECC 8 to be performed</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC10</name>
                  <description>ECC 10 to be performed</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC12</name>
                  <description>ECC 12 to be performed</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC14</name>
                  <description>ECC 14 to be performed</description>
                  <value>0x7</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC16</name>
                  <description>ECC 16 to be performed</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC18</name>
                  <description>ECC 18 to be performed</description>
                  <value>0x9</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC20</name>
                  <description>ECC 20 to be performed</description>
                  <value>0xA</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC22</name>
                  <description>ECC 22 to be performed</description>
                  <value>0xB</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC24</name>
                  <description>ECC 24 to be performed</description>
                  <value>0xC</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC26</name>
                  <description>ECC 26 to be performed</description>
                  <value>0xD</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC28</name>
                  <description>ECC 28 to be performed</description>
                  <value>0xE</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC30</name>
                  <description>ECC 30 to be performed</description>
                  <value>0xF</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC32</name>
                  <description>ECC 32 to be performed</description>
                  <value>0x10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC34</name>
                  <description>ECC 34 to be performed</description>
                  <value>0x11</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC36</name>
                  <description>ECC 36 to be performed</description>
                  <value>0x12</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC38</name>
                  <description>ECC 38 to be performed</description>
                  <value>0x13</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC40</name>
                  <description>ECC 40 to be performed</description>
                  <value>0x14</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PAGE_SIZE</name>
              <description>Indicates the total size of the flash page (in bytes)</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>FLASH2LAYOUT1_SET</name>
          <description>Hardware BCH ECC Flash 2 Layout 1 Register</description>
          <addressOffset>0xD4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10DA4080</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATAN_SIZE</name>
              <description>Indicates the size of the subsequent data blocks (in DWORDS / four bytes) to be stored on the flash page</description>
              <bitOffset>0</bitOffset>
              <bitWidth>10</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>GF13_0_GF14_1</name>
              <description>Select GF13 or GF14: 0-GF13; 1-GF14</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ECCN</name>
              <description>Indicates the ECC level for the subsequent blocks on the flash page (blocks 1-n)</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NONE</name>
                  <description>No ECC to be performed</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC2</name>
                  <description>ECC 2 to be performed</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC4</name>
                  <description>ECC 4 to be performed</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC6</name>
                  <description>ECC 6 to be performed</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC8</name>
                  <description>ECC 8 to be performed</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC10</name>
                  <description>ECC 10 to be performed</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC12</name>
                  <description>ECC 12 to be performed</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC14</name>
                  <description>ECC 14 to be performed</description>
                  <value>0x7</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC16</name>
                  <description>ECC 16 to be performed</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC18</name>
                  <description>ECC 18 to be performed</description>
                  <value>0x9</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC20</name>
                  <description>ECC 20 to be performed</description>
                  <value>0xA</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC22</name>
                  <description>ECC 22 to be performed</description>
                  <value>0xB</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC24</name>
                  <description>ECC 24 to be performed</description>
                  <value>0xC</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC26</name>
                  <description>ECC 26 to be performed</description>
                  <value>0xD</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC28</name>
                  <description>ECC 28 to be performed</description>
                  <value>0xE</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC30</name>
                  <description>ECC 30 to be performed</description>
                  <value>0xF</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC32</name>
                  <description>ECC 32 to be performed</description>
                  <value>0x10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC34</name>
                  <description>ECC 34 to be performed</description>
                  <value>0x11</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC36</name>
                  <description>ECC 36 to be performed</description>
                  <value>0x12</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC38</name>
                  <description>ECC 38 to be performed</description>
                  <value>0x13</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC40</name>
                  <description>ECC 40 to be performed</description>
                  <value>0x14</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PAGE_SIZE</name>
              <description>Indicates the total size of the flash page (in bytes)</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>FLASH2LAYOUT1_CLR</name>
          <description>Hardware BCH ECC Flash 2 Layout 1 Register</description>
          <addressOffset>0xD8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10DA4080</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATAN_SIZE</name>
              <description>Indicates the size of the subsequent data blocks (in DWORDS / four bytes) to be stored on the flash page</description>
              <bitOffset>0</bitOffset>
              <bitWidth>10</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>GF13_0_GF14_1</name>
              <description>Select GF13 or GF14: 0-GF13; 1-GF14</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ECCN</name>
              <description>Indicates the ECC level for the subsequent blocks on the flash page (blocks 1-n)</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NONE</name>
                  <description>No ECC to be performed</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC2</name>
                  <description>ECC 2 to be performed</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC4</name>
                  <description>ECC 4 to be performed</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC6</name>
                  <description>ECC 6 to be performed</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC8</name>
                  <description>ECC 8 to be performed</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC10</name>
                  <description>ECC 10 to be performed</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC12</name>
                  <description>ECC 12 to be performed</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC14</name>
                  <description>ECC 14 to be performed</description>
                  <value>0x7</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC16</name>
                  <description>ECC 16 to be performed</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC18</name>
                  <description>ECC 18 to be performed</description>
                  <value>0x9</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC20</name>
                  <description>ECC 20 to be performed</description>
                  <value>0xA</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC22</name>
                  <description>ECC 22 to be performed</description>
                  <value>0xB</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC24</name>
                  <description>ECC 24 to be performed</description>
                  <value>0xC</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC26</name>
                  <description>ECC 26 to be performed</description>
                  <value>0xD</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC28</name>
                  <description>ECC 28 to be performed</description>
                  <value>0xE</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC30</name>
                  <description>ECC 30 to be performed</description>
                  <value>0xF</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC32</name>
                  <description>ECC 32 to be performed</description>
                  <value>0x10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC34</name>
                  <description>ECC 34 to be performed</description>
                  <value>0x11</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC36</name>
                  <description>ECC 36 to be performed</description>
                  <value>0x12</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC38</name>
                  <description>ECC 38 to be performed</description>
                  <value>0x13</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC40</name>
                  <description>ECC 40 to be performed</description>
                  <value>0x14</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PAGE_SIZE</name>
              <description>Indicates the total size of the flash page (in bytes)</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>FLASH2LAYOUT1_TOG</name>
          <description>Hardware BCH ECC Flash 2 Layout 1 Register</description>
          <addressOffset>0xDC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10DA4080</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATAN_SIZE</name>
              <description>Indicates the size of the subsequent data blocks (in DWORDS / four bytes) to be stored on the flash page</description>
              <bitOffset>0</bitOffset>
              <bitWidth>10</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>GF13_0_GF14_1</name>
              <description>Select GF13 or GF14: 0-GF13; 1-GF14</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ECCN</name>
              <description>Indicates the ECC level for the subsequent blocks on the flash page (blocks 1-n)</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NONE</name>
                  <description>No ECC to be performed</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC2</name>
                  <description>ECC 2 to be performed</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC4</name>
                  <description>ECC 4 to be performed</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC6</name>
                  <description>ECC 6 to be performed</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC8</name>
                  <description>ECC 8 to be performed</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC10</name>
                  <description>ECC 10 to be performed</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC12</name>
                  <description>ECC 12 to be performed</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC14</name>
                  <description>ECC 14 to be performed</description>
                  <value>0x7</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC16</name>
                  <description>ECC 16 to be performed</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC18</name>
                  <description>ECC 18 to be performed</description>
                  <value>0x9</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC20</name>
                  <description>ECC 20 to be performed</description>
                  <value>0xA</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC22</name>
                  <description>ECC 22 to be performed</description>
                  <value>0xB</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC24</name>
                  <description>ECC 24 to be performed</description>
                  <value>0xC</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC26</name>
                  <description>ECC 26 to be performed</description>
                  <value>0xD</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC28</name>
                  <description>ECC 28 to be performed</description>
                  <value>0xE</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC30</name>
                  <description>ECC 30 to be performed</description>
                  <value>0xF</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC32</name>
                  <description>ECC 32 to be performed</description>
                  <value>0x10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC34</name>
                  <description>ECC 34 to be performed</description>
                  <value>0x11</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC36</name>
                  <description>ECC 36 to be performed</description>
                  <value>0x12</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC38</name>
                  <description>ECC 38 to be performed</description>
                  <value>0x13</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC40</name>
                  <description>ECC 40 to be performed</description>
                  <value>0x14</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PAGE_SIZE</name>
              <description>Indicates the total size of the flash page (in bytes)</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>FLASH3LAYOUT0</name>
          <description>Hardware BCH ECC Flash 3 Layout 0 Register</description>
          <addressOffset>0xE0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x70A4080</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA0_SIZE</name>
              <description>Indicates the size of the data 0 block (in DWORDS / four bytes) to be stored on the flash page</description>
              <bitOffset>0</bitOffset>
              <bitWidth>10</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>GF13_0_GF14_1</name>
              <description>Select GF13 or GF14: 0-GF13; 1-GF14</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ECC0</name>
              <description>Indicates the ECC level for the first block on the flash page</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NONE</name>
                  <description>No ECC to be performed</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC2</name>
                  <description>ECC 2 to be performed</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC4</name>
                  <description>ECC 4 to be performed</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC6</name>
                  <description>ECC 6 to be performed</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC8</name>
                  <description>ECC 8 to be performed</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC10</name>
                  <description>ECC 10 to be performed</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC12</name>
                  <description>ECC 12 to be performed</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC14</name>
                  <description>ECC 14 to be performed</description>
                  <value>0x7</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC16</name>
                  <description>ECC 16 to be performed</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC18</name>
                  <description>ECC 18 to be performed</description>
                  <value>0x9</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC20</name>
                  <description>ECC 20 to be performed</description>
                  <value>0xA</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC22</name>
                  <description>ECC 22 to be performed</description>
                  <value>0xB</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC24</name>
                  <description>ECC 24 to be performed</description>
                  <value>0xC</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC26</name>
                  <description>ECC 26 to be performed</description>
                  <value>0xD</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC28</name>
                  <description>ECC 28 to be performed</description>
                  <value>0xE</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC30</name>
                  <description>ECC 30 to be performed</description>
                  <value>0xF</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC32</name>
                  <description>ECC 32 to be performed</description>
                  <value>0x10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC34</name>
                  <description>ECC 34 to be performed</description>
                  <value>0x11</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC36</name>
                  <description>ECC 36 to be performed</description>
                  <value>0x12</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC38</name>
                  <description>ECC 38 to be performed</description>
                  <value>0x13</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC40</name>
                  <description>ECC 40 to be performed</description>
                  <value>0x14</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>META_SIZE</name>
              <description>Indicates the size of the metadata (in bytes) to be stored on a flash page</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>NBLOCKS</name>
              <description>Number of subsequent blocks on the flash page (excluding the data0 block)</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>FLASH3LAYOUT0_SET</name>
          <description>Hardware BCH ECC Flash 3 Layout 0 Register</description>
          <addressOffset>0xE4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x70A4080</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA0_SIZE</name>
              <description>Indicates the size of the data 0 block (in DWORDS / four bytes) to be stored on the flash page</description>
              <bitOffset>0</bitOffset>
              <bitWidth>10</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>GF13_0_GF14_1</name>
              <description>Select GF13 or GF14: 0-GF13; 1-GF14</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ECC0</name>
              <description>Indicates the ECC level for the first block on the flash page</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NONE</name>
                  <description>No ECC to be performed</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC2</name>
                  <description>ECC 2 to be performed</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC4</name>
                  <description>ECC 4 to be performed</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC6</name>
                  <description>ECC 6 to be performed</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC8</name>
                  <description>ECC 8 to be performed</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC10</name>
                  <description>ECC 10 to be performed</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC12</name>
                  <description>ECC 12 to be performed</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC14</name>
                  <description>ECC 14 to be performed</description>
                  <value>0x7</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC16</name>
                  <description>ECC 16 to be performed</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC18</name>
                  <description>ECC 18 to be performed</description>
                  <value>0x9</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC20</name>
                  <description>ECC 20 to be performed</description>
                  <value>0xA</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC22</name>
                  <description>ECC 22 to be performed</description>
                  <value>0xB</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC24</name>
                  <description>ECC 24 to be performed</description>
                  <value>0xC</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC26</name>
                  <description>ECC 26 to be performed</description>
                  <value>0xD</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC28</name>
                  <description>ECC 28 to be performed</description>
                  <value>0xE</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC30</name>
                  <description>ECC 30 to be performed</description>
                  <value>0xF</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC32</name>
                  <description>ECC 32 to be performed</description>
                  <value>0x10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC34</name>
                  <description>ECC 34 to be performed</description>
                  <value>0x11</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC36</name>
                  <description>ECC 36 to be performed</description>
                  <value>0x12</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC38</name>
                  <description>ECC 38 to be performed</description>
                  <value>0x13</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC40</name>
                  <description>ECC 40 to be performed</description>
                  <value>0x14</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>META_SIZE</name>
              <description>Indicates the size of the metadata (in bytes) to be stored on a flash page</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>NBLOCKS</name>
              <description>Number of subsequent blocks on the flash page (excluding the data0 block)</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>FLASH3LAYOUT0_CLR</name>
          <description>Hardware BCH ECC Flash 3 Layout 0 Register</description>
          <addressOffset>0xE8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x70A4080</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA0_SIZE</name>
              <description>Indicates the size of the data 0 block (in DWORDS / four bytes) to be stored on the flash page</description>
              <bitOffset>0</bitOffset>
              <bitWidth>10</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>GF13_0_GF14_1</name>
              <description>Select GF13 or GF14: 0-GF13; 1-GF14</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ECC0</name>
              <description>Indicates the ECC level for the first block on the flash page</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NONE</name>
                  <description>No ECC to be performed</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC2</name>
                  <description>ECC 2 to be performed</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC4</name>
                  <description>ECC 4 to be performed</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC6</name>
                  <description>ECC 6 to be performed</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC8</name>
                  <description>ECC 8 to be performed</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC10</name>
                  <description>ECC 10 to be performed</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC12</name>
                  <description>ECC 12 to be performed</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC14</name>
                  <description>ECC 14 to be performed</description>
                  <value>0x7</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC16</name>
                  <description>ECC 16 to be performed</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC18</name>
                  <description>ECC 18 to be performed</description>
                  <value>0x9</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC20</name>
                  <description>ECC 20 to be performed</description>
                  <value>0xA</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC22</name>
                  <description>ECC 22 to be performed</description>
                  <value>0xB</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC24</name>
                  <description>ECC 24 to be performed</description>
                  <value>0xC</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC26</name>
                  <description>ECC 26 to be performed</description>
                  <value>0xD</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC28</name>
                  <description>ECC 28 to be performed</description>
                  <value>0xE</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC30</name>
                  <description>ECC 30 to be performed</description>
                  <value>0xF</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC32</name>
                  <description>ECC 32 to be performed</description>
                  <value>0x10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC34</name>
                  <description>ECC 34 to be performed</description>
                  <value>0x11</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC36</name>
                  <description>ECC 36 to be performed</description>
                  <value>0x12</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC38</name>
                  <description>ECC 38 to be performed</description>
                  <value>0x13</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC40</name>
                  <description>ECC 40 to be performed</description>
                  <value>0x14</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>META_SIZE</name>
              <description>Indicates the size of the metadata (in bytes) to be stored on a flash page</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>NBLOCKS</name>
              <description>Number of subsequent blocks on the flash page (excluding the data0 block)</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>FLASH3LAYOUT0_TOG</name>
          <description>Hardware BCH ECC Flash 3 Layout 0 Register</description>
          <addressOffset>0xEC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x70A4080</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA0_SIZE</name>
              <description>Indicates the size of the data 0 block (in DWORDS / four bytes) to be stored on the flash page</description>
              <bitOffset>0</bitOffset>
              <bitWidth>10</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>GF13_0_GF14_1</name>
              <description>Select GF13 or GF14: 0-GF13; 1-GF14</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ECC0</name>
              <description>Indicates the ECC level for the first block on the flash page</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NONE</name>
                  <description>No ECC to be performed</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC2</name>
                  <description>ECC 2 to be performed</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC4</name>
                  <description>ECC 4 to be performed</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC6</name>
                  <description>ECC 6 to be performed</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC8</name>
                  <description>ECC 8 to be performed</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC10</name>
                  <description>ECC 10 to be performed</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC12</name>
                  <description>ECC 12 to be performed</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC14</name>
                  <description>ECC 14 to be performed</description>
                  <value>0x7</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC16</name>
                  <description>ECC 16 to be performed</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC18</name>
                  <description>ECC 18 to be performed</description>
                  <value>0x9</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC20</name>
                  <description>ECC 20 to be performed</description>
                  <value>0xA</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC22</name>
                  <description>ECC 22 to be performed</description>
                  <value>0xB</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC24</name>
                  <description>ECC 24 to be performed</description>
                  <value>0xC</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC26</name>
                  <description>ECC 26 to be performed</description>
                  <value>0xD</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC28</name>
                  <description>ECC 28 to be performed</description>
                  <value>0xE</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC30</name>
                  <description>ECC 30 to be performed</description>
                  <value>0xF</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC32</name>
                  <description>ECC 32 to be performed</description>
                  <value>0x10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC34</name>
                  <description>ECC 34 to be performed</description>
                  <value>0x11</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC36</name>
                  <description>ECC 36 to be performed</description>
                  <value>0x12</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC38</name>
                  <description>ECC 38 to be performed</description>
                  <value>0x13</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC40</name>
                  <description>ECC 40 to be performed</description>
                  <value>0x14</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>META_SIZE</name>
              <description>Indicates the size of the metadata (in bytes) to be stored on a flash page</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>NBLOCKS</name>
              <description>Number of subsequent blocks on the flash page (excluding the data0 block)</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>FLASH3LAYOUT1</name>
          <description>Hardware BCH ECC Flash 3 Layout 1 Register</description>
          <addressOffset>0xF0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10DA4080</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATAN_SIZE</name>
              <description>Indicates the size of the subsequent data blocks (in DWORDS / four bytes) to be stored on the flash page</description>
              <bitOffset>0</bitOffset>
              <bitWidth>10</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>GF13_0_GF14_1</name>
              <description>Select GF13 or GF14: 0-GF13; 1-GF14</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ECCN</name>
              <description>Indicates the ECC level for the subsequent blocks on the flash page (blocks 1-n)</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NONE</name>
                  <description>No ECC to be performed</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC2</name>
                  <description>ECC 2 to be performed</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC4</name>
                  <description>ECC 4 to be performed</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC6</name>
                  <description>ECC 6 to be performed</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC8</name>
                  <description>ECC 8 to be performed</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC10</name>
                  <description>ECC 10 to be performed</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC12</name>
                  <description>ECC 12 to be performed</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC14</name>
                  <description>ECC 14 to be performed</description>
                  <value>0x7</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC16</name>
                  <description>ECC 16 to be performed</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC18</name>
                  <description>ECC 18 to be performed</description>
                  <value>0x9</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC20</name>
                  <description>ECC 20 to be performed</description>
                  <value>0xA</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC22</name>
                  <description>ECC 22 to be performed</description>
                  <value>0xB</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC24</name>
                  <description>ECC 24 to be performed</description>
                  <value>0xC</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC26</name>
                  <description>ECC 26 to be performed</description>
                  <value>0xD</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC28</name>
                  <description>ECC 28 to be performed</description>
                  <value>0xE</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC30</name>
                  <description>ECC 30 to be performed</description>
                  <value>0xF</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC32</name>
                  <description>ECC 32 to be performed</description>
                  <value>0x10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC34</name>
                  <description>ECC 34 to be performed</description>
                  <value>0x11</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC36</name>
                  <description>ECC 36 to be performed</description>
                  <value>0x12</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC38</name>
                  <description>ECC 38 to be performed</description>
                  <value>0x13</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC40</name>
                  <description>ECC 40 to be performed</description>
                  <value>0x14</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PAGE_SIZE</name>
              <description>Indicates the total size of the flash page (in bytes)</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>FLASH3LAYOUT1_SET</name>
          <description>Hardware BCH ECC Flash 3 Layout 1 Register</description>
          <addressOffset>0xF4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10DA4080</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATAN_SIZE</name>
              <description>Indicates the size of the subsequent data blocks (in DWORDS / four bytes) to be stored on the flash page</description>
              <bitOffset>0</bitOffset>
              <bitWidth>10</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>GF13_0_GF14_1</name>
              <description>Select GF13 or GF14: 0-GF13; 1-GF14</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ECCN</name>
              <description>Indicates the ECC level for the subsequent blocks on the flash page (blocks 1-n)</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NONE</name>
                  <description>No ECC to be performed</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC2</name>
                  <description>ECC 2 to be performed</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC4</name>
                  <description>ECC 4 to be performed</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC6</name>
                  <description>ECC 6 to be performed</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC8</name>
                  <description>ECC 8 to be performed</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC10</name>
                  <description>ECC 10 to be performed</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC12</name>
                  <description>ECC 12 to be performed</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC14</name>
                  <description>ECC 14 to be performed</description>
                  <value>0x7</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC16</name>
                  <description>ECC 16 to be performed</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC18</name>
                  <description>ECC 18 to be performed</description>
                  <value>0x9</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC20</name>
                  <description>ECC 20 to be performed</description>
                  <value>0xA</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC22</name>
                  <description>ECC 22 to be performed</description>
                  <value>0xB</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC24</name>
                  <description>ECC 24 to be performed</description>
                  <value>0xC</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC26</name>
                  <description>ECC 26 to be performed</description>
                  <value>0xD</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC28</name>
                  <description>ECC 28 to be performed</description>
                  <value>0xE</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC30</name>
                  <description>ECC 30 to be performed</description>
                  <value>0xF</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC32</name>
                  <description>ECC 32 to be performed</description>
                  <value>0x10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC34</name>
                  <description>ECC 34 to be performed</description>
                  <value>0x11</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC36</name>
                  <description>ECC 36 to be performed</description>
                  <value>0x12</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC38</name>
                  <description>ECC 38 to be performed</description>
                  <value>0x13</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC40</name>
                  <description>ECC 40 to be performed</description>
                  <value>0x14</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PAGE_SIZE</name>
              <description>Indicates the total size of the flash page (in bytes)</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>FLASH3LAYOUT1_CLR</name>
          <description>Hardware BCH ECC Flash 3 Layout 1 Register</description>
          <addressOffset>0xF8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10DA4080</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATAN_SIZE</name>
              <description>Indicates the size of the subsequent data blocks (in DWORDS / four bytes) to be stored on the flash page</description>
              <bitOffset>0</bitOffset>
              <bitWidth>10</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>GF13_0_GF14_1</name>
              <description>Select GF13 or GF14: 0-GF13; 1-GF14</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ECCN</name>
              <description>Indicates the ECC level for the subsequent blocks on the flash page (blocks 1-n)</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NONE</name>
                  <description>No ECC to be performed</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC2</name>
                  <description>ECC 2 to be performed</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC4</name>
                  <description>ECC 4 to be performed</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC6</name>
                  <description>ECC 6 to be performed</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC8</name>
                  <description>ECC 8 to be performed</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC10</name>
                  <description>ECC 10 to be performed</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC12</name>
                  <description>ECC 12 to be performed</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC14</name>
                  <description>ECC 14 to be performed</description>
                  <value>0x7</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC16</name>
                  <description>ECC 16 to be performed</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC18</name>
                  <description>ECC 18 to be performed</description>
                  <value>0x9</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC20</name>
                  <description>ECC 20 to be performed</description>
                  <value>0xA</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC22</name>
                  <description>ECC 22 to be performed</description>
                  <value>0xB</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC24</name>
                  <description>ECC 24 to be performed</description>
                  <value>0xC</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC26</name>
                  <description>ECC 26 to be performed</description>
                  <value>0xD</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC28</name>
                  <description>ECC 28 to be performed</description>
                  <value>0xE</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC30</name>
                  <description>ECC 30 to be performed</description>
                  <value>0xF</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC32</name>
                  <description>ECC 32 to be performed</description>
                  <value>0x10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC34</name>
                  <description>ECC 34 to be performed</description>
                  <value>0x11</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC36</name>
                  <description>ECC 36 to be performed</description>
                  <value>0x12</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC38</name>
                  <description>ECC 38 to be performed</description>
                  <value>0x13</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC40</name>
                  <description>ECC 40 to be performed</description>
                  <value>0x14</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PAGE_SIZE</name>
              <description>Indicates the total size of the flash page (in bytes)</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>FLASH3LAYOUT1_TOG</name>
          <description>Hardware BCH ECC Flash 3 Layout 1 Register</description>
          <addressOffset>0xFC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10DA4080</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATAN_SIZE</name>
              <description>Indicates the size of the subsequent data blocks (in DWORDS / four bytes) to be stored on the flash page</description>
              <bitOffset>0</bitOffset>
              <bitWidth>10</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>GF13_0_GF14_1</name>
              <description>Select GF13 or GF14: 0-GF13; 1-GF14</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ECCN</name>
              <description>Indicates the ECC level for the subsequent blocks on the flash page (blocks 1-n)</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NONE</name>
                  <description>No ECC to be performed</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC2</name>
                  <description>ECC 2 to be performed</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC4</name>
                  <description>ECC 4 to be performed</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC6</name>
                  <description>ECC 6 to be performed</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC8</name>
                  <description>ECC 8 to be performed</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC10</name>
                  <description>ECC 10 to be performed</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC12</name>
                  <description>ECC 12 to be performed</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC14</name>
                  <description>ECC 14 to be performed</description>
                  <value>0x7</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC16</name>
                  <description>ECC 16 to be performed</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC18</name>
                  <description>ECC 18 to be performed</description>
                  <value>0x9</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC20</name>
                  <description>ECC 20 to be performed</description>
                  <value>0xA</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC22</name>
                  <description>ECC 22 to be performed</description>
                  <value>0xB</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC24</name>
                  <description>ECC 24 to be performed</description>
                  <value>0xC</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC26</name>
                  <description>ECC 26 to be performed</description>
                  <value>0xD</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC28</name>
                  <description>ECC 28 to be performed</description>
                  <value>0xE</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC30</name>
                  <description>ECC 30 to be performed</description>
                  <value>0xF</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC32</name>
                  <description>ECC 32 to be performed</description>
                  <value>0x10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC34</name>
                  <description>ECC 34 to be performed</description>
                  <value>0x11</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC36</name>
                  <description>ECC 36 to be performed</description>
                  <value>0x12</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC38</name>
                  <description>ECC 38 to be performed</description>
                  <value>0x13</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC40</name>
                  <description>ECC 40 to be performed</description>
                  <value>0x14</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PAGE_SIZE</name>
              <description>Indicates the total size of the flash page (in bytes)</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>DEBUG0</name>
          <description>Hardware BCH ECC Debug Register0</description>
          <addressOffset>0x100</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DEBUG_REG_SELECT</name>
              <description>The value loaded in this bit field is used to select the internal register state view of KES engine or the Chien search engine</description>
              <bitOffset>0</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD0</name>
              <description>This field is reserved.</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>BM_KES_TEST_BYPASS</name>
              <description>1 = Point all SYND_GEN writes to dummy area at the end of the AUXILLIARY block so that diagnostics can preload all payload, parity bytes and computed syndrome bytes for test the KES engine</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NORMAL</name>
                  <description>Bus master address generator for SYND_GEN writes operates normally.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TEST_MODE</name>
                  <description>Bus master address generator always addresses last four bytes in Auxiliary block.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>KES_DEBUG_STALL</name>
              <description>Set to one to cause KES FSM to stall after notifying Chien search engine to start processing its block but before notifying the bus master that the KES computation is complete</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NORMAL</name>
                  <description>KES FSM proceeds to next block supplied by bus master.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WAIT</name>
                  <description>KES FSM waits after current equations are solved and the search engine is started.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>KES_DEBUG_STEP</name>
              <description>Toggling this bit causes the KES FSM to skip passed the stall state if it is in DEBUG_STALL mode and completed processing a block</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>KES_STANDALONE</name>
              <description>Set to one, cause the KES engine to suppress toggling the KES_BM_DONE signal to the bus master and suppress toggling the CF_BM_DONE signal by the CF engine</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NORMAL</name>
                  <description>Bus master address generator for SYND_GEN writes operates normally.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TEST_MODE</name>
                  <description>Bus master address generator always addresses last four bytes in Auxiliary block.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>KES_DEBUG_KICK</name>
              <description>Toggling causes KES engine FSM to start as if kick by the Bus Master</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>KES_DEBUG_MODE4K</name>
              <description>When running the stand alone debug mode on the error calculator, the state of this bit is presented to the KES engine as the input mode (4K or 2K pages)</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>4k</name>
                  <description>Mode is set for 4K NAND pages.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>KES_DEBUG_PAYLOAD_FLAG</name>
              <description>When running the stand alone debug mode on the error calculator, the state of this bit is presented to the KES engine as the input payload flag</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DATA</name>
                  <description>Payload is set for 512 bytes data block.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>KES_DEBUG_SHIFT_SYND</name>
              <description>Toggling this bit causes the value in BCH_DEBUG0_KES_SYNDROME_SYMBOL to be shift into the syndrome register array at the input to the KES engine</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>KES_DEBUG_SYNDROME_SYMBOL</name>
              <description>The 9 bit value in this bit field shifts into the syndrome register array at the input of the KES engine whenever BCH_DEBUG0_KES_DEBUG_SHIFT_SYND is toggled</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>9</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NORMAL</name>
                  <description>Bus master address generator for SYND_GEN writes operates normally.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TEST_MODE</name>
                  <description>Bus master address generator always addresses last four bytes in Auxiliary block.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RSVD1</name>
              <description>This field is reserved.</description>
              <bitOffset>0x19</bitOffset>
              <bitWidth>7</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>DEBUG0_SET</name>
          <description>Hardware BCH ECC Debug Register0</description>
          <addressOffset>0x104</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DEBUG_REG_SELECT</name>
              <description>The value loaded in this bit field is used to select the internal register state view of KES engine or the Chien search engine</description>
              <bitOffset>0</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD0</name>
              <description>This field is reserved.</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>BM_KES_TEST_BYPASS</name>
              <description>1 = Point all SYND_GEN writes to dummy area at the end of the AUXILLIARY block so that diagnostics can preload all payload, parity bytes and computed syndrome bytes for test the KES engine</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NORMAL</name>
                  <description>Bus master address generator for SYND_GEN writes operates normally.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TEST_MODE</name>
                  <description>Bus master address generator always addresses last four bytes in Auxiliary block.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>KES_DEBUG_STALL</name>
              <description>Set to one to cause KES FSM to stall after notifying Chien search engine to start processing its block but before notifying the bus master that the KES computation is complete</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NORMAL</name>
                  <description>KES FSM proceeds to next block supplied by bus master.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WAIT</name>
                  <description>KES FSM waits after current equations are solved and the search engine is started.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>KES_DEBUG_STEP</name>
              <description>Toggling this bit causes the KES FSM to skip passed the stall state if it is in DEBUG_STALL mode and completed processing a block</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>KES_STANDALONE</name>
              <description>Set to one, cause the KES engine to suppress toggling the KES_BM_DONE signal to the bus master and suppress toggling the CF_BM_DONE signal by the CF engine</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NORMAL</name>
                  <description>Bus master address generator for SYND_GEN writes operates normally.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TEST_MODE</name>
                  <description>Bus master address generator always addresses last four bytes in Auxiliary block.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>KES_DEBUG_KICK</name>
              <description>Toggling causes KES engine FSM to start as if kick by the Bus Master</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>KES_DEBUG_MODE4K</name>
              <description>When running the stand alone debug mode on the error calculator, the state of this bit is presented to the KES engine as the input mode (4K or 2K pages)</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>4k</name>
                  <description>Mode is set for 4K NAND pages.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>KES_DEBUG_PAYLOAD_FLAG</name>
              <description>When running the stand alone debug mode on the error calculator, the state of this bit is presented to the KES engine as the input payload flag</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DATA</name>
                  <description>Payload is set for 512 bytes data block.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>KES_DEBUG_SHIFT_SYND</name>
              <description>Toggling this bit causes the value in BCH_DEBUG0_KES_SYNDROME_SYMBOL to be shift into the syndrome register array at the input to the KES engine</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>KES_DEBUG_SYNDROME_SYMBOL</name>
              <description>The 9 bit value in this bit field shifts into the syndrome register array at the input of the KES engine whenever BCH_DEBUG0_KES_DEBUG_SHIFT_SYND is toggled</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>9</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NORMAL</name>
                  <description>Bus master address generator for SYND_GEN writes operates normally.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TEST_MODE</name>
                  <description>Bus master address generator always addresses last four bytes in Auxiliary block.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RSVD1</name>
              <description>This field is reserved.</description>
              <bitOffset>0x19</bitOffset>
              <bitWidth>7</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>DEBUG0_CLR</name>
          <description>Hardware BCH ECC Debug Register0</description>
          <addressOffset>0x108</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DEBUG_REG_SELECT</name>
              <description>The value loaded in this bit field is used to select the internal register state view of KES engine or the Chien search engine</description>
              <bitOffset>0</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD0</name>
              <description>This field is reserved.</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>BM_KES_TEST_BYPASS</name>
              <description>1 = Point all SYND_GEN writes to dummy area at the end of the AUXILLIARY block so that diagnostics can preload all payload, parity bytes and computed syndrome bytes for test the KES engine</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NORMAL</name>
                  <description>Bus master address generator for SYND_GEN writes operates normally.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TEST_MODE</name>
                  <description>Bus master address generator always addresses last four bytes in Auxiliary block.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>KES_DEBUG_STALL</name>
              <description>Set to one to cause KES FSM to stall after notifying Chien search engine to start processing its block but before notifying the bus master that the KES computation is complete</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NORMAL</name>
                  <description>KES FSM proceeds to next block supplied by bus master.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WAIT</name>
                  <description>KES FSM waits after current equations are solved and the search engine is started.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>KES_DEBUG_STEP</name>
              <description>Toggling this bit causes the KES FSM to skip passed the stall state if it is in DEBUG_STALL mode and completed processing a block</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>KES_STANDALONE</name>
              <description>Set to one, cause the KES engine to suppress toggling the KES_BM_DONE signal to the bus master and suppress toggling the CF_BM_DONE signal by the CF engine</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NORMAL</name>
                  <description>Bus master address generator for SYND_GEN writes operates normally.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TEST_MODE</name>
                  <description>Bus master address generator always addresses last four bytes in Auxiliary block.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>KES_DEBUG_KICK</name>
              <description>Toggling causes KES engine FSM to start as if kick by the Bus Master</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>KES_DEBUG_MODE4K</name>
              <description>When running the stand alone debug mode on the error calculator, the state of this bit is presented to the KES engine as the input mode (4K or 2K pages)</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>4k</name>
                  <description>Mode is set for 4K NAND pages.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>KES_DEBUG_PAYLOAD_FLAG</name>
              <description>When running the stand alone debug mode on the error calculator, the state of this bit is presented to the KES engine as the input payload flag</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DATA</name>
                  <description>Payload is set for 512 bytes data block.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>KES_DEBUG_SHIFT_SYND</name>
              <description>Toggling this bit causes the value in BCH_DEBUG0_KES_SYNDROME_SYMBOL to be shift into the syndrome register array at the input to the KES engine</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>KES_DEBUG_SYNDROME_SYMBOL</name>
              <description>The 9 bit value in this bit field shifts into the syndrome register array at the input of the KES engine whenever BCH_DEBUG0_KES_DEBUG_SHIFT_SYND is toggled</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>9</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NORMAL</name>
                  <description>Bus master address generator for SYND_GEN writes operates normally.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TEST_MODE</name>
                  <description>Bus master address generator always addresses last four bytes in Auxiliary block.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RSVD1</name>
              <description>This field is reserved.</description>
              <bitOffset>0x19</bitOffset>
              <bitWidth>7</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>DEBUG0_TOG</name>
          <description>Hardware BCH ECC Debug Register0</description>
          <addressOffset>0x10C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DEBUG_REG_SELECT</name>
              <description>The value loaded in this bit field is used to select the internal register state view of KES engine or the Chien search engine</description>
              <bitOffset>0</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD0</name>
              <description>This field is reserved.</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>BM_KES_TEST_BYPASS</name>
              <description>1 = Point all SYND_GEN writes to dummy area at the end of the AUXILLIARY block so that diagnostics can preload all payload, parity bytes and computed syndrome bytes for test the KES engine</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NORMAL</name>
                  <description>Bus master address generator for SYND_GEN writes operates normally.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TEST_MODE</name>
                  <description>Bus master address generator always addresses last four bytes in Auxiliary block.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>KES_DEBUG_STALL</name>
              <description>Set to one to cause KES FSM to stall after notifying Chien search engine to start processing its block but before notifying the bus master that the KES computation is complete</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NORMAL</name>
                  <description>KES FSM proceeds to next block supplied by bus master.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WAIT</name>
                  <description>KES FSM waits after current equations are solved and the search engine is started.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>KES_DEBUG_STEP</name>
              <description>Toggling this bit causes the KES FSM to skip passed the stall state if it is in DEBUG_STALL mode and completed processing a block</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>KES_STANDALONE</name>
              <description>Set to one, cause the KES engine to suppress toggling the KES_BM_DONE signal to the bus master and suppress toggling the CF_BM_DONE signal by the CF engine</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NORMAL</name>
                  <description>Bus master address generator for SYND_GEN writes operates normally.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TEST_MODE</name>
                  <description>Bus master address generator always addresses last four bytes in Auxiliary block.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>KES_DEBUG_KICK</name>
              <description>Toggling causes KES engine FSM to start as if kick by the Bus Master</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>KES_DEBUG_MODE4K</name>
              <description>When running the stand alone debug mode on the error calculator, the state of this bit is presented to the KES engine as the input mode (4K or 2K pages)</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>4k</name>
                  <description>Mode is set for 4K NAND pages.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>KES_DEBUG_PAYLOAD_FLAG</name>
              <description>When running the stand alone debug mode on the error calculator, the state of this bit is presented to the KES engine as the input payload flag</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DATA</name>
                  <description>Payload is set for 512 bytes data block.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>KES_DEBUG_SHIFT_SYND</name>
              <description>Toggling this bit causes the value in BCH_DEBUG0_KES_SYNDROME_SYMBOL to be shift into the syndrome register array at the input to the KES engine</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>KES_DEBUG_SYNDROME_SYMBOL</name>
              <description>The 9 bit value in this bit field shifts into the syndrome register array at the input of the KES engine whenever BCH_DEBUG0_KES_DEBUG_SHIFT_SYND is toggled</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>9</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NORMAL</name>
                  <description>Bus master address generator for SYND_GEN writes operates normally.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TEST_MODE</name>
                  <description>Bus master address generator always addresses last four bytes in Auxiliary block.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RSVD1</name>
              <description>This field is reserved.</description>
              <bitOffset>0x19</bitOffset>
              <bitWidth>7</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>DBGKESREAD</name>
          <description>KES Debug Read Register</description>
          <addressOffset>0x110</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>VALUES</name>
              <description>This register returns the ROM BIST CRC value after a BIST test.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>DBGKESREAD_SET</name>
          <description>KES Debug Read Register</description>
          <addressOffset>0x114</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>VALUES</name>
              <description>This register returns the ROM BIST CRC value after a BIST test.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>DBGKESREAD_CLR</name>
          <description>KES Debug Read Register</description>
          <addressOffset>0x118</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>VALUES</name>
              <description>This register returns the ROM BIST CRC value after a BIST test.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>DBGKESREAD_TOG</name>
          <description>KES Debug Read Register</description>
          <addressOffset>0x11C</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>VALUES</name>
              <description>This register returns the ROM BIST CRC value after a BIST test.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>DBGCSFEREAD</name>
          <description>Chien Search Debug Read Register</description>
          <addressOffset>0x120</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>VALUES</name>
              <description>Reserved</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>DBGCSFEREAD_SET</name>
          <description>Chien Search Debug Read Register</description>
          <addressOffset>0x124</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>VALUES</name>
              <description>Reserved</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>DBGCSFEREAD_CLR</name>
          <description>Chien Search Debug Read Register</description>
          <addressOffset>0x128</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>VALUES</name>
              <description>Reserved</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>DBGCSFEREAD_TOG</name>
          <description>Chien Search Debug Read Register</description>
          <addressOffset>0x12C</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>VALUES</name>
              <description>Reserved</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>DBGSYNDGENREAD</name>
          <description>Syndrome Generator Debug Read Register</description>
          <addressOffset>0x130</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>VALUES</name>
              <description>Reserved</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>DBGSYNDGENREAD_SET</name>
          <description>Syndrome Generator Debug Read Register</description>
          <addressOffset>0x134</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>VALUES</name>
              <description>Reserved</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>DBGSYNDGENREAD_CLR</name>
          <description>Syndrome Generator Debug Read Register</description>
          <addressOffset>0x138</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>VALUES</name>
              <description>Reserved</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>DBGSYNDGENREAD_TOG</name>
          <description>Syndrome Generator Debug Read Register</description>
          <addressOffset>0x13C</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>VALUES</name>
              <description>Reserved</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>DBGAHBMREAD</name>
          <description>Bus Master and ECC Controller Debug Read Register</description>
          <addressOffset>0x140</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>VALUES</name>
              <description>Reserved</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>DBGAHBMREAD_SET</name>
          <description>Bus Master and ECC Controller Debug Read Register</description>
          <addressOffset>0x144</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>VALUES</name>
              <description>Reserved</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>DBGAHBMREAD_CLR</name>
          <description>Bus Master and ECC Controller Debug Read Register</description>
          <addressOffset>0x148</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>VALUES</name>
              <description>Reserved</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>DBGAHBMREAD_TOG</name>
          <description>Bus Master and ECC Controller Debug Read Register</description>
          <addressOffset>0x14C</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>VALUES</name>
              <description>Reserved</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>BLOCKNAME</name>
          <description>Block Name Register</description>
          <addressOffset>0x150</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0x20484342</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>NAME</name>
              <description>The name is in the ASCII characters BCH (0x20, H, C, B).</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>BLOCKNAME_SET</name>
          <description>Block Name Register</description>
          <addressOffset>0x154</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0x20484342</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>NAME</name>
              <description>The name is in the ASCII characters BCH (0x20, H, C, B).</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>BLOCKNAME_CLR</name>
          <description>Block Name Register</description>
          <addressOffset>0x158</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0x20484342</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>NAME</name>
              <description>The name is in the ASCII characters BCH (0x20, H, C, B).</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>BLOCKNAME_TOG</name>
          <description>Block Name Register</description>
          <addressOffset>0x15C</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0x20484342</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>NAME</name>
              <description>The name is in the ASCII characters BCH (0x20, H, C, B).</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>VERSION</name>
          <description>BCH Version Register</description>
          <addressOffset>0x160</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0x1000000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>STEP</name>
              <description>Fixed read-only value reflecting the stepping of the RTL version.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>MINOR</name>
              <description>Fixed read-only value indicates the MINOR field of the RTL version.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>MAJOR</name>
              <description>Fixed read-only value indicates the MAJOR field of the RTL version.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>VERSION_SET</name>
          <description>BCH Version Register</description>
          <addressOffset>0x164</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0x1000000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>STEP</name>
              <description>Fixed read-only value reflecting the stepping of the RTL version.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>MINOR</name>
              <description>Fixed read-only value indicates the MINOR field of the RTL version.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>MAJOR</name>
              <description>Fixed read-only value indicates the MAJOR field of the RTL version.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>VERSION_CLR</name>
          <description>BCH Version Register</description>
          <addressOffset>0x168</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0x1000000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>STEP</name>
              <description>Fixed read-only value reflecting the stepping of the RTL version.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>MINOR</name>
              <description>Fixed read-only value indicates the MINOR field of the RTL version.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>MAJOR</name>
              <description>Fixed read-only value indicates the MAJOR field of the RTL version.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>VERSION_TOG</name>
          <description>BCH Version Register</description>
          <addressOffset>0x16C</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0x1000000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>STEP</name>
              <description>Fixed read-only value reflecting the stepping of the RTL version.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>MINOR</name>
              <description>Fixed read-only value indicates the MINOR field of the RTL version.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>MAJOR</name>
              <description>Fixed read-only value indicates the MAJOR field of the RTL version.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>DEBUG1</name>
          <description>Hardware BCH ECC Debug Register 1</description>
          <addressOffset>0x170</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ERASED_ZERO_COUNT</name>
              <description>The zero counts on one page.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>9</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>RSVD</name>
              <description>This field is reserved.</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>22</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>DEBUG1_PREERASECHK</name>
              <description>Blank page enables pre-erase check.</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DEBUG1_PREERASECHK_0</name>
                  <description>Turn off pre-erase check</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DEBUG1_PREERASECHK_1</name>
                  <description>Turn on pre-erase check</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>DEBUG1_SET</name>
          <description>Hardware BCH ECC Debug Register 1</description>
          <addressOffset>0x174</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ERASED_ZERO_COUNT</name>
              <description>The zero counts on one page.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>9</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>RSVD</name>
              <description>This field is reserved.</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>22</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>DEBUG1_PREERASECHK</name>
              <description>Blank page enables pre-erase check.</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DEBUG1_PREERASECHK_0</name>
                  <description>Turn off pre-erase check</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DEBUG1_PREERASECHK_1</name>
                  <description>Turn on pre-erase check</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>DEBUG1_CLR</name>
          <description>Hardware BCH ECC Debug Register 1</description>
          <addressOffset>0x178</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ERASED_ZERO_COUNT</name>
              <description>The zero counts on one page.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>9</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>RSVD</name>
              <description>This field is reserved.</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>22</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>DEBUG1_PREERASECHK</name>
              <description>Blank page enables pre-erase check.</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DEBUG1_PREERASECHK_0</name>
                  <description>Turn off pre-erase check</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DEBUG1_PREERASECHK_1</name>
                  <description>Turn on pre-erase check</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>DEBUG1_TOG</name>
          <description>Hardware BCH ECC Debug Register 1</description>
          <addressOffset>0x17C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ERASED_ZERO_COUNT</name>
              <description>The zero counts on one page.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>9</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>RSVD</name>
              <description>This field is reserved.</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>22</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>DEBUG1_PREERASECHK</name>
              <description>Blank page enables pre-erase check.</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DEBUG1_PREERASECHK_0</name>
                  <description>Turn off pre-erase check</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DEBUG1_PREERASECHK_1</name>
                  <description>Turn on pre-erase check</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
      </registers>
    </peripheral>
    <peripheral>
      <name>SPDIF</name>
      <description>SPDIF</description>
      <groupName>SPDIF</groupName>
      <prependToName>SPDIF_</prependToName>
      <baseAddress>0x2004000</baseAddress>
      <addressBlock>
        <offset>0</offset>
        <size>0x54</size>
        <usage>registers</usage>
      </addressBlock>
      <interrupt>
        <name>SPDIF</name>
        <value>84</value>
      </interrupt>
      <registers>
        <register>
          <name>SCR</name>
          <description>SPDIF Configuration Register</description>
          <addressOffset>0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x400</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>USrc_Sel</name>
              <description>no description available</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>USrc_Sel_0</name>
                  <description>No embedded U channel</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>USrc_Sel_1</name>
                  <description>U channel from SPDIF receive block (CD mode)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>USrc_Sel_3</name>
                  <description>U channel from on chip transmitter</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TxSel</name>
              <description>no description available</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TxSel_0</name>
                  <description>Off and output 0</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TxSel_1</name>
                  <description>Feed-through SPDIFIN</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TxSel_5</name>
                  <description>Tx Normal operation</description>
                  <value>0x5</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ValCtrl</name>
              <description>no description available</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ValCtrl_0</name>
                  <description>Outgoing Validity always set</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ValCtrl_1</name>
                  <description>Outgoing Validity always clear</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DMA_TX_En</name>
              <description>DMA Transmit Request Enable (Tx FIFO empty)</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DMA_Rx_En</name>
              <description>DMA Receive Request Enable (RX FIFO full)</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TxFIFO_Ctrl</name>
              <description>no description available</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TxFIFO_Ctrl_0</name>
                  <description>Send out digital zero on SPDIF Tx</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TxFIFO_Ctrl_1</name>
                  <description>Tx Normal operation</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TxFIFO_Ctrl_2</name>
                  <description>Reset to 1 sample remaining</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>soft_reset</name>
              <description>When write 1 to this bit, it will cause SPDIF software reset</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>LOW_POWER</name>
              <description>When write 1 to this bit, it will cause SPDIF enter low-power mode</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TxFIFOEmpty_Sel</name>
              <description>no description available</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TxFIFOEmpty_Sel_0</name>
                  <description>Empty interrupt if 0 sample in Tx left and right FIFOs</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TxFIFOEmpty_Sel_1</name>
                  <description>Empty interrupt if at most 4 sample in Tx left and right FIFOs</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TxFIFOEmpty_Sel_2</name>
                  <description>Empty interrupt if at most 8 sample in Tx left and right FIFOs</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TxFIFOEmpty_Sel_3</name>
                  <description>Empty interrupt if at most 12 sample in Tx left and right FIFOs</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TxAutoSync</name>
              <description>no description available</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TxAutoSync_0</name>
                  <description>Tx FIFO auto sync off</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TxAutoSync_1</name>
                  <description>Tx FIFO auto sync on</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RxAutoSync</name>
              <description>no description available</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RxAutoSync_0</name>
                  <description>Rx FIFO auto sync off</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RxAutoSync_1</name>
                  <description>RxFIFO auto sync on</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RxFIFOFull_Sel</name>
              <description>no description available</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RxFIFOFull_Sel_0</name>
                  <description>Full interrupt if at least 1 sample in Rx left and right FIFOs</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RxFIFOFull_Sel_1</name>
                  <description>Full interrupt if at least 4 sample in Rx left and right FIFOs</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RxFIFOFull_Sel_2</name>
                  <description>Full interrupt if at least 8 sample in Rx left and right FIFOs</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RxFIFOFull_Sel_3</name>
                  <description>Full interrupt if at least 16 sample in Rx left and right FIFO</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RxFIFO_Rst</name>
              <description>no description available</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RxFIFO_Rst_0</name>
                  <description>Normal operation</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RxFIFO_Rst_1</name>
                  <description>Reset register to 1 sample remaining</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RxFIFO_Off_On</name>
              <description>no description available</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RxFIFO_Off_On_0</name>
                  <description>SPDIF Rx FIFO is on</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RxFIFO_Off_On_1</name>
                  <description>SPDIF Rx FIFO is off. Does not accept data from interface</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RxFIFO_Ctrl</name>
              <description>no description available</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RxFIFO_Ctrl_0</name>
                  <description>Normal operation</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RxFIFO_Ctrl_1</name>
                  <description>Always read zero from Rx data register</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SRCD</name>
          <description>CDText Control Register</description>
          <addressOffset>0x4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>USyncMode</name>
              <description>no description available</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>USyncMode_0</name>
                  <description>Non-CD data</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>USyncMode_1</name>
                  <description>CD user channel subcode</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SRPC</name>
          <description>PhaseConfig Register</description>
          <addressOffset>0x8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>GainSel</name>
              <description>Gain selection:</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>GainSel_0</name>
                  <description>24*(2**10)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>GainSel_1</name>
                  <description>16*(2**10)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>GainSel_2</name>
                  <description>12*(2**10)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>GainSel_3</name>
                  <description>8*(2**10)</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>GainSel_4</name>
                  <description>6*(2**10)</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>GainSel_5</name>
                  <description>4*(2**10)</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>GainSel_6</name>
                  <description>3*(2**10)</description>
                  <value>0x6</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>LOCK</name>
              <description>LOCK bit to show that the internal DPLL is locked, read only</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>ClkSrc_Sel</name>
              <description>Clock source selection, all other settings not shown are reserved:</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ClkSrc_Sel_0</name>
                  <description>if (DPLL Locked) SPDIF_RxClk else REF_CLK_32K (XTALOSC)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ClkSrc_Sel_1</name>
                  <description>if (DPLL Locked) SPDIF_RxClk else tx_clk (SPDIF0_CLK_ROOT)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ClkSrc_Sel_3</name>
                  <description>if (DPLL Locked) SPDIF_RxClk else SPDIF_EXT_CLK</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ClkSrc_Sel_5</name>
                  <description>REF_CLK_32K (XTALOSC)</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ClkSrc_Sel_6</name>
                  <description>tx_clk (SPDIF0_CLK_ROOT)</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ClkSrc_Sel_8</name>
                  <description>SPDIF_EXT_CLK</description>
                  <value>0x8</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SIE</name>
          <description>InterruptEn Register</description>
          <addressOffset>0xC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RxFIFOFul</name>
              <description>SPDIF Rx FIFO full, can't be cleared with reg. IntClear. To clear it, read from Rx FIFO.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TxEm</name>
              <description>SPDIF Tx FIFO empty, can't be cleared with reg. IntClear. To clear it, write toTx FIFO.</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>LockLoss</name>
              <description>SPDIF receiver loss of lock</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RxFIFOResyn</name>
              <description>Rx FIFO resync</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RxFIFOUnOv</name>
              <description>Rx FIFO underrun/overrun</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>UQErr</name>
              <description>U/Q Channel framing error</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>UQSync</name>
              <description>U/Q Channel sync found</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>QRxOv</name>
              <description>Q Channel receive register overrun</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>QRxFul</name>
              <description>Q Channel receive register full, can't be cleared with reg</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>URxOv</name>
              <description>U Channel receive register overrun</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>URxFul</name>
              <description>U Channel receive register full, can't be cleared with reg</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BitErr</name>
              <description>SPDIF receiver found parity bit error</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SymErr</name>
              <description>SPDIF receiver found illegal symbol</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ValNoGood</name>
              <description>SPDIF validity flag no good</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CNew</name>
              <description>SPDIF receive change in value of control channel</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TxResyn</name>
              <description>SPDIF Tx FIFO resync</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TxUnOv</name>
              <description>SPDIF Tx FIFO under/overrun</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>Lock</name>
              <description>SPDIF receiver's DPLL is locked</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>SIC</name>
          <description>InterruptClear Register</description>
          <alternateGroup>SIC_SIS</alternateGroup>
          <addressOffset>0x10</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>LockLoss</name>
              <description>SPDIF receiver loss of lock</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>write-only</access>
            </field>
            <field>
              <name>RxFIFOResyn</name>
              <description>Rx FIFO resync</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>write-only</access>
            </field>
            <field>
              <name>RxFIFOUnOv</name>
              <description>Rx FIFO underrun/overrun</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>write-only</access>
            </field>
            <field>
              <name>UQErr</name>
              <description>U/Q Channel framing error</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>write-only</access>
            </field>
            <field>
              <name>UQSync</name>
              <description>U/Q Channel sync found</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>write-only</access>
            </field>
            <field>
              <name>QRxOv</name>
              <description>Q Channel receive register overrun</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>write-only</access>
            </field>
            <field>
              <name>URxOv</name>
              <description>U Channel receive register overrun</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>write-only</access>
            </field>
            <field>
              <name>BitErr</name>
              <description>SPDIF receiver found parity bit error</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>1</bitWidth>
              <access>write-only</access>
            </field>
            <field>
              <name>SymErr</name>
              <description>SPDIF receiver found illegal symbol</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>1</bitWidth>
              <access>write-only</access>
            </field>
            <field>
              <name>ValNoGood</name>
              <description>SPDIF validity flag no good</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>write-only</access>
            </field>
            <field>
              <name>CNew</name>
              <description>SPDIF receive change in value of control channel</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>write-only</access>
            </field>
            <field>
              <name>TxResyn</name>
              <description>SPDIF Tx FIFO resync</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>write-only</access>
            </field>
            <field>
              <name>TxUnOv</name>
              <description>SPDIF Tx FIFO under/overrun</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>write-only</access>
            </field>
            <field>
              <name>Lock</name>
              <description>SPDIF receiver's DPLL is locked</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>write-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>SIS</name>
          <description>InterruptStat Register</description>
          <alternateGroup>SIC_SIS</alternateGroup>
          <addressOffset>0x10</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0x2</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RxFIFOFul</name>
              <description>SPDIF Rx FIFO full, can't be cleared with reg. IntClear. To clear it, read from Rx FIFO.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>TxEm</name>
              <description>SPDIF Tx FIFO empty, can't be cleared with reg. IntClear. To clear it, write toTx FIFO.</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>LockLoss</name>
              <description>SPDIF receiver loss of lock</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>RxFIFOResyn</name>
              <description>Rx FIFO resync</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>RxFIFOUnOv</name>
              <description>Rx FIFO underrun/overrun</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>UQErr</name>
              <description>U/Q Channel framing error</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>UQSync</name>
              <description>U/Q Channel sync found</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>QRxOv</name>
              <description>Q Channel receive register overrun</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>QRxFul</name>
              <description>Q Channel receive register full, can't be cleared with reg</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>URxOv</name>
              <description>U Channel receive register overrun</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>URxFul</name>
              <description>U Channel receive register full, can't be cleared with reg</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>BitErr</name>
              <description>SPDIF receiver found parity bit error</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>SymErr</name>
              <description>SPDIF receiver found illegal symbol</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>ValNoGood</name>
              <description>SPDIF validity flag no good</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>CNew</name>
              <description>SPDIF receive change in value of control channel</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>TxResyn</name>
              <description>SPDIF Tx FIFO resync</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>TxUnOv</name>
              <description>SPDIF Tx FIFO under/overrun</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>Lock</name>
              <description>SPDIF receiver's DPLL is locked</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>SRL</name>
          <description>SPDIFRxLeft Register</description>
          <addressOffset>0x14</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RxDataLeft</name>
              <description>Processor receive SPDIF data left</description>
              <bitOffset>0</bitOffset>
              <bitWidth>24</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>SRR</name>
          <description>SPDIFRxRight Register</description>
          <addressOffset>0x18</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RxDataRight</name>
              <description>Processor receive SPDIF data right</description>
              <bitOffset>0</bitOffset>
              <bitWidth>24</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>SRCSH</name>
          <description>SPDIFRxCChannel_h Register</description>
          <addressOffset>0x1C</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RxCChannel_h</name>
              <description>SPDIF receive C channel register, contains first 24 bits of C channel without interpretation</description>
              <bitOffset>0</bitOffset>
              <bitWidth>24</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>SRCSL</name>
          <description>SPDIFRxCChannel_l Register</description>
          <addressOffset>0x20</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RxCChannel_l</name>
              <description>SPDIF receive C channel register, contains next 24 bits of C channel without interpretation</description>
              <bitOffset>0</bitOffset>
              <bitWidth>24</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>SRU</name>
          <description>UchannelRx Register</description>
          <addressOffset>0x24</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RxUChannel</name>
              <description>SPDIF receive U channel register, contains next 3 U channel bytes</description>
              <bitOffset>0</bitOffset>
              <bitWidth>24</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>SRQ</name>
          <description>QchannelRx Register</description>
          <addressOffset>0x28</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RxQChannel</name>
              <description>SPDIF receive Q channel register, contains next 3 Q channel bytes</description>
              <bitOffset>0</bitOffset>
              <bitWidth>24</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>STL</name>
          <description>SPDIFTxLeft Register</description>
          <addressOffset>0x2C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TxDataLeft</name>
              <description>SPDIF transmit left channel data. It is write-only, and always returns zeros when read</description>
              <bitOffset>0</bitOffset>
              <bitWidth>24</bitWidth>
              <access>write-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>STR</name>
          <description>SPDIFTxRight Register</description>
          <addressOffset>0x30</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TxDataRight</name>
              <description>SPDIF transmit right channel data. It is write-only, and always returns zeros when read</description>
              <bitOffset>0</bitOffset>
              <bitWidth>24</bitWidth>
              <access>write-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>STCSCH</name>
          <description>SPDIFTxCChannelCons_h Register</description>
          <addressOffset>0x34</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TxCChannelCons_h</name>
              <description>SPDIF transmit Cons</description>
              <bitOffset>0</bitOffset>
              <bitWidth>24</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>STCSCL</name>
          <description>SPDIFTxCChannelCons_l Register</description>
          <addressOffset>0x38</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TxCChannelCons_l</name>
              <description>SPDIF transmit Cons</description>
              <bitOffset>0</bitOffset>
              <bitWidth>24</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>SRFM</name>
          <description>FreqMeas Register</description>
          <addressOffset>0x44</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>FreqMeas</name>
              <description>Frequency measurement data</description>
              <bitOffset>0</bitOffset>
              <bitWidth>24</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>STC</name>
          <description>SPDIFTxClk Register</description>
          <addressOffset>0x50</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x20F00</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TxClk_DF</name>
              <description>Divider factor (1-128)</description>
              <bitOffset>0</bitOffset>
              <bitWidth>7</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TxClk_DF_0</name>
                  <description>divider factor is 1</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TxClk_DF_1</name>
                  <description>divider factor is 2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TxClk_DF_127</name>
                  <description>divider factor is 128</description>
                  <value>0x7F</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>tx_all_clk_en</name>
              <description>Spdif transfer clock enable.When data is going to be transfered, this bit should be set to1.</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>tx_all_clk_en_0</name>
                  <description>disable transfer clock.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tx_all_clk_en_1</name>
                  <description>enable transfer clock.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TxClk_Source</name>
              <description>no description available</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TxClk_Source_0</name>
                  <description>REF_CLK_32K input (XTALOSC 32 kHz clock)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TxClk_Source_1</name>
                  <description>tx_clk input (from SPDIF0_CLK_ROOT. See CCM.)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TxClk_Source_3</name>
                  <description>SPDIF_EXT_CLK, from pads</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TxClk_Source_5</name>
                  <description>ipg_clk input (frequency divided)</description>
                  <value>0x5</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SYSCLK_DF</name>
              <description>system clock divider factor, 2~512.</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>9</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SYSCLK_DF_0</name>
                  <description>no clock signal</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SYSCLK_DF_1</name>
                  <description>divider factor is 2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SYSCLK_DF_511</name>
                  <description>divider factor is 512</description>
                  <value>0x1FF</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
      </registers>
    </peripheral>
    <peripheral>
      <name>ECSPI1</name>
      <description>ECSPI</description>
      <groupName>ECSPI</groupName>
      <prependToName>ECSPI1_</prependToName>
      <baseAddress>0x2008000</baseAddress>
      <headerStructName>ECSPI</headerStructName>
      <addressBlock>
        <offset>0</offset>
        <size>0x44</size>
        <usage>registers</usage>
      </addressBlock>
      <interrupt>
        <name>eCSPI1</name>
        <value>63</value>
      </interrupt>
      <registers>
        <register>
          <name>RXDATA</name>
          <description>Receive Data Register</description>
          <addressOffset>0</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ECSPI_RXDATA</name>
              <description>Receive Data</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>TXDATA</name>
          <description>Transmit Data Register</description>
          <addressOffset>0x4</addressOffset>
          <size>32</size>
          <access>write-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ECSPI_TXDATA</name>
              <description>Transmit Data</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>write-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CONREG</name>
          <description>Control Register</description>
          <addressOffset>0x8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>EN</name>
              <description>SPI Block Enable Control</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>EN_0</name>
                  <description>Disable the block.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>EN_1</name>
                  <description>Enable the block.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HT</name>
              <description>Hardware Trigger Enable</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HT_0</name>
                  <description>Disable HT mode.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HT_1</name>
                  <description>Enable HT mode.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>XCH</name>
              <description>SPI Exchange Bit</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>XCH_0</name>
                  <description>Idle.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>XCH_1</name>
                  <description>Initiates exchange (write) or busy (read).</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SMC</name>
              <description>Start Mode Control</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SMC_0</name>
                  <description>SPI Exchange Bit (XCH) controls when a SPI burst can start. Setting the XCH bit will start a SPI burst or multiple bursts. This is controlled by the SPI SS Wave Form Select (SS_CTL). Refer to XCH and SS_CTL descriptions.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SMC_1</name>
                  <description>Immediately starts a SPI burst when data is written in TXFIFO.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CHANNEL_MODE</name>
              <description>SPI CHANNEL MODE selects the mode for each SPI channel</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CHANNEL_MODE_0</name>
                  <description>Slave mode.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CHANNEL_MODE_1</name>
                  <description>Master mode.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>POST_DIVIDER</name>
              <description>SPI Post Divider</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>POST_DIVIDER_0</name>
                  <description>Divide by 1.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>POST_DIVIDER_1</name>
                  <description>Divide by 2.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>POST_DIVIDER_2</name>
                  <description>Divide by 4.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>POST_DIVIDER_14</name>
                  <description>Divide by 2 14 .</description>
                  <value>0xE</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>POST_DIVIDER_15</name>
                  <description>Divide by 2 15 .</description>
                  <value>0xF</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PRE_DIVIDER</name>
              <description>SPI Pre Divider</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PRE_DIVIDER_0</name>
                  <description>Divide by 1.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PRE_DIVIDER_1</name>
                  <description>Divide by 2.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PRE_DIVIDER_2</name>
                  <description>Divide by 3.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PRE_DIVIDER_13</name>
                  <description>Divide by 14.</description>
                  <value>0xD</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PRE_DIVIDER_14</name>
                  <description>Divide by 15.</description>
                  <value>0xE</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PRE_DIVIDER_15</name>
                  <description>Divide by 16.</description>
                  <value>0xF</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DRCTL</name>
              <description>SPI Data Ready Control</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DRCTL_0</name>
                  <description>The SPI_RDY signal is a don't care.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DRCTL_1</name>
                  <description>Burst will be triggered by the falling edge of the SPI_RDY signal (edge-triggered).</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DRCTL_2</name>
                  <description>Burst will be triggered by a low level of the SPI_RDY signal (level-triggered).</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CHANNEL_SELECT</name>
              <description>SPI CHANNEL SELECT bits</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CHANNEL_SELECT_0</name>
                  <description>Channel 0 is selected. Chip Select 0 (SS0) will be asserted.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CHANNEL_SELECT_1</name>
                  <description>Channel 1 is selected. Chip Select 1 (SS1) will be asserted.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CHANNEL_SELECT_2</name>
                  <description>Channel 2 is selected. Chip Select 2 (SS2) will be asserted.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CHANNEL_SELECT_3</name>
                  <description>Channel 3 is selected. Chip Select 3 (SS3) will be asserted.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BURST_LENGTH</name>
              <description>Burst Length</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>12</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>BURST_LENGTH_0</name>
                  <description>A SPI burst contains the 1 LSB in a word.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BURST_LENGTH_1</name>
                  <description>A SPI burst contains the 2 LSB in a word.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BURST_LENGTH_2</name>
                  <description>A SPI burst contains the 3 LSB in a word.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BURST_LENGTH_31</name>
                  <description>A SPI burst contains all 32 bits in a word.</description>
                  <value>0x1F</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BURST_LENGTH_32</name>
                  <description>A SPI burst contains the 1 LSB in first word and all 32 bits in second word.</description>
                  <value>0x20</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BURST_LENGTH_33</name>
                  <description>A SPI burst contains the 2 LSB in first word and all 32 bits in second word.</description>
                  <value>0x21</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BURST_LENGTH_4094</name>
                  <description>A SPI burst contains the 31 LSB in first word and 2^7 -1 words.</description>
                  <value>0xFFE</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BURST_LENGTH_4095</name>
                  <description>A SPI burst contains 2^7 words.</description>
                  <value>0xFFF</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>CONFIGREG</name>
          <description>Config Register</description>
          <addressOffset>0xC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SCLK_PHA</name>
              <description>SPI Clock/Data Phase Control</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SCLK_PHA_0</name>
                  <description>Phase 0 operation.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SCLK_PHA_1</name>
                  <description>Phase 1 operation.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SCLK_POL</name>
              <description>SPI Clock Polarity Control</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SCLK_POL_0</name>
                  <description>Active high polarity (0 = Idle).</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SCLK_POL_1</name>
                  <description>Active low polarity (1 = Idle).</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SS_CTL</name>
              <description>SPI SS Wave Form Select</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SS_CTL_0</name>
                  <description>In master mode - only one SPI burst will be transmitted.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SS_CTL_1</name>
                  <description>In master mode - Negate Chip Select (SS) signal between SPI bursts. Multiple SPI bursts will be transmitted. The SPI transfer will automatically stop when the TXFIFO is empty.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SS_POL</name>
              <description>SPI SS Polarity Select</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SS_POL_0</name>
                  <description>Active low.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SS_POL_1</name>
                  <description>Active high.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DATA_CTL</name>
              <description>DATA CTL</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DATA_CTL_0</name>
                  <description>Stay high.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DATA_CTL_1</name>
                  <description>Stay low.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SCLK_CTL</name>
              <description>SCLK CTL</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SCLK_CTL_0</name>
                  <description>Stay low.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SCLK_CTL_1</name>
                  <description>Stay high.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HT_LENGTH</name>
              <description>HT LENGTH</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>INTREG</name>
          <description>Interrupt Control Register</description>
          <addressOffset>0x10</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TEEN</name>
              <description>TXFIFO Empty Interrupt enable. This bit enables the TXFIFO Empty Interrupt.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TEEN_0</name>
                  <description>Disable</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TEEN_1</name>
                  <description>Enable</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TDREN</name>
              <description>TXFIFO Data Request Interrupt enable</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TDREN_0</name>
                  <description>Disable</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TDREN_1</name>
                  <description>Enable</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TFEN</name>
              <description>TXFIFO Full Interrupt enable. This bit enables the TXFIFO Full Interrupt.</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TFEN_0</name>
                  <description>Disable</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TFEN_1</name>
                  <description>Enable</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RREN</name>
              <description>RXFIFO Ready Interrupt enable. This bit enables the RXFIFO Ready Interrupt.</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RREN_0</name>
                  <description>Disable</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RREN_1</name>
                  <description>Enable</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RDREN</name>
              <description>RXFIFO Data Request Interrupt enable</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RDREN_0</name>
                  <description>Disable</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RDREN_1</name>
                  <description>Enable</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RFEN</name>
              <description>RXFIFO Full Interrupt enable. This bit enables the RXFIFO Full Interrupt.</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RFEN_0</name>
                  <description>Disable</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RFEN_1</name>
                  <description>Enable</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ROEN</name>
              <description>RXFIFO Overflow Interrupt enable. This bit enables the RXFIFO Overflow Interrupt.</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ROEN_0</name>
                  <description>Disable</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ROEN_1</name>
                  <description>Enable</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TCEN</name>
              <description>Transfer Completed Interrupt enable. This bit enables the Transfer Completed Interrupt.</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TCEN_0</name>
                  <description>Disable</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TCEN_1</name>
                  <description>Enable</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>DMAREG</name>
          <description>DMA Control Register</description>
          <addressOffset>0x14</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TX_THRESHOLD</name>
              <description>TX THRESHOLD</description>
              <bitOffset>0</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TEDEN</name>
              <description>TXFIFO Empty DMA Request Enable. This bit enables/disables the TXFIFO Empty DMA Request.</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TEDEN_0</name>
                  <description>Disable</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TEDEN_1</name>
                  <description>Enable</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RX_THRESHOLD</name>
              <description>RX THRESHOLD</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RXDEN</name>
              <description>RXFIFO DMA Request Enable. This bit enables/disables the RXFIFO DMA Request.</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RXDEN_0</name>
                  <description>Disable</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RXDEN_1</name>
                  <description>Enable</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RX_DMA_LENGTH</name>
              <description>RX DMA LENGTH</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RXTDEN</name>
              <description>RXFIFO TAIL DMA Request/Interrupt Enable</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RXTDEN_0</name>
                  <description>Disable</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RXTDEN_1</name>
                  <description>Enable</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>STATREG</name>
          <description>Status Register</description>
          <addressOffset>0x18</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x3</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TE</name>
              <description>TXFIFO Empty. This bit is set if the TXFIFO is empty.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TE_0</name>
                  <description>TXFIFO contains one or more words.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TE_1</name>
                  <description>TXFIFO is empty.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TDR</name>
              <description>TXFIFO Data Request.</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TDR_0</name>
                  <description>Number of valid data slots in TXFIFO is greater than TX_THRESHOLD.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TDR_1</name>
                  <description>Number of valid data slots in TXFIFO is not greater than TX_THRESHOLD.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TF</name>
              <description>TXFIFO Full. This bit is set when if the TXFIFO is full.</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TF_0</name>
                  <description>TXFIFO is not Full.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TF_1</name>
                  <description>TXFIFO is Full.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RR</name>
              <description>RXFIFO Ready. This bit is set when one or more words are stored in the RXFIFO.</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RR_0</name>
                  <description>No valid data in RXFIFO.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RR_1</name>
                  <description>More than 1 word in RXFIFO.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RDR</name>
              <description>RXFIFO Data Request.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RDR_0</name>
                  <description>When RXTDE is set - Number of data entries in the RXFIFO is not greater than RX_THRESHOLD.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RDR_1</name>
                  <description>When RXTDE is set - Number of data entries in the RXFIFO is greater than RX_THRESHOLD or a DMA TAIL DMA condition exists.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RF</name>
              <description>RXFIFO Full. This bit is set when the RXFIFO is full.</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RF_0</name>
                  <description>Not Full.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RF_1</name>
                  <description>Full.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RO</name>
              <description>RXFIFO Overflow</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RO_0</name>
                  <description>RXFIFO has no overflow.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RO_1</name>
                  <description>RXFIFO has overflowed.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TC</name>
              <description>Transfer Completed Status bit. Writing 1 to this bit clears it.</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TC_0</name>
                  <description>Transfer in progress.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TC_1</name>
                  <description>Transfer completed.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>PERIODREG</name>
          <description>Sample Period Control Register</description>
          <addressOffset>0x1C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SAMPLE_PERIOD</name>
              <description>Sample Period Control</description>
              <bitOffset>0</bitOffset>
              <bitWidth>15</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SAMPLE_PERIOD_0</name>
                  <description>0 wait states inserted</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SAMPLE_PERIOD_1</name>
                  <description>1 wait state inserted</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SAMPLE_PERIOD_32766</name>
                  <description>32766 wait states inserted</description>
                  <value>0x7FFE</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SAMPLE_PERIOD_32767</name>
                  <description>32767 wait states inserted</description>
                  <value>0x7FFF</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CSRC</name>
              <description>Clock Source Control. This bit selects the clock source for the sample period counter.</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CSRC_0</name>
                  <description>SPI Clock (SCLK)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CSRC_1</name>
                  <description>Low-Frequency Reference Clock (32.768 KHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CSD_CTL</name>
              <description>Chip Select Delay Control bits</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>TESTREG</name>
          <description>Test Control Register</description>
          <addressOffset>0x20</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TXCNT</name>
              <description>TXFIFO Counter. This field indicates the number of words in the TXFIFO.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>7</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RXCNT</name>
              <description>RXFIFO Counter. This field indicates the number of words in the RXFIFO.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>7</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>LBC</name>
              <description>Loop Back Control</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LBC_0</name>
                  <description>Not connected.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LBC_1</name>
                  <description>Transmitter and receiver sections internally connected for Loopback.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>MSGDATA</name>
          <description>Message Data Register</description>
          <addressOffset>0x40</addressOffset>
          <size>32</size>
          <access>write-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ECSPI_MSGDATA</name>
              <description>ECSPI_MSGDATA holds the top word of MSG Data FIFO</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>write-only</access>
            </field>
          </fields>
        </register>
      </registers>
    </peripheral>
    <peripheral derivedFrom="ECSPI1">
      <name>ECSPI2</name>
      <description>ECSPI</description>
      <groupName>ECSPI</groupName>
      <prependToName>ECSPI2_</prependToName>
      <baseAddress>0x200C000</baseAddress>
      <addressBlock>
        <offset>0</offset>
        <size>0x44</size>
        <usage>registers</usage>
      </addressBlock>
      <interrupt>
        <name>eCSPI2</name>
        <value>64</value>
      </interrupt>
    </peripheral>
    <peripheral derivedFrom="ECSPI1">
      <name>ECSPI3</name>
      <description>ECSPI</description>
      <groupName>ECSPI</groupName>
      <prependToName>ECSPI3_</prependToName>
      <baseAddress>0x2010000</baseAddress>
      <addressBlock>
        <offset>0</offset>
        <size>0x44</size>
        <usage>registers</usage>
      </addressBlock>
      <interrupt>
        <name>eCSPI3</name>
        <value>65</value>
      </interrupt>
    </peripheral>
    <peripheral derivedFrom="ECSPI1">
      <name>ECSPI4</name>
      <description>ECSPI</description>
      <groupName>ECSPI</groupName>
      <prependToName>ECSPI4_</prependToName>
      <baseAddress>0x2014000</baseAddress>
      <addressBlock>
        <offset>0</offset>
        <size>0x44</size>
        <usage>registers</usage>
      </addressBlock>
      <interrupt>
        <name>eCSPI4</name>
        <value>66</value>
      </interrupt>
    </peripheral>
    <peripheral>
      <name>UART1</name>
      <description>UARTv2</description>
      <groupName>UART</groupName>
      <prependToName>UART1_</prependToName>
      <baseAddress>0x2020000</baseAddress>
      <headerStructName>UART</headerStructName>
      <addressBlock>
        <offset>0</offset>
        <size>0xBC</size>
        <usage>registers</usage>
      </addressBlock>
      <interrupt>
        <name>UART1</name>
        <value>58</value>
      </interrupt>
      <registers>
        <register>
          <name>URXD</name>
          <description>UART Receiver Register</description>
          <addressOffset>0</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RX_DATA</name>
              <description>Received Data</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>PRERR</name>
              <description>In RS-485 mode, it holds the ninth data bit (bit [8]) of received 9-bit RS-485 data In RS232/IrDA mode, it is the Parity Error flag</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PRERR_0</name>
                  <description>= No parity error was detected for data in the RX_DATA field</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PRERR_1</name>
                  <description>= A parity error was detected for data in the RX_DATA field</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BRK</name>
              <description>BREAK Detect</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>BRK_0</name>
                  <description>The current character is not a BREAK character</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BRK_1</name>
                  <description>The current character is a BREAK character</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>FRMERR</name>
              <description>Frame Error</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>FRMERR_0</name>
                  <description>The current character has no framing error</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FRMERR_1</name>
                  <description>The current character has a framing error</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>OVRRUN</name>
              <description>Receiver Overrun</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>OVRRUN_0</name>
                  <description>No RxFIFO overrun was detected</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>OVRRUN_1</name>
                  <description>A RxFIFO overrun was detected</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ERR</name>
              <description>Error Detect</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ERR_0</name>
                  <description>No error status was detected</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ERR_1</name>
                  <description>An error status was detected</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CHARRDY</name>
              <description>Character Ready</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CHARRDY_0</name>
                  <description>Character in RX_DATA field and associated flags are invalid.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CHARRDY_1</name>
                  <description>Character in RX_DATA field and associated flags valid and ready for reading.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>UTXD</name>
          <description>UART Transmitter Register</description>
          <addressOffset>0x40</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TX_DATA</name>
              <description>Transmit Data</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>write-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>UCR1</name>
          <description>UART Control Register 1</description>
          <addressOffset>0x80</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>UARTEN</name>
              <description>UART Enable</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>UARTEN_0</name>
                  <description>Disable the UART</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>UARTEN_1</name>
                  <description>Enable the UART</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DOZE</name>
              <description>DOZE</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DOZE_0</name>
                  <description>The UART is enabled when in DOZE state</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DOZE_1</name>
                  <description>The UART is disabled when in DOZE state</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ATDMAEN</name>
              <description>Aging DMA Timer Enable</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ATDMAEN_0</name>
                  <description>Disable AGTIM DMA request</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ATDMAEN_1</name>
                  <description>Enable AGTIM DMA request</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TXDMAEN</name>
              <description>Transmitter Ready DMA Enable</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TXDMAEN_0</name>
                  <description>Disable transmit DMA request</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TXDMAEN_1</name>
                  <description>Enable transmit DMA request</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SNDBRK</name>
              <description>Send BREAK</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SNDBRK_0</name>
                  <description>Do not send a BREAK character</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SNDBRK_1</name>
                  <description>Send a BREAK character (continuous 0s)</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RTSDEN</name>
              <description>RTS Delta Interrupt Enable</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RTSDEN_0</name>
                  <description>Disable RTSD interrupt</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RTSDEN_1</name>
                  <description>Enable RTSD interrupt</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TXMPTYEN</name>
              <description>Transmitter Empty Interrupt Enable</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TXMPTYEN_0</name>
                  <description>Disable the transmitter FIFO empty interrupt</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TXMPTYEN_1</name>
                  <description>Enable the transmitter FIFO empty interrupt</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>IREN</name>
              <description>Infrared Interface Enable</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>IREN_0</name>
                  <description>Disable the IR interface</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>IREN_1</name>
                  <description>Enable the IR interface</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RXDMAEN</name>
              <description>Receive Ready DMA Enable</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RXDMAEN_0</name>
                  <description>Disable DMA request</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RXDMAEN_1</name>
                  <description>Enable DMA request</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RRDYEN</name>
              <description>Receiver Ready Interrupt Enable</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RRDYEN_0</name>
                  <description>Disables the RRDY interrupt</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RRDYEN_1</name>
                  <description>Enables the RRDY interrupt</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ICD</name>
              <description>Idle Condition Detect</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ICD_0</name>
                  <description>Idle for more than 4 frames</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ICD_1</name>
                  <description>Idle for more than 8 frames</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ICD_2</name>
                  <description>Idle for more than 16 frames</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ICD_3</name>
                  <description>Idle for more than 32 frames</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>IDEN</name>
              <description>Idle Condition Detected Interrupt Enable</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>IDEN_0</name>
                  <description>Disable the IDLE interrupt</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>IDEN_1</name>
                  <description>Enable the IDLE interrupt</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TRDYEN</name>
              <description>Transmitter Ready Interrupt Enable</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TRDYEN_0</name>
                  <description>Disable the transmitter ready interrupt</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TRDYEN_1</name>
                  <description>Enable the transmitter ready interrupt</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ADBR</name>
              <description>Automatic Detection of Baud Rate</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ADBR_0</name>
                  <description>Disable automatic detection of baud rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ADBR_1</name>
                  <description>Enable automatic detection of baud rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ADEN</name>
              <description>Automatic Baud Rate Detection Interrupt Enable</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ADEN_0</name>
                  <description>Disable the automatic baud rate detection interrupt</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ADEN_1</name>
                  <description>Enable the automatic baud rate detection interrupt</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>UCR2</name>
          <description>UART Control Register 2</description>
          <addressOffset>0x84</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x1</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRST</name>
              <description>Software Reset</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRST_0</name>
                  <description>Reset the transmit and receive state machines, all FIFOs and register USR1, USR2, UBIR, UBMR, UBRC , URXD, UTXD and UTS[6-3].</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRST_1</name>
                  <description>No reset</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RXEN</name>
              <description>Receiver Enable</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RXEN_0</name>
                  <description>Disable the receiver</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RXEN_1</name>
                  <description>Enable the receiver</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TXEN</name>
              <description>Transmitter Enable</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TXEN_0</name>
                  <description>Disable the transmitter</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TXEN_1</name>
                  <description>Enable the transmitter</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ATEN</name>
              <description>Aging Timer Enable. This bit is used to enable the aging timer interrupt (triggered with AGTIM)</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ATEN_0</name>
                  <description>AGTIM interrupt disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ATEN_1</name>
                  <description>AGTIM interrupt enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RTSEN</name>
              <description>Request to Send Interrupt Enable</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RTSEN_0</name>
                  <description>Disable request to send interrupt</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RTSEN_1</name>
                  <description>Enable request to send interrupt</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WS</name>
              <description>Word Size</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>WS_0</name>
                  <description>7-bit transmit and receive character length (not including START, STOP or PARITY bits)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WS_1</name>
                  <description>8-bit transmit and receive character length (not including START, STOP or PARITY bits)</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>STPB</name>
              <description>Stop</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>STPB_0</name>
                  <description>The transmitter sends 1 stop bit. The receiver expects 1 or more stop bits.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>STPB_1</name>
                  <description>The transmitter sends 2 stop bits. The receiver expects 2 or more stop bits.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PROE</name>
              <description>Parity Odd/Even</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PROE_0</name>
                  <description>Even parity</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PROE_1</name>
                  <description>Odd parity</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PREN</name>
              <description>Parity Enable</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PREN_0</name>
                  <description>Disable parity generator and checker</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PREN_1</name>
                  <description>Enable parity generator and checker</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RTEC</name>
              <description>Request to Send Edge Control</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RTEC_0</name>
                  <description>Trigger interrupt on a rising edge</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RTEC_1</name>
                  <description>Trigger interrupt on a falling edge</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ESCEN</name>
              <description>Escape Enable. Enables/Disables the escape sequence detection logic.</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ESCEN_0</name>
                  <description>Disable escape sequence detection</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ESCEN_1</name>
                  <description>Enable escape sequence detection</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CTS</name>
              <description>Clear to Send</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CTS_0</name>
                  <description>The CTS_B pin is high (inactive)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CTS_1</name>
                  <description>The CTS_B pin is low (active)</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CTSC</name>
              <description>CTS Pin Control</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CTSC_0</name>
                  <description>The CTS_B pin is controlled by the CTS bit</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CTSC_1</name>
                  <description>The CTS_B pin is controlled by the receiver</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>IRTS</name>
              <description>Ignore RTS Pin</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>IRTS_0</name>
                  <description>Transmit only when the RTS pin is asserted</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>IRTS_1</name>
                  <description>Ignore the RTS pin</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ESCI</name>
              <description>Escape Sequence Interrupt Enable. Enables/Disables the ESCF bit to generate an interrupt.</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ESCI_0</name>
                  <description>Disable the escape sequence interrupt</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ESCI_1</name>
                  <description>Enable the escape sequence interrupt</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>UCR3</name>
          <description>UART Control Register 3</description>
          <addressOffset>0x88</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x700</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ACIEN</name>
              <description>Autobaud Counter Interrupt Enable</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ACIEN_0</name>
                  <description>ACST interrupt disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ACIEN_1</name>
                  <description>ACST interrupt enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>INVT</name>
              <description>Invert TXD output in RS-232/RS-485 mode, set TXD active level in IrDA mode</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>INVT_0</name>
                  <description>TXD is not inverted</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>INVT_1</name>
                  <description>TXD is inverted</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RXDMUXSEL</name>
              <description>RXD Muxed Input Selected</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DTRDEN</name>
              <description>Data Terminal Ready Delta Enable</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DTRDEN_0</name>
                  <description>Disable DTRD interrupt</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DTRDEN_1</name>
                  <description>Enable DTRD interrupt</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>AWAKEN</name>
              <description>Asynchronous WAKE Interrupt Enable</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>AWAKEN_0</name>
                  <description>Disable the AWAKE interrupt</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AWAKEN_1</name>
                  <description>Enable the AWAKE interrupt</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>AIRINTEN</name>
              <description>Asynchronous IR WAKE Interrupt Enable</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>AIRINTEN_0</name>
                  <description>Disable the AIRINT interrupt</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AIRINTEN_1</name>
                  <description>Enable the AIRINT interrupt</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RXDSEN</name>
              <description>Receive Status Interrupt Enable</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RXDSEN_0</name>
                  <description>Disable the RXDS interrupt</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RXDSEN_1</name>
                  <description>Enable the RXDS interrupt</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ADNIMP</name>
              <description>Autobaud Detection Not Improved-</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ADNIMP_0</name>
                  <description>Autobaud detection new features selected</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ADNIMP_1</name>
                  <description>Keep old autobaud detection mechanism</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RI</name>
              <description>Ring Indicator</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RI_0</name>
                  <description>RI_B pin is logic zero (DCE mode)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RI_1</name>
                  <description>RI_B pin is logic one (DCE mode)</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DCD</name>
              <description>Data Carrier Detect</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DCD_0</name>
                  <description>DCD_B pin is logic zero (DCE mode)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DCD_1</name>
                  <description>DCD_B pin is logic one (DCE mode)</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSR</name>
              <description>Data Set Ready</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSR_0</name>
                  <description>DSR/ DTR pin is logic zero</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSR_1</name>
                  <description>DSR/ DTR pin is logic one</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>FRAERREN</name>
              <description>Frame Error Interrupt Enable</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>FRAERREN_0</name>
                  <description>Disable the frame error interrupt</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FRAERREN_1</name>
                  <description>Enable the frame error interrupt</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PARERREN</name>
              <description>Parity Error Interrupt Enable</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PARERREN_0</name>
                  <description>Disable the parity error interrupt</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PARERREN_1</name>
                  <description>Enable the parity error interrupt</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DTREN</name>
              <description>Data Terminal Ready Interrupt Enable</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DTREN_0</name>
                  <description>Data Terminal Ready Interrupt Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DTREN_1</name>
                  <description>Data Terminal Ready Interrupt Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DPEC</name>
              <description>DTR/DSR Interrupt Edge Control</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DPEC_0</name>
                  <description>interrupt generated on rising edge</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DPEC_1</name>
                  <description>interrupt generated on falling edge</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>UCR4</name>
          <description>UART Control Register 4</description>
          <addressOffset>0x8C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x8000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DREN</name>
              <description>Receive Data Ready Interrupt Enable. Enables/Disables the RDR bit to generate an interrupt.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DREN_0</name>
                  <description>Disable RDR interrupt</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DREN_1</name>
                  <description>Enable RDR interrupt</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>OREN</name>
              <description>Receiver Overrun Interrupt Enable. Enables/Disables the ORE bit to generate an interrupt.</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>OREN_0</name>
                  <description>Disable ORE interrupt</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>OREN_1</name>
                  <description>Enable ORE interrupt</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BKEN</name>
              <description>BREAK Condition Detected Interrupt Enable. Enables/Disables the BRCD bit to generate an interrupt.</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>BKEN_0</name>
                  <description>Disable the BRCD interrupt</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BKEN_1</name>
                  <description>Enable the BRCD interrupt</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TCEN</name>
              <description>Transmit Complete Interrupt Enable</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TCEN_0</name>
                  <description>Disable TXDC interrupt</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TCEN_1</name>
                  <description>Enable TXDC interrupt</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>LPBYP</name>
              <description>Low Power Bypass. Allows to bypass the low power new features in UART. To use during debug phase.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LPBYP_0</name>
                  <description>Low power features enabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LPBYP_1</name>
                  <description>Low power features disabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>IRSC</name>
              <description>IR Special Case</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>IRSC_0</name>
                  <description>The vote logic uses the sampling clock (16x baud rate) for normal operation</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>IRSC_1</name>
                  <description>The vote logic uses the UART reference clock</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>IDDMAEN</name>
              <description>DMA IDLE Condition Detected Interrupt Enable Enables/Disables the receive DMA request dma_req_rx for the IDLE interrupt (triggered with IDLE flag in USR2[12])</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>IDDMAEN_0</name>
                  <description>DMA IDLE interrupt disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>IDDMAEN_1</name>
                  <description>DMA IDLE interrupt enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WKEN</name>
              <description>WAKE Interrupt Enable</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>WKEN_0</name>
                  <description>Disable the WAKE interrupt</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WKEN_1</name>
                  <description>Enable the WAKE interrupt</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ENIRI</name>
              <description>Serial Infrared Interrupt Enable. Enables/Disables the serial infrared interrupt.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ENIRI_0</name>
                  <description>Serial infrared Interrupt disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENIRI_1</name>
                  <description>Serial infrared Interrupt enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>INVR</name>
              <description>Invert RXD input in RS-232/RS-485 Mode, determine RXD input logic level being sampled in In IrDA mode</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>INVR_0</name>
                  <description>RXD input is not inverted</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>INVR_1</name>
                  <description>RXD input is inverted</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CTSTL</name>
              <description>CTS Trigger Level</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CTSTL_0</name>
                  <description>0 characters received</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CTSTL_1</name>
                  <description>1 characters in the RxFIFO</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CTSTL_32</name>
                  <description>32 characters in the RxFIFO (maximum)</description>
                  <value>0x20</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>UFCR</name>
          <description>UART FIFO Control Register</description>
          <addressOffset>0x90</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x801</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RXTL</name>
              <description>Receiver Trigger Level</description>
              <bitOffset>0</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RXTL_0</name>
                  <description>0 characters received</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RXTL_1</name>
                  <description>RxFIFO has 1 character</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RXTL_31</name>
                  <description>RxFIFO has 31 characters</description>
                  <value>0x1F</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RXTL_32</name>
                  <description>RxFIFO has 32 characters (maximum)</description>
                  <value>0x20</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DCEDTE</name>
              <description>DCE/DTE mode select</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DCEDTE_0</name>
                  <description>DCE mode selected</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DCEDTE_1</name>
                  <description>DTE mode selected</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RFDIV</name>
              <description>Reference Frequency Divider</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RFDIV_0</name>
                  <description>Divide input clock by 6</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RFDIV_1</name>
                  <description>Divide input clock by 5</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RFDIV_2</name>
                  <description>Divide input clock by 4</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RFDIV_3</name>
                  <description>Divide input clock by 3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RFDIV_4</name>
                  <description>Divide input clock by 2</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RFDIV_5</name>
                  <description>Divide input clock by 1</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RFDIV_6</name>
                  <description>Divide input clock by 7</description>
                  <value>0x6</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TXTL</name>
              <description>Transmitter Trigger Level</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TXTL_2</name>
                  <description>TxFIFO has 2 or fewer characters</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TXTL_31</name>
                  <description>TxFIFO has 31 or fewer characters</description>
                  <value>0x1F</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TXTL_32</name>
                  <description>TxFIFO has 32 characters (maximum)</description>
                  <value>0x20</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>USR1</name>
          <description>UART Status Register 1</description>
          <addressOffset>0x94</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x2040</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SAD</name>
              <description>RS-485 Slave Address Detected Interrupt Flag</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SAD_0</name>
                  <description>No slave address detected</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SAD_1</name>
                  <description>Slave address detected</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>AWAKE</name>
              <description>Asynchronous WAKE Interrupt Flag</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
              <enumeratedValues>
                <enumeratedValue>
                  <name>AWAKE_0</name>
                  <description>No falling edge was detected on the RXD Serial pin</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AWAKE_1</name>
                  <description>A falling edge was detected on the RXD Serial pin</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>AIRINT</name>
              <description>Asynchronous IR WAKE Interrupt Flag</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
              <enumeratedValues>
                <enumeratedValue>
                  <name>AIRINT_0</name>
                  <description>No pulse was detected on the RXD IrDA pin</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AIRINT_1</name>
                  <description>A pulse was detected on the RXD IrDA pin</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RXDS</name>
              <description>Receiver IDLE Interrupt Flag</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RXDS_0</name>
                  <description>Receive in progress</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RXDS_1</name>
                  <description>Receiver is IDLE</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DTRD</name>
              <description>DTR Delta</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DTRD_0</name>
                  <description>DTR_B (DCE) or DSR_B (DTE) pin did not change state since last cleared</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DTRD_1</name>
                  <description>DTR_B (DCE) or DSR_B (DTE) pin changed state (write 1 to clear)</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>AGTIM</name>
              <description>Ageing Timer Interrupt Flag</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
              <enumeratedValues>
                <enumeratedValue>
                  <name>AGTIM_0</name>
                  <description>AGTIM is not active</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AGTIM_1</name>
                  <description>AGTIM is active (write 1 to clear)</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RRDY</name>
              <description>Receiver Ready Interrupt / DMA Flag</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RRDY_0</name>
                  <description>No character ready</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RRDY_1</name>
                  <description>Character(s) ready (interrupt posted)</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>FRAMERR</name>
              <description>Frame Error Interrupt Flag</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
              <enumeratedValues>
                <enumeratedValue>
                  <name>FRAMERR_0</name>
                  <description>No frame error detected</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FRAMERR_1</name>
                  <description>Frame error detected (write 1 to clear)</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ESCF</name>
              <description>Escape Sequence Interrupt Flag</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ESCF_0</name>
                  <description>No escape sequence detected</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ESCF_1</name>
                  <description>Escape sequence detected (write 1 to clear).</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RTSD</name>
              <description>RTS Delta</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RTSD_0</name>
                  <description>RTS_B pin did not change state since last cleared</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RTSD_1</name>
                  <description>RTS_B pin changed state (write 1 to clear)</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TRDY</name>
              <description>Transmitter Ready Interrupt / DMA Flag</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TRDY_0</name>
                  <description>The transmitter does not require data</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TRDY_1</name>
                  <description>The transmitter requires data (interrupt posted)</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RTSS</name>
              <description>RTS_B Pin Status</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RTSS_0</name>
                  <description>The RTS_B module input is high (inactive)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RTSS_1</name>
                  <description>The RTS_B module input is low (active)</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PARITYERR</name>
              <description>Parity Error Interrupt Flag</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PARITYERR_0</name>
                  <description>No parity error detected</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PARITYERR_1</name>
                  <description>Parity error detected (write 1 to clear)</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>USR2</name>
          <description>UART Status Register 2</description>
          <addressOffset>0x98</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x4028</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RDR</name>
              <description>Receive Data Ready-Indicates that at least 1 character is received and written to the RxFIFO</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RDR_0</name>
                  <description>No receive data ready</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RDR_1</name>
                  <description>Receive data ready</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ORE</name>
              <description>Overrun Error</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ORE_0</name>
                  <description>No overrun error</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ORE_1</name>
                  <description>Overrun error (write 1 to clear)</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BRCD</name>
              <description>BREAK Condition Detected</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
              <enumeratedValues>
                <enumeratedValue>
                  <name>BRCD_0</name>
                  <description>No BREAK condition was detected</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BRCD_1</name>
                  <description>A BREAK condition was detected (write 1 to clear)</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TXDC</name>
              <description>Transmitter Complete</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TXDC_0</name>
                  <description>Transmit is incomplete</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TXDC_1</name>
                  <description>Transmit is complete</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RTSF</name>
              <description>RTS Edge Triggered Interrupt Flag</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RTSF_0</name>
                  <description>Programmed edge not detected on RTS_B</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RTSF_1</name>
                  <description>Programmed edge detected on RTS_B (write 1 to clear)</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DCDIN</name>
              <description>Data Carrier Detect Input</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DCDIN_0</name>
                  <description>Carrier signal Detected</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DCDIN_1</name>
                  <description>No Carrier signal Detected</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DCDDELT</name>
              <description>Data Carrier Detect Delta</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DCDDELT_0</name>
                  <description>Data Carrier Detect input has not changed state</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DCDDELT_1</name>
                  <description>Data Carrier Detect input has changed state (write 1 to clear)</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WAKE</name>
              <description>Wake</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
              <enumeratedValues>
                <enumeratedValue>
                  <name>WAKE_0</name>
                  <description>start bit not detected</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WAKE_1</name>
                  <description>start bit detected (write 1 to clear)</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>IRINT</name>
              <description>Serial Infrared Interrupt Flag</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
              <enumeratedValues>
                <enumeratedValue>
                  <name>IRINT_0</name>
                  <description>no edge detected</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>IRINT_1</name>
                  <description>valid edge detected (write 1 to clear)</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RIIN</name>
              <description>Ring Indicator Input</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RIIN_0</name>
                  <description>Ring Detected</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RIIN_1</name>
                  <description>No Ring Detected</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RIDELT</name>
              <description>Ring Indicator Delta</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RIDELT_0</name>
                  <description>Ring Indicator input has not changed state</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RIDELT_1</name>
                  <description>Ring Indicator input has changed state (write 1 to clear)</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ACST</name>
              <description>Autobaud Counter Stopped</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ACST_0</name>
                  <description>Measurement of bit length not finished (in autobaud)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ACST_1</name>
                  <description>Measurement of bit length finished (in autobaud). (write 1 to clear)</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>IDLE</name>
              <description>Idle Condition</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
              <enumeratedValues>
                <enumeratedValue>
                  <name>IDLE_0</name>
                  <description>No idle condition detected</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>IDLE_1</name>
                  <description>Idle condition detected (write 1 to clear)</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DTRF</name>
              <description>DTR edge triggered interrupt flag</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DTRF_0</name>
                  <description>Programmed edge not detected on DTR/DSR</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DTRF_1</name>
                  <description>Programmed edge detected on DTR/DSR (write 1 to clear)</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TXFE</name>
              <description>Transmit Buffer FIFO Empty</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TXFE_0</name>
                  <description>The transmit buffer (TxFIFO) is not empty</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TXFE_1</name>
                  <description>The transmit buffer (TxFIFO) is empty</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ADET</name>
              <description>Automatic Baud Rate Detect Complete</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ADET_0</name>
                  <description>ASCII &quot;A&quot; or &quot;a&quot; was not received</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ADET_1</name>
                  <description>ASCII &quot;A&quot; or &quot;a&quot; was received (write 1 to clear)</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>UESC</name>
          <description>UART Escape Character Register</description>
          <addressOffset>0x9C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x2B</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ESC_CHAR</name>
              <description>UART Escape Character</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>UTIM</name>
          <description>UART Escape Timer Register</description>
          <addressOffset>0xA0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TIM</name>
              <description>UART Escape Timer</description>
              <bitOffset>0</bitOffset>
              <bitWidth>12</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>UBIR</name>
          <description>UART BRM Incremental Register</description>
          <addressOffset>0xA4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>INC</name>
              <description>Incremental Numerator</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>UBMR</name>
          <description>UART BRM Modulator Register</description>
          <addressOffset>0xA8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MOD</name>
              <description>Modulator Denominator</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>UBRC</name>
          <description>UART Baud Rate Count Register</description>
          <addressOffset>0xAC</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0x4</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BCNT</name>
              <description>Baud Rate Count Register</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ONEMS</name>
          <description>UART One Millisecond Register</description>
          <addressOffset>0xB0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ONEMS</name>
              <description>One Millisecond Register</description>
              <bitOffset>0</bitOffset>
              <bitWidth>24</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>UTS</name>
          <description>UART Test Register</description>
          <addressOffset>0xB4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x60</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SOFTRST</name>
              <description>Software Reset. Indicates the status of the software reset (SRST_B bit of UCR2).</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SOFTRST_0</name>
                  <description>Software reset inactive</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SOFTRST_1</name>
                  <description>Software reset active</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RXFULL</name>
              <description>RxFIFO FULL. Indicates the RxFIFO is full.</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RXFULL_0</name>
                  <description>The RxFIFO is not full</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RXFULL_1</name>
                  <description>The RxFIFO is full</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TXFULL</name>
              <description>TxFIFO FULL. Indicates the TxFIFO is full.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TXFULL_0</name>
                  <description>The TxFIFO is not full</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TXFULL_1</name>
                  <description>The TxFIFO is full</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RXEMPTY</name>
              <description>RxFIFO Empty. Indicates the RxFIFO is empty.</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RXEMPTY_0</name>
                  <description>The RxFIFO is not empty</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RXEMPTY_1</name>
                  <description>The RxFIFO is empty</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TXEMPTY</name>
              <description>TxFIFO Empty. Indicates that the TxFIFO is empty.</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TXEMPTY_0</name>
                  <description>The TxFIFO is not empty</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TXEMPTY_1</name>
                  <description>The TxFIFO is empty</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RXDBG</name>
              <description>RX_fifo_debug_mode. This bit controls the operation of the RX fifo read counter when in debug mode.</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RXDBG_0</name>
                  <description>rx fifo read pointer does not increment</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RXDBG_1</name>
                  <description>rx_fifo read pointer increments as normal</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>LOOPIR</name>
              <description>Loop TX and RX for IR Test (LOOPIR)</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LOOPIR_0</name>
                  <description>No IR loop</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LOOPIR_1</name>
                  <description>Connect IR transmitter to IR receiver</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DBGEN</name>
              <description>debug_enable_B. This bit controls whether to respond to the debug_req input signal.</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DBGEN_0</name>
                  <description>UART will go into debug mode when debug_req is HIGH</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DBGEN_1</name>
                  <description>UART will not go into debug mode even if debug_req is HIGH</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>LOOP</name>
              <description>Loop TX and RX for Test</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LOOP_0</name>
                  <description>Normal receiver operation</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LOOP_1</name>
                  <description>Internally connect the transmitter output to the receiver input</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>FRCPERR</name>
              <description>Force Parity Error</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>FRCPERR_0</name>
                  <description>Generate normal parity</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FRCPERR_1</name>
                  <description>Generate inverted parity (error)</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>UMCR</name>
          <description>UART RS-485 Mode Control Register</description>
          <addressOffset>0xB8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MDEN</name>
              <description>9-bit data or Multidrop Mode (RS-485) Enable.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>MDEN_0</name>
                  <description>Normal RS-232 or IrDA mode, see for detail.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MDEN_1</name>
                  <description>Enable RS-485 mode, see for detail</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SLAM</name>
              <description>RS-485 Slave Address Detect Mode Selection.</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SLAM_0</name>
                  <description>Select Normal Address Detect mode</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SLAM_1</name>
                  <description>Select Automatic Address Detect mode</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TXB8</name>
              <description>Transmit RS-485 bit 8 (the ninth bit or 9th bit)</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TXB8_0</name>
                  <description>0 will be transmitted as the RS485 9th data bit</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TXB8_1</name>
                  <description>1 will be transmitted as the RS485 9th data bit</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SADEN</name>
              <description>RS-485 Slave Address Detected Interrupt Enable.</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SADEN_0</name>
                  <description>Disable RS-485 Slave Address Detected Interrupt</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SADEN_1</name>
                  <description>Enable RS-485 Slave Address Detected Interrupt</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SLADDR</name>
              <description>RS-485 Slave Address Character</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
      </registers>
    </peripheral>
    <peripheral derivedFrom="UART1">
      <name>UART7</name>
      <description>UARTv2</description>
      <groupName>UART</groupName>
      <prependToName>UART7_</prependToName>
      <baseAddress>0x2018000</baseAddress>
      <addressBlock>
        <offset>0</offset>
        <size>0xBC</size>
        <usage>registers</usage>
      </addressBlock>
      <interrupt>
        <name>UART7</name>
        <value>71</value>
      </interrupt>
    </peripheral>
    <peripheral derivedFrom="UART1">
      <name>UART2</name>
      <description>UARTv2</description>
      <groupName>UART</groupName>
      <prependToName>UART2_</prependToName>
      <baseAddress>0x21E8000</baseAddress>
      <addressBlock>
        <offset>0</offset>
        <size>0xBC</size>
        <usage>registers</usage>
      </addressBlock>
      <interrupt>
        <name>UART2</name>
        <value>59</value>
      </interrupt>
    </peripheral>
    <peripheral derivedFrom="UART1">
      <name>UART3</name>
      <description>UARTv2</description>
      <groupName>UART</groupName>
      <prependToName>UART3_</prependToName>
      <baseAddress>0x21EC000</baseAddress>
      <addressBlock>
        <offset>0</offset>
        <size>0xBC</size>
        <usage>registers</usage>
      </addressBlock>
      <interrupt>
        <name>UART3</name>
        <value>60</value>
      </interrupt>
    </peripheral>
    <peripheral derivedFrom="UART1">
      <name>UART4</name>
      <description>UARTv2</description>
      <groupName>UART</groupName>
      <prependToName>UART4_</prependToName>
      <baseAddress>0x21F0000</baseAddress>
      <addressBlock>
        <offset>0</offset>
        <size>0xBC</size>
        <usage>registers</usage>
      </addressBlock>
      <interrupt>
        <name>UART4</name>
        <value>61</value>
      </interrupt>
    </peripheral>
    <peripheral derivedFrom="UART1">
      <name>UART5</name>
      <description>UARTv2</description>
      <groupName>UART</groupName>
      <prependToName>UART5_</prependToName>
      <baseAddress>0x21F4000</baseAddress>
      <addressBlock>
        <offset>0</offset>
        <size>0xBC</size>
        <usage>registers</usage>
      </addressBlock>
      <interrupt>
        <name>UART5</name>
        <value>62</value>
      </interrupt>
    </peripheral>
    <peripheral derivedFrom="UART1">
      <name>UART6</name>
      <description>UARTv2</description>
      <groupName>UART</groupName>
      <prependToName>UART6_</prependToName>
      <baseAddress>0x21FC000</baseAddress>
      <addressBlock>
        <offset>0</offset>
        <size>0xBC</size>
        <usage>registers</usage>
      </addressBlock>
      <interrupt>
        <name>UART6</name>
        <value>49</value>
      </interrupt>
    </peripheral>
    <peripheral derivedFrom="UART1">
      <name>UART8</name>
      <description>UARTv2</description>
      <groupName>UART</groupName>
      <prependToName>UART8_</prependToName>
      <baseAddress>0x2288000</baseAddress>
      <addressBlock>
        <offset>0</offset>
        <size>0xBC</size>
        <usage>registers</usage>
      </addressBlock>
      <interrupt>
        <name>UART8</name>
        <value>72</value>
      </interrupt>
    </peripheral>
    <peripheral>
      <name>ESAI</name>
      <description>Enhanced Serial Audio Interface</description>
      <groupName>ESAI</groupName>
      <prependToName>ESAI_</prependToName>
      <baseAddress>0x2024000</baseAddress>
      <addressBlock>
        <offset>0</offset>
        <size>0x100</size>
        <usage>registers</usage>
      </addressBlock>
      <interrupt>
        <name>ESAI</name>
        <value>83</value>
      </interrupt>
      <registers>
        <register>
          <name>ETDR</name>
          <description>ESAI Transmit Data Register</description>
          <addressOffset>0</addressOffset>
          <size>32</size>
          <access>write-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ETDR</name>
              <description>ESAI Transmit Data Register</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>write-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ERDR</name>
          <description>ESAI Receive Data Register</description>
          <addressOffset>0x4</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ERDR</name>
              <description>ESAI Receive Data Register</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ECR</name>
          <description>ESAI Control Register</description>
          <addressOffset>0x8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ESAIEN</name>
              <description>ESAI Enable</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ESAIEN_0</name>
                  <description>ESAI disabled.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ESAIEN_1</name>
                  <description>ESAI enabled.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ERST</name>
              <description>ESAI Reset. Reset the ESAI core logic (including configuration registers) but not the ESAI FIFOs.</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ERST_0</name>
                  <description>ESAI not reset.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ERST_1</name>
                  <description>ESAI reset.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ERO</name>
              <description>EXTAL Receiver Out. Drive the EXTAL input on the High Frequency Receiver Clock pin.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ERO_0</name>
                  <description>HCKR pin has normal function.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ERO_1</name>
                  <description>EXTAL driven onto HCKR pin.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ERI</name>
              <description>EXTAL Receiver In</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ERI_0</name>
                  <description>HCKR pin has normal function.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ERI_1</name>
                  <description>EXTAL muxed into HCKR input.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ETO</name>
              <description>EXTAL Transmitter Out. Drive the EXTAL input on the High Frequency Transmitter Clock pin.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ETO_0</name>
                  <description>HCKT pin has normal function.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ETO_1</name>
                  <description>EXTAL driven onto HCKT pin.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ETI</name>
              <description>EXTAL Transmitter In</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ETI_0</name>
                  <description>HCKT pin has normal function.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ETI_1</name>
                  <description>EXTAL muxed into HCKT input.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>ESR</name>
          <description>ESAI Status Register</description>
          <addressOffset>0xC</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RD</name>
              <description>Receive Data.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RD_0</name>
                  <description>RD is not the highest priority active interrupt.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RD_1</name>
                  <description>RD is the highest priority active interrupt.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RED</name>
              <description>Receive Even Data.</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RED_0</name>
                  <description>RED is not the highest priority active interrupt.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RED_1</name>
                  <description>RED is the highest priority active interrupt.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RDE</name>
              <description>Receive Data Exception.</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RDE_0</name>
                  <description>RDE is not the highest priority active interrupt.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RDE_1</name>
                  <description>RDE is the highest priority active interrupt.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RLS</name>
              <description>Receive Last Slot</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RLS_0</name>
                  <description>RLS is not the highest priority active interrupt.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RLS_1</name>
                  <description>RLS is the highest priority active interrupt.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TD</name>
              <description>Transmit Data.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TD_0</name>
                  <description>TD is not the highest priority active interrupt.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TD_1</name>
                  <description>TD is the highest priority active interrupt.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TED</name>
              <description>Transmit Even Data.</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TED_0</name>
                  <description>TED is not the highest priority active interrupt.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TED_1</name>
                  <description>TED is the highest priority active interrupt.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TDE</name>
              <description>Transmit Data Exception.</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TDE_0</name>
                  <description>TDE is not the highest priority active interrupt.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TDE_1</name>
                  <description>TDE is the highest priority active interrupt.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TLS</name>
              <description>Transmit Last Slot</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TLS_0</name>
                  <description>TLS is not the highest priority active interrupt.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TLS_1</name>
                  <description>TLS is the highest priority active interrupt.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TFE</name>
              <description>Transmit FIFO Empty</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TFE_0</name>
                  <description>Number of empty slots in Transmit FIFO less than Transmit FIFO watermark.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TFE_1</name>
                  <description>Number of empty slots in Transmit FIFO is equal to or greater than Transmit FIFO watermark.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RFF</name>
              <description>Receive FIFO Full</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RFF_0</name>
                  <description>Number of words in Receive FIFO less than Receive FIFO watermark.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RFF_1</name>
                  <description>Number of words in Receive FIFO is equal to or greater than Receive FIFO watermark.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TINIT</name>
              <description>Transmit Initialization</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TINIT_0</name>
                  <description>Transmitter has finished initializing the Transmit Data Registers (or Transmit FIFO is not enabled or Transmit Initialization is not enabled).</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TINIT_1</name>
                  <description>Transmitter has not finished initializing the Transmit Data Registers.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>TFCR</name>
          <description>Transmit FIFO Configuration Register</description>
          <addressOffset>0x10</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TFE</name>
              <description>Transmit FIFO Enable. This bit enables the use of the Transmit FIFO.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TFE_0</name>
                  <description>Transmit FIFO disabled.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TFE_1</name>
                  <description>Transmit FIFO enabled.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TFR</name>
              <description>Transmit FIFO Reset. This bit resets the Transmit FIFO pointers.</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TFR_0</name>
                  <description>Transmit FIFO not reset.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TFR_1</name>
                  <description>Transmit FIFO reset.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TE0</name>
              <description>Transmitter #0 FIFO Enable</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TE0_0</name>
                  <description>Transmitter #0 is not using the Transmit FIFO.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TE0_1</name>
                  <description>Transmitter #0 is using the Transmit FIFO.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TE1</name>
              <description>Transmitter #1 FIFO Enable</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TE1_0</name>
                  <description>Transmitter #1 is not using the Transmit FIFO.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TE1_1</name>
                  <description>Transmitter #1 is using the Transmit FIFO.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TE2</name>
              <description>Transmitter #2 FIFO Enable</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TE2_0</name>
                  <description>Transmitter #2 is not using the Transmit FIFO.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TE2_1</name>
                  <description>Transmitter #2 is using the Transmit FIFO.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TE3</name>
              <description>Transmitter #3 FIFO Enable</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TE3_0</name>
                  <description>Transmitter #3 is not using the Transmit FIFO.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TE3_1</name>
                  <description>Transmitter #3 is using the Transmit FIFO.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TE4</name>
              <description>Transmitter #4 FIFO Enable</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TE4_0</name>
                  <description>Transmitter #4 is not using the Transmit FIFO.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TE4_1</name>
                  <description>Transmitter #4 is using the Transmit FIFO.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TE5</name>
              <description>Transmitter #5 FIFO Enable</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TE5_0</name>
                  <description>Transmitter #5 is not using the Transmit FIFO.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TE5_1</name>
                  <description>Transmitter #5 is using the Transmit FIFO.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TFWM</name>
              <description>Transmit FIFO Watermark</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TWA</name>
              <description>Transmit Word Alignment</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TWA_0</name>
                  <description>MSB of data is bit 31. Data bits 7-0 are ignored when passed to transmit shift register.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TWA_1</name>
                  <description>MSB of data is bit 27. Data bits 3-0 are ignored when passed to transmit shift register.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TWA_2</name>
                  <description>MSB of data is bit 23.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TWA_3</name>
                  <description>MSB of data is bit 19. Bottom 4 bits of transmit shift register are zeroed.</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TWA_4</name>
                  <description>MSB of data is bit 15. Bottom 8 bits of transmit shift register are zeroed.</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TWA_5</name>
                  <description>MSB of data is bit 11. Bottom 12 bits of transmit shift register are zeroed.</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TWA_6</name>
                  <description>MSB of data is bit 7. Bottom 16 bits of transmit shift register are zeroed.</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TWA_7</name>
                  <description>MSB of data is bit 3. Bottom 20 bits of transmit shift register are zeroed.</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TIEN</name>
              <description>Transmitter Initialization Enable</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TIEN_0</name>
                  <description>Transmit Data Registers are not initialized from the FIFO once the Transmit FIFO is enabled. Software must manually initialize the Transmit Data Registers separately.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TIEN_1</name>
                  <description>Transmit Data Registers are initialized from the FIFO once the Transmit FIFO is enabled.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TAENB</name>
              <description>Tx FIFO Align Enable</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TFIN</name>
              <description>Tx FIFO Interrupt Enable</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>TFSR</name>
          <description>Transmit FIFO Status Register</description>
          <addressOffset>0x14</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TFCNT</name>
              <description>Transmit FIFO Counter. These bits indicate the number of data words stored in the Transmit FIFO.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>NTFI</name>
              <description>Next Transmitter FIFO In. Indicates which transmitter receives the next word written to the FIFO.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NTFI_0</name>
                  <description>Transmitter #0 receives next word written to the Transmit FIFO.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NTFI_1</name>
                  <description>Transmitter #1 receives next word written to the Transmit FIFO.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NTFI_2</name>
                  <description>Transmitter #2 receives next word written to the Transmit FIFO.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NTFI_3</name>
                  <description>Transmitter #3 receives next word written to the Transmit FIFO.</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NTFI_4</name>
                  <description>Transmitter #4 receives next word written to the Transmit FIFO.</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NTFI_5</name>
                  <description>Transmitter #5 receives next word written to the Transmit FIFO.</description>
                  <value>0x5</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>NTFO</name>
              <description>Next Transmitter FIFO Out</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NTFO_0</name>
                  <description>Transmitter #0 receives next word from the Transmit FIFO.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NTFO_1</name>
                  <description>Transmitter #1 receives next word from the Transmit FIFO.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NTFO_2</name>
                  <description>Transmitter #2 receives next word from the Transmit FIFO.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NTFO_3</name>
                  <description>Transmitter #3 receives next word from the Transmit FIFO.</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NTFO_4</name>
                  <description>Transmitter #4 receives next word from the Transmit FIFO.</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NTFO_5</name>
                  <description>Transmitter #5 receives next word from the Transmit FIFO.</description>
                  <value>0x5</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>RFCR</name>
          <description>Receive FIFO Configuration Register</description>
          <addressOffset>0x18</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RFE</name>
              <description>Receive FIFO Enable. This bit enables the use of the Receive FIFO.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RFE_0</name>
                  <description>Receive FIFO disabled.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RFE_1</name>
                  <description>Receive FIFO enabled.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RFR</name>
              <description>Receive FIFO Reset. This bit resets the Receive FIFO pointers.</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RFR_0</name>
                  <description>Receive FIFO not reset.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RFR_1</name>
                  <description>Receive FIFO reset.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RE0</name>
              <description>Receiver #0 FIFO Enable</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RE0_0</name>
                  <description>Receiver #0 is not using the Receive FIFO.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RE0_1</name>
                  <description>Receiver #0 is using the Receive FIFO.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RE1</name>
              <description>Receiver #1 FIFO Enable</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RE1_0</name>
                  <description>Receiver #1 is not using the Receive FIFO.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RE1_1</name>
                  <description>Receiver #1 is using the Receive FIFO.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RE2</name>
              <description>Receiver #2 FIFO Enable</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RE2_0</name>
                  <description>Receiver #2 is not using the Receive FIFO.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RE2_1</name>
                  <description>Receiver #2 is using the Receive FIFO.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RE3</name>
              <description>Receiver #3 FIFO Enable</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RE3_0</name>
                  <description>Receiver #3 is not using the Receive FIFO.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RE3_1</name>
                  <description>Receiver #3 is using the Receive FIFO.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RFWM</name>
              <description>Receive FIFO Watermark</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RWA</name>
              <description>Receive Word Alignment</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RWA_0</name>
                  <description>MSB of data is at bit 31. Data bits 7-0 are zeroed.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RWA_1</name>
                  <description>MSB of data is at bit 27. Data bits 3-0 are zeroed.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RWA_2</name>
                  <description>MSB of data is at bit 23.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RWA_3</name>
                  <description>MSB of data is at bit 19. Data bits 3-0 from receive shift register are ignored.</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RWA_4</name>
                  <description>MSB of data is at bit 15. Data bits 7-0 from receive shift register are ignored.</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RWA_5</name>
                  <description>MSB of data is at bit 11. Data bits 11-0 from receive shift register are ignored.</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RWA_6</name>
                  <description>MSB of data is at bit 7. Data bits 15-0 from receive shift register are ignored.</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RWA_7</name>
                  <description>MSB of data is at bit 3. Data bits 19-0 from receive shift register are ignored.</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>REXT</name>
              <description>Receive Extension</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>REXT_0</name>
                  <description>Receive data is zero extended.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REXT_1</name>
                  <description>Receive data is sign extended.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RAENB</name>
              <description>Rx FIFO Align Enable</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RFIN</name>
              <description>Rx FIFO Interrupt Enable</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>RFSR</name>
          <description>Receive FIFO Status Register</description>
          <addressOffset>0x1C</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RFCNT</name>
              <description>Receive FIFO Counter. These bits indicate the number of data words stored in the Receive FIFO.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>NRFO</name>
              <description>Next Receiver FIFO Out. Indicates which receiver returns the top word of the Receive FIFO.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NRFO_0</name>
                  <description>Receiver #0 returns next word from the Receive FIFO.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NRFO_1</name>
                  <description>Receiver #1 returns next word from the Receive FIFO.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NRFO_2</name>
                  <description>Receiver #2 returns next word from the Receive FIFO.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NRFO_3</name>
                  <description>Receiver #3 returns next word from the Receive FIFO.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>NRFI</name>
              <description>Next Receiver FIFO In</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NRFI_0</name>
                  <description>Receiver #0 returns next word to the Receive FIFO.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NRFI_1</name>
                  <description>Receiver #1 returns next word to the Receive FIFO.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NRFI_2</name>
                  <description>Receiver #2 returns next word to the Receive FIFO.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NRFI_3</name>
                  <description>Receiver #3 returns next word to the Receive FIFO.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <dim>6</dim>
          <dimIncrement>0x4</dimIncrement>
          <name>TX%s</name>
          <description>Transmit Data Register n</description>
          <addressOffset>0x80</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TXn</name>
              <description>Stores the data to be transmitted and is automatically transferred to the transmit shift registers</description>
              <bitOffset>0</bitOffset>
              <bitWidth>24</bitWidth>
              <access>write-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>TSR</name>
          <description>ESAI Transmit Slot Register</description>
          <addressOffset>0x98</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TSR</name>
              <description>The write-only Transmit Slot Register (ESAI_TSR) is effectively a null data register that is used when the data is not to be transmitted in the available transmit time slot</description>
              <bitOffset>0</bitOffset>
              <bitWidth>24</bitWidth>
              <access>write-only</access>
            </field>
          </fields>
        </register>
        <register>
          <dim>4</dim>
          <dimIncrement>0x4</dimIncrement>
          <name>RX%s</name>
          <description>Receive Data Register n</description>
          <addressOffset>0xA0</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RXn</name>
              <description>Accept data from the receive shift registers when they become full See ESAI Receive Shift Registers</description>
              <bitOffset>0</bitOffset>
              <bitWidth>24</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>SAISR</name>
          <description>Serial Audio Interface Status Register</description>
          <addressOffset>0xCC</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>IF0</name>
              <description>ESAI_SAISR Serial Input Flag 0</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>IF1</name>
              <description>ESAI_SAISR Serial Inout Flag 1</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>IF2</name>
              <description>ESAI_SAISR Serial Input Flag 2</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>RFS</name>
              <description>ESAI_SAISR Receive Frame Sync Flag</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>ROE</name>
              <description>ESAI_SAISR Receive Overrun Error Flag</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>RDF</name>
              <description>ESAI_SAISR Receive Data Register Full</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>REDF</name>
              <description>ESAI_SAISR Receive Even-Data Register Full</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>RODF</name>
              <description>ESAI_SAISR Receive Odd-Data Register Full</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>TFS</name>
              <description>ESAI_SAISR Transmit Frame Sync Flag</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>TUE</name>
              <description>ESAI_SAISR Transmit Underrun Error Flag</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>TDE</name>
              <description>ESAI_SAISR Transmit Data Register Empty</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>TEDE</name>
              <description>ESAI_SAISR Transmit Even-DataRegister Empty</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>TODFE</name>
              <description>ESAI_SAISR Transmit Odd-Data Register Empty</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>SAICR</name>
          <description>Serial Audio Interface Control Register</description>
          <addressOffset>0xD0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>OF0</name>
              <description>ESAI_SAICR Serial Output Flag 0</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>OF1</name>
              <description>ESAI_SAICR Serial Output Flag 1</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>OF2</name>
              <description>ESAI_SAICR Serial Output Flag 2</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SYN</name>
              <description>ESAI_SAICR Synchronous Mode Selection</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TEBE</name>
              <description>ESAI_SAICR Transmit External Buffer Enable</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ALC</name>
              <description>ESAI_SAICR Alignment Control</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>TCR</name>
          <description>Transmit Control Register</description>
          <addressOffset>0xD4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TE0</name>
              <description>ESAI_TCR ESAI Transmit 0 Enable</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TE1</name>
              <description>ESAI_TCR ESAI Transmit 1 Enable</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TE2</name>
              <description>ESAI_TCR ESAI Transmit 2 Enable</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TE3</name>
              <description>ESAI_TCR ESAI Transmit 3 Enable</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TE4</name>
              <description>ESAI_TCR ESAI Transmit 4 Enable</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TE5</name>
              <description>ESAI_TCR ESAI Transmit 5 Enable</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TSHFD</name>
              <description>ESAI_TCR Transmit Shift Direction</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TWA</name>
              <description>ESAI_TCR Transmit Word Alignment Control</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TMOD</name>
              <description>ESAI_TCR Transmit Network Mode Control (TMOD1-TMOD0)</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TSWS</name>
              <description>ESAI_TCR Tx Slot and Word Length Select (TSWS4-TSWS0)</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TFSL</name>
              <description>ESAI_TCR Transmit Frame Sync Length</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TFSR</name>
              <description>ESAI_TCR Transmit Frame Sync Relative Timing</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PADC</name>
              <description>ESAI_TCR Transmit Zero Padding Control</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TPR</name>
              <description>ESAI_TCR Transmit Section Personal Reset</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TEIE</name>
              <description>ESAI_TCR Transmit Exception Interrupt Enable</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TEDIE</name>
              <description>ESAI_TCR Transmit Even Slot Data Interrupt Enable</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TIE</name>
              <description>ESAI_TCR Transmit Interrupt Enable</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TLIE</name>
              <description>ESAI_TCR Transmit Last Slot Interrupt Enable</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>TCCR</name>
          <description>Transmit Clock Control Register</description>
          <addressOffset>0xD8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TPM</name>
              <description>ESAI_TCCR Transmit Prescale Modulus Select</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TPSR</name>
              <description>ESAI_TCCR Transmit Prescaler Range</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TDC</name>
              <description>ESAI_TCCR Tx Frame Rate Divider Control</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TFP</name>
              <description>ESAI_TCCR Tx High Frequency Clock Divider</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TCKP</name>
              <description>ESAI_TCCR Transmit Clock Polarity</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TFSP</name>
              <description>ESAI_TCCR Transmit Frame Sync Polarity</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>THCKP</name>
              <description>ESAI_TCCR Transmit High Frequency Clock Polarity The Transmitter High Frequency Clock Polarity (THCKP) bit controls the polarity of the HCKT</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TCKD</name>
              <description>ESAI_TCCR Transmit Clock Source Direction</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TFSD</name>
              <description>ESAI_TCCR Transmit Frame Sync Signal Direction</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>THCKD</name>
              <description>ESAI_TCCR Transmit High Frequency Clock Direction</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>RCR</name>
          <description>Receive Control Register</description>
          <addressOffset>0xDC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RE0</name>
              <description>ESAI_RCR ESAI Receiver 0 Enable</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RE1</name>
              <description>ESAI_RCR ESAI Receiver 1 Enable</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RE2</name>
              <description>ESAI_RCR ESAI Receiver 2 Enable</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RE3</name>
              <description>ESAI_RCR ESAI Receiver 3 Enable</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSHFD</name>
              <description>ESAI_RCR Receiver Shift Direction</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RWA</name>
              <description>ESAI_RCR Receiver Word Alignment Control</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RMOD</name>
              <description>ESAI_RCR Receiver Network Mode Control</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSWS</name>
              <description>ESAI_RCR Receiver Slot and Word Select</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RFSL</name>
              <description>ESAI_RCR Receiver Frame Sync Length</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RFSR</name>
              <description>ESAI_RCR Receiver Frame Sync Relative Timing</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RPR</name>
              <description>ESAI_RCR Receiver Section Personal Reset</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>REIE</name>
              <description>ESAI_RCR Receive Exception Interrupt Enable</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>REDIE</name>
              <description>ESAI_RCR Receive Even Slot Data Interrupt Enable</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RIE</name>
              <description>ESAI_RCR Receive Interrupt Enable</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RLIE</name>
              <description>ESAI_RCR Receive Last Slot Interrupt Enable</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>RCCR</name>
          <description>Receive Clock Control Register</description>
          <addressOffset>0xE0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RPM</name>
              <description>ESAI_RCCR Receiver Prescale Modulus Select</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RPSR</name>
              <description>ESAI_RCCR Receiver Prescaler Range</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RDC</name>
              <description>ESAI_RCCR Rx Frame Rate Divider Control</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RFP</name>
              <description>ESAI_RCCR Rx High Frequency Clock Divider</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RCKP</name>
              <description>The Receiver Clock Polarity (RCKP) bit controls on which bit clock edge data and frame sync are clocked out and latched in</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RFSP</name>
              <description>ESAI_RCCR Receiver Frame Sync Polarity</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RHCKP</name>
              <description>ESAI_RCCR Receiver High Frequency Clock Polarity</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RCKD</name>
              <description>ESAI_RCCR Receiver Clock Source Direction</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RFSD</name>
              <description>ESAI_RCCR Receiver Frame Sync Signal Direction</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RHCKD</name>
              <description>ESAI_RCCR Receiver High Frequency Clock Direction</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>TSMA</name>
          <description>Transmit Slot Mask Register A</description>
          <addressOffset>0xE4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0xFFFF</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TS</name>
              <description>Lower 16 bits of TS</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>TSMB</name>
          <description>Transmit Slot Mask Register B</description>
          <addressOffset>0xE8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0xFFFF</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TS</name>
              <description>When bit number N in ESAI_TSMB is cleared, all the transmit data pins of the enabled transmitters are tri-stated during transmit time slot number N</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>RSMA</name>
          <description>Receive Slot Mask Register A</description>
          <addressOffset>0xEC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0xFFFF</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RS</name>
              <description>When bit number N in the ESAI_RSMA register is cleared, the data from the enabled receivers input pins are shifted into their receive shift registers during slot number N</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>RSMB</name>
          <description>Receive Slot Mask Register B</description>
          <addressOffset>0xF0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0xFFFF</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RS</name>
              <description>When bit number N in the ESAI_RSMB register is cleared, the data from the enabled receivers input pins are shifted into their receive shift registers during slot number N</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>PRRC</name>
          <description>Port C Direction Register</description>
          <addressOffset>0xF8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>PDC</name>
              <description>See .</description>
              <bitOffset>0</bitOffset>
              <bitWidth>12</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>PCRC</name>
          <description>Port C Control Register</description>
          <addressOffset>0xFC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>PC</name>
              <description>See .</description>
              <bitOffset>0</bitOffset>
              <bitWidth>12</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
      </registers>
    </peripheral>
    <peripheral>
      <name>I2S1</name>
      <description>Inter-IC Sound / Synchronous Audio Interface</description>
      <groupName>I2S</groupName>
      <prependToName>I2S1_</prependToName>
      <baseAddress>0x2028000</baseAddress>
      <headerStructName>I2S</headerStructName>
      <addressBlock>
        <offset>0</offset>
        <size>0xE4</size>
        <usage>registers</usage>
      </addressBlock>
      <interrupt>
        <name>SAI1</name>
        <value>129</value>
      </interrupt>
      <registers>
        <register>
          <name>TCSR</name>
          <description>SAI Transmit Control Register</description>
          <addressOffset>0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>FRDE</name>
              <description>FIFO Request DMA Enable</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>FRDE_0</name>
                  <description>Disables the DMA request.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FRDE_1</name>
                  <description>Enables the DMA request.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>FWDE</name>
              <description>FIFO Warning DMA Enable</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>FWDE_0</name>
                  <description>Disables the DMA request.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FWDE_1</name>
                  <description>Enables the DMA request.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>FRIE</name>
              <description>FIFO Request Interrupt Enable</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>FRIE_0</name>
                  <description>Disables the interrupt.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FRIE_1</name>
                  <description>Enables the interrupt.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>FWIE</name>
              <description>FIFO Warning Interrupt Enable</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>FWIE_0</name>
                  <description>Disables the interrupt.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FWIE_1</name>
                  <description>Enables the interrupt.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>FEIE</name>
              <description>FIFO Error Interrupt Enable</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>FEIE_0</name>
                  <description>Disables the interrupt.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FEIE_1</name>
                  <description>Enables the interrupt.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SEIE</name>
              <description>Sync Error Interrupt Enable</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SEIE_0</name>
                  <description>Disables interrupt.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SEIE_1</name>
                  <description>Enables interrupt.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WSIE</name>
              <description>Word Start Interrupt Enable</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>WSIE_0</name>
                  <description>Disables interrupt.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WSIE_1</name>
                  <description>Enables interrupt.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>FRF</name>
              <description>FIFO Request Flag</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>FRF_0</name>
                  <description>Transmit FIFO watermark has not been reached.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FRF_1</name>
                  <description>Transmit FIFO watermark has been reached.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>FWF</name>
              <description>FIFO Warning Flag</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>FWF_0</name>
                  <description>No enabled transmit FIFO is empty.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FWF_1</name>
                  <description>Enabled transmit FIFO is empty.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>FEF</name>
              <description>FIFO Error Flag</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
              <enumeratedValues>
                <enumeratedValue>
                  <name>FEF_0</name>
                  <description>Transmit underrun not detected.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FEF_1</name>
                  <description>Transmit underrun detected.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SEF</name>
              <description>Sync Error Flag</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SEF_0</name>
                  <description>Sync error not detected.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SEF_1</name>
                  <description>Frame sync error detected.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WSF</name>
              <description>Word Start Flag</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
              <enumeratedValues>
                <enumeratedValue>
                  <name>WSF_0</name>
                  <description>Start of word not detected.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WSF_1</name>
                  <description>Start of word detected.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SR</name>
              <description>Software Reset</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SR_0</name>
                  <description>No effect.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SR_1</name>
                  <description>Software reset.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>FR</name>
              <description>FIFO Reset</description>
              <bitOffset>0x19</bitOffset>
              <bitWidth>1</bitWidth>
              <access>write-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>FR_0</name>
                  <description>No effect.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FR_1</name>
                  <description>FIFO reset.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BCE</name>
              <description>Bit Clock Enable</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>BCE_0</name>
                  <description>Transmit bit clock is disabled.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BCE_1</name>
                  <description>Transmit bit clock is enabled.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DBGE</name>
              <description>Debug Enable</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DBGE_0</name>
                  <description>Transmitter is disabled in Debug mode, after completing the current frame.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DBGE_1</name>
                  <description>Transmitter is enabled in Debug mode.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>STOPE</name>
              <description>Stop Enable</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>STOPE_0</name>
                  <description>Transmitter disabled in Stop mode.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>STOPE_1</name>
                  <description>Transmitter enabled in Stop mode.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TE</name>
              <description>Transmitter Enable</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TE_0</name>
                  <description>Transmitter is disabled.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TE_1</name>
                  <description>Transmitter is enabled, or transmitter has been disabled and has not yet reached end of frame.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>TCR1</name>
          <description>SAI Transmit Configuration 1 Register</description>
          <addressOffset>0x4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TFW</name>
              <description>Transmit FIFO Watermark</description>
              <bitOffset>0</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>TCR2</name>
          <description>SAI Transmit Configuration 2 Register</description>
          <addressOffset>0x8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DIV</name>
              <description>Bit Clock Divide</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BCD</name>
              <description>Bit Clock Direction</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>BCD_0</name>
                  <description>Bit clock is generated externally in Slave mode.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BCD_1</name>
                  <description>Bit clock is generated internally in Master mode.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BCP</name>
              <description>Bit Clock Polarity</description>
              <bitOffset>0x19</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>BCP_0</name>
                  <description>Bit clock is active high with drive outputs on rising edge and sample inputs on falling edge.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BCP_1</name>
                  <description>Bit clock is active low with drive outputs on falling edge and sample inputs on rising edge.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>MSEL</name>
              <description>MCLK Select</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>MSEL_0</name>
                  <description>Master Clock (MCLK) 1 option selected.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MSEL_1</name>
                  <description>Master Clock (MCLK) 1 option selected.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MSEL_2</name>
                  <description>Master Clock (MCLK) 2 option selected.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MSEL_3</name>
                  <description>Master Clock (MCLK) 3 option selected.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BCI</name>
              <description>Bit Clock Input</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>BCI_0</name>
                  <description>No effect.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BCI_1</name>
                  <description>Internal logic is clocked as if bit clock was externally generated.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BCS</name>
              <description>Bit Clock Swap</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>BCS_0</name>
                  <description>Use the normal bit clock source.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BCS_1</name>
                  <description>Swap the bit clock source.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SYNC</name>
              <description>Synchronous Mode</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SYNC_0</name>
                  <description>Asynchronous mode.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SYNC_1</name>
                  <description>Synchronous with receiver.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>TCR3</name>
          <description>SAI Transmit Configuration 3 Register</description>
          <addressOffset>0xC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>WDFL</name>
              <description>Word Flag Configuration</description>
              <bitOffset>0</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TCE</name>
              <description>Transmit Channel Enable</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TCE_0</name>
                  <description>Transmit data channel N is disabled.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TCE_1</name>
                  <description>Transmit data channel N is enabled.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>TCR4</name>
          <description>SAI Transmit Configuration 4 Register</description>
          <addressOffset>0x10</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>FSD</name>
              <description>Frame Sync Direction</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>FSD_0</name>
                  <description>Frame sync is generated externally in Slave mode.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FSD_1</name>
                  <description>Frame sync is generated internally in Master mode.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>FSP</name>
              <description>Frame Sync Polarity</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>FSP_0</name>
                  <description>Frame sync is active high.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FSP_1</name>
                  <description>Frame sync is active low.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>FSE</name>
              <description>Frame Sync Early</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>FSE_0</name>
                  <description>Frame sync asserts with the first bit of the frame.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FSE_1</name>
                  <description>Frame sync asserts one bit before the first bit of the frame.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>MF</name>
              <description>MSB First</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>MF_0</name>
                  <description>LSB is transmitted first.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MF_1</name>
                  <description>MSB is transmitted first.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SYWD</name>
              <description>Sync Width</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>FRSZ</name>
              <description>Frame size</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>TCR5</name>
          <description>SAI Transmit Configuration 5 Register</description>
          <addressOffset>0x14</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>FBT</name>
              <description>First Bit Shifted</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>W0W</name>
              <description>Word 0 Width</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>WNW</name>
              <description>Word N Width</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>TDR</name>
          <description>SAI Transmit Data Register</description>
          <addressOffset>0x20</addressOffset>
          <size>32</size>
          <access>write-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TDR</name>
              <description>Transmit Data Register</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>write-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>TFR</name>
          <description>SAI Transmit FIFO Register</description>
          <addressOffset>0x40</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RFP</name>
              <description>Read FIFO Pointer</description>
              <bitOffset>0</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>WFP</name>
              <description>Write FIFO Pointer</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>TMR</name>
          <description>SAI Transmit Mask Register</description>
          <addressOffset>0x60</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TWM</name>
              <description>Transmit Word Mask</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TWM_0</name>
                  <description>Word N is enabled.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TWM_1</name>
                  <description>Word N is masked. The transmit data pins are tri-stated when masked.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>RCSR</name>
          <description>SAI Receive Control Register</description>
          <addressOffset>0x80</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>FRDE</name>
              <description>FIFO Request DMA Enable</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>FRDE_0</name>
                  <description>Disables the DMA request.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FRDE_1</name>
                  <description>Enables the DMA request.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>FWDE</name>
              <description>FIFO Warning DMA Enable</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>FWDE_0</name>
                  <description>Disables the DMA request.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FWDE_1</name>
                  <description>Enables the DMA request.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>FRIE</name>
              <description>FIFO Request Interrupt Enable</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>FRIE_0</name>
                  <description>Disables the interrupt.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FRIE_1</name>
                  <description>Enables the interrupt.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>FWIE</name>
              <description>FIFO Warning Interrupt Enable</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>FWIE_0</name>
                  <description>Disables the interrupt.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FWIE_1</name>
                  <description>Enables the interrupt.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>FEIE</name>
              <description>FIFO Error Interrupt Enable</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>FEIE_0</name>
                  <description>Disables the interrupt.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FEIE_1</name>
                  <description>Enables the interrupt.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SEIE</name>
              <description>Sync Error Interrupt Enable</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SEIE_0</name>
                  <description>Disables interrupt.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SEIE_1</name>
                  <description>Enables interrupt.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WSIE</name>
              <description>Word Start Interrupt Enable</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>WSIE_0</name>
                  <description>Disables interrupt.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WSIE_1</name>
                  <description>Enables interrupt.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>FRF</name>
              <description>FIFO Request Flag</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>FRF_0</name>
                  <description>Receive FIFO watermark not reached.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FRF_1</name>
                  <description>Receive FIFO watermark has been reached.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>FWF</name>
              <description>FIFO Warning Flag</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>FWF_0</name>
                  <description>No enabled receive FIFO is full.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FWF_1</name>
                  <description>Enabled receive FIFO is full.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>FEF</name>
              <description>FIFO Error Flag</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
              <enumeratedValues>
                <enumeratedValue>
                  <name>FEF_0</name>
                  <description>Receive overflow not detected.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FEF_1</name>
                  <description>Receive overflow detected.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SEF</name>
              <description>Sync Error Flag</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SEF_0</name>
                  <description>Sync error not detected.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SEF_1</name>
                  <description>Frame sync error detected.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WSF</name>
              <description>Word Start Flag</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
              <enumeratedValues>
                <enumeratedValue>
                  <name>WSF_0</name>
                  <description>Start of word not detected.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WSF_1</name>
                  <description>Start of word detected.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SR</name>
              <description>Software Reset</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SR_0</name>
                  <description>No effect.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SR_1</name>
                  <description>Software reset.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>FR</name>
              <description>FIFO Reset</description>
              <bitOffset>0x19</bitOffset>
              <bitWidth>1</bitWidth>
              <access>write-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>FR_0</name>
                  <description>No effect.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FR_1</name>
                  <description>FIFO reset.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BCE</name>
              <description>Bit Clock Enable</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>BCE_0</name>
                  <description>Receive bit clock is disabled.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BCE_1</name>
                  <description>Receive bit clock is enabled.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DBGE</name>
              <description>Debug Enable</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DBGE_0</name>
                  <description>Receiver is disabled in Debug mode, after completing the current frame.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DBGE_1</name>
                  <description>Receiver is enabled in Debug mode.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>STOPE</name>
              <description>Stop Enable</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>STOPE_0</name>
                  <description>Receiver disabled in Stop mode.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>STOPE_1</name>
                  <description>Receiver enabled in Stop mode.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RE</name>
              <description>Receiver Enable</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RE_0</name>
                  <description>Receiver is disabled.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RE_1</name>
                  <description>Receiver is enabled, or receiver has been disabled and has not yet reached end of frame.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>RCR1</name>
          <description>SAI Receive Configuration 1 Register</description>
          <addressOffset>0x84</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RFW</name>
              <description>Receive FIFO Watermark</description>
              <bitOffset>0</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>RCR2</name>
          <description>SAI Receive Configuration 2 Register</description>
          <addressOffset>0x88</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DIV</name>
              <description>Bit Clock Divide</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BCD</name>
              <description>Bit Clock Direction</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>BCD_0</name>
                  <description>Bit clock is generated externally in Slave mode.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BCD_1</name>
                  <description>Bit clock is generated internally in Master mode.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BCP</name>
              <description>Bit Clock Polarity</description>
              <bitOffset>0x19</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>BCP_0</name>
                  <description>Bit Clock is active high with drive outputs on rising edge and sample inputs on falling edge.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BCP_1</name>
                  <description>Bit Clock is active low with drive outputs on falling edge and sample inputs on rising edge.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>MSEL</name>
              <description>MCLK Select</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>MSEL_0</name>
                  <description>Bus Clock selected.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MSEL_1</name>
                  <description>Master Clock (MCLK) 1 option selected.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MSEL_2</name>
                  <description>Master Clock (MCLK) 2 option selected.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MSEL_3</name>
                  <description>Master Clock (MCLK) 3 option selected.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BCI</name>
              <description>Bit Clock Input</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>BCI_0</name>
                  <description>No effect.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BCI_1</name>
                  <description>Internal logic is clocked as if bit clock was externally generated.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BCS</name>
              <description>Bit Clock Swap</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>BCS_0</name>
                  <description>Use the normal bit clock source.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BCS_1</name>
                  <description>Swap the bit clock source.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SYNC</name>
              <description>Synchronous Mode</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SYNC_0</name>
                  <description>Asynchronous mode.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SYNC_1</name>
                  <description>Synchronous with transmitter.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>RCR3</name>
          <description>SAI Receive Configuration 3 Register</description>
          <addressOffset>0x8C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>WDFL</name>
              <description>Word Flag Configuration</description>
              <bitOffset>0</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RCE</name>
              <description>Receive Channel Enable</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RCE_0</name>
                  <description>Receive data channel N is disabled.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RCE_1</name>
                  <description>Receive data channel N is enabled.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>RCR4</name>
          <description>SAI Receive Configuration 4 Register</description>
          <addressOffset>0x90</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>FSD</name>
              <description>Frame Sync Direction</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>FSD_0</name>
                  <description>Frame Sync is generated externally in Slave mode.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FSD_1</name>
                  <description>Frame Sync is generated internally in Master mode.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>FSP</name>
              <description>Frame Sync Polarity</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>FSP_0</name>
                  <description>Frame sync is active high.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FSP_1</name>
                  <description>Frame sync is active low.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>FSE</name>
              <description>Frame Sync Early</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>FSE_0</name>
                  <description>Frame sync asserts with the first bit of the frame.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FSE_1</name>
                  <description>Frame sync asserts one bit before the first bit of the frame.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>MF</name>
              <description>MSB First</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>MF_0</name>
                  <description>LSB is received first.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MF_1</name>
                  <description>MSB is received first.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SYWD</name>
              <description>Sync Width</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>FRSZ</name>
              <description>Frame Size</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>RCR5</name>
          <description>SAI Receive Configuration 5 Register</description>
          <addressOffset>0x94</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>FBT</name>
              <description>First Bit Shifted</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>W0W</name>
              <description>Word 0 Width</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>WNW</name>
              <description>Word N Width</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>RDR</name>
          <description>SAI Receive Data Register</description>
          <addressOffset>0xA0</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RDR</name>
              <description>Receive Data Register</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>RFR</name>
          <description>SAI Receive FIFO Register</description>
          <addressOffset>0xC0</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RFP</name>
              <description>Read FIFO Pointer</description>
              <bitOffset>0</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>WFP</name>
              <description>Write FIFO Pointer</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>RMR</name>
          <description>SAI Receive Mask Register</description>
          <addressOffset>0xE0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RWM</name>
              <description>Receive Word Mask</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RWM_0</name>
                  <description>Word N is enabled.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RWM_1</name>
                  <description>Word N is masked.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
      </registers>
    </peripheral>
    <peripheral derivedFrom="I2S1">
      <name>I2S2</name>
      <description>Inter-IC Sound / Synchronous Audio Interface</description>
      <groupName>I2S</groupName>
      <prependToName>I2S2_</prependToName>
      <baseAddress>0x202C000</baseAddress>
      <addressBlock>
        <offset>0</offset>
        <size>0xE4</size>
        <usage>registers</usage>
      </addressBlock>
      <interrupt>
        <name>SAI2</name>
        <value>130</value>
      </interrupt>
    </peripheral>
    <peripheral derivedFrom="I2S1">
      <name>I2S3</name>
      <description>Inter-IC Sound / Synchronous Audio Interface</description>
      <groupName>I2S</groupName>
      <prependToName>I2S3_</prependToName>
      <baseAddress>0x2030000</baseAddress>
      <addressBlock>
        <offset>0</offset>
        <size>0xE4</size>
        <usage>registers</usage>
      </addressBlock>
      <interrupt>
        <name>SAI3_RX</name>
        <value>56</value>
      </interrupt>
      <interrupt>
        <name>SAI3_TX</name>
        <value>57</value>
      </interrupt>
    </peripheral>
    <peripheral>
      <name>ASRC</name>
      <description>ASRC Registers</description>
      <groupName>ASRC</groupName>
      <prependToName>ASRC_</prependToName>
      <baseAddress>0x2034000</baseAddress>
      <addressBlock>
        <offset>0</offset>
        <size>0xCC</size>
        <usage>registers</usage>
      </addressBlock>
      <interrupt>
        <name>ASRC</name>
        <value>82</value>
      </interrupt>
      <registers>
        <register>
          <name>ASRCTR</name>
          <description>ASRC Control Register</description>
          <addressOffset>0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ASRCEN</name>
              <description>ASRC Enable Enable the operation of ASRC.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ASREA</name>
              <description>ASRC Enable A Enable the operation of the conversion A of ASRC</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ASREB</name>
              <description>ASRC Enable B Enable the operation of the conversion B of ASRC</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ASREC</name>
              <description>ASRC Enable C Enable the operation of the conversion C of ASRC</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SRST</name>
              <description>Software Reset This bit is self-clear bit</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>write-only</access>
            </field>
            <field>
              <name>IDRA</name>
              <description>Use Ideal Ratio for Pair A When USRA=0, this bit has no usage</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>USRA</name>
              <description>Use Ratio for Pair A Use ratio as the input to ASRC</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>IDRB</name>
              <description>Use Ideal Ratio for Pair B When USRB=0, this bit has no usage</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>USRB</name>
              <description>Use Ratio for Pair B Use ratio as the input to ASRC</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>IDRC</name>
              <description>Use Ideal Ratio for Pair C When USRC=0, this bit has no usage</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>USRC</name>
              <description>Use Ratio for Pair C Use ratio as the input to ASRC</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ATSA</name>
              <description>ASRC Pair A Automatic Selection For Processing Options When this bit is 1, pair A will automatic update its pre-processing and post-processing options (ASRCFG: PREMODA, ASRCFG:POSTMODA see ASRC Misc Control Register 1 for Pair CASRC Filter Configuration Status Register ) based on the frequencies it detected</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ATSB</name>
              <description>ASRC Pair B Automatic Selection For Processing Options When this bit is 1, pair B will automatic update its pre-processing and post-processing options (ASRCFG: PREMODB, ASRCFG:POSTMODB see ASRC Misc Control Register 1 for Pair CASRC Filter Configuration Status Register ) based on the frequencies it detected</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ATSC</name>
              <description>ASRC Pair C Automatic Selection For Processing Options When this bit is 1, pair C will automatic update its pre-processing and post-processing options (ASRCFG: PREMODC, ASRCFG:POSTMODC see ASRC Misc Control Register 1 for Pair CASRC Filter Configuration Status Register ) based on the frequencies it detected</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ASRIER</name>
          <description>ASRC Interrupt Enable Register</description>
          <addressOffset>0x4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ADIEA</name>
              <description>Data Input A Interrupt Enable Enables the data input A Interrupt.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ADIEA_0</name>
                  <description>interrupt disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ADIEA_1</name>
                  <description>interrupt enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ADIEB</name>
              <description>Data Input B Interrupt Enable Enables the data input B interrupt.</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ADIEB_0</name>
                  <description>interrupt disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ADIEB_1</name>
                  <description>interrupt enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ADIEC</name>
              <description>Data Input C Interrupt Enable Enables the data input C interrupt.</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ADIEC_0</name>
                  <description>interrupt disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ADIEC_1</name>
                  <description>interrupt enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ADOEA</name>
              <description>Data Output A Interrupt Enable Enables the data output A interrupt.</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ADOEA_0</name>
                  <description>interrupt disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ADOEA_1</name>
                  <description>interrupt enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ADOEB</name>
              <description>Data Output B Interrupt Enable Enables the data output B interrupt.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ADOEB_0</name>
                  <description>interrupt disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ADOEB_1</name>
                  <description>interrupt enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ADOEC</name>
              <description>Data Output C Interrupt Enable Enables the data output C interrupt.</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ADOEC_0</name>
                  <description>interrupt disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ADOEC_1</name>
                  <description>interrupt enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>AOLIE</name>
              <description>Overload Interrupt Enable Enables the overload interrupt.</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>AOLIE_0</name>
                  <description>interrupt disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AOLIE_1</name>
                  <description>interrupt enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>AFPWE</name>
              <description>FP in Wait State Interrupt Enable Enables the FP in wait state interrupt.</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>AFPWE_0</name>
                  <description>interrupt disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AFPWE_1</name>
                  <description>interrupt enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>ASRCNCR</name>
          <description>ASRC Channel Number Configuration Register</description>
          <addressOffset>0xC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ANCA</name>
              <description>Number of A Channels</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ANCA_0</name>
                  <description>0 channels in A (Pair A is disabled)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ANCA_1</name>
                  <description>1 channel in A</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ANCA_2</name>
                  <description>2 channels in A</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ANCA_3</name>
                  <description>3 channels in A</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ANCA_4</name>
                  <description>4 channels in A</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ANCA_5</name>
                  <description>5 channels in A</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ANCA_6</name>
                  <description>6 channels in A</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ANCA_7</name>
                  <description>7 channels in A</description>
                  <value>0x7</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ANCA_8</name>
                  <description>8 channels in A</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ANCA_9</name>
                  <description>9 channels in A</description>
                  <value>0x9</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ANCA_10</name>
                  <description>10 channels in A</description>
                  <value>0xA</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ANCB</name>
              <description>Number of B Channels</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ANCB_0</name>
                  <description>0 channels in B (Pair B is disabled)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ANCB_1</name>
                  <description>1 channel in B</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ANCB_2</name>
                  <description>2 channels in B</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ANCB_3</name>
                  <description>3 channels in B</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ANCB_4</name>
                  <description>4 channels in B</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ANCB_5</name>
                  <description>5 channels in B</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ANCB_6</name>
                  <description>6 channels in B</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ANCB_7</name>
                  <description>7 channels in B</description>
                  <value>0x7</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ANCB_8</name>
                  <description>8 channels in B</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ANCB_9</name>
                  <description>9 channels in B</description>
                  <value>0x9</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ANCB_10</name>
                  <description>10 channels in B</description>
                  <value>0xA</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ANCC</name>
              <description>Number of C ChannelsANCC+ANCB+ANCA&lt;=10</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ANCC_0</name>
                  <description>0 channels in C (Pair C is disabled)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ANCC_1</name>
                  <description>1 channel in C</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ANCC_2</name>
                  <description>2 channels in C</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ANCC_3</name>
                  <description>3 channels in C</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ANCC_4</name>
                  <description>4 channels in C</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ANCC_5</name>
                  <description>5 channels in C</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ANCC_6</name>
                  <description>6 channels in C</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ANCC_7</name>
                  <description>7 channels in C</description>
                  <value>0x7</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ANCC_8</name>
                  <description>8 channels in C</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ANCC_9</name>
                  <description>9 channels in C</description>
                  <value>0x9</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ANCC_10</name>
                  <description>10 channels in C</description>
                  <value>0xA</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>ASRCFG</name>
          <description>ASRC Filter Configuration Status Register</description>
          <addressOffset>0x10</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>PREMODA</name>
              <description>Pre-Processing Configuration for Conversion Pair A These bits will be read/write by user if ASRCTR:ATSA=0, and can also be automatically updated by the ASRC internal logic if ASRCTR:ATSA=1 (see ASRC Misc Control Register 1 for Pair CASRC Control Register )</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PREMODA_0</name>
                  <description>Select Upsampling-by-2 as defined in Signal processing flowBy flowing through different processing branches and different setups of the pre-filter, this ASRC scheme can be used to handle different rate conversion requirements.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PREMODA_1</name>
                  <description>Select Direct-Connection as defined in Signal processing flowBy flowing through different processing branches and different setups of the pre-filter, this ASRC scheme can be used to handle different rate conversion requirements.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PREMODA_2</name>
                  <description>Select Downsampling-by-2 as defined in Signal processing flowBy flowing through different processing branches and different setups of the pre-filter, this ASRC scheme can be used to handle different rate conversion requirements.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PREMODA_3</name>
                  <description>Select passthrough mode. In this case, POSTMODA[1-0] have no use.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>POSTMODA</name>
              <description>Post-Processing Configuration for Conversion Pair A These bits will be read/write by user if ASRCTR:ATSA=0, and can also be automatically updated by the ASRC internal logic if ASRCTR:ATSA=1 (see ASRC Misc Control Register 1 for Pair CASRC Control Register )</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>POSTMODA_0</name>
                  <description>Select Upsampling-by-2 as defined in Signal processing flowBy flowing through different processing branches and different setups of the pre-filter, this ASRC scheme can be used to handle different rate conversion requirements.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>POSTMODA_1</name>
                  <description>Select Direct-Connection as defined in Signal processing flowBy flowing through different processing branches and different setups of the pre-filter, this ASRC scheme can be used to handle different rate conversion requirements.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>POSTMODA_2</name>
                  <description>Select Downsampling-by-2 as defined in Signal processing flowBy flowing through different processing branches and different setups of the pre-filter, this ASRC scheme can be used to handle different rate conversion requirements.</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PREMODB</name>
              <description>Pre-Processing Configuration for Conversion Pair B These bits will be read/write by user if ASRCTR:ATSB=0, and can also be automatically updated by the ASRC internal logic if ASRCTR:ATSB=1 (see ASRC Misc Control Register 1 for Pair CASRC Control Register )</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PREMODB_0</name>
                  <description>Select Upsampling-by-2 as defined in Signal processing flowBy flowing through different processing branches and different setups of the pre-filter, this ASRC scheme can be used to handle different rate conversion requirements.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PREMODB_1</name>
                  <description>Select Direct-Connection as defined in Signal processing flowBy flowing through different processing branches and different setups of the pre-filter, this ASRC scheme can be used to handle different rate conversion requirements.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PREMODB_2</name>
                  <description>Select Downsampling-by-2 as defined in Signal processing flowBy flowing through different processing branches and different setups of the pre-filter, this ASRC scheme can be used to handle different rate conversion requirements.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PREMODB_3</name>
                  <description>Select passthrough mode. In this case, POSTMODB[1-0] have no use.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>POSTMODB</name>
              <description>Post-Processing Configuration for Conversion Pair B These bits will be read/write by user if ASRCTR:ATSB=0, and can also be automatically updated by the ASRC internal logic if ASRCTR:ATSB=1 (see ASRC Misc Control Register 1 for Pair CASRC Control Register )</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>POSTMODB_0</name>
                  <description>Select Upsampling-by-2 as defined in Signal processing flowBy flowing through different processing branches and different setups of the pre-filter, this ASRC scheme can be used to handle different rate conversion requirements.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>POSTMODB_1</name>
                  <description>Select Direct-Connection as defined in Signal processing flowBy flowing through different processing branches and different setups of the pre-filter, this ASRC scheme can be used to handle different rate conversion requirements.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>POSTMODB_2</name>
                  <description>Select Downsampling-by-2 as defined in Signal processing flowBy flowing through different processing branches and different setups of the pre-filter, this ASRC scheme can be used to handle different rate conversion requirements.</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PREMODC</name>
              <description>Pre-Processing Configuration for Conversion Pair C These bits will be read/write by user if ASRCTR:ATSC=0, and can also be automatically updated by the ASRC internal logic if ASRCTR:ATSC=1 (see ASRC Misc Control Register 1 for Pair CASRC Control Register )</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PREMODC_0</name>
                  <description>Select Upsampling-by-2 as defined in Signal processing flowBy flowing through different processing branches and different setups of the pre-filter, this ASRC scheme can be used to handle different rate conversion requirements.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PREMODC_1</name>
                  <description>Select Direct-Connection as defined in Signal processing flowBy flowing through different processing branches and different setups of the pre-filter, this ASRC scheme can be used to handle different rate conversion requirements.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PREMODC_2</name>
                  <description>Select Downsampling-by-2 as defined in Signal processing flowBy flowing through different processing branches and different setups of the pre-filter, this ASRC scheme can be used to handle different rate conversion requirements.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PREMODC_3</name>
                  <description>Select passthrough mode. In this case, POSTMODC[1-0] have no use.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>POSTMODC</name>
              <description>Post-Processing Configuration for Conversion Pair C These bits will be read/write by user if ASRCTR:ATSC=0, and can also be automatically updated by the ASRC internal logic if ASRCTR:ATSC=1 (see ASRC Misc Control Register 1 for Pair CASRC Control Register )</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>POSTMODC_0</name>
                  <description>Select Upsampling-by-2 as defined in Signal Processing Flow.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>POSTMODC_1</name>
                  <description>Select Direct-Connection as defined in Signal Processing Flow.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>POSTMODC_2</name>
                  <description>Select Downsampling-by-2 as defined in Signal Processing Flow.</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>NDPRA</name>
              <description>Not Use Default Parameters for RAM-stored Parameters For Conversion Pair A</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NDPRA_0</name>
                  <description>Use default parameters for RAM-stored parameters. Override any parameters already in RAM.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NDPRA_1</name>
                  <description>Don't use default parameters for RAM-stored parameters. Use the parameters already stored in RAM.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>NDPRB</name>
              <description>Not Use Default Parameters for RAM-stored Parameters For Conversion Pair B</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NDPRB_0</name>
                  <description>Use default parameters for RAM-stored parameters. Override any parameters already in RAM.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NDPRB_1</name>
                  <description>Don't use default parameters for RAM-stored parameter. Use the parameters already stored in RAM.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>NDPRC</name>
              <description>Not Use Default Parameters for RAM-stored Parameters For Conversion Pair C</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NDPRC_0</name>
                  <description>Use default parameters for RAM-stored parameters. Override any parameters already in RAM.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NDPRC_1</name>
                  <description>Don't use default parameters for RAM-stored parameters. Use the parameters already stored in RAM.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>INIRQA</name>
              <description>Initialization for Conversion Pair A is served When this bit is 1, it means the initialization for conversion pair A is served</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>INIRQB</name>
              <description>Initialization for Conversion Pair B is served When this bit is 1, it means the initialization for conversion pair B is served</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>INIRQC</name>
              <description>Initialization for Conversion Pair C is served When this bit is 1, it means the initialization for conversion pair C is served</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ASRCSR</name>
          <description>ASRC Clock Source Register</description>
          <addressOffset>0x14</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>AICSA</name>
              <description>Input Clock Source A</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>AICSA_0</name>
                  <description>bit clock 0</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AICSA_1</name>
                  <description>bit clock 1</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AICSA_2</name>
                  <description>bit clock 2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AICSA_3</name>
                  <description>bit clock 3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AICSA_4</name>
                  <description>bit clock 4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AICSA_5</name>
                  <description>bit clock 5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AICSA_6</name>
                  <description>bit clock 6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AICSA_7</name>
                  <description>bit clock 7</description>
                  <value>0x7</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AICSA_8</name>
                  <description>bit clock 8</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AICSA_9</name>
                  <description>bit clock 9</description>
                  <value>0x9</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AICSA_10</name>
                  <description>bit clock A</description>
                  <value>0xA</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AICSA_11</name>
                  <description>bit clock B</description>
                  <value>0xB</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AICSA_12</name>
                  <description>bit clock C</description>
                  <value>0xC</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AICSA_13</name>
                  <description>bit clock D</description>
                  <value>0xD</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AICSA_14</name>
                  <description>bit clock E</description>
                  <value>0xE</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AICSA_15</name>
                  <description>clock disabled, connected to zero</description>
                  <value>0xF</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>AICSB</name>
              <description>Input Clock Source B</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>AICSB_0</name>
                  <description>bit clock 0</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AICSB_1</name>
                  <description>bit clock 1</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AICSB_2</name>
                  <description>bit clock 2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AICSB_3</name>
                  <description>bit clock 3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AICSB_4</name>
                  <description>bit clock 4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AICSB_5</name>
                  <description>bit clock 5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AICSB_6</name>
                  <description>bit clock 6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AICSB_7</name>
                  <description>bit clock 7</description>
                  <value>0x7</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AICSB_8</name>
                  <description>bit clock 8</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AICSB_9</name>
                  <description>bit clock 9</description>
                  <value>0x9</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AICSB_10</name>
                  <description>bit clock A</description>
                  <value>0xA</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AICSB_11</name>
                  <description>bit clock B</description>
                  <value>0xB</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AICSB_12</name>
                  <description>bit clock C</description>
                  <value>0xC</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AICSB_13</name>
                  <description>bit clock D</description>
                  <value>0xD</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AICSB_14</name>
                  <description>bit clock E</description>
                  <value>0xE</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AICSB_15</name>
                  <description>clock disabled, connected to zero</description>
                  <value>0xF</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>AICSC</name>
              <description>Input Clock Source C</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>AICSC_0</name>
                  <description>bit clock 0</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AICSC_1</name>
                  <description>bit clock 1</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AICSC_2</name>
                  <description>bit clock 2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AICSC_3</name>
                  <description>bit clock 3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AICSC_4</name>
                  <description>bit clock 4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AICSC_5</name>
                  <description>bit clock 5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AICSC_6</name>
                  <description>bit clock 6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AICSC_7</name>
                  <description>bit clock 7</description>
                  <value>0x7</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AICSC_8</name>
                  <description>bit clock 8</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AICSC_9</name>
                  <description>bit clock 9</description>
                  <value>0x9</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AICSC_10</name>
                  <description>bit clock A</description>
                  <value>0xA</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AICSC_11</name>
                  <description>bit clock B</description>
                  <value>0xB</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AICSC_12</name>
                  <description>bit clock C</description>
                  <value>0xC</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AICSC_13</name>
                  <description>bit clock D</description>
                  <value>0xD</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AICSC_14</name>
                  <description>bit clock E</description>
                  <value>0xE</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AICSC_15</name>
                  <description>clock disabled, connected to zero</description>
                  <value>0xF</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>AOCSA</name>
              <description>Output Clock Source A</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>AOCSA_0</name>
                  <description>bit clock 0</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AOCSA_1</name>
                  <description>bit clock 1</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AOCSA_2</name>
                  <description>bit clock 2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AOCSA_3</name>
                  <description>bit clock 3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AOCSA_4</name>
                  <description>bit clock 4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AOCSA_5</name>
                  <description>bit clock 5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AOCSA_6</name>
                  <description>bit clock 6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AOCSA_7</name>
                  <description>bit clock 7</description>
                  <value>0x7</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AOCSA_8</name>
                  <description>bit clock 8</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AOCSA_9</name>
                  <description>bit clock 9</description>
                  <value>0x9</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AOCSA_10</name>
                  <description>bit clock A</description>
                  <value>0xA</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AOCSA_11</name>
                  <description>bit clock B</description>
                  <value>0xB</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AOCSA_12</name>
                  <description>bit clock C</description>
                  <value>0xC</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AOCSA_13</name>
                  <description>bit clock D</description>
                  <value>0xD</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AOCSA_14</name>
                  <description>bit clock E</description>
                  <value>0xE</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AOCSA_15</name>
                  <description>clock disabled, connected to zero</description>
                  <value>0xF</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>AOCSB</name>
              <description>Output Clock Source B</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>AOCSB_0</name>
                  <description>bit clock 0</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AOCSB_1</name>
                  <description>bit clock 1</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AOCSB_2</name>
                  <description>bit clock 2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AOCSB_3</name>
                  <description>bit clock 3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AOCSB_4</name>
                  <description>bit clock 4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AOCSB_5</name>
                  <description>bit clock 5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AOCSB_6</name>
                  <description>bit clock 6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AOCSB_7</name>
                  <description>bit clock 7</description>
                  <value>0x7</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AOCSB_8</name>
                  <description>bit clock 8</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AOCSB_9</name>
                  <description>bit clock 9</description>
                  <value>0x9</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AOCSB_10</name>
                  <description>bit clock A</description>
                  <value>0xA</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AOCSB_11</name>
                  <description>bit clock B</description>
                  <value>0xB</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AOCSB_12</name>
                  <description>bit clock C</description>
                  <value>0xC</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AOCSB_13</name>
                  <description>bit clock D</description>
                  <value>0xD</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AOCSB_14</name>
                  <description>bit clock E</description>
                  <value>0xE</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AOCSB_15</name>
                  <description>clock disabled, connected to zero</description>
                  <value>0xF</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>AOCSC</name>
              <description>Output Clock Source C</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>AOCSC_0</name>
                  <description>bit clock 0</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AOCSC_1</name>
                  <description>bit clock 1</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AOCSC_2</name>
                  <description>bit clock 2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AOCSC_3</name>
                  <description>bit clock 3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AOCSC_4</name>
                  <description>bit clock 4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AOCSC_5</name>
                  <description>bit clock 5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AOCSC_6</name>
                  <description>bit clock 6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AOCSC_7</name>
                  <description>bit clock 7</description>
                  <value>0x7</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AOCSC_8</name>
                  <description>bit clock 8</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AOCSC_9</name>
                  <description>bit clock 9</description>
                  <value>0x9</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AOCSC_10</name>
                  <description>bit clock A</description>
                  <value>0xA</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AOCSC_11</name>
                  <description>bit clock B</description>
                  <value>0xB</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AOCSC_12</name>
                  <description>bit clock C</description>
                  <value>0xC</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AOCSC_13</name>
                  <description>bit clock D</description>
                  <value>0xD</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AOCSC_14</name>
                  <description>bit clock E</description>
                  <value>0xE</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AOCSC_15</name>
                  <description>clock disabled, connected to zero</description>
                  <value>0xF</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>ASRCDR1</name>
          <description>ASRC Clock Divider Register 1</description>
          <addressOffset>0x18</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>AICPA</name>
              <description>Input Clock Prescaler A Specify the prescaling factor of the input prescaler A</description>
              <bitOffset>0</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>AICDA</name>
              <description>Input Clock Divider A Specify the divide ratio of the input clock divider A</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>AICPB</name>
              <description>Input Clock Prescaler B Specify the prescaling factor of the input prescaler B</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>AICDB</name>
              <description>Input Clock Divider B Specify the divide ratio of the input clock divider B</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>AOCPA</name>
              <description>Output Clock Prescaler A Specify the prescaling factor of the output prescaler A</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>AOCDA</name>
              <description>Output Clock Divider A Specify the divide ratio of the output clock divider A</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>AOCPB</name>
              <description>Output Clock Prescaler B Specify the prescaling factor of the output prescaler B</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>AOCDB</name>
              <description>Output Clock Divider B Specify the divide ratio of the output clock divider B</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ASRCDR2</name>
          <description>ASRC Clock Divider Register 2</description>
          <addressOffset>0x1C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>AICPC</name>
              <description>Input Clock Prescaler C Specify the prescaling factor of the input prescaler C</description>
              <bitOffset>0</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>AICDC</name>
              <description>Input Clock Divider C Specify the divide ratio of the input clock divider C</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>AOCPC</name>
              <description>Output Clock Prescaler C Specify the prescaling factor of the output prescaler C</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>AOCDC</name>
              <description>Output Clock Divider C Specify the divide ratio of the output clock divider C</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ASRSTR</name>
          <description>ASRC Status Register</description>
          <addressOffset>0x20</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>AIDEA</name>
              <description>Number of data in Input Data Buffer A is less than threshold When set, this bit indicates that number of data still available in ASRDIRA is less than threshold and the processor can write data to ASRDIRA</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>AIDEB</name>
              <description>Number of data in Input Data Buffer B is less than threshold When set, this bit indicates that number of data still available in ASRDIRB is less than threshold and the processor can write data to ASRDIRB</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>AIDEC</name>
              <description>Number of data in Input Data Buffer C is less than threshold When set, this bit indicates that number of data still available in ASRDIRC is less than threshold and the processor can write data to ASRDIRC</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>AODFA</name>
              <description>Number of data in Output Data Buffer A is greater than threshold When set, this bit indicates that number of data already existing in ASRDORA is greater than threshold and the processor can read data from ASRDORA</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>AODFB</name>
              <description>Number of data in Output Data Buffer B is greater than threshold When set, this bit indicates that number of data already existing in ASRDORB is greater than threshold and the processor can read data from ASRDORB</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>AODFC</name>
              <description>Number of data in Output Data Buffer C is greater than threshold When set, this bit indicates that number of data already existing in ASRDORC is greater than threshold and the processor can read data from ASRDORC</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>AOLE</name>
              <description>Overload Error Flag When set, this bit indicates that the task rate is too high for the ASRC to handle</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>FPWT</name>
              <description>FP is in wait states This bit is for debug only</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>AIDUA</name>
              <description>Input Data Buffer A has underflowed When set, this bit indicates that input data buffer A has underflowed</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>AIDUB</name>
              <description>Input Data Buffer B has underflowed When set, this bit indicates that input data buffer B has underflowed</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>AIDUC</name>
              <description>Input Data Buffer C has underflowed When set, this bit indicates that input data buffer C has underflowed</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>AODOA</name>
              <description>Output Data Buffer A has overflowed When set, this bit indicates that output data buffer A has overflowed</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>AODOB</name>
              <description>Output Data Buffer B has overflowed When set, this bit indicates that output data buffer B has overflowed</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>AODOC</name>
              <description>Output Data Buffer C has overflowed When set, this bit indicates that output data buffer C has overflowed</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>AIOLA</name>
              <description>Pair A Input Task Overload When set, this bit indicates that pair A input task is oveloaded</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>AIOLB</name>
              <description>Pair B Input Task Overload When set, this bit indicates that pair B input task is oveloaded</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>AIOLC</name>
              <description>Pair C Input Task Overload When set, this bit indicates that pair C input task is oveloaded</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>AOOLA</name>
              <description>Pair A Output Task Overload When set, this bit indicates that pair A output task is oveloaded</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>AOOLB</name>
              <description>Pair B Output Task Overload When set, this bit indicates that pair B output task is oveloaded</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>AOOLC</name>
              <description>Pair C Output Task Overload When set, this bit indicates that pair C output task is oveloaded</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>ATQOL</name>
              <description>Task Queue FIFO overload When set, this bit indicates that task queue FIFO logic is oveloaded</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>DSLCNT</name>
              <description>DSL Counter Input to FIFO ready When set, this bit indicates that new DSL counter information is stored in the internal ASRC FIFO</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <dim>5</dim>
          <dimIncrement>0x4</dimIncrement>
          <dimIndex>1,2,3,4,5</dimIndex>
          <name>ASRPMn%s</name>
          <description>ASRC Parameter Register n</description>
          <addressOffset>0x40</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>PARAMETER_VALUE</name>
              <description>See recommended values table.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>24</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ASRTFR1</name>
          <description>ASRC ASRC Task Queue FIFO Register 1</description>
          <addressOffset>0x54</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TF_BASE</name>
              <description>Base address for task queue FIFO. Set to 0x7C.</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>7</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TF_FILL</name>
              <description>Current number of entries in task queue FIFO.</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>7</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ASRCCR</name>
          <description>ASRC Channel Counter Register</description>
          <addressOffset>0x5C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ACIA</name>
              <description>The channel counter for Pair A's input FIFO These bits stand for the current channel being accessed through shared peripheral bus for Pair A's input FIFO's usage</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ACIB</name>
              <description>The channel counter for Pair B's input FIFO These bits stand for the current channel being accessed through shared peripheral bus for Pair B's input FIFO's usage</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ACIC</name>
              <description>The channel counter for Pair C's input FIFO These bits stand for the current channel being accessed through shared peripheral bus for Pair C's input FIFO's usage</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ACOA</name>
              <description>The channel counter for Pair A's output FIFO These bits stand for the current channel being accessed through shared peripheral bus for Pair A's output FIFO's usage</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ACOB</name>
              <description>The channel counter for Pair B's output FIFO These bits stand for the current channel being accessed through shared peripheral bus for Pair B's output FIFO's usage</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ACOC</name>
              <description>The channel counter for Pair C's output FIFO These bits stand for the current channel being accessed through shared peripheral bus for Pair C's output FIFO's usage</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <dim>3</dim>
          <dimIncrement>0x8</dimIncrement>
          <dimIndex>A,B,C</dimIndex>
          <name>ASRDI%s</name>
          <description>ASRC Data Input Register for Pair x</description>
          <addressOffset>0x60</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA</name>
              <description>Audio data input</description>
              <bitOffset>0</bitOffset>
              <bitWidth>24</bitWidth>
              <access>write-only</access>
            </field>
          </fields>
        </register>
        <register>
          <dim>3</dim>
          <dimIncrement>0x8</dimIncrement>
          <dimIndex>A,B,C</dimIndex>
          <name>ASRDO%s</name>
          <description>ASRC Data Output Register for Pair x</description>
          <addressOffset>0x64</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA</name>
              <description>Audio data output</description>
              <bitOffset>0</bitOffset>
              <bitWidth>24</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ASRIDRHA</name>
          <description>ASRC Ideal Ratio for Pair A-High Part</description>
          <addressOffset>0x80</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>IDRATIOA</name>
              <description>IDRATIOA[31:24]. High part of ideal ratio value for pair A</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ASRIDRLA</name>
          <description>ASRC Ideal Ratio for Pair A -Low Part</description>
          <addressOffset>0x84</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>IDRATIOA</name>
              <description>IDRATIOA[23:0]. Low part of ideal ratio value for pair A</description>
              <bitOffset>0</bitOffset>
              <bitWidth>24</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ASRIDRHB</name>
          <description>ASRC Ideal Ratio for Pair B-High Part</description>
          <addressOffset>0x88</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>IDRATIOB</name>
              <description>IDRATIOB[31:24]. High part of ideal ratio value for pair B.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ASRIDRLB</name>
          <description>ASRC Ideal Ratio for Pair B-Low Part</description>
          <addressOffset>0x8C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>IDRATIOB</name>
              <description>IDRATIOB[23:0]. Low part of ideal ratio value for pair B.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>24</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ASRIDRHC</name>
          <description>ASRC Ideal Ratio for Pair C-High Part</description>
          <addressOffset>0x90</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>IDRATIOC</name>
              <description>IDRATIOC[31:24]. High part of ideal ratio value for pair C.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ASRIDRLC</name>
          <description>ASRC Ideal Ratio for Pair C-Low Part</description>
          <addressOffset>0x94</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>IDRATIOC</name>
              <description>IDRATIOC[23:0]. Low part of ideal ratio value for pair C.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>24</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ASR76K</name>
          <description>ASRC 76 kHz Period in terms of ASRC processing clock</description>
          <addressOffset>0x98</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0xA47</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ASR76K</name>
              <description>Value for the period of the 76 kHz sampling clock.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>17</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ASR56K</name>
          <description>ASRC 56 kHz Period in terms of ASRC processing clock</description>
          <addressOffset>0x9C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0xDF3</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ASR56K</name>
              <description>Value for the period of the 56 kHz sampling clock</description>
              <bitOffset>0</bitOffset>
              <bitWidth>17</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ASRMCRA</name>
          <description>ASRC Misc Control Register for Pair A</description>
          <addressOffset>0xA0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>INFIFO_THRESHOLDA</name>
              <description>The threshold for Pair A's input FIFO per channel These bits stand for the threshold for Pair A's input FIFO per channel</description>
              <bitOffset>0</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSYNOFA</name>
              <description>Re-sync Output FIFO Channel Counter If bit set, force ASRCCR:ACOA=0</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSYNIFA</name>
              <description>Re-sync Input FIFO Channel Counter If bit set, force ASRCCR:ACIA=0</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>OUTFIFO_THRESHOLDA</name>
              <description>The threshold for Pair A's output FIFO per channel These bits stand for the threshold for Pair A's output FIFO per channel</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYPASSPOLYA</name>
              <description>Bypass Polyphase Filtering for Pair A This bit will determine whether the polyphase filtering part of Pair A conversion will be bypassed</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>BYPASSPOLYA_0</name>
                  <description>Don't bypass polyphase filtering.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BYPASSPOLYA_1</name>
                  <description>Bypass polyphase filtering.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BUFSTALLA</name>
              <description>Stall Pair A conversion in case of Buffer Near Empty/Full Condition This bit will determine whether the near empty/full FIFO condition will stall the rate conversion for pair A</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>BUFSTALLA_0</name>
                  <description>Don't stall Pair A conversion even in case of near empty/full FIFO conditions.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BUFSTALLA_1</name>
                  <description>Stall Pair A conversion in case of near empty/full FIFO conditions.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>EXTTHRSHA</name>
              <description>Use external thresholds for FIFO control of Pair A This bit will determine whether the FIFO thresholds externally defined in this register is used to control ASRC internal FIFO logic for pair A</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>EXTTHRSHA_0</name>
                  <description>Use default thresholds.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>EXTTHRSHA_1</name>
                  <description>Use external defined thresholds.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ZEROBUFA</name>
              <description>Initialize buf of Pair A when pair A is enabled</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ZEROBUFA_0</name>
                  <description>Zeroize the buffer</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ZEROBUFA_1</name>
                  <description>Don't zeroize the buffer</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>ASRFSTA</name>
          <description>ASRC FIFO Status Register for Pair A</description>
          <addressOffset>0xA4</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>INFIFO_FILLA</name>
              <description>The fillings for Pair A's input FIFO per channel These bits stand for the fillings for Pair A's input FIFO per channel</description>
              <bitOffset>0</bitOffset>
              <bitWidth>7</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>IAEA</name>
              <description>Input FIFO is near Empty for Pair A This bit is to indicate whether the input FIFO of Pair A is near empty</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>OUTFIFO_FILLA</name>
              <description>The fillings for Pair A's output FIFO per channel These bits stand for the fillings for Pair A's output FIFO per channel</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>7</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>OAFA</name>
              <description>Output FIFO is near Full for Pair A This bit is to indicate whether the output FIFO of Pair A is near full</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ASRMCRB</name>
          <description>ASRC Misc Control Register for Pair B</description>
          <addressOffset>0xA8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>INFIFO_THRESHOLDB</name>
              <description>The threshold for Pair B's input FIFO per channel These bits stand for the threshold for Pair B's input FIFO per channel</description>
              <bitOffset>0</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSYNOFB</name>
              <description>Re-sync Output FIFO Channel Counter If bit set, force ASRCCR:ACOB=0</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSYNIFB</name>
              <description>Re-sync Input FIFO Channel Counter If bit set, force ASRCCR:ACIB=0</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>OUTFIFO_THRESHOLDB</name>
              <description>The threshold for Pair B's output FIFO per channel These bits stand for the threshold for Pair B's output FIFO per channel</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYPASSPOLYB</name>
              <description>Bypass Polyphase Filtering for Pair B This bit will determine whether the polyphase filtering part of Pair B conversion will be bypassed</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>BYPASSPOLYB_0</name>
                  <description>Don't bypass polyphase filtering.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BYPASSPOLYB_1</name>
                  <description>Bypass polyphase filtering.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BUFSTALLB</name>
              <description>Stall Pair B conversion in case of Buffer Near Empty/Full Condition This bit will determine whether the near empty/full FIFO condition will stall the rate conversion for pair B</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>BUFSTALLB_0</name>
                  <description>Don't stall Pair B conversion even in case of near empty/full FIFO conditions.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BUFSTALLB_1</name>
                  <description>Stall Pair B conversion in case of near empty/full FIFO conditions.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>EXTTHRSHB</name>
              <description>Use external thresholds for FIFO control of Pair B This bit will determine whether the FIFO thresholds externally defined in this register is used to control ASRC internal FIFO logic for pair B</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>EXTTHRSHB_0</name>
                  <description>Use default thresholds.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>EXTTHRSHB_1</name>
                  <description>Use external defined thresholds.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ZEROBUFB</name>
              <description>Initialize buf of Pair B when pair B is enabled This bit is used to control whether the buffer is to be zeroized when pair B is enabled</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ZEROBUFB_0</name>
                  <description>Zeroize the buffer</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ZEROBUFB_1</name>
                  <description>Don't zeroize the buffer</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>ASRFSTB</name>
          <description>ASRC FIFO Status Register for Pair B</description>
          <addressOffset>0xAC</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>INFIFO_FILLB</name>
              <description>The fillings for Pair B's input FIFO per channel These bits stand for the fillings for Pair B's input FIFO per channel</description>
              <bitOffset>0</bitOffset>
              <bitWidth>7</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>IAEB</name>
              <description>Input FIFO is near Empty for Pair B This bit is to indicate whether the input FIFO of Pair B is near empty</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>OUTFIFO_FILLB</name>
              <description>The fillings for Pair B's output FIFO per channel These bits stand for the fillings for Pair B's output FIFO per channel</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>7</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>OAFB</name>
              <description>Output FIFO is near Full for Pair B This bit is to indicate whether the output FIFO of Pair B is near full</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ASRMCRC</name>
          <description>ASRC Misc Control Register for Pair C</description>
          <addressOffset>0xB0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>INFIFO_THRESHOLDC</name>
              <description>The threshold for Pair C's input FIFO per channel These bits stand for the threshold for Pair C's input FIFO per channel</description>
              <bitOffset>0</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSYNOFC</name>
              <description>Re-sync Output FIFO Channel Counter If bit set, force ASRCCR:ACOC=0</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSYNIFC</name>
              <description>Re-sync Input FIFO Channel Counter If bit set, force ASRCCR:ACIC=0</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>OUTFIFO_THRESHOLDC</name>
              <description>The threshold for Pair C's output FIFO per channel These bits stand for the threshold for Pair C's output FIFO per channel</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYPASSPOLYC</name>
              <description>Bypass Polyphase Filtering for Pair C This bit will determine whether the polyphase filtering part of Pair C conversion will be bypassed</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>BYPASSPOLYC_0</name>
                  <description>Don't bypass polyphase filtering.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BYPASSPOLYC_1</name>
                  <description>Bypass polyphase filtering.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BUFSTALLC</name>
              <description>Stall Pair C conversion in case of Buffer Near Empty/Full Condition This bit will determine whether the near empty/full FIFO condition will stall the rate conversion for pair C</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>BUFSTALLC_0</name>
                  <description>Don't stall Pair C conversion even in case of near empty/full FIFO conditions.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BUFSTALLC_1</name>
                  <description>Stall Pair C conversion in case of near empty/full FIFO conditions.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>EXTTHRSHC</name>
              <description>Use external thresholds for FIFO control of Pair C This bit will determine whether the FIFO thresholds externally defined in this register is used to control ASRC internal FIFO logic for pair C</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>EXTTHRSHC_0</name>
                  <description>Use default thresholds.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>EXTTHRSHC_1</name>
                  <description>Use external defined thresholds.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ZEROBUFC</name>
              <description>Initialize buf of Pair C when pair C is enabled This bit is used to control whether the buffer is to be zeroized when pair C is enabled</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ZEROBUFC_0</name>
                  <description>Zeroize the buffer</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ZEROBUFC_1</name>
                  <description>Don't zeroize the buffer</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>ASRFSTC</name>
          <description>ASRC FIFO Status Register for Pair C</description>
          <addressOffset>0xB4</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>INFIFO_FILLC</name>
              <description>The fillings for Pair C's input FIFO per channel These bits stand for the fillings for Pair C's input FIFO per channel</description>
              <bitOffset>0</bitOffset>
              <bitWidth>7</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>IAEC</name>
              <description>Input FIFO is near Empty for Pair C This bit is to indicate whether the input FIFO of Pair C is near empty</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>OUTFIFO_FILLC</name>
              <description>The fillings for Pair C's output FIFO per channel These bits stand for the fillings for Pair C's output FIFO per channel</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>7</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>OAFC</name>
              <description>Output FIFO is near Full for Pair C This bit is to indicate whether the output FIFO of Pair C is near full</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <dim>3</dim>
          <dimIncrement>0x4</dimIncrement>
          <dimIndex>A,B,C</dimIndex>
          <name>ASRMCR1%s</name>
          <description>ASRC Misc Control Register 1 for Pair X</description>
          <addressOffset>0xC0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>OW16</name>
              <description>Bit Width Option of the output FIFO This bit will determine the bit width option of the output FIFO</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>OW16_0</name>
                  <description>24-bit output data.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>OW16_1</name>
                  <description>16-bit output data</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>OSGN</name>
              <description>Sign Extension Option of the output FIFO This bit will determine the sign extension option of the output FIFO</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>OSGN_0</name>
                  <description>No sign extension.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>OSGN_1</name>
                  <description>Sign extension.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>OMSB</name>
              <description>Data Alignment of the output FIFO This bit will determine the data alignment of the output FIFO.</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>OMSB_0</name>
                  <description>LSB aligned.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>OMSB_1</name>
                  <description>MSB aligned.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>IMSB</name>
              <description>Data Alignment of the input FIFO This bit will determine the data alignment of the input FIFO.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>IMSB_0</name>
                  <description>LSB aligned.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>IMSB_1</name>
                  <description>MSB aligned.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>IWD</name>
              <description>Data Width of the input FIFO These three bits will determine the bitwidth for the audio data into ASRC All other settings not shown are reserved</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
      </registers>
    </peripheral>
    <peripheral>
      <name>SPBA</name>
      <description>Temperature Monitor</description>
      <groupName>SPBA</groupName>
      <prependToName>SPBA_</prependToName>
      <baseAddress>0x203C000</baseAddress>
      <addressBlock>
        <offset>0</offset>
        <size>0x80</size>
        <usage>registers</usage>
      </addressBlock>
      <registers>
        <register>
          <dim>32</dim>
          <dimIncrement>0x4</dimIncrement>
          <name>PRR%s</name>
          <description>Peripheral Rights Register</description>
          <addressOffset>0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x7</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RARA</name>
              <description>Resource Access Right</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PROHIBITED</name>
                  <description>Access to peripheral is not allowed.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALLOWED</name>
                  <description>Access to peripheral is granted.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RARB</name>
              <description>Resource Access Right</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PROHIBITED</name>
                  <description>Access to peripheral is not allowed.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALLOWED</name>
                  <description>Access to peripheral is granted.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RARC</name>
              <description>Resource Access Right</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PROHIBITED</name>
                  <description>Access to peripheral is not allowed.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALLOWED</name>
                  <description>Access to peripheral is granted.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ROI</name>
              <description>Resource Owner ID</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>UNOWNED</name>
                  <description>Unowned resource.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MASTER_A</name>
                  <description>The resource is owned by master A port.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MASTER_B</name>
                  <description>The resource is owned by master B port.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MASTER_C</name>
                  <description>The resource is owned by master C port.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RMO</name>
              <description>Requesting Master Owner</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>UNOWNED</name>
                  <description>The resource is unowned.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ANOTHER_MASTER</name>
                  <description>The resource is owned by another master.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REQUESTING_MASTER</name>
                  <description>The resource is owned by the requesting master.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
      </registers>
    </peripheral>
    <peripheral>
      <name>TSC</name>
      <description>Touch Screen Controller</description>
      <groupName>TSC</groupName>
      <prependToName>TSC_</prependToName>
      <baseAddress>0x2040000</baseAddress>
      <addressBlock>
        <offset>0</offset>
        <size>0x84</size>
        <usage>registers</usage>
      </addressBlock>
      <interrupt>
        <name>TSC</name>
        <value>35</value>
      </interrupt>
      <registers>
        <register>
          <name>BASIC_SETTING</name>
          <description>PS Input Buffer Address</description>
          <addressOffset>0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>AUTO_MEASURE</name>
              <description>Auto Measure</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>AUTO_MEASURE_0</name>
                  <description>Disable Auto Measure</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AUTO_MEASURE_1</name>
                  <description>Auto Measure</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>_4_5_WIRE</name>
              <description>4/5 Wire detection</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>_4_5_WIRE_0</name>
                  <description>4-Wire Detection Mode</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>_4_5_WIRE_1</name>
                  <description>5-Wire Detection Mode</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>MEASURE_DELAY_TIME</name>
              <description>Measure Delay Time</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>24</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>PS_INPUT_BUFFER_ADDR</name>
          <description>PS Input Buffer Address</description>
          <addressOffset>0x10</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>PRE_CHARGE_TIME</name>
              <description>Auto Measure</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PRE_CHARGE_TIME_0</name>
                  <description>Disable Auto Measure</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PRE_CHARGE_TIME_1</name>
                  <description>Auto Measure</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>FLOW_CONTROL</name>
          <description>Flow Control</description>
          <addressOffset>0x20</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SW_RST</name>
              <description>Soft Reset</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>START_MEASURE</name>
              <description>Start Measure</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>START_MEASURE_0</name>
                  <description>Do not start measure for now</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>START_MEASURE_1</name>
                  <description>Start measure the X/Y coordinate value</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DROP_MEASURE</name>
              <description>Drop Measure</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DROP_MEASURE_0</name>
                  <description>Do not drop measure for now</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DROP_MEASURE_1</name>
                  <description>Drop the measure and controller return to idle status</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>START_SENSE</name>
              <description>Start Sense</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>START_SENSE_0</name>
                  <description>Stay at idle status</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>START_SENSE_1</name>
                  <description>Start sense detection and (if auto_measure set to 1) measure after detect a touch</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DISABLE</name>
              <description>This bit is for SW disable registers</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLE_0</name>
                  <description>Leave HW state machine control</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DISABLE_1</name>
                  <description>SW set to idle status</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>MEASEURE_VALUE</name>
          <description>Measure Value</description>
          <addressOffset>0x30</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>Y_VALUE</name>
              <description>Y Value</description>
              <bitOffset>0</bitOffset>
              <bitWidth>12</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>X_VALUE</name>
              <description>X Value</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>12</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>INT_EN</name>
          <description>Interrupt Enable</description>
          <addressOffset>0x40</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MEASURE_INT_EN</name>
              <description>Measure Interrupt Enable</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>MEASURE_INT_EN_0</name>
                  <description>Disable measure</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DETECT_INT_EN</name>
              <description>Detect Interrupt Enable</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DETECT_INT_EN_0</name>
                  <description>Disable detect interrupt</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DETECT_INT_EN_1</name>
                  <description>Enable detect interrupt</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>IDLE_SW_INT_EN</name>
              <description>Idle Software Interrupt Enable</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>IDLE_SW_INT_EN_0</name>
                  <description>Disable idle software interrupt</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>IDLE_SW_INT_EN_1</name>
                  <description>Enable idle software interrupt</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>INT_SIG_EN</name>
          <description>Interrupt Signal Enable</description>
          <addressOffset>0x50</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MEASURE_SIG_EN</name>
              <description>Measure Signal Enable</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DETECT_SIG_EN</name>
              <description>Detect Signal Enable</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DETECT_SIG_EN_0</name>
                  <description>Disable detect signal</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DETECT_SIG_EN_1</name>
                  <description>Enable detect signal</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>VALID_SIG_EN</name>
              <description>Valid Signal Enable</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>VALID_SIG_EN_0</name>
                  <description>Disable valid signal</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>VALID_SIG_EN_1</name>
                  <description>Enable valid signal</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>IDLE_SW_SIG_EN</name>
              <description>Idle Software Signal Enable</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>IDLE_SW_SIG_EN_0</name>
                  <description>Disable idle software signal</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>IDLE_SW_SIG_EN_1</name>
                  <description>Enable idle software signal</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>INT_STATUS</name>
          <description>Intterrupt Status</description>
          <addressOffset>0x60</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MEASURE</name>
              <description>Measure Signal</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>MEASURE_0</name>
                  <description>Does not exist a measure signal</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MEASURE_1</name>
                  <description>Exist a measure signal</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DETECT</name>
              <description>Detect Signal</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DETECT_0</name>
                  <description>Does not exist a detect signal</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DETECT_1</name>
                  <description>Exist detect signal</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>VALID</name>
              <description>Valid Signal</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>VALID_0</name>
                  <description>There is no touch detected after measurement, indicates that the measured value is not valid</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>VALID_1</name>
                  <description>There is touch detection after measurement, indicates that the measure is valid</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>IDLE_SW</name>
              <description>Idle Software</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>IDLE_SW_0</name>
                  <description>Haven't return to idle status</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>IDLE_SW_1</name>
                  <description>Already return to idle status</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>DEBUG_MODE</name>
          <description>no description available</description>
          <addressOffset>0x70</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ADC_CONV_VALUE</name>
              <description>ADC Conversion Value</description>
              <bitOffset>0</bitOffset>
              <bitWidth>12</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>ADC_COCO</name>
              <description>ADC COCO Signal</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>EXT_HWTS</name>
              <description>Hardware Trigger Select Signal</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TRIGGER</name>
              <description>Trigger</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TRIGGER_0</name>
                  <description>No hardware trigger signal</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TRIGGER_1</name>
                  <description>Hardware trigger signal, the signal must last at least 1 ips clock period</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ADC_COCO_CLEAR</name>
              <description>ADC Coco Clear</description>
              <bitOffset>0x19</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ADC_COCO_CLEAR_0</name>
                  <description>No ADC COCO clear</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ADC_COCO_CLEAR_1</name>
                  <description>Set ADC COCO clear</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ADC_COCO_CLEAR_DISABLE</name>
              <description>ADC COCO Clear Disable</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ADC_COCO_CLEAR_DISABLE_0</name>
                  <description>Allow TSC hardware generates ADC COCO clear</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ADC_COCO_CLEAR_DISABLE_1</name>
                  <description>Prevent TSC from generate ADC COCO clear signal</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DEBUG_EN</name>
              <description>Debug Enable</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DEBUG_EN_0</name>
                  <description>Enable debug mode</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DEBUG_EN_1</name>
                  <description>Disable debug mode</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>DEBUG_MODE2</name>
          <description>no description available</description>
          <addressOffset>0x80</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>XPUL_PULL_DOWN</name>
              <description>XPUL Wire Pull Down Switch</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>XPUL_PULL_DOWN_0</name>
                  <description>Close the switch</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>XPUL_PULL_DOWN_1</name>
                  <description>Open up the switch</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>XPUL_PULL_UP</name>
              <description>XPUL Wire Pull Up Switch</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>XPUL_PULL_UP_0</name>
                  <description>Close the switch</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>XPUL_PULL_UP_1</name>
                  <description>Open up the switch</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>XPUL_200K_PULL_UP</name>
              <description>XPUL Wire 200K Pull Up Switch</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>XPUL_200K_PULL_UP_0</name>
                  <description>Close the switch</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>XPUL_200K_PULL_UP_1</name>
                  <description>Open up the switch</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>XNUR_PULL_DOWN</name>
              <description>XNUR Wire Pull Down Switch</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>XNUR_PULL_DOWN_0</name>
                  <description>Close the switch</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>XNUR_PULL_DOWN_1</name>
                  <description>Open up the switch</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>XNUR_PULL_UP</name>
              <description>XNUR Wire Pull Up Switch</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>XNUR_PULL_UP_0</name>
                  <description>Close the switch</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>XNUR_PULL_UP_1</name>
                  <description>Open up the switch</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>XNUR_200K_PULL_UP</name>
              <description>XNUR Wire 200K Pull Up Switch</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>XNUR_200K_PULL_UP_0</name>
                  <description>Close the switch</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>XNUR_200K_PULL_UP_1</name>
                  <description>Open up the switch</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>YPLL_PULL_DOWN</name>
              <description>YPLL Wire Pull Down Switch</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>YPLL_PULL_DOWN_0</name>
                  <description>Close the switch</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>YPLL_PULL_DOWN_1</name>
                  <description>Open up the switch</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>YPLL_PULL_UP</name>
              <description>YPLL Wire Pull Up Switch</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>YPLL_PULL_UP_0</name>
                  <description>Close the switch</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>YPLL_PULL_UP_1</name>
                  <description>Open the switch</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>YPLL_200K_PULL_UP</name>
              <description>YPLL Wire 200K Pull Up Switch</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>YPLL_200K_PULL_UP_0</name>
                  <description>Close the switch</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>YPLL_200K_PULL_UP_1</name>
                  <description>Open up the switch</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>YNLR_PULL_DOWN</name>
              <description>YNLR Wire Pull Down Switch</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>YNLR_PULL_DOWN_0</name>
                  <description>Close the switch</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>YNLR_PULL_DOWN_1</name>
                  <description>Open up the switch</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>YNLR_PULL_UP</name>
              <description>YNLR Wire Pull Up Switch</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>YNLR_PULL_UP_0</name>
                  <description>Close the switch</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>YNLR_PULL_UP_1</name>
                  <description>Open up the switch</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>YNLR_200K_PULL_UP</name>
              <description>YNLR Wire 200K Pull Up Switch</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>YNLR_200K_PULL_UP_0</name>
                  <description>Close the switch</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>YNLR_200K_PULL_UP_1</name>
                  <description>Open up the switch</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WIPER_PULL_DOWN</name>
              <description>Wiper Wire Pull Down Switch</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>WIPER_PULL_DOWN_0</name>
                  <description>Close the switch</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WIPER_PULL_DOWN_1</name>
                  <description>Open up the switch</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WIPER_PULL_UP</name>
              <description>Wiper Wire Pull Up Switch</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>WIPER_PULL_UP_0</name>
                  <description>Close the switch</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WIPER_PULL_UP_1</name>
                  <description>Open up the switch</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WIPER_200K_PULL_UP</name>
              <description>Wiper Wire 200K Pull Up Switch</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>WIPER_200K_PULL_UP_0</name>
                  <description>Close the switch</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WIPER_200K_PULL_UP_1</name>
                  <description>Open up the switch</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DETECT_FOUR_WIRE</name>
              <description>Detect Four Wire</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DETECT_FOUR_WIRE_0</name>
                  <description>No detect signal</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DETECT_FOUR_WIRE_1</name>
                  <description>Yes, there is a detect on the touch screen.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DETECT_FIVE_WIRE</name>
              <description>Detect Five Wire</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DETECT_FIVE_WIRE_0</name>
                  <description>No detect signal</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DETECT_FIVE_WIRE_1</name>
                  <description>Yes, there is a detect on the touch screen.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>STATE_MACHINE</name>
              <description>State Machine</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>STATE_MACHINE_0</name>
                  <description>Idle</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>STATE_MACHINE_1</name>
                  <description>Pre-charge</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>STATE_MACHINE_2</name>
                  <description>Detect</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>STATE_MACHINE_3</name>
                  <description>X-measure</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>STATE_MACHINE_4</name>
                  <description>Y-measure</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>STATE_MACHINE_5</name>
                  <description>Pre-charge</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>STATE_MACHINE_6</name>
                  <description>Detect</description>
                  <value>0x6</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>INTERMEDIATE</name>
              <description>Intermediate State</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>INTERMEDIATE_0</name>
                  <description>Not in intermedia</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>INTERMEDIATE_1</name>
                  <description>Intermedia</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DETECT_ENABLE_FOUR_WIRE</name>
              <description>Detect Enable Four Wire</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DETECT_ENABLE_FOUR_WIRE_0</name>
                  <description>Do not read four wire detect value, read default value from analogue</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DETECT_ENABLE_FOUR_WIRE_1</name>
                  <description>Read four wire detect status from analogue</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DETECT_ENABLE_FIVE_WIRE</name>
              <description>Detect Enable Five Wire</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DETECT_ENABLE_FIVE_WIRE_0</name>
                  <description>Do not read five wire detect value, read default value from analogue</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DETECT_ENABLE_FIVE_WIRE_1</name>
                  <description>Read five wire detect status from analogue</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DE_GLITCH</name>
              <description>This field indicates glitch threshold</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DE_GLITCH_0</name>
                  <description>Normal function: 0x1fff ipg clock cycles; Low power mode: 0x9 low power clock cycles</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DE_GLITCH_1</name>
                  <description>Normal function: 0xfff ipg clock cycles; Low power mode: :0x7 low power clock cycles</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DE_GLITCH_2</name>
                  <description>Normal function: 0x7ff ipg clock cycles; Low power mode:0x5 low power clock cycles</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DE_GLITCH_3</name>
                  <description>Normal function: 0x3 ipg clock cycles; Low power mode:0x3 low power clock cycles</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
      </registers>
    </peripheral>
    <peripheral>
      <name>AIPSTZ1</name>
      <description>AIPSTZ Control Registers</description>
      <groupName>AIPSTZ</groupName>
      <prependToName>AIPSTZ1_</prependToName>
      <baseAddress>0x207C000</baseAddress>
      <headerStructName>AIPSTZ</headerStructName>
      <addressBlock>
        <offset>0</offset>
        <size>0x54</size>
        <usage>registers</usage>
      </addressBlock>
      <registers>
        <register>
          <name>MPR</name>
          <description>Master Priviledge Registers</description>
          <addressOffset>0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x77000000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MPROT5</name>
              <description>Master 5 Priviledge, Buffer, Read, Write Control.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>MPROT3</name>
              <description>Master 3 Priviledge, Buffer, Read, Write Control.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>MPROT2</name>
              <description>Master 2 Priviledge, Buffer, Read, Write Control</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>MPROT1</name>
              <description>Master 1 Priviledge, Buffer, Read, Write Control</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>MPROT0</name>
              <description>Master 0 Priviledge, Buffer, Read, Write Control</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>OPACR</name>
          <description>Off-Platform Peripheral Access Control Registers</description>
          <addressOffset>0x40</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x44444444</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>OPAC7</name>
              <description>Off-platform Peripheral Access Control 7</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>OPAC6</name>
              <description>Off-platform Peripheral Access Control 6</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>OPAC5</name>
              <description>Off-platform Peripheral Access Control 5</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>OPAC4</name>
              <description>Off-platform Peripheral Access Control 4</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>OPAC3</name>
              <description>Off-platform Peripheral Access Control 3</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>OPAC2</name>
              <description>Off-platform Peripheral Access Control 2</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>OPAC1</name>
              <description>Off-platform Peripheral Access Control 1</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>OPAC0</name>
              <description>Off-platform Peripheral Access Control 0</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>OPACR1</name>
          <description>Off-Platform Peripheral Access Control Registers</description>
          <addressOffset>0x44</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x44444444</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>OPAC15</name>
              <description>Off-platform Peripheral Access Control 15</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>OPAC14</name>
              <description>Off-platform Peripheral Access Control 14</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>OPAC13</name>
              <description>Off-platform Peripheral Access Control 13</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>OPAC12</name>
              <description>Off-platform Peripheral Access Control 12</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>OPAC11</name>
              <description>Off-platform Peripheral Access Control 11</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>OPAC10</name>
              <description>Off-platform Peripheral Access Control 10</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>OPAC9</name>
              <description>Off-platform Peripheral Access Control 9</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>OPAC8</name>
              <description>Off-platform Peripheral Access Control 8</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>OPACR2</name>
          <description>Off-Platform Peripheral Access Control Registers</description>
          <addressOffset>0x48</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x44444444</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>OPAC23</name>
              <description>Off-platform Peripheral Access Control 23</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>OPAC22</name>
              <description>Off-platform Peripheral Access Control 22</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>OPAC21</name>
              <description>Off-platform Peripheral Access Control 21</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>OPAC20</name>
              <description>Off-platform Peripheral Access Control 20</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>OPAC19</name>
              <description>Off-platform Peripheral Access Control 19</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>OPAC18</name>
              <description>Off-platform Peripheral Access Control 18</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>OPAC17</name>
              <description>Off-platform Peripheral Access Control 17</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>OPAC16</name>
              <description>Off-platform Peripheral Access Control 16</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>OPACR3</name>
          <description>Off-Platform Peripheral Access Control Registers</description>
          <addressOffset>0x4C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x44444444</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>OPAC31</name>
              <description>Off-platform Peripheral Access Control 31</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>OPAC30</name>
              <description>Off-platform Peripheral Access Control 30</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>OPAC29</name>
              <description>Off-platform Peripheral Access Control 29</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>OPAC28</name>
              <description>Off-platform Peripheral Access Control 28</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>OPAC27</name>
              <description>Off-platform Peripheral Access Control 27</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>OPAC26</name>
              <description>Off-platform Peripheral Access Control 26</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>OPAC25</name>
              <description>Off-platform Peripheral Access Control 25</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>OPAC24</name>
              <description>Off-platform Peripheral Access Control 24</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>OPACR4</name>
          <description>Off-Platform Peripheral Access Control Registers</description>
          <addressOffset>0x50</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x44444444</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>OPAC33</name>
              <description>Off-platform Peripheral Access Control 33</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>OPAC32</name>
              <description>Off-platform Peripheral Access Control 32</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
      </registers>
    </peripheral>
    <peripheral derivedFrom="AIPSTZ1">
      <name>AIPSTZ2</name>
      <description>AIPSTZ Control Registers</description>
      <groupName>AIPSTZ</groupName>
      <prependToName>AIPSTZ2_</prependToName>
      <baseAddress>0x217C000</baseAddress>
      <addressBlock>
        <offset>0</offset>
        <size>0x54</size>
        <usage>registers</usage>
      </addressBlock>
    </peripheral>
    <peripheral derivedFrom="AIPSTZ1">
      <name>AIPSTZ3</name>
      <description>AIPSTZ Control Registers</description>
      <groupName>AIPSTZ</groupName>
      <prependToName>AIPSTZ3_</prependToName>
      <baseAddress>0x227C000</baseAddress>
      <addressBlock>
        <offset>0</offset>
        <size>0x54</size>
        <usage>registers</usage>
      </addressBlock>
    </peripheral>
    <peripheral>
      <name>PWM1</name>
      <description>PWM</description>
      <groupName>PWM</groupName>
      <prependToName>PWM1_</prependToName>
      <baseAddress>0x2080000</baseAddress>
      <headerStructName>PWM</headerStructName>
      <addressBlock>
        <offset>0</offset>
        <size>0x18</size>
        <usage>registers</usage>
      </addressBlock>
      <interrupt>
        <name>PWM1</name>
        <value>115</value>
      </interrupt>
      <registers>
        <register>
          <name>PWMCR</name>
          <description>PWM Control Register</description>
          <addressOffset>0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>EN</name>
              <description>PWM Enable</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>EN_0</name>
                  <description>PWM disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>EN_1</name>
                  <description>PWM enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>REPEAT</name>
              <description>Sample Repeat</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>REPEAT_0</name>
                  <description>Use each sample once</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REPEAT_1</name>
                  <description>Use each sample twice</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REPEAT_2</name>
                  <description>Use each sample four times</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REPEAT_3</name>
                  <description>Use each sample eight times</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SWR</name>
              <description>Software Reset</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SWR_0</name>
                  <description>PWM is out of reset</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SWR_1</name>
                  <description>PWM is undergoing reset</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PRESCALER</name>
              <description>Counter Clock Prescaler Value</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>12</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PRESCALER_0</name>
                  <description>Divide by 1</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PRESCALER_1</name>
                  <description>Divide by 2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PRESCALER_4095</name>
                  <description>Divide by 4096</description>
                  <value>0xFFF</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CLKSRC</name>
              <description>Select Clock Source</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CLKSRC_0</name>
                  <description>Clock is off</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLKSRC_1</name>
                  <description>ipg_clk</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLKSRC_2</name>
                  <description>ipg_clk_highfreq</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLKSRC_3</name>
                  <description>ipg_clk_32k</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>POUTC</name>
              <description>PWM Output Configuration. This bit field determines the mode of PWM output on the output pin.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>POUTC_0</name>
                  <description>Output pin is set at rollover and cleared at comparison</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>POUTC_1</name>
                  <description>Output pin is cleared at rollover and set at comparison</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>POUTC_2</name>
                  <description>PWM output is disconnected</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>POUTC_3</name>
                  <description>PWM output is disconnected</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HCTR</name>
              <description>Half-word Data Swap Control</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HCTR_0</name>
                  <description>Half word swapping does not take place</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HCTR_1</name>
                  <description>Half words from write data bus are swapped</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BCTR</name>
              <description>Byte Data Swap Control</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>BCTR_0</name>
                  <description>byte ordering remains the same</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BCTR_1</name>
                  <description>byte ordering is reversed</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DBGEN</name>
              <description>Debug Mode Enable</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DBGEN_0</name>
                  <description>Inactive in debug mode</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DBGEN_1</name>
                  <description>Active in debug mode</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WAITEN</name>
              <description>Wait Mode Enable</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>WAITEN_0</name>
                  <description>Inactive in wait mode</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WAITEN_1</name>
                  <description>Active in wait mode</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DOZEN</name>
              <description>Doze Mode Enable</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DOZEN_0</name>
                  <description>Inactive in doze mode</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DOZEN_1</name>
                  <description>Active in doze mode</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>STOPEN</name>
              <description>Stop Mode Enable</description>
              <bitOffset>0x19</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>STOPEN_0</name>
                  <description>Inactive in stop mode</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>STOPEN_1</name>
                  <description>Active in stop mode</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>FWM</name>
              <description>FIFO Water Mark</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>FWM_0</name>
                  <description>FIFO empty flag is set when there are more than or equal to 1 empty slots in FIFO</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FWM_1</name>
                  <description>FIFO empty flag is set when there are more than or equal to 2 empty slots in FIFO</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FWM_2</name>
                  <description>FIFO empty flag is set when there are more than or equal to 3 empty slots in FIFO</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FWM_3</name>
                  <description>FIFO empty flag is set when there are more than or equal to 4 empty slots in FIFO</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>PWMSR</name>
          <description>PWM Status Register</description>
          <addressOffset>0x4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x8</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>FIFOAV</name>
              <description>FIFO Available</description>
              <bitOffset>0</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>FIFOAV_0</name>
                  <description>No data available</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FIFOAV_1</name>
                  <description>1 word of data in FIFO</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FIFOAV_2</name>
                  <description>2 words of data in FIFO</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FIFOAV_3</name>
                  <description>3 words of data in FIFO</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FIFOAV_4</name>
                  <description>4 words of data in FIFO</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FIFOAV_5</name>
                  <description>unused</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FIFOAV_6</name>
                  <description>unused</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FIFOAV_7</name>
                  <description>unused</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>FE</name>
              <description>FIFO Empty Status Bit</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
              <enumeratedValues>
                <enumeratedValue>
                  <name>FE_0</name>
                  <description>Data level is above water mark</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FE_1</name>
                  <description>When the data level falls below the mark set by FWM field</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ROV</name>
              <description>Roll-over Status. This bit shows that a roll-over event has occurred.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ROV_0</name>
                  <description>Roll-over event not occurred</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ROV_1</name>
                  <description>Roll-over event occurred</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CMP</name>
              <description>Compare Status. This bit shows that a compare event has occurred.</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CMP_0</name>
                  <description>Compare event not occurred</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CMP_1</name>
                  <description>Compare event occurred</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>FWE</name>
              <description>FIFO Write Error Status</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
              <enumeratedValues>
                <enumeratedValue>
                  <name>FWE_0</name>
                  <description>FIFO write error not occurred</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FWE_1</name>
                  <description>FIFO write error occurred</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>PWMIR</name>
          <description>PWM Interrupt Register</description>
          <addressOffset>0x8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>FIE</name>
              <description>FIFO Empty Interrupt Enable. This bit controls the generation of the FIFO Empty interrupt.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>FIE_0</name>
                  <description>FIFO Empty interrupt disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FIE_1</name>
                  <description>FIFO Empty interrupt enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RIE</name>
              <description>Roll-over Interrupt Enable. This bit controls the generation of the Rollover interrupt.</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RIE_0</name>
                  <description>Roll-over interrupt not enabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RIE_1</name>
                  <description>Roll-over Interrupt enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CIE</name>
              <description>Compare Interrupt Enable. This bit controls the generation of the Compare interrupt.</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CIE_0</name>
                  <description>Compare Interrupt not enabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CIE_1</name>
                  <description>Compare Interrupt enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>PWMSAR</name>
          <description>PWM Sample Register</description>
          <addressOffset>0xC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SAMPLE</name>
              <description>Sample Value</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>PWMPR</name>
          <description>PWM Period Register</description>
          <addressOffset>0x10</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0xFFFE</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>PERIOD</name>
              <description>Period Value</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>PWMCNR</name>
          <description>PWM Counter Register</description>
          <addressOffset>0x14</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>COUNT</name>
              <description>Counter Value</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
      </registers>
    </peripheral>
    <peripheral derivedFrom="PWM1">
      <name>PWM2</name>
      <description>PWM</description>
      <groupName>PWM</groupName>
      <prependToName>PWM2_</prependToName>
      <baseAddress>0x2084000</baseAddress>
      <addressBlock>
        <offset>0</offset>
        <size>0x18</size>
        <usage>registers</usage>
      </addressBlock>
      <interrupt>
        <name>PWM2</name>
        <value>116</value>
      </interrupt>
    </peripheral>
    <peripheral derivedFrom="PWM1">
      <name>PWM3</name>
      <description>PWM</description>
      <groupName>PWM</groupName>
      <prependToName>PWM3_</prependToName>
      <baseAddress>0x2088000</baseAddress>
      <addressBlock>
        <offset>0</offset>
        <size>0x18</size>
        <usage>registers</usage>
      </addressBlock>
      <interrupt>
        <name>PWM3</name>
        <value>117</value>
      </interrupt>
    </peripheral>
    <peripheral derivedFrom="PWM1">
      <name>PWM4</name>
      <description>PWM</description>
      <groupName>PWM</groupName>
      <prependToName>PWM4_</prependToName>
      <baseAddress>0x208C000</baseAddress>
      <addressBlock>
        <offset>0</offset>
        <size>0x18</size>
        <usage>registers</usage>
      </addressBlock>
      <interrupt>
        <name>PWM4</name>
        <value>118</value>
      </interrupt>
    </peripheral>
    <peripheral derivedFrom="PWM1">
      <name>PWM5</name>
      <description>PWM</description>
      <groupName>PWM</groupName>
      <prependToName>PWM5_</prependToName>
      <baseAddress>0x20F0000</baseAddress>
      <addressBlock>
        <offset>0</offset>
        <size>0x18</size>
        <usage>registers</usage>
      </addressBlock>
      <interrupt>
        <name>PWM5</name>
        <value>146</value>
      </interrupt>
    </peripheral>
    <peripheral derivedFrom="PWM1">
      <name>PWM6</name>
      <description>PWM</description>
      <groupName>PWM</groupName>
      <prependToName>PWM6_</prependToName>
      <baseAddress>0x20F4000</baseAddress>
      <addressBlock>
        <offset>0</offset>
        <size>0x18</size>
        <usage>registers</usage>
      </addressBlock>
      <interrupt>
        <name>PWM6</name>
        <value>147</value>
      </interrupt>
    </peripheral>
    <peripheral derivedFrom="PWM1">
      <name>PWM7</name>
      <description>PWM</description>
      <groupName>PWM</groupName>
      <prependToName>PWM7_</prependToName>
      <baseAddress>0x20F8000</baseAddress>
      <addressBlock>
        <offset>0</offset>
        <size>0x18</size>
        <usage>registers</usage>
      </addressBlock>
      <interrupt>
        <name>PWM7</name>
        <value>148</value>
      </interrupt>
    </peripheral>
    <peripheral derivedFrom="PWM1">
      <name>PWM8</name>
      <description>PWM</description>
      <groupName>PWM</groupName>
      <prependToName>PWM8_</prependToName>
      <baseAddress>0x20FC000</baseAddress>
      <addressBlock>
        <offset>0</offset>
        <size>0x18</size>
        <usage>registers</usage>
      </addressBlock>
      <interrupt>
        <name>PWM8</name>
        <value>149</value>
      </interrupt>
    </peripheral>
    <peripheral>
      <name>CAN1</name>
      <description>CAN</description>
      <groupName>CAN</groupName>
      <prependToName>CAN1_</prependToName>
      <baseAddress>0x2090000</baseAddress>
      <headerStructName>CAN</headerStructName>
      <addressBlock>
        <offset>0</offset>
        <size>0x9E4</size>
        <usage>registers</usage>
      </addressBlock>
      <interrupt>
        <name>CAN1</name>
        <value>142</value>
      </interrupt>
      <registers>
        <register>
          <name>MCR</name>
          <description>Module Configuration Register</description>
          <addressOffset>0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5980000F</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MAXMB</name>
              <description>This 7-bit field defines the number of the last Message Buffers that will take part in the matching and arbitration processes</description>
              <bitOffset>0</bitOffset>
              <bitWidth>7</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>IDAM</name>
              <description>This 2-bit field identifies the format of the elements of the Rx FIFO filter table, as shown below</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>IDAM_0</name>
                  <description>Format A One full ID (standard or extended) per ID filter Table element.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>IDAM_1</name>
                  <description>Format B Two full standard IDs or two partial 14-bit extended IDs per ID filter Table element.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>IDAM_2</name>
                  <description>Format C Four partial 8-bit IDs (standard or extended) per ID filter Table element.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>IDAM_3</name>
                  <description>Format D All frames rejected.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>AEN</name>
              <description>This bit is supplied for backwards compatibility reasons</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>AEN_0</name>
                  <description>Abort disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AEN_1</name>
                  <description>Abort enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>LPRIOEN</name>
              <description>This bit is provided for backwards compatibility reasons</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LPRIOEN_0</name>
                  <description>Local Priority disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LPRIOEN_1</name>
                  <description>Local Priority enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>IRMQ</name>
              <description>This bit indicates whether Rx matching process will be based either on individual masking and queue or on masking scheme with RXMGMASK, RX14MASK and RX15MASK, RXFGMASK</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>IRMQ_0</name>
                  <description>Individual Rx masking and queue feature are disabled.For backward compatibility, the reading of C/S word locks the MB even if it is EMPTY.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>IRMQ_1</name>
                  <description>Individual Rx masking and queue feature are enabled.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SRXDIS</name>
              <description>This bit defines whether FlexCAN is allowed to receive frames transmitted by itself</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRXDIS_0</name>
                  <description>Self reception enabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRXDIS_1</name>
                  <description>Self reception disabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WAKSRC</name>
              <description>This bit defines whether the integrated low-pass filter is applied to protect the CAN_RX input from spurious wake up</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>WAKSRC_0</name>
                  <description>CAN uses the unfiltered CAN_RX input to detect recessive to dominant edges on the CAN bus.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WAKSRC_1</name>
                  <description>CAN uses the filtered CAN_RX input to detect recessive to dominant edges on the CAN bus</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>LPMACK</name>
              <description>This read-only bit indicates that CAN is either in Disable Mode or Stop Mode</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LPMACK_0</name>
                  <description>CAN not in any of the low power modes</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LPMACK_1</name>
                  <description>CAN is either in Disable Mode, or Stop mode</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WRNEN</name>
              <description>When asserted, this bit enables the generation of the TWRN_INT and RWRN_INT flags in the Error and Status Register</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>WRNEN_0</name>
                  <description>TWRN_INT and RWRN_INT bits are zero, independent of the values in the error counters.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WRNEN_1</name>
                  <description>TWRN_INT and RWRN_INT bits are set when the respective error counter transition from &lt;96 to &gt;= 96.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SLFWAK</name>
              <description>This bit enables the Self Wake Up feature when CAN is in Stop Mode</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SLFWAK_0</name>
                  <description>CAN Self Wake Up feature is disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SLFWAK_1</name>
                  <description>CAN Self Wake Up feature is enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SUPV</name>
              <description>This bit configures some of the CAN registers to be either in Supervisor or User Mode</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SUPV_0</name>
                  <description>FlexCAN is in User Mode. Affected registers allow both Supervisor and Unrestricted accesses</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SUPV_1</name>
                  <description>FlexCAN is in Supervisor Mode. Affected registers allow only Supervisor access. Unrestricted access behaves as though the access was done to an unimplemented register location</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>FRZACK</name>
              <description>This read-only bit indicates that CAN is in Freeze Mode and its prescaler is stopped</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>FRZACK_0</name>
                  <description>CAN not in Freeze Mode, prescaler running</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FRZACK_1</name>
                  <description>CAN in Freeze Mode, prescaler stopped</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SOFTRST</name>
              <description>When this bit is asserted, FlexCAN resets its internal state machines and some of the memory mapped registers</description>
              <bitOffset>0x19</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SOFTRST_0</name>
                  <description>No reset request</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SOFTRST_1</name>
                  <description>Reset the registers</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WAKMSK</name>
              <description>This bit enables the Wake Up Interrupt generation.</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>WAKMSK_0</name>
                  <description>Wake Up Interrupt is disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WAKMSK_1</name>
                  <description>Wake Up Interrupt is enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>NOTRDY</name>
              <description>This read-only bit indicates that CAN is either in Disable Mode, Stop Mode or Freeze Mode</description>
              <bitOffset>0x1B</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NOTRDY_0</name>
                  <description>CAN module is either in Normal Mode, Listen-Only Mode or Loop-Back Mode</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NOTRDY_1</name>
                  <description>CAN module is either in Disable Mode, Stop Mode or Freeze Mode</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HALT</name>
              <description>Assertion of this bit puts the CAN module into Freeze Mode</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HALT_0</name>
                  <description>No Freeze Mode request.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HALT_1</name>
                  <description>Enters Freeze Mode if the FRZ bit is asserted.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RFEN</name>
              <description>This bit controls whether the Rx FIFO feature is enabled or not</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RFEN_0</name>
                  <description>FIFO not enabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RFEN_1</name>
                  <description>FIFO enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>FRZ</name>
              <description>The FRZ bit specifies the CAN behavior when the HALT bit in the MCR Register is set or when Debug Mode is requested at ARM level</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>FRZ_0</name>
                  <description>Not enabled to enter Freeze Mode</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FRZ_1</name>
                  <description>Enabled to enter Freeze Mode</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>MDIS</name>
              <description>This bit controls whether CAN is enabled or not</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>MDIS_0</name>
                  <description>Enable the CAN module</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MDIS_1</name>
                  <description>Disable the CAN module</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>CTRL1</name>
          <description>Control 1 Register</description>
          <addressOffset>0x4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>PROPSEG</name>
              <description>This 3-bit field defines the length of the Propagation Segment in the bit time</description>
              <bitOffset>0</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>LOM</name>
              <description>This bit configures CAN to operate in Listen Only Mode</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LOM_0</name>
                  <description>Listen Only Mode is deactivated</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LOM_1</name>
                  <description>CAN module operates in Listen Only Mode</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>LBUF</name>
              <description>This bit defines the ordering mechanism for Message Buffer transmission</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LBUF_0</name>
                  <description>Buffer with highest priority is transmitted first</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LBUF_1</name>
                  <description>Lowest number buffer is transmitted first</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TSYN</name>
              <description>This bit enables a mechanism that resets the free-running timer each time a message is received in Message Buffer 0</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TSYN_0</name>
                  <description>Timer Sync feature disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TSYN_1</name>
                  <description>Timer Sync feature enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BOFFREC</name>
              <description>This bit defines how CAN recovers from Bus Off state</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>BOFFREC_0</name>
                  <description>Automatic recovering from Bus Off state enabled, according to CAN Spec 2.0 part B</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BOFFREC_1</name>
                  <description>Automatic recovering from Bus Off state disabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SMP</name>
              <description>This bit defines the sampling mode of CAN bits at the CAN_RX</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SMP_0</name>
                  <description>Just one sample is used to determine the bit value</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SMP_1</name>
                  <description>Three samples are used to determine the value of the received bit: the regular one (sample point) and 2 preceding samples, a majority rule is used</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RWRNMSK</name>
              <description>This bit provides a mask for the Rx Warning Interrupt associated with the RWRN_INT flag in the Error and Status Register</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RWRNMSK_0</name>
                  <description>Rx Warning Interrupt disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RWRNMSK_1</name>
                  <description>Rx Warning Interrupt enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TWRNMSK</name>
              <description>This bit provides a mask for the Tx Warning Interrupt associated with the TWRN_INT flag in the Error and Status Register</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TWRNMSK_0</name>
                  <description>Tx Warning Interrupt disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TWRNMSK_1</name>
                  <description>Tx Warning Interrupt enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>LPB</name>
              <description>This bit configures FlexCAN to operate in Loop-Back Mode</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LPB_0</name>
                  <description>Loop Back disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LPB_1</name>
                  <description>Loop Back enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ERRMSK</name>
              <description>This bit provides a mask for the Error Interrupt.</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ERRMSK_0</name>
                  <description>Error interrupt disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ERRMSK_1</name>
                  <description>Error interrupt enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BOFFMSK</name>
              <description>This bit provides a mask for the Bus Off Interrupt.</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>BOFFMSK_0</name>
                  <description>Bus Off interrupt disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BOFFMSK_1</name>
                  <description>Bus Off interrupt enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PSEG2</name>
              <description>This 3-bit field defines the length of Phase Buffer Segment 2 in the bit time</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PSEG1</name>
              <description>This 3-bit field defines the length of Phase Buffer Segment 1 in the bit time</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RJW</name>
              <description>This 2-bit field defines the maximum number of time quanta One time quantum is equal to the Sclock period</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PRESDIV</name>
              <description>This 8-bit field defines the ratio between the PE clock frequency and the Serial Clock (Sclock) frequency</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>TIMER</name>
          <description>Free Running Timer Register</description>
          <addressOffset>0x8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TIMER</name>
              <description>TIMER</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>RXMGMASK</name>
          <description>Rx Mailboxes Global Mask Register</description>
          <addressOffset>0x10</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0xFFFFFFFF</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MG</name>
              <description>These bits mask the Mailbox filter bits as shown in the figure above</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>MG_0</name>
                  <description>the corresponding bit in the filter is &quot;don't care&quot;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MG_1</name>
                  <description>The corresponding bit in the filter is checked against the one received</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>RX14MASK</name>
          <description>Rx Buffer 14 Mask Register</description>
          <addressOffset>0x14</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0xFFFFFFFF</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RX14M</name>
              <description>These bits mask Mailbox 14 filter bits in the same fashion as RXMGMASK masks other Mailboxes filters (see RXMGMASKRx Mailboxes Global Mask Register )</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RX14M_0</name>
                  <description>the corresponding bit in the filter is &quot;don't care&quot;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RX14M_1</name>
                  <description>The corresponding bit in the filter is checked</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>RX15MASK</name>
          <description>Rx Buffer 15 Mask Register</description>
          <addressOffset>0x18</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0xFFFFFFFF</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RX15M</name>
              <description>These bits mask Mailbox 15 filter bits in the same fashion as RXMGMASK masks other Mailboxes filters (see RXMGMASKRx Mailboxes Global Mask Register )</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RX15M_0</name>
                  <description>the corresponding bit in the filter is &quot;don't care&quot;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RX15M_1</name>
                  <description>The corresponding bit in the filter is checked</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>ECR</name>
          <description>Error Counter Register</description>
          <addressOffset>0x1C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TX_ERR_COUNTER</name>
              <description>Tx_Err_Counter</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RX_ERR_COUNTER</name>
              <description>Rx_Err_Counter</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ESR1</name>
          <description>Error and Status 1 Register</description>
          <addressOffset>0x20</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>WAKINT</name>
              <description>When CAN is Stop Mode and a recessive to dominant transition is detected on the CAN bus and if the WAK_MSK bit in the MCR Register is set, an interrupt is generated to the ARM</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>WAKINT_0</name>
                  <description>No such occurrence</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WAKINT_1</name>
                  <description>Indicates a recessive to dominant transition received on the CAN bus when the CAN module is in Stop Mode</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ERRINT</name>
              <description>This bit indicates that at least one of the Error Bits (bits 15-10) is set</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ERRINT_0</name>
                  <description>No such occurrence</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ERRINT_1</name>
                  <description>Indicates setting of any Error Bit in the Error and Status Register</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BOFFINT</name>
              <description>This bit is set when CAN enters 'Bus Off' state</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>BOFFINT_0</name>
                  <description>No such occurrence</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BOFFINT_1</name>
                  <description>CAN module entered 'Bus Off' state</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RX</name>
              <description>This bit indicates if FlexCAN is receiving a message. Refer to .</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RX_0</name>
                  <description>CAN is receiving a message</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RX_1</name>
                  <description>CAN is transmitting a message</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>FLTCONF</name>
              <description>If the LOM bit in the Control Register is asserted, after some delay that depends on the CAN bit timing the FLT_CONF field will indicate &quot;Error Passive&quot;</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>FLTCONF_0</name>
                  <description>Error Active</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FLTCONF_1</name>
                  <description>Error Passive</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TX</name>
              <description>This bit indicates if CAN is transmitting a message.Refer to .</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TX_0</name>
                  <description>CAN is receiving a message</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TX_1</name>
                  <description>CAN is transmitting a message</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>IDLE</name>
              <description>This bit indicates when CAN bus is in IDLE state.Refer to .</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>IDLE_0</name>
                  <description>No such occurrence</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>IDLE_1</name>
                  <description>CAN bus is now IDLE</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RXWRN</name>
              <description>This bit indicates when repetitive errors are occurring during message reception.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RXWRN_0</name>
                  <description>No such occurrence</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RXWRN_1</name>
                  <description>Rx_Err_Counter &gt;= 96</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TXWRN</name>
              <description>This bit indicates when repetitive errors are occurring during message transmission.</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TXWRN_0</name>
                  <description>No such occurrence</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TXWRN_1</name>
                  <description>TX_Err_Counter &gt;= 96</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>STFERR</name>
              <description>This bit indicates that a Stuffing Error has been detected.</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>STFERR_0</name>
                  <description>No such occurrence.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>STFERR_1</name>
                  <description>A Stuffing Error occurred since last read of this register.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>FRMERR</name>
              <description>This bit indicates that a Form Error has been detected by the receiver node, i</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>FRMERR_0</name>
                  <description>No such occurrence</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FRMERR_1</name>
                  <description>A Form Error occurred since last read of this register</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CRCERR</name>
              <description>This bit indicates that a CRC Error has been detected by the receiver node, i</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CRCERR_0</name>
                  <description>No such occurrence</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CRCERR_1</name>
                  <description>A CRC error occurred since last read of this register.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ACKERR</name>
              <description>This bit indicates that an Acknowledge Error has been detected by the transmitter node, i</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ACKERR_0</name>
                  <description>No such occurrence</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ACKERR_1</name>
                  <description>An ACK error occurred since last read of this register</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BIT0ERR</name>
              <description>This bit indicates when an inconsistency occurs between the transmitted and the received bit in a message</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>BIT0ERR_0</name>
                  <description>No such occurrence</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BIT0ERR_1</name>
                  <description>At least one bit sent as dominant is received as recessive</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BIT1ERR</name>
              <description>This bit indicates when an inconsistency occurs between the transmitted and the received bit in a message</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>BIT1ERR_0</name>
                  <description>No such occurrence</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BIT1ERR_1</name>
                  <description>At least one bit sent as recessive is received as dominant</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RWRNINT</name>
              <description>If the WRN_EN bit in MCR is asserted, the RWRN_INT bit is set when the RX_WRN flag transition from '0' to '1', meaning that the Rx error counters reached 96</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RWRNINT_0</name>
                  <description>No such occurrence</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RWRNINT_1</name>
                  <description>The Rx error counter transition from &lt; 96 to &gt;= 96</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TWRNINT</name>
              <description>If the WRN_EN bit in MCR is asserted, the TWRN_INT bit is set when the TX_WRN flag transition from '0' to '1', meaning that the Tx error counter reached 96</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TWRNINT_0</name>
                  <description>No such occurrence</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TWRNINT_1</name>
                  <description>The Tx error counter transition from &lt; 96 to &gt;= 96</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SYNCH</name>
              <description>This read-only flag indicates whether the FlexCAN is synchronized to the CAN bus and able to participate in the communication process</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SYNCH_0</name>
                  <description>FlexCAN is not synchronized to the CAN bus</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SYNCH_1</name>
                  <description>FlexCAN is synchronized to the CAN bus</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>IMASK2</name>
          <description>Interrupt Masks 2 Register</description>
          <addressOffset>0x24</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BUFHM</name>
              <description>Each bit enables or disables the respective CAN Message Buffer (MB32 to MB63) Interrupt</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>BUFHM_0</name>
                  <description>The corresponding buffer Interrupt is disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BUFHM_1</name>
                  <description>The corresponding buffer Interrupt is enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>IMASK1</name>
          <description>Interrupt Masks 1 Register</description>
          <addressOffset>0x28</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BUFLM</name>
              <description>Each bit enables or disables the respective CAN Message Buffer (MB0 to MB31) Interrupt</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>BUFLM_0</name>
                  <description>The corresponding buffer Interrupt is disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BUFLM_1</name>
                  <description>The corresponding buffer Interrupt is enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>IFLAG2</name>
          <description>Interrupt Flags 2 Register</description>
          <addressOffset>0x2C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BUFHI</name>
              <description>Each bit flags the respective CAN Message Buffer (MB32 to MB63) interrupt.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>BUFHI_0</name>
                  <description>No such occurrence</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BUFHI_1</name>
                  <description>The corresponding buffer has successfully completed transmission or reception</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>IFLAG1</name>
          <description>Interrupt Flags 1 Register</description>
          <addressOffset>0x30</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BUF4TO0I</name>
              <description>If the Rx FIFO is not enabled, these bits flag the interrupts for MB0 to MB4</description>
              <bitOffset>0</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>BUF4TO0I_0</name>
                  <description>No such occurrence</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BUF4TO0I_1</name>
                  <description>Corresponding MB completed transmission/reception</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BUF5I</name>
              <description>If the Rx FIFO is not enabled, this bit flags the interrupt for MB5</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>BUF5I_0</name>
                  <description>No such occurrence</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BUF5I_1</name>
                  <description>MB5 completed transmission/reception or frames available in the FIFO</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BUF6I</name>
              <description>If the Rx FIFO is not enabled, this bit flags the interrupt for MB6</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>BUF6I_0</name>
                  <description>No such occurrence</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BUF6I_1</name>
                  <description>MB6 completed transmission/reception or FIFO almost full</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BUF7I</name>
              <description>If the Rx FIFO is not enabled, this bit flags the interrupt for MB7</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>BUF7I_0</name>
                  <description>No such occurrence</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BUF7I_1</name>
                  <description>MB7 completed transmission/reception or FIFO overflow</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BUF31TO8I</name>
              <description>Each bit flags the respective CAN Message Buffer (MB8 to MB31) interrupt.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>24</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>BUF31TO8I_0</name>
                  <description>No such occurrence</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BUF31TO8I_1</name>
                  <description>The corresponding MB has successfully completed transmission or reception</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>CTRL2</name>
          <description>Control 2 Register</description>
          <addressOffset>0x34</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>EACEN</name>
              <description>This bit controls the comparison of IDE and RTR bits within Rx Mailboxes filters with their corresponding bits in the incoming frame by the matching process</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>EACEN_0</name>
                  <description>Rx Mailbox filter's IDE bit is always compared and RTR is never compared despite mask bits.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>EACEN_1</name>
                  <description>Enables the comparison of both Rx Mailbox filter's IDE and RTR bit with their corresponding bits within the incoming frame. Mask bits do apply.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RRS</name>
              <description>If this bit is asserted Remote Request Frame is submitted to a matching process and stored in the corresponding Message Buffer in the same fashion of a Data Frame</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RRS_0</name>
                  <description>Remote Response Frame is generated</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RRS_1</name>
                  <description>Remote Request Frame is stored</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>MRP</name>
              <description>If this bit is set the matching process starts from the Mailboxes and if no match occurs the matching continues on the Rx FIFO</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>MRP_0</name>
                  <description>Matching starts from Rx FIFO and continues on Mailboxes</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MRP_1</name>
                  <description>Matching starts from Mailboxes and continues on Rx FIFO</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TASD</name>
              <description>This 5-bit field indicates how many CAN bits the Tx arbitration process start point can be delayed from the first bit of CRC field on CAN bus</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RFFN</name>
              <description>This 4-bit field defines the number of Rx FIFO filters according to</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>WRMFRZ</name>
              <description>Enable unrestricted write access to FlexCAN memory in Freeze mode</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>WRMFRZ_0</name>
                  <description>Keep the write access restricted in some regions of FlexCAN memory</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WRMFRZ_1</name>
                  <description>Enable unrestricted write access to FlexCAN memory</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>ESR2</name>
          <description>Error and Status 2 Register</description>
          <addressOffset>0x38</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>IMB</name>
              <description>If ESR2[VPS] is asserted, this bit indicates whether there is any inactive Mailbox (CODE field is either 0b1000 or 0b0000)</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>IMB_0</name>
                  <description>If ESR2[VPS] is asserted, the ESR2[LPTM] is not an inactive Mailbox.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>IMB_1</name>
                  <description>If ESR2[VPS] is asserted, there is at least one inactive Mailbox. LPTM content is the number of the first one.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>VPS</name>
              <description>This bit indicates whether IMB and LPTM contents are currently valid or not</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>VPS_0</name>
                  <description>Contents of IMB and LPTM are invalid</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>VPS_1</name>
                  <description>Contents of IMB and LPTM are valid</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>LPTM</name>
              <description>If ESR2[VPS] is asserted, his 7-bit field indicates the lowest number inactive Mailbox (refer to IMB bit description)</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>7</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CRCR</name>
          <description>CRC Register</description>
          <addressOffset>0x44</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TXCRC</name>
              <description>This field indicates the CRC value of the last message transmitted</description>
              <bitOffset>0</bitOffset>
              <bitWidth>15</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>MBCRC</name>
              <description>This field indicates the number of the Mailbox corresponding to the value in TXCRC field.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>7</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>RXFGMASK</name>
          <description>Rx FIFO Global Mask Register</description>
          <addressOffset>0x48</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0xFFFFFFFF</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>FGM</name>
              <description>These bits mask the ID Filter Table elements bits in a perfect alignment</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>FGM_0</name>
                  <description>The corresponding bit in the filter is &quot;don't care&quot;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FGM_1</name>
                  <description>The corresponding bit in the filter is checked</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>RXFIR</name>
          <description>Rx FIFO Information Register</description>
          <addressOffset>0x4C</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>IDHIT</name>
              <description>This 9-bit field indicates which Identifier Acceptance Filter (see Rx FIFO Structure) was hit by the received message that is in the output of the Rx FIFO</description>
              <bitOffset>0</bitOffset>
              <bitWidth>9</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CS0</name>
          <description>Message Buffer 0 CS Register</description>
          <addressOffset>0x80</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TIME_STAMP</name>
              <description>Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DLC</name>
              <description>Length of the data to be stored/transmitted.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RTR</name>
              <description>Remote Transmission Request. One/zero for remote/data frame.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>IDE</name>
              <description>ID Extended. One/zero for extended/standard format frame.</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SRR</name>
              <description>Substitute Remote Request. Contains a fixed recessive bit.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CODE</name>
              <description>Reserved</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ID0</name>
          <description>Message Buffer 0 ID Register</description>
          <addressOffset>0x84</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>EXT</name>
              <description>Contains extended (LOW word) identifier of message buffer.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>18</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>STD</name>
              <description>Contains standard/extended (HIGH word) identifier of message buffer.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>11</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PRIO</name>
              <description>Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD00</name>
          <description>Message Buffer 0 WORD0 Register</description>
          <addressOffset>0x88</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_3</name>
              <description>Data byte 3 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_2</name>
              <description>Data byte 2 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_1</name>
              <description>Data byte 1 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_0</name>
              <description>Data byte 0 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD10</name>
          <description>Message Buffer 0 WORD1 Register</description>
          <addressOffset>0x8C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_7</name>
              <description>Data byte 7 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_6</name>
              <description>Data byte 6 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_5</name>
              <description>Data byte 5 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_4</name>
              <description>Data byte 4 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CS1</name>
          <description>Message Buffer 1 CS Register</description>
          <addressOffset>0x90</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TIME_STAMP</name>
              <description>Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DLC</name>
              <description>Length of the data to be stored/transmitted.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RTR</name>
              <description>Remote Transmission Request. One/zero for remote/data frame.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>IDE</name>
              <description>ID Extended. One/zero for extended/standard format frame.</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SRR</name>
              <description>Substitute Remote Request. Contains a fixed recessive bit.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CODE</name>
              <description>Reserved</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ID1</name>
          <description>Message Buffer 1 ID Register</description>
          <addressOffset>0x94</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>EXT</name>
              <description>Contains extended (LOW word) identifier of message buffer.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>18</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>STD</name>
              <description>Contains standard/extended (HIGH word) identifier of message buffer.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>11</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PRIO</name>
              <description>Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD01</name>
          <description>Message Buffer 1 WORD0 Register</description>
          <addressOffset>0x98</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_3</name>
              <description>Data byte 3 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_2</name>
              <description>Data byte 2 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_1</name>
              <description>Data byte 1 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_0</name>
              <description>Data byte 0 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD11</name>
          <description>Message Buffer 1 WORD1 Register</description>
          <addressOffset>0x9C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_7</name>
              <description>Data byte 7 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_6</name>
              <description>Data byte 6 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_5</name>
              <description>Data byte 5 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_4</name>
              <description>Data byte 4 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CS2</name>
          <description>Message Buffer 2 CS Register</description>
          <addressOffset>0xA0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TIME_STAMP</name>
              <description>Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DLC</name>
              <description>Length of the data to be stored/transmitted.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RTR</name>
              <description>Remote Transmission Request. One/zero for remote/data frame.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>IDE</name>
              <description>ID Extended. One/zero for extended/standard format frame.</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SRR</name>
              <description>Substitute Remote Request. Contains a fixed recessive bit.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CODE</name>
              <description>Reserved</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ID2</name>
          <description>Message Buffer 2 ID Register</description>
          <addressOffset>0xA4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>EXT</name>
              <description>Contains extended (LOW word) identifier of message buffer.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>18</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>STD</name>
              <description>Contains standard/extended (HIGH word) identifier of message buffer.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>11</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PRIO</name>
              <description>Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD02</name>
          <description>Message Buffer 2 WORD0 Register</description>
          <addressOffset>0xA8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_3</name>
              <description>Data byte 3 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_2</name>
              <description>Data byte 2 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_1</name>
              <description>Data byte 1 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_0</name>
              <description>Data byte 0 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD12</name>
          <description>Message Buffer 2 WORD1 Register</description>
          <addressOffset>0xAC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_7</name>
              <description>Data byte 7 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_6</name>
              <description>Data byte 6 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_5</name>
              <description>Data byte 5 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_4</name>
              <description>Data byte 4 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CS3</name>
          <description>Message Buffer 3 CS Register</description>
          <addressOffset>0xB0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TIME_STAMP</name>
              <description>Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DLC</name>
              <description>Length of the data to be stored/transmitted.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RTR</name>
              <description>Remote Transmission Request. One/zero for remote/data frame.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>IDE</name>
              <description>ID Extended. One/zero for extended/standard format frame.</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SRR</name>
              <description>Substitute Remote Request. Contains a fixed recessive bit.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CODE</name>
              <description>Reserved</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ID3</name>
          <description>Message Buffer 3 ID Register</description>
          <addressOffset>0xB4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>EXT</name>
              <description>Contains extended (LOW word) identifier of message buffer.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>18</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>STD</name>
              <description>Contains standard/extended (HIGH word) identifier of message buffer.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>11</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PRIO</name>
              <description>Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD03</name>
          <description>Message Buffer 3 WORD0 Register</description>
          <addressOffset>0xB8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_3</name>
              <description>Data byte 3 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_2</name>
              <description>Data byte 2 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_1</name>
              <description>Data byte 1 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_0</name>
              <description>Data byte 0 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD13</name>
          <description>Message Buffer 3 WORD1 Register</description>
          <addressOffset>0xBC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_7</name>
              <description>Data byte 7 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_6</name>
              <description>Data byte 6 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_5</name>
              <description>Data byte 5 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_4</name>
              <description>Data byte 4 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CS4</name>
          <description>Message Buffer 4 CS Register</description>
          <addressOffset>0xC0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TIME_STAMP</name>
              <description>Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DLC</name>
              <description>Length of the data to be stored/transmitted.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RTR</name>
              <description>Remote Transmission Request. One/zero for remote/data frame.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>IDE</name>
              <description>ID Extended. One/zero for extended/standard format frame.</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SRR</name>
              <description>Substitute Remote Request. Contains a fixed recessive bit.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CODE</name>
              <description>Reserved</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ID4</name>
          <description>Message Buffer 4 ID Register</description>
          <addressOffset>0xC4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>EXT</name>
              <description>Contains extended (LOW word) identifier of message buffer.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>18</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>STD</name>
              <description>Contains standard/extended (HIGH word) identifier of message buffer.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>11</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PRIO</name>
              <description>Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD04</name>
          <description>Message Buffer 4 WORD0 Register</description>
          <addressOffset>0xC8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_3</name>
              <description>Data byte 3 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_2</name>
              <description>Data byte 2 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_1</name>
              <description>Data byte 1 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_0</name>
              <description>Data byte 0 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD14</name>
          <description>Message Buffer 4 WORD1 Register</description>
          <addressOffset>0xCC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_7</name>
              <description>Data byte 7 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_6</name>
              <description>Data byte 6 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_5</name>
              <description>Data byte 5 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_4</name>
              <description>Data byte 4 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CS5</name>
          <description>Message Buffer 5 CS Register</description>
          <addressOffset>0xD0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TIME_STAMP</name>
              <description>Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DLC</name>
              <description>Length of the data to be stored/transmitted.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RTR</name>
              <description>Remote Transmission Request. One/zero for remote/data frame.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>IDE</name>
              <description>ID Extended. One/zero for extended/standard format frame.</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SRR</name>
              <description>Substitute Remote Request. Contains a fixed recessive bit.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CODE</name>
              <description>Reserved</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ID5</name>
          <description>Message Buffer 5 ID Register</description>
          <addressOffset>0xD4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>EXT</name>
              <description>Contains extended (LOW word) identifier of message buffer.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>18</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>STD</name>
              <description>Contains standard/extended (HIGH word) identifier of message buffer.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>11</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PRIO</name>
              <description>Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD05</name>
          <description>Message Buffer 5 WORD0 Register</description>
          <addressOffset>0xD8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_3</name>
              <description>Data byte 3 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_2</name>
              <description>Data byte 2 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_1</name>
              <description>Data byte 1 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_0</name>
              <description>Data byte 0 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD15</name>
          <description>Message Buffer 5 WORD1 Register</description>
          <addressOffset>0xDC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_7</name>
              <description>Data byte 7 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_6</name>
              <description>Data byte 6 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_5</name>
              <description>Data byte 5 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_4</name>
              <description>Data byte 4 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CS6</name>
          <description>Message Buffer 6 CS Register</description>
          <addressOffset>0xE0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TIME_STAMP</name>
              <description>Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DLC</name>
              <description>Length of the data to be stored/transmitted.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RTR</name>
              <description>Remote Transmission Request. One/zero for remote/data frame.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>IDE</name>
              <description>ID Extended. One/zero for extended/standard format frame.</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SRR</name>
              <description>Substitute Remote Request. Contains a fixed recessive bit.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CODE</name>
              <description>Reserved</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ID6</name>
          <description>Message Buffer 6 ID Register</description>
          <addressOffset>0xE4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>EXT</name>
              <description>Contains extended (LOW word) identifier of message buffer.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>18</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>STD</name>
              <description>Contains standard/extended (HIGH word) identifier of message buffer.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>11</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PRIO</name>
              <description>Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD06</name>
          <description>Message Buffer 6 WORD0 Register</description>
          <addressOffset>0xE8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_3</name>
              <description>Data byte 3 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_2</name>
              <description>Data byte 2 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_1</name>
              <description>Data byte 1 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_0</name>
              <description>Data byte 0 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD16</name>
          <description>Message Buffer 6 WORD1 Register</description>
          <addressOffset>0xEC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_7</name>
              <description>Data byte 7 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_6</name>
              <description>Data byte 6 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_5</name>
              <description>Data byte 5 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_4</name>
              <description>Data byte 4 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CS7</name>
          <description>Message Buffer 7 CS Register</description>
          <addressOffset>0xF0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TIME_STAMP</name>
              <description>Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DLC</name>
              <description>Length of the data to be stored/transmitted.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RTR</name>
              <description>Remote Transmission Request. One/zero for remote/data frame.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>IDE</name>
              <description>ID Extended. One/zero for extended/standard format frame.</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SRR</name>
              <description>Substitute Remote Request. Contains a fixed recessive bit.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CODE</name>
              <description>Reserved</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ID7</name>
          <description>Message Buffer 7 ID Register</description>
          <addressOffset>0xF4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>EXT</name>
              <description>Contains extended (LOW word) identifier of message buffer.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>18</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>STD</name>
              <description>Contains standard/extended (HIGH word) identifier of message buffer.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>11</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PRIO</name>
              <description>Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD07</name>
          <description>Message Buffer 7 WORD0 Register</description>
          <addressOffset>0xF8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_3</name>
              <description>Data byte 3 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_2</name>
              <description>Data byte 2 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_1</name>
              <description>Data byte 1 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_0</name>
              <description>Data byte 0 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD17</name>
          <description>Message Buffer 7 WORD1 Register</description>
          <addressOffset>0xFC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_7</name>
              <description>Data byte 7 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_6</name>
              <description>Data byte 6 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_5</name>
              <description>Data byte 5 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_4</name>
              <description>Data byte 4 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CS8</name>
          <description>Message Buffer 8 CS Register</description>
          <addressOffset>0x100</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TIME_STAMP</name>
              <description>Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DLC</name>
              <description>Length of the data to be stored/transmitted.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RTR</name>
              <description>Remote Transmission Request. One/zero for remote/data frame.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>IDE</name>
              <description>ID Extended. One/zero for extended/standard format frame.</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SRR</name>
              <description>Substitute Remote Request. Contains a fixed recessive bit.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CODE</name>
              <description>Reserved</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ID8</name>
          <description>Message Buffer 8 ID Register</description>
          <addressOffset>0x104</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>EXT</name>
              <description>Contains extended (LOW word) identifier of message buffer.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>18</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>STD</name>
              <description>Contains standard/extended (HIGH word) identifier of message buffer.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>11</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PRIO</name>
              <description>Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD08</name>
          <description>Message Buffer 8 WORD0 Register</description>
          <addressOffset>0x108</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_3</name>
              <description>Data byte 3 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_2</name>
              <description>Data byte 2 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_1</name>
              <description>Data byte 1 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_0</name>
              <description>Data byte 0 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD18</name>
          <description>Message Buffer 8 WORD1 Register</description>
          <addressOffset>0x10C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_7</name>
              <description>Data byte 7 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_6</name>
              <description>Data byte 6 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_5</name>
              <description>Data byte 5 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_4</name>
              <description>Data byte 4 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CS9</name>
          <description>Message Buffer 9 CS Register</description>
          <addressOffset>0x110</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TIME_STAMP</name>
              <description>Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DLC</name>
              <description>Length of the data to be stored/transmitted.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RTR</name>
              <description>Remote Transmission Request. One/zero for remote/data frame.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>IDE</name>
              <description>ID Extended. One/zero for extended/standard format frame.</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SRR</name>
              <description>Substitute Remote Request. Contains a fixed recessive bit.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CODE</name>
              <description>Reserved</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ID9</name>
          <description>Message Buffer 9 ID Register</description>
          <addressOffset>0x114</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>EXT</name>
              <description>Contains extended (LOW word) identifier of message buffer.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>18</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>STD</name>
              <description>Contains standard/extended (HIGH word) identifier of message buffer.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>11</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PRIO</name>
              <description>Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD09</name>
          <description>Message Buffer 9 WORD0 Register</description>
          <addressOffset>0x118</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_3</name>
              <description>Data byte 3 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_2</name>
              <description>Data byte 2 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_1</name>
              <description>Data byte 1 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_0</name>
              <description>Data byte 0 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD19</name>
          <description>Message Buffer 9 WORD1 Register</description>
          <addressOffset>0x11C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_7</name>
              <description>Data byte 7 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_6</name>
              <description>Data byte 6 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_5</name>
              <description>Data byte 5 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_4</name>
              <description>Data byte 4 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CS10</name>
          <description>Message Buffer 10 CS Register</description>
          <addressOffset>0x120</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TIME_STAMP</name>
              <description>Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DLC</name>
              <description>Length of the data to be stored/transmitted.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RTR</name>
              <description>Remote Transmission Request. One/zero for remote/data frame.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>IDE</name>
              <description>ID Extended. One/zero for extended/standard format frame.</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SRR</name>
              <description>Substitute Remote Request. Contains a fixed recessive bit.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CODE</name>
              <description>Reserved</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ID10</name>
          <description>Message Buffer 10 ID Register</description>
          <addressOffset>0x124</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>EXT</name>
              <description>Contains extended (LOW word) identifier of message buffer.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>18</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>STD</name>
              <description>Contains standard/extended (HIGH word) identifier of message buffer.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>11</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PRIO</name>
              <description>Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD010</name>
          <description>Message Buffer 10 WORD0 Register</description>
          <addressOffset>0x128</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_3</name>
              <description>Data byte 3 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_2</name>
              <description>Data byte 2 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_1</name>
              <description>Data byte 1 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_0</name>
              <description>Data byte 0 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD110</name>
          <description>Message Buffer 10 WORD1 Register</description>
          <addressOffset>0x12C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_7</name>
              <description>Data byte 7 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_6</name>
              <description>Data byte 6 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_5</name>
              <description>Data byte 5 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_4</name>
              <description>Data byte 4 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CS11</name>
          <description>Message Buffer 11 CS Register</description>
          <addressOffset>0x130</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TIME_STAMP</name>
              <description>Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DLC</name>
              <description>Length of the data to be stored/transmitted.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RTR</name>
              <description>Remote Transmission Request. One/zero for remote/data frame.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>IDE</name>
              <description>ID Extended. One/zero for extended/standard format frame.</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SRR</name>
              <description>Substitute Remote Request. Contains a fixed recessive bit.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CODE</name>
              <description>Reserved</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ID11</name>
          <description>Message Buffer 11 ID Register</description>
          <addressOffset>0x134</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>EXT</name>
              <description>Contains extended (LOW word) identifier of message buffer.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>18</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>STD</name>
              <description>Contains standard/extended (HIGH word) identifier of message buffer.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>11</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PRIO</name>
              <description>Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD011</name>
          <description>Message Buffer 11 WORD0 Register</description>
          <addressOffset>0x138</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_3</name>
              <description>Data byte 3 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_2</name>
              <description>Data byte 2 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_1</name>
              <description>Data byte 1 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_0</name>
              <description>Data byte 0 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD111</name>
          <description>Message Buffer 11 WORD1 Register</description>
          <addressOffset>0x13C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_7</name>
              <description>Data byte 7 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_6</name>
              <description>Data byte 6 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_5</name>
              <description>Data byte 5 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_4</name>
              <description>Data byte 4 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CS12</name>
          <description>Message Buffer 12 CS Register</description>
          <addressOffset>0x140</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TIME_STAMP</name>
              <description>Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DLC</name>
              <description>Length of the data to be stored/transmitted.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RTR</name>
              <description>Remote Transmission Request. One/zero for remote/data frame.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>IDE</name>
              <description>ID Extended. One/zero for extended/standard format frame.</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SRR</name>
              <description>Substitute Remote Request. Contains a fixed recessive bit.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CODE</name>
              <description>Reserved</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ID12</name>
          <description>Message Buffer 12 ID Register</description>
          <addressOffset>0x144</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>EXT</name>
              <description>Contains extended (LOW word) identifier of message buffer.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>18</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>STD</name>
              <description>Contains standard/extended (HIGH word) identifier of message buffer.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>11</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PRIO</name>
              <description>Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD012</name>
          <description>Message Buffer 12 WORD0 Register</description>
          <addressOffset>0x148</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_3</name>
              <description>Data byte 3 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_2</name>
              <description>Data byte 2 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_1</name>
              <description>Data byte 1 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_0</name>
              <description>Data byte 0 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD112</name>
          <description>Message Buffer 12 WORD1 Register</description>
          <addressOffset>0x14C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_7</name>
              <description>Data byte 7 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_6</name>
              <description>Data byte 6 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_5</name>
              <description>Data byte 5 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_4</name>
              <description>Data byte 4 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CS13</name>
          <description>Message Buffer 13 CS Register</description>
          <addressOffset>0x150</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TIME_STAMP</name>
              <description>Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DLC</name>
              <description>Length of the data to be stored/transmitted.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RTR</name>
              <description>Remote Transmission Request. One/zero for remote/data frame.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>IDE</name>
              <description>ID Extended. One/zero for extended/standard format frame.</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SRR</name>
              <description>Substitute Remote Request. Contains a fixed recessive bit.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CODE</name>
              <description>Reserved</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ID13</name>
          <description>Message Buffer 13 ID Register</description>
          <addressOffset>0x154</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>EXT</name>
              <description>Contains extended (LOW word) identifier of message buffer.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>18</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>STD</name>
              <description>Contains standard/extended (HIGH word) identifier of message buffer.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>11</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PRIO</name>
              <description>Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD013</name>
          <description>Message Buffer 13 WORD0 Register</description>
          <addressOffset>0x158</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_3</name>
              <description>Data byte 3 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_2</name>
              <description>Data byte 2 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_1</name>
              <description>Data byte 1 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_0</name>
              <description>Data byte 0 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD113</name>
          <description>Message Buffer 13 WORD1 Register</description>
          <addressOffset>0x15C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_7</name>
              <description>Data byte 7 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_6</name>
              <description>Data byte 6 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_5</name>
              <description>Data byte 5 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_4</name>
              <description>Data byte 4 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CS14</name>
          <description>Message Buffer 14 CS Register</description>
          <addressOffset>0x160</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TIME_STAMP</name>
              <description>Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DLC</name>
              <description>Length of the data to be stored/transmitted.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RTR</name>
              <description>Remote Transmission Request. One/zero for remote/data frame.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>IDE</name>
              <description>ID Extended. One/zero for extended/standard format frame.</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SRR</name>
              <description>Substitute Remote Request. Contains a fixed recessive bit.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CODE</name>
              <description>Reserved</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ID14</name>
          <description>Message Buffer 14 ID Register</description>
          <addressOffset>0x164</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>EXT</name>
              <description>Contains extended (LOW word) identifier of message buffer.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>18</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>STD</name>
              <description>Contains standard/extended (HIGH word) identifier of message buffer.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>11</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PRIO</name>
              <description>Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD014</name>
          <description>Message Buffer 14 WORD0 Register</description>
          <addressOffset>0x168</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_3</name>
              <description>Data byte 3 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_2</name>
              <description>Data byte 2 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_1</name>
              <description>Data byte 1 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_0</name>
              <description>Data byte 0 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD114</name>
          <description>Message Buffer 14 WORD1 Register</description>
          <addressOffset>0x16C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_7</name>
              <description>Data byte 7 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_6</name>
              <description>Data byte 6 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_5</name>
              <description>Data byte 5 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_4</name>
              <description>Data byte 4 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CS15</name>
          <description>Message Buffer 15 CS Register</description>
          <addressOffset>0x170</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TIME_STAMP</name>
              <description>Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DLC</name>
              <description>Length of the data to be stored/transmitted.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RTR</name>
              <description>Remote Transmission Request. One/zero for remote/data frame.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>IDE</name>
              <description>ID Extended. One/zero for extended/standard format frame.</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SRR</name>
              <description>Substitute Remote Request. Contains a fixed recessive bit.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CODE</name>
              <description>Reserved</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ID15</name>
          <description>Message Buffer 15 ID Register</description>
          <addressOffset>0x174</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>EXT</name>
              <description>Contains extended (LOW word) identifier of message buffer.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>18</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>STD</name>
              <description>Contains standard/extended (HIGH word) identifier of message buffer.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>11</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PRIO</name>
              <description>Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD015</name>
          <description>Message Buffer 15 WORD0 Register</description>
          <addressOffset>0x178</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_3</name>
              <description>Data byte 3 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_2</name>
              <description>Data byte 2 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_1</name>
              <description>Data byte 1 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_0</name>
              <description>Data byte 0 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD115</name>
          <description>Message Buffer 15 WORD1 Register</description>
          <addressOffset>0x17C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_7</name>
              <description>Data byte 7 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_6</name>
              <description>Data byte 6 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_5</name>
              <description>Data byte 5 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_4</name>
              <description>Data byte 4 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CS16</name>
          <description>Message Buffer 16 CS Register</description>
          <addressOffset>0x180</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TIME_STAMP</name>
              <description>Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DLC</name>
              <description>Length of the data to be stored/transmitted.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RTR</name>
              <description>Remote Transmission Request. One/zero for remote/data frame.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>IDE</name>
              <description>ID Extended. One/zero for extended/standard format frame.</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SRR</name>
              <description>Substitute Remote Request. Contains a fixed recessive bit.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CODE</name>
              <description>Reserved</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ID16</name>
          <description>Message Buffer 16 ID Register</description>
          <addressOffset>0x184</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>EXT</name>
              <description>Contains extended (LOW word) identifier of message buffer.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>18</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>STD</name>
              <description>Contains standard/extended (HIGH word) identifier of message buffer.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>11</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PRIO</name>
              <description>Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD016</name>
          <description>Message Buffer 16 WORD0 Register</description>
          <addressOffset>0x188</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_3</name>
              <description>Data byte 3 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_2</name>
              <description>Data byte 2 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_1</name>
              <description>Data byte 1 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_0</name>
              <description>Data byte 0 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD116</name>
          <description>Message Buffer 16 WORD1 Register</description>
          <addressOffset>0x18C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_7</name>
              <description>Data byte 7 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_6</name>
              <description>Data byte 6 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_5</name>
              <description>Data byte 5 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_4</name>
              <description>Data byte 4 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CS17</name>
          <description>Message Buffer 17 CS Register</description>
          <addressOffset>0x190</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TIME_STAMP</name>
              <description>Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DLC</name>
              <description>Length of the data to be stored/transmitted.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RTR</name>
              <description>Remote Transmission Request. One/zero for remote/data frame.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>IDE</name>
              <description>ID Extended. One/zero for extended/standard format frame.</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SRR</name>
              <description>Substitute Remote Request. Contains a fixed recessive bit.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CODE</name>
              <description>Reserved</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ID17</name>
          <description>Message Buffer 17 ID Register</description>
          <addressOffset>0x194</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>EXT</name>
              <description>Contains extended (LOW word) identifier of message buffer.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>18</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>STD</name>
              <description>Contains standard/extended (HIGH word) identifier of message buffer.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>11</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PRIO</name>
              <description>Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD017</name>
          <description>Message Buffer 17 WORD0 Register</description>
          <addressOffset>0x198</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_3</name>
              <description>Data byte 3 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_2</name>
              <description>Data byte 2 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_1</name>
              <description>Data byte 1 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_0</name>
              <description>Data byte 0 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD117</name>
          <description>Message Buffer 17 WORD1 Register</description>
          <addressOffset>0x19C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_7</name>
              <description>Data byte 7 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_6</name>
              <description>Data byte 6 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_5</name>
              <description>Data byte 5 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_4</name>
              <description>Data byte 4 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CS18</name>
          <description>Message Buffer 18 CS Register</description>
          <addressOffset>0x1A0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TIME_STAMP</name>
              <description>Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DLC</name>
              <description>Length of the data to be stored/transmitted.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RTR</name>
              <description>Remote Transmission Request. One/zero for remote/data frame.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>IDE</name>
              <description>ID Extended. One/zero for extended/standard format frame.</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SRR</name>
              <description>Substitute Remote Request. Contains a fixed recessive bit.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CODE</name>
              <description>Reserved</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ID18</name>
          <description>Message Buffer 18 ID Register</description>
          <addressOffset>0x1A4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>EXT</name>
              <description>Contains extended (LOW word) identifier of message buffer.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>18</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>STD</name>
              <description>Contains standard/extended (HIGH word) identifier of message buffer.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>11</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PRIO</name>
              <description>Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD018</name>
          <description>Message Buffer 18 WORD0 Register</description>
          <addressOffset>0x1A8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_3</name>
              <description>Data byte 3 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_2</name>
              <description>Data byte 2 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_1</name>
              <description>Data byte 1 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_0</name>
              <description>Data byte 0 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD118</name>
          <description>Message Buffer 18 WORD1 Register</description>
          <addressOffset>0x1AC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_7</name>
              <description>Data byte 7 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_6</name>
              <description>Data byte 6 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_5</name>
              <description>Data byte 5 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_4</name>
              <description>Data byte 4 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CS19</name>
          <description>Message Buffer 19 CS Register</description>
          <addressOffset>0x1B0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TIME_STAMP</name>
              <description>Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DLC</name>
              <description>Length of the data to be stored/transmitted.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RTR</name>
              <description>Remote Transmission Request. One/zero for remote/data frame.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>IDE</name>
              <description>ID Extended. One/zero for extended/standard format frame.</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SRR</name>
              <description>Substitute Remote Request. Contains a fixed recessive bit.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CODE</name>
              <description>Reserved</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ID19</name>
          <description>Message Buffer 19 ID Register</description>
          <addressOffset>0x1B4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>EXT</name>
              <description>Contains extended (LOW word) identifier of message buffer.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>18</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>STD</name>
              <description>Contains standard/extended (HIGH word) identifier of message buffer.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>11</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PRIO</name>
              <description>Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD019</name>
          <description>Message Buffer 19 WORD0 Register</description>
          <addressOffset>0x1B8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_3</name>
              <description>Data byte 3 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_2</name>
              <description>Data byte 2 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_1</name>
              <description>Data byte 1 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_0</name>
              <description>Data byte 0 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD119</name>
          <description>Message Buffer 19 WORD1 Register</description>
          <addressOffset>0x1BC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_7</name>
              <description>Data byte 7 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_6</name>
              <description>Data byte 6 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_5</name>
              <description>Data byte 5 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_4</name>
              <description>Data byte 4 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CS20</name>
          <description>Message Buffer 20 CS Register</description>
          <addressOffset>0x1C0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TIME_STAMP</name>
              <description>Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DLC</name>
              <description>Length of the data to be stored/transmitted.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RTR</name>
              <description>Remote Transmission Request. One/zero for remote/data frame.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>IDE</name>
              <description>ID Extended. One/zero for extended/standard format frame.</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SRR</name>
              <description>Substitute Remote Request. Contains a fixed recessive bit.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CODE</name>
              <description>Reserved</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ID20</name>
          <description>Message Buffer 20 ID Register</description>
          <addressOffset>0x1C4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>EXT</name>
              <description>Contains extended (LOW word) identifier of message buffer.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>18</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>STD</name>
              <description>Contains standard/extended (HIGH word) identifier of message buffer.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>11</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PRIO</name>
              <description>Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD020</name>
          <description>Message Buffer 20 WORD0 Register</description>
          <addressOffset>0x1C8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_3</name>
              <description>Data byte 3 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_2</name>
              <description>Data byte 2 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_1</name>
              <description>Data byte 1 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_0</name>
              <description>Data byte 0 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD120</name>
          <description>Message Buffer 20 WORD1 Register</description>
          <addressOffset>0x1CC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_7</name>
              <description>Data byte 7 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_6</name>
              <description>Data byte 6 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_5</name>
              <description>Data byte 5 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_4</name>
              <description>Data byte 4 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CS21</name>
          <description>Message Buffer 21 CS Register</description>
          <addressOffset>0x1D0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TIME_STAMP</name>
              <description>Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DLC</name>
              <description>Length of the data to be stored/transmitted.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RTR</name>
              <description>Remote Transmission Request. One/zero for remote/data frame.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>IDE</name>
              <description>ID Extended. One/zero for extended/standard format frame.</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SRR</name>
              <description>Substitute Remote Request. Contains a fixed recessive bit.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CODE</name>
              <description>Reserved</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ID21</name>
          <description>Message Buffer 21 ID Register</description>
          <addressOffset>0x1D4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>EXT</name>
              <description>Contains extended (LOW word) identifier of message buffer.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>18</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>STD</name>
              <description>Contains standard/extended (HIGH word) identifier of message buffer.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>11</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PRIO</name>
              <description>Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD021</name>
          <description>Message Buffer 21 WORD0 Register</description>
          <addressOffset>0x1D8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_3</name>
              <description>Data byte 3 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_2</name>
              <description>Data byte 2 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_1</name>
              <description>Data byte 1 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_0</name>
              <description>Data byte 0 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD121</name>
          <description>Message Buffer 21 WORD1 Register</description>
          <addressOffset>0x1DC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_7</name>
              <description>Data byte 7 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_6</name>
              <description>Data byte 6 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_5</name>
              <description>Data byte 5 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_4</name>
              <description>Data byte 4 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CS22</name>
          <description>Message Buffer 22 CS Register</description>
          <addressOffset>0x1E0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TIME_STAMP</name>
              <description>Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DLC</name>
              <description>Length of the data to be stored/transmitted.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RTR</name>
              <description>Remote Transmission Request. One/zero for remote/data frame.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>IDE</name>
              <description>ID Extended. One/zero for extended/standard format frame.</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SRR</name>
              <description>Substitute Remote Request. Contains a fixed recessive bit.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CODE</name>
              <description>Reserved</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ID22</name>
          <description>Message Buffer 22 ID Register</description>
          <addressOffset>0x1E4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>EXT</name>
              <description>Contains extended (LOW word) identifier of message buffer.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>18</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>STD</name>
              <description>Contains standard/extended (HIGH word) identifier of message buffer.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>11</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PRIO</name>
              <description>Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD022</name>
          <description>Message Buffer 22 WORD0 Register</description>
          <addressOffset>0x1E8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_3</name>
              <description>Data byte 3 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_2</name>
              <description>Data byte 2 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_1</name>
              <description>Data byte 1 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_0</name>
              <description>Data byte 0 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD122</name>
          <description>Message Buffer 22 WORD1 Register</description>
          <addressOffset>0x1EC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_7</name>
              <description>Data byte 7 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_6</name>
              <description>Data byte 6 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_5</name>
              <description>Data byte 5 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_4</name>
              <description>Data byte 4 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CS23</name>
          <description>Message Buffer 23 CS Register</description>
          <addressOffset>0x1F0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TIME_STAMP</name>
              <description>Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DLC</name>
              <description>Length of the data to be stored/transmitted.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RTR</name>
              <description>Remote Transmission Request. One/zero for remote/data frame.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>IDE</name>
              <description>ID Extended. One/zero for extended/standard format frame.</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SRR</name>
              <description>Substitute Remote Request. Contains a fixed recessive bit.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CODE</name>
              <description>Reserved</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ID23</name>
          <description>Message Buffer 23 ID Register</description>
          <addressOffset>0x1F4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>EXT</name>
              <description>Contains extended (LOW word) identifier of message buffer.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>18</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>STD</name>
              <description>Contains standard/extended (HIGH word) identifier of message buffer.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>11</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PRIO</name>
              <description>Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD023</name>
          <description>Message Buffer 23 WORD0 Register</description>
          <addressOffset>0x1F8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_3</name>
              <description>Data byte 3 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_2</name>
              <description>Data byte 2 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_1</name>
              <description>Data byte 1 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_0</name>
              <description>Data byte 0 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD123</name>
          <description>Message Buffer 23 WORD1 Register</description>
          <addressOffset>0x1FC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_7</name>
              <description>Data byte 7 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_6</name>
              <description>Data byte 6 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_5</name>
              <description>Data byte 5 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_4</name>
              <description>Data byte 4 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CS24</name>
          <description>Message Buffer 24 CS Register</description>
          <addressOffset>0x200</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TIME_STAMP</name>
              <description>Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DLC</name>
              <description>Length of the data to be stored/transmitted.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RTR</name>
              <description>Remote Transmission Request. One/zero for remote/data frame.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>IDE</name>
              <description>ID Extended. One/zero for extended/standard format frame.</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SRR</name>
              <description>Substitute Remote Request. Contains a fixed recessive bit.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CODE</name>
              <description>Reserved</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ID24</name>
          <description>Message Buffer 24 ID Register</description>
          <addressOffset>0x204</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>EXT</name>
              <description>Contains extended (LOW word) identifier of message buffer.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>18</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>STD</name>
              <description>Contains standard/extended (HIGH word) identifier of message buffer.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>11</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PRIO</name>
              <description>Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD024</name>
          <description>Message Buffer 24 WORD0 Register</description>
          <addressOffset>0x208</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_3</name>
              <description>Data byte 3 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_2</name>
              <description>Data byte 2 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_1</name>
              <description>Data byte 1 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_0</name>
              <description>Data byte 0 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD124</name>
          <description>Message Buffer 24 WORD1 Register</description>
          <addressOffset>0x20C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_7</name>
              <description>Data byte 7 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_6</name>
              <description>Data byte 6 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_5</name>
              <description>Data byte 5 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_4</name>
              <description>Data byte 4 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CS25</name>
          <description>Message Buffer 25 CS Register</description>
          <addressOffset>0x210</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TIME_STAMP</name>
              <description>Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DLC</name>
              <description>Length of the data to be stored/transmitted.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RTR</name>
              <description>Remote Transmission Request. One/zero for remote/data frame.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>IDE</name>
              <description>ID Extended. One/zero for extended/standard format frame.</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SRR</name>
              <description>Substitute Remote Request. Contains a fixed recessive bit.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CODE</name>
              <description>Reserved</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ID25</name>
          <description>Message Buffer 25 ID Register</description>
          <addressOffset>0x214</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>EXT</name>
              <description>Contains extended (LOW word) identifier of message buffer.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>18</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>STD</name>
              <description>Contains standard/extended (HIGH word) identifier of message buffer.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>11</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PRIO</name>
              <description>Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD025</name>
          <description>Message Buffer 25 WORD0 Register</description>
          <addressOffset>0x218</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_3</name>
              <description>Data byte 3 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_2</name>
              <description>Data byte 2 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_1</name>
              <description>Data byte 1 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_0</name>
              <description>Data byte 0 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD125</name>
          <description>Message Buffer 25 WORD1 Register</description>
          <addressOffset>0x21C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_7</name>
              <description>Data byte 7 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_6</name>
              <description>Data byte 6 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_5</name>
              <description>Data byte 5 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_4</name>
              <description>Data byte 4 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CS26</name>
          <description>Message Buffer 26 CS Register</description>
          <addressOffset>0x220</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TIME_STAMP</name>
              <description>Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DLC</name>
              <description>Length of the data to be stored/transmitted.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RTR</name>
              <description>Remote Transmission Request. One/zero for remote/data frame.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>IDE</name>
              <description>ID Extended. One/zero for extended/standard format frame.</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SRR</name>
              <description>Substitute Remote Request. Contains a fixed recessive bit.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CODE</name>
              <description>Reserved</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ID26</name>
          <description>Message Buffer 26 ID Register</description>
          <addressOffset>0x224</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>EXT</name>
              <description>Contains extended (LOW word) identifier of message buffer.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>18</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>STD</name>
              <description>Contains standard/extended (HIGH word) identifier of message buffer.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>11</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PRIO</name>
              <description>Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD026</name>
          <description>Message Buffer 26 WORD0 Register</description>
          <addressOffset>0x228</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_3</name>
              <description>Data byte 3 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_2</name>
              <description>Data byte 2 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_1</name>
              <description>Data byte 1 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_0</name>
              <description>Data byte 0 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD126</name>
          <description>Message Buffer 26 WORD1 Register</description>
          <addressOffset>0x22C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_7</name>
              <description>Data byte 7 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_6</name>
              <description>Data byte 6 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_5</name>
              <description>Data byte 5 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_4</name>
              <description>Data byte 4 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CS27</name>
          <description>Message Buffer 27 CS Register</description>
          <addressOffset>0x230</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TIME_STAMP</name>
              <description>Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DLC</name>
              <description>Length of the data to be stored/transmitted.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RTR</name>
              <description>Remote Transmission Request. One/zero for remote/data frame.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>IDE</name>
              <description>ID Extended. One/zero for extended/standard format frame.</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SRR</name>
              <description>Substitute Remote Request. Contains a fixed recessive bit.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CODE</name>
              <description>Reserved</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ID27</name>
          <description>Message Buffer 27 ID Register</description>
          <addressOffset>0x234</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>EXT</name>
              <description>Contains extended (LOW word) identifier of message buffer.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>18</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>STD</name>
              <description>Contains standard/extended (HIGH word) identifier of message buffer.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>11</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PRIO</name>
              <description>Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD027</name>
          <description>Message Buffer 27 WORD0 Register</description>
          <addressOffset>0x238</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_3</name>
              <description>Data byte 3 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_2</name>
              <description>Data byte 2 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_1</name>
              <description>Data byte 1 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_0</name>
              <description>Data byte 0 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD127</name>
          <description>Message Buffer 27 WORD1 Register</description>
          <addressOffset>0x23C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_7</name>
              <description>Data byte 7 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_6</name>
              <description>Data byte 6 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_5</name>
              <description>Data byte 5 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_4</name>
              <description>Data byte 4 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CS28</name>
          <description>Message Buffer 28 CS Register</description>
          <addressOffset>0x240</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TIME_STAMP</name>
              <description>Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DLC</name>
              <description>Length of the data to be stored/transmitted.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RTR</name>
              <description>Remote Transmission Request. One/zero for remote/data frame.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>IDE</name>
              <description>ID Extended. One/zero for extended/standard format frame.</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SRR</name>
              <description>Substitute Remote Request. Contains a fixed recessive bit.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CODE</name>
              <description>Reserved</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ID28</name>
          <description>Message Buffer 28 ID Register</description>
          <addressOffset>0x244</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>EXT</name>
              <description>Contains extended (LOW word) identifier of message buffer.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>18</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>STD</name>
              <description>Contains standard/extended (HIGH word) identifier of message buffer.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>11</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PRIO</name>
              <description>Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD028</name>
          <description>Message Buffer 28 WORD0 Register</description>
          <addressOffset>0x248</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_3</name>
              <description>Data byte 3 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_2</name>
              <description>Data byte 2 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_1</name>
              <description>Data byte 1 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_0</name>
              <description>Data byte 0 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD128</name>
          <description>Message Buffer 28 WORD1 Register</description>
          <addressOffset>0x24C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_7</name>
              <description>Data byte 7 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_6</name>
              <description>Data byte 6 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_5</name>
              <description>Data byte 5 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_4</name>
              <description>Data byte 4 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CS29</name>
          <description>Message Buffer 29 CS Register</description>
          <addressOffset>0x250</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TIME_STAMP</name>
              <description>Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DLC</name>
              <description>Length of the data to be stored/transmitted.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RTR</name>
              <description>Remote Transmission Request. One/zero for remote/data frame.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>IDE</name>
              <description>ID Extended. One/zero for extended/standard format frame.</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SRR</name>
              <description>Substitute Remote Request. Contains a fixed recessive bit.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CODE</name>
              <description>Reserved</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ID29</name>
          <description>Message Buffer 29 ID Register</description>
          <addressOffset>0x254</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>EXT</name>
              <description>Contains extended (LOW word) identifier of message buffer.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>18</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>STD</name>
              <description>Contains standard/extended (HIGH word) identifier of message buffer.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>11</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PRIO</name>
              <description>Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD029</name>
          <description>Message Buffer 29 WORD0 Register</description>
          <addressOffset>0x258</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_3</name>
              <description>Data byte 3 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_2</name>
              <description>Data byte 2 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_1</name>
              <description>Data byte 1 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_0</name>
              <description>Data byte 0 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD129</name>
          <description>Message Buffer 29 WORD1 Register</description>
          <addressOffset>0x25C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_7</name>
              <description>Data byte 7 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_6</name>
              <description>Data byte 6 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_5</name>
              <description>Data byte 5 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_4</name>
              <description>Data byte 4 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CS30</name>
          <description>Message Buffer 30 CS Register</description>
          <addressOffset>0x260</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TIME_STAMP</name>
              <description>Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DLC</name>
              <description>Length of the data to be stored/transmitted.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RTR</name>
              <description>Remote Transmission Request. One/zero for remote/data frame.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>IDE</name>
              <description>ID Extended. One/zero for extended/standard format frame.</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SRR</name>
              <description>Substitute Remote Request. Contains a fixed recessive bit.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CODE</name>
              <description>Reserved</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ID30</name>
          <description>Message Buffer 30 ID Register</description>
          <addressOffset>0x264</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>EXT</name>
              <description>Contains extended (LOW word) identifier of message buffer.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>18</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>STD</name>
              <description>Contains standard/extended (HIGH word) identifier of message buffer.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>11</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PRIO</name>
              <description>Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD030</name>
          <description>Message Buffer 30 WORD0 Register</description>
          <addressOffset>0x268</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_3</name>
              <description>Data byte 3 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_2</name>
              <description>Data byte 2 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_1</name>
              <description>Data byte 1 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_0</name>
              <description>Data byte 0 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD130</name>
          <description>Message Buffer 30 WORD1 Register</description>
          <addressOffset>0x26C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_7</name>
              <description>Data byte 7 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_6</name>
              <description>Data byte 6 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_5</name>
              <description>Data byte 5 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_4</name>
              <description>Data byte 4 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CS31</name>
          <description>Message Buffer 31 CS Register</description>
          <addressOffset>0x270</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TIME_STAMP</name>
              <description>Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DLC</name>
              <description>Length of the data to be stored/transmitted.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RTR</name>
              <description>Remote Transmission Request. One/zero for remote/data frame.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>IDE</name>
              <description>ID Extended. One/zero for extended/standard format frame.</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SRR</name>
              <description>Substitute Remote Request. Contains a fixed recessive bit.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CODE</name>
              <description>Reserved</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ID31</name>
          <description>Message Buffer 31 ID Register</description>
          <addressOffset>0x274</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>EXT</name>
              <description>Contains extended (LOW word) identifier of message buffer.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>18</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>STD</name>
              <description>Contains standard/extended (HIGH word) identifier of message buffer.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>11</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PRIO</name>
              <description>Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD031</name>
          <description>Message Buffer 31 WORD0 Register</description>
          <addressOffset>0x278</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_3</name>
              <description>Data byte 3 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_2</name>
              <description>Data byte 2 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_1</name>
              <description>Data byte 1 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_0</name>
              <description>Data byte 0 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD131</name>
          <description>Message Buffer 31 WORD1 Register</description>
          <addressOffset>0x27C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_7</name>
              <description>Data byte 7 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_6</name>
              <description>Data byte 6 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_5</name>
              <description>Data byte 5 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_4</name>
              <description>Data byte 4 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CS32</name>
          <description>Message Buffer 32 CS Register</description>
          <addressOffset>0x280</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TIME_STAMP</name>
              <description>Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DLC</name>
              <description>Length of the data to be stored/transmitted.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RTR</name>
              <description>Remote Transmission Request. One/zero for remote/data frame.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>IDE</name>
              <description>ID Extended. One/zero for extended/standard format frame.</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SRR</name>
              <description>Substitute Remote Request. Contains a fixed recessive bit.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CODE</name>
              <description>Reserved</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ID32</name>
          <description>Message Buffer 32 ID Register</description>
          <addressOffset>0x284</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>EXT</name>
              <description>Contains extended (LOW word) identifier of message buffer.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>18</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>STD</name>
              <description>Contains standard/extended (HIGH word) identifier of message buffer.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>11</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PRIO</name>
              <description>Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD032</name>
          <description>Message Buffer 32 WORD0 Register</description>
          <addressOffset>0x288</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_3</name>
              <description>Data byte 3 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_2</name>
              <description>Data byte 2 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_1</name>
              <description>Data byte 1 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_0</name>
              <description>Data byte 0 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD132</name>
          <description>Message Buffer 32 WORD1 Register</description>
          <addressOffset>0x28C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_7</name>
              <description>Data byte 7 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_6</name>
              <description>Data byte 6 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_5</name>
              <description>Data byte 5 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_4</name>
              <description>Data byte 4 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CS33</name>
          <description>Message Buffer 33 CS Register</description>
          <addressOffset>0x290</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TIME_STAMP</name>
              <description>Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DLC</name>
              <description>Length of the data to be stored/transmitted.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RTR</name>
              <description>Remote Transmission Request. One/zero for remote/data frame.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>IDE</name>
              <description>ID Extended. One/zero for extended/standard format frame.</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SRR</name>
              <description>Substitute Remote Request. Contains a fixed recessive bit.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CODE</name>
              <description>Reserved</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ID33</name>
          <description>Message Buffer 33 ID Register</description>
          <addressOffset>0x294</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>EXT</name>
              <description>Contains extended (LOW word) identifier of message buffer.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>18</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>STD</name>
              <description>Contains standard/extended (HIGH word) identifier of message buffer.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>11</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PRIO</name>
              <description>Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD033</name>
          <description>Message Buffer 33 WORD0 Register</description>
          <addressOffset>0x298</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_3</name>
              <description>Data byte 3 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_2</name>
              <description>Data byte 2 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_1</name>
              <description>Data byte 1 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_0</name>
              <description>Data byte 0 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD133</name>
          <description>Message Buffer 33 WORD1 Register</description>
          <addressOffset>0x29C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_7</name>
              <description>Data byte 7 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_6</name>
              <description>Data byte 6 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_5</name>
              <description>Data byte 5 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_4</name>
              <description>Data byte 4 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CS34</name>
          <description>Message Buffer 34 CS Register</description>
          <addressOffset>0x2A0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TIME_STAMP</name>
              <description>Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DLC</name>
              <description>Length of the data to be stored/transmitted.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RTR</name>
              <description>Remote Transmission Request. One/zero for remote/data frame.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>IDE</name>
              <description>ID Extended. One/zero for extended/standard format frame.</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SRR</name>
              <description>Substitute Remote Request. Contains a fixed recessive bit.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CODE</name>
              <description>Reserved</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ID34</name>
          <description>Message Buffer 34 ID Register</description>
          <addressOffset>0x2A4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>EXT</name>
              <description>Contains extended (LOW word) identifier of message buffer.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>18</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>STD</name>
              <description>Contains standard/extended (HIGH word) identifier of message buffer.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>11</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PRIO</name>
              <description>Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD034</name>
          <description>Message Buffer 34 WORD0 Register</description>
          <addressOffset>0x2A8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_3</name>
              <description>Data byte 3 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_2</name>
              <description>Data byte 2 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_1</name>
              <description>Data byte 1 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_0</name>
              <description>Data byte 0 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD134</name>
          <description>Message Buffer 34 WORD1 Register</description>
          <addressOffset>0x2AC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_7</name>
              <description>Data byte 7 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_6</name>
              <description>Data byte 6 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_5</name>
              <description>Data byte 5 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_4</name>
              <description>Data byte 4 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CS35</name>
          <description>Message Buffer 35 CS Register</description>
          <addressOffset>0x2B0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TIME_STAMP</name>
              <description>Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DLC</name>
              <description>Length of the data to be stored/transmitted.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RTR</name>
              <description>Remote Transmission Request. One/zero for remote/data frame.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>IDE</name>
              <description>ID Extended. One/zero for extended/standard format frame.</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SRR</name>
              <description>Substitute Remote Request. Contains a fixed recessive bit.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CODE</name>
              <description>Reserved</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ID35</name>
          <description>Message Buffer 35 ID Register</description>
          <addressOffset>0x2B4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>EXT</name>
              <description>Contains extended (LOW word) identifier of message buffer.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>18</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>STD</name>
              <description>Contains standard/extended (HIGH word) identifier of message buffer.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>11</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PRIO</name>
              <description>Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD035</name>
          <description>Message Buffer 35 WORD0 Register</description>
          <addressOffset>0x2B8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_3</name>
              <description>Data byte 3 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_2</name>
              <description>Data byte 2 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_1</name>
              <description>Data byte 1 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_0</name>
              <description>Data byte 0 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD135</name>
          <description>Message Buffer 35 WORD1 Register</description>
          <addressOffset>0x2BC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_7</name>
              <description>Data byte 7 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_6</name>
              <description>Data byte 6 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_5</name>
              <description>Data byte 5 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_4</name>
              <description>Data byte 4 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CS36</name>
          <description>Message Buffer 36 CS Register</description>
          <addressOffset>0x2C0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TIME_STAMP</name>
              <description>Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DLC</name>
              <description>Length of the data to be stored/transmitted.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RTR</name>
              <description>Remote Transmission Request. One/zero for remote/data frame.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>IDE</name>
              <description>ID Extended. One/zero for extended/standard format frame.</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SRR</name>
              <description>Substitute Remote Request. Contains a fixed recessive bit.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CODE</name>
              <description>Reserved</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ID36</name>
          <description>Message Buffer 36 ID Register</description>
          <addressOffset>0x2C4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>EXT</name>
              <description>Contains extended (LOW word) identifier of message buffer.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>18</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>STD</name>
              <description>Contains standard/extended (HIGH word) identifier of message buffer.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>11</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PRIO</name>
              <description>Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD036</name>
          <description>Message Buffer 36 WORD0 Register</description>
          <addressOffset>0x2C8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_3</name>
              <description>Data byte 3 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_2</name>
              <description>Data byte 2 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_1</name>
              <description>Data byte 1 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_0</name>
              <description>Data byte 0 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD136</name>
          <description>Message Buffer 36 WORD1 Register</description>
          <addressOffset>0x2CC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_7</name>
              <description>Data byte 7 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_6</name>
              <description>Data byte 6 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_5</name>
              <description>Data byte 5 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_4</name>
              <description>Data byte 4 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CS37</name>
          <description>Message Buffer 37 CS Register</description>
          <addressOffset>0x2D0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TIME_STAMP</name>
              <description>Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DLC</name>
              <description>Length of the data to be stored/transmitted.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RTR</name>
              <description>Remote Transmission Request. One/zero for remote/data frame.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>IDE</name>
              <description>ID Extended. One/zero for extended/standard format frame.</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SRR</name>
              <description>Substitute Remote Request. Contains a fixed recessive bit.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CODE</name>
              <description>Reserved</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ID37</name>
          <description>Message Buffer 37 ID Register</description>
          <addressOffset>0x2D4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>EXT</name>
              <description>Contains extended (LOW word) identifier of message buffer.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>18</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>STD</name>
              <description>Contains standard/extended (HIGH word) identifier of message buffer.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>11</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PRIO</name>
              <description>Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD037</name>
          <description>Message Buffer 37 WORD0 Register</description>
          <addressOffset>0x2D8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_3</name>
              <description>Data byte 3 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_2</name>
              <description>Data byte 2 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_1</name>
              <description>Data byte 1 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_0</name>
              <description>Data byte 0 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD137</name>
          <description>Message Buffer 37 WORD1 Register</description>
          <addressOffset>0x2DC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_7</name>
              <description>Data byte 7 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_6</name>
              <description>Data byte 6 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_5</name>
              <description>Data byte 5 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_4</name>
              <description>Data byte 4 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CS38</name>
          <description>Message Buffer 38 CS Register</description>
          <addressOffset>0x2E0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TIME_STAMP</name>
              <description>Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DLC</name>
              <description>Length of the data to be stored/transmitted.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RTR</name>
              <description>Remote Transmission Request. One/zero for remote/data frame.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>IDE</name>
              <description>ID Extended. One/zero for extended/standard format frame.</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SRR</name>
              <description>Substitute Remote Request. Contains a fixed recessive bit.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CODE</name>
              <description>Reserved</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ID38</name>
          <description>Message Buffer 38 ID Register</description>
          <addressOffset>0x2E4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>EXT</name>
              <description>Contains extended (LOW word) identifier of message buffer.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>18</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>STD</name>
              <description>Contains standard/extended (HIGH word) identifier of message buffer.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>11</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PRIO</name>
              <description>Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD038</name>
          <description>Message Buffer 38 WORD0 Register</description>
          <addressOffset>0x2E8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_3</name>
              <description>Data byte 3 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_2</name>
              <description>Data byte 2 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_1</name>
              <description>Data byte 1 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_0</name>
              <description>Data byte 0 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD138</name>
          <description>Message Buffer 38 WORD1 Register</description>
          <addressOffset>0x2EC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_7</name>
              <description>Data byte 7 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_6</name>
              <description>Data byte 6 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_5</name>
              <description>Data byte 5 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_4</name>
              <description>Data byte 4 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CS39</name>
          <description>Message Buffer 39 CS Register</description>
          <addressOffset>0x2F0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TIME_STAMP</name>
              <description>Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DLC</name>
              <description>Length of the data to be stored/transmitted.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RTR</name>
              <description>Remote Transmission Request. One/zero for remote/data frame.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>IDE</name>
              <description>ID Extended. One/zero for extended/standard format frame.</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SRR</name>
              <description>Substitute Remote Request. Contains a fixed recessive bit.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CODE</name>
              <description>Reserved</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ID39</name>
          <description>Message Buffer 39 ID Register</description>
          <addressOffset>0x2F4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>EXT</name>
              <description>Contains extended (LOW word) identifier of message buffer.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>18</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>STD</name>
              <description>Contains standard/extended (HIGH word) identifier of message buffer.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>11</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PRIO</name>
              <description>Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD039</name>
          <description>Message Buffer 39 WORD0 Register</description>
          <addressOffset>0x2F8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_3</name>
              <description>Data byte 3 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_2</name>
              <description>Data byte 2 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_1</name>
              <description>Data byte 1 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_0</name>
              <description>Data byte 0 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD139</name>
          <description>Message Buffer 39 WORD1 Register</description>
          <addressOffset>0x2FC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_7</name>
              <description>Data byte 7 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_6</name>
              <description>Data byte 6 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_5</name>
              <description>Data byte 5 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_4</name>
              <description>Data byte 4 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CS40</name>
          <description>Message Buffer 40 CS Register</description>
          <addressOffset>0x300</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TIME_STAMP</name>
              <description>Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DLC</name>
              <description>Length of the data to be stored/transmitted.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RTR</name>
              <description>Remote Transmission Request. One/zero for remote/data frame.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>IDE</name>
              <description>ID Extended. One/zero for extended/standard format frame.</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SRR</name>
              <description>Substitute Remote Request. Contains a fixed recessive bit.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CODE</name>
              <description>Reserved</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ID40</name>
          <description>Message Buffer 40 ID Register</description>
          <addressOffset>0x304</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>EXT</name>
              <description>Contains extended (LOW word) identifier of message buffer.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>18</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>STD</name>
              <description>Contains standard/extended (HIGH word) identifier of message buffer.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>11</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PRIO</name>
              <description>Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD040</name>
          <description>Message Buffer 40 WORD0 Register</description>
          <addressOffset>0x308</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_3</name>
              <description>Data byte 3 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_2</name>
              <description>Data byte 2 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_1</name>
              <description>Data byte 1 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_0</name>
              <description>Data byte 0 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD140</name>
          <description>Message Buffer 40 WORD1 Register</description>
          <addressOffset>0x30C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_7</name>
              <description>Data byte 7 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_6</name>
              <description>Data byte 6 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_5</name>
              <description>Data byte 5 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_4</name>
              <description>Data byte 4 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CS41</name>
          <description>Message Buffer 41 CS Register</description>
          <addressOffset>0x310</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TIME_STAMP</name>
              <description>Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DLC</name>
              <description>Length of the data to be stored/transmitted.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RTR</name>
              <description>Remote Transmission Request. One/zero for remote/data frame.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>IDE</name>
              <description>ID Extended. One/zero for extended/standard format frame.</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SRR</name>
              <description>Substitute Remote Request. Contains a fixed recessive bit.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CODE</name>
              <description>Reserved</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ID41</name>
          <description>Message Buffer 41 ID Register</description>
          <addressOffset>0x314</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>EXT</name>
              <description>Contains extended (LOW word) identifier of message buffer.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>18</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>STD</name>
              <description>Contains standard/extended (HIGH word) identifier of message buffer.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>11</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PRIO</name>
              <description>Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD041</name>
          <description>Message Buffer 41 WORD0 Register</description>
          <addressOffset>0x318</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_3</name>
              <description>Data byte 3 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_2</name>
              <description>Data byte 2 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_1</name>
              <description>Data byte 1 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_0</name>
              <description>Data byte 0 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD141</name>
          <description>Message Buffer 41 WORD1 Register</description>
          <addressOffset>0x31C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_7</name>
              <description>Data byte 7 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_6</name>
              <description>Data byte 6 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_5</name>
              <description>Data byte 5 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_4</name>
              <description>Data byte 4 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CS42</name>
          <description>Message Buffer 42 CS Register</description>
          <addressOffset>0x320</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TIME_STAMP</name>
              <description>Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DLC</name>
              <description>Length of the data to be stored/transmitted.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RTR</name>
              <description>Remote Transmission Request. One/zero for remote/data frame.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>IDE</name>
              <description>ID Extended. One/zero for extended/standard format frame.</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SRR</name>
              <description>Substitute Remote Request. Contains a fixed recessive bit.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CODE</name>
              <description>Reserved</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ID42</name>
          <description>Message Buffer 42 ID Register</description>
          <addressOffset>0x324</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>EXT</name>
              <description>Contains extended (LOW word) identifier of message buffer.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>18</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>STD</name>
              <description>Contains standard/extended (HIGH word) identifier of message buffer.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>11</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PRIO</name>
              <description>Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD042</name>
          <description>Message Buffer 42 WORD0 Register</description>
          <addressOffset>0x328</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_3</name>
              <description>Data byte 3 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_2</name>
              <description>Data byte 2 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_1</name>
              <description>Data byte 1 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_0</name>
              <description>Data byte 0 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD142</name>
          <description>Message Buffer 42 WORD1 Register</description>
          <addressOffset>0x32C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_7</name>
              <description>Data byte 7 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_6</name>
              <description>Data byte 6 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_5</name>
              <description>Data byte 5 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_4</name>
              <description>Data byte 4 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CS43</name>
          <description>Message Buffer 43 CS Register</description>
          <addressOffset>0x330</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TIME_STAMP</name>
              <description>Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DLC</name>
              <description>Length of the data to be stored/transmitted.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RTR</name>
              <description>Remote Transmission Request. One/zero for remote/data frame.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>IDE</name>
              <description>ID Extended. One/zero for extended/standard format frame.</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SRR</name>
              <description>Substitute Remote Request. Contains a fixed recessive bit.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CODE</name>
              <description>Reserved</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ID43</name>
          <description>Message Buffer 43 ID Register</description>
          <addressOffset>0x334</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>EXT</name>
              <description>Contains extended (LOW word) identifier of message buffer.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>18</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>STD</name>
              <description>Contains standard/extended (HIGH word) identifier of message buffer.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>11</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PRIO</name>
              <description>Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD043</name>
          <description>Message Buffer 43 WORD0 Register</description>
          <addressOffset>0x338</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_3</name>
              <description>Data byte 3 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_2</name>
              <description>Data byte 2 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_1</name>
              <description>Data byte 1 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_0</name>
              <description>Data byte 0 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD143</name>
          <description>Message Buffer 43 WORD1 Register</description>
          <addressOffset>0x33C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_7</name>
              <description>Data byte 7 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_6</name>
              <description>Data byte 6 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_5</name>
              <description>Data byte 5 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_4</name>
              <description>Data byte 4 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CS44</name>
          <description>Message Buffer 44 CS Register</description>
          <addressOffset>0x340</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TIME_STAMP</name>
              <description>Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DLC</name>
              <description>Length of the data to be stored/transmitted.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RTR</name>
              <description>Remote Transmission Request. One/zero for remote/data frame.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>IDE</name>
              <description>ID Extended. One/zero for extended/standard format frame.</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SRR</name>
              <description>Substitute Remote Request. Contains a fixed recessive bit.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CODE</name>
              <description>Reserved</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ID44</name>
          <description>Message Buffer 44 ID Register</description>
          <addressOffset>0x344</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>EXT</name>
              <description>Contains extended (LOW word) identifier of message buffer.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>18</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>STD</name>
              <description>Contains standard/extended (HIGH word) identifier of message buffer.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>11</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PRIO</name>
              <description>Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD044</name>
          <description>Message Buffer 44 WORD0 Register</description>
          <addressOffset>0x348</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_3</name>
              <description>Data byte 3 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_2</name>
              <description>Data byte 2 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_1</name>
              <description>Data byte 1 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_0</name>
              <description>Data byte 0 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD144</name>
          <description>Message Buffer 44 WORD1 Register</description>
          <addressOffset>0x34C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_7</name>
              <description>Data byte 7 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_6</name>
              <description>Data byte 6 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_5</name>
              <description>Data byte 5 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_4</name>
              <description>Data byte 4 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CS45</name>
          <description>Message Buffer 45 CS Register</description>
          <addressOffset>0x350</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TIME_STAMP</name>
              <description>Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DLC</name>
              <description>Length of the data to be stored/transmitted.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RTR</name>
              <description>Remote Transmission Request. One/zero for remote/data frame.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>IDE</name>
              <description>ID Extended. One/zero for extended/standard format frame.</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SRR</name>
              <description>Substitute Remote Request. Contains a fixed recessive bit.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CODE</name>
              <description>Reserved</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ID45</name>
          <description>Message Buffer 45 ID Register</description>
          <addressOffset>0x354</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>EXT</name>
              <description>Contains extended (LOW word) identifier of message buffer.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>18</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>STD</name>
              <description>Contains standard/extended (HIGH word) identifier of message buffer.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>11</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PRIO</name>
              <description>Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD045</name>
          <description>Message Buffer 45 WORD0 Register</description>
          <addressOffset>0x358</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_3</name>
              <description>Data byte 3 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_2</name>
              <description>Data byte 2 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_1</name>
              <description>Data byte 1 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_0</name>
              <description>Data byte 0 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD145</name>
          <description>Message Buffer 45 WORD1 Register</description>
          <addressOffset>0x35C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_7</name>
              <description>Data byte 7 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_6</name>
              <description>Data byte 6 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_5</name>
              <description>Data byte 5 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_4</name>
              <description>Data byte 4 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CS46</name>
          <description>Message Buffer 46 CS Register</description>
          <addressOffset>0x360</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TIME_STAMP</name>
              <description>Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DLC</name>
              <description>Length of the data to be stored/transmitted.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RTR</name>
              <description>Remote Transmission Request. One/zero for remote/data frame.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>IDE</name>
              <description>ID Extended. One/zero for extended/standard format frame.</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SRR</name>
              <description>Substitute Remote Request. Contains a fixed recessive bit.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CODE</name>
              <description>Reserved</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ID46</name>
          <description>Message Buffer 46 ID Register</description>
          <addressOffset>0x364</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>EXT</name>
              <description>Contains extended (LOW word) identifier of message buffer.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>18</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>STD</name>
              <description>Contains standard/extended (HIGH word) identifier of message buffer.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>11</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PRIO</name>
              <description>Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD046</name>
          <description>Message Buffer 46 WORD0 Register</description>
          <addressOffset>0x368</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_3</name>
              <description>Data byte 3 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_2</name>
              <description>Data byte 2 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_1</name>
              <description>Data byte 1 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_0</name>
              <description>Data byte 0 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD146</name>
          <description>Message Buffer 46 WORD1 Register</description>
          <addressOffset>0x36C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_7</name>
              <description>Data byte 7 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_6</name>
              <description>Data byte 6 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_5</name>
              <description>Data byte 5 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_4</name>
              <description>Data byte 4 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CS47</name>
          <description>Message Buffer 47 CS Register</description>
          <addressOffset>0x370</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TIME_STAMP</name>
              <description>Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DLC</name>
              <description>Length of the data to be stored/transmitted.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RTR</name>
              <description>Remote Transmission Request. One/zero for remote/data frame.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>IDE</name>
              <description>ID Extended. One/zero for extended/standard format frame.</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SRR</name>
              <description>Substitute Remote Request. Contains a fixed recessive bit.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CODE</name>
              <description>Reserved</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ID47</name>
          <description>Message Buffer 47 ID Register</description>
          <addressOffset>0x374</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>EXT</name>
              <description>Contains extended (LOW word) identifier of message buffer.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>18</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>STD</name>
              <description>Contains standard/extended (HIGH word) identifier of message buffer.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>11</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PRIO</name>
              <description>Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD047</name>
          <description>Message Buffer 47 WORD0 Register</description>
          <addressOffset>0x378</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_3</name>
              <description>Data byte 3 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_2</name>
              <description>Data byte 2 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_1</name>
              <description>Data byte 1 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_0</name>
              <description>Data byte 0 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD147</name>
          <description>Message Buffer 47 WORD1 Register</description>
          <addressOffset>0x37C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_7</name>
              <description>Data byte 7 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_6</name>
              <description>Data byte 6 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_5</name>
              <description>Data byte 5 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_4</name>
              <description>Data byte 4 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CS48</name>
          <description>Message Buffer 48 CS Register</description>
          <addressOffset>0x380</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TIME_STAMP</name>
              <description>Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DLC</name>
              <description>Length of the data to be stored/transmitted.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RTR</name>
              <description>Remote Transmission Request. One/zero for remote/data frame.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>IDE</name>
              <description>ID Extended. One/zero for extended/standard format frame.</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SRR</name>
              <description>Substitute Remote Request. Contains a fixed recessive bit.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CODE</name>
              <description>Reserved</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ID48</name>
          <description>Message Buffer 48 ID Register</description>
          <addressOffset>0x384</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>EXT</name>
              <description>Contains extended (LOW word) identifier of message buffer.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>18</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>STD</name>
              <description>Contains standard/extended (HIGH word) identifier of message buffer.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>11</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PRIO</name>
              <description>Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD048</name>
          <description>Message Buffer 48 WORD0 Register</description>
          <addressOffset>0x388</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_3</name>
              <description>Data byte 3 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_2</name>
              <description>Data byte 2 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_1</name>
              <description>Data byte 1 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_0</name>
              <description>Data byte 0 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD148</name>
          <description>Message Buffer 48 WORD1 Register</description>
          <addressOffset>0x38C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_7</name>
              <description>Data byte 7 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_6</name>
              <description>Data byte 6 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_5</name>
              <description>Data byte 5 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_4</name>
              <description>Data byte 4 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CS49</name>
          <description>Message Buffer 49 CS Register</description>
          <addressOffset>0x390</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TIME_STAMP</name>
              <description>Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DLC</name>
              <description>Length of the data to be stored/transmitted.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RTR</name>
              <description>Remote Transmission Request. One/zero for remote/data frame.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>IDE</name>
              <description>ID Extended. One/zero for extended/standard format frame.</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SRR</name>
              <description>Substitute Remote Request. Contains a fixed recessive bit.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CODE</name>
              <description>Reserved</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ID49</name>
          <description>Message Buffer 49 ID Register</description>
          <addressOffset>0x394</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>EXT</name>
              <description>Contains extended (LOW word) identifier of message buffer.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>18</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>STD</name>
              <description>Contains standard/extended (HIGH word) identifier of message buffer.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>11</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PRIO</name>
              <description>Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD049</name>
          <description>Message Buffer 49 WORD0 Register</description>
          <addressOffset>0x398</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_3</name>
              <description>Data byte 3 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_2</name>
              <description>Data byte 2 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_1</name>
              <description>Data byte 1 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_0</name>
              <description>Data byte 0 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD149</name>
          <description>Message Buffer 49 WORD1 Register</description>
          <addressOffset>0x39C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_7</name>
              <description>Data byte 7 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_6</name>
              <description>Data byte 6 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_5</name>
              <description>Data byte 5 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_4</name>
              <description>Data byte 4 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CS50</name>
          <description>Message Buffer 50 CS Register</description>
          <addressOffset>0x3A0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TIME_STAMP</name>
              <description>Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DLC</name>
              <description>Length of the data to be stored/transmitted.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RTR</name>
              <description>Remote Transmission Request. One/zero for remote/data frame.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>IDE</name>
              <description>ID Extended. One/zero for extended/standard format frame.</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SRR</name>
              <description>Substitute Remote Request. Contains a fixed recessive bit.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CODE</name>
              <description>Reserved</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ID50</name>
          <description>Message Buffer 50 ID Register</description>
          <addressOffset>0x3A4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>EXT</name>
              <description>Contains extended (LOW word) identifier of message buffer.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>18</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>STD</name>
              <description>Contains standard/extended (HIGH word) identifier of message buffer.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>11</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PRIO</name>
              <description>Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD050</name>
          <description>Message Buffer 50 WORD0 Register</description>
          <addressOffset>0x3A8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_3</name>
              <description>Data byte 3 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_2</name>
              <description>Data byte 2 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_1</name>
              <description>Data byte 1 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_0</name>
              <description>Data byte 0 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD150</name>
          <description>Message Buffer 50 WORD1 Register</description>
          <addressOffset>0x3AC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_7</name>
              <description>Data byte 7 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_6</name>
              <description>Data byte 6 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_5</name>
              <description>Data byte 5 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_4</name>
              <description>Data byte 4 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CS51</name>
          <description>Message Buffer 51 CS Register</description>
          <addressOffset>0x3B0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TIME_STAMP</name>
              <description>Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DLC</name>
              <description>Length of the data to be stored/transmitted.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RTR</name>
              <description>Remote Transmission Request. One/zero for remote/data frame.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>IDE</name>
              <description>ID Extended. One/zero for extended/standard format frame.</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SRR</name>
              <description>Substitute Remote Request. Contains a fixed recessive bit.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CODE</name>
              <description>Reserved</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ID51</name>
          <description>Message Buffer 51 ID Register</description>
          <addressOffset>0x3B4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>EXT</name>
              <description>Contains extended (LOW word) identifier of message buffer.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>18</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>STD</name>
              <description>Contains standard/extended (HIGH word) identifier of message buffer.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>11</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PRIO</name>
              <description>Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD051</name>
          <description>Message Buffer 51 WORD0 Register</description>
          <addressOffset>0x3B8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_3</name>
              <description>Data byte 3 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_2</name>
              <description>Data byte 2 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_1</name>
              <description>Data byte 1 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_0</name>
              <description>Data byte 0 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD151</name>
          <description>Message Buffer 51 WORD1 Register</description>
          <addressOffset>0x3BC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_7</name>
              <description>Data byte 7 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_6</name>
              <description>Data byte 6 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_5</name>
              <description>Data byte 5 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_4</name>
              <description>Data byte 4 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CS52</name>
          <description>Message Buffer 52 CS Register</description>
          <addressOffset>0x3C0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TIME_STAMP</name>
              <description>Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DLC</name>
              <description>Length of the data to be stored/transmitted.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RTR</name>
              <description>Remote Transmission Request. One/zero for remote/data frame.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>IDE</name>
              <description>ID Extended. One/zero for extended/standard format frame.</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SRR</name>
              <description>Substitute Remote Request. Contains a fixed recessive bit.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CODE</name>
              <description>Reserved</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ID52</name>
          <description>Message Buffer 52 ID Register</description>
          <addressOffset>0x3C4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>EXT</name>
              <description>Contains extended (LOW word) identifier of message buffer.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>18</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>STD</name>
              <description>Contains standard/extended (HIGH word) identifier of message buffer.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>11</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PRIO</name>
              <description>Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD052</name>
          <description>Message Buffer 52 WORD0 Register</description>
          <addressOffset>0x3C8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_3</name>
              <description>Data byte 3 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_2</name>
              <description>Data byte 2 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_1</name>
              <description>Data byte 1 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_0</name>
              <description>Data byte 0 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD152</name>
          <description>Message Buffer 52 WORD1 Register</description>
          <addressOffset>0x3CC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_7</name>
              <description>Data byte 7 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_6</name>
              <description>Data byte 6 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_5</name>
              <description>Data byte 5 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_4</name>
              <description>Data byte 4 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CS53</name>
          <description>Message Buffer 53 CS Register</description>
          <addressOffset>0x3D0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TIME_STAMP</name>
              <description>Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DLC</name>
              <description>Length of the data to be stored/transmitted.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RTR</name>
              <description>Remote Transmission Request. One/zero for remote/data frame.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>IDE</name>
              <description>ID Extended. One/zero for extended/standard format frame.</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SRR</name>
              <description>Substitute Remote Request. Contains a fixed recessive bit.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CODE</name>
              <description>Reserved</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ID53</name>
          <description>Message Buffer 53 ID Register</description>
          <addressOffset>0x3D4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>EXT</name>
              <description>Contains extended (LOW word) identifier of message buffer.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>18</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>STD</name>
              <description>Contains standard/extended (HIGH word) identifier of message buffer.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>11</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PRIO</name>
              <description>Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD053</name>
          <description>Message Buffer 53 WORD0 Register</description>
          <addressOffset>0x3D8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_3</name>
              <description>Data byte 3 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_2</name>
              <description>Data byte 2 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_1</name>
              <description>Data byte 1 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_0</name>
              <description>Data byte 0 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD153</name>
          <description>Message Buffer 53 WORD1 Register</description>
          <addressOffset>0x3DC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_7</name>
              <description>Data byte 7 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_6</name>
              <description>Data byte 6 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_5</name>
              <description>Data byte 5 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_4</name>
              <description>Data byte 4 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CS54</name>
          <description>Message Buffer 54 CS Register</description>
          <addressOffset>0x3E0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TIME_STAMP</name>
              <description>Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DLC</name>
              <description>Length of the data to be stored/transmitted.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RTR</name>
              <description>Remote Transmission Request. One/zero for remote/data frame.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>IDE</name>
              <description>ID Extended. One/zero for extended/standard format frame.</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SRR</name>
              <description>Substitute Remote Request. Contains a fixed recessive bit.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CODE</name>
              <description>Reserved</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ID54</name>
          <description>Message Buffer 54 ID Register</description>
          <addressOffset>0x3E4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>EXT</name>
              <description>Contains extended (LOW word) identifier of message buffer.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>18</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>STD</name>
              <description>Contains standard/extended (HIGH word) identifier of message buffer.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>11</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PRIO</name>
              <description>Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD054</name>
          <description>Message Buffer 54 WORD0 Register</description>
          <addressOffset>0x3E8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_3</name>
              <description>Data byte 3 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_2</name>
              <description>Data byte 2 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_1</name>
              <description>Data byte 1 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_0</name>
              <description>Data byte 0 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD154</name>
          <description>Message Buffer 54 WORD1 Register</description>
          <addressOffset>0x3EC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_7</name>
              <description>Data byte 7 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_6</name>
              <description>Data byte 6 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_5</name>
              <description>Data byte 5 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_4</name>
              <description>Data byte 4 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CS55</name>
          <description>Message Buffer 55 CS Register</description>
          <addressOffset>0x3F0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TIME_STAMP</name>
              <description>Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DLC</name>
              <description>Length of the data to be stored/transmitted.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RTR</name>
              <description>Remote Transmission Request. One/zero for remote/data frame.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>IDE</name>
              <description>ID Extended. One/zero for extended/standard format frame.</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SRR</name>
              <description>Substitute Remote Request. Contains a fixed recessive bit.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CODE</name>
              <description>Reserved</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ID55</name>
          <description>Message Buffer 55 ID Register</description>
          <addressOffset>0x3F4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>EXT</name>
              <description>Contains extended (LOW word) identifier of message buffer.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>18</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>STD</name>
              <description>Contains standard/extended (HIGH word) identifier of message buffer.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>11</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PRIO</name>
              <description>Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD055</name>
          <description>Message Buffer 55 WORD0 Register</description>
          <addressOffset>0x3F8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_3</name>
              <description>Data byte 3 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_2</name>
              <description>Data byte 2 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_1</name>
              <description>Data byte 1 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_0</name>
              <description>Data byte 0 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD155</name>
          <description>Message Buffer 55 WORD1 Register</description>
          <addressOffset>0x3FC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_7</name>
              <description>Data byte 7 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_6</name>
              <description>Data byte 6 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_5</name>
              <description>Data byte 5 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_4</name>
              <description>Data byte 4 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CS56</name>
          <description>Message Buffer 56 CS Register</description>
          <addressOffset>0x400</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TIME_STAMP</name>
              <description>Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DLC</name>
              <description>Length of the data to be stored/transmitted.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RTR</name>
              <description>Remote Transmission Request. One/zero for remote/data frame.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>IDE</name>
              <description>ID Extended. One/zero for extended/standard format frame.</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SRR</name>
              <description>Substitute Remote Request. Contains a fixed recessive bit.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CODE</name>
              <description>Reserved</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ID56</name>
          <description>Message Buffer 56 ID Register</description>
          <addressOffset>0x404</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>EXT</name>
              <description>Contains extended (LOW word) identifier of message buffer.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>18</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>STD</name>
              <description>Contains standard/extended (HIGH word) identifier of message buffer.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>11</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PRIO</name>
              <description>Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD056</name>
          <description>Message Buffer 56 WORD0 Register</description>
          <addressOffset>0x408</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_3</name>
              <description>Data byte 3 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_2</name>
              <description>Data byte 2 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_1</name>
              <description>Data byte 1 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_0</name>
              <description>Data byte 0 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD156</name>
          <description>Message Buffer 56 WORD1 Register</description>
          <addressOffset>0x40C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_7</name>
              <description>Data byte 7 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_6</name>
              <description>Data byte 6 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_5</name>
              <description>Data byte 5 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_4</name>
              <description>Data byte 4 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CS57</name>
          <description>Message Buffer 57 CS Register</description>
          <addressOffset>0x410</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TIME_STAMP</name>
              <description>Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DLC</name>
              <description>Length of the data to be stored/transmitted.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RTR</name>
              <description>Remote Transmission Request. One/zero for remote/data frame.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>IDE</name>
              <description>ID Extended. One/zero for extended/standard format frame.</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SRR</name>
              <description>Substitute Remote Request. Contains a fixed recessive bit.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CODE</name>
              <description>Reserved</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ID57</name>
          <description>Message Buffer 57 ID Register</description>
          <addressOffset>0x414</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>EXT</name>
              <description>Contains extended (LOW word) identifier of message buffer.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>18</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>STD</name>
              <description>Contains standard/extended (HIGH word) identifier of message buffer.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>11</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PRIO</name>
              <description>Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD057</name>
          <description>Message Buffer 57 WORD0 Register</description>
          <addressOffset>0x418</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_3</name>
              <description>Data byte 3 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_2</name>
              <description>Data byte 2 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_1</name>
              <description>Data byte 1 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_0</name>
              <description>Data byte 0 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD157</name>
          <description>Message Buffer 57 WORD1 Register</description>
          <addressOffset>0x41C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_7</name>
              <description>Data byte 7 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_6</name>
              <description>Data byte 6 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_5</name>
              <description>Data byte 5 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_4</name>
              <description>Data byte 4 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CS58</name>
          <description>Message Buffer 58 CS Register</description>
          <addressOffset>0x420</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TIME_STAMP</name>
              <description>Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DLC</name>
              <description>Length of the data to be stored/transmitted.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RTR</name>
              <description>Remote Transmission Request. One/zero for remote/data frame.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>IDE</name>
              <description>ID Extended. One/zero for extended/standard format frame.</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SRR</name>
              <description>Substitute Remote Request. Contains a fixed recessive bit.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CODE</name>
              <description>Reserved</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ID58</name>
          <description>Message Buffer 58 ID Register</description>
          <addressOffset>0x424</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>EXT</name>
              <description>Contains extended (LOW word) identifier of message buffer.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>18</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>STD</name>
              <description>Contains standard/extended (HIGH word) identifier of message buffer.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>11</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PRIO</name>
              <description>Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD058</name>
          <description>Message Buffer 58 WORD0 Register</description>
          <addressOffset>0x428</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_3</name>
              <description>Data byte 3 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_2</name>
              <description>Data byte 2 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_1</name>
              <description>Data byte 1 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_0</name>
              <description>Data byte 0 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD158</name>
          <description>Message Buffer 58 WORD1 Register</description>
          <addressOffset>0x42C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_7</name>
              <description>Data byte 7 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_6</name>
              <description>Data byte 6 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_5</name>
              <description>Data byte 5 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_4</name>
              <description>Data byte 4 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CS59</name>
          <description>Message Buffer 59 CS Register</description>
          <addressOffset>0x430</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TIME_STAMP</name>
              <description>Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DLC</name>
              <description>Length of the data to be stored/transmitted.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RTR</name>
              <description>Remote Transmission Request. One/zero for remote/data frame.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>IDE</name>
              <description>ID Extended. One/zero for extended/standard format frame.</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SRR</name>
              <description>Substitute Remote Request. Contains a fixed recessive bit.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CODE</name>
              <description>Reserved</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ID59</name>
          <description>Message Buffer 59 ID Register</description>
          <addressOffset>0x434</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>EXT</name>
              <description>Contains extended (LOW word) identifier of message buffer.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>18</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>STD</name>
              <description>Contains standard/extended (HIGH word) identifier of message buffer.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>11</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PRIO</name>
              <description>Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD059</name>
          <description>Message Buffer 59 WORD0 Register</description>
          <addressOffset>0x438</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_3</name>
              <description>Data byte 3 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_2</name>
              <description>Data byte 2 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_1</name>
              <description>Data byte 1 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_0</name>
              <description>Data byte 0 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD159</name>
          <description>Message Buffer 59 WORD1 Register</description>
          <addressOffset>0x43C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_7</name>
              <description>Data byte 7 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_6</name>
              <description>Data byte 6 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_5</name>
              <description>Data byte 5 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_4</name>
              <description>Data byte 4 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CS60</name>
          <description>Message Buffer 60 CS Register</description>
          <addressOffset>0x440</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TIME_STAMP</name>
              <description>Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DLC</name>
              <description>Length of the data to be stored/transmitted.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RTR</name>
              <description>Remote Transmission Request. One/zero for remote/data frame.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>IDE</name>
              <description>ID Extended. One/zero for extended/standard format frame.</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SRR</name>
              <description>Substitute Remote Request. Contains a fixed recessive bit.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CODE</name>
              <description>Reserved</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ID60</name>
          <description>Message Buffer 60 ID Register</description>
          <addressOffset>0x444</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>EXT</name>
              <description>Contains extended (LOW word) identifier of message buffer.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>18</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>STD</name>
              <description>Contains standard/extended (HIGH word) identifier of message buffer.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>11</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PRIO</name>
              <description>Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD060</name>
          <description>Message Buffer 60 WORD0 Register</description>
          <addressOffset>0x448</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_3</name>
              <description>Data byte 3 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_2</name>
              <description>Data byte 2 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_1</name>
              <description>Data byte 1 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_0</name>
              <description>Data byte 0 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD160</name>
          <description>Message Buffer 60 WORD1 Register</description>
          <addressOffset>0x44C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_7</name>
              <description>Data byte 7 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_6</name>
              <description>Data byte 6 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_5</name>
              <description>Data byte 5 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_4</name>
              <description>Data byte 4 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CS61</name>
          <description>Message Buffer 61 CS Register</description>
          <addressOffset>0x450</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TIME_STAMP</name>
              <description>Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DLC</name>
              <description>Length of the data to be stored/transmitted.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RTR</name>
              <description>Remote Transmission Request. One/zero for remote/data frame.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>IDE</name>
              <description>ID Extended. One/zero for extended/standard format frame.</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SRR</name>
              <description>Substitute Remote Request. Contains a fixed recessive bit.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CODE</name>
              <description>Reserved</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ID61</name>
          <description>Message Buffer 61 ID Register</description>
          <addressOffset>0x454</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>EXT</name>
              <description>Contains extended (LOW word) identifier of message buffer.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>18</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>STD</name>
              <description>Contains standard/extended (HIGH word) identifier of message buffer.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>11</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PRIO</name>
              <description>Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD061</name>
          <description>Message Buffer 61 WORD0 Register</description>
          <addressOffset>0x458</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_3</name>
              <description>Data byte 3 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_2</name>
              <description>Data byte 2 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_1</name>
              <description>Data byte 1 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_0</name>
              <description>Data byte 0 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD161</name>
          <description>Message Buffer 61 WORD1 Register</description>
          <addressOffset>0x45C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_7</name>
              <description>Data byte 7 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_6</name>
              <description>Data byte 6 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_5</name>
              <description>Data byte 5 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_4</name>
              <description>Data byte 4 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CS62</name>
          <description>Message Buffer 62 CS Register</description>
          <addressOffset>0x460</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TIME_STAMP</name>
              <description>Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DLC</name>
              <description>Length of the data to be stored/transmitted.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RTR</name>
              <description>Remote Transmission Request. One/zero for remote/data frame.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>IDE</name>
              <description>ID Extended. One/zero for extended/standard format frame.</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SRR</name>
              <description>Substitute Remote Request. Contains a fixed recessive bit.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CODE</name>
              <description>Reserved</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ID62</name>
          <description>Message Buffer 62 ID Register</description>
          <addressOffset>0x464</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>EXT</name>
              <description>Contains extended (LOW word) identifier of message buffer.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>18</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>STD</name>
              <description>Contains standard/extended (HIGH word) identifier of message buffer.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>11</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PRIO</name>
              <description>Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD062</name>
          <description>Message Buffer 62 WORD0 Register</description>
          <addressOffset>0x468</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_3</name>
              <description>Data byte 3 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_2</name>
              <description>Data byte 2 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_1</name>
              <description>Data byte 1 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_0</name>
              <description>Data byte 0 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD162</name>
          <description>Message Buffer 62 WORD1 Register</description>
          <addressOffset>0x46C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_7</name>
              <description>Data byte 7 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_6</name>
              <description>Data byte 6 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_5</name>
              <description>Data byte 5 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_4</name>
              <description>Data byte 4 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CS63</name>
          <description>Message Buffer 63 CS Register</description>
          <addressOffset>0x470</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TIME_STAMP</name>
              <description>Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DLC</name>
              <description>Length of the data to be stored/transmitted.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RTR</name>
              <description>Remote Transmission Request. One/zero for remote/data frame.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>IDE</name>
              <description>ID Extended. One/zero for extended/standard format frame.</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SRR</name>
              <description>Substitute Remote Request. Contains a fixed recessive bit.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CODE</name>
              <description>Reserved</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ID63</name>
          <description>Message Buffer 63 ID Register</description>
          <addressOffset>0x474</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>EXT</name>
              <description>Contains extended (LOW word) identifier of message buffer.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>18</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>STD</name>
              <description>Contains standard/extended (HIGH word) identifier of message buffer.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>11</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PRIO</name>
              <description>Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD063</name>
          <description>Message Buffer 63 WORD0 Register</description>
          <addressOffset>0x478</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_3</name>
              <description>Data byte 3 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_2</name>
              <description>Data byte 2 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_1</name>
              <description>Data byte 1 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_0</name>
              <description>Data byte 0 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WORD163</name>
          <description>Message Buffer 63 WORD1 Register</description>
          <addressOffset>0x47C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_BYTE_7</name>
              <description>Data byte 7 of Rx/Tx frame.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_6</name>
              <description>Data byte 6 of Rx/Tx frame.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_5</name>
              <description>Data byte 5 of Rx/Tx frame.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_BYTE_4</name>
              <description>Data byte 4 of Rx/Tx frame.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <dim>64</dim>
          <dimIncrement>0x4</dimIncrement>
          <name>RXIMR%s</name>
          <description>Rx Individual Mask Registers</description>
          <addressOffset>0x880</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MI</name>
              <description>These bits mask both Mailbox filter and Rx FIFO ID Filter Table element in distinct ways</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>MI_0</name>
                  <description>the corresponding bit in the filter is &quot;don't care&quot;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MI_1</name>
                  <description>The corresponding bit in the filter is checked</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>GFWR</name>
          <description>Glitch Filter Width Registers</description>
          <addressOffset>0x9E0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x7F</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>GFWR</name>
              <description>It determines the Glitch Filter Width</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
      </registers>
    </peripheral>
    <peripheral derivedFrom="CAN1">
      <name>CAN2</name>
      <description>CAN</description>
      <groupName>CAN</groupName>
      <prependToName>CAN2_</prependToName>
      <baseAddress>0x2094000</baseAddress>
      <addressBlock>
        <offset>0</offset>
        <size>0x9E4</size>
        <usage>registers</usage>
      </addressBlock>
      <interrupt>
        <name>CAN2</name>
        <value>143</value>
      </interrupt>
    </peripheral>
    <peripheral>
      <name>GPT1</name>
      <description>GPT</description>
      <groupName>GPT</groupName>
      <prependToName>GPT1_</prependToName>
      <baseAddress>0x2098000</baseAddress>
      <headerStructName>GPT</headerStructName>
      <addressBlock>
        <offset>0</offset>
        <size>0x28</size>
        <usage>registers</usage>
      </addressBlock>
      <interrupt>
        <name>GPT1</name>
        <value>87</value>
      </interrupt>
      <registers>
        <register>
          <name>CR</name>
          <description>GPT Control Register</description>
          <addressOffset>0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>EN</name>
              <description>GPT Enable</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>EN_0</name>
                  <description>GPT is disabled.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>EN_1</name>
                  <description>GPT is enabled.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ENMOD</name>
              <description>GPT Enable mode</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ENMOD_0</name>
                  <description>GPT counter will retain its value when it is disabled.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENMOD_1</name>
                  <description>GPT counter value is reset to 0 when it is disabled.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DBGEN</name>
              <description>GPT debug mode enable</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DBGEN_0</name>
                  <description>GPT is disabled in debug mode.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DBGEN_1</name>
                  <description>GPT is enabled in debug mode.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WAITEN</name>
              <description>GPT Wait Mode enable</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>WAITEN_0</name>
                  <description>GPT is disabled in wait mode.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WAITEN_1</name>
                  <description>GPT is enabled in wait mode.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DOZEEN</name>
              <description>GPT Doze Mode Enable</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DOZEEN_0</name>
                  <description>GPT is disabled in doze mode.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DOZEEN_1</name>
                  <description>GPT is enabled in doze mode.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>STOPEN</name>
              <description>GPT Stop Mode enable</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>STOPEN_0</name>
                  <description>GPT is disabled in Stop mode.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>STOPEN_1</name>
                  <description>GPT is enabled in Stop mode.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CLKSRC</name>
              <description>Clock Source select</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CLKSRC_0</name>
                  <description>No clock</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLKSRC_1</name>
                  <description>Peripheral Clock (ipg_clk)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLKSRC_2</name>
                  <description>High Frequency Reference Clock (ipg_clk_highfreq)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLKSRC_3</name>
                  <description>External Clock</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLKSRC_4</name>
                  <description>Low Frequency Reference Clock (ipg_clk_32k)</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLKSRC_5</name>
                  <description>Crystal oscillator as Reference Clock (ipg_clk_24M)</description>
                  <value>0x5</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>FRR</name>
              <description>Free-Run or Restart mode</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>FRR_0</name>
                  <description>Restart mode</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FRR_1</name>
                  <description>Free-Run mode</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>EN_24M</name>
              <description>Enable 24 MHz clock input from crystal</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>EN_24M_0</name>
                  <description>24M clock disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>EN_24M_1</name>
                  <description>24M clock enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SWR</name>
              <description>Software reset</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SWR_0</name>
                  <description>GPT is not in reset state</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SWR_1</name>
                  <description>GPT is in reset state</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>IM1</name>
              <description>See IM2</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>IM2</name>
              <description>IM2 (bits 19-18, Input Capture Channel 2 operating mode) IM1 (bits 17-16, Input Capture Channel 1 operating mode) The IMn bit field determines the transition on the input pin (for Input capture channel n), which will trigger a capture event</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>IM2_0</name>
                  <description>capture disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>IM2_1</name>
                  <description>capture on rising edge only</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>IM2_2</name>
                  <description>capture on falling edge only</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>IM2_3</name>
                  <description>capture on both edges</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>OM1</name>
              <description>See OM3</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>OM2</name>
              <description>See OM3</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>OM3</name>
              <description>OM3 (bits 28-26) controls the Output Compare Channel 3 operating mode</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>OM3_0</name>
                  <description>Output disconnected. No response on pin.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>OM3_1</name>
                  <description>Toggle output pin</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>OM3_2</name>
                  <description>Clear output pin</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>OM3_3</name>
                  <description>Set output pin</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>FO1</name>
              <description>See F03</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>1</bitWidth>
              <access>write-only</access>
            </field>
            <field>
              <name>FO2</name>
              <description>See F03</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>write-only</access>
            </field>
            <field>
              <name>FO3</name>
              <description>FO3 Force Output Compare Channel 3 FO2 Force Output Compare Channel 2 FO1 Force Output Compare Channel 1 The FOn bit causes the pin action programmed for the timer Output Compare n pin (according to the OMn bits in this register)</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>write-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>FO3_0</name>
                  <description>Writing a 0 has no effect.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FO3_1</name>
                  <description>Causes the programmed pin action on the timer Output Compare n pin; the OFn flag is not set.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>PR</name>
          <description>GPT Prescaler Register</description>
          <addressOffset>0x4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>PRESCALER</name>
              <description>Prescaler bits</description>
              <bitOffset>0</bitOffset>
              <bitWidth>12</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PRESCALER_0</name>
                  <description>Divide by 1</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PRESCALER_1</name>
                  <description>Divide by 2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PRESCALER_4095</name>
                  <description>Divide by 4096</description>
                  <value>0xFFF</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PRESCALER24M</name>
              <description>Prescaler bits</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PRESCALER24M_0</name>
                  <description>Divide by 1</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PRESCALER24M_1</name>
                  <description>Divide by 2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PRESCALER24M_15</name>
                  <description>Divide by 16</description>
                  <value>0xF</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SR</name>
          <description>GPT Status Register</description>
          <addressOffset>0x8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>OF1</name>
              <description>See OF3</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
            </field>
            <field>
              <name>OF2</name>
              <description>See OF3</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
            </field>
            <field>
              <name>OF3</name>
              <description>OF3 Output Compare 3 Flag OF2 Output Compare 2 Flag OF1 Output Compare 1 Flag The OFn bit indicates that a compare event has occurred on Output Compare channel n</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
              <enumeratedValues>
                <enumeratedValue>
                  <name>OF3_0</name>
                  <description>Compare event has not occurred.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>OF3_1</name>
                  <description>Compare event has occurred.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>IF1</name>
              <description>See IF2</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
            </field>
            <field>
              <name>IF2</name>
              <description>IF2 Input capture 2 Flag IF1 Input capture 1 Flag The IFn bit indicates that a capture event has occurred on Input Capture channel n</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
              <enumeratedValues>
                <enumeratedValue>
                  <name>IF2_0</name>
                  <description>Capture event has not occurred.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>IF2_1</name>
                  <description>Capture event has occurred.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ROV</name>
              <description>Rollover Flag</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ROV_0</name>
                  <description>Rollover has not occurred.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ROV_1</name>
                  <description>Rollover has occurred.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>IR</name>
          <description>GPT Interrupt Register</description>
          <addressOffset>0xC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>OF1IE</name>
              <description>See OF3IE</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>OF2IE</name>
              <description>See OF3IE</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>OF3IE</name>
              <description>OF3IE Output Compare 3 Interrupt Enable OF2IE Output Compare 2 Interrupt Enable OF1IE Output Compare 1 Interrupt Enable The OFnIE bit controls the Output Compare Channel n interrupt</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>OF3IE_0</name>
                  <description>Output Compare Channel n interrupt is disabled.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>OF3IE_1</name>
                  <description>Output Compare Channel n interrupt is enabled.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>IF1IE</name>
              <description>See IF2IE</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>IF2IE</name>
              <description>IF2IE Input capture 2 Interrupt Enable IF1IE Input capture 1 Interrupt Enable The IFnIE bit controls the IFnIE Input Capture n Interrupt Enable</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>IF2IE_0</name>
                  <description>IF2IE Input Capture n Interrupt Enable is disabled.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>IF2IE_1</name>
                  <description>IF2IE Input Capture n Interrupt Enable is enabled.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ROVIE</name>
              <description>Rollover Interrupt Enable. The ROVIE bit controls the Rollover interrupt.</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ROVIE_0</name>
                  <description>Rollover interrupt is disabled.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ROVIE_1</name>
                  <description>Rollover interrupt enabled.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>OCR1</name>
          <description>GPT Output Compare Register 1</description>
          <addressOffset>0x10</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0xFFFFFFFF</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>COMP</name>
              <description>Compare Value</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>OCR2</name>
          <description>GPT Output Compare Register 2</description>
          <addressOffset>0x14</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0xFFFFFFFF</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>COMP</name>
              <description>Compare Value</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>OCR3</name>
          <description>GPT Output Compare Register 3</description>
          <addressOffset>0x18</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0xFFFFFFFF</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>COMP</name>
              <description>Compare Value</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ICR1</name>
          <description>GPT Input Capture Register 1</description>
          <addressOffset>0x1C</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>CAPT</name>
              <description>Capture Value</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ICR2</name>
          <description>GPT Input Capture Register 2</description>
          <addressOffset>0x20</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>CAPT</name>
              <description>Capture Value</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CNT</name>
          <description>GPT Counter Register</description>
          <addressOffset>0x24</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>COUNT</name>
              <description>Counter Value. The COUNT bits show the current count value of the GPT counter.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
      </registers>
    </peripheral>
    <peripheral derivedFrom="GPT1">
      <name>GPT2</name>
      <description>GPT</description>
      <groupName>GPT</groupName>
      <prependToName>GPT2_</prependToName>
      <baseAddress>0x20E8000</baseAddress>
      <addressBlock>
        <offset>0</offset>
        <size>0x28</size>
        <usage>registers</usage>
      </addressBlock>
      <interrupt>
        <name>GPT2</name>
        <value>141</value>
      </interrupt>
    </peripheral>
    <peripheral>
      <name>GPIO1</name>
      <description>GPIO</description>
      <groupName>GPIO</groupName>
      <prependToName>GPIO1_</prependToName>
      <baseAddress>0x209C000</baseAddress>
      <headerStructName>GPIO</headerStructName>
      <addressBlock>
        <offset>0</offset>
        <size>0x20</size>
        <usage>registers</usage>
      </addressBlock>
      <interrupt>
        <name>GPIO1_INT7</name>
        <value>90</value>
      </interrupt>
      <interrupt>
        <name>GPIO1_INT6</name>
        <value>91</value>
      </interrupt>
      <interrupt>
        <name>GPIO1_INT5</name>
        <value>92</value>
      </interrupt>
      <interrupt>
        <name>GPIO1_INT4</name>
        <value>93</value>
      </interrupt>
      <interrupt>
        <name>GPIO1_INT3</name>
        <value>94</value>
      </interrupt>
      <interrupt>
        <name>GPIO1_INT2</name>
        <value>95</value>
      </interrupt>
      <interrupt>
        <name>GPIO1_INT1</name>
        <value>96</value>
      </interrupt>
      <interrupt>
        <name>GPIO1_INT0</name>
        <value>97</value>
      </interrupt>
      <interrupt>
        <name>GPIO1_Combined_0_15</name>
        <value>98</value>
      </interrupt>
      <interrupt>
        <name>GPIO1_Combined_16_31</name>
        <value>99</value>
      </interrupt>
      <registers>
        <register>
          <name>DR</name>
          <description>GPIO data register</description>
          <addressOffset>0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DR</name>
              <description>Data bits</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>GDIR</name>
          <description>GPIO direction register</description>
          <addressOffset>0x4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>GDIR</name>
              <description>GPIO direction bits</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>INPUT</name>
                  <description>GPIO is configured as input.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>OUTPUT</name>
                  <description>GPIO is configured as output.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>PSR</name>
          <description>GPIO pad status register</description>
          <addressOffset>0x8</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>PSR</name>
              <description>GPIO pad status bits (status bits)</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ICR1</name>
          <description>GPIO interrupt configuration register1</description>
          <addressOffset>0xC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ICR0</name>
              <description>Interrupt configuration 1 fields</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LOW_LEVEL</name>
                  <description>Interrupt n is low-level sensitive.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HIGH_LEVEL</name>
                  <description>Interrupt n is high-level sensitive.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RISING_EDGE</name>
                  <description>Interrupt n is rising-edge sensitive.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FALLING_EDGE</name>
                  <description>Interrupt n is falling-edge sensitive.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ICR1</name>
              <description>Interrupt configuration 1 fields</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LOW_LEVEL</name>
                  <description>Interrupt n is low-level sensitive.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HIGH_LEVEL</name>
                  <description>Interrupt n is high-level sensitive.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RISING_EDGE</name>
                  <description>Interrupt n is rising-edge sensitive.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FALLING_EDGE</name>
                  <description>Interrupt n is falling-edge sensitive.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ICR2</name>
              <description>Interrupt configuration 1 fields</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LOW_LEVEL</name>
                  <description>Interrupt n is low-level sensitive.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HIGH_LEVEL</name>
                  <description>Interrupt n is high-level sensitive.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RISING_EDGE</name>
                  <description>Interrupt n is rising-edge sensitive.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FALLING_EDGE</name>
                  <description>Interrupt n is falling-edge sensitive.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ICR3</name>
              <description>Interrupt configuration 1 fields</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LOW_LEVEL</name>
                  <description>Interrupt n is low-level sensitive.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HIGH_LEVEL</name>
                  <description>Interrupt n is high-level sensitive.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RISING_EDGE</name>
                  <description>Interrupt n is rising-edge sensitive.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FALLING_EDGE</name>
                  <description>Interrupt n is falling-edge sensitive.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ICR4</name>
              <description>Interrupt configuration 1 fields</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LOW_LEVEL</name>
                  <description>Interrupt n is low-level sensitive.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HIGH_LEVEL</name>
                  <description>Interrupt n is high-level sensitive.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RISING_EDGE</name>
                  <description>Interrupt n is rising-edge sensitive.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FALLING_EDGE</name>
                  <description>Interrupt n is falling-edge sensitive.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ICR5</name>
              <description>Interrupt configuration 1 fields</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LOW_LEVEL</name>
                  <description>Interrupt n is low-level sensitive.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HIGH_LEVEL</name>
                  <description>Interrupt n is high-level sensitive.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RISING_EDGE</name>
                  <description>Interrupt n is rising-edge sensitive.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FALLING_EDGE</name>
                  <description>Interrupt n is falling-edge sensitive.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ICR6</name>
              <description>Interrupt configuration 1 fields</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LOW_LEVEL</name>
                  <description>Interrupt n is low-level sensitive.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HIGH_LEVEL</name>
                  <description>Interrupt n is high-level sensitive.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RISING_EDGE</name>
                  <description>Interrupt n is rising-edge sensitive.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FALLING_EDGE</name>
                  <description>Interrupt n is falling-edge sensitive.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ICR7</name>
              <description>Interrupt configuration 1 fields</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LOW_LEVEL</name>
                  <description>Interrupt n is low-level sensitive.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HIGH_LEVEL</name>
                  <description>Interrupt n is high-level sensitive.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RISING_EDGE</name>
                  <description>Interrupt n is rising-edge sensitive.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FALLING_EDGE</name>
                  <description>Interrupt n is falling-edge sensitive.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ICR8</name>
              <description>Interrupt configuration 1 fields</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LOW_LEVEL</name>
                  <description>Interrupt n is low-level sensitive.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HIGH_LEVEL</name>
                  <description>Interrupt n is high-level sensitive.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RISING_EDGE</name>
                  <description>Interrupt n is rising-edge sensitive.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FALLING_EDGE</name>
                  <description>Interrupt n is falling-edge sensitive.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ICR9</name>
              <description>Interrupt configuration 1 fields</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LOW_LEVEL</name>
                  <description>Interrupt n is low-level sensitive.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HIGH_LEVEL</name>
                  <description>Interrupt n is high-level sensitive.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RISING_EDGE</name>
                  <description>Interrupt n is rising-edge sensitive.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FALLING_EDGE</name>
                  <description>Interrupt n is falling-edge sensitive.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ICR10</name>
              <description>Interrupt configuration 1 fields</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LOW_LEVEL</name>
                  <description>Interrupt n is low-level sensitive.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HIGH_LEVEL</name>
                  <description>Interrupt n is high-level sensitive.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RISING_EDGE</name>
                  <description>Interrupt n is rising-edge sensitive.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FALLING_EDGE</name>
                  <description>Interrupt n is falling-edge sensitive.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ICR11</name>
              <description>Interrupt configuration 1 fields</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LOW_LEVEL</name>
                  <description>Interrupt n is low-level sensitive.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HIGH_LEVEL</name>
                  <description>Interrupt n is high-level sensitive.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RISING_EDGE</name>
                  <description>Interrupt n is rising-edge sensitive.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FALLING_EDGE</name>
                  <description>Interrupt n is falling-edge sensitive.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ICR12</name>
              <description>Interrupt configuration 1 fields</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LOW_LEVEL</name>
                  <description>Interrupt n is low-level sensitive.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HIGH_LEVEL</name>
                  <description>Interrupt n is high-level sensitive.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RISING_EDGE</name>
                  <description>Interrupt n is rising-edge sensitive.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FALLING_EDGE</name>
                  <description>Interrupt n is falling-edge sensitive.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ICR13</name>
              <description>Interrupt configuration 1 fields</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LOW_LEVEL</name>
                  <description>Interrupt n is low-level sensitive.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HIGH_LEVEL</name>
                  <description>Interrupt n is high-level sensitive.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RISING_EDGE</name>
                  <description>Interrupt n is rising-edge sensitive.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FALLING_EDGE</name>
                  <description>Interrupt n is falling-edge sensitive.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ICR14</name>
              <description>Interrupt configuration 1 fields</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LOW_LEVEL</name>
                  <description>Interrupt n is low-level sensitive.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HIGH_LEVEL</name>
                  <description>Interrupt n is high-level sensitive.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RISING_EDGE</name>
                  <description>Interrupt n is rising-edge sensitive.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FALLING_EDGE</name>
                  <description>Interrupt n is falling-edge sensitive.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ICR15</name>
              <description>Interrupt configuration 1 fields</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LOW_LEVEL</name>
                  <description>Interrupt n is low-level sensitive.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HIGH_LEVEL</name>
                  <description>Interrupt n is high-level sensitive.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RISING_EDGE</name>
                  <description>Interrupt n is rising-edge sensitive.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FALLING_EDGE</name>
                  <description>Interrupt n is falling-edge sensitive.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>ICR2</name>
          <description>GPIO interrupt configuration register2</description>
          <addressOffset>0x10</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ICR16</name>
              <description>Interrupt configuration 2 fields</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LOW_LEVEL</name>
                  <description>Interrupt n is low-level sensitive.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HIGH_LEVEL</name>
                  <description>Interrupt n is high-level sensitive.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RISING_EDGE</name>
                  <description>Interrupt n is rising-edge sensitive.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FALLING_EDGE</name>
                  <description>Interrupt n is falling-edge sensitive.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ICR17</name>
              <description>Interrupt configuration 2 fields</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LOW_LEVEL</name>
                  <description>Interrupt n is low-level sensitive.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HIGH_LEVEL</name>
                  <description>Interrupt n is high-level sensitive.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RISING_EDGE</name>
                  <description>Interrupt n is rising-edge sensitive.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FALLING_EDGE</name>
                  <description>Interrupt n is falling-edge sensitive.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ICR18</name>
              <description>Interrupt configuration 2 fields</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LOW_LEVEL</name>
                  <description>Interrupt n is low-level sensitive.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HIGH_LEVEL</name>
                  <description>Interrupt n is high-level sensitive.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RISING_EDGE</name>
                  <description>Interrupt n is rising-edge sensitive.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FALLING_EDGE</name>
                  <description>Interrupt n is falling-edge sensitive.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ICR19</name>
              <description>Interrupt configuration 2 fields</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LOW_LEVEL</name>
                  <description>Interrupt n is low-level sensitive.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HIGH_LEVEL</name>
                  <description>Interrupt n is high-level sensitive.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RISING_EDGE</name>
                  <description>Interrupt n is rising-edge sensitive.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FALLING_EDGE</name>
                  <description>Interrupt n is falling-edge sensitive.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ICR20</name>
              <description>Interrupt configuration 2 fields</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LOW_LEVEL</name>
                  <description>Interrupt n is low-level sensitive.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HIGH_LEVEL</name>
                  <description>Interrupt n is high-level sensitive.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RISING_EDGE</name>
                  <description>Interrupt n is rising-edge sensitive.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FALLING_EDGE</name>
                  <description>Interrupt n is falling-edge sensitive.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ICR21</name>
              <description>Interrupt configuration 2 fields</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LOW_LEVEL</name>
                  <description>Interrupt n is low-level sensitive.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HIGH_LEVEL</name>
                  <description>Interrupt n is high-level sensitive.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RISING_EDGE</name>
                  <description>Interrupt n is rising-edge sensitive.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FALLING_EDGE</name>
                  <description>Interrupt n is falling-edge sensitive.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ICR22</name>
              <description>Interrupt configuration 2 fields</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LOW_LEVEL</name>
                  <description>Interrupt n is low-level sensitive.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HIGH_LEVEL</name>
                  <description>Interrupt n is high-level sensitive.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RISING_EDGE</name>
                  <description>Interrupt n is rising-edge sensitive.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FALLING_EDGE</name>
                  <description>Interrupt n is falling-edge sensitive.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ICR23</name>
              <description>Interrupt configuration 2 fields</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LOW_LEVEL</name>
                  <description>Interrupt n is low-level sensitive.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HIGH_LEVEL</name>
                  <description>Interrupt n is high-level sensitive.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RISING_EDGE</name>
                  <description>Interrupt n is rising-edge sensitive.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FALLING_EDGE</name>
                  <description>Interrupt n is falling-edge sensitive.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ICR24</name>
              <description>Interrupt configuration 2 fields</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LOW_LEVEL</name>
                  <description>Interrupt n is low-level sensitive.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HIGH_LEVEL</name>
                  <description>Interrupt n is high-level sensitive.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RISING_EDGE</name>
                  <description>Interrupt n is rising-edge sensitive.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FALLING_EDGE</name>
                  <description>Interrupt n is falling-edge sensitive.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ICR25</name>
              <description>Interrupt configuration 2 fields</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LOW_LEVEL</name>
                  <description>Interrupt n is low-level sensitive.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HIGH_LEVEL</name>
                  <description>Interrupt n is high-level sensitive.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RISING_EDGE</name>
                  <description>Interrupt n is rising-edge sensitive.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FALLING_EDGE</name>
                  <description>Interrupt n is falling-edge sensitive.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ICR26</name>
              <description>Interrupt configuration 2 fields</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LOW_LEVEL</name>
                  <description>Interrupt n is low-level sensitive.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HIGH_LEVEL</name>
                  <description>Interrupt n is high-level sensitive.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RISING_EDGE</name>
                  <description>Interrupt n is rising-edge sensitive.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FALLING_EDGE</name>
                  <description>Interrupt n is falling-edge sensitive.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ICR27</name>
              <description>Interrupt configuration 2 fields</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LOW_LEVEL</name>
                  <description>Interrupt n is low-level sensitive.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HIGH_LEVEL</name>
                  <description>Interrupt n is high-level sensitive.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RISING_EDGE</name>
                  <description>Interrupt n is rising-edge sensitive.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FALLING_EDGE</name>
                  <description>Interrupt n is falling-edge sensitive.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ICR28</name>
              <description>Interrupt configuration 2 fields</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LOW_LEVEL</name>
                  <description>Interrupt n is low-level sensitive.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HIGH_LEVEL</name>
                  <description>Interrupt n is high-level sensitive.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RISING_EDGE</name>
                  <description>Interrupt n is rising-edge sensitive.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FALLING_EDGE</name>
                  <description>Interrupt n is falling-edge sensitive.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ICR29</name>
              <description>Interrupt configuration 2 fields</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LOW_LEVEL</name>
                  <description>Interrupt n is low-level sensitive.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HIGH_LEVEL</name>
                  <description>Interrupt n is high-level sensitive.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RISING_EDGE</name>
                  <description>Interrupt n is rising-edge sensitive.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FALLING_EDGE</name>
                  <description>Interrupt n is falling-edge sensitive.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ICR30</name>
              <description>Interrupt configuration 2 fields</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LOW_LEVEL</name>
                  <description>Interrupt n is low-level sensitive.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HIGH_LEVEL</name>
                  <description>Interrupt n is high-level sensitive.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RISING_EDGE</name>
                  <description>Interrupt n is rising-edge sensitive.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FALLING_EDGE</name>
                  <description>Interrupt n is falling-edge sensitive.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ICR31</name>
              <description>Interrupt configuration 2 fields</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LOW_LEVEL</name>
                  <description>Interrupt n is low-level sensitive.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HIGH_LEVEL</name>
                  <description>Interrupt n is high-level sensitive.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RISING_EDGE</name>
                  <description>Interrupt n is rising-edge sensitive.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FALLING_EDGE</name>
                  <description>Interrupt n is falling-edge sensitive.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>IMR</name>
          <description>GPIO interrupt mask register</description>
          <addressOffset>0x14</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>IMR</name>
              <description>Interrupt Mask bits</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>UNMASKED</name>
                  <description>Interrupt n is disabled.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MASKED</name>
                  <description>Interrupt n is enabled.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>ISR</name>
          <description>GPIO interrupt status register</description>
          <addressOffset>0x18</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ISR</name>
              <description>Interrupt status bits - Bit n of this register is asserted (active high) when the active condition (as determined by the corresponding ICR bit) is detected on the GPIO input and is waiting for service</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
            </field>
          </fields>
        </register>
        <register>
          <name>EDGE_SEL</name>
          <description>GPIO edge select register</description>
          <addressOffset>0x1C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>GPIO_EDGE_SEL</name>
              <description>Edge select</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
      </registers>
    </peripheral>
    <peripheral derivedFrom="GPIO1">
      <name>GPIO2</name>
      <description>GPIO</description>
      <groupName>GPIO</groupName>
      <prependToName>GPIO2_</prependToName>
      <baseAddress>0x20A0000</baseAddress>
      <addressBlock>
        <offset>0</offset>
        <size>0x20</size>
        <usage>registers</usage>
      </addressBlock>
      <interrupt>
        <name>GPIO2_Combined_0_15</name>
        <value>100</value>
      </interrupt>
      <interrupt>
        <name>GPIO2_Combined_16_31</name>
        <value>101</value>
      </interrupt>
    </peripheral>
    <peripheral derivedFrom="GPIO1">
      <name>GPIO3</name>
      <description>GPIO</description>
      <groupName>GPIO</groupName>
      <prependToName>GPIO3_</prependToName>
      <baseAddress>0x20A4000</baseAddress>
      <addressBlock>
        <offset>0</offset>
        <size>0x20</size>
        <usage>registers</usage>
      </addressBlock>
      <interrupt>
        <name>GPIO3_Combined_0_15</name>
        <value>102</value>
      </interrupt>
      <interrupt>
        <name>GPIO3_Combined_16_31</name>
        <value>103</value>
      </interrupt>
    </peripheral>
    <peripheral derivedFrom="GPIO1">
      <name>GPIO4</name>
      <description>GPIO</description>
      <groupName>GPIO</groupName>
      <prependToName>GPIO4_</prependToName>
      <baseAddress>0x20A8000</baseAddress>
      <addressBlock>
        <offset>0</offset>
        <size>0x20</size>
        <usage>registers</usage>
      </addressBlock>
      <interrupt>
        <name>GPIO4_Combined_0_15</name>
        <value>104</value>
      </interrupt>
      <interrupt>
        <name>GPIO4_Combined_16_31</name>
        <value>105</value>
      </interrupt>
    </peripheral>
    <peripheral derivedFrom="GPIO1">
      <name>GPIO5</name>
      <description>GPIO</description>
      <groupName>GPIO</groupName>
      <prependToName>GPIO5_</prependToName>
      <baseAddress>0x20AC000</baseAddress>
      <addressBlock>
        <offset>0</offset>
        <size>0x20</size>
        <usage>registers</usage>
      </addressBlock>
      <interrupt>
        <name>GPIO5_Combined_0_15</name>
        <value>106</value>
      </interrupt>
      <interrupt>
        <name>GPIO5_Combined_16_31</name>
        <value>107</value>
      </interrupt>
    </peripheral>
    <peripheral>
      <name>SNVS</name>
      <description>SNVS</description>
      <groupName>SNVS</groupName>
      <prependToName>SNVS_</prependToName>
      <baseAddress>0x20B0000</baseAddress>
      <addressBlock>
        <offset>0</offset>
        <size>0xC00</size>
        <usage>registers</usage>
      </addressBlock>
      <interrupt>
        <name>SNVS</name>
        <value>36</value>
      </interrupt>
      <interrupt>
        <name>SNVS_Consolidated</name>
        <value>51</value>
      </interrupt>
      <interrupt>
        <name>SNVS_Security</name>
        <value>52</value>
      </interrupt>
      <registers>
        <register>
          <name>HPLR</name>
          <description>SNVS_HP Lock register</description>
          <addressOffset>0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MC_SL</name>
              <description>Monotonic Counter Soft Lock When set, it prevents any writes (increments) to the MC registers and the MC_ENV bit</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>MC_SL_0</name>
                  <description>Write access (increment) is allowed.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MC_SL_1</name>
                  <description>Write access (increment) is not allowed.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>GPR_SL</name>
              <description>General-Purpose Register Soft Lock When set, it prevents any writes to the GPR</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>GPR_SL_0</name>
                  <description>Write access is allowed.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>GPR_SL_1</name>
                  <description>Write access is not allowed.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>HPCOMR</name>
          <description>SNVS_HP Command register</description>
          <addressOffset>0x4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>LP_SWR</name>
              <description>LP Software Reset When set, it resets the SNVS_LP section</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>write-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LP_SWR_0</name>
                  <description>No action</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LP_SWR_1</name>
                  <description>Reset LP section</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>LP_SWR_DIS</name>
              <description>LP Software Reset Disable When set, it disables the LP software reset</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LP_SWR_DIS_0</name>
                  <description>LP software reset is enabled.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LP_SWR_DIS_1</name>
                  <description>LP software reset is disabled.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>NPSWA_EN</name>
              <description>Non-Privileged Software Access Enable When set, it allows non-privileged software to access all SNVS registers, including those that are privileged-software read/write access only</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HPCR</name>
          <description>SNVS_HP Control register</description>
          <addressOffset>0x8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RTC_EN</name>
              <description>HP Real-Time Counter Enable</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RTC_EN_0</name>
                  <description>RTC is disabled.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RTC_EN_1</name>
                  <description>RTC is enabled.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HPTA_EN</name>
              <description>HP Time Alarm Enable When set, the time alarm interrupt is generated if the value in the HP time alarm registers is equal to the value of the HP real-time counter</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HPTA_EN_0</name>
                  <description>HP time alarm interrupt is disabled.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HPTA_EN_1</name>
                  <description>HP time alarm interrupt is enabled.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PI_EN</name>
              <description>HP Periodic Interrupt Enable The periodic interrupt can be generated only if the HP real-time counter is enabled</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PI_EN_0</name>
                  <description>HP periodic interrupt is disabled.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PI_EN_1</name>
                  <description>HP periodic interrupt is enabled.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PI_FREQ</name>
              <description>Periodic Interrupt Frequency Defines the frequency of the periodic interrupt</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PI_FREQ_0</name>
                  <description>- Bit 0 of the RTC is selected as the source of the periodic interrupt.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PI_FREQ_1</name>
                  <description>- Bit 1 of the RTC is selected as the source of the periodic interrupt.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PI_FREQ_2</name>
                  <description>- Bit 2 of the RTC is selected as the source of the periodic interrupt.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PI_FREQ_3</name>
                  <description>- Bit 3 of the RTC is selected as the source of the periodic interrupt.</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PI_FREQ_4</name>
                  <description>- Bit 4 of the RTC is selected as the source of the periodic interrupt.</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PI_FREQ_5</name>
                  <description>- Bit 5 of the RTC is selected as the source of the periodic interrupt.</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PI_FREQ_6</name>
                  <description>- Bit 6 of the RTC is selected as the source of the periodic interrupt.</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PI_FREQ_7</name>
                  <description>- Bit 7 of the RTC is selected as the source of the periodic interrupt.</description>
                  <value>0x7</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PI_FREQ_8</name>
                  <description>- Bit 8 of the RTC is selected as the source of the periodic interrupt.</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PI_FREQ_9</name>
                  <description>- Bit 9 of the RTC is selected as the source of the periodic interrupt.</description>
                  <value>0x9</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PI_FREQ_10</name>
                  <description>- Bit 10 of the RTC is selected as the source of the periodic interrupt.</description>
                  <value>0xA</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PI_FREQ_11</name>
                  <description>- Bit 11 of the RTC is selected as the source of the periodic interrupt.</description>
                  <value>0xB</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PI_FREQ_12</name>
                  <description>- Bit 12 of the RTC is selected as the source of the periodic interrupt.</description>
                  <value>0xC</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PI_FREQ_13</name>
                  <description>- Bit 13 of the RTC is selected as the source of the periodic interrupt.</description>
                  <value>0xD</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PI_FREQ_14</name>
                  <description>- Bit 14 of the RTC is selected as the source of the periodic interrupt.</description>
                  <value>0xE</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PI_FREQ_15</name>
                  <description>- Bit 15 of the RTC is selected as the source of the periodic interrupt.</description>
                  <value>0xF</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HPCALB_EN</name>
              <description>HP Real-Time Counter Calibration Enabled Indicates that the time-calibration mechanism is enabled.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HPCALB_EN_0</name>
                  <description>HP timer calibration is disabled.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HPCALB_EN_1</name>
                  <description>HP timer calibration is enabled.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HPCALB_VAL</name>
              <description>HP Calibration Value Defines the signed calibration value for the HP real-time counter</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HPCALB_VAL_0</name>
                  <description>+0 counts per each 32768 ticks of the counter</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HPCALB_VAL_1</name>
                  <description>+1 counts per each 32768 ticks of the counter</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HPCALB_VAL_2</name>
                  <description>+2 counts per each 32768 ticks of the counter</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HPCALB_VAL_15</name>
                  <description>+15 counts per each 32768 ticks of the counter</description>
                  <value>0xF</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HPCALB_VAL_16</name>
                  <description>-16 counts per each 32768 ticks of the counter</description>
                  <value>0x10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HPCALB_VAL_17</name>
                  <description>-15 counts per each 32768 ticks of the counter</description>
                  <value>0x11</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HPCALB_VAL_30</name>
                  <description>-2 counts per each 32768 ticks of the counter</description>
                  <value>0x1E</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HPCALB_VAL_31</name>
                  <description>-1 counts per each 32768 ticks of the counter</description>
                  <value>0x1F</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BTN_CONFIG</name>
              <description>Button configuration</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BTN_MASK</name>
              <description>Button interrupt mask</description>
              <bitOffset>0x1B</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HPSR</name>
          <description>SNVS_HP Status register</description>
          <addressOffset>0x14</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x80000000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BTN</name>
              <description>Value of the BTN input</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>BI</name>
              <description>Button interrupt. The ipi_snvs_btn_int_b signal was asserted.</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
            </field>
          </fields>
        </register>
        <register>
          <name>HPRTCMR</name>
          <description>SNVS_HP Real-Time Counter MSB Register</description>
          <addressOffset>0x24</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RTC</name>
              <description>HP Real-Time Counter Most significant 32 bits</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HPRTCLR</name>
          <description>SNVS_HP Real-Time Counter LSB Register</description>
          <addressOffset>0x28</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RTC</name>
              <description>HP Real-Time Counter Least significant 32 bits</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HPTAMR</name>
          <description>SNVS_HP Time Alarm MSB Register</description>
          <addressOffset>0x2C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>HPTA</name>
              <description>HP Time Alarm Most significant 15 bits</description>
              <bitOffset>0</bitOffset>
              <bitWidth>15</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HPTALR</name>
          <description>SNVS_HP Time Alarm LSB Register</description>
          <addressOffset>0x30</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>HPTA</name>
              <description>HP Time Alarm The least significant bits</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>LPLR</name>
          <description>SNVS_LP Lock Register</description>
          <addressOffset>0x34</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MC_HL</name>
              <description>Monotonic Counter Hard Lock When set, it blocks any writes (increments) to the MC registers and the MC_ENV bit</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>MC_HL_0</name>
                  <description>Write access (increment) is allowed.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MC_HL_1</name>
                  <description>Write access (increment) is not allowed.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>GPR_HL</name>
              <description>General-Purpose Register Hard Lock When set, it blocks any writes to the GPR</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>GPR_HL_0</name>
                  <description>Write access is allowed.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>GPR_HL_1</name>
                  <description>Write access is not allowed.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>LPCR</name>
          <description>SNVS_LP Control Register</description>
          <addressOffset>0x38</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x20</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MC_ENV</name>
              <description>Monotonic Counter Enable and Valid When set, the MC can be incremented (by a write transaction to the LPSMCMR or LPSMCLR)</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>MC_ENV_0</name>
                  <description>MC is disabled or invalid.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MC_ENV_1</name>
                  <description>MC is enabled and valid.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DP_EN</name>
              <description>Dumb PMIC Enabled When set, the software can control the system power</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DP_EN_0</name>
                  <description>Smart PMIC is enabled.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DP_EN_1</name>
                  <description>Dumb PMIC is enabled.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TOP</name>
              <description>Turn off System Power Asserting this bit causes a signal to be sent to the power management IC to turn the system power off</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TOP_0</name>
                  <description>Leave the system power on.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TOP_1</name>
                  <description>Turn the system power off.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PWR_GLITCH_EN</name>
              <description>By default, the detection of a power glitch does not cause the pmic_en_b signal to be asserted</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BTN_PRESS_TIME</name>
              <description>Button press timeout values for the PMIC logic</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DEBOUNCE</name>
              <description>This field configures the amount of debounce time for the BTN input signal</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ON_TIME</name>
              <description>The ON_TIME field is used to configure the period of time after the BTN is asserted before the pmic_en_b is asserted to turn on the SoC power</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PK_EN</name>
              <description>PMIC On Request Enable</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PK_OVERRIDE</name>
              <description>PMIC On Request Override</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>LPSR</name>
          <description>SNVS_LP Status Register</description>
          <addressOffset>0x4C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x8</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MCR</name>
              <description>Monotonic Counter Rollover</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
              <enumeratedValues>
                <enumeratedValue>
                  <name>MCR_0</name>
                  <description>MC did not reach its maximum value.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MCR_1</name>
                  <description>MC reached its maximum value.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>EO</name>
              <description>Emergency Off This bit is set when a power off is requested.</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
              <enumeratedValues>
                <enumeratedValue>
                  <name>EO_0</name>
                  <description>Emergency off is not detected.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>EO_1</name>
                  <description>Emergency off is detected.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPO</name>
              <description>Set Power Off The SPO bit is set when the set_pwr_off_irq interrupt is triggered, which happens when the software writes a 1 to the TOP bit in the LPCR or when the power button is pressed longer than the configured debounce time</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPO_0</name>
                  <description>Emergency off is not detected.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPO_1</name>
                  <description>Emergency off is detected.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>LPSMCMR</name>
          <description>SNVS_LP Secure Monotonic Counter MSB Register</description>
          <addressOffset>0x5C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MON_COUNTER</name>
              <description>Monotonic Counter Most-Significant 16 Bits The MC is incremented by one when: A write transaction to the LPSMCMR register or the LPSMCLR register is detected</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>MC_ERA_BITS</name>
              <description>Monotonic Counter Era Bits These bits are the inputs to the module and are typically connected to the fuses</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>LPSMCLR</name>
          <description>SNVS_LP Secure Monotonic Counter LSB Register</description>
          <addressOffset>0x60</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MON_COUNTER</name>
              <description>Monotonic Counter bits The MC is incremented by one when: A write transaction to the LPSMCMR register or the LPSMCLR register is detected</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>LPGPR</name>
          <description>SNVS_LP General-Purpose Register</description>
          <addressOffset>0x68</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>GPR</name>
              <description>General-Purpose Register When the GPR_SL or GPR_HL bit is set, the register can't be programmed.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HPVIDR1</name>
          <description>SNVS_HP Version ID Register 1</description>
          <addressOffset>0xBF8</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0x3E0300</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MINOR_REV</name>
              <description>SNVS block minor version number</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>MAJOR_REV</name>
              <description>SNVS block major version number</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>IP_ID</name>
              <description>SNVS block ID</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HPVIDR2</name>
          <description>SNVS_HP Version ID Register 2</description>
          <addressOffset>0xBFC</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0x3000000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>CONFIG_OPT</name>
              <description>SNVS Configuration Option</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>ECO_REV</name>
              <description>SNVS ECO Revision</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>INTG_OPT</name>
              <description>SNVS Integration Option</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>IP_ERA</name>
              <description>Era of the IP design</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
      </registers>
    </peripheral>
    <peripheral>
      <name>KPP</name>
      <description>KPP Registers</description>
      <groupName>KPP</groupName>
      <prependToName>KPP_</prependToName>
      <baseAddress>0x20B8000</baseAddress>
      <addressBlock>
        <offset>0</offset>
        <size>0x8</size>
        <usage>registers</usage>
      </addressBlock>
      <interrupt>
        <name>KPP</name>
        <value>114</value>
      </interrupt>
      <registers>
        <register>
          <name>KPCR</name>
          <description>Keypad Control Register</description>
          <addressOffset>0</addressOffset>
          <size>16</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFF</resetMask>
          <fields>
            <field>
              <name>KRE</name>
              <description>Keypad Row Enable</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>KRE_0</name>
                  <description>Row is not included in the keypad key press detect.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>KRE_1</name>
                  <description>Row is included in the keypad key press detect.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>KCO</name>
              <description>Keypad Column Strobe Open-Drain Enable</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TOTEM_POLE</name>
                  <description>Column strobe output is totem pole drive.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>OPEN_DRAIN</name>
                  <description>Column strobe output is open drain.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>KPSR</name>
          <description>Keypad Status Register</description>
          <addressOffset>0x2</addressOffset>
          <size>16</size>
          <access>read-write</access>
          <resetValue>0x400</resetValue>
          <resetMask>0xFFFF</resetMask>
          <fields>
            <field>
              <name>KPKD</name>
              <description>Keypad Key Depress</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
              <enumeratedValues>
                <enumeratedValue>
                  <name>KPKD_0</name>
                  <description>No key presses detected</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>KPKD_1</name>
                  <description>A key has been depressed</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>KPKR</name>
              <description>Keypad Key Release</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
              <enumeratedValues>
                <enumeratedValue>
                  <name>KPKR_0</name>
                  <description>No key release detected</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>KPKR_1</name>
                  <description>All keys have been released</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>KDSC</name>
              <description>Key Depress Synchronizer Clear</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>write-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>KDSC_0</name>
                  <description>No effect</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>KDSC_1</name>
                  <description>Set bits that clear the keypad depress synchronizer chain</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>KRSS</name>
              <description>Key Release Synchronizer Set</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>write-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>KRSS_0</name>
                  <description>No effect</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>KRSS_1</name>
                  <description>Set bits which sets keypad release synchronizer chain</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>KDIE</name>
              <description>Keypad Key Depress Interrupt Enable</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>KDIE_0</name>
                  <description>No interrupt request is generated when KPKD is set.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>KDIE_1</name>
                  <description>An interrupt request is generated when KPKD is set.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>KRIE</name>
              <description>Keypad Release Interrupt Enable</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>KRIE_0</name>
                  <description>No interrupt request is generated when KPKR is set.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>KRIE_1</name>
                  <description>An interrupt request is generated when KPKR is set.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>KDDR</name>
          <description>Keypad Data Direction Register</description>
          <addressOffset>0x4</addressOffset>
          <size>16</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFF</resetMask>
          <fields>
            <field>
              <name>KRDD</name>
              <description>Keypad Row Data Direction</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>INPUT</name>
                  <description>ROWn pin configured as an input.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>OUTPUT</name>
                  <description>ROWn pin configured as an output.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>KCDD</name>
              <description>Keypad Column Data Direction Register</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>INPUT</name>
                  <description>COLn pin is configured as an input.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>OUTPUT</name>
                  <description>COLn pin is configured as an output.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>KPDR</name>
          <description>Keypad Data Register</description>
          <addressOffset>0x6</addressOffset>
          <size>16</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFF</resetMask>
          <fields>
            <field>
              <name>KRD</name>
              <description>Keypad Row Data</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>KCD</name>
              <description>Keypad Column Data</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
      </registers>
    </peripheral>
    <peripheral>
      <name>WDOG1</name>
      <description>WDOG</description>
      <groupName>WDOG</groupName>
      <prependToName>WDOG1_</prependToName>
      <baseAddress>0x20BC000</baseAddress>
      <headerStructName>WDOG</headerStructName>
      <addressBlock>
        <offset>0</offset>
        <size>0xA</size>
        <usage>registers</usage>
      </addressBlock>
      <interrupt>
        <name>WDOG1</name>
        <value>112</value>
      </interrupt>
      <registers>
        <register>
          <name>WCR</name>
          <description>Watchdog Control Register</description>
          <addressOffset>0</addressOffset>
          <size>16</size>
          <access>read-write</access>
          <resetValue>0x30</resetValue>
          <resetMask>0xFFFF</resetMask>
          <fields>
            <field>
              <name>WDZST</name>
              <description>Watchdog Low Power</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>WDZST_0</name>
                  <description>Continue timer operation (Default).</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WDZST_1</name>
                  <description>Suspend the watchdog timer.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WDBG</name>
              <description>Watchdog DEBUG Enable</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>WDBG_0</name>
                  <description>Continue WDOG timer operation (Default).</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WDBG_1</name>
                  <description>Suspend the watchdog timer.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WDE</name>
              <description>Watchdog Enable</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>WDE_0</name>
                  <description>Disable the Watchdog (Default).</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WDE_1</name>
                  <description>Enable the Watchdog.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WDT</name>
              <description>WDOG_B Time-out assertion</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>WDT_0</name>
                  <description>No effect on WDOG_B (Default).</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WDT_1</name>
                  <description>Assert WDOG_B upon a Watchdog Time-out event.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SRS</name>
              <description>Software Reset Signal</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRS_0</name>
                  <description>Assert system reset signal.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRS_1</name>
                  <description>No effect on the system (Default).</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WDA</name>
              <description>WDOG_B assertion. Controls the software assertion of the WDOG_B signal.</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>WDA_0</name>
                  <description>Assert WDOG_B output.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WDA_1</name>
                  <description>No effect on system (Default).</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SRE</name>
              <description>software reset extension, an option way to generate software reset</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0</name>
                  <description>using original way to generate software reset (default)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1</name>
                  <description>using new way to generate software reset.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WDW</name>
              <description>Watchdog Disable for Wait</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>WDW_0</name>
                  <description>Continue WDOG timer operation (Default).</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WDW_1</name>
                  <description>Suspend WDOG timer operation.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WT</name>
              <description>Watchdog Time-out Field</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>WT_0</name>
                  <description>- 0.5 Seconds (Default).</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WT_1</name>
                  <description>- 1.0 Seconds.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WT_2</name>
                  <description>- 1.5 Seconds.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WT_3</name>
                  <description>- 2.0 Seconds.</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WT_255</name>
                  <description>- 128 Seconds.</description>
                  <value>0xFF</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>WSR</name>
          <description>Watchdog Service Register</description>
          <addressOffset>0x2</addressOffset>
          <size>16</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFF</resetMask>
          <fields>
            <field>
              <name>WSR</name>
              <description>Watchdog Service Register</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>WSR_21845</name>
                  <description>Write to the Watchdog Service Register (WDOG_WSR).</description>
                  <value>0x5555</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WSR_43690</name>
                  <description>Write to the Watchdog Service Register (WDOG_WSR).</description>
                  <value>0xAAAA</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>WRSR</name>
          <description>Watchdog Reset Status Register</description>
          <addressOffset>0x4</addressOffset>
          <size>16</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFF</resetMask>
          <fields>
            <field>
              <name>SFTW</name>
              <description>Software Reset</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SFTW_0</name>
                  <description>Reset is not the result of a software reset.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SFTW_1</name>
                  <description>Reset is the result of a software reset.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TOUT</name>
              <description>Timeout. Indicates whether the reset is the result of a WDOG timeout.</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TOUT_0</name>
                  <description>Reset is not the result of a WDOG timeout.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TOUT_1</name>
                  <description>Reset is the result of a WDOG timeout.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>POR</name>
              <description>Power On Reset. Indicates whether the reset is the result of a power on reset.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>POR_0</name>
                  <description>Reset is not the result of a power on reset.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>POR_1</name>
                  <description>Reset is the result of a power on reset.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>WICR</name>
          <description>Watchdog Interrupt Control Register</description>
          <addressOffset>0x6</addressOffset>
          <size>16</size>
          <access>read-write</access>
          <resetValue>0x4</resetValue>
          <resetMask>0xFFFF</resetMask>
          <fields>
            <field>
              <name>WICT</name>
              <description>Watchdog Interrupt Count Time-out (WICT) field determines, how long before the counter time-out must the interrupt occur</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>WICT_0</name>
                  <description>WICT[7:0] = Time duration between interrupt and time-out is 0 seconds.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WICT_1</name>
                  <description>WICT[7:0] = Time duration between interrupt and time-out is 0.5 seconds.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WICT_4</name>
                  <description>WICT[7:0] = Time duration between interrupt and time-out is 2 seconds (Default).</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WICT_255</name>
                  <description>WICT[7:0] = Time duration between interrupt and time-out is 127.5 seconds.</description>
                  <value>0xFF</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WTIS</name>
              <description>Watchdog TImer Interrupt Status bit will reflect the timer interrupt status, whether interrupt has occurred or not</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
              <enumeratedValues>
                <enumeratedValue>
                  <name>WTIS_0</name>
                  <description>No interrupt has occurred (Default).</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WTIS_1</name>
                  <description>Interrupt has occurred</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WIE</name>
              <description>Watchdog Timer Interrupt enable bit</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>WIE_0</name>
                  <description>Disable Interrupt (Default).</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WIE_1</name>
                  <description>Enable Interrupt.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>WMCR</name>
          <description>Watchdog Miscellaneous Control Register</description>
          <addressOffset>0x8</addressOffset>
          <size>16</size>
          <access>read-write</access>
          <resetValue>0x1</resetValue>
          <resetMask>0xFFFF</resetMask>
          <fields>
            <field>
              <name>PDE</name>
              <description>Power Down Enable bit</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PDE_0</name>
                  <description>Power Down Counter of WDOG is disabled.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PDE_1</name>
                  <description>Power Down Counter of WDOG is enabled (Default).</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
      </registers>
    </peripheral>
    <peripheral derivedFrom="WDOG1">
      <name>WDOG2</name>
      <description>WDOG</description>
      <groupName>WDOG</groupName>
      <prependToName>WDOG2_</prependToName>
      <baseAddress>0x20C0000</baseAddress>
      <addressBlock>
        <offset>0</offset>
        <size>0xA</size>
        <usage>registers</usage>
      </addressBlock>
      <interrupt>
        <name>WDOG2</name>
        <value>113</value>
      </interrupt>
    </peripheral>
    <peripheral derivedFrom="WDOG1">
      <name>WDOG3</name>
      <description>WDOG</description>
      <groupName>WDOG</groupName>
      <prependToName>WDOG3_</prependToName>
      <baseAddress>0x21E4000</baseAddress>
      <addressBlock>
        <offset>0</offset>
        <size>0xA</size>
        <usage>registers</usage>
      </addressBlock>
      <interrupt>
        <name>WDOG3</name>
        <value>43</value>
      </interrupt>
    </peripheral>
    <peripheral>
      <name>CCM</name>
      <description>CCM</description>
      <groupName>CCM</groupName>
      <prependToName>CCM_</prependToName>
      <baseAddress>0x20C4000</baseAddress>
      <addressBlock>
        <offset>0</offset>
        <size>0x8C</size>
        <usage>registers</usage>
      </addressBlock>
      <interrupt>
        <name>CCM_IRQ1</name>
        <value>119</value>
      </interrupt>
      <interrupt>
        <name>CCM_IRQ2</name>
        <value>120</value>
      </interrupt>
      <registers>
        <register>
          <name>CCR</name>
          <description>CCM Control Register</description>
          <addressOffset>0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x401167F</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>OSCNT</name>
              <description>Oscillator ready counter value</description>
              <bitOffset>0</bitOffset>
              <bitWidth>7</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>OSCNT_0</name>
                  <description>count 1 ckil</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>OSCNT_127</name>
                  <description>count 128 ckil's</description>
                  <value>0x7F</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>COSC_EN</name>
              <description>On chip oscillator enable bit - this bit value is reflected on the output cosc_en</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>COSC_EN_0</name>
                  <description>disable on chip oscillator</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>COSC_EN_1</name>
                  <description>enable on chip oscillator</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>REG_BYPASS_COUNT</name>
              <description>Counter for analog_reg_bypass signal assertion after standby voltage request by PMIC_STBY_REQ</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>REG_BYPASS_COUNT_0</name>
                  <description>no delay</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REG_BYPASS_COUNT_1</name>
                  <description>1 CKIL clock period delay</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REG_BYPASS_COUNT_63</name>
                  <description>63 CKIL clock periods delay</description>
                  <value>0x3F</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RBC_EN</name>
              <description>Enable for REG_BYPASS_COUNTER</description>
              <bitOffset>0x1B</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RBC_EN_0</name>
                  <description>REG_BYPASS_COUNTER disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RBC_EN_1</name>
                  <description>REG_BYPASS_COUNTER enabled.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>CCDR</name>
          <description>CCM Control Divider Register</description>
          <addressOffset>0x4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x20000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MMDC_MASK</name>
              <description>During divider ratio mmdc_axi_podf change or sync mux periph2_clk_sel change (but not jtag) or SRC request during warm reset, mask handshake with mmdc module</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>MMDC_MASK_0</name>
                  <description>Allow handshake with mmdc module.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MMDC_MASK_1</name>
                  <description>Mask handshake with mmdc. Request signal will not be generated.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>CSR</name>
          <description>CCM Status Register</description>
          <addressOffset>0x8</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0x10</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>REF_EN_B</name>
              <description>Status of the value of CCM_REF_EN_B output of ccm</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>REF_EN_B_0</name>
                  <description>value of CCM_REF_EN_B is '0'</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REF_EN_B_1</name>
                  <description>value of CCM_REF_EN_B is '1'</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>COSC_READY</name>
              <description>Status indication of on board oscillator</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>COSC_READY_0</name>
                  <description>on board oscillator is not ready.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>COSC_READY_1</name>
                  <description>on board oscillator is ready.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>CCSR</name>
          <description>CCM Clock Switcher Register</description>
          <addressOffset>0xC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x100</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>PLL3_SW_CLK_SEL</name>
              <description>Selects source to generate pll3_sw_clk. This bit should only be used for testing purposes.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PLL3_SW_CLK_SEL_0</name>
                  <description>pll3_main_clk</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PLL3_SW_CLK_SEL_1</name>
                  <description>pll3 bypass clock</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PLL1_SW_CLK_SEL</name>
              <description>Selects source to generate pll1_sw_clk.</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PLL1_SW_CLK_SEL_0</name>
                  <description>pll1_main_clk</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PLL1_SW_CLK_SEL_1</name>
                  <description>step_clk</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SECONDARY_CLK_SEL</name>
              <description>Select source to generate secondary_clk</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SECONDARY_CLK_SEL_0</name>
                  <description>PLL2 PFD2 (400 M)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SECONDARY_CLK_SEL_1</name>
                  <description>PLL2 (528 M)</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>STEP_SEL</name>
              <description>Selects the option to be chosen for the step frequency when shifting ARM frequency</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>STEP_SEL_0</name>
                  <description>derive clock from osc_clk (24M) - source for lp_apm.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>STEP_SEL_1</name>
                  <description>derive clock from secondary_clk</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>CACRR</name>
          <description>CCM Arm Clock Root Register</description>
          <addressOffset>0x10</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ARM_PODF</name>
              <description>Divider for ARM clock root</description>
              <bitOffset>0</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ARM_PODF_0</name>
                  <description>divide by 1</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ARM_PODF_1</name>
                  <description>divide by 2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ARM_PODF_2</name>
                  <description>divide by 3</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ARM_PODF_3</name>
                  <description>divide by 4</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ARM_PODF_4</name>
                  <description>divide by 5</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ARM_PODF_5</name>
                  <description>divide by 6</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ARM_PODF_6</name>
                  <description>divide by 7</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ARM_PODF_7</name>
                  <description>divide by 8</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>CBCDR</name>
          <description>CCM Bus Clock Divider Register</description>
          <addressOffset>0x14</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x18D00</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>PERIPH2_CLK2_PODF</name>
              <description>Divider for periph2_clk2 podf. Divider should be updated when output clock is gated.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PERIPH2_CLK2_PODF_0</name>
                  <description>divide by 1</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PERIPH2_CLK2_PODF_1</name>
                  <description>divide by 2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PERIPH2_CLK2_PODF_2</name>
                  <description>divide by 3</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PERIPH2_CLK2_PODF_3</name>
                  <description>divide by 4</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PERIPH2_CLK2_PODF_4</name>
                  <description>divide by 5</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PERIPH2_CLK2_PODF_5</name>
                  <description>divide by 6</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PERIPH2_CLK2_PODF_6</name>
                  <description>divide by 7</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PERIPH2_CLK2_PODF_7</name>
                  <description>divide by 8</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>FABRIC_MMDC_PODF</name>
              <description>Post divider for fabric / mmdc clock.</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>FABRIC_MMDC_PODF_0</name>
                  <description>divide by 1</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FABRIC_MMDC_PODF_1</name>
                  <description>divide by 2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FABRIC_MMDC_PODF_2</name>
                  <description>divide by 3</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FABRIC_MMDC_PODF_3</name>
                  <description>divide by 4</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FABRIC_MMDC_PODF_4</name>
                  <description>divide by 5</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FABRIC_MMDC_PODF_5</name>
                  <description>divide by 6</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FABRIC_MMDC_PODF_6</name>
                  <description>divide by 7</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FABRIC_MMDC_PODF_7</name>
                  <description>divide by 8</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>AXI_CLK_SEL</name>
              <description>AXI clock source select</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>AXI_CLK_SEL_0</name>
                  <description>Periph_clk output will be used as AXI clock root</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AXI_CLK_SEL_1</name>
                  <description>AXI alternative clock will be used as AXI clock root</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>AXI_ALT_CLK_SEL</name>
              <description>AXI alternative clock select</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>AXI_ALT_CLK_SEL_0</name>
                  <description>PLL2 PFD2 will be selected as alternative clock for AXI root clock</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AXI_ALT_CLK_SEL_1</name>
                  <description>PLL3 PFD1 will be selected as alternative clock for AXI root clock</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>IPG_PODF</name>
              <description>Divider for ipg podf</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>IPG_PODF_0</name>
                  <description>divide by 1</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>IPG_PODF_1</name>
                  <description>divide by 2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>IPG_PODF_2</name>
                  <description>divide by 3</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>IPG_PODF_3</name>
                  <description>divide by 4</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>AHB_PODF</name>
              <description>Divider for AHB PODF</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>AHB_PODF_0</name>
                  <description>divide by 1</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AHB_PODF_1</name>
                  <description>divide by 2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AHB_PODF_2</name>
                  <description>divide by 3</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AHB_PODF_3</name>
                  <description>divide by 4</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AHB_PODF_4</name>
                  <description>divide by 5</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AHB_PODF_5</name>
                  <description>divide by 6</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AHB_PODF_6</name>
                  <description>divide by 7</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AHB_PODF_7</name>
                  <description>divide by 8</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>AXI_PODF</name>
              <description>Post divider for axi clock</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>AXI_PODF_0</name>
                  <description>Divide by 1</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AXI_PODF_1</name>
                  <description>Divide by 2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AXI_PODF_2</name>
                  <description>Divide by 3</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AXI_PODF_3</name>
                  <description>Divide by 4</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AXI_PODF_4</name>
                  <description>Divide by 5</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AXI_PODF_5</name>
                  <description>Divide by 6</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AXI_PODF_6</name>
                  <description>Divide by 7</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AXI_PODF_7</name>
                  <description>Divide by 8</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PERIPH_CLK_SEL</name>
              <description>Selector for peripheral main clock)</description>
              <bitOffset>0x19</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PERIPH_CLK_SEL_0</name>
                  <description>PLL2 (pll2_main_clk)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PERIPH_CLK_SEL_1</name>
                  <description>derive clock from periph_clk2_clk clock source.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PERIPH2_CLK_SEL</name>
              <description>Selector for peripheral2 main clock (source of mmdc_clk_root )</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PERIPH2_CLK_SEL_0</name>
                  <description>PLL2 (pll2_main_clk)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PERIPH2_CLK_SEL_1</name>
                  <description>derive clock from periph2_clk2_clk clock source.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PERIPH_CLK2_PODF</name>
              <description>Divider for periph_clk2_podf.</description>
              <bitOffset>0x1B</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PERIPH_CLK2_PODF_0</name>
                  <description>divide by 1</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PERIPH_CLK2_PODF_1</name>
                  <description>divide by 2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PERIPH_CLK2_PODF_2</name>
                  <description>divide by 3</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PERIPH_CLK2_PODF_3</name>
                  <description>divide by 4</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PERIPH_CLK2_PODF_4</name>
                  <description>divide by 5</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PERIPH_CLK2_PODF_5</name>
                  <description>divide by 6</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PERIPH_CLK2_PODF_6</name>
                  <description>divide by 7</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PERIPH_CLK2_PODF_7</name>
                  <description>divide by 8</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>CBCMR</name>
          <description>CCM Bus Clock Multiplexer Register</description>
          <addressOffset>0x18</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x24860324</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>PERIPH_CLK2_SEL</name>
              <description>Selector for peripheral clk2 clock multiplexer</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PERIPH_CLK2_SEL_0</name>
                  <description>derive clock from pll3_sw_clk</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PERIPH_CLK2_SEL_1</name>
                  <description>derive clock from osc_clk (pll1_ref_clk)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PERIPH_CLK2_SEL_2</name>
                  <description>derive clock from pll2_bypass_clk</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PRE_PERIPH_CLK_SEL</name>
              <description>Selector for pre_periph clock multiplexer</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PRE_PERIPH_CLK_SEL_0</name>
                  <description>derive clock from PLL2</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PRE_PERIPH_CLK_SEL_1</name>
                  <description>derive clock from PLL2 PFD2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PRE_PERIPH_CLK_SEL_2</name>
                  <description>derive clock from PLL2 PFD0</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PRE_PERIPH_CLK_SEL_3</name>
                  <description>derive clock from divided (/2) PLL2 PFD2</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PERIPH2_CLK2_SEL</name>
              <description>Selector for periph2_clk2 clock multiplexer</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PERIPH2_CLK2_SEL_0</name>
                  <description>derive clock from pll3_sw_clk</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PERIPH2_CLK2_SEL_1</name>
                  <description>derive clock fromOSC</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PRE_PERIPH2_CLK_SEL</name>
              <description>Selector for pre_periph2 clock multiplexer</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PRE_PERIPH2_CLK_SEL_0</name>
                  <description>derive clock from PLL2</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PRE_PERIPH2_CLK_SEL_1</name>
                  <description>derive clock from PLL2 PFD2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PRE_PERIPH2_CLK_SEL_2</name>
                  <description>derive clock from PLL2 PFD0</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PRE_PERIPH2_CLK_SEL_3</name>
                  <description>derive clock from PLL4</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>LCDIF1_PODF</name>
              <description>Post-divider for lcdif1 clock.</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LCDIF1_PODF_0</name>
                  <description>divide by 1</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LCDIF1_PODF_1</name>
                  <description>divide by 2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LCDIF1_PODF_2</name>
                  <description>divide by 3</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LCDIF1_PODF_3</name>
                  <description>divide by 4</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LCDIF1_PODF_4</name>
                  <description>divide by 5</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LCDIF1_PODF_5</name>
                  <description>divide by 6</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LCDIF1_PODF_6</name>
                  <description>divide by 7</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LCDIF1_PODF_7</name>
                  <description>divide by 8</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>CSCMR1</name>
          <description>CCM Serial Clock Multiplexer Register 1</description>
          <addressOffset>0x1C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x4900080</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>PERCLK_PODF</name>
              <description>Divider for perclk podf.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PERCLK_PODF_0</name>
                  <description>divide by 1</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PERCLK_PODF_1</name>
                  <description>divide by 2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PERCLK_PODF_2</name>
                  <description>divide by 3</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PERCLK_PODF_3</name>
                  <description>divide by 4</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PERCLK_PODF_4</name>
                  <description>divide by 5</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PERCLK_PODF_5</name>
                  <description>divide by 6</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PERCLK_PODF_6</name>
                  <description>divide by 7</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PERCLK_PODF_7</name>
                  <description>divide by 8</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PERCLK_CLK_SEL</name>
              <description>Selector for the perclk clock multiplexor</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PERCLK_CLK_SEL_0</name>
                  <description>derive clock from ipg clk root</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PERCLK_CLK_SEL_1</name>
                  <description>derive clock from osc_clk</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>QSPI1_CLK_SEL</name>
              <description>QSPI1 clock select</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>QSPI1_CLK_SEL_0</name>
                  <description>Derive clock from PLL3</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>QSPI1_CLK_SEL_1</name>
                  <description>Derive clock from PLL2 PFD0</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>QSPI1_CLK_SEL_2</name>
                  <description>Derive clock from PLL2 PFD2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>QSPI1_CLK_SEL_3</name>
                  <description>Derive clock from PLL2</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>QSPI1_CLK_SEL_4</name>
                  <description>Derive clock from PLL3 PFD3</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>QSPI1_CLK_SEL_5</name>
                  <description>Derive clock from PLL3 PFD2</description>
                  <value>0x5</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SAI1_CLK_SEL</name>
              <description>Selector for sai1 clock multiplexer</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SAI1_CLK_SEL_0</name>
                  <description>derive clock from PLL3 PFD2</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SAI1_CLK_SEL_1</name>
                  <description>derive clock from PLL5</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SAI1_CLK_SEL_2</name>
                  <description>derive clock from PLL4</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SAI2_CLK_SEL</name>
              <description>Selector for sai2 clock multiplexer</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SAI2_CLK_SEL_0</name>
                  <description>derive clock from PLL3 PFD2</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SAI2_CLK_SEL_1</name>
                  <description>derive clock from PLL5</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SAI2_CLK_SEL_2</name>
                  <description>derive clock from PLL4</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SAI3_CLK_SEL</name>
              <description>Selector for sai3 clock multiplexer</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SAI3_CLK_SEL_0</name>
                  <description>derive clock from PLL3 PFD2</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SAI3_CLK_SEL_1</name>
                  <description>derive clock from PLL5</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SAI3_CLK_SEL_2</name>
                  <description>derive clock from PLL4</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>USDHC1_CLK_SEL</name>
              <description>Selector for usdhc1 clock multiplexer</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>USDHC1_CLK_SEL_0</name>
                  <description>derive clock from PLL2 PFD2</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>USDHC1_CLK_SEL_1</name>
                  <description>derive clock from PLL2 PFD0</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>USDHC2_CLK_SEL</name>
              <description>Selector for usdhc2 clock multiplexer</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>USDHC2_CLK_SEL_0</name>
                  <description>derive clock from PLL2 PFD2</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>USDHC2_CLK_SEL_1</name>
                  <description>derive clock from PLL2 PFD0</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BCH_CLK_SEL</name>
              <description>Selector for bch clock multiplexer</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>BCH_CLK_SEL_0</name>
                  <description>derive clock from PLL2 PFD2</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BCH_CLK_SEL_1</name>
                  <description>derive clock from PLL2 PFD0</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>GPMI_CLK_SEL</name>
              <description>Selector for gpmi clock multiplexer</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>GPMI_CLK_SEL_0</name>
                  <description>derive clock from PLL2 PFD2</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>GPMI_CLK_SEL_1</name>
                  <description>derive clock from PLL2 PFD0</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ACLK_EIM_SLOW_PODF</name>
              <description>Divider for aclk_eim_slow clock root.</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ACLK_EIM_SLOW_PODF_0</name>
                  <description>divide by 1</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ACLK_EIM_SLOW_PODF_1</name>
                  <description>divide by 2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ACLK_EIM_SLOW_PODF_2</name>
                  <description>divide by 3</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ACLK_EIM_SLOW_PODF_3</name>
                  <description>divide by 4</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ACLK_EIM_SLOW_PODF_4</name>
                  <description>divide by 5</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ACLK_EIM_SLOW_PODF_5</name>
                  <description>divide by 6</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ACLK_EIM_SLOW_PODF_6</name>
                  <description>divide by 7</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ACLK_EIM_SLOW_PODF_7</name>
                  <description>divide by 8</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>QSPI1_PODF</name>
              <description>Divider for QSPI1 clock root</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>QSPI1_PODF_0</name>
                  <description>divide by 1</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>QSPI1_PODF_1</name>
                  <description>divide by 2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>QSPI1_PODF_7</name>
                  <description>divide by 8</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ACLK_EIM_SLOW_SEL</name>
              <description>Selector for aclk_eim_slow root clock multiplexer</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ACLK_EIM_SLOW_SEL_0</name>
                  <description>derive clock from AXI</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ACLK_EIM_SLOW_SEL_1</name>
                  <description>derive clock from pll3_sw_clk</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ACLK_EIM_SLOW_SEL_2</name>
                  <description>derive clock from PLL2 PFD2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ACLK_EIM_SLOW_SEL_3</name>
                  <description>derive clock from PLL3 PFD0</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>CSCMR2</name>
          <description>CCM Serial Clock Multiplexer Register 2</description>
          <addressOffset>0x20</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x3192F06</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>CAN_CLK_PODF</name>
              <description>Divider for can clock podf.</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CAN_CLK_PODF_0</name>
                  <description>divide by 1</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CAN_CLK_PODF_7</name>
                  <description>divide by 8</description>
                  <value>0x7</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CAN_CLK_PODF_63</name>
                  <description>divide by 2^6</description>
                  <value>0x3F</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CAN_CLK_SEL</name>
              <description>Selector for FlexCAN clock multiplexer</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CAN_CLK_SEL_0</name>
                  <description>derive clock from pll3_sw_clk divided clock (60M)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CAN_CLK_SEL_1</name>
                  <description>derive clock from osc_clk (24M)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CAN_CLK_SEL_2</name>
                  <description>derive clock from pll3_sw_clk divided clock (80M)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CAN_CLK_SEL_3</name>
                  <description>Disable FlexCAN clock</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>LDB_DI0_DIV</name>
              <description>Control for divider of ldb clock for di0</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LDB_DI0_DIV_0</name>
                  <description>divide by 3.5</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LDB_DI0_DIV_1</name>
                  <description>divide by 7</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>LDB_DI1_DIV</name>
              <description>Control for divider of ldb clock for di1</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LDB_DI1_DIV_0</name>
                  <description>divide by 3.5</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LDB_DI1_DIV_1</name>
                  <description>divide by 7</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ESAI_CLK_SEL</name>
              <description>Selector for the ESAI clock</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>VID_CLK_SEL</name>
              <description>Selector for vid clock multiplexer</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>VID_CLK_SEL_0</name>
                  <description>PLL3 PFD1</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>VID_CLK_SEL_1</name>
                  <description>PLL3</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>VID_CLK_SEL_2</name>
                  <description>PLL3 PFD3</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>VID_CLK_SEL_3</name>
                  <description>PLL4</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>VID_CLK_SEL_4</name>
                  <description>PLL5</description>
                  <value>0x4</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>VID_CLK_PRE_PODF</name>
              <description>Post-divider for vid clock root</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>VID_CLK_PRE_PODF_0</name>
                  <description>divide by 1</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>VID_CLK_PRE_PODF_1</name>
                  <description>divide by 2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>VID_CLK_PRE_PODF_2</name>
                  <description>divide by 3</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>VID_CLK_PRE_PODF_3</name>
                  <description>divide by 4</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>VID_CLK_PODF</name>
              <description>Post-divider for vid clock root</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>VID_CLK_PODF_0</name>
                  <description>divide by 1</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>VID_CLK_PODF_1</name>
                  <description>divide by 2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>VID_CLK_PODF_2</name>
                  <description>divide by 3</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>VID_CLK_PODF_3</name>
                  <description>divide by 4</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>VID_CLK_PODF_4</name>
                  <description>divide by 5</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>VID_CLK_PODF_5</name>
                  <description>divide by 6</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>VID_CLK_PODF_6</name>
                  <description>divide by 7</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>VID_CLK_PODF_7</name>
                  <description>divide by 8</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>CSCDR1</name>
          <description>CCM Serial Clock Divider Register 1</description>
          <addressOffset>0x24</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x490B00</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>UART_CLK_PODF</name>
              <description>Divider for uart clock podf.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>UART_CLK_PODF_0</name>
                  <description>divide by 1</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>UART_CLK_PODF_63</name>
                  <description>divide by 2^6</description>
                  <value>0x3F</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>UART_CLK_SEL</name>
              <description>Selector for the UART clock multiplexor</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>UART_CLK_SEL_0</name>
                  <description>derive clock from pll3_80m</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>UART_CLK_SEL_1</name>
                  <description>derive clock from osc_clk</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>USDHC1_PODF</name>
              <description>Divider for usdhc1 clock podf. Divider should be updated when output clock is gated.</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>USDHC1_PODF_0</name>
                  <description>divide by 1</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>USDHC1_PODF_1</name>
                  <description>divide by 2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>USDHC1_PODF_2</name>
                  <description>divide by 3</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>USDHC1_PODF_3</name>
                  <description>divide by 4</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>USDHC1_PODF_4</name>
                  <description>divide by 5</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>USDHC1_PODF_5</name>
                  <description>divide by 6</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>USDHC1_PODF_6</name>
                  <description>divide by 7</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>USDHC1_PODF_7</name>
                  <description>divide by 8</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>USDHC2_PODF</name>
              <description>Divider for usdhc2 clock. Divider should be updated when output clock is gated.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>USDHC2_PODF_0</name>
                  <description>divide by 1</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>USDHC2_PODF_1</name>
                  <description>divide by 2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>USDHC2_PODF_2</name>
                  <description>divide by 3</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>USDHC2_PODF_3</name>
                  <description>divide by 4</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>USDHC2_PODF_4</name>
                  <description>divide by 5</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>USDHC2_PODF_5</name>
                  <description>divide by 6</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>USDHC2_PODF_6</name>
                  <description>divide by 7</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>USDHC2_PODF_7</name>
                  <description>divide by 8</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BCH_PODF</name>
              <description>Divider for bch clock podf. Divider should be updated when output clock is gated.</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>BCH_PODF_0</name>
                  <description>divide by 1</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BCH_PODF_1</name>
                  <description>divide by 2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BCH_PODF_2</name>
                  <description>divide by 3</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BCH_PODF_3</name>
                  <description>divide by 4</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BCH_PODF_4</name>
                  <description>divide by 5</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BCH_PODF_5</name>
                  <description>divide by 6</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BCH_PODF_6</name>
                  <description>divide by 7</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BCH_PODF_7</name>
                  <description>divide by 8</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>GPMI_PODF</name>
              <description>Divider for gpmi clock pred. Divider should be updated when output clock is gated.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>GPMI_PODF_0</name>
                  <description>divide by 1</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>GPMI_PODF_1</name>
                  <description>divide by 2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>GPMI_PODF_2</name>
                  <description>divide by 3</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>GPMI_PODF_3</name>
                  <description>divide by 4</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>GPMI_PODF_4</name>
                  <description>divide by 5</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>GPMI_PODF_5</name>
                  <description>divide by 6</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>GPMI_PODF_6</name>
                  <description>divide by 7</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>GPMI_PODF_7</name>
                  <description>divide by 8</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>CS1CDR</name>
          <description>CCM SAI1 Clock Divider Register</description>
          <addressOffset>0x28</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0xEC102C1</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SAI1_CLK_PODF</name>
              <description>Divider for sai1 clock podf</description>
              <bitOffset>0</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SAI1_CLK_PODF_0</name>
                  <description>divide by 1</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SAI1_CLK_PODF_63</name>
                  <description>divide by 2^6</description>
                  <value>0x3F</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SAI1_CLK_PRED</name>
              <description>Divider for sai1 clock pred.</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SAI1_CLK_PRED_0</name>
                  <description>divide by 1</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SAI1_CLK_PRED_1</name>
                  <description>divide by 2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SAI1_CLK_PRED_2</name>
                  <description>divide by 3</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SAI1_CLK_PRED_3</name>
                  <description>divide by 4</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SAI1_CLK_PRED_4</name>
                  <description>divide by 5</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SAI1_CLK_PRED_5</name>
                  <description>divide by 6</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SAI1_CLK_PRED_6</name>
                  <description>divide by 7</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SAI1_CLK_PRED_7</name>
                  <description>divide by 8</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ESAI_CLK_PRED</name>
              <description>Divider for ESAI clock pred</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ESAI_CLK_PRED_0</name>
                  <description>Divide by 1</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ESAI_CLK_PRED_1</name>
                  <description>Divide by 2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ESAI_CLK_PRED_2</name>
                  <description>Divide by 3</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ESAI_CLK_PRED_3</name>
                  <description>Divide by 4</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ESAI_CLK_PRED_4</name>
                  <description>Divide by 5</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ESAI_CLK_PRED_5</name>
                  <description>Divide by 6</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ESAI_CLK_PRED_6</name>
                  <description>Divide by 7</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ESAI_CLK_PRED_7</name>
                  <description>Divide by 8</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SAI3_CLK_PODF</name>
              <description>Divider for sai3 clock podf</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SAI3_CLK_PODF_0</name>
                  <description>divide by 1</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SAI3_CLK_PODF_63</name>
                  <description>divide by 2^6</description>
                  <value>0x3F</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SAI3_CLK_PRED</name>
              <description>Divider for sai3 clock pred.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SAI3_CLK_PRED_0</name>
                  <description>divide by 1</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SAI3_CLK_PRED_1</name>
                  <description>divide by 2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SAI3_CLK_PRED_2</name>
                  <description>divide by 3</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SAI3_CLK_PRED_3</name>
                  <description>divide by 4</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SAI3_CLK_PRED_4</name>
                  <description>divide by 5</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SAI3_CLK_PRED_5</name>
                  <description>divide by 6</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SAI3_CLK_PRED_6</name>
                  <description>divide by 7</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SAI3_CLK_PRED_7</name>
                  <description>divide by 8</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ESAI_CLK_PODF</name>
              <description>Divider for ESAI clock</description>
              <bitOffset>0x19</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ESAI_CLK_PODF_0</name>
                  <description>Divide by 1</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ESAI_CLK_PODF_1</name>
                  <description>Divide by 2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ESAI_CLK_PODF_2</name>
                  <description>Divide by 3</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ESAI_CLK_PODF_3</name>
                  <description>Divide by 4</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ESAI_CLK_PODF_4</name>
                  <description>Divide by 5</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ESAI_CLK_PODF_5</name>
                  <description>Divide by 6</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ESAI_CLK_PODF_6</name>
                  <description>Divide by 7</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ESAI_CLK_PODF_7</name>
                  <description>Divide by 8</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>CS2CDR</name>
          <description>CCM SAI2 Clock Divider Register</description>
          <addressOffset>0x2C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x336C1</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SAI2_CLK_PODF</name>
              <description>Divider for sai2 clock podf</description>
              <bitOffset>0</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SAI2_CLK_PODF_0</name>
                  <description>divide by 1</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SAI2_CLK_PODF_63</name>
                  <description>divide by 2^6</description>
                  <value>0x3F</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SAI2_CLK_PRED</name>
              <description>Divider for sai2 clock pred.Divider should be updated when output clock is gated.</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SAI2_CLK_PRED_0</name>
                  <description>divide by 1</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SAI2_CLK_PRED_1</name>
                  <description>divide by 2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SAI2_CLK_PRED_2</name>
                  <description>divide by 3</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SAI2_CLK_PRED_3</name>
                  <description>divide by 4</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SAI2_CLK_PRED_4</name>
                  <description>divide by 5</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SAI2_CLK_PRED_5</name>
                  <description>divide by 6</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SAI2_CLK_PRED_6</name>
                  <description>divide by 7</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SAI2_CLK_PRED_7</name>
                  <description>divide by 8</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>LDB_DI0_CLK_SEL</name>
              <description>Selector for ldb_di0 clock multiplexerMultiplexor should be updated when both input and output clocks are gated</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LDB_DI0_CLK_SEL_0</name>
                  <description>PLL5 clock</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LDB_DI0_CLK_SEL_1</name>
                  <description>PLL2 PFD0</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LDB_DI0_CLK_SEL_2</name>
                  <description>PLL2 PFD2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LDB_DI0_CLK_SEL_3</name>
                  <description>PLL2 PFD3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LDB_DI0_CLK_SEL_4</name>
                  <description>PLL2 PFD1</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LDB_DI0_CLK_SEL_5</name>
                  <description>PLL3 PFD3</description>
                  <value>0x5</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ENFC_CLK_SEL</name>
              <description>Selector for enfc clock multiplexer Multiplexor should be updated when output clock is gated.</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ENFC_CLK_SEL_0</name>
                  <description>derive clock from PLL2 PFD0</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENFC_CLK_SEL_1</name>
                  <description>derive clock from PLL2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENFC_CLK_SEL_2</name>
                  <description>derive clock from pll3_sw_clk</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENFC_CLK_SEL_3</name>
                  <description>derive clock from PLL2 PFD2</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENFC_CLK_SEL_4</name>
                  <description>derive clock from PLL3 PFD3</description>
                  <value>0x4</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ENFC_CLK_PRED</name>
              <description>Divider for enfc clock pred divider.Divider should be updated when output clock is gated.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ENFC_CLK_PRED_0</name>
                  <description>divide by 1</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENFC_CLK_PRED_1</name>
                  <description>divide by 2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENFC_CLK_PRED_2</name>
                  <description>divide by 3</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENFC_CLK_PRED_3</name>
                  <description>divide by 4</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENFC_CLK_PRED_4</name>
                  <description>divide by 5</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENFC_CLK_PRED_5</name>
                  <description>divide by 6</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENFC_CLK_PRED_6</name>
                  <description>divide by 7</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENFC_CLK_PRED_7</name>
                  <description>divide by 8</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ENFC_CLK_PODF</name>
              <description>Divider for enfc clock divider.</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ENFC_CLK_PODF_0</name>
                  <description>divide by 1</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENFC_CLK_PODF_1</name>
                  <description>divide by 2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENFC_CLK_PODF_63</name>
                  <description>divide by 2^6</description>
                  <value>0x3F</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>CDCDR</name>
          <description>CCM D1 Clock Divider Register</description>
          <addressOffset>0x30</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x33F71F92</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SPDIF0_CLK_SEL</name>
              <description>Selector for spdif0 clock multiplexer</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPDIF0_CLK_SEL_0</name>
                  <description>derive clock from PLL4</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPDIF0_CLK_SEL_1</name>
                  <description>derive clock from PLL3 PFD2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPDIF0_CLK_SEL_2</name>
                  <description>derive clock from PLL5</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPDIF0_CLK_SEL_3</name>
                  <description>derive clock from pll3_sw_clk</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPDIF0_CLK_PODF</name>
              <description>Divider for spdif0 clock podf. Divider should be updated when output clock is gated.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPDIF0_CLK_PODF_0</name>
                  <description>divide by 1</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPDIF0_CLK_PODF_7</name>
                  <description>divide by 8</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPDIF0_CLK_PRED</name>
              <description>Divider for spdif0 clock pred. Divider should be updated when output clock is gated.</description>
              <bitOffset>0x19</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPDIF0_CLK_PRED_0</name>
                  <description>divide by 1 (do not use with high input frequencies)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPDIF0_CLK_PRED_1</name>
                  <description>divide by 2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPDIF0_CLK_PRED_2</name>
                  <description>divide by 3</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPDIF0_CLK_PRED_7</name>
                  <description>divide by 8</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>CHSCCDR</name>
          <description>CCM HSC Clock Divider Register</description>
          <addressOffset>0x34</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x29148</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>EPDC_CLK_SEL</name>
              <description>Selector for EPDC root clock multiplexer</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>EPDC_CLK_SEL_0</name>
                  <description>Derive clock from divided pre-muxed EPDC clock</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>EPDC_CLK_SEL_1</name>
                  <description>Derive clock from ipp_di0_clk</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>EPDC_CLK_SEL_2</name>
                  <description>Derive clock from ipp_di1_clk</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>EPDC_CLK_SEL_3</name>
                  <description>Derive clock from ldb_di0_clk</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>EPDC_CLK_SEL_4</name>
                  <description>Derive clock from ldb_di1_clk</description>
                  <value>0x4</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>EPDC_PODF</name>
              <description>Divider for EPDC clock divider. Divider should be updated when output clock is gated.</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>EPDC_PODF_0</name>
                  <description>Divide by 1</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>EPDC_PODF_1</name>
                  <description>Divide by 2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>EPDC_PODF_2</name>
                  <description>Divide by 3</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>EPDC_PODF_3</name>
                  <description>Divide by 4</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>EPDC_PODF_4</name>
                  <description>Divide by 5</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>EPDC_PODF_5</name>
                  <description>Divide by 6</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>EPDC_PODF_6</name>
                  <description>Divide by 7</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>EPDC_PODF_7</name>
                  <description>Divide by 8</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>EPDC_PRE_CLK_SEL</name>
              <description>Selector for EPDC root clock pre-multiplexer</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>EPDC_PRE_CLK_SEL_0</name>
                  <description>Derive clock from PLL2</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>EPDC_PRE_CLK_SEL_1</name>
                  <description>Derive clock from PLL3_SW_CLK</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>EPDC_PRE_CLK_SEL_2</name>
                  <description>Derive clock from PLL5</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>EPDC_PRE_CLK_SEL_3</name>
                  <description>Derive clock from PLL2 PFD0</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>EPDC_PRE_CLK_SEL_4</name>
                  <description>Derive clock from PLL2 PFD2</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>EPDC_PRE_CLK_SEL_5</name>
                  <description>Derive clock from PLL3 PFD2</description>
                  <value>0x5</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>CSCDR2</name>
          <description>CCM Serial Clock Divider Register 2</description>
          <addressOffset>0x38</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x29B48</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>LCDIF1_CLK_SEL</name>
              <description>Selector for lcdif1 root clock multiplexer</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LCDIF1_CLK_SEL_0</name>
                  <description>derive clock from divided pre-muxed lcdif1 clock</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LCDIF1_CLK_SEL_1</name>
                  <description>derive clock from ipp_di0_clk</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LCDIF1_CLK_SEL_2</name>
                  <description>derive clock from ipp_di1_clk</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LCDIF1_CLK_SEL_3</name>
                  <description>derive clock from ldb_di0_clk</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LCDIF1_CLK_SEL_4</name>
                  <description>derive clock from ldb_di1_clk</description>
                  <value>0x4</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>LCDIF1_PRED</name>
              <description>Pre-divider for lcdif1 clock. Divider should be updated when output clock is gated.</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LCDIF1_PRED_0</name>
                  <description>divide by 1</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LCDIF1_PRED_1</name>
                  <description>divide by 2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LCDIF1_PRED_2</name>
                  <description>divide by 3</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LCDIF1_PRED_3</name>
                  <description>divide by 4</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LCDIF1_PRED_4</name>
                  <description>divide by 5</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LCDIF1_PRED_5</name>
                  <description>divide by 6</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LCDIF1_PRED_6</name>
                  <description>divide by 7</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LCDIF1_PRED_7</name>
                  <description>divide by 8</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>LCDIF1_PRE_CLK_SEL</name>
              <description>Selector for lcdif1 root clock pre-multiplexer</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LCDIF1_PRE_CLK_SEL_0</name>
                  <description>derive clock from PLL2</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LCDIF1_PRE_CLK_SEL_1</name>
                  <description>derive clock from PLL3 PFD3</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LCDIF1_PRE_CLK_SEL_2</name>
                  <description>derive clock from PLL5</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LCDIF1_PRE_CLK_SEL_3</name>
                  <description>derive clock from PLL2 PFD0</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LCDIF1_PRE_CLK_SEL_4</name>
                  <description>derive clock from PLL2 PFD1</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LCDIF1_PRE_CLK_SEL_5</name>
                  <description>derive clock from PLL3 PFD1</description>
                  <value>0x5</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ECSPI_CLK_SEL</name>
              <description>Selector for the ECSPI clock multiplexor</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ECSPI_CLK_SEL_0</name>
                  <description>derive clock from pll3_60m</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECSPI_CLK_SEL_1</name>
                  <description>derive clock from osc_clk</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ECSPI_CLK_PODF</name>
              <description>Divider for ecspi clock podf</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ECSPI_CLK_PODF_0</name>
                  <description>divide by 1</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECSPI_CLK_PODF_63</name>
                  <description>divide by 2^6</description>
                  <value>0x3F</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>CSCDR3</name>
          <description>CCM Serial Clock Divider Register 3</description>
          <addressOffset>0x3C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x14841</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>CSI_CLK_SEL</name>
              <description>Selector for csi clock multiplexer</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CSI_CLK_SEL_0</name>
                  <description>derive clock from osc_clk (24M)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CSI_CLK_SEL_1</name>
                  <description>derive clock from PLL2 PFD2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CSI_CLK_SEL_2</name>
                  <description>derive clock from pll3_120M</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CSI_CLK_SEL_3</name>
                  <description>derive clock from PLL3 PFD1</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CSI_PODF</name>
              <description>Post divider for csi_core clock. Divider should be updated when output clock is gated.</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CSI_PODF_0</name>
                  <description>divide by 1</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CSI_PODF_1</name>
                  <description>divide by 2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CSI_PODF_2</name>
                  <description>divide by 3</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CSI_PODF_3</name>
                  <description>divide by 4</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CSI_PODF_4</name>
                  <description>divide by 5</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CSI_PODF_5</name>
                  <description>divide by 6</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CSI_PODF_6</name>
                  <description>divide by 7</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CSI_PODF_7</name>
                  <description>divide by 8</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>CWDR</name>
          <description>CCM Wakeup Detector Register</description>
          <addressOffset>0x44</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
        </register>
        <register>
          <name>CDHIPR</name>
          <description>CCM Divider Handshake In-Process Register</description>
          <addressOffset>0x48</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>AXI_PODF_BUSY</name>
              <description>Busy indicator for axi_podf.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>AXI_PODF_BUSY_0</name>
                  <description>divider is not busy and its value represents the actual division.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AXI_PODF_BUSY_1</name>
                  <description>divider is busy with handshake process with module. The value read in the divider represents the previous value of the division factor, and after the handshake the written value of the axi_podf will be applied.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>AHB_PODF_BUSY</name>
              <description>Busy indicator for ahb_podf.</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>AHB_PODF_BUSY_0</name>
                  <description>divider is not busy and its value represents the actual division.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AHB_PODF_BUSY_1</name>
                  <description>divider is busy with handshake process with module. The value read in the divider represents the previous value of the division factor, and after the handshake the written value of the ahb_podf will be applied.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>MMDC_PODF_BUSY</name>
              <description>Busy indicator for mmdc_axi_podf.</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>MMDC_PODF_BUSY_0</name>
                  <description>divider is not busy and its value represents the actual division.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MMDC_PODF_BUSY_1</name>
                  <description>divider is busy with handshake process with module. The value read in the divider represents the previous value of the division factor, and after the handshake the written value of the mmdc_axi_podf will be applied.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PERIPH2_CLK_SEL_BUSY</name>
              <description>Busy indicator for periph2_clk_sel mux control.</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PERIPH2_CLK_SEL_BUSY_0</name>
                  <description>mux is not busy and its value represents the actual division.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PERIPH2_CLK_SEL_BUSY_1</name>
                  <description>mux is busy with handshake process with module. The value read in the periph2_clk_sel represents the previous value of select, and after the handshake periph2_clk_sel value will be applied.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PERIPH_CLK_SEL_BUSY</name>
              <description>Busy indicator for periph_clk_sel mux control.</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PERIPH_CLK_SEL_BUSY_0</name>
                  <description>mux is not busy and its value represents the actual division.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PERIPH_CLK_SEL_BUSY_1</name>
                  <description>mux is busy with handshake process with module. The value read in the periph_clk_sel represents the previous value of select, and after the handshake periph_clk_sel value will be applied.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ARM_PODF_BUSY</name>
              <description>Busy indicator for arm_podf.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ARM_PODF_BUSY_0</name>
                  <description>divider is not busy and its value represents the actual division.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ARM_PODF_BUSY_1</name>
                  <description>divider is busy with handshake process with module. The value read in the divider represents the previous value of the division factor, and after the handshake the written value of the arm_podf will be applied.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>CLPCR</name>
          <description>CCM Low Power Control Register</description>
          <addressOffset>0x54</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x79</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>LPM</name>
              <description>Setting the low power mode that system will enter on next assertion of dsm_request signal.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LPM_0</name>
                  <description>Remain in run mode</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LPM_1</name>
                  <description>Transfer to wait mode</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LPM_2</name>
                  <description>Transfer to stop mode</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ARM_CLK_DIS_ON_LPM</name>
              <description>Define if ARM clocks (arm_clk, soc_mxclk, soc_pclk, soc_dbg_pclk, vl_wrck) will be disabled on wait mode</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ARM_CLK_DIS_ON_LPM_0</name>
                  <description>ARM clock enabled on wait mode.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ARM_CLK_DIS_ON_LPM_1</name>
                  <description>ARM clock disabled on wait mode. .</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SBYOS</name>
              <description>Standby clock oscillator bit</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SBYOS_0</name>
                  <description>On-chip oscillator will not be powered down, after next entrance to STOP mode. (CCM_REF_EN_B will remain asserted - '0' and cosc_pwrdown will remain de asserted - '0')</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SBYOS_1</name>
                  <description>On-chip oscillator will be powered down, after next entrance to STOP mode. (CCM_REF_EN_B will be deasserted - '1' and cosc_pwrdown will be asserted - '1'). When returning from STOP mode, external oscillator will be enabled again, on-chip oscillator will return to oscillator mode, and after oscnt count, CCM will continue with the exit from the STOP mode process.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DIS_REF_OSC</name>
              <description>dis_ref_osc - in run mode, software can manually control closing of external reference oscillator clock, i</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DIS_REF_OSC_0</name>
                  <description>external high frequency oscillator will be enabled, i.e. CCM_REF_EN_B = '0'.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DIS_REF_OSC_1</name>
                  <description>external high frequency oscillator will be disabled, i.e. CCM_REF_EN_B = '1'</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>VSTBY</name>
              <description>Voltage standby request bit</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>VSTBY_0</name>
                  <description>Voltage will not be changed to standby voltage after next entrance to STOP mode. ( PMIC_STBY_REQ will remain negated - '0')</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>VSTBY_1</name>
                  <description>Voltage will be requested to change to standby voltage after next entrance to stop mode. ( PMIC_STBY_REQ will be asserted - '1').</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>STBY_COUNT</name>
              <description>Standby counter definition</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>STBY_COUNT_0</name>
                  <description>CCM will wait (1*pmic_delay_scaler)+1 ckil clock cycles</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>STBY_COUNT_1</name>
                  <description>CCM will wait (3*pmic_delay_scaler)+1 ckil clock cycles</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>STBY_COUNT_2</name>
                  <description>CCM will wait (7*pmic_delay_scaler)+1 ckil clock cycles</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>STBY_COUNT_3</name>
                  <description>CCM will wait (15*pmic_delay_scaler)+1 ckil clock cycles</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>COSC_PWRDOWN</name>
              <description>In run mode, software can manually control powering down of on chip oscillator, i</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>COSC_PWRDOWN_0</name>
                  <description>On chip oscillator will not be powered down, i.e. cosc_pwrdown = '0'.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>COSC_PWRDOWN_1</name>
                  <description>On chip oscillator will be powered down, i.e. cosc_pwrdown = '1'.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BYPASS_MMDC_LPM_HS</name>
              <description>Bypass handshake with mmdc on next entrance to low power mode (STOP or WAIT)</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>BYPASS_MMDC_LPM_HS_0</name>
                  <description>handshake with mmdc on next entrance to low power mode will be performed. .</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BYPASS_MMDC_LPM_HS_1</name>
                  <description>handshake with mmdc on next entrance to low power mode will be bypassed.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>MASK_CORE0_WFI</name>
              <description>Mask WFI of core0 for entering low power mode Assertion of all bits[27:22] will generate low power mode request</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>MASK_CORE0_WFI_0</name>
                  <description>WFI of core0 is not masked</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MASK_CORE0_WFI_1</name>
                  <description>WFI of core0 is masked</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>MASK_SCU_IDLE</name>
              <description>Mask SCU IDLE for entering low power mode Assertion of all bits[27:22] will generate low power mode request</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>MASK_SCU_IDLE_0</name>
                  <description>SCU IDLE is not masked</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MASK_SCU_IDLE_1</name>
                  <description>SCU IDLE is masked</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>MASK_L2CC_IDLE</name>
              <description>Mask L2CC IDLE for entering low power mode</description>
              <bitOffset>0x1B</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>MASK_L2CC_IDLE_0</name>
                  <description>L2CC IDLE is not masked</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MASK_L2CC_IDLE_1</name>
                  <description>L2CC IDLE is masked</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>CISR</name>
          <description>CCM Interrupt Status Register</description>
          <addressOffset>0x58</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>LRF_PLL</name>
              <description>CCM interrupt request 2 generated due to lock of all enabled and not bypaseed PLLs</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LRF_PLL_0</name>
                  <description>interrupt is not generated due to lock ready of all enabled and not bypaseed PLLs</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LRF_PLL_1</name>
                  <description>interrupt generated due to lock ready of all enabled and not bypaseed PLLs</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>COSC_READY</name>
              <description>CCM interrupt request 2 generated due to on board oscillator ready, i</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
              <enumeratedValues>
                <enumeratedValue>
                  <name>COSC_READY_0</name>
                  <description>interrupt is not generated due to on board oscillator ready</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>COSC_READY_1</name>
                  <description>interrupt generated due to on board oscillator ready</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>AXI_PODF_LOADED</name>
              <description>CCM interrupt request 1 generated due to frequency change of axi_podf</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
              <enumeratedValues>
                <enumeratedValue>
                  <name>AXI_PODF_LOADED_0</name>
                  <description>interrupt is not generated due to frequency change of axi_podf</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AXI_PODF_LOADED_1</name>
                  <description>interrupt generated due to frequency change of axi_podf</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PERIPH2_CLK_SEL_LOADED</name>
              <description>CCM interrupt request 1 generated due to frequency change of periph2_clk_sel</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PERIPH2_CLK_SEL_LOADED_0</name>
                  <description>interrupt is not generated due to frequency change of periph2_clk_sel</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PERIPH2_CLK_SEL_LOADED_1</name>
                  <description>interrupt generated due to frequency change of periph2_clk_sel</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>AHB_PODF_LOADED</name>
              <description>CCM interrupt request 1 generated due to frequency change of ahb_podf</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
              <enumeratedValues>
                <enumeratedValue>
                  <name>AHB_PODF_LOADED_0</name>
                  <description>interrupt is not generated due to frequency change of ahb_podf</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AHB_PODF_LOADED_1</name>
                  <description>interrupt generated due to frequency change of ahb_podf</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>MMDC_PODF_LOADED</name>
              <description>CCM interrupt request 1 generated due to frequency change of mmdc_podf_ loaded</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
              <enumeratedValues>
                <enumeratedValue>
                  <name>MMDC_PODF_LOADED_0</name>
                  <description>interrupt is not generated due to frequency change of mmdc_podf_ loaded</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MMDC_PODF_LOADED_1</name>
                  <description>interrupt generated due to frequency change of mmdc_podf_ loaded</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PERIPH_CLK_SEL_LOADED</name>
              <description>CCM interrupt request 1 generated due to update of periph_clk_sel.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PERIPH_CLK_SEL_LOADED_0</name>
                  <description>interrupt is not generated due to update of periph_clk_sel.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PERIPH_CLK_SEL_LOADED_1</name>
                  <description>interrupt generated due to update of periph_clk_sel.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ARM_PODF_LOADED</name>
              <description>CCM interrupt request 1 generated due to frequency change of arm_podf</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ARM_PODF_LOADED_0</name>
                  <description>interrupt is not generated due to frequency change of arm_podf</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ARM_PODF_LOADED_1</name>
                  <description>interrupt generated due to frequency change of arm_podf</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>CIMR</name>
          <description>CCM Interrupt Mask Register</description>
          <addressOffset>0x5C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0xFFFFFFFF</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MASK_LRF_PLL</name>
              <description>mask interrupt generation due to lrf of PLLs</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>MASK_LRF_PLL_0</name>
                  <description>don't mask interrupt due to lrf of PLLs - interrupt will be created</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MASK_LRF_PLL_1</name>
                  <description>mask interrupt due to lrf of PLLs</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>MASK_COSC_READY</name>
              <description>mask interrupt generation due to on board oscillator ready</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>MASK_COSC_READY_0</name>
                  <description>don't mask interrupt due to on board oscillator ready - interrupt will be created</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MASK_COSC_READY_1</name>
                  <description>mask interrupt due to on board oscillator ready</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>MASK_AXI_PODF_LOADED</name>
              <description>mask interrupt generation due to frequency change of axi_podf</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>MASK_AXI_PODF_LOADED_0</name>
                  <description>don't mask interrupt due to frequency change of axi_podf - interrupt will be created</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MASK_AXI_PODF_LOADED_1</name>
                  <description>mask interrupt due to frequency change of axi_podf</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>MASK_PERIPH2_CLK_SEL_LOADED</name>
              <description>mask interrupt generation due to update of periph2_clk_sel.</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>MASK_PERIPH2_CLK_SEL_LOADED_0</name>
                  <description>don't mask interrupt due to update of periph2_clk_sel - interrupt will be created</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MASK_PERIPH2_CLK_SEL_LOADED_1</name>
                  <description>mask interrupt due to update of periph2_clk_sel</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>MASK_AHB_PODF_LOADED</name>
              <description>mask interrupt generation due to frequency change of ahb_podf</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>MASK_AHB_PODF_LOADED_0</name>
                  <description>don't mask interrupt due to frequency change of ahb_podf - interrupt will be created</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MASK_AHB_PODF_LOADED_1</name>
                  <description>mask interrupt due to frequency change of ahb_podf</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>MASK_MMDC_PODF_LOADED</name>
              <description>mask interrupt generation due to update of mask_mmdc_podf</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>MASK_MMDC_PODF_LOADED_0</name>
                  <description>don't mask interrupt due to update of mask_mmdc_podf - interrupt will be created</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MASK_MMDC_PODF_LOADED_1</name>
                  <description>mask interrupt due to update of mask_mmdc_podf</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>MASK_PERIPH_CLK_SEL_LOADED</name>
              <description>mask interrupt generation due to update of periph_clk_sel.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>MASK_PERIPH_CLK_SEL_LOADED_0</name>
                  <description>don't mask interrupt due to update of periph_clk_sel - interrupt will be created</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MASK_PERIPH_CLK_SEL_LOADED_1</name>
                  <description>mask interrupt due to update of periph_clk_sel</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ARM_PODF_LOADED</name>
              <description>mask interrupt generation due to frequency change of arm_podf</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ARM_PODF_LOADED_0</name>
                  <description>don't mask interrupt due to frequency change of arm_podf - interrupt will be created</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ARM_PODF_LOADED_1</name>
                  <description>mask interrupt due to frequency change of arm_podf</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>CCOSR</name>
          <description>CCM Clock Output Source Register</description>
          <addressOffset>0x60</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0xA0001</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>CLKO_SEL</name>
              <description>Selection of the clock to be generated on CCM_CLKO1</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CLKO_SEL_5</name>
                  <description>axi_clk_root</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLKO_SEL_6</name>
                  <description>enfc_clk_root</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLKO_SEL_7</name>
                  <description>no description available</description>
                  <value>0x7</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLKO_SEL_8</name>
                  <description>epdc_clk_root</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLKO_SEL_9</name>
                  <description>no description available</description>
                  <value>0x9</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLKO_SEL_10</name>
                  <description>lcdif_pix_clk_root</description>
                  <value>0xA</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLKO_SEL_11</name>
                  <description>ahb_clk_root</description>
                  <value>0xB</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLKO_SEL_12</name>
                  <description>ipg_clk_root</description>
                  <value>0xC</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLKO_SEL_13</name>
                  <description>perclk_root</description>
                  <value>0xD</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLKO_SEL_14</name>
                  <description>ckil_sync_clk_root</description>
                  <value>0xE</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLKO_SEL_15</name>
                  <description>pll4_main_clk</description>
                  <value>0xF</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CLKO1_DIV</name>
              <description>Setting the divider of CCM_CLKO1</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CLKO1_DIV_0</name>
                  <description>divide by 1</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLKO1_DIV_1</name>
                  <description>divide by 2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLKO1_DIV_2</name>
                  <description>divide by 3</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLKO1_DIV_3</name>
                  <description>divide by 4</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLKO1_DIV_4</name>
                  <description>divide by 5</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLKO1_DIV_5</name>
                  <description>divide by 6</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLKO1_DIV_6</name>
                  <description>divide by 7</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLKO1_DIV_7</name>
                  <description>divide by 8</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CLKO1_EN</name>
              <description>Enable of CCM_CLKO1 clock</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CLKO1_EN_0</name>
                  <description>CCM_CLKO1 disabled.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLKO1_EN_1</name>
                  <description>CCM_CLKO1 enabled.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CLK_OUT_SEL</name>
              <description>CCM_CLKO1 output to reflect CCM_CLKO1 or CCM_CLKO2 clocks</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CLK_OUT_SEL_0</name>
                  <description>CCM_CLKO1 output drives CCM_CLKO1 clock</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLK_OUT_SEL_1</name>
                  <description>CCM_CLKO1 output drives CCM_CLKO2 clock</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CLKO2_SEL</name>
              <description>Selection of the clock to be generated on CCM_CLKO2</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CLKO2_SEL_1</name>
                  <description>mmdc_clk_root</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLKO2_SEL_2</name>
                  <description>gpmi_clk_root</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLKO2_SEL_3</name>
                  <description>usdhc1_clk_root</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLKO2_SEL_5</name>
                  <description>wrck_clk_root</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLKO2_SEL_6</name>
                  <description>ecspi_clk_root</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLKO2_SEL_8</name>
                  <description>bch_clk_root</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLKO2_SEL_10</name>
                  <description>arm_clk_root</description>
                  <value>0xA</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLKO2_SEL_11</name>
                  <description>csi_core</description>
                  <value>0xB</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLKO2_SEL_14</name>
                  <description>osc_clk</description>
                  <value>0xE</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLKO2_SEL_17</name>
                  <description>usdhc2_clk_root</description>
                  <value>0x11</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLKO2_SEL_18</name>
                  <description>sai1_clk_root</description>
                  <value>0x12</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLKO2_SEL_19</name>
                  <description>sai2_clk_root</description>
                  <value>0x13</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLKO2_SEL_20</name>
                  <description>sai3_clk_root</description>
                  <value>0x14</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLKO2_SEL_23</name>
                  <description>can_clk_root</description>
                  <value>0x17</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLKO2_SEL_25</name>
                  <description>qspi1_clk_root</description>
                  <value>0x19</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLKO2_SEL_27</name>
                  <description>aclk_eim_slow_clk_root</description>
                  <value>0x1B</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLKO2_SEL_28</name>
                  <description>uart_clk_root</description>
                  <value>0x1C</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLKO2_SEL_29</name>
                  <description>spdif0_clk_root</description>
                  <value>0x1D</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CLKO2_DIV</name>
              <description>Setting the divider of CCM_CLKO2</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CLKO2_DIV_0</name>
                  <description>divide by 1</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLKO2_DIV_1</name>
                  <description>divide by 2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLKO2_DIV_2</name>
                  <description>divide by 3</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLKO2_DIV_3</name>
                  <description>divide by 4</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLKO2_DIV_4</name>
                  <description>divide by 5</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLKO2_DIV_5</name>
                  <description>divide by 6</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLKO2_DIV_6</name>
                  <description>divide by 7</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLKO2_DIV_7</name>
                  <description>divide by 8</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CLKO2_EN</name>
              <description>Enable of CCM_CLKO2 clock</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CLKO2_EN_0</name>
                  <description>CCM_CLKO2 disabled.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLKO2_EN_1</name>
                  <description>CCM_CLKO2 enabled.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>CGPR</name>
          <description>CCM General Purpose Register</description>
          <addressOffset>0x64</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0xFE62</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>PMIC_DELAY_SCALER</name>
              <description>Defines clock dividion of clock for stby_count (pmic delay counter)</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PMIC_DELAY_SCALER_0</name>
                  <description>clock is not divided</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PMIC_DELAY_SCALER_1</name>
                  <description>clock is divided /8</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>MMDC_EXT_CLK_DIS</name>
              <description>Disable external clock driver of MMDC during STOP mode</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>MMDC_EXT_CLK_DIS_0</name>
                  <description>don't disable during stop mode.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MMDC_EXT_CLK_DIS_1</name>
                  <description>disable during stop mode</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>EFUSE_PROG_SUPPLY_GATE</name>
              <description>Defines the value of the output signal cgpr_dout[4]. Gate of program supply for efuse programing</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>EFUSE_PROG_SUPPLY_GATE_0</name>
                  <description>fuse programing supply voltage is gated off to the efuse module</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>EFUSE_PROG_SUPPLY_GATE_1</name>
                  <description>allow fuse programing.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SYS_MEM_DS_CTRL</name>
              <description>System memory DS control</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SYS_MEM_DS_CTRL_0</name>
                  <description>Disable memory DS mode always</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SYS_MEM_DS_CTRL_1</name>
                  <description>Enable memory (outside ARM platform) DS mode when system STOP and PLL are disabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>FPL</name>
              <description>Fast PLL enable.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>FPL_0</name>
                  <description>Engage PLL enable default way.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FPL_1</name>
                  <description>Engage PLL enable 3 CKIL clocks earlier at exiting low power mode (STOP). Should be used only if 24MHz OSC was active in low power mode.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>INT_MEM_CLK_LPM</name>
              <description>Control for the Deep Sleep signal to the ARM Platform memories with additional control logic based on the ARM WFI signal</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>INT_MEM_CLK_LPM_0</name>
                  <description>Disable the clock to the ARM platform memories when entering Low Power Mode</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>INT_MEM_CLK_LPM_1</name>
                  <description>Keep the clocks to the ARM platform memories enabled only if an interrupt is pending when entering Low Power Modes (WAIT and STOP without power gating)</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>CCGR0</name>
          <description>CCM Clock Gating Register 0</description>
          <addressOffset>0x68</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0xFFFFFFFF</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>CG0</name>
              <description>aips_tz1 clocks (aips_tz1_clk_enable)</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG1</name>
              <description>aips_tz2 clocks (aips_tz2_clk_enable)</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG2</name>
              <description>apbhdma hclk clock (apbhdma_hclk_enable)</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG3</name>
              <description>asrc clock (asrc_clk_enable)</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG4</name>
              <description>Reserved</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG5</name>
              <description>dcp clock (dcp_clk_enable)</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG6</name>
              <description>enet clock (enet_clk_enable)</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG7</name>
              <description>can1 clock (can1_clk_enable)</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG8</name>
              <description>can1_serial clock (can1_serial_clk_enable)</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG9</name>
              <description>can2 clock (can2_clk_enable)</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG10</name>
              <description>can2_serial clock (can2_serial_clk_enable)</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG11</name>
              <description>CPU debug clocks (arm_dbg_clk_enable)</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG12</name>
              <description>dcic1 clocks (dcic1_clk_enable) gpt2 bus clocks (gpt2_bus_clk_enable)</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG13</name>
              <description>gpt2 serial clocks (gpt2_serial_clk_enable)</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG14</name>
              <description>uart2 clock (uart2_clk_enable)</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG15</name>
              <description>gpio2_clocks (gpio2_clk_enable)</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CCGR1</name>
          <description>CCM Clock Gating Register 1</description>
          <addressOffset>0x6C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0xFFFFFFFF</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>CG0</name>
              <description>ecspi1 clocks (ecspi1_clk_enable)</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG1</name>
              <description>ecspi2 clocks (ecspi2_clk_enable)</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG2</name>
              <description>ecspi3 clocks (ecspi3_clk_enable)</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG3</name>
              <description>ecspi4 clocks (ecspi4_clk_enable)</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG4</name>
              <description>adc2 clock (adc2_clk_enable)</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG5</name>
              <description>uart3 clock (uart3_clk_enable)</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG6</name>
              <description>epit1 clocks (epit1_clk_enable)</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG7</name>
              <description>epit2 clocks (epit2_clk_enable)</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG8</name>
              <description>adc1 clock (adc1_clk_enable)</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG9</name>
              <description>sim_s clock (sim_s_clk_enable)</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG10</name>
              <description>gpt bus clock (gpt_clk_enable)</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG11</name>
              <description>gpt serial clock (gpt_serial_clk_enable)</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG12</name>
              <description>uart4 clock (uart4_clk_enable)</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG13</name>
              <description>gpio1 clock (gpio1_clk_enable)</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG14</name>
              <description>csu clock (csu_clk_enable)</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG15</name>
              <description>gpio5 clock (gpio5_clk_enable)</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CCGR2</name>
          <description>CCM Clock Gating Register 2</description>
          <addressOffset>0x70</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0xFC3FFFFF</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>CG0</name>
              <description>esai clock (esai_clk_enable)</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG1</name>
              <description>csi clock (csi_clk_enable)</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG2</name>
              <description>iomuxc_snvs clock (iomuxc_snvs_clk_enable)</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG3</name>
              <description>i2c1_serial clock (i2c1_serial_clk_enable)</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG4</name>
              <description>i2c2_serial clock (i2c2_serial_clk_enable)</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG5</name>
              <description>i2c3_serial clock (i2c3_serial_clk_enable)</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG6</name>
              <description>OCOTP_CTRL clock (iim_clk_enable)</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG7</name>
              <description>iomux_ipt_clk_io clock (iomux_ipt_clk_io_enable)</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG8</name>
              <description>ipmux1 clock (ipmux1_clk_enable)</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG9</name>
              <description>ipmux2 clock (ipmux2_clk_enable)</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG10</name>
              <description>ipmux3 clock (ipmux3_clk_enable)</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG11</name>
              <description>ipsync_ip2apb_tzasc1_ipg clocks (ipsync_ip2apb_tzasc1_ipg_master_clk_enable)</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG12</name>
              <description>Reserved</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG13</name>
              <description>gpio3 clock (gpio3_clk_enable)</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG14</name>
              <description>lcd clocks (lcd_clk_enable)</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG15</name>
              <description>pxp clocks (pxp_clk_enable)</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CCGR3</name>
          <description>CCM Clock Gating Register 3</description>
          <addressOffset>0x74</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0xFFFFFFFF</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>CG0</name>
              <description>Reserved</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG1</name>
              <description>uart5 clock (uart5_clk_enable)</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG2</name>
              <description>epdc clock (epdc_clk_enable)</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG3</name>
              <description>uart6 clock (uart6_clk_enable)</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG4</name>
              <description>CA7 CCM DAP clock (ccm_dap_clk_enable)</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG5</name>
              <description>lcdif1 pix clock (lcdif1_pix_clk_enable)</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG6</name>
              <description>gpio4 clock (gpio4_clk_enable)</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG7</name>
              <description>qspi1 clock (qspi1_clk_enable)</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG8</name>
              <description>wdog1 clock (wdog1_clk_enable)</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG9</name>
              <description>a7 clkdiv patch clock (a7_clkdiv_patch_clk_enable)</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG10</name>
              <description>mmdc_core_aclk_fast_core_p0 clock (mmdc_core_aclk_fast_core_p0_enable)</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG11</name>
              <description>Reserved</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG12</name>
              <description>mmdc_core_ipg_clk_p0 clock (mmdc_core_ipg_clk_p0_enable)</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG13</name>
              <description>mmdc_core_ipg_clk_p1 clock (mmdc_core_ipg_clk_p1_enable)</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG14</name>
              <description>axi clock (axi_clk_enable)</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG15</name>
              <description>iomuxc_snvs_gpr clock (iomuxc_snvs_gpr_clk_enable)</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CCGR4</name>
          <description>CCM Clock Gating Register 4</description>
          <addressOffset>0x78</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0xFFFFFFFF</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>CG0</name>
              <description>Reserved</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG1</name>
              <description>iomuxc clock (iomuxc_clk_enable)</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG2</name>
              <description>iomuxc gpr clock (iomuxc_gpr_clk_enable)</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG3</name>
              <description>sim_cpu clock (sim_cpu_clk_enable)</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG4</name>
              <description>cxapbsyncbridge slave clock (cxapbsyncbridge_slave_clk_enable)</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG5</name>
              <description>tsc_dig clock (tsc_clk_enable)</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG6</name>
              <description>pl301_mx6qper1_bch clocks (pl301_mx6qper1_bchclk_enable) This gates bch_clk_root to sim_m fabric.</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG7</name>
              <description>pl301_mx6qper2_mainclk_enable (pl301_mx6qper2_mainclk_enable)</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG8</name>
              <description>pwm1 clocks (pwm1_clk_enable)</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG9</name>
              <description>pwm2 clocks (pwm2_clk_enable)</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG10</name>
              <description>pwm3 clocks (pwm3_clk_enable)</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG11</name>
              <description>pwm4 clocks (pwm4_clk_enable)</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG12</name>
              <description>rawnand_u_bch_input_apb clock (rawnand_u_bch_input_apb_clk_enable)</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG13</name>
              <description>rawnand_u_gpmi_bch_input_bch clock (rawnand_u_gpmi_bch_input_bch_clk_enable)</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG14</name>
              <description>rawnand_u_gpmi_bch_input_gpmi_io clock (rawnand_u_gpmi_bch_input_gpmi_io_clk_enable)</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG15</name>
              <description>rawnand_u_gpmi_input_apb clock (rawnand_u_gpmi_input_apb_clk_enable)</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CCGR5</name>
          <description>CCM Clock Gating Register 5</description>
          <addressOffset>0x7C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0xFFFFFFFF</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>CG0</name>
              <description>rom clock (rom_clk_enable)</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG1</name>
              <description>stcr clock (stcr_clk_enable)</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG2</name>
              <description>snvs dryice clock (snvs_dryice_clk_enable)</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG3</name>
              <description>sdma clock (sdma_clk_enable)</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG4</name>
              <description>kpp clock (kpp_clk_enable)</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG5</name>
              <description>wdog2 clock (wdog2_clk_enable)</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG6</name>
              <description>spba clock (spba_clk_enable)</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG7</name>
              <description>spdif / audio clock (spdif_clk_enable, audio_clk_root)</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG8</name>
              <description>sim_main clock (sim_main_clk_enable)</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG9</name>
              <description>snvs_hp clock (snvs_hp_clk_enable)</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG10</name>
              <description>snvs_lp clock (snvs_lp_clk_enable)</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG11</name>
              <description>sai3 clock (sai3_clk_enable)</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG12</name>
              <description>uart1 clock (uart1_clk_enable)</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG13</name>
              <description>uart7 clock (uart7_clk_enable)</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG14</name>
              <description>sai1 clock (sai1_clk_enable)</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG15</name>
              <description>sai2 clock (sai2_clk_enable)</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CCGR6</name>
          <description>CCM Clock Gating Register 6</description>
          <addressOffset>0x80</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0xFFFFFFFF</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>CG0</name>
              <description>usboh3 clock (usboh3_clk_enable)</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG1</name>
              <description>usdhc1 clocks (usdhc1_clk_enable)</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG2</name>
              <description>usdhc2 clocks (usdhc2_clk_enable)</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG3</name>
              <description>Reserved</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG4</name>
              <description>ipmux4 clock (ipmux4_clk_enable)</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG5</name>
              <description>eim_slow clocks (eim_slow_clk_enable)</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG6</name>
              <description>Reserved</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG7</name>
              <description>uart8 clocks (uart8_clk_enable)</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG8</name>
              <description>pwm8 clocks (pwm8_clk_enable)</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG9</name>
              <description>aips_tz3 clock (aips_tz3_clk_enable)</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG10</name>
              <description>wdog3 clock (wdog3_clk_enable)</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG11</name>
              <description>anadig clocks (anadig_clk_enable)</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG12</name>
              <description>i2c4 serial clock (i2c4_serial_clk_enable)</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG13</name>
              <description>pwm5 clocks (pwm5_clk_enable)</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG14</name>
              <description>pwm6 clocks (pwm6_clk_enable)</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CG15</name>
              <description>pwm7 clocks (pwm7_clk_enable)</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CMEOR</name>
          <description>CCM Module Enable Overide Register</description>
          <addressOffset>0x88</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0xFFFFFFFF</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MOD_EN_OV_GPT</name>
              <description>Overide clock enable signal from GPT - clock will not be gated based on GPT's signal 'ipg_enable_clk'</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>MOD_EN_OV_GPT_0</name>
                  <description>don't override module enable signal</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MOD_EN_OV_GPT_1</name>
                  <description>override module enable signal</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>MOD_EN_OV_EPIT</name>
              <description>Overide clock enable signal from EPIT - clock will not be gated based on EPIT's signal 'ipg_enable_clk'</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>MOD_EN_OV_EPIT_0</name>
                  <description>don't override module enable signal</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MOD_EN_OV_EPIT_1</name>
                  <description>override module enable signal</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>MOD_EN_USDHC</name>
              <description>overide clock enable signal from USDHC.</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>MOD_EN_USDHC_0</name>
                  <description>don't override module enable signal</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MOD_EN_USDHC_1</name>
                  <description>override module enable signal</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>MOD_EN_OV_CAN2_CPI</name>
              <description>Overide clock enable signal from CAN2 - clock will not be gated based on CAN's signal 'enable_clk_cpi'</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>MOD_EN_OV_CAN2_CPI_0</name>
                  <description>don't override module enable signal</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MOD_EN_OV_CAN2_CPI_1</name>
                  <description>override module enable signal</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>MOD_EN_OV_CAN1_CPI</name>
              <description>Overide clock enable signal from CAN1 - clock will not be gated based on CAN's signal 'enable_clk_cpi'</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>MOD_EN_OV_CAN1_CPI_0</name>
                  <description>don't overide module enable signal</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MOD_EN_OV_CAN1_CPI_1</name>
                  <description>overide module enable signal</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
      </registers>
    </peripheral>
    <peripheral>
      <name>CCM_ANALOG</name>
      <description>CCM_ANALOG</description>
      <groupName>CCM_ANALOG</groupName>
      <prependToName>CCM_ANALOG_</prependToName>
      <baseAddress>0x20C8000</baseAddress>
      <addressBlock>
        <offset>0</offset>
        <size>0x180</size>
        <usage>registers</usage>
      </addressBlock>
      <registers>
        <register>
          <name>PLL_ARM</name>
          <description>Analog ARM PLL control Register</description>
          <addressOffset>0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x13063</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DIV_SELECT</name>
              <description>This field controls the PLL loop divider</description>
              <bitOffset>0</bitOffset>
              <bitWidth>7</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>POWERDOWN</name>
              <description>Powers down the PLL.</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENABLE</name>
              <description>Enable the clock output.</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYPASS_CLK_SRC</name>
              <description>Determines the bypass source</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>REF_CLK_24M</name>
                  <description>Select the 24MHz oscillator as source.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLK1</name>
                  <description>Select the CLK1_N / CLK1_P as source.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BYPASS</name>
              <description>Bypass the PLL.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PLL_SEL</name>
              <description>Reserved</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>LOCK</name>
              <description>1 - PLL is currently locked. 0 - PLL is not currently locked.</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>PLL_ARM_SET</name>
          <description>Analog ARM PLL control Register</description>
          <addressOffset>0x4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x13063</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DIV_SELECT</name>
              <description>This field controls the PLL loop divider</description>
              <bitOffset>0</bitOffset>
              <bitWidth>7</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>POWERDOWN</name>
              <description>Powers down the PLL.</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENABLE</name>
              <description>Enable the clock output.</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYPASS_CLK_SRC</name>
              <description>Determines the bypass source</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>REF_CLK_24M</name>
                  <description>Select the 24MHz oscillator as source.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLK1</name>
                  <description>Select the CLK1_N / CLK1_P as source.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BYPASS</name>
              <description>Bypass the PLL.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PLL_SEL</name>
              <description>Reserved</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>LOCK</name>
              <description>1 - PLL is currently locked. 0 - PLL is not currently locked.</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>PLL_ARM_CLR</name>
          <description>Analog ARM PLL control Register</description>
          <addressOffset>0x8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x13063</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DIV_SELECT</name>
              <description>This field controls the PLL loop divider</description>
              <bitOffset>0</bitOffset>
              <bitWidth>7</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>POWERDOWN</name>
              <description>Powers down the PLL.</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENABLE</name>
              <description>Enable the clock output.</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYPASS_CLK_SRC</name>
              <description>Determines the bypass source</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>REF_CLK_24M</name>
                  <description>Select the 24MHz oscillator as source.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLK1</name>
                  <description>Select the CLK1_N / CLK1_P as source.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BYPASS</name>
              <description>Bypass the PLL.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PLL_SEL</name>
              <description>Reserved</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>LOCK</name>
              <description>1 - PLL is currently locked. 0 - PLL is not currently locked.</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>PLL_ARM_TOG</name>
          <description>Analog ARM PLL control Register</description>
          <addressOffset>0xC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x13063</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DIV_SELECT</name>
              <description>This field controls the PLL loop divider</description>
              <bitOffset>0</bitOffset>
              <bitWidth>7</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>POWERDOWN</name>
              <description>Powers down the PLL.</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENABLE</name>
              <description>Enable the clock output.</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYPASS_CLK_SRC</name>
              <description>Determines the bypass source</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>REF_CLK_24M</name>
                  <description>Select the 24MHz oscillator as source.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLK1</name>
                  <description>Select the CLK1_N / CLK1_P as source.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BYPASS</name>
              <description>Bypass the PLL.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PLL_SEL</name>
              <description>Reserved</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>LOCK</name>
              <description>1 - PLL is currently locked. 0 - PLL is not currently locked.</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>PLL_USB1</name>
          <description>Analog USB1 480MHz PLL Control Register</description>
          <addressOffset>0x10</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x12000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DIV_SELECT</name>
              <description>This field controls the PLL loop divider. 0 - Fout=Fref*20; 1 - Fout=Fref*22.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>EN_USB_CLKS</name>
              <description>Powers the 9-phase PLL outputs for USBPHYn</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>EN_USB_CLKS_0</name>
                  <description>PLL outputs for USBPHYn off.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>EN_USB_CLKS_1</name>
                  <description>PLL outputs for USBPHYn on.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>POWER</name>
              <description>Powers up the PLL. This bit will be set automatically when USBPHY0 remote wakeup event happens.</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENABLE</name>
              <description>Enable the PLL clock output.</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYPASS_CLK_SRC</name>
              <description>Determines the bypass source.</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>REF_CLK_24M</name>
                  <description>Select the 24MHz oscillator as source.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLK1</name>
                  <description>Select the CLK1_N / CLK1_P as source.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>GPANAIO</name>
                  <description>no description available</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CHRG_DET_B</name>
                  <description>no description available</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BYPASS</name>
              <description>Bypass the PLL.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>LOCK</name>
              <description>1 - PLL is currently locked. 0 - PLL is not currently locked.</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>PLL_USB1_SET</name>
          <description>Analog USB1 480MHz PLL Control Register</description>
          <addressOffset>0x14</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x12000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DIV_SELECT</name>
              <description>This field controls the PLL loop divider. 0 - Fout=Fref*20; 1 - Fout=Fref*22.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>EN_USB_CLKS</name>
              <description>Powers the 9-phase PLL outputs for USBPHYn</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>EN_USB_CLKS_0</name>
                  <description>PLL outputs for USBPHYn off.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>EN_USB_CLKS_1</name>
                  <description>PLL outputs for USBPHYn on.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>POWER</name>
              <description>Powers up the PLL. This bit will be set automatically when USBPHY0 remote wakeup event happens.</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENABLE</name>
              <description>Enable the PLL clock output.</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYPASS_CLK_SRC</name>
              <description>Determines the bypass source.</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>REF_CLK_24M</name>
                  <description>Select the 24MHz oscillator as source.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLK1</name>
                  <description>Select the CLK1_N / CLK1_P as source.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>GPANAIO</name>
                  <description>no description available</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CHRG_DET_B</name>
                  <description>no description available</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BYPASS</name>
              <description>Bypass the PLL.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>LOCK</name>
              <description>1 - PLL is currently locked. 0 - PLL is not currently locked.</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>PLL_USB1_CLR</name>
          <description>Analog USB1 480MHz PLL Control Register</description>
          <addressOffset>0x18</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x12000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DIV_SELECT</name>
              <description>This field controls the PLL loop divider. 0 - Fout=Fref*20; 1 - Fout=Fref*22.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>EN_USB_CLKS</name>
              <description>Powers the 9-phase PLL outputs for USBPHYn</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>EN_USB_CLKS_0</name>
                  <description>PLL outputs for USBPHYn off.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>EN_USB_CLKS_1</name>
                  <description>PLL outputs for USBPHYn on.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>POWER</name>
              <description>Powers up the PLL. This bit will be set automatically when USBPHY0 remote wakeup event happens.</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENABLE</name>
              <description>Enable the PLL clock output.</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYPASS_CLK_SRC</name>
              <description>Determines the bypass source.</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>REF_CLK_24M</name>
                  <description>Select the 24MHz oscillator as source.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLK1</name>
                  <description>Select the CLK1_N / CLK1_P as source.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>GPANAIO</name>
                  <description>no description available</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CHRG_DET_B</name>
                  <description>no description available</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BYPASS</name>
              <description>Bypass the PLL.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>LOCK</name>
              <description>1 - PLL is currently locked. 0 - PLL is not currently locked.</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>PLL_USB1_TOG</name>
          <description>Analog USB1 480MHz PLL Control Register</description>
          <addressOffset>0x1C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x12000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DIV_SELECT</name>
              <description>This field controls the PLL loop divider. 0 - Fout=Fref*20; 1 - Fout=Fref*22.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>EN_USB_CLKS</name>
              <description>Powers the 9-phase PLL outputs for USBPHYn</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>EN_USB_CLKS_0</name>
                  <description>PLL outputs for USBPHYn off.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>EN_USB_CLKS_1</name>
                  <description>PLL outputs for USBPHYn on.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>POWER</name>
              <description>Powers up the PLL. This bit will be set automatically when USBPHY0 remote wakeup event happens.</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENABLE</name>
              <description>Enable the PLL clock output.</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYPASS_CLK_SRC</name>
              <description>Determines the bypass source.</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>REF_CLK_24M</name>
                  <description>Select the 24MHz oscillator as source.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLK1</name>
                  <description>Select the CLK1_N / CLK1_P as source.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>GPANAIO</name>
                  <description>no description available</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CHRG_DET_B</name>
                  <description>no description available</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BYPASS</name>
              <description>Bypass the PLL.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>LOCK</name>
              <description>1 - PLL is currently locked. 0 - PLL is not currently locked.</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>PLL_USB2</name>
          <description>Analog USB2 480MHz PLL Control Register</description>
          <addressOffset>0x20</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x12000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DIV_SELECT</name>
              <description>This field controls the PLL loop divider. 0 - Fout=Fref*20; 1 - Fout=Fref*22.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>EN_USB_CLKS</name>
              <description>0: 8-phase PLL outputs for USBPHY1 are powered down</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>POWER</name>
              <description>Powers up the PLL. This bit will be set automatically when USBPHY1 remote wakeup event happens.</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENABLE</name>
              <description>Enable the PLL clock output.</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYPASS_CLK_SRC</name>
              <description>Determines the bypass source.</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>REF_CLK_24M</name>
                  <description>Select the 24MHz oscillator as source.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLK1</name>
                  <description>Select the CLK1_N / CLK1_P as source.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BYPASS</name>
              <description>Bypass the PLL.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>LOCK</name>
              <description>1 - PLL is currently locked. 0 - PLL is not currently locked.</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>PLL_USB2_SET</name>
          <description>Analog USB2 480MHz PLL Control Register</description>
          <addressOffset>0x24</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x12000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DIV_SELECT</name>
              <description>This field controls the PLL loop divider. 0 - Fout=Fref*20; 1 - Fout=Fref*22.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>EN_USB_CLKS</name>
              <description>0: 8-phase PLL outputs for USBPHY1 are powered down</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>POWER</name>
              <description>Powers up the PLL. This bit will be set automatically when USBPHY1 remote wakeup event happens.</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENABLE</name>
              <description>Enable the PLL clock output.</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYPASS_CLK_SRC</name>
              <description>Determines the bypass source.</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>REF_CLK_24M</name>
                  <description>Select the 24MHz oscillator as source.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLK1</name>
                  <description>Select the CLK1_N / CLK1_P as source.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BYPASS</name>
              <description>Bypass the PLL.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>LOCK</name>
              <description>1 - PLL is currently locked. 0 - PLL is not currently locked.</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>PLL_USB2_CLR</name>
          <description>Analog USB2 480MHz PLL Control Register</description>
          <addressOffset>0x28</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x12000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DIV_SELECT</name>
              <description>This field controls the PLL loop divider. 0 - Fout=Fref*20; 1 - Fout=Fref*22.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>EN_USB_CLKS</name>
              <description>0: 8-phase PLL outputs for USBPHY1 are powered down</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>POWER</name>
              <description>Powers up the PLL. This bit will be set automatically when USBPHY1 remote wakeup event happens.</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENABLE</name>
              <description>Enable the PLL clock output.</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYPASS_CLK_SRC</name>
              <description>Determines the bypass source.</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>REF_CLK_24M</name>
                  <description>Select the 24MHz oscillator as source.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLK1</name>
                  <description>Select the CLK1_N / CLK1_P as source.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BYPASS</name>
              <description>Bypass the PLL.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>LOCK</name>
              <description>1 - PLL is currently locked. 0 - PLL is not currently locked.</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>PLL_USB2_TOG</name>
          <description>Analog USB2 480MHz PLL Control Register</description>
          <addressOffset>0x2C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x12000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DIV_SELECT</name>
              <description>This field controls the PLL loop divider. 0 - Fout=Fref*20; 1 - Fout=Fref*22.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>EN_USB_CLKS</name>
              <description>0: 8-phase PLL outputs for USBPHY1 are powered down</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>POWER</name>
              <description>Powers up the PLL. This bit will be set automatically when USBPHY1 remote wakeup event happens.</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENABLE</name>
              <description>Enable the PLL clock output.</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYPASS_CLK_SRC</name>
              <description>Determines the bypass source.</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>REF_CLK_24M</name>
                  <description>Select the 24MHz oscillator as source.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLK1</name>
                  <description>Select the CLK1_N / CLK1_P as source.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BYPASS</name>
              <description>Bypass the PLL.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>LOCK</name>
              <description>1 - PLL is currently locked. 0 - PLL is not currently locked.</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>PLL_SYS</name>
          <description>Analog System PLL Control Register</description>
          <addressOffset>0x30</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x13001</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DIV_SELECT</name>
              <description>This field controls the PLL loop divider. 0 - Fout=Fref*20; 1 - Fout=Fref*22.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>POWERDOWN</name>
              <description>Powers down the PLL.</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENABLE</name>
              <description>Enable PLL output</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYPASS_CLK_SRC</name>
              <description>Determines the bypass source.</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>REF_CLK_24M</name>
                  <description>Select the 24MHz oscillator as source.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLK1</name>
                  <description>Select the CLK1_N / CLK1_P as source.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>GPANAIO</name>
                  <description>no description available</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CHRG_DET_B</name>
                  <description>no description available</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BYPASS</name>
              <description>Bypass the PLL.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PFD_OFFSET_EN</name>
              <description>Enables an offset in the phase frequency detector.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>LOCK</name>
              <description>1 - PLL is currently locked; 0 - PLL is not currently locked.</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>PLL_SYS_SET</name>
          <description>Analog System PLL Control Register</description>
          <addressOffset>0x34</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x13001</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DIV_SELECT</name>
              <description>This field controls the PLL loop divider. 0 - Fout=Fref*20; 1 - Fout=Fref*22.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>POWERDOWN</name>
              <description>Powers down the PLL.</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENABLE</name>
              <description>Enable PLL output</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYPASS_CLK_SRC</name>
              <description>Determines the bypass source.</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>REF_CLK_24M</name>
                  <description>Select the 24MHz oscillator as source.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLK1</name>
                  <description>Select the CLK1_N / CLK1_P as source.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>GPANAIO</name>
                  <description>no description available</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CHRG_DET_B</name>
                  <description>no description available</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BYPASS</name>
              <description>Bypass the PLL.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PFD_OFFSET_EN</name>
              <description>Enables an offset in the phase frequency detector.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>LOCK</name>
              <description>1 - PLL is currently locked; 0 - PLL is not currently locked.</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>PLL_SYS_CLR</name>
          <description>Analog System PLL Control Register</description>
          <addressOffset>0x38</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x13001</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DIV_SELECT</name>
              <description>This field controls the PLL loop divider. 0 - Fout=Fref*20; 1 - Fout=Fref*22.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>POWERDOWN</name>
              <description>Powers down the PLL.</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENABLE</name>
              <description>Enable PLL output</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYPASS_CLK_SRC</name>
              <description>Determines the bypass source.</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>REF_CLK_24M</name>
                  <description>Select the 24MHz oscillator as source.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLK1</name>
                  <description>Select the CLK1_N / CLK1_P as source.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>GPANAIO</name>
                  <description>no description available</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CHRG_DET_B</name>
                  <description>no description available</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BYPASS</name>
              <description>Bypass the PLL.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PFD_OFFSET_EN</name>
              <description>Enables an offset in the phase frequency detector.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>LOCK</name>
              <description>1 - PLL is currently locked; 0 - PLL is not currently locked.</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>PLL_SYS_TOG</name>
          <description>Analog System PLL Control Register</description>
          <addressOffset>0x3C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x13001</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DIV_SELECT</name>
              <description>This field controls the PLL loop divider. 0 - Fout=Fref*20; 1 - Fout=Fref*22.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>POWERDOWN</name>
              <description>Powers down the PLL.</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENABLE</name>
              <description>Enable PLL output</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYPASS_CLK_SRC</name>
              <description>Determines the bypass source.</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>REF_CLK_24M</name>
                  <description>Select the 24MHz oscillator as source.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLK1</name>
                  <description>Select the CLK1_N / CLK1_P as source.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>GPANAIO</name>
                  <description>no description available</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CHRG_DET_B</name>
                  <description>no description available</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BYPASS</name>
              <description>Bypass the PLL.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PFD_OFFSET_EN</name>
              <description>Enables an offset in the phase frequency detector.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>LOCK</name>
              <description>1 - PLL is currently locked; 0 - PLL is not currently locked.</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>PLL_SYS_SS</name>
          <description>528MHz System PLL Spread Spectrum Register</description>
          <addressOffset>0x40</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>STEP</name>
              <description>Frequency change step = step/CCM_ANALOG_PLL_SYS_DENOM[B]*24MHz.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>15</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENABLE</name>
              <description>no description available</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ENABLE_0</name>
                  <description>Spread spectrum modulation disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLE_1</name>
                  <description>Soread spectrum modulation enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>STOP</name>
              <description>Frequency change = stop/CCM_ANALOG_PLL_SYS_DENOM[B]*24MHz.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>PLL_SYS_NUM</name>
          <description>Numerator of 528MHz System PLL Fractional Loop Divider Register</description>
          <addressOffset>0x50</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>A</name>
              <description>30 bit numerator (A) of fractional loop divider (signed integer).</description>
              <bitOffset>0</bitOffset>
              <bitWidth>30</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>PLL_SYS_DENOM</name>
          <description>Denominator of 528MHz System PLL Fractional Loop Divider Register</description>
          <addressOffset>0x60</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x12</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>B</name>
              <description>30 bit Denominator (B) of fractional loop divider (unsigned integer).</description>
              <bitOffset>0</bitOffset>
              <bitWidth>30</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>PLL_AUDIO</name>
          <description>Analog Audio PLL control Register</description>
          <addressOffset>0x70</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x11006</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DIV_SELECT</name>
              <description>This field controls the PLL loop divider. Valid range for DIV_SELECT divider value: 27~54.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>7</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>POWERDOWN</name>
              <description>Powers down the PLL.</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENABLE</name>
              <description>Enable PLL output</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYPASS_CLK_SRC</name>
              <description>Determines the bypass source.</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>REF_CLK_24M</name>
                  <description>Select the 24MHz oscillator as source.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLK1</name>
                  <description>Select the CLK1_N / CLK1_P as source.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BYPASS</name>
              <description>Bypass the PLL.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PFD_OFFSET_EN</name>
              <description>Enables an offset in the phase frequency detector.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>POST_DIV_SELECT</name>
              <description>These bits implement a divider after the PLL, but before the enable and bypass mux.</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>POST_DIV_SELECT_0</name>
                  <description>Divide by 4.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>POST_DIV_SELECT_1</name>
                  <description>Divide by 2.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>POST_DIV_SELECT_2</name>
                  <description>Divide by 1.</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>LOCK</name>
              <description>1 - PLL is currently locked. 0 - PLL is not currently locked.</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>PLL_AUDIO_SET</name>
          <description>Analog Audio PLL control Register</description>
          <addressOffset>0x74</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x11006</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DIV_SELECT</name>
              <description>This field controls the PLL loop divider. Valid range for DIV_SELECT divider value: 27~54.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>7</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>POWERDOWN</name>
              <description>Powers down the PLL.</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENABLE</name>
              <description>Enable PLL output</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYPASS_CLK_SRC</name>
              <description>Determines the bypass source.</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>REF_CLK_24M</name>
                  <description>Select the 24MHz oscillator as source.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLK1</name>
                  <description>Select the CLK1_N / CLK1_P as source.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BYPASS</name>
              <description>Bypass the PLL.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PFD_OFFSET_EN</name>
              <description>Enables an offset in the phase frequency detector.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>POST_DIV_SELECT</name>
              <description>These bits implement a divider after the PLL, but before the enable and bypass mux.</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>POST_DIV_SELECT_0</name>
                  <description>Divide by 4.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>POST_DIV_SELECT_1</name>
                  <description>Divide by 2.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>POST_DIV_SELECT_2</name>
                  <description>Divide by 1.</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>LOCK</name>
              <description>1 - PLL is currently locked. 0 - PLL is not currently locked.</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>PLL_AUDIO_CLR</name>
          <description>Analog Audio PLL control Register</description>
          <addressOffset>0x78</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x11006</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DIV_SELECT</name>
              <description>This field controls the PLL loop divider. Valid range for DIV_SELECT divider value: 27~54.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>7</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>POWERDOWN</name>
              <description>Powers down the PLL.</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENABLE</name>
              <description>Enable PLL output</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYPASS_CLK_SRC</name>
              <description>Determines the bypass source.</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>REF_CLK_24M</name>
                  <description>Select the 24MHz oscillator as source.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLK1</name>
                  <description>Select the CLK1_N / CLK1_P as source.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BYPASS</name>
              <description>Bypass the PLL.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PFD_OFFSET_EN</name>
              <description>Enables an offset in the phase frequency detector.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>POST_DIV_SELECT</name>
              <description>These bits implement a divider after the PLL, but before the enable and bypass mux.</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>POST_DIV_SELECT_0</name>
                  <description>Divide by 4.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>POST_DIV_SELECT_1</name>
                  <description>Divide by 2.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>POST_DIV_SELECT_2</name>
                  <description>Divide by 1.</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>LOCK</name>
              <description>1 - PLL is currently locked. 0 - PLL is not currently locked.</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>PLL_AUDIO_TOG</name>
          <description>Analog Audio PLL control Register</description>
          <addressOffset>0x7C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x11006</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DIV_SELECT</name>
              <description>This field controls the PLL loop divider. Valid range for DIV_SELECT divider value: 27~54.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>7</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>POWERDOWN</name>
              <description>Powers down the PLL.</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENABLE</name>
              <description>Enable PLL output</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYPASS_CLK_SRC</name>
              <description>Determines the bypass source.</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>REF_CLK_24M</name>
                  <description>Select the 24MHz oscillator as source.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLK1</name>
                  <description>Select the CLK1_N / CLK1_P as source.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BYPASS</name>
              <description>Bypass the PLL.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PFD_OFFSET_EN</name>
              <description>Enables an offset in the phase frequency detector.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>POST_DIV_SELECT</name>
              <description>These bits implement a divider after the PLL, but before the enable and bypass mux.</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>POST_DIV_SELECT_0</name>
                  <description>Divide by 4.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>POST_DIV_SELECT_1</name>
                  <description>Divide by 2.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>POST_DIV_SELECT_2</name>
                  <description>Divide by 1.</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>LOCK</name>
              <description>1 - PLL is currently locked. 0 - PLL is not currently locked.</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>PLL_AUDIO_NUM</name>
          <description>Numerator of Audio PLL Fractional Loop Divider Register</description>
          <addressOffset>0x80</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5F5E100</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>A</name>
              <description>30 bit numerator of fractional loop divider.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>30</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>PLL_AUDIO_DENOM</name>
          <description>Denominator of Audio PLL Fractional Loop Divider Register</description>
          <addressOffset>0x90</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x2964619C</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>B</name>
              <description>30 bit Denominator of fractional loop divider.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>30</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>PLL_VIDEO</name>
          <description>Analog Video PLL control Register</description>
          <addressOffset>0xA0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x1100C</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DIV_SELECT</name>
              <description>This field controls the PLL loop divider. Valid range for DIV_SELECT divider value: 27~54.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>7</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>POWERDOWN</name>
              <description>Powers down the PLL.</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENABLE</name>
              <description>Enalbe PLL output</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYPASS_CLK_SRC</name>
              <description>Determines the bypass source.</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>REF_CLK_24M</name>
                  <description>Select the 24MHz oscillator as source.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLK1</name>
                  <description>Select the CLK1_N / CLK1_P as source.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BYPASS</name>
              <description>Bypass the PLL.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PFD_OFFSET_EN</name>
              <description>Enables an offset in the phase frequency detector.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>POST_DIV_SELECT</name>
              <description>These bits implement a divider after the PLL, but before the enable and bypass mux.</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>POST_DIV_SELECT_0</name>
                  <description>Divide by 4.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>POST_DIV_SELECT_1</name>
                  <description>Divide by 2.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>POST_DIV_SELECT_2</name>
                  <description>Divide by 1.</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>LOCK</name>
              <description>1 - PLL is currently locked; 0 - PLL is not currently locked.</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>PLL_VIDEO_SET</name>
          <description>Analog Video PLL control Register</description>
          <addressOffset>0xA4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x1100C</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DIV_SELECT</name>
              <description>This field controls the PLL loop divider. Valid range for DIV_SELECT divider value: 27~54.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>7</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>POWERDOWN</name>
              <description>Powers down the PLL.</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENABLE</name>
              <description>Enalbe PLL output</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYPASS_CLK_SRC</name>
              <description>Determines the bypass source.</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>REF_CLK_24M</name>
                  <description>Select the 24MHz oscillator as source.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLK1</name>
                  <description>Select the CLK1_N / CLK1_P as source.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BYPASS</name>
              <description>Bypass the PLL.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PFD_OFFSET_EN</name>
              <description>Enables an offset in the phase frequency detector.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>POST_DIV_SELECT</name>
              <description>These bits implement a divider after the PLL, but before the enable and bypass mux.</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>POST_DIV_SELECT_0</name>
                  <description>Divide by 4.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>POST_DIV_SELECT_1</name>
                  <description>Divide by 2.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>POST_DIV_SELECT_2</name>
                  <description>Divide by 1.</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>LOCK</name>
              <description>1 - PLL is currently locked; 0 - PLL is not currently locked.</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>PLL_VIDEO_CLR</name>
          <description>Analog Video PLL control Register</description>
          <addressOffset>0xA8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x1100C</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DIV_SELECT</name>
              <description>This field controls the PLL loop divider. Valid range for DIV_SELECT divider value: 27~54.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>7</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>POWERDOWN</name>
              <description>Powers down the PLL.</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENABLE</name>
              <description>Enalbe PLL output</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYPASS_CLK_SRC</name>
              <description>Determines the bypass source.</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>REF_CLK_24M</name>
                  <description>Select the 24MHz oscillator as source.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLK1</name>
                  <description>Select the CLK1_N / CLK1_P as source.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BYPASS</name>
              <description>Bypass the PLL.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PFD_OFFSET_EN</name>
              <description>Enables an offset in the phase frequency detector.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>POST_DIV_SELECT</name>
              <description>These bits implement a divider after the PLL, but before the enable and bypass mux.</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>POST_DIV_SELECT_0</name>
                  <description>Divide by 4.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>POST_DIV_SELECT_1</name>
                  <description>Divide by 2.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>POST_DIV_SELECT_2</name>
                  <description>Divide by 1.</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>LOCK</name>
              <description>1 - PLL is currently locked; 0 - PLL is not currently locked.</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>PLL_VIDEO_TOG</name>
          <description>Analog Video PLL control Register</description>
          <addressOffset>0xAC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x1100C</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DIV_SELECT</name>
              <description>This field controls the PLL loop divider. Valid range for DIV_SELECT divider value: 27~54.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>7</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>POWERDOWN</name>
              <description>Powers down the PLL.</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENABLE</name>
              <description>Enalbe PLL output</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYPASS_CLK_SRC</name>
              <description>Determines the bypass source.</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>REF_CLK_24M</name>
                  <description>Select the 24MHz oscillator as source.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLK1</name>
                  <description>Select the CLK1_N / CLK1_P as source.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BYPASS</name>
              <description>Bypass the PLL.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PFD_OFFSET_EN</name>
              <description>Enables an offset in the phase frequency detector.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>POST_DIV_SELECT</name>
              <description>These bits implement a divider after the PLL, but before the enable and bypass mux.</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>POST_DIV_SELECT_0</name>
                  <description>Divide by 4.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>POST_DIV_SELECT_1</name>
                  <description>Divide by 2.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>POST_DIV_SELECT_2</name>
                  <description>Divide by 1.</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>LOCK</name>
              <description>1 - PLL is currently locked; 0 - PLL is not currently locked.</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>PLL_VIDEO_NUM</name>
          <description>Numerator of Video PLL Fractional Loop Divider Register</description>
          <addressOffset>0xB0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5F5E100</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>A</name>
              <description>30 bit numerator of fractional loop divider(Signed number), absolute value should be less than denominator</description>
              <bitOffset>0</bitOffset>
              <bitWidth>30</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>PLL_VIDEO_DENOM</name>
          <description>Denominator of Video PLL Fractional Loop Divider Register</description>
          <addressOffset>0xC0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10A24447</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>B</name>
              <description>30 bit Denominator of fractional loop divider.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>30</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>PLL_ENET</name>
          <description>Analog ENET PLL Control Register</description>
          <addressOffset>0xE0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x11001</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ENET0_DIV_SELECT</name>
              <description>Controls the frequency of the ethernet0 reference clock.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ENET0_DIV_SELECT_0</name>
                  <description>25MHz</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENET0_DIV_SELECT_1</name>
                  <description>50MHz</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENET0_DIV_SELECT_2</name>
                  <description>100MHz (not 50% duty cycle)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENET0_DIV_SELECT_3</name>
                  <description>125MHz</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ENET1_DIV_SELECT</name>
              <description>Controls the frequency of the ethernet1 reference clock.</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ENET1_DIV_SELECT_0</name>
                  <description>25MHz</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENET1_DIV_SELECT_1</name>
                  <description>50MHz</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENET1_DIV_SELECT_2</name>
                  <description>100MHz (not 50% duty cycle)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENET1_DIV_SELECT_3</name>
                  <description>125MHz</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>POWERDOWN</name>
              <description>Powers down the PLL.</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENET1_125M_EN</name>
              <description>Enable the PLL providing the ENET1 125 MHz reference clock.</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYPASS_CLK_SRC</name>
              <description>Determines the bypass source.</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>REF_CLK_24M</name>
                  <description>Select the 24MHz oscillator as source.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLK1</name>
                  <description>Select the CLK1_N / CLK1_P as source.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BYPASS</name>
              <description>Bypass the PLL.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PFD_OFFSET_EN</name>
              <description>Enables an offset in the phase frequency detector.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENABLE_125M</name>
              <description>Enables an offset in the phase frequency detector.</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENET2_125M_EN</name>
              <description>Enable the PLL providing the ENET2 125 MHz reference clock</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENET_25M_REF_EN</name>
              <description>Enable the PLL providing ENET 25 MHz reference clock</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>LOCK</name>
              <description>1 - PLL is currently locked; 0 - PLL is not currently locked.</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>PLL_ENET_SET</name>
          <description>Analog ENET PLL Control Register</description>
          <addressOffset>0xE4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x11001</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ENET0_DIV_SELECT</name>
              <description>Controls the frequency of the ethernet0 reference clock.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ENET0_DIV_SELECT_0</name>
                  <description>25MHz</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENET0_DIV_SELECT_1</name>
                  <description>50MHz</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENET0_DIV_SELECT_2</name>
                  <description>100MHz (not 50% duty cycle)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENET0_DIV_SELECT_3</name>
                  <description>125MHz</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ENET1_DIV_SELECT</name>
              <description>Controls the frequency of the ethernet1 reference clock.</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ENET1_DIV_SELECT_0</name>
                  <description>25MHz</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENET1_DIV_SELECT_1</name>
                  <description>50MHz</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENET1_DIV_SELECT_2</name>
                  <description>100MHz (not 50% duty cycle)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENET1_DIV_SELECT_3</name>
                  <description>125MHz</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>POWERDOWN</name>
              <description>Powers down the PLL.</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENET1_125M_EN</name>
              <description>Enable the PLL providing the ENET1 125 MHz reference clock.</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYPASS_CLK_SRC</name>
              <description>Determines the bypass source.</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>REF_CLK_24M</name>
                  <description>Select the 24MHz oscillator as source.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLK1</name>
                  <description>Select the CLK1_N / CLK1_P as source.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BYPASS</name>
              <description>Bypass the PLL.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PFD_OFFSET_EN</name>
              <description>Enables an offset in the phase frequency detector.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENABLE_125M</name>
              <description>Enables an offset in the phase frequency detector.</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENET2_125M_EN</name>
              <description>Enable the PLL providing the ENET2 125 MHz reference clock</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENET_25M_REF_EN</name>
              <description>Enable the PLL providing ENET 25 MHz reference clock</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>LOCK</name>
              <description>1 - PLL is currently locked; 0 - PLL is not currently locked.</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>PLL_ENET_CLR</name>
          <description>Analog ENET PLL Control Register</description>
          <addressOffset>0xE8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x11001</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ENET0_DIV_SELECT</name>
              <description>Controls the frequency of the ethernet0 reference clock.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ENET0_DIV_SELECT_0</name>
                  <description>25MHz</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENET0_DIV_SELECT_1</name>
                  <description>50MHz</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENET0_DIV_SELECT_2</name>
                  <description>100MHz (not 50% duty cycle)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENET0_DIV_SELECT_3</name>
                  <description>125MHz</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ENET1_DIV_SELECT</name>
              <description>Controls the frequency of the ethernet1 reference clock.</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ENET1_DIV_SELECT_0</name>
                  <description>25MHz</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENET1_DIV_SELECT_1</name>
                  <description>50MHz</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENET1_DIV_SELECT_2</name>
                  <description>100MHz (not 50% duty cycle)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENET1_DIV_SELECT_3</name>
                  <description>125MHz</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>POWERDOWN</name>
              <description>Powers down the PLL.</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENET1_125M_EN</name>
              <description>Enable the PLL providing the ENET1 125 MHz reference clock.</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYPASS_CLK_SRC</name>
              <description>Determines the bypass source.</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>REF_CLK_24M</name>
                  <description>Select the 24MHz oscillator as source.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLK1</name>
                  <description>Select the CLK1_N / CLK1_P as source.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BYPASS</name>
              <description>Bypass the PLL.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PFD_OFFSET_EN</name>
              <description>Enables an offset in the phase frequency detector.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENABLE_125M</name>
              <description>Enables an offset in the phase frequency detector.</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENET2_125M_EN</name>
              <description>Enable the PLL providing the ENET2 125 MHz reference clock</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENET_25M_REF_EN</name>
              <description>Enable the PLL providing ENET 25 MHz reference clock</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>LOCK</name>
              <description>1 - PLL is currently locked; 0 - PLL is not currently locked.</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>PLL_ENET_TOG</name>
          <description>Analog ENET PLL Control Register</description>
          <addressOffset>0xEC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x11001</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ENET0_DIV_SELECT</name>
              <description>Controls the frequency of the ethernet0 reference clock.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ENET0_DIV_SELECT_0</name>
                  <description>25MHz</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENET0_DIV_SELECT_1</name>
                  <description>50MHz</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENET0_DIV_SELECT_2</name>
                  <description>100MHz (not 50% duty cycle)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENET0_DIV_SELECT_3</name>
                  <description>125MHz</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ENET1_DIV_SELECT</name>
              <description>Controls the frequency of the ethernet1 reference clock.</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ENET1_DIV_SELECT_0</name>
                  <description>25MHz</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENET1_DIV_SELECT_1</name>
                  <description>50MHz</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENET1_DIV_SELECT_2</name>
                  <description>100MHz (not 50% duty cycle)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENET1_DIV_SELECT_3</name>
                  <description>125MHz</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>POWERDOWN</name>
              <description>Powers down the PLL.</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENET1_125M_EN</name>
              <description>Enable the PLL providing the ENET1 125 MHz reference clock.</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYPASS_CLK_SRC</name>
              <description>Determines the bypass source.</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>REF_CLK_24M</name>
                  <description>Select the 24MHz oscillator as source.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLK1</name>
                  <description>Select the CLK1_N / CLK1_P as source.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BYPASS</name>
              <description>Bypass the PLL.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PFD_OFFSET_EN</name>
              <description>Enables an offset in the phase frequency detector.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENABLE_125M</name>
              <description>Enables an offset in the phase frequency detector.</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENET2_125M_EN</name>
              <description>Enable the PLL providing the ENET2 125 MHz reference clock</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENET_25M_REF_EN</name>
              <description>Enable the PLL providing ENET 25 MHz reference clock</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>LOCK</name>
              <description>1 - PLL is currently locked; 0 - PLL is not currently locked.</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>PFD_480</name>
          <description>480MHz Clock (PLL3) Phase Fractional Divider Control Register</description>
          <addressOffset>0xF0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x1311100C</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>PFD0_FRAC</name>
              <description>This field controls the fractional divide value</description>
              <bitOffset>0</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PFD0_STABLE</name>
              <description>This read-only bitfield is for DIAGNOSTIC PURPOSES ONLY since the fractional divider should become stable quickly enough that this field will never need to be used by either device driver or application code</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>PFD0_CLKGATE</name>
              <description>If set to 1, the IO fractional divider clock (reference ref_pfd0) is off (power savings)</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PFD1_FRAC</name>
              <description>This field controls the fractional divide value</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PFD1_STABLE</name>
              <description>This read-only bitfield is for DIAGNOSTIC PURPOSES ONLY since the fractional divider should become stable quickly enough that this field will never need to be used by either device driver or application code</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>PFD1_CLKGATE</name>
              <description>IO Clock Gate</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PFD2_FRAC</name>
              <description>This field controls the fractional divide value</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PFD2_STABLE</name>
              <description>This read-only bitfield is for DIAGNOSTIC PURPOSES ONLY since the fractional divider should become stable quickly enough that this field will never need to be used by either device driver or application code</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>PFD2_CLKGATE</name>
              <description>IO Clock Gate</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PFD3_FRAC</name>
              <description>This field controls the fractional divide value</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PFD3_STABLE</name>
              <description>This read-only bitfield is for DIAGNOSTIC PURPOSES ONLY since the fractional divider should become stable quickly enough that this field will never need to be used by either device driver or application code</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>PFD3_CLKGATE</name>
              <description>IO Clock Gate</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>PFD_480_SET</name>
          <description>480MHz Clock (PLL3) Phase Fractional Divider Control Register</description>
          <addressOffset>0xF4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x1311100C</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>PFD0_FRAC</name>
              <description>This field controls the fractional divide value</description>
              <bitOffset>0</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PFD0_STABLE</name>
              <description>This read-only bitfield is for DIAGNOSTIC PURPOSES ONLY since the fractional divider should become stable quickly enough that this field will never need to be used by either device driver or application code</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>PFD0_CLKGATE</name>
              <description>If set to 1, the IO fractional divider clock (reference ref_pfd0) is off (power savings)</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PFD1_FRAC</name>
              <description>This field controls the fractional divide value</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PFD1_STABLE</name>
              <description>This read-only bitfield is for DIAGNOSTIC PURPOSES ONLY since the fractional divider should become stable quickly enough that this field will never need to be used by either device driver or application code</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>PFD1_CLKGATE</name>
              <description>IO Clock Gate</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PFD2_FRAC</name>
              <description>This field controls the fractional divide value</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PFD2_STABLE</name>
              <description>This read-only bitfield is for DIAGNOSTIC PURPOSES ONLY since the fractional divider should become stable quickly enough that this field will never need to be used by either device driver or application code</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>PFD2_CLKGATE</name>
              <description>IO Clock Gate</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PFD3_FRAC</name>
              <description>This field controls the fractional divide value</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PFD3_STABLE</name>
              <description>This read-only bitfield is for DIAGNOSTIC PURPOSES ONLY since the fractional divider should become stable quickly enough that this field will never need to be used by either device driver or application code</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>PFD3_CLKGATE</name>
              <description>IO Clock Gate</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>PFD_480_CLR</name>
          <description>480MHz Clock (PLL3) Phase Fractional Divider Control Register</description>
          <addressOffset>0xF8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x1311100C</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>PFD0_FRAC</name>
              <description>This field controls the fractional divide value</description>
              <bitOffset>0</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PFD0_STABLE</name>
              <description>This read-only bitfield is for DIAGNOSTIC PURPOSES ONLY since the fractional divider should become stable quickly enough that this field will never need to be used by either device driver or application code</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>PFD0_CLKGATE</name>
              <description>If set to 1, the IO fractional divider clock (reference ref_pfd0) is off (power savings)</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PFD1_FRAC</name>
              <description>This field controls the fractional divide value</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PFD1_STABLE</name>
              <description>This read-only bitfield is for DIAGNOSTIC PURPOSES ONLY since the fractional divider should become stable quickly enough that this field will never need to be used by either device driver or application code</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>PFD1_CLKGATE</name>
              <description>IO Clock Gate</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PFD2_FRAC</name>
              <description>This field controls the fractional divide value</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PFD2_STABLE</name>
              <description>This read-only bitfield is for DIAGNOSTIC PURPOSES ONLY since the fractional divider should become stable quickly enough that this field will never need to be used by either device driver or application code</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>PFD2_CLKGATE</name>
              <description>IO Clock Gate</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PFD3_FRAC</name>
              <description>This field controls the fractional divide value</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PFD3_STABLE</name>
              <description>This read-only bitfield is for DIAGNOSTIC PURPOSES ONLY since the fractional divider should become stable quickly enough that this field will never need to be used by either device driver or application code</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>PFD3_CLKGATE</name>
              <description>IO Clock Gate</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>PFD_480_TOG</name>
          <description>480MHz Clock (PLL3) Phase Fractional Divider Control Register</description>
          <addressOffset>0xFC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x1311100C</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>PFD0_FRAC</name>
              <description>This field controls the fractional divide value</description>
              <bitOffset>0</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PFD0_STABLE</name>
              <description>This read-only bitfield is for DIAGNOSTIC PURPOSES ONLY since the fractional divider should become stable quickly enough that this field will never need to be used by either device driver or application code</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>PFD0_CLKGATE</name>
              <description>If set to 1, the IO fractional divider clock (reference ref_pfd0) is off (power savings)</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PFD1_FRAC</name>
              <description>This field controls the fractional divide value</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PFD1_STABLE</name>
              <description>This read-only bitfield is for DIAGNOSTIC PURPOSES ONLY since the fractional divider should become stable quickly enough that this field will never need to be used by either device driver or application code</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>PFD1_CLKGATE</name>
              <description>IO Clock Gate</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PFD2_FRAC</name>
              <description>This field controls the fractional divide value</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PFD2_STABLE</name>
              <description>This read-only bitfield is for DIAGNOSTIC PURPOSES ONLY since the fractional divider should become stable quickly enough that this field will never need to be used by either device driver or application code</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>PFD2_CLKGATE</name>
              <description>IO Clock Gate</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PFD3_FRAC</name>
              <description>This field controls the fractional divide value</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PFD3_STABLE</name>
              <description>This read-only bitfield is for DIAGNOSTIC PURPOSES ONLY since the fractional divider should become stable quickly enough that this field will never need to be used by either device driver or application code</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>PFD3_CLKGATE</name>
              <description>IO Clock Gate</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>PFD_528</name>
          <description>528MHz Clock (PLL2) Phase Fractional Divider Control Register</description>
          <addressOffset>0x100</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x1018101B</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>PFD0_FRAC</name>
              <description>This field controls the fractional divide value</description>
              <bitOffset>0</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PFD0_STABLE</name>
              <description>This read-only bitfield is for DIAGNOSTIC PURPOSES ONLY since the fractional divider should become stable quickly enough that this field will never need to be used by either device driver or application code</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>PFD0_CLKGATE</name>
              <description>If set to 1, the IO fractional divider clock (reference ref_pfd0) is off (power savings)</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PFD1_FRAC</name>
              <description>This field controls the fractional divide value</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PFD1_STABLE</name>
              <description>This read-only bitfield is for DIAGNOSTIC PURPOSES ONLY since the fractional divider should become stable quickly enough that this field will never need to be used by either device driver or application code</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>PFD1_CLKGATE</name>
              <description>IO Clock Gate</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PFD2_FRAC</name>
              <description>This field controls the fractional divide value</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PFD2_STABLE</name>
              <description>This read-only bitfield is for DIAGNOSTIC PURPOSES ONLY since the fractional divider should become stable quickly enough that this field will never need to be used by either device driver or application code</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>PFD2_CLKGATE</name>
              <description>IO Clock Gate</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PFD3_FRAC</name>
              <description>This field controls the fractional divide value</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PFD3_STABLE</name>
              <description>This read-only bitfield is for DIAGNOSTIC PURPOSES ONLY since the fractional divider should become stable quickly enough that this field will never need to be used by either device driver or application code</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>PFD3_CLKGATE</name>
              <description>IO Clock Gate</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>PFD_528_SET</name>
          <description>528MHz Clock (PLL2) Phase Fractional Divider Control Register</description>
          <addressOffset>0x104</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x1018101B</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>PFD0_FRAC</name>
              <description>This field controls the fractional divide value</description>
              <bitOffset>0</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PFD0_STABLE</name>
              <description>This read-only bitfield is for DIAGNOSTIC PURPOSES ONLY since the fractional divider should become stable quickly enough that this field will never need to be used by either device driver or application code</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>PFD0_CLKGATE</name>
              <description>If set to 1, the IO fractional divider clock (reference ref_pfd0) is off (power savings)</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PFD1_FRAC</name>
              <description>This field controls the fractional divide value</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PFD1_STABLE</name>
              <description>This read-only bitfield is for DIAGNOSTIC PURPOSES ONLY since the fractional divider should become stable quickly enough that this field will never need to be used by either device driver or application code</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>PFD1_CLKGATE</name>
              <description>IO Clock Gate</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PFD2_FRAC</name>
              <description>This field controls the fractional divide value</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PFD2_STABLE</name>
              <description>This read-only bitfield is for DIAGNOSTIC PURPOSES ONLY since the fractional divider should become stable quickly enough that this field will never need to be used by either device driver or application code</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>PFD2_CLKGATE</name>
              <description>IO Clock Gate</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PFD3_FRAC</name>
              <description>This field controls the fractional divide value</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PFD3_STABLE</name>
              <description>This read-only bitfield is for DIAGNOSTIC PURPOSES ONLY since the fractional divider should become stable quickly enough that this field will never need to be used by either device driver or application code</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>PFD3_CLKGATE</name>
              <description>IO Clock Gate</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>PFD_528_CLR</name>
          <description>528MHz Clock (PLL2) Phase Fractional Divider Control Register</description>
          <addressOffset>0x108</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x1018101B</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>PFD0_FRAC</name>
              <description>This field controls the fractional divide value</description>
              <bitOffset>0</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PFD0_STABLE</name>
              <description>This read-only bitfield is for DIAGNOSTIC PURPOSES ONLY since the fractional divider should become stable quickly enough that this field will never need to be used by either device driver or application code</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>PFD0_CLKGATE</name>
              <description>If set to 1, the IO fractional divider clock (reference ref_pfd0) is off (power savings)</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PFD1_FRAC</name>
              <description>This field controls the fractional divide value</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PFD1_STABLE</name>
              <description>This read-only bitfield is for DIAGNOSTIC PURPOSES ONLY since the fractional divider should become stable quickly enough that this field will never need to be used by either device driver or application code</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>PFD1_CLKGATE</name>
              <description>IO Clock Gate</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PFD2_FRAC</name>
              <description>This field controls the fractional divide value</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PFD2_STABLE</name>
              <description>This read-only bitfield is for DIAGNOSTIC PURPOSES ONLY since the fractional divider should become stable quickly enough that this field will never need to be used by either device driver or application code</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>PFD2_CLKGATE</name>
              <description>IO Clock Gate</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PFD3_FRAC</name>
              <description>This field controls the fractional divide value</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PFD3_STABLE</name>
              <description>This read-only bitfield is for DIAGNOSTIC PURPOSES ONLY since the fractional divider should become stable quickly enough that this field will never need to be used by either device driver or application code</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>PFD3_CLKGATE</name>
              <description>IO Clock Gate</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>PFD_528_TOG</name>
          <description>528MHz Clock (PLL2) Phase Fractional Divider Control Register</description>
          <addressOffset>0x10C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x1018101B</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>PFD0_FRAC</name>
              <description>This field controls the fractional divide value</description>
              <bitOffset>0</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PFD0_STABLE</name>
              <description>This read-only bitfield is for DIAGNOSTIC PURPOSES ONLY since the fractional divider should become stable quickly enough that this field will never need to be used by either device driver or application code</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>PFD0_CLKGATE</name>
              <description>If set to 1, the IO fractional divider clock (reference ref_pfd0) is off (power savings)</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PFD1_FRAC</name>
              <description>This field controls the fractional divide value</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PFD1_STABLE</name>
              <description>This read-only bitfield is for DIAGNOSTIC PURPOSES ONLY since the fractional divider should become stable quickly enough that this field will never need to be used by either device driver or application code</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>PFD1_CLKGATE</name>
              <description>IO Clock Gate</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PFD2_FRAC</name>
              <description>This field controls the fractional divide value</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PFD2_STABLE</name>
              <description>This read-only bitfield is for DIAGNOSTIC PURPOSES ONLY since the fractional divider should become stable quickly enough that this field will never need to be used by either device driver or application code</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>PFD2_CLKGATE</name>
              <description>IO Clock Gate</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PFD3_FRAC</name>
              <description>This field controls the fractional divide value</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PFD3_STABLE</name>
              <description>This read-only bitfield is for DIAGNOSTIC PURPOSES ONLY since the fractional divider should become stable quickly enough that this field will never need to be used by either device driver or application code</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>PFD3_CLKGATE</name>
              <description>IO Clock Gate</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>MISC0</name>
          <description>Miscellaneous Register 0</description>
          <addressOffset>0x150</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x4000000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>REFTOP_PWD</name>
              <description>Control bit to power-down the analog bandgap reference circuitry</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>REFTOP_SELFBIASOFF</name>
              <description>Control bit to disable the self-bias circuit in the analog bandgap</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>REFTOP_SELFBIASOFF_0</name>
                  <description>Uses coarse bias currents for startup</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REFTOP_SELFBIASOFF_1</name>
                  <description>Uses bandgap-based bias currents for best performance.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>REFTOP_VBGADJ</name>
              <description>Not related to CCM. See Power Management Unit (PMU)</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>REFTOP_VBGADJ_0</name>
                  <description>Nominal VBG</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REFTOP_VBGADJ_1</name>
                  <description>VBG+0.78%</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REFTOP_VBGADJ_2</name>
                  <description>VBG+1.56%</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REFTOP_VBGADJ_3</name>
                  <description>VBG+2.34%</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REFTOP_VBGADJ_4</name>
                  <description>VBG-0.78%</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REFTOP_VBGADJ_5</name>
                  <description>VBG-1.56%</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REFTOP_VBGADJ_6</name>
                  <description>VBG-2.34%</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REFTOP_VBGADJ_7</name>
                  <description>VBG-3.12%</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>REFTOP_VBGUP</name>
              <description>Status bit that signals the analog bandgap voltage is up and stable</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>STOP_MODE_CONFIG</name>
              <description>Configure the analog behavior in stop mode.</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>STOP_MODE_CONFIG_0</name>
                  <description>All analog except rtc powered down on stop mode assertion. XtalOsc=on, RCOsc=off;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>STOP_MODE_CONFIG_1</name>
                  <description>Certain analog functions such as certain regulators left up. XtalOsc=on, RCOsc=off;</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>STOP_MODE_CONFIG_2</name>
                  <description>XtalOsc=off, RCOsc=on, Old BG=on, New BG=off.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>STOP_MODE_CONFIG_3</name>
                  <description>XtalOsc=off, RCOsc=on, Old BG=off, New BG=on.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DISCON_HIGH_SNVS</name>
              <description>This bit controls a switch from VDD_HIGH_IN to VDD_SNVS_IN.</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISCON_HIGH_SNVS_0</name>
                  <description>Turn on the switch</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DISCON_HIGH_SNVS_1</name>
                  <description>Turn off the switch</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>OSC_I</name>
              <description>This field determines the bias current in the 24MHz oscillator</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NOMINAL</name>
                  <description>Nominal</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MINUS_12_5_PERCENT</name>
                  <description>Decrease current by 12.5%</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MINUS_25_PERCENT</name>
                  <description>Decrease current by 25.0%</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MINUS_37_5_PERCENT</name>
                  <description>Decrease current by 37.5%</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>OSC_XTALOK</name>
              <description>Status bit that signals that the output of the 24-MHz crystal oscillator is stable</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>OSC_XTALOK_EN</name>
              <description>This bit enables the detector that signals when the 24MHz crystal oscillator is stable</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CLKGATE_CTRL</name>
              <description>This bit allows disabling the clock gate (always ungated) for the xtal 24MHz clock that clocks the digital logic in the analog block</description>
              <bitOffset>0x19</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALLOW_AUTO_GATE</name>
                  <description>Allow the logic to automatically gate the clock when the XTAL is powered down.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NO_AUTO_GATE</name>
                  <description>Prevent the logic from ever gating off the clock.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CLKGATE_DELAY</name>
              <description>This field specifies the delay between powering up the XTAL 24MHz clock and releasing the clock to the digital logic inside the analog block</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CLKGATE_DELAY_0</name>
                  <description>0.5ms</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLKGATE_DELAY_1</name>
                  <description>1.0ms</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLKGATE_DELAY_2</name>
                  <description>2.0ms</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLKGATE_DELAY_3</name>
                  <description>3.0ms</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLKGATE_DELAY_4</name>
                  <description>4.0ms</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLKGATE_DELAY_5</name>
                  <description>5.0ms</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLKGATE_DELAY_6</name>
                  <description>6.0ms</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLKGATE_DELAY_7</name>
                  <description>7.0ms</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RTC_XTAL_SOURCE</name>
              <description>This field indicates which chip source is being used for the rtc clock</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RTC_XTAL_SOURCE_0</name>
                  <description>Internal ring oscillator</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RTC_XTAL_SOURCE_1</name>
                  <description>RTC_XTAL</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>XTAL_24M_PWD</name>
              <description>This field powers down the 24M crystal oscillator if set true</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>VID_PLL_PREDIV</name>
              <description>Predivider for the source clock of the PLL's.</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>VID_PLL_PREDIV_0</name>
                  <description>Divide by 1</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>VID_PLL_PREDIV_1</name>
                  <description>Divide by 2</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>MISC0_SET</name>
          <description>Miscellaneous Register 0</description>
          <addressOffset>0x154</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x4000000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>REFTOP_PWD</name>
              <description>Control bit to power-down the analog bandgap reference circuitry</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>REFTOP_SELFBIASOFF</name>
              <description>Control bit to disable the self-bias circuit in the analog bandgap</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>REFTOP_SELFBIASOFF_0</name>
                  <description>Uses coarse bias currents for startup</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REFTOP_SELFBIASOFF_1</name>
                  <description>Uses bandgap-based bias currents for best performance.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>REFTOP_VBGADJ</name>
              <description>Not related to CCM. See Power Management Unit (PMU)</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>REFTOP_VBGADJ_0</name>
                  <description>Nominal VBG</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REFTOP_VBGADJ_1</name>
                  <description>VBG+0.78%</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REFTOP_VBGADJ_2</name>
                  <description>VBG+1.56%</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REFTOP_VBGADJ_3</name>
                  <description>VBG+2.34%</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REFTOP_VBGADJ_4</name>
                  <description>VBG-0.78%</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REFTOP_VBGADJ_5</name>
                  <description>VBG-1.56%</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REFTOP_VBGADJ_6</name>
                  <description>VBG-2.34%</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REFTOP_VBGADJ_7</name>
                  <description>VBG-3.12%</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>REFTOP_VBGUP</name>
              <description>Status bit that signals the analog bandgap voltage is up and stable</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>STOP_MODE_CONFIG</name>
              <description>Configure the analog behavior in stop mode.</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>STOP_MODE_CONFIG_0</name>
                  <description>All analog except rtc powered down on stop mode assertion. XtalOsc=on, RCOsc=off;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>STOP_MODE_CONFIG_1</name>
                  <description>Certain analog functions such as certain regulators left up. XtalOsc=on, RCOsc=off;</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>STOP_MODE_CONFIG_2</name>
                  <description>XtalOsc=off, RCOsc=on, Old BG=on, New BG=off.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>STOP_MODE_CONFIG_3</name>
                  <description>XtalOsc=off, RCOsc=on, Old BG=off, New BG=on.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DISCON_HIGH_SNVS</name>
              <description>This bit controls a switch from VDD_HIGH_IN to VDD_SNVS_IN.</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISCON_HIGH_SNVS_0</name>
                  <description>Turn on the switch</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DISCON_HIGH_SNVS_1</name>
                  <description>Turn off the switch</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>OSC_I</name>
              <description>This field determines the bias current in the 24MHz oscillator</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NOMINAL</name>
                  <description>Nominal</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MINUS_12_5_PERCENT</name>
                  <description>Decrease current by 12.5%</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MINUS_25_PERCENT</name>
                  <description>Decrease current by 25.0%</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MINUS_37_5_PERCENT</name>
                  <description>Decrease current by 37.5%</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>OSC_XTALOK</name>
              <description>Status bit that signals that the output of the 24-MHz crystal oscillator is stable</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>OSC_XTALOK_EN</name>
              <description>This bit enables the detector that signals when the 24MHz crystal oscillator is stable</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CLKGATE_CTRL</name>
              <description>This bit allows disabling the clock gate (always ungated) for the xtal 24MHz clock that clocks the digital logic in the analog block</description>
              <bitOffset>0x19</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALLOW_AUTO_GATE</name>
                  <description>Allow the logic to automatically gate the clock when the XTAL is powered down.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NO_AUTO_GATE</name>
                  <description>Prevent the logic from ever gating off the clock.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CLKGATE_DELAY</name>
              <description>This field specifies the delay between powering up the XTAL 24MHz clock and releasing the clock to the digital logic inside the analog block</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CLKGATE_DELAY_0</name>
                  <description>0.5ms</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLKGATE_DELAY_1</name>
                  <description>1.0ms</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLKGATE_DELAY_2</name>
                  <description>2.0ms</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLKGATE_DELAY_3</name>
                  <description>3.0ms</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLKGATE_DELAY_4</name>
                  <description>4.0ms</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLKGATE_DELAY_5</name>
                  <description>5.0ms</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLKGATE_DELAY_6</name>
                  <description>6.0ms</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLKGATE_DELAY_7</name>
                  <description>7.0ms</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RTC_XTAL_SOURCE</name>
              <description>This field indicates which chip source is being used for the rtc clock</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RTC_XTAL_SOURCE_0</name>
                  <description>Internal ring oscillator</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RTC_XTAL_SOURCE_1</name>
                  <description>RTC_XTAL</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>XTAL_24M_PWD</name>
              <description>This field powers down the 24M crystal oscillator if set true</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>VID_PLL_PREDIV</name>
              <description>Predivider for the source clock of the PLL's.</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>VID_PLL_PREDIV_0</name>
                  <description>Divide by 1</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>VID_PLL_PREDIV_1</name>
                  <description>Divide by 2</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>MISC0_CLR</name>
          <description>Miscellaneous Register 0</description>
          <addressOffset>0x158</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x4000000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>REFTOP_PWD</name>
              <description>Control bit to power-down the analog bandgap reference circuitry</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>REFTOP_SELFBIASOFF</name>
              <description>Control bit to disable the self-bias circuit in the analog bandgap</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>REFTOP_SELFBIASOFF_0</name>
                  <description>Uses coarse bias currents for startup</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REFTOP_SELFBIASOFF_1</name>
                  <description>Uses bandgap-based bias currents for best performance.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>REFTOP_VBGADJ</name>
              <description>Not related to CCM. See Power Management Unit (PMU)</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>REFTOP_VBGADJ_0</name>
                  <description>Nominal VBG</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REFTOP_VBGADJ_1</name>
                  <description>VBG+0.78%</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REFTOP_VBGADJ_2</name>
                  <description>VBG+1.56%</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REFTOP_VBGADJ_3</name>
                  <description>VBG+2.34%</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REFTOP_VBGADJ_4</name>
                  <description>VBG-0.78%</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REFTOP_VBGADJ_5</name>
                  <description>VBG-1.56%</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REFTOP_VBGADJ_6</name>
                  <description>VBG-2.34%</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REFTOP_VBGADJ_7</name>
                  <description>VBG-3.12%</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>REFTOP_VBGUP</name>
              <description>Status bit that signals the analog bandgap voltage is up and stable</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>STOP_MODE_CONFIG</name>
              <description>Configure the analog behavior in stop mode.</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>STOP_MODE_CONFIG_0</name>
                  <description>All analog except rtc powered down on stop mode assertion. XtalOsc=on, RCOsc=off;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>STOP_MODE_CONFIG_1</name>
                  <description>Certain analog functions such as certain regulators left up. XtalOsc=on, RCOsc=off;</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>STOP_MODE_CONFIG_2</name>
                  <description>XtalOsc=off, RCOsc=on, Old BG=on, New BG=off.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>STOP_MODE_CONFIG_3</name>
                  <description>XtalOsc=off, RCOsc=on, Old BG=off, New BG=on.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DISCON_HIGH_SNVS</name>
              <description>This bit controls a switch from VDD_HIGH_IN to VDD_SNVS_IN.</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISCON_HIGH_SNVS_0</name>
                  <description>Turn on the switch</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DISCON_HIGH_SNVS_1</name>
                  <description>Turn off the switch</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>OSC_I</name>
              <description>This field determines the bias current in the 24MHz oscillator</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NOMINAL</name>
                  <description>Nominal</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MINUS_12_5_PERCENT</name>
                  <description>Decrease current by 12.5%</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MINUS_25_PERCENT</name>
                  <description>Decrease current by 25.0%</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MINUS_37_5_PERCENT</name>
                  <description>Decrease current by 37.5%</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>OSC_XTALOK</name>
              <description>Status bit that signals that the output of the 24-MHz crystal oscillator is stable</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>OSC_XTALOK_EN</name>
              <description>This bit enables the detector that signals when the 24MHz crystal oscillator is stable</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CLKGATE_CTRL</name>
              <description>This bit allows disabling the clock gate (always ungated) for the xtal 24MHz clock that clocks the digital logic in the analog block</description>
              <bitOffset>0x19</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALLOW_AUTO_GATE</name>
                  <description>Allow the logic to automatically gate the clock when the XTAL is powered down.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NO_AUTO_GATE</name>
                  <description>Prevent the logic from ever gating off the clock.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CLKGATE_DELAY</name>
              <description>This field specifies the delay between powering up the XTAL 24MHz clock and releasing the clock to the digital logic inside the analog block</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CLKGATE_DELAY_0</name>
                  <description>0.5ms</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLKGATE_DELAY_1</name>
                  <description>1.0ms</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLKGATE_DELAY_2</name>
                  <description>2.0ms</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLKGATE_DELAY_3</name>
                  <description>3.0ms</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLKGATE_DELAY_4</name>
                  <description>4.0ms</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLKGATE_DELAY_5</name>
                  <description>5.0ms</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLKGATE_DELAY_6</name>
                  <description>6.0ms</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLKGATE_DELAY_7</name>
                  <description>7.0ms</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RTC_XTAL_SOURCE</name>
              <description>This field indicates which chip source is being used for the rtc clock</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RTC_XTAL_SOURCE_0</name>
                  <description>Internal ring oscillator</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RTC_XTAL_SOURCE_1</name>
                  <description>RTC_XTAL</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>XTAL_24M_PWD</name>
              <description>This field powers down the 24M crystal oscillator if set true</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>VID_PLL_PREDIV</name>
              <description>Predivider for the source clock of the PLL's.</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>VID_PLL_PREDIV_0</name>
                  <description>Divide by 1</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>VID_PLL_PREDIV_1</name>
                  <description>Divide by 2</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>MISC0_TOG</name>
          <description>Miscellaneous Register 0</description>
          <addressOffset>0x15C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x4000000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>REFTOP_PWD</name>
              <description>Control bit to power-down the analog bandgap reference circuitry</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>REFTOP_SELFBIASOFF</name>
              <description>Control bit to disable the self-bias circuit in the analog bandgap</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>REFTOP_SELFBIASOFF_0</name>
                  <description>Uses coarse bias currents for startup</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REFTOP_SELFBIASOFF_1</name>
                  <description>Uses bandgap-based bias currents for best performance.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>REFTOP_VBGADJ</name>
              <description>Not related to CCM. See Power Management Unit (PMU)</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>REFTOP_VBGADJ_0</name>
                  <description>Nominal VBG</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REFTOP_VBGADJ_1</name>
                  <description>VBG+0.78%</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REFTOP_VBGADJ_2</name>
                  <description>VBG+1.56%</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REFTOP_VBGADJ_3</name>
                  <description>VBG+2.34%</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REFTOP_VBGADJ_4</name>
                  <description>VBG-0.78%</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REFTOP_VBGADJ_5</name>
                  <description>VBG-1.56%</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REFTOP_VBGADJ_6</name>
                  <description>VBG-2.34%</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REFTOP_VBGADJ_7</name>
                  <description>VBG-3.12%</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>REFTOP_VBGUP</name>
              <description>Status bit that signals the analog bandgap voltage is up and stable</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>STOP_MODE_CONFIG</name>
              <description>Configure the analog behavior in stop mode.</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>STOP_MODE_CONFIG_0</name>
                  <description>All analog except rtc powered down on stop mode assertion. XtalOsc=on, RCOsc=off;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>STOP_MODE_CONFIG_1</name>
                  <description>Certain analog functions such as certain regulators left up. XtalOsc=on, RCOsc=off;</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>STOP_MODE_CONFIG_2</name>
                  <description>XtalOsc=off, RCOsc=on, Old BG=on, New BG=off.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>STOP_MODE_CONFIG_3</name>
                  <description>XtalOsc=off, RCOsc=on, Old BG=off, New BG=on.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DISCON_HIGH_SNVS</name>
              <description>This bit controls a switch from VDD_HIGH_IN to VDD_SNVS_IN.</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISCON_HIGH_SNVS_0</name>
                  <description>Turn on the switch</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DISCON_HIGH_SNVS_1</name>
                  <description>Turn off the switch</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>OSC_I</name>
              <description>This field determines the bias current in the 24MHz oscillator</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NOMINAL</name>
                  <description>Nominal</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MINUS_12_5_PERCENT</name>
                  <description>Decrease current by 12.5%</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MINUS_25_PERCENT</name>
                  <description>Decrease current by 25.0%</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MINUS_37_5_PERCENT</name>
                  <description>Decrease current by 37.5%</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>OSC_XTALOK</name>
              <description>Status bit that signals that the output of the 24-MHz crystal oscillator is stable</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>OSC_XTALOK_EN</name>
              <description>This bit enables the detector that signals when the 24MHz crystal oscillator is stable</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CLKGATE_CTRL</name>
              <description>This bit allows disabling the clock gate (always ungated) for the xtal 24MHz clock that clocks the digital logic in the analog block</description>
              <bitOffset>0x19</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALLOW_AUTO_GATE</name>
                  <description>Allow the logic to automatically gate the clock when the XTAL is powered down.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NO_AUTO_GATE</name>
                  <description>Prevent the logic from ever gating off the clock.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CLKGATE_DELAY</name>
              <description>This field specifies the delay between powering up the XTAL 24MHz clock and releasing the clock to the digital logic inside the analog block</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CLKGATE_DELAY_0</name>
                  <description>0.5ms</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLKGATE_DELAY_1</name>
                  <description>1.0ms</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLKGATE_DELAY_2</name>
                  <description>2.0ms</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLKGATE_DELAY_3</name>
                  <description>3.0ms</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLKGATE_DELAY_4</name>
                  <description>4.0ms</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLKGATE_DELAY_5</name>
                  <description>5.0ms</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLKGATE_DELAY_6</name>
                  <description>6.0ms</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLKGATE_DELAY_7</name>
                  <description>7.0ms</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RTC_XTAL_SOURCE</name>
              <description>This field indicates which chip source is being used for the rtc clock</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RTC_XTAL_SOURCE_0</name>
                  <description>Internal ring oscillator</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RTC_XTAL_SOURCE_1</name>
                  <description>RTC_XTAL</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>XTAL_24M_PWD</name>
              <description>This field powers down the 24M crystal oscillator if set true</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>VID_PLL_PREDIV</name>
              <description>Predivider for the source clock of the PLL's.</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>VID_PLL_PREDIV_0</name>
                  <description>Divide by 1</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>VID_PLL_PREDIV_1</name>
                  <description>Divide by 2</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>MISC1</name>
          <description>Miscellaneous Register 1</description>
          <addressOffset>0x160</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>LVDS1_CLK_SEL</name>
              <description>This field selects the clk to be routed to anaclk1/1b.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ARM_PLL</name>
                  <description>Arm PLL</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SYS_PLL</name>
                  <description>System PLL</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PFD4</name>
                  <description>ref_pfd4_clk == pll2_pfd0_clk</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PFD5</name>
                  <description>ref_pfd5_clk == pll2_pfd1_clk</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PFD6</name>
                  <description>ref_pfd6_clk == pll2_pfd2_clk</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PFD7</name>
                  <description>ref_pfd7_clk == pll2_pfd3_clk</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AUDIO_PLL</name>
                  <description>Audio PLL</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>VIDEO_PLL</name>
                  <description>Video PLL</description>
                  <value>0x7</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ETHERNET_REF</name>
                  <description>ethernet ref clock (ENET_PLL)</description>
                  <value>0x9</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>USB1_PLL</name>
                  <description>USB1 PLL clock</description>
                  <value>0xC</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>USB2_PLL</name>
                  <description>USB2 PLL clock</description>
                  <value>0xD</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PFD0</name>
                  <description>ref_pfd0_clk == pll3_pfd0_clk</description>
                  <value>0xE</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PFD1</name>
                  <description>ref_pfd1_clk == pll3_pfd1_clk</description>
                  <value>0xF</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PFD2</name>
                  <description>ref_pfd2_clk == pll3_pfd2_clk</description>
                  <value>0x10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PFD3</name>
                  <description>ref_pfd3_clk == pll3_pfd3_clk</description>
                  <value>0x11</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>XTAL</name>
                  <description>xtal (24M)</description>
                  <value>0x12</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>LVDSCLK1_OBEN</name>
              <description>This enables the LVDS output buffer for anaclk1/1b</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>LVDSCLK1_IBEN</name>
              <description>This enables the LVDS input buffer for anaclk1/1b</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PFD_480_AUTOGATE_EN</name>
              <description>This enables a feature that will clkgate (reset) all PFD_480 clocks anytime the USB1_PLL_480 is unlocked or powered off</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PFD_528_AUTOGATE_EN</name>
              <description>This enables a feature that will clkgate (reset) all PFD_528 clocks anytime the PLL_528 is unlocked or powered off</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>IRQ_TEMPPANIC</name>
              <description>This status bit is set to one when the temperature sensor panic interrupt asserts for a panic high temperature</description>
              <bitOffset>0x1B</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
            </field>
            <field>
              <name>IRQ_TEMPLOW</name>
              <description>This status bit is set to one when the temperature sensor low interrupt asserts for low temperature</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
            </field>
            <field>
              <name>IRQ_TEMPHIGH</name>
              <description>This status bit is set to one when the temperature sensor high interrupt asserts for high temperature</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
            </field>
            <field>
              <name>IRQ_ANA_BO</name>
              <description>This status bit is set to one when when any of the analog regulator brownout interrupts assert</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
            </field>
            <field>
              <name>IRQ_DIG_BO</name>
              <description>This status bit is set to one when when any of the digital regulator brownout interrupts assert</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
            </field>
          </fields>
        </register>
        <register>
          <name>MISC1_SET</name>
          <description>Miscellaneous Register 1</description>
          <addressOffset>0x164</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>LVDS1_CLK_SEL</name>
              <description>This field selects the clk to be routed to anaclk1/1b.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ARM_PLL</name>
                  <description>Arm PLL</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SYS_PLL</name>
                  <description>System PLL</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PFD4</name>
                  <description>ref_pfd4_clk == pll2_pfd0_clk</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PFD5</name>
                  <description>ref_pfd5_clk == pll2_pfd1_clk</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PFD6</name>
                  <description>ref_pfd6_clk == pll2_pfd2_clk</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PFD7</name>
                  <description>ref_pfd7_clk == pll2_pfd3_clk</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AUDIO_PLL</name>
                  <description>Audio PLL</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>VIDEO_PLL</name>
                  <description>Video PLL</description>
                  <value>0x7</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ETHERNET_REF</name>
                  <description>ethernet ref clock (ENET_PLL)</description>
                  <value>0x9</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>USB1_PLL</name>
                  <description>USB1 PLL clock</description>
                  <value>0xC</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>USB2_PLL</name>
                  <description>USB2 PLL clock</description>
                  <value>0xD</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PFD0</name>
                  <description>ref_pfd0_clk == pll3_pfd0_clk</description>
                  <value>0xE</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PFD1</name>
                  <description>ref_pfd1_clk == pll3_pfd1_clk</description>
                  <value>0xF</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PFD2</name>
                  <description>ref_pfd2_clk == pll3_pfd2_clk</description>
                  <value>0x10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PFD3</name>
                  <description>ref_pfd3_clk == pll3_pfd3_clk</description>
                  <value>0x11</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>XTAL</name>
                  <description>xtal (24M)</description>
                  <value>0x12</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>LVDSCLK1_OBEN</name>
              <description>This enables the LVDS output buffer for anaclk1/1b</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>LVDSCLK1_IBEN</name>
              <description>This enables the LVDS input buffer for anaclk1/1b</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PFD_480_AUTOGATE_EN</name>
              <description>This enables a feature that will clkgate (reset) all PFD_480 clocks anytime the USB1_PLL_480 is unlocked or powered off</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PFD_528_AUTOGATE_EN</name>
              <description>This enables a feature that will clkgate (reset) all PFD_528 clocks anytime the PLL_528 is unlocked or powered off</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>IRQ_TEMPPANIC</name>
              <description>This status bit is set to one when the temperature sensor panic interrupt asserts for a panic high temperature</description>
              <bitOffset>0x1B</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
            </field>
            <field>
              <name>IRQ_TEMPLOW</name>
              <description>This status bit is set to one when the temperature sensor low interrupt asserts for low temperature</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
            </field>
            <field>
              <name>IRQ_TEMPHIGH</name>
              <description>This status bit is set to one when the temperature sensor high interrupt asserts for high temperature</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
            </field>
            <field>
              <name>IRQ_ANA_BO</name>
              <description>This status bit is set to one when when any of the analog regulator brownout interrupts assert</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
            </field>
            <field>
              <name>IRQ_DIG_BO</name>
              <description>This status bit is set to one when when any of the digital regulator brownout interrupts assert</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
            </field>
          </fields>
        </register>
        <register>
          <name>MISC1_CLR</name>
          <description>Miscellaneous Register 1</description>
          <addressOffset>0x168</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>LVDS1_CLK_SEL</name>
              <description>This field selects the clk to be routed to anaclk1/1b.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ARM_PLL</name>
                  <description>Arm PLL</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SYS_PLL</name>
                  <description>System PLL</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PFD4</name>
                  <description>ref_pfd4_clk == pll2_pfd0_clk</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PFD5</name>
                  <description>ref_pfd5_clk == pll2_pfd1_clk</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PFD6</name>
                  <description>ref_pfd6_clk == pll2_pfd2_clk</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PFD7</name>
                  <description>ref_pfd7_clk == pll2_pfd3_clk</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AUDIO_PLL</name>
                  <description>Audio PLL</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>VIDEO_PLL</name>
                  <description>Video PLL</description>
                  <value>0x7</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ETHERNET_REF</name>
                  <description>ethernet ref clock (ENET_PLL)</description>
                  <value>0x9</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>USB1_PLL</name>
                  <description>USB1 PLL clock</description>
                  <value>0xC</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>USB2_PLL</name>
                  <description>USB2 PLL clock</description>
                  <value>0xD</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PFD0</name>
                  <description>ref_pfd0_clk == pll3_pfd0_clk</description>
                  <value>0xE</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PFD1</name>
                  <description>ref_pfd1_clk == pll3_pfd1_clk</description>
                  <value>0xF</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PFD2</name>
                  <description>ref_pfd2_clk == pll3_pfd2_clk</description>
                  <value>0x10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PFD3</name>
                  <description>ref_pfd3_clk == pll3_pfd3_clk</description>
                  <value>0x11</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>XTAL</name>
                  <description>xtal (24M)</description>
                  <value>0x12</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>LVDSCLK1_OBEN</name>
              <description>This enables the LVDS output buffer for anaclk1/1b</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>LVDSCLK1_IBEN</name>
              <description>This enables the LVDS input buffer for anaclk1/1b</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PFD_480_AUTOGATE_EN</name>
              <description>This enables a feature that will clkgate (reset) all PFD_480 clocks anytime the USB1_PLL_480 is unlocked or powered off</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PFD_528_AUTOGATE_EN</name>
              <description>This enables a feature that will clkgate (reset) all PFD_528 clocks anytime the PLL_528 is unlocked or powered off</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>IRQ_TEMPPANIC</name>
              <description>This status bit is set to one when the temperature sensor panic interrupt asserts for a panic high temperature</description>
              <bitOffset>0x1B</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
            </field>
            <field>
              <name>IRQ_TEMPLOW</name>
              <description>This status bit is set to one when the temperature sensor low interrupt asserts for low temperature</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
            </field>
            <field>
              <name>IRQ_TEMPHIGH</name>
              <description>This status bit is set to one when the temperature sensor high interrupt asserts for high temperature</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
            </field>
            <field>
              <name>IRQ_ANA_BO</name>
              <description>This status bit is set to one when when any of the analog regulator brownout interrupts assert</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
            </field>
            <field>
              <name>IRQ_DIG_BO</name>
              <description>This status bit is set to one when when any of the digital regulator brownout interrupts assert</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
            </field>
          </fields>
        </register>
        <register>
          <name>MISC1_TOG</name>
          <description>Miscellaneous Register 1</description>
          <addressOffset>0x16C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>LVDS1_CLK_SEL</name>
              <description>This field selects the clk to be routed to anaclk1/1b.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ARM_PLL</name>
                  <description>Arm PLL</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SYS_PLL</name>
                  <description>System PLL</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PFD4</name>
                  <description>ref_pfd4_clk == pll2_pfd0_clk</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PFD5</name>
                  <description>ref_pfd5_clk == pll2_pfd1_clk</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PFD6</name>
                  <description>ref_pfd6_clk == pll2_pfd2_clk</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PFD7</name>
                  <description>ref_pfd7_clk == pll2_pfd3_clk</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AUDIO_PLL</name>
                  <description>Audio PLL</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>VIDEO_PLL</name>
                  <description>Video PLL</description>
                  <value>0x7</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ETHERNET_REF</name>
                  <description>ethernet ref clock (ENET_PLL)</description>
                  <value>0x9</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>USB1_PLL</name>
                  <description>USB1 PLL clock</description>
                  <value>0xC</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>USB2_PLL</name>
                  <description>USB2 PLL clock</description>
                  <value>0xD</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PFD0</name>
                  <description>ref_pfd0_clk == pll3_pfd0_clk</description>
                  <value>0xE</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PFD1</name>
                  <description>ref_pfd1_clk == pll3_pfd1_clk</description>
                  <value>0xF</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PFD2</name>
                  <description>ref_pfd2_clk == pll3_pfd2_clk</description>
                  <value>0x10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PFD3</name>
                  <description>ref_pfd3_clk == pll3_pfd3_clk</description>
                  <value>0x11</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>XTAL</name>
                  <description>xtal (24M)</description>
                  <value>0x12</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>LVDSCLK1_OBEN</name>
              <description>This enables the LVDS output buffer for anaclk1/1b</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>LVDSCLK1_IBEN</name>
              <description>This enables the LVDS input buffer for anaclk1/1b</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PFD_480_AUTOGATE_EN</name>
              <description>This enables a feature that will clkgate (reset) all PFD_480 clocks anytime the USB1_PLL_480 is unlocked or powered off</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PFD_528_AUTOGATE_EN</name>
              <description>This enables a feature that will clkgate (reset) all PFD_528 clocks anytime the PLL_528 is unlocked or powered off</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>IRQ_TEMPPANIC</name>
              <description>This status bit is set to one when the temperature sensor panic interrupt asserts for a panic high temperature</description>
              <bitOffset>0x1B</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
            </field>
            <field>
              <name>IRQ_TEMPLOW</name>
              <description>This status bit is set to one when the temperature sensor low interrupt asserts for low temperature</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
            </field>
            <field>
              <name>IRQ_TEMPHIGH</name>
              <description>This status bit is set to one when the temperature sensor high interrupt asserts for high temperature</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
            </field>
            <field>
              <name>IRQ_ANA_BO</name>
              <description>This status bit is set to one when when any of the analog regulator brownout interrupts assert</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
            </field>
            <field>
              <name>IRQ_DIG_BO</name>
              <description>This status bit is set to one when when any of the digital regulator brownout interrupts assert</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
            </field>
          </fields>
        </register>
        <register>
          <name>MISC2</name>
          <description>Miscellaneous Register 2</description>
          <addressOffset>0x170</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x272727</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>REG0_BO_OFFSET</name>
              <description>This field defines the brown out voltage offset for the CORE power domain</description>
              <bitOffset>0</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>REG0_BO_OFFSET_4</name>
                  <description>Brownout offset = 0.100V</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REG0_BO_OFFSET_7</name>
                  <description>Brownout offset = 0.175V</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>REG0_BO_STATUS</name>
              <description>Reg0 brownout status bit.Not related to CCM. See Power Management Unit (PMU)</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>REG0_BO_STATUS_1</name>
                  <description>Brownout, supply is below target minus brownout offset.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>REG0_ENABLE_BO</name>
              <description>Enables the brownout detection.Not related to CCM. See Power Management Unit (PMU)</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PLL3_disable</name>
              <description>When USB is in low power suspend mode this Control bit is used to indicate if other system peripherals require the USB PLL3 clock when the SoC is not in low power mode</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PLL3_disable_0</name>
                  <description>PLL3 is being used by peripherals and is enabled when SoC is not in any low power mode</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PLL3_disable_1</name>
                  <description>PLL3 can be disabled when the SoC is not in any low power mode</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>REG1_BO_OFFSET</name>
              <description>This field defines the brown out voltage offset for the xPU power domain</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>REG1_BO_OFFSET_4</name>
                  <description>Brownout offset = 0.100V</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REG1_BO_OFFSET_7</name>
                  <description>Brownout offset = 0.175V</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>REG1_BO_STATUS</name>
              <description>Reg1 brownout status bit. Not related to CCM. See Power Management Unit (PMU)</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>REG1_BO_STATUS_1</name>
                  <description>Brownout, supply is below target minus brownout offset.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>REG1_ENABLE_BO</name>
              <description>Enables the brownout detection.Not related to CCM. See Power Management Unit (PMU)</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>AUDIO_DIV_LSB</name>
              <description>LSB of Post-divider for Audio PLL</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>AUDIO_DIV_LSB_0</name>
                  <description>divide by 1 (Default)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AUDIO_DIV_LSB_1</name>
                  <description>divide by 2</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>REG2_BO_OFFSET</name>
              <description>This field defines the brown out voltage offset for the xPU power domain</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>REG2_BO_OFFSET_4</name>
                  <description>Brownout offset = 0.100V</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REG2_BO_OFFSET_7</name>
                  <description>Brownout offset = 0.175V</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>REG2_BO_STATUS</name>
              <description>Reg2 brownout status bit.Not related to CCM. See Power Management Unit (PMU)</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>REG2_ENABLE_BO</name>
              <description>Enables the brownout detection.Not related to CCM. See Power Management Unit (PMU)</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>REG2_OK</name>
              <description>Signals that the voltage is above the brownout level for the SOC supply</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>AUDIO_DIV_MSB</name>
              <description>MSB of Post-divider for Audio PLL</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>AUDIO_DIV_MSB_0</name>
                  <description>divide by 1 (Default)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AUDIO_DIV_MSB_1</name>
                  <description>divide by 2</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>REG0_STEP_TIME</name>
              <description>Number of clock periods (24MHz clock).Not related to CCM. See Power Management Unit (PMU)</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>64_CLOCKS</name>
                  <description>64</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>128_CLOCKS</name>
                  <description>128</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>256_CLOCKS</name>
                  <description>256</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>512_CLOCKS</name>
                  <description>512</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>REG1_STEP_TIME</name>
              <description>Number of clock periods (24MHz clock).Not related to CCM. See Power Management Unit (PMU)</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>64_CLOCKS</name>
                  <description>64</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>128_CLOCKS</name>
                  <description>128</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>256_CLOCKS</name>
                  <description>256</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>512_CLOCKS</name>
                  <description>512</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>REG2_STEP_TIME</name>
              <description>Number of clock periods (24MHz clock).Not related to CCM. See Power Management Unit (PMU)</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>64_CLOCKS</name>
                  <description>64</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>128_CLOCKS</name>
                  <description>128</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>256_CLOCKS</name>
                  <description>256</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>512_CLOCKS</name>
                  <description>512</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>VIDEO_DIV</name>
              <description>Post-divider for video</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>VIDEO_DIV_0</name>
                  <description>divide by 1 (Default)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>VIDEO_DIV_1</name>
                  <description>divide by 2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>VIDEO_DIV_2</name>
                  <description>divide by 1</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>VIDEO_DIV_3</name>
                  <description>divide by 4</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>MISC2_SET</name>
          <description>Miscellaneous Register 2</description>
          <addressOffset>0x174</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x272727</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>REG0_BO_OFFSET</name>
              <description>This field defines the brown out voltage offset for the CORE power domain</description>
              <bitOffset>0</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>REG0_BO_OFFSET_4</name>
                  <description>Brownout offset = 0.100V</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REG0_BO_OFFSET_7</name>
                  <description>Brownout offset = 0.175V</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>REG0_BO_STATUS</name>
              <description>Reg0 brownout status bit.Not related to CCM. See Power Management Unit (PMU)</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>REG0_BO_STATUS_1</name>
                  <description>Brownout, supply is below target minus brownout offset.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>REG0_ENABLE_BO</name>
              <description>Enables the brownout detection.Not related to CCM. See Power Management Unit (PMU)</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PLL3_disable</name>
              <description>When USB is in low power suspend mode this Control bit is used to indicate if other system peripherals require the USB PLL3 clock when the SoC is not in low power mode</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PLL3_disable_0</name>
                  <description>PLL3 is being used by peripherals and is enabled when SoC is not in any low power mode</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PLL3_disable_1</name>
                  <description>PLL3 can be disabled when the SoC is not in any low power mode</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>REG1_BO_OFFSET</name>
              <description>This field defines the brown out voltage offset for the xPU power domain</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>REG1_BO_OFFSET_4</name>
                  <description>Brownout offset = 0.100V</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REG1_BO_OFFSET_7</name>
                  <description>Brownout offset = 0.175V</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>REG1_BO_STATUS</name>
              <description>Reg1 brownout status bit. Not related to CCM. See Power Management Unit (PMU)</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>REG1_BO_STATUS_1</name>
                  <description>Brownout, supply is below target minus brownout offset.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>REG1_ENABLE_BO</name>
              <description>Enables the brownout detection.Not related to CCM. See Power Management Unit (PMU)</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>AUDIO_DIV_LSB</name>
              <description>LSB of Post-divider for Audio PLL</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>AUDIO_DIV_LSB_0</name>
                  <description>divide by 1 (Default)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AUDIO_DIV_LSB_1</name>
                  <description>divide by 2</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>REG2_BO_OFFSET</name>
              <description>This field defines the brown out voltage offset for the xPU power domain</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>REG2_BO_OFFSET_4</name>
                  <description>Brownout offset = 0.100V</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REG2_BO_OFFSET_7</name>
                  <description>Brownout offset = 0.175V</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>REG2_BO_STATUS</name>
              <description>Reg2 brownout status bit.Not related to CCM. See Power Management Unit (PMU)</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>REG2_ENABLE_BO</name>
              <description>Enables the brownout detection.Not related to CCM. See Power Management Unit (PMU)</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>REG2_OK</name>
              <description>Signals that the voltage is above the brownout level for the SOC supply</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>AUDIO_DIV_MSB</name>
              <description>MSB of Post-divider for Audio PLL</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>AUDIO_DIV_MSB_0</name>
                  <description>divide by 1 (Default)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AUDIO_DIV_MSB_1</name>
                  <description>divide by 2</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>REG0_STEP_TIME</name>
              <description>Number of clock periods (24MHz clock).Not related to CCM. See Power Management Unit (PMU)</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>64_CLOCKS</name>
                  <description>64</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>128_CLOCKS</name>
                  <description>128</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>256_CLOCKS</name>
                  <description>256</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>512_CLOCKS</name>
                  <description>512</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>REG1_STEP_TIME</name>
              <description>Number of clock periods (24MHz clock).Not related to CCM. See Power Management Unit (PMU)</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>64_CLOCKS</name>
                  <description>64</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>128_CLOCKS</name>
                  <description>128</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>256_CLOCKS</name>
                  <description>256</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>512_CLOCKS</name>
                  <description>512</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>REG2_STEP_TIME</name>
              <description>Number of clock periods (24MHz clock).Not related to CCM. See Power Management Unit (PMU)</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>64_CLOCKS</name>
                  <description>64</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>128_CLOCKS</name>
                  <description>128</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>256_CLOCKS</name>
                  <description>256</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>512_CLOCKS</name>
                  <description>512</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>VIDEO_DIV</name>
              <description>Post-divider for video</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>VIDEO_DIV_0</name>
                  <description>divide by 1 (Default)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>VIDEO_DIV_1</name>
                  <description>divide by 2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>VIDEO_DIV_2</name>
                  <description>divide by 1</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>VIDEO_DIV_3</name>
                  <description>divide by 4</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>MISC2_CLR</name>
          <description>Miscellaneous Register 2</description>
          <addressOffset>0x178</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x272727</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>REG0_BO_OFFSET</name>
              <description>This field defines the brown out voltage offset for the CORE power domain</description>
              <bitOffset>0</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>REG0_BO_OFFSET_4</name>
                  <description>Brownout offset = 0.100V</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REG0_BO_OFFSET_7</name>
                  <description>Brownout offset = 0.175V</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>REG0_BO_STATUS</name>
              <description>Reg0 brownout status bit.Not related to CCM. See Power Management Unit (PMU)</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>REG0_BO_STATUS_1</name>
                  <description>Brownout, supply is below target minus brownout offset.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>REG0_ENABLE_BO</name>
              <description>Enables the brownout detection.Not related to CCM. See Power Management Unit (PMU)</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PLL3_disable</name>
              <description>When USB is in low power suspend mode this Control bit is used to indicate if other system peripherals require the USB PLL3 clock when the SoC is not in low power mode</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PLL3_disable_0</name>
                  <description>PLL3 is being used by peripherals and is enabled when SoC is not in any low power mode</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PLL3_disable_1</name>
                  <description>PLL3 can be disabled when the SoC is not in any low power mode</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>REG1_BO_OFFSET</name>
              <description>This field defines the brown out voltage offset for the xPU power domain</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>REG1_BO_OFFSET_4</name>
                  <description>Brownout offset = 0.100V</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REG1_BO_OFFSET_7</name>
                  <description>Brownout offset = 0.175V</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>REG1_BO_STATUS</name>
              <description>Reg1 brownout status bit. Not related to CCM. See Power Management Unit (PMU)</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>REG1_BO_STATUS_1</name>
                  <description>Brownout, supply is below target minus brownout offset.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>REG1_ENABLE_BO</name>
              <description>Enables the brownout detection.Not related to CCM. See Power Management Unit (PMU)</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>AUDIO_DIV_LSB</name>
              <description>LSB of Post-divider for Audio PLL</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>AUDIO_DIV_LSB_0</name>
                  <description>divide by 1 (Default)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AUDIO_DIV_LSB_1</name>
                  <description>divide by 2</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>REG2_BO_OFFSET</name>
              <description>This field defines the brown out voltage offset for the xPU power domain</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>REG2_BO_OFFSET_4</name>
                  <description>Brownout offset = 0.100V</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REG2_BO_OFFSET_7</name>
                  <description>Brownout offset = 0.175V</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>REG2_BO_STATUS</name>
              <description>Reg2 brownout status bit.Not related to CCM. See Power Management Unit (PMU)</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>REG2_ENABLE_BO</name>
              <description>Enables the brownout detection.Not related to CCM. See Power Management Unit (PMU)</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>REG2_OK</name>
              <description>Signals that the voltage is above the brownout level for the SOC supply</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>AUDIO_DIV_MSB</name>
              <description>MSB of Post-divider for Audio PLL</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>AUDIO_DIV_MSB_0</name>
                  <description>divide by 1 (Default)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AUDIO_DIV_MSB_1</name>
                  <description>divide by 2</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>REG0_STEP_TIME</name>
              <description>Number of clock periods (24MHz clock).Not related to CCM. See Power Management Unit (PMU)</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>64_CLOCKS</name>
                  <description>64</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>128_CLOCKS</name>
                  <description>128</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>256_CLOCKS</name>
                  <description>256</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>512_CLOCKS</name>
                  <description>512</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>REG1_STEP_TIME</name>
              <description>Number of clock periods (24MHz clock).Not related to CCM. See Power Management Unit (PMU)</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>64_CLOCKS</name>
                  <description>64</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>128_CLOCKS</name>
                  <description>128</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>256_CLOCKS</name>
                  <description>256</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>512_CLOCKS</name>
                  <description>512</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>REG2_STEP_TIME</name>
              <description>Number of clock periods (24MHz clock).Not related to CCM. See Power Management Unit (PMU)</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>64_CLOCKS</name>
                  <description>64</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>128_CLOCKS</name>
                  <description>128</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>256_CLOCKS</name>
                  <description>256</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>512_CLOCKS</name>
                  <description>512</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>VIDEO_DIV</name>
              <description>Post-divider for video</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>VIDEO_DIV_0</name>
                  <description>divide by 1 (Default)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>VIDEO_DIV_1</name>
                  <description>divide by 2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>VIDEO_DIV_2</name>
                  <description>divide by 1</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>VIDEO_DIV_3</name>
                  <description>divide by 4</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>MISC2_TOG</name>
          <description>Miscellaneous Register 2</description>
          <addressOffset>0x17C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x272727</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>REG0_BO_OFFSET</name>
              <description>This field defines the brown out voltage offset for the CORE power domain</description>
              <bitOffset>0</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>REG0_BO_OFFSET_4</name>
                  <description>Brownout offset = 0.100V</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REG0_BO_OFFSET_7</name>
                  <description>Brownout offset = 0.175V</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>REG0_BO_STATUS</name>
              <description>Reg0 brownout status bit.Not related to CCM. See Power Management Unit (PMU)</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>REG0_BO_STATUS_1</name>
                  <description>Brownout, supply is below target minus brownout offset.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>REG0_ENABLE_BO</name>
              <description>Enables the brownout detection.Not related to CCM. See Power Management Unit (PMU)</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PLL3_disable</name>
              <description>When USB is in low power suspend mode this Control bit is used to indicate if other system peripherals require the USB PLL3 clock when the SoC is not in low power mode</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PLL3_disable_0</name>
                  <description>PLL3 is being used by peripherals and is enabled when SoC is not in any low power mode</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PLL3_disable_1</name>
                  <description>PLL3 can be disabled when the SoC is not in any low power mode</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>REG1_BO_OFFSET</name>
              <description>This field defines the brown out voltage offset for the xPU power domain</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>REG1_BO_OFFSET_4</name>
                  <description>Brownout offset = 0.100V</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REG1_BO_OFFSET_7</name>
                  <description>Brownout offset = 0.175V</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>REG1_BO_STATUS</name>
              <description>Reg1 brownout status bit. Not related to CCM. See Power Management Unit (PMU)</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>REG1_BO_STATUS_1</name>
                  <description>Brownout, supply is below target minus brownout offset.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>REG1_ENABLE_BO</name>
              <description>Enables the brownout detection.Not related to CCM. See Power Management Unit (PMU)</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>AUDIO_DIV_LSB</name>
              <description>LSB of Post-divider for Audio PLL</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>AUDIO_DIV_LSB_0</name>
                  <description>divide by 1 (Default)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AUDIO_DIV_LSB_1</name>
                  <description>divide by 2</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>REG2_BO_OFFSET</name>
              <description>This field defines the brown out voltage offset for the xPU power domain</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>REG2_BO_OFFSET_4</name>
                  <description>Brownout offset = 0.100V</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REG2_BO_OFFSET_7</name>
                  <description>Brownout offset = 0.175V</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>REG2_BO_STATUS</name>
              <description>Reg2 brownout status bit.Not related to CCM. See Power Management Unit (PMU)</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>REG2_ENABLE_BO</name>
              <description>Enables the brownout detection.Not related to CCM. See Power Management Unit (PMU)</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>REG2_OK</name>
              <description>Signals that the voltage is above the brownout level for the SOC supply</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>AUDIO_DIV_MSB</name>
              <description>MSB of Post-divider for Audio PLL</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>AUDIO_DIV_MSB_0</name>
                  <description>divide by 1 (Default)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AUDIO_DIV_MSB_1</name>
                  <description>divide by 2</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>REG0_STEP_TIME</name>
              <description>Number of clock periods (24MHz clock).Not related to CCM. See Power Management Unit (PMU)</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>64_CLOCKS</name>
                  <description>64</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>128_CLOCKS</name>
                  <description>128</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>256_CLOCKS</name>
                  <description>256</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>512_CLOCKS</name>
                  <description>512</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>REG1_STEP_TIME</name>
              <description>Number of clock periods (24MHz clock).Not related to CCM. See Power Management Unit (PMU)</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>64_CLOCKS</name>
                  <description>64</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>128_CLOCKS</name>
                  <description>128</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>256_CLOCKS</name>
                  <description>256</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>512_CLOCKS</name>
                  <description>512</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>REG2_STEP_TIME</name>
              <description>Number of clock periods (24MHz clock).Not related to CCM. See Power Management Unit (PMU)</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>64_CLOCKS</name>
                  <description>64</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>128_CLOCKS</name>
                  <description>128</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>256_CLOCKS</name>
                  <description>256</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>512_CLOCKS</name>
                  <description>512</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>VIDEO_DIV</name>
              <description>Post-divider for video</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>VIDEO_DIV_0</name>
                  <description>divide by 1 (Default)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>VIDEO_DIV_1</name>
                  <description>divide by 2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>VIDEO_DIV_2</name>
                  <description>divide by 1</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>VIDEO_DIV_3</name>
                  <description>divide by 4</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
      </registers>
    </peripheral>
    <peripheral>
      <name>PMU</name>
      <description>PMU</description>
      <groupName>PMU</groupName>
      <prependToName>PMU_</prependToName>
      <baseAddress>0x20C8110</baseAddress>
      <addressBlock>
        <offset>0</offset>
        <size>0x170</size>
        <usage>registers</usage>
      </addressBlock>
      <interrupt>
        <name>PMU_IRQ1</name>
        <value>86</value>
      </interrupt>
      <interrupt>
        <name>PMU_IRQ2</name>
        <value>159</value>
      </interrupt>
      <registers>
        <register>
          <name>REG_1P1</name>
          <description>Regulator 1P1 Register</description>
          <addressOffset>0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x1073</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ENABLE_LINREG</name>
              <description>Control bit to enable the regulator output.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENABLE_BO</name>
              <description>Control bit to enable the brownout circuitry in the regulator.</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENABLE_ILIMIT</name>
              <description>Control bit to enable the current-limit circuitry in the regulator.</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENABLE_PULLDOWN</name>
              <description>Control bit to enable the pull-down circuitry in the regulator</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BO_OFFSET</name>
              <description>Control bits to adjust the regulator brownout offset voltage in 25mV steps</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>OUTPUT_TRG</name>
              <description>Control bits to adjust the regulator output voltage</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>OUTPUT_TRG_4</name>
                  <description>0.8V</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>OUTPUT_TRG_16</name>
                  <description>1.1V</description>
                  <value>0x10</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BO_VDD1P1</name>
              <description>Status bit that signals when a brownout is detected on the regulator output.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>OK_VDD1P1</name>
              <description>Status bit that signals when the regulator output is ok. 1 = regulator output &gt; brownout target</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>ENABLE_WEAK_LINREG</name>
              <description>Enables the weak 1p1 regulator</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SELREF_WEAK_LINREG</name>
              <description>Selects the source for the reference voltage of the weak 1p1 regulator.</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SELREF_WEAK_LINREG_0</name>
                  <description>Weak-linreg output tracks low-power-bandgap voltage</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SELREF_WEAK_LINREG_1</name>
                  <description>Weak-linreg output tracks VDD_SOC_CAP voltage</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>REG_3P0</name>
          <description>Regulator 3P0 Register</description>
          <addressOffset>0x10</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0xF74</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ENABLE_LINREG</name>
              <description>Control bit to enable the regulator output to be set by the programmed target voltage setting and internal bandgap reference</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENABLE_BO</name>
              <description>Control bit to enable the brownout circuitry in the regulator.</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENABLE_ILIMIT</name>
              <description>Control bit to enable the current-limit circuitry in the regulator.</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BO_OFFSET</name>
              <description>Control bits to adjust the regulator brownout offset voltage in 25mV steps</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>VBUS_SEL</name>
              <description>Select input voltage source for LDO_3P0 from either USB_OTG1_VBUS or USB_OTG2_VBUS</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>USB_OTG1_VBUS</name>
                  <description>Utilize VBUS OTG1 for power</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>USB_OTG2_VBUS</name>
                  <description>Utilize VBUS OTG2 power</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>OUTPUT_TRG</name>
              <description>Control bits to adjust the regulator output voltage</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>OUTPUT_TRG_0</name>
                  <description>2.625V</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>OUTPUT_TRG_15</name>
                  <description>3.000V</description>
                  <value>0xF</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>OUTPUT_TRG_31</name>
                  <description>3.400V</description>
                  <value>0x1F</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BO_VDD3P0</name>
              <description>Status bit that signals when a brownout is detected on the regulator output.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>OK_VDD3P0</name>
              <description>Status bit that signals when the regulator output is ok. 1 = regulator output &gt; brownout target</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>REG_2P5</name>
          <description>Regulator 2P5 Register</description>
          <addressOffset>0x20</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x1073</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ENABLE_LINREG</name>
              <description>Control bit to enable the regulator output.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENABLE_BO</name>
              <description>Control bit to enable the brownout circuitry in the regulator.</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENABLE_ILIMIT</name>
              <description>Control bit to enable the current-limit circuitry in the regulator.</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENABLE_PULLDOWN</name>
              <description>Control bit to enable the pull-down circuitry in the regulator</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BO_OFFSET</name>
              <description>Control bits to adjust the regulator brownout offset voltage in 25mV steps</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>OUTPUT_TRG</name>
              <description>Control bits to adjust the regulator output voltage</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>OUTPUT_TRG_0</name>
                  <description>2.10V</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>OUTPUT_TRG_16</name>
                  <description>2.50V</description>
                  <value>0x10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>OUTPUT_TRG_31</name>
                  <description>2.875V</description>
                  <value>0x1F</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BO_VDD2P5</name>
              <description>Status bit that signals when a brownout is detected on the regulator output.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>OK_VDD2P5</name>
              <description>Status bit that signals when the regulator output is ok. 1 = regulator output &gt; brownout target</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>ENABLE_WEAK_LINREG</name>
              <description>Enables the weak 2p5 regulator</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>REG_CORE</name>
          <description>Digital Regulator Core Register</description>
          <addressOffset>0x30</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x482012</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>REG0_TARG</name>
              <description>This field defines the target voltage for the ARM core power domain</description>
              <bitOffset>0</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>REG0_TARG_0</name>
                  <description>Power gated off</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REG0_TARG_1</name>
                  <description>Target core voltage = 0.725V</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REG0_TARG_2</name>
                  <description>Target core voltage = 0.750V</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REG0_TARG_3</name>
                  <description>Target core voltage = 0.775V</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REG0_TARG_16</name>
                  <description>Target core voltage = 1.100V</description>
                  <value>0x10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REG0_TARG_30</name>
                  <description>Target core voltage = 1.450V</description>
                  <value>0x1E</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REG0_TARG_31</name>
                  <description>Power FET switched full on. No regulation.</description>
                  <value>0x1F</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>REG2_TARG</name>
              <description>This field defines the target voltage for the SOC power domain</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>REG2_TARG_0</name>
                  <description>Power gated off</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REG2_TARG_1</name>
                  <description>Target core voltage = 0.725V</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REG2_TARG_2</name>
                  <description>Target core voltage = 0.750V</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REG2_TARG_3</name>
                  <description>Target core voltage = 0.775V</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REG2_TARG_16</name>
                  <description>Target core voltage = 1.100V</description>
                  <value>0x10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REG2_TARG_30</name>
                  <description>Target core voltage = 1.450V</description>
                  <value>0x1E</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REG2_TARG_31</name>
                  <description>Power FET switched full on. No regulation.</description>
                  <value>0x1F</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RAMP_RATE</name>
              <description>Regulator voltage ramp rate.</description>
              <bitOffset>0x1B</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RAMP_RATE_0</name>
                  <description>Fast</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RAMP_RATE_1</name>
                  <description>Medium Fast</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RAMP_RATE_2</name>
                  <description>Medium Slow</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RAMP_RATE_3</name>
                  <description>Slow</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>FET_ODRIVE</name>
              <description>If set, increases the gate drive on power gating FETs to reduce leakage in the off state</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>LOWPWR_CTRL</name>
          <description>Low Power Control Register</description>
          <addressOffset>0x160</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x4009</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RC_OSC_EN</name>
              <description>RC Osc. enable control.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RC_OSC_EN_0</name>
                  <description>Use XTAL OSC to source the 24MHz clock</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RC_OSC_EN_1</name>
                  <description>Use RC OSC</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RC_OSC_PROG</name>
              <description>RC osc. tuning values.</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>OSC_SEL</name>
              <description>Select the source for the 24MHz clock.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>OSC_SEL_0</name>
                  <description>XTAL OSC</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>OSC_SEL_1</name>
                  <description>RC OSC</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>LPBG_SEL</name>
              <description>Bandgap select. Not related to oscillator.</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LPBG_SEL_0</name>
                  <description>Normal power bandgap</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LPBG_SEL_1</name>
                  <description>Low power bandgap</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>LPBG_TEST</name>
              <description>Low power bandgap test bit. Not related to oscillator.</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>REFTOP_IBIAS_OFF</name>
              <description>Low power reftop ibias disable. Not related to oscillator.</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>L1_PWRGATE</name>
              <description>L1 power gate control. Used as software override. Not related to oscillator.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>L2_PWRGATE</name>
              <description>L2 power gate control. Used as software override. Not related to oscillator.</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CPU_PWRGATE</name>
              <description>CPU power gate control. Used as software override. Test purpose only Not related to oscillator.</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DISPLAY_PWRGATE</name>
              <description>Display logic power gate control. Used as software override. Not related to oscillator.</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RCOSC_CG_OVERRIDE</name>
              <description>For debug purposes only</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>XTALOSC_PWRUP_DELAY</name>
              <description>Specifies the time delay between when the 24MHz xtal is powered up until it is stable and ready to use</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>XTALOSC_PWRUP_DELAY_0</name>
                  <description>0.25ms</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>XTALOSC_PWRUP_DELAY_1</name>
                  <description>0.5ms</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>XTALOSC_PWRUP_DELAY_2</name>
                  <description>1ms</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>XTALOSC_PWRUP_DELAY_3</name>
                  <description>2ms</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>XTALOSC_PWRUP_STAT</name>
              <description>Status of the 24MHz xtal oscillator.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>XTALOSC_PWRUP_STAT_0</name>
                  <description>Not stable</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>XTALOSC_PWRUP_STAT_1</name>
                  <description>Stable and ready to use</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>MIX_PWRGATE</name>
              <description>Display power gate control. Used as software mask. Set to zero to force ungated.</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>LOWPWR_CTRL_SET</name>
          <description>Low Power Control Register</description>
          <addressOffset>0x164</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x4009</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RC_OSC_EN</name>
              <description>RC Osc. enable control. Not related to PMU.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RC_OSC_EN_0</name>
                  <description>Use XTAL OSC to source the 24MHz clock</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RC_OSC_EN_1</name>
                  <description>Use RC OSC</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RC_OSC_PROG</name>
              <description>RC osc. tuning values. Not related to PMU.</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>OSC_SEL</name>
              <description>Select the source for the 24MHz clock. Not related to PMU.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>OSC_SEL_0</name>
                  <description>XTAL OSC</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>OSC_SEL_1</name>
                  <description>RC OSC</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>LPBG_SEL</name>
              <description>Bandgap select.</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LPBG_SEL_0</name>
                  <description>Normal power bandgap</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LPBG_SEL_1</name>
                  <description>Low power bandgap</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>LPBG_TEST</name>
              <description>Low power bandgap test bit.</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>REFTOP_IBIAS_OFF</name>
              <description>Low power reftop ibias disable.</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>L1_PWRGATE</name>
              <description>L1 power gate control. Used as software override.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>L2_PWRGATE</name>
              <description>L2 power gate control. Used as software override.</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CPU_PWRGATE</name>
              <description>CPU power gate control. Used as software override.Test purpose only</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DISPLAY_PWRGATE</name>
              <description>Display logic power gate control. Used as software override.</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RCOSC_CG_OVERRIDE</name>
              <description>For debug purposes only</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>XTALOSC_PWRUP_DELAY</name>
              <description>Specifies the time delay between when the 24MHz xtal is powered up until it is stable and ready to use</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>XTALOSC_PWRUP_DELAY_0</name>
                  <description>0.25ms</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>XTALOSC_PWRUP_DELAY_1</name>
                  <description>0.5ms</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>XTALOSC_PWRUP_DELAY_2</name>
                  <description>1ms</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>XTALOSC_PWRUP_DELAY_3</name>
                  <description>2ms</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>XTALOSC_PWRUP_STAT</name>
              <description>Status of the 24MHz xtal oscillator. Not related to PMU.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>XTALOSC_PWRUP_STAT_0</name>
                  <description>Not stable</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>XTALOSC_PWRUP_STAT_1</name>
                  <description>Stable and ready to use</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>MIX_PWRGATE</name>
              <description>Display power gate control. Used as software mask. Set to zero to force ungated.</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>LOWPWR_CTRL_CLR</name>
          <description>Low Power Control Register</description>
          <addressOffset>0x168</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x4009</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RC_OSC_EN</name>
              <description>RC Osc. enable control. Not related to PMU.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RC_OSC_EN_0</name>
                  <description>Use XTAL OSC to source the 24MHz clock</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RC_OSC_EN_1</name>
                  <description>Use RC OSC</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RC_OSC_PROG</name>
              <description>RC osc. tuning values. Not related to PMU.</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>OSC_SEL</name>
              <description>Select the source for the 24MHz clock. Not related to PMU.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>OSC_SEL_0</name>
                  <description>XTAL OSC</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>OSC_SEL_1</name>
                  <description>RC OSC</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>LPBG_SEL</name>
              <description>Bandgap select.</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LPBG_SEL_0</name>
                  <description>Normal power bandgap</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LPBG_SEL_1</name>
                  <description>Low power bandgap</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>LPBG_TEST</name>
              <description>Low power bandgap test bit.</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>REFTOP_IBIAS_OFF</name>
              <description>Low power reftop ibias disable.</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>L1_PWRGATE</name>
              <description>L1 power gate control. Used as software override.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>L2_PWRGATE</name>
              <description>L2 power gate control. Used as software override.</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CPU_PWRGATE</name>
              <description>CPU power gate control. Used as software override.Test purpose only</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DISPLAY_PWRGATE</name>
              <description>Display logic power gate control. Used as software override.</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RCOSC_CG_OVERRIDE</name>
              <description>For debug purposes only</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>XTALOSC_PWRUP_DELAY</name>
              <description>Specifies the time delay between when the 24MHz xtal is powered up until it is stable and ready to use</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>XTALOSC_PWRUP_DELAY_0</name>
                  <description>0.25ms</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>XTALOSC_PWRUP_DELAY_1</name>
                  <description>0.5ms</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>XTALOSC_PWRUP_DELAY_2</name>
                  <description>1ms</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>XTALOSC_PWRUP_DELAY_3</name>
                  <description>2ms</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>XTALOSC_PWRUP_STAT</name>
              <description>Status of the 24MHz xtal oscillator. Not related to PMU.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>XTALOSC_PWRUP_STAT_0</name>
                  <description>Not stable</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>XTALOSC_PWRUP_STAT_1</name>
                  <description>Stable and ready to use</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>MIX_PWRGATE</name>
              <description>Display power gate control. Used as software mask. Set to zero to force ungated.</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>LOWPWR_CTRL_TOG</name>
          <description>Low Power Control Register</description>
          <addressOffset>0x16C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x4009</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RC_OSC_EN</name>
              <description>RC Osc. enable control. Not related to PMU.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RC_OSC_EN_0</name>
                  <description>Use XTAL OSC to source the 24MHz clock</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RC_OSC_EN_1</name>
                  <description>Use RC OSC</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RC_OSC_PROG</name>
              <description>RC osc. tuning values. Not related to PMU.</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>OSC_SEL</name>
              <description>Select the source for the 24MHz clock. Not related to PMU.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>OSC_SEL_0</name>
                  <description>XTAL OSC</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>OSC_SEL_1</name>
                  <description>RC OSC</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>LPBG_SEL</name>
              <description>Bandgap select.</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LPBG_SEL_0</name>
                  <description>Normal power bandgap</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LPBG_SEL_1</name>
                  <description>Low power bandgap</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>LPBG_TEST</name>
              <description>Low power bandgap test bit.</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>REFTOP_IBIAS_OFF</name>
              <description>Low power reftop ibias disable.</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>L1_PWRGATE</name>
              <description>L1 power gate control. Used as software override.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>L2_PWRGATE</name>
              <description>L2 power gate control. Used as software override.</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CPU_PWRGATE</name>
              <description>CPU power gate control. Used as software override.Test purpose only</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DISPLAY_PWRGATE</name>
              <description>Display logic power gate control. Used as software override.</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RCOSC_CG_OVERRIDE</name>
              <description>For debug purposes only</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>XTALOSC_PWRUP_DELAY</name>
              <description>Specifies the time delay between when the 24MHz xtal is powered up until it is stable and ready to use</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>XTALOSC_PWRUP_DELAY_0</name>
                  <description>0.25ms</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>XTALOSC_PWRUP_DELAY_1</name>
                  <description>0.5ms</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>XTALOSC_PWRUP_DELAY_2</name>
                  <description>1ms</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>XTALOSC_PWRUP_DELAY_3</name>
                  <description>2ms</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>XTALOSC_PWRUP_STAT</name>
              <description>Status of the 24MHz xtal oscillator. Not related to PMU.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>XTALOSC_PWRUP_STAT_0</name>
                  <description>Not stable</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>XTALOSC_PWRUP_STAT_1</name>
                  <description>Stable and ready to use</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>MIX_PWRGATE</name>
              <description>Display power gate control. Used as software mask. Set to zero to force ungated.</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
      </registers>
    </peripheral>
    <peripheral>
      <name>TEMPMON</name>
      <description>Temperature Monitor</description>
      <groupName>TEMPMON</groupName>
      <prependToName>TEMPMON_</prependToName>
      <baseAddress>0x20C8180</baseAddress>
      <addressBlock>
        <offset>0</offset>
        <size>0x120</size>
        <usage>registers</usage>
      </addressBlock>
      <interrupt>
        <name>TEMPMON</name>
        <value>81</value>
      </interrupt>
      <registers>
        <register>
          <name>TEMPSENSE0</name>
          <description>Tempsensor Control Register 0</description>
          <addressOffset>0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x1</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>POWER_DOWN</name>
              <description>This bit powers down the temperature sensor.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>POWER_UP</name>
                  <description>Enable power to the temperature sensor.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>POWER_DOWN</name>
                  <description>Power down the temperature sensor.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>MEASURE_TEMP</name>
              <description>Starts the measurement process</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>STOP</name>
                  <description>Do not start the measurement process.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>START</name>
                  <description>Start the measurement process.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>FINISHED</name>
              <description>Indicates that the latest temp is valid</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>INVALID</name>
                  <description>Last measurement is not ready yet.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>VALID</name>
                  <description>Last measurement is valid.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TEMP_CNT</name>
              <description>This bit field contains the last measured temperature count.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>12</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>ALARM_VALUE</name>
              <description>This bit field contains the temperature count (raw sensor output) that will generate an alarm interrupt</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>12</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>TEMPSENSE0_SET</name>
          <description>Tempsensor Control Register 0</description>
          <addressOffset>0x4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x1</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>POWER_DOWN</name>
              <description>This bit powers down the temperature sensor.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>POWER_UP</name>
                  <description>Enable power to the temperature sensor.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>POWER_DOWN</name>
                  <description>Power down the temperature sensor.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>MEASURE_TEMP</name>
              <description>Starts the measurement process</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>STOP</name>
                  <description>Do not start the measurement process.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>START</name>
                  <description>Start the measurement process.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>FINISHED</name>
              <description>Indicates that the latest temp is valid</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>INVALID</name>
                  <description>Last measurement is not ready yet.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>VALID</name>
                  <description>Last measurement is valid.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TEMP_CNT</name>
              <description>This bit field contains the last measured temperature count.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>12</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>ALARM_VALUE</name>
              <description>This bit field contains the temperature count (raw sensor output) that will generate an alarm interrupt</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>12</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>TEMPSENSE0_CLR</name>
          <description>Tempsensor Control Register 0</description>
          <addressOffset>0x8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x1</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>POWER_DOWN</name>
              <description>This bit powers down the temperature sensor.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>POWER_UP</name>
                  <description>Enable power to the temperature sensor.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>POWER_DOWN</name>
                  <description>Power down the temperature sensor.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>MEASURE_TEMP</name>
              <description>Starts the measurement process</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>STOP</name>
                  <description>Do not start the measurement process.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>START</name>
                  <description>Start the measurement process.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>FINISHED</name>
              <description>Indicates that the latest temp is valid</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>INVALID</name>
                  <description>Last measurement is not ready yet.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>VALID</name>
                  <description>Last measurement is valid.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TEMP_CNT</name>
              <description>This bit field contains the last measured temperature count.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>12</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>ALARM_VALUE</name>
              <description>This bit field contains the temperature count (raw sensor output) that will generate an alarm interrupt</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>12</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>TEMPSENSE0_TOG</name>
          <description>Tempsensor Control Register 0</description>
          <addressOffset>0xC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x1</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>POWER_DOWN</name>
              <description>This bit powers down the temperature sensor.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>POWER_UP</name>
                  <description>Enable power to the temperature sensor.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>POWER_DOWN</name>
                  <description>Power down the temperature sensor.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>MEASURE_TEMP</name>
              <description>Starts the measurement process</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>STOP</name>
                  <description>Do not start the measurement process.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>START</name>
                  <description>Start the measurement process.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>FINISHED</name>
              <description>Indicates that the latest temp is valid</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>INVALID</name>
                  <description>Last measurement is not ready yet.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>VALID</name>
                  <description>Last measurement is valid.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TEMP_CNT</name>
              <description>This bit field contains the last measured temperature count.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>12</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>ALARM_VALUE</name>
              <description>This bit field contains the temperature count (raw sensor output) that will generate an alarm interrupt</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>12</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>TEMPSENSE1</name>
          <description>Tempsensor Control Register 1</description>
          <addressOffset>0x10</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x1</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MEASURE_FREQ</name>
              <description>This bits determines how many RTC clocks to wait before automatically repeating a temperature measurement</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>TEMPSENSE1_SET</name>
          <description>Tempsensor Control Register 1</description>
          <addressOffset>0x14</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x1</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MEASURE_FREQ</name>
              <description>This bits determines how many RTC clocks to wait before automatically repeating a temperature measurement</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>TEMPSENSE1_CLR</name>
          <description>Tempsensor Control Register 1</description>
          <addressOffset>0x18</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x1</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MEASURE_FREQ</name>
              <description>This bits determines how many RTC clocks to wait before automatically repeating a temperature measurement</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>TEMPSENSE1_TOG</name>
          <description>Tempsensor Control Register 1</description>
          <addressOffset>0x1C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x1</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MEASURE_FREQ</name>
              <description>This bits determines how many RTC clocks to wait before automatically repeating a temperature measurement</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>TEMPSENSE2</name>
          <description>Tempsensor Control Register 2</description>
          <addressOffset>0x110</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>LOW_ALARM_VALUE</name>
              <description>This bit field contains the temperature that will generate a low alarm interrupt when the field is greater than the temperature measurement</description>
              <bitOffset>0</bitOffset>
              <bitWidth>12</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PANIC_ALARM_VALUE</name>
              <description>This bit field contains the temperature that will generate a panic interrupt when exceeded by the temperature measurement</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>12</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>TEMPSENSE2_SET</name>
          <description>Tempsensor Control Register 2</description>
          <addressOffset>0x114</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>LOW_ALARM_VALUE</name>
              <description>This bit field contains the temperature that will generate a low alarm interrupt when the field is greater than the temperature measurement</description>
              <bitOffset>0</bitOffset>
              <bitWidth>12</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PANIC_ALARM_VALUE</name>
              <description>This bit field contains the temperature that will generate a panic interrupt when exceeded by the temperature measurement</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>12</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>TEMPSENSE2_CLR</name>
          <description>Tempsensor Control Register 2</description>
          <addressOffset>0x118</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>LOW_ALARM_VALUE</name>
              <description>This bit field contains the temperature that will generate a low alarm interrupt when the field is greater than the temperature measurement</description>
              <bitOffset>0</bitOffset>
              <bitWidth>12</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PANIC_ALARM_VALUE</name>
              <description>This bit field contains the temperature that will generate a panic interrupt when exceeded by the temperature measurement</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>12</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>TEMPSENSE2_TOG</name>
          <description>Tempsensor Control Register 2</description>
          <addressOffset>0x11C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>LOW_ALARM_VALUE</name>
              <description>This bit field contains the temperature that will generate a low alarm interrupt when the field is greater than the temperature measurement</description>
              <bitOffset>0</bitOffset>
              <bitWidth>12</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PANIC_ALARM_VALUE</name>
              <description>This bit field contains the temperature that will generate a panic interrupt when exceeded by the temperature measurement</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>12</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
      </registers>
    </peripheral>
    <peripheral>
      <name>USB_ANALOG</name>
      <description>USB Analog</description>
      <groupName>USB_ANALOG</groupName>
      <prependToName>USB_ANALOG_</prependToName>
      <baseAddress>0x20C81A0</baseAddress>
      <addressBlock>
        <offset>0</offset>
        <size>0xC4</size>
        <usage>registers</usage>
      </addressBlock>
      <registers>
        <register>
          <name>USB1_VBUS_DETECT</name>
          <description>USB VBUS Detect Register</description>
          <addressOffset>0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x100004</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>VBUSVALID_THRESH</name>
              <description>Set the threshold for the VBUSVALID comparator</description>
              <bitOffset>0</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>4V0</name>
                  <description>4.0V</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>4V1</name>
                  <description>4.1V</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>4V2</name>
                  <description>4.2V</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>4V3</name>
                  <description>4.3V</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>4V4</name>
                  <description>4.4V (default)</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>4V5</name>
                  <description>4.5V</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>4V6</name>
                  <description>4.6V</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>4V7</name>
                  <description>4.7V</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>VBUSVALID_PWRUP_CMPS</name>
              <description>Powers up comparators for vbus_valid detector.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DISCHARGE_VBUS</name>
              <description>USB OTG discharge VBUS.</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CHARGE_VBUS</name>
              <description>USB OTG charge VBUS.</description>
              <bitOffset>0x1B</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>USB1_VBUS_DETECT_SET</name>
          <description>USB VBUS Detect Register</description>
          <addressOffset>0x4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x100004</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>VBUSVALID_THRESH</name>
              <description>Set the threshold for the VBUSVALID comparator</description>
              <bitOffset>0</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>4V0</name>
                  <description>4.0V</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>4V1</name>
                  <description>4.1V</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>4V2</name>
                  <description>4.2V</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>4V3</name>
                  <description>4.3V</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>4V4</name>
                  <description>4.4V (default)</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>4V5</name>
                  <description>4.5V</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>4V6</name>
                  <description>4.6V</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>4V7</name>
                  <description>4.7V</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>VBUSVALID_PWRUP_CMPS</name>
              <description>Powers up comparators for vbus_valid detector.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DISCHARGE_VBUS</name>
              <description>USB OTG discharge VBUS.</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CHARGE_VBUS</name>
              <description>USB OTG charge VBUS.</description>
              <bitOffset>0x1B</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>USB1_VBUS_DETECT_CLR</name>
          <description>USB VBUS Detect Register</description>
          <addressOffset>0x8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x100004</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>VBUSVALID_THRESH</name>
              <description>Set the threshold for the VBUSVALID comparator</description>
              <bitOffset>0</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>4V0</name>
                  <description>4.0V</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>4V1</name>
                  <description>4.1V</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>4V2</name>
                  <description>4.2V</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>4V3</name>
                  <description>4.3V</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>4V4</name>
                  <description>4.4V (default)</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>4V5</name>
                  <description>4.5V</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>4V6</name>
                  <description>4.6V</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>4V7</name>
                  <description>4.7V</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>VBUSVALID_PWRUP_CMPS</name>
              <description>Powers up comparators for vbus_valid detector.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DISCHARGE_VBUS</name>
              <description>USB OTG discharge VBUS.</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CHARGE_VBUS</name>
              <description>USB OTG charge VBUS.</description>
              <bitOffset>0x1B</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>USB1_VBUS_DETECT_TOG</name>
          <description>USB VBUS Detect Register</description>
          <addressOffset>0xC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x100004</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>VBUSVALID_THRESH</name>
              <description>Set the threshold for the VBUSVALID comparator</description>
              <bitOffset>0</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>4V0</name>
                  <description>4.0V</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>4V1</name>
                  <description>4.1V</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>4V2</name>
                  <description>4.2V</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>4V3</name>
                  <description>4.3V</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>4V4</name>
                  <description>4.4V (default)</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>4V5</name>
                  <description>4.5V</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>4V6</name>
                  <description>4.6V</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>4V7</name>
                  <description>4.7V</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>VBUSVALID_PWRUP_CMPS</name>
              <description>Powers up comparators for vbus_valid detector.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DISCHARGE_VBUS</name>
              <description>USB OTG discharge VBUS.</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CHARGE_VBUS</name>
              <description>USB OTG charge VBUS.</description>
              <bitOffset>0x1B</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>USB1_CHRG_DETECT</name>
          <description>USB Charger Detect Register</description>
          <addressOffset>0x10</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>CHK_CONTACT</name>
              <description>no description available</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NO_CHECK</name>
                  <description>Do not check the contact of USB plug.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CHECK</name>
                  <description>Check whether the USB plug has been in contact with each other</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CHK_CHRG_B</name>
              <description>no description available</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CHECK</name>
                  <description>Check whether a charger (either a dedicated charger or a host charger) is connected to USB port.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NO_CHECK</name>
                  <description>Do not check whether a charger is connected to the USB port.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>EN_B</name>
              <description>Control the charger detector.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ENABLE</name>
                  <description>Enable the charger detector.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DISABLE</name>
                  <description>Disable the charger detector.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>USB1_CHRG_DETECT_SET</name>
          <description>USB Charger Detect Register</description>
          <addressOffset>0x14</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>CHK_CONTACT</name>
              <description>no description available</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NO_CHECK</name>
                  <description>Do not check the contact of USB plug.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CHECK</name>
                  <description>Check whether the USB plug has been in contact with each other</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CHK_CHRG_B</name>
              <description>no description available</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CHECK</name>
                  <description>Check whether a charger (either a dedicated charger or a host charger) is connected to USB port.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NO_CHECK</name>
                  <description>Do not check whether a charger is connected to the USB port.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>EN_B</name>
              <description>Control the charger detector.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ENABLE</name>
                  <description>Enable the charger detector.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DISABLE</name>
                  <description>Disable the charger detector.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>USB1_CHRG_DETECT_CLR</name>
          <description>USB Charger Detect Register</description>
          <addressOffset>0x18</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>CHK_CONTACT</name>
              <description>no description available</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NO_CHECK</name>
                  <description>Do not check the contact of USB plug.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CHECK</name>
                  <description>Check whether the USB plug has been in contact with each other</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CHK_CHRG_B</name>
              <description>no description available</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CHECK</name>
                  <description>Check whether a charger (either a dedicated charger or a host charger) is connected to USB port.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NO_CHECK</name>
                  <description>Do not check whether a charger is connected to the USB port.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>EN_B</name>
              <description>Control the charger detector.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ENABLE</name>
                  <description>Enable the charger detector.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DISABLE</name>
                  <description>Disable the charger detector.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>USB1_CHRG_DETECT_TOG</name>
          <description>USB Charger Detect Register</description>
          <addressOffset>0x1C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>CHK_CONTACT</name>
              <description>no description available</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NO_CHECK</name>
                  <description>Do not check the contact of USB plug.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CHECK</name>
                  <description>Check whether the USB plug has been in contact with each other</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CHK_CHRG_B</name>
              <description>no description available</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CHECK</name>
                  <description>Check whether a charger (either a dedicated charger or a host charger) is connected to USB port.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NO_CHECK</name>
                  <description>Do not check whether a charger is connected to the USB port.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>EN_B</name>
              <description>Control the charger detector.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ENABLE</name>
                  <description>Enable the charger detector.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DISABLE</name>
                  <description>Disable the charger detector.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>USB1_VBUS_DETECT_STAT</name>
          <description>USB VBUS Detect Status Register</description>
          <addressOffset>0x20</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SESSEND</name>
              <description>Session End for USB OTG</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>BVALID</name>
              <description>Indicates VBus is valid for a B-peripheral</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>AVALID</name>
              <description>Indicates VBus is valid for a A-peripheral</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>VBUS_VALID</name>
              <description>VBus valid for USB OTG</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>USB1_CHRG_DETECT_STAT</name>
          <description>USB Charger Detect Status Register</description>
          <addressOffset>0x30</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>PLUG_CONTACT</name>
              <description>State of the USB plug contact detector.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NO_CONTACT</name>
                  <description>The USB plug has not made contact.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>GOOD_CONTACT</name>
                  <description>The USB plug has made good contact.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CHRG_DETECTED</name>
              <description>State of charger detection. This bit is a read only version of the state of the analog signal.</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CHARGER_NOT_PRESENT</name>
                  <description>The USB port is not connected to a charger.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CHARGER_PRESENT</name>
                  <description>A charger (either a dedicated charger or a host charger) is connected to the USB port.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DM_STATE</name>
              <description>DM line state output of the charger detector.</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>DP_STATE</name>
              <description>DP line state output of the charger detector.</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>USB1_MISC</name>
          <description>USB Misc Register</description>
          <addressOffset>0x50</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x2</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>HS_USE_EXTERNAL_R</name>
              <description>Use external resistor to generate the current bias for the high speed transmitter</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>EN_DEGLITCH</name>
              <description>Enable the deglitching circuit of the USB PLL output.</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>EN_CLK_UTMI</name>
              <description>Enables the clk to the UTMI block.</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>USB1_MISC_SET</name>
          <description>USB Misc Register</description>
          <addressOffset>0x54</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x2</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>HS_USE_EXTERNAL_R</name>
              <description>Use external resistor to generate the current bias for the high speed transmitter</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>EN_DEGLITCH</name>
              <description>Enable the deglitching circuit of the USB PLL output.</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>EN_CLK_UTMI</name>
              <description>Enables the clk to the UTMI block.</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>USB1_MISC_CLR</name>
          <description>USB Misc Register</description>
          <addressOffset>0x58</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x2</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>HS_USE_EXTERNAL_R</name>
              <description>Use external resistor to generate the current bias for the high speed transmitter</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>EN_DEGLITCH</name>
              <description>Enable the deglitching circuit of the USB PLL output.</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>EN_CLK_UTMI</name>
              <description>Enables the clk to the UTMI block.</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>USB1_MISC_TOG</name>
          <description>USB Misc Register</description>
          <addressOffset>0x5C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x2</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>HS_USE_EXTERNAL_R</name>
              <description>Use external resistor to generate the current bias for the high speed transmitter</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>EN_DEGLITCH</name>
              <description>Enable the deglitching circuit of the USB PLL output.</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>EN_CLK_UTMI</name>
              <description>Enables the clk to the UTMI block.</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>USB2_VBUS_DETECT</name>
          <description>USB VBUS Detect Register</description>
          <addressOffset>0x60</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x100004</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>VBUSVALID_THRESH</name>
              <description>Set the threshold for the VBUSVALID comparator</description>
              <bitOffset>0</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>4V0</name>
                  <description>4.0V</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>4V1</name>
                  <description>4.1V</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>4V2</name>
                  <description>4.2V</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>4V3</name>
                  <description>4.3V</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>4V4</name>
                  <description>4.4V (default)</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>4V5</name>
                  <description>4.5V</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>4V6</name>
                  <description>4.6V</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>4V7</name>
                  <description>4.7V</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>VBUSVALID_PWRUP_CMPS</name>
              <description>Powers up comparators for vbus_valid detector.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DISCHARGE_VBUS</name>
              <description>USB OTG discharge VBUS.</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CHARGE_VBUS</name>
              <description>USB OTG charge VBUS.</description>
              <bitOffset>0x1B</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>USB2_VBUS_DETECT_SET</name>
          <description>USB VBUS Detect Register</description>
          <addressOffset>0x64</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x100004</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>VBUSVALID_THRESH</name>
              <description>Set the threshold for the VBUSVALID comparator</description>
              <bitOffset>0</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>4V0</name>
                  <description>4.0V</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>4V1</name>
                  <description>4.1V</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>4V2</name>
                  <description>4.2V</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>4V3</name>
                  <description>4.3V</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>4V4</name>
                  <description>4.4V (default)</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>4V5</name>
                  <description>4.5V</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>4V6</name>
                  <description>4.6V</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>4V7</name>
                  <description>4.7V</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>VBUSVALID_PWRUP_CMPS</name>
              <description>Powers up comparators for vbus_valid detector.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DISCHARGE_VBUS</name>
              <description>USB OTG discharge VBUS.</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CHARGE_VBUS</name>
              <description>USB OTG charge VBUS.</description>
              <bitOffset>0x1B</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>USB2_VBUS_DETECT_CLR</name>
          <description>USB VBUS Detect Register</description>
          <addressOffset>0x68</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x100004</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>VBUSVALID_THRESH</name>
              <description>Set the threshold for the VBUSVALID comparator</description>
              <bitOffset>0</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>4V0</name>
                  <description>4.0V</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>4V1</name>
                  <description>4.1V</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>4V2</name>
                  <description>4.2V</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>4V3</name>
                  <description>4.3V</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>4V4</name>
                  <description>4.4V (default)</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>4V5</name>
                  <description>4.5V</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>4V6</name>
                  <description>4.6V</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>4V7</name>
                  <description>4.7V</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>VBUSVALID_PWRUP_CMPS</name>
              <description>Powers up comparators for vbus_valid detector.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DISCHARGE_VBUS</name>
              <description>USB OTG discharge VBUS.</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CHARGE_VBUS</name>
              <description>USB OTG charge VBUS.</description>
              <bitOffset>0x1B</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>USB2_VBUS_DETECT_TOG</name>
          <description>USB VBUS Detect Register</description>
          <addressOffset>0x6C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x100004</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>VBUSVALID_THRESH</name>
              <description>Set the threshold for the VBUSVALID comparator</description>
              <bitOffset>0</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>4V0</name>
                  <description>4.0V</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>4V1</name>
                  <description>4.1V</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>4V2</name>
                  <description>4.2V</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>4V3</name>
                  <description>4.3V</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>4V4</name>
                  <description>4.4V (default)</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>4V5</name>
                  <description>4.5V</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>4V6</name>
                  <description>4.6V</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>4V7</name>
                  <description>4.7V</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>VBUSVALID_PWRUP_CMPS</name>
              <description>Powers up comparators for vbus_valid detector.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DISCHARGE_VBUS</name>
              <description>USB OTG discharge VBUS.</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CHARGE_VBUS</name>
              <description>USB OTG charge VBUS.</description>
              <bitOffset>0x1B</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>USB2_CHRG_DETECT</name>
          <description>USB Charger Detect Register</description>
          <addressOffset>0x70</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>CHK_CONTACT</name>
              <description>no description available</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NO_CHECK</name>
                  <description>Do not check the contact of USB plug.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CHECK</name>
                  <description>Check whether the USB plug has been in contact with each other</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CHK_CHRG_B</name>
              <description>no description available</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CHECK</name>
                  <description>Check whether a charger (either a dedicated charger or a host charger) is connected to USB port.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NO_CHECK</name>
                  <description>Do not check whether a charger is connected to the USB port.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>EN_B</name>
              <description>Control the charger detector.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ENABLE</name>
                  <description>Enable the charger detector.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DISABLE</name>
                  <description>Disable the charger detector.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>USB2_CHRG_DETECT_SET</name>
          <description>USB Charger Detect Register</description>
          <addressOffset>0x74</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>CHK_CONTACT</name>
              <description>no description available</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NO_CHECK</name>
                  <description>Do not check the contact of USB plug.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CHECK</name>
                  <description>Check whether the USB plug has been in contact with each other</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CHK_CHRG_B</name>
              <description>no description available</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CHECK</name>
                  <description>Check whether a charger (either a dedicated charger or a host charger) is connected to USB port.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NO_CHECK</name>
                  <description>Do not check whether a charger is connected to the USB port.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>EN_B</name>
              <description>Control the charger detector.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ENABLE</name>
                  <description>Enable the charger detector.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DISABLE</name>
                  <description>Disable the charger detector.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>USB2_CHRG_DETECT_CLR</name>
          <description>USB Charger Detect Register</description>
          <addressOffset>0x78</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>CHK_CONTACT</name>
              <description>no description available</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NO_CHECK</name>
                  <description>Do not check the contact of USB plug.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CHECK</name>
                  <description>Check whether the USB plug has been in contact with each other</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CHK_CHRG_B</name>
              <description>no description available</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CHECK</name>
                  <description>Check whether a charger (either a dedicated charger or a host charger) is connected to USB port.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NO_CHECK</name>
                  <description>Do not check whether a charger is connected to the USB port.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>EN_B</name>
              <description>Control the charger detector.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ENABLE</name>
                  <description>Enable the charger detector.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DISABLE</name>
                  <description>Disable the charger detector.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>USB2_CHRG_DETECT_TOG</name>
          <description>USB Charger Detect Register</description>
          <addressOffset>0x7C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>CHK_CONTACT</name>
              <description>no description available</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NO_CHECK</name>
                  <description>Do not check the contact of USB plug.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CHECK</name>
                  <description>Check whether the USB plug has been in contact with each other</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CHK_CHRG_B</name>
              <description>no description available</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CHECK</name>
                  <description>Check whether a charger (either a dedicated charger or a host charger) is connected to USB port.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NO_CHECK</name>
                  <description>Do not check whether a charger is connected to the USB port.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>EN_B</name>
              <description>Control the charger detector.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ENABLE</name>
                  <description>Enable the charger detector.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DISABLE</name>
                  <description>Disable the charger detector.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>USB2_VBUS_DETECT_STAT</name>
          <description>USB VBUS Detect Status Register</description>
          <addressOffset>0x80</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SESSEND</name>
              <description>Session End for USB OTG</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>BVALID</name>
              <description>Indicates VBus is valid for a B-peripheral</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>AVALID</name>
              <description>Indicates VBus is valid for a A-peripheral</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>VBUS_VALID</name>
              <description>VBus valid for USB OTG</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>USB2_CHRG_DETECT_STAT</name>
          <description>USB Charger Detect Status Register</description>
          <addressOffset>0x90</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>PLUG_CONTACT</name>
              <description>State of the USB plug contact detector.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NO_CONTACT</name>
                  <description>The USB plug has not made contact.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>GOOD_CONTACT</name>
                  <description>The USB plug has made good contact.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CHRG_DETECTED</name>
              <description>State of charger detection. This bit is a read only version of the state of the analog signal.</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CHARGER_NOT_PRESENT</name>
                  <description>The USB port is not connected to a charger.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CHARGER_PRESENT</name>
                  <description>A charger (either a dedicated charger or a host charger) is connected to the USB port.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DM_STATE</name>
              <description>DM line state output of the charger detector.</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>DP_STATE</name>
              <description>DP line state output of the charger detector.</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>USB2_MISC</name>
          <description>USB Misc Register</description>
          <addressOffset>0xB0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x2</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>HS_USE_EXTERNAL_R</name>
              <description>Use external resistor to generate the current bias for the high speed transmitter</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>EN_DEGLITCH</name>
              <description>Enable the deglitching circuit of the USB PLL output.</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>EN_CLK_UTMI</name>
              <description>Enables the clk to the UTMI block.</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>USB2_MISC_SET</name>
          <description>USB Misc Register</description>
          <addressOffset>0xB4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x2</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>HS_USE_EXTERNAL_R</name>
              <description>Use external resistor to generate the current bias for the high speed transmitter</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>EN_DEGLITCH</name>
              <description>Enable the deglitching circuit of the USB PLL output.</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>EN_CLK_UTMI</name>
              <description>Enables the clk to the UTMI block.</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>USB2_MISC_CLR</name>
          <description>USB Misc Register</description>
          <addressOffset>0xB8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x2</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>HS_USE_EXTERNAL_R</name>
              <description>Use external resistor to generate the current bias for the high speed transmitter</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>EN_DEGLITCH</name>
              <description>Enable the deglitching circuit of the USB PLL output.</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>EN_CLK_UTMI</name>
              <description>Enables the clk to the UTMI block.</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>USB2_MISC_TOG</name>
          <description>USB Misc Register</description>
          <addressOffset>0xBC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x2</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>HS_USE_EXTERNAL_R</name>
              <description>Use external resistor to generate the current bias for the high speed transmitter</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>EN_DEGLITCH</name>
              <description>Enable the deglitching circuit of the USB PLL output.</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>EN_CLK_UTMI</name>
              <description>Enables the clk to the UTMI block.</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>DIGPROG</name>
          <description>Chip Silicon Version</description>
          <addressOffset>0xC0</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0x640000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MINOR</name>
              <description>MINOR lower byte - Read-only value representing a minor silicon revision.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>MINOR_0</name>
                  <description>silicon revision x.0</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MINOR_1</name>
                  <description>silicon revision x.1</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MINOR_2</name>
                  <description>silicon revision x.2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MINOR_3</name>
                  <description>silicon revision x.3</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>MAJOR_LOWER</name>
              <description>MAJOR lower byte - Read-only value representing a major silicon revision.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>MAJOR_LOWER_0</name>
                  <description>silicon revision 1.x</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MAJOR_LOWER_1</name>
                  <description>silicon revision 2.x</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>MAJOR_UPPER</name>
              <description>MAJOR upper byte-Read-only value representing the chip type.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>MAJOR_UPPER_101</name>
                  <description>i.MX 6ULL</description>
                  <value>0x65</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
      </registers>
    </peripheral>
    <peripheral>
      <name>XTALOSC24M</name>
      <description>XTALOSC24M</description>
      <groupName>XTALOSC24M</groupName>
      <prependToName>XTALOSC24M_</prependToName>
      <baseAddress>0x20C82A0</baseAddress>
      <addressBlock>
        <offset>0</offset>
        <size>0x30</size>
        <usage>registers</usage>
      </addressBlock>
      <registers>
        <register>
          <name>OSC_CONFIG0</name>
          <description>XTAL OSC Configuration 0 Register</description>
          <addressOffset>0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x1020</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>START</name>
              <description>Start/stop bit for the RC tuning calculation logic. If stopped the tuning logic is reset.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENABLE</name>
              <description>Enables the tuning logic to calculate new RC tuning values</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYPASS</name>
              <description>Bypasses any calculated RC tuning value and uses the programmed register value.</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>INVERT</name>
              <description>Invert the stepping of the calculated RC tuning value.</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RC_OSC_PROG</name>
              <description>RC osc. tuning values.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>HYST_PLUS</name>
              <description>Positive hysteresis value</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>HYST_MINUS</name>
              <description>Negative hysteresis value</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RC_OSC_PROG_CUR</name>
              <description>The current tuning value in use.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>OSC_CONFIG0_SET</name>
          <description>XTAL OSC Configuration 0 Register</description>
          <addressOffset>0x4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x1020</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>START</name>
              <description>Start/stop bit for the RC tuning calculation logic. If stopped the tuning logic is reset.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENABLE</name>
              <description>Enables the tuning logic to calculate new RC tuning values</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYPASS</name>
              <description>Bypasses any calculated RC tuning value and uses the programmed register value.</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>INVERT</name>
              <description>Invert the stepping of the calculated RC tuning value.</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RC_OSC_PROG</name>
              <description>RC osc. tuning values.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>HYST_PLUS</name>
              <description>Positive hysteresis value</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>HYST_MINUS</name>
              <description>Negative hysteresis value</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RC_OSC_PROG_CUR</name>
              <description>The current tuning value in use.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>OSC_CONFIG0_CLR</name>
          <description>XTAL OSC Configuration 0 Register</description>
          <addressOffset>0x8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x1020</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>START</name>
              <description>Start/stop bit for the RC tuning calculation logic. If stopped the tuning logic is reset.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENABLE</name>
              <description>Enables the tuning logic to calculate new RC tuning values</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYPASS</name>
              <description>Bypasses any calculated RC tuning value and uses the programmed register value.</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>INVERT</name>
              <description>Invert the stepping of the calculated RC tuning value.</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RC_OSC_PROG</name>
              <description>RC osc. tuning values.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>HYST_PLUS</name>
              <description>Positive hysteresis value</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>HYST_MINUS</name>
              <description>Negative hysteresis value</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RC_OSC_PROG_CUR</name>
              <description>The current tuning value in use.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>OSC_CONFIG0_TOG</name>
          <description>XTAL OSC Configuration 0 Register</description>
          <addressOffset>0xC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x1020</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>START</name>
              <description>Start/stop bit for the RC tuning calculation logic. If stopped the tuning logic is reset.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENABLE</name>
              <description>Enables the tuning logic to calculate new RC tuning values</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYPASS</name>
              <description>Bypasses any calculated RC tuning value and uses the programmed register value.</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>INVERT</name>
              <description>Invert the stepping of the calculated RC tuning value.</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RC_OSC_PROG</name>
              <description>RC osc. tuning values.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>HYST_PLUS</name>
              <description>Positive hysteresis value</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>HYST_MINUS</name>
              <description>Negative hysteresis value</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RC_OSC_PROG_CUR</name>
              <description>The current tuning value in use.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>OSC_CONFIG1</name>
          <description>XTAL OSC Configuration 1 Register</description>
          <addressOffset>0x10</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x2EE</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>COUNT_RC_TRG</name>
              <description>The target count used to tune the RC OSC frequency</description>
              <bitOffset>0</bitOffset>
              <bitWidth>12</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>COUNT_RC_CUR</name>
              <description>The current tuning value in use.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>12</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>OSC_CONFIG1_SET</name>
          <description>XTAL OSC Configuration 1 Register</description>
          <addressOffset>0x14</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x2EE</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>COUNT_RC_TRG</name>
              <description>The target count used to tune the RC OSC frequency</description>
              <bitOffset>0</bitOffset>
              <bitWidth>12</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>COUNT_RC_CUR</name>
              <description>The current tuning value in use.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>12</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>OSC_CONFIG1_CLR</name>
          <description>XTAL OSC Configuration 1 Register</description>
          <addressOffset>0x18</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x2EE</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>COUNT_RC_TRG</name>
              <description>The target count used to tune the RC OSC frequency</description>
              <bitOffset>0</bitOffset>
              <bitWidth>12</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>COUNT_RC_CUR</name>
              <description>The current tuning value in use.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>12</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>OSC_CONFIG1_TOG</name>
          <description>XTAL OSC Configuration 1 Register</description>
          <addressOffset>0x1C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x2EE</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>COUNT_RC_TRG</name>
              <description>The target count used to tune the RC OSC frequency</description>
              <bitOffset>0</bitOffset>
              <bitWidth>12</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>COUNT_RC_CUR</name>
              <description>The current tuning value in use.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>12</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>OSC_CONFIG2</name>
          <description>XTAL OSC Configuration 2 Register</description>
          <addressOffset>0x20</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x102E2</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>COUNT_1M_TRG</name>
              <description>The target count used to tune the RC OSC frequency</description>
              <bitOffset>0</bitOffset>
              <bitWidth>12</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENABLE_1M</name>
              <description>Enable the 1MHz clock output. 0 - disabled; 1 - enabled.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>MUX_1M</name>
              <description>Mux the corrected or uncorrected 1MHz clock to the output.</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CLK_1M_ERR_FL</name>
              <description>Flag indicates that the count_1m count wasn't reached within 1 32KHz period</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>OSC_CONFIG2_SET</name>
          <description>XTAL OSC Configuration 2 Register</description>
          <addressOffset>0x24</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x102E2</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>COUNT_1M_TRG</name>
              <description>The target count used to tune the RC OSC frequency</description>
              <bitOffset>0</bitOffset>
              <bitWidth>12</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENABLE_1M</name>
              <description>Enable the 1MHz clock output. 0 - disabled; 1 - enabled.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>MUX_1M</name>
              <description>Mux the corrected or uncorrected 1MHz clock to the output.</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CLK_1M_ERR_FL</name>
              <description>Flag indicates that the count_1m count wasn't reached within 1 32KHz period</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>OSC_CONFIG2_CLR</name>
          <description>XTAL OSC Configuration 2 Register</description>
          <addressOffset>0x28</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x102E2</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>COUNT_1M_TRG</name>
              <description>The target count used to tune the RC OSC frequency</description>
              <bitOffset>0</bitOffset>
              <bitWidth>12</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENABLE_1M</name>
              <description>Enable the 1MHz clock output. 0 - disabled; 1 - enabled.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>MUX_1M</name>
              <description>Mux the corrected or uncorrected 1MHz clock to the output.</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CLK_1M_ERR_FL</name>
              <description>Flag indicates that the count_1m count wasn't reached within 1 32KHz period</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>OSC_CONFIG2_TOG</name>
          <description>XTAL OSC Configuration 2 Register</description>
          <addressOffset>0x2C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x102E2</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>COUNT_1M_TRG</name>
              <description>The target count used to tune the RC OSC frequency</description>
              <bitOffset>0</bitOffset>
              <bitWidth>12</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENABLE_1M</name>
              <description>Enable the 1MHz clock output. 0 - disabled; 1 - enabled.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>MUX_1M</name>
              <description>Mux the corrected or uncorrected 1MHz clock to the output.</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CLK_1M_ERR_FL</name>
              <description>Flag indicates that the count_1m count wasn't reached within 1 32KHz period</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
      </registers>
    </peripheral>
    <peripheral>
      <name>USBPHY1</name>
      <description>USBPHY Register Reference Index</description>
      <groupName>USBPHY</groupName>
      <prependToName>USBPHY1_</prependToName>
      <baseAddress>0x20C9000</baseAddress>
      <headerStructName>USBPHY</headerStructName>
      <addressBlock>
        <offset>0</offset>
        <size>0x84</size>
        <usage>registers</usage>
      </addressBlock>
      <interrupt>
        <name>USB_PHY1</name>
        <value>76</value>
      </interrupt>
      <registers>
        <register>
          <name>PWD</name>
          <description>USB PHY Power-Down Register</description>
          <addressOffset>0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x1E1C00</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RSVD0</name>
              <description>Reserved.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>10</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>TXPWDFS</name>
              <description>0 = Normal operation</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TXPWDIBIAS</name>
              <description>0 = Normal operation</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TXPWDV2I</name>
              <description>0 = Normal operation</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved.</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>RXPWDENV</name>
              <description>0 = Normal operation</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RXPWD1PT1</name>
              <description>0 = Normal operation</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RXPWDDIFF</name>
              <description>0 = Normal operation</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RXPWDRX</name>
              <description>0 = Normal operation</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD2</name>
              <description>Reserved.</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>11</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>PWD_SET</name>
          <description>USB PHY Power-Down Register</description>
          <addressOffset>0x4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x1E1C00</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RSVD0</name>
              <description>Reserved.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>10</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>TXPWDFS</name>
              <description>0 = Normal operation</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TXPWDIBIAS</name>
              <description>0 = Normal operation</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TXPWDV2I</name>
              <description>0 = Normal operation</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved.</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>RXPWDENV</name>
              <description>0 = Normal operation</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RXPWD1PT1</name>
              <description>0 = Normal operation</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RXPWDDIFF</name>
              <description>0 = Normal operation</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RXPWDRX</name>
              <description>0 = Normal operation</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD2</name>
              <description>Reserved.</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>11</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>PWD_CLR</name>
          <description>USB PHY Power-Down Register</description>
          <addressOffset>0x8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x1E1C00</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RSVD0</name>
              <description>Reserved.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>10</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>TXPWDFS</name>
              <description>0 = Normal operation</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TXPWDIBIAS</name>
              <description>0 = Normal operation</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TXPWDV2I</name>
              <description>0 = Normal operation</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved.</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>RXPWDENV</name>
              <description>0 = Normal operation</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RXPWD1PT1</name>
              <description>0 = Normal operation</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RXPWDDIFF</name>
              <description>0 = Normal operation</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RXPWDRX</name>
              <description>0 = Normal operation</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD2</name>
              <description>Reserved.</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>11</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>PWD_TOG</name>
          <description>USB PHY Power-Down Register</description>
          <addressOffset>0xC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x1E1C00</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RSVD0</name>
              <description>Reserved.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>10</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>TXPWDFS</name>
              <description>0 = Normal operation</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TXPWDIBIAS</name>
              <description>0 = Normal operation</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TXPWDV2I</name>
              <description>0 = Normal operation</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved.</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>RXPWDENV</name>
              <description>0 = Normal operation</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RXPWD1PT1</name>
              <description>0 = Normal operation</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RXPWDDIFF</name>
              <description>0 = Normal operation</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RXPWDRX</name>
              <description>0 = Normal operation</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD2</name>
              <description>Reserved.</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>11</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>TX</name>
          <description>USB PHY Transmitter Control Register</description>
          <addressOffset>0x10</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10060607</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>D_CAL</name>
              <description>Resistor Trimming Code: 0000 = 0.16% 0111 = Nominal 1111 = +25%</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved. Note: This bit should remain clear.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TXCAL45DN</name>
              <description>Decode to select a 45-Ohm resistance to the USB_DN output pin</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved. Note: This bit should remain clear.</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TXCAL45DP</name>
              <description>Decode to select a 45-Ohm resistance to the USB_DP output pin</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD2</name>
              <description>Reserved.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>USBPHY_TX_EDGECTRL</name>
              <description>Controls the edge-rate of the current sensing transistors used in HS transmit</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD5</name>
              <description>Reserved.</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>TX_SET</name>
          <description>USB PHY Transmitter Control Register</description>
          <addressOffset>0x14</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10060607</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>D_CAL</name>
              <description>Resistor Trimming Code: 0000 = 0.16% 0111 = Nominal 1111 = +25%</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved. Note: This bit should remain clear.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TXCAL45DN</name>
              <description>Decode to select a 45-Ohm resistance to the USB_DN output pin</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved. Note: This bit should remain clear.</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TXCAL45DP</name>
              <description>Decode to select a 45-Ohm resistance to the USB_DP output pin</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD2</name>
              <description>Reserved.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>USBPHY_TX_EDGECTRL</name>
              <description>Controls the edge-rate of the current sensing transistors used in HS transmit</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD5</name>
              <description>Reserved.</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>TX_CLR</name>
          <description>USB PHY Transmitter Control Register</description>
          <addressOffset>0x18</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10060607</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>D_CAL</name>
              <description>Resistor Trimming Code: 0000 = 0.16% 0111 = Nominal 1111 = +25%</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved. Note: This bit should remain clear.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TXCAL45DN</name>
              <description>Decode to select a 45-Ohm resistance to the USB_DN output pin</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved. Note: This bit should remain clear.</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TXCAL45DP</name>
              <description>Decode to select a 45-Ohm resistance to the USB_DP output pin</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD2</name>
              <description>Reserved.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>USBPHY_TX_EDGECTRL</name>
              <description>Controls the edge-rate of the current sensing transistors used in HS transmit</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD5</name>
              <description>Reserved.</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>TX_TOG</name>
          <description>USB PHY Transmitter Control Register</description>
          <addressOffset>0x1C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10060607</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>D_CAL</name>
              <description>Resistor Trimming Code: 0000 = 0.16% 0111 = Nominal 1111 = +25%</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved. Note: This bit should remain clear.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TXCAL45DN</name>
              <description>Decode to select a 45-Ohm resistance to the USB_DN output pin</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved. Note: This bit should remain clear.</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TXCAL45DP</name>
              <description>Decode to select a 45-Ohm resistance to the USB_DP output pin</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD2</name>
              <description>Reserved.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>USBPHY_TX_EDGECTRL</name>
              <description>Controls the edge-rate of the current sensing transistors used in HS transmit</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD5</name>
              <description>Reserved.</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>RX</name>
          <description>USB PHY Receiver Control Register</description>
          <addressOffset>0x20</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ENVADJ</name>
              <description>The ENVADJ field adjusts the trip point for the envelope detector</description>
              <bitOffset>0</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved.</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>DISCONADJ</name>
              <description>The DISCONADJ field adjusts the trip point for the disconnect detector: 000 = Trip-Level Voltage is 0</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved.</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>15</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>RXDBYPASS</name>
              <description>0 = Normal operation</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD2</name>
              <description>Reserved.</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>9</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>RX_SET</name>
          <description>USB PHY Receiver Control Register</description>
          <addressOffset>0x24</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ENVADJ</name>
              <description>The ENVADJ field adjusts the trip point for the envelope detector</description>
              <bitOffset>0</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved.</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>DISCONADJ</name>
              <description>The DISCONADJ field adjusts the trip point for the disconnect detector: 000 = Trip-Level Voltage is 0</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved.</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>15</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>RXDBYPASS</name>
              <description>0 = Normal operation</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD2</name>
              <description>Reserved.</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>9</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>RX_CLR</name>
          <description>USB PHY Receiver Control Register</description>
          <addressOffset>0x28</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ENVADJ</name>
              <description>The ENVADJ field adjusts the trip point for the envelope detector</description>
              <bitOffset>0</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved.</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>DISCONADJ</name>
              <description>The DISCONADJ field adjusts the trip point for the disconnect detector: 000 = Trip-Level Voltage is 0</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved.</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>15</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>RXDBYPASS</name>
              <description>0 = Normal operation</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD2</name>
              <description>Reserved.</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>9</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>RX_TOG</name>
          <description>USB PHY Receiver Control Register</description>
          <addressOffset>0x2C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ENVADJ</name>
              <description>The ENVADJ field adjusts the trip point for the envelope detector</description>
              <bitOffset>0</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved.</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>DISCONADJ</name>
              <description>The DISCONADJ field adjusts the trip point for the disconnect detector: 000 = Trip-Level Voltage is 0</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved.</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>15</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>RXDBYPASS</name>
              <description>0 = Normal operation</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD2</name>
              <description>Reserved.</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>9</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CTRL</name>
          <description>USB PHY General Control Register</description>
          <addressOffset>0x30</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0xC0200000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ENOTG_ID_CHG_IRQ</name>
              <description>Enable OTG_ID_CHG_IRQ.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENHOSTDISCONDETECT</name>
              <description>For host mode, enables high-speed disconnect detector</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENIRQHOSTDISCON</name>
              <description>Enables interrupt for detection of disconnection to Device when in high-speed host mode</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>HOSTDISCONDETECT_IRQ</name>
              <description>Indicates that the device has disconnected in high-speed mode</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENDEVPLUGINDETECT</name>
              <description>For device mode, enables 200-KOhm pullups for detecting connectivity to the host.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DEVPLUGIN_POLARITY</name>
              <description>For device mode, if this bit is cleared to 0, then it trips the interrupt if the device is plugged in</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>OTG_ID_CHG_IRQ</name>
              <description>OTG ID change interrupt. Indicates the value of ID pin changed.</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENOTGIDDETECT</name>
              <description>Enables circuit to detect resistance of MiniAB ID pin.</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RESUMEIRQSTICKY</name>
              <description>Set to 1 will make RESUME_IRQ bit a sticky bit until software clear it</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENIRQRESUMEDETECT</name>
              <description>Enables interrupt for detection of a non-J state on the USB line</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RESUME_IRQ</name>
              <description>Indicates that the host is sending a wake-up after suspend</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENIRQDEVPLUGIN</name>
              <description>Enables interrupt for the detection of connectivity to the USB line.</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DEVPLUGIN_IRQ</name>
              <description>Indicates that the device is connected</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_ON_LRADC</name>
              <description>Enables the LRADC to monitor USB_DP and USB_DM. This is for use in non-USB modes only.</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENUTMILEVEL2</name>
              <description>Enables UTMI+ Level2. This should be enabled if needs to support LS device</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENUTMILEVEL3</name>
              <description>Enables UTMI+ Level3</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENIRQWAKEUP</name>
              <description>Enables interrupt for the wakeup events.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>WAKEUP_IRQ</name>
              <description>Indicates that there is a wakeup event</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>ENAUTOCLR_CLKGATE</name>
              <description>Enables the feature to auto-clear the CLKGATE bit if there is wakeup event while USB is suspended</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENAUTOCLR_PHY_PWD</name>
              <description>Enables the feature to auto-clear the PWD register bits in USBPHYx_PWD if there is wakeup event while USB is suspended</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENDPDMCHG_WKUP</name>
              <description>Enables the feature to wakeup USB if DP/DM is toggled when USB is suspended</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENIDCHG_WKUP</name>
              <description>Enables the feature to wakeup USB if ID is toggled when USB is suspended.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENVBUSCHG_WKUP</name>
              <description>Enables the feature to wakeup USB if VBUS is toggled when USB is suspended.</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>FSDLL_RST_EN</name>
              <description>Enables the feature to reset the FSDLL lock detection logic at the end of each TX packet.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved.</description>
              <bitOffset>0x19</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>OTG_ID_VALUE</name>
              <description>Almost same as OTGID_STATUS in USBPHYx_STATUS Register</description>
              <bitOffset>0x1B</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>HOST_FORCE_LS_SE0</name>
              <description>Forces the next FS packet that is transmitted to have a EOP with LS timing</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>UTMI_SUSPENDM</name>
              <description>Used by the PHY to indicate a powered-down state</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>CLKGATE</name>
              <description>Gate UTMI Clocks</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SFTRST</name>
              <description>Writing a 1 to this bit will soft-reset the USBPHYx_PWD, USBPHYx_TX, USBPHYx_RX, and USBPHYx_CTRL registers</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CTRL_SET</name>
          <description>USB PHY General Control Register</description>
          <addressOffset>0x34</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0xC0200000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ENOTG_ID_CHG_IRQ</name>
              <description>Enable OTG_ID_CHG_IRQ.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENHOSTDISCONDETECT</name>
              <description>For host mode, enables high-speed disconnect detector</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENIRQHOSTDISCON</name>
              <description>Enables interrupt for detection of disconnection to Device when in high-speed host mode</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>HOSTDISCONDETECT_IRQ</name>
              <description>Indicates that the device has disconnected in high-speed mode</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENDEVPLUGINDETECT</name>
              <description>For device mode, enables 200-KOhm pullups for detecting connectivity to the host.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DEVPLUGIN_POLARITY</name>
              <description>For device mode, if this bit is cleared to 0, then it trips the interrupt if the device is plugged in</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>OTG_ID_CHG_IRQ</name>
              <description>OTG ID change interrupt. Indicates the value of ID pin changed.</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENOTGIDDETECT</name>
              <description>Enables circuit to detect resistance of MiniAB ID pin.</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RESUMEIRQSTICKY</name>
              <description>Set to 1 will make RESUME_IRQ bit a sticky bit until software clear it</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENIRQRESUMEDETECT</name>
              <description>Enables interrupt for detection of a non-J state on the USB line</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RESUME_IRQ</name>
              <description>Indicates that the host is sending a wake-up after suspend</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENIRQDEVPLUGIN</name>
              <description>Enables interrupt for the detection of connectivity to the USB line.</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DEVPLUGIN_IRQ</name>
              <description>Indicates that the device is connected</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_ON_LRADC</name>
              <description>Enables the LRADC to monitor USB_DP and USB_DM. This is for use in non-USB modes only.</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENUTMILEVEL2</name>
              <description>Enables UTMI+ Level2. This should be enabled if needs to support LS device</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENUTMILEVEL3</name>
              <description>Enables UTMI+ Level3</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENIRQWAKEUP</name>
              <description>Enables interrupt for the wakeup events.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>WAKEUP_IRQ</name>
              <description>Indicates that there is a wakeup event</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>ENAUTOCLR_CLKGATE</name>
              <description>Enables the feature to auto-clear the CLKGATE bit if there is wakeup event while USB is suspended</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENAUTOCLR_PHY_PWD</name>
              <description>Enables the feature to auto-clear the PWD register bits in USBPHYx_PWD if there is wakeup event while USB is suspended</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENDPDMCHG_WKUP</name>
              <description>Enables the feature to wakeup USB if DP/DM is toggled when USB is suspended</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENIDCHG_WKUP</name>
              <description>Enables the feature to wakeup USB if ID is toggled when USB is suspended.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENVBUSCHG_WKUP</name>
              <description>Enables the feature to wakeup USB if VBUS is toggled when USB is suspended.</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>FSDLL_RST_EN</name>
              <description>Enables the feature to reset the FSDLL lock detection logic at the end of each TX packet.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved.</description>
              <bitOffset>0x19</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>OTG_ID_VALUE</name>
              <description>Almost same as OTGID_STATUS in USBPHYx_STATUS Register</description>
              <bitOffset>0x1B</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>HOST_FORCE_LS_SE0</name>
              <description>Forces the next FS packet that is transmitted to have a EOP with LS timing</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>UTMI_SUSPENDM</name>
              <description>Used by the PHY to indicate a powered-down state</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>CLKGATE</name>
              <description>Gate UTMI Clocks</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SFTRST</name>
              <description>Writing a 1 to this bit will soft-reset the USBPHYx_PWD, USBPHYx_TX, USBPHYx_RX, and USBPHYx_CTRL registers</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CTRL_CLR</name>
          <description>USB PHY General Control Register</description>
          <addressOffset>0x38</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0xC0200000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ENOTG_ID_CHG_IRQ</name>
              <description>Enable OTG_ID_CHG_IRQ.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENHOSTDISCONDETECT</name>
              <description>For host mode, enables high-speed disconnect detector</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENIRQHOSTDISCON</name>
              <description>Enables interrupt for detection of disconnection to Device when in high-speed host mode</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>HOSTDISCONDETECT_IRQ</name>
              <description>Indicates that the device has disconnected in high-speed mode</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENDEVPLUGINDETECT</name>
              <description>For device mode, enables 200-KOhm pullups for detecting connectivity to the host.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DEVPLUGIN_POLARITY</name>
              <description>For device mode, if this bit is cleared to 0, then it trips the interrupt if the device is plugged in</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>OTG_ID_CHG_IRQ</name>
              <description>OTG ID change interrupt. Indicates the value of ID pin changed.</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENOTGIDDETECT</name>
              <description>Enables circuit to detect resistance of MiniAB ID pin.</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RESUMEIRQSTICKY</name>
              <description>Set to 1 will make RESUME_IRQ bit a sticky bit until software clear it</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENIRQRESUMEDETECT</name>
              <description>Enables interrupt for detection of a non-J state on the USB line</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RESUME_IRQ</name>
              <description>Indicates that the host is sending a wake-up after suspend</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENIRQDEVPLUGIN</name>
              <description>Enables interrupt for the detection of connectivity to the USB line.</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DEVPLUGIN_IRQ</name>
              <description>Indicates that the device is connected</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_ON_LRADC</name>
              <description>Enables the LRADC to monitor USB_DP and USB_DM. This is for use in non-USB modes only.</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENUTMILEVEL2</name>
              <description>Enables UTMI+ Level2. This should be enabled if needs to support LS device</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENUTMILEVEL3</name>
              <description>Enables UTMI+ Level3</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENIRQWAKEUP</name>
              <description>Enables interrupt for the wakeup events.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>WAKEUP_IRQ</name>
              <description>Indicates that there is a wakeup event</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>ENAUTOCLR_CLKGATE</name>
              <description>Enables the feature to auto-clear the CLKGATE bit if there is wakeup event while USB is suspended</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENAUTOCLR_PHY_PWD</name>
              <description>Enables the feature to auto-clear the PWD register bits in USBPHYx_PWD if there is wakeup event while USB is suspended</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENDPDMCHG_WKUP</name>
              <description>Enables the feature to wakeup USB if DP/DM is toggled when USB is suspended</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENIDCHG_WKUP</name>
              <description>Enables the feature to wakeup USB if ID is toggled when USB is suspended.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENVBUSCHG_WKUP</name>
              <description>Enables the feature to wakeup USB if VBUS is toggled when USB is suspended.</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>FSDLL_RST_EN</name>
              <description>Enables the feature to reset the FSDLL lock detection logic at the end of each TX packet.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved.</description>
              <bitOffset>0x19</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>OTG_ID_VALUE</name>
              <description>Almost same as OTGID_STATUS in USBPHYx_STATUS Register</description>
              <bitOffset>0x1B</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>HOST_FORCE_LS_SE0</name>
              <description>Forces the next FS packet that is transmitted to have a EOP with LS timing</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>UTMI_SUSPENDM</name>
              <description>Used by the PHY to indicate a powered-down state</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>CLKGATE</name>
              <description>Gate UTMI Clocks</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SFTRST</name>
              <description>Writing a 1 to this bit will soft-reset the USBPHYx_PWD, USBPHYx_TX, USBPHYx_RX, and USBPHYx_CTRL registers</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CTRL_TOG</name>
          <description>USB PHY General Control Register</description>
          <addressOffset>0x3C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0xC0200000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ENOTG_ID_CHG_IRQ</name>
              <description>Enable OTG_ID_CHG_IRQ.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENHOSTDISCONDETECT</name>
              <description>For host mode, enables high-speed disconnect detector</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENIRQHOSTDISCON</name>
              <description>Enables interrupt for detection of disconnection to Device when in high-speed host mode</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>HOSTDISCONDETECT_IRQ</name>
              <description>Indicates that the device has disconnected in high-speed mode</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENDEVPLUGINDETECT</name>
              <description>For device mode, enables 200-KOhm pullups for detecting connectivity to the host.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DEVPLUGIN_POLARITY</name>
              <description>For device mode, if this bit is cleared to 0, then it trips the interrupt if the device is plugged in</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>OTG_ID_CHG_IRQ</name>
              <description>OTG ID change interrupt. Indicates the value of ID pin changed.</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENOTGIDDETECT</name>
              <description>Enables circuit to detect resistance of MiniAB ID pin.</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RESUMEIRQSTICKY</name>
              <description>Set to 1 will make RESUME_IRQ bit a sticky bit until software clear it</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENIRQRESUMEDETECT</name>
              <description>Enables interrupt for detection of a non-J state on the USB line</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RESUME_IRQ</name>
              <description>Indicates that the host is sending a wake-up after suspend</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENIRQDEVPLUGIN</name>
              <description>Enables interrupt for the detection of connectivity to the USB line.</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DEVPLUGIN_IRQ</name>
              <description>Indicates that the device is connected</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_ON_LRADC</name>
              <description>Enables the LRADC to monitor USB_DP and USB_DM. This is for use in non-USB modes only.</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENUTMILEVEL2</name>
              <description>Enables UTMI+ Level2. This should be enabled if needs to support LS device</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENUTMILEVEL3</name>
              <description>Enables UTMI+ Level3</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENIRQWAKEUP</name>
              <description>Enables interrupt for the wakeup events.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>WAKEUP_IRQ</name>
              <description>Indicates that there is a wakeup event</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>ENAUTOCLR_CLKGATE</name>
              <description>Enables the feature to auto-clear the CLKGATE bit if there is wakeup event while USB is suspended</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENAUTOCLR_PHY_PWD</name>
              <description>Enables the feature to auto-clear the PWD register bits in USBPHYx_PWD if there is wakeup event while USB is suspended</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENDPDMCHG_WKUP</name>
              <description>Enables the feature to wakeup USB if DP/DM is toggled when USB is suspended</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENIDCHG_WKUP</name>
              <description>Enables the feature to wakeup USB if ID is toggled when USB is suspended.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENVBUSCHG_WKUP</name>
              <description>Enables the feature to wakeup USB if VBUS is toggled when USB is suspended.</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>FSDLL_RST_EN</name>
              <description>Enables the feature to reset the FSDLL lock detection logic at the end of each TX packet.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved.</description>
              <bitOffset>0x19</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>OTG_ID_VALUE</name>
              <description>Almost same as OTGID_STATUS in USBPHYx_STATUS Register</description>
              <bitOffset>0x1B</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>HOST_FORCE_LS_SE0</name>
              <description>Forces the next FS packet that is transmitted to have a EOP with LS timing</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>UTMI_SUSPENDM</name>
              <description>Used by the PHY to indicate a powered-down state</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>CLKGATE</name>
              <description>Gate UTMI Clocks</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SFTRST</name>
              <description>Writing a 1 to this bit will soft-reset the USBPHYx_PWD, USBPHYx_TX, USBPHYx_RX, and USBPHYx_CTRL registers</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>STATUS</name>
          <description>USB PHY Status Register</description>
          <addressOffset>0x40</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RSVD0</name>
              <description>Reserved.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>HOSTDISCONDETECT_STATUS</name>
              <description>Indicates that the device has disconnected while in high-speed host mode.</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>DEVPLUGIN_STATUS</name>
              <description>Indicates that the device has been connected on the USB_DP and USB_DM lines.</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>RSVD2</name>
              <description>Reserved.</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>OTGID_STATUS</name>
              <description>Indicates the results of ID pin on MiniAB plug</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD3</name>
              <description>Reserved.</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>RESUME_STATUS</name>
              <description>Indicates that the host is sending a wake-up after suspend and has triggered an interrupt.</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>RSVD4</name>
              <description>Reserved.</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>21</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>DEBUG</name>
          <description>USB PHY Debug Register</description>
          <addressOffset>0x50</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x7F180000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>OTGIDPIOLOCK</name>
              <description>Once OTG ID from USBPHYx_STATUS_OTGID_STATUS, use this to hold the value</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DEBUG_INTERFACE_HOLD</name>
              <description>Use holding registers to assist in timing for external UTMI interface.</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>HSTPULLDOWN</name>
              <description>Set bit 3 to 1 to pull down 15-KOhm on USB_DP line</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENHSTPULLDOWN</name>
              <description>Set bit 5 to 1 to override the control of the USB_DP 15-KOhm pulldown</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved.</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>TX2RXCOUNT</name>
              <description>Delay in between the end of transmit to the beginning of receive</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENTX2RXCOUNT</name>
              <description>Set this bit to allow a countdown to transition in between TX and RX.</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved.</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>SQUELCHRESETCOUNT</name>
              <description>Delay in between the detection of squelch to the reset of high-speed RX.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD2</name>
              <description>Reserved.</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>ENSQUELCHRESET</name>
              <description>Set bit to allow squelch to reset high-speed receive.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SQUELCHRESETLENGTH</name>
              <description>Duration of RESET in terms of the number of 480-MHz cycles.</description>
              <bitOffset>0x19</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>HOST_RESUME_DEBUG</name>
              <description>Choose to trigger the host resume SE0 with HOST_FORCE_LS_SE0 = 0 or UTMI_SUSPEND = 1.</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CLKGATE</name>
              <description>Gate Test Clocks</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD3</name>
              <description>Reserved.</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>DEBUG_SET</name>
          <description>USB PHY Debug Register</description>
          <addressOffset>0x54</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x7F180000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>OTGIDPIOLOCK</name>
              <description>Once OTG ID from USBPHYx_STATUS_OTGID_STATUS, use this to hold the value</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DEBUG_INTERFACE_HOLD</name>
              <description>Use holding registers to assist in timing for external UTMI interface.</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>HSTPULLDOWN</name>
              <description>Set bit 3 to 1 to pull down 15-KOhm on USB_DP line</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENHSTPULLDOWN</name>
              <description>Set bit 5 to 1 to override the control of the USB_DP 15-KOhm pulldown</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved.</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>TX2RXCOUNT</name>
              <description>Delay in between the end of transmit to the beginning of receive</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENTX2RXCOUNT</name>
              <description>Set this bit to allow a countdown to transition in between TX and RX.</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved.</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>SQUELCHRESETCOUNT</name>
              <description>Delay in between the detection of squelch to the reset of high-speed RX.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD2</name>
              <description>Reserved.</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>ENSQUELCHRESET</name>
              <description>Set bit to allow squelch to reset high-speed receive.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SQUELCHRESETLENGTH</name>
              <description>Duration of RESET in terms of the number of 480-MHz cycles.</description>
              <bitOffset>0x19</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>HOST_RESUME_DEBUG</name>
              <description>Choose to trigger the host resume SE0 with HOST_FORCE_LS_SE0 = 0 or UTMI_SUSPEND = 1.</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CLKGATE</name>
              <description>Gate Test Clocks</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD3</name>
              <description>Reserved.</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>DEBUG_CLR</name>
          <description>USB PHY Debug Register</description>
          <addressOffset>0x58</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x7F180000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>OTGIDPIOLOCK</name>
              <description>Once OTG ID from USBPHYx_STATUS_OTGID_STATUS, use this to hold the value</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DEBUG_INTERFACE_HOLD</name>
              <description>Use holding registers to assist in timing for external UTMI interface.</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>HSTPULLDOWN</name>
              <description>Set bit 3 to 1 to pull down 15-KOhm on USB_DP line</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENHSTPULLDOWN</name>
              <description>Set bit 5 to 1 to override the control of the USB_DP 15-KOhm pulldown</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved.</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>TX2RXCOUNT</name>
              <description>Delay in between the end of transmit to the beginning of receive</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENTX2RXCOUNT</name>
              <description>Set this bit to allow a countdown to transition in between TX and RX.</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved.</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>SQUELCHRESETCOUNT</name>
              <description>Delay in between the detection of squelch to the reset of high-speed RX.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD2</name>
              <description>Reserved.</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>ENSQUELCHRESET</name>
              <description>Set bit to allow squelch to reset high-speed receive.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SQUELCHRESETLENGTH</name>
              <description>Duration of RESET in terms of the number of 480-MHz cycles.</description>
              <bitOffset>0x19</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>HOST_RESUME_DEBUG</name>
              <description>Choose to trigger the host resume SE0 with HOST_FORCE_LS_SE0 = 0 or UTMI_SUSPEND = 1.</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CLKGATE</name>
              <description>Gate Test Clocks</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD3</name>
              <description>Reserved.</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>DEBUG_TOG</name>
          <description>USB PHY Debug Register</description>
          <addressOffset>0x5C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x7F180000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>OTGIDPIOLOCK</name>
              <description>Once OTG ID from USBPHYx_STATUS_OTGID_STATUS, use this to hold the value</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DEBUG_INTERFACE_HOLD</name>
              <description>Use holding registers to assist in timing for external UTMI interface.</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>HSTPULLDOWN</name>
              <description>Set bit 3 to 1 to pull down 15-KOhm on USB_DP line</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENHSTPULLDOWN</name>
              <description>Set bit 5 to 1 to override the control of the USB_DP 15-KOhm pulldown</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved.</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>TX2RXCOUNT</name>
              <description>Delay in between the end of transmit to the beginning of receive</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENTX2RXCOUNT</name>
              <description>Set this bit to allow a countdown to transition in between TX and RX.</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved.</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>SQUELCHRESETCOUNT</name>
              <description>Delay in between the detection of squelch to the reset of high-speed RX.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD2</name>
              <description>Reserved.</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>ENSQUELCHRESET</name>
              <description>Set bit to allow squelch to reset high-speed receive.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SQUELCHRESETLENGTH</name>
              <description>Duration of RESET in terms of the number of 480-MHz cycles.</description>
              <bitOffset>0x19</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>HOST_RESUME_DEBUG</name>
              <description>Choose to trigger the host resume SE0 with HOST_FORCE_LS_SE0 = 0 or UTMI_SUSPEND = 1.</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CLKGATE</name>
              <description>Gate Test Clocks</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD3</name>
              <description>Reserved.</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>DEBUG0_STATUS</name>
          <description>UTMI Debug Status Register 0</description>
          <addressOffset>0x60</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>LOOP_BACK_FAIL_COUNT</name>
              <description>Running count of the failed pseudo-random generator loopback</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>UTMI_RXERROR_FAIL_COUNT</name>
              <description>Running count of the UTMI_RXERROR.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>10</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>SQUELCH_COUNT</name>
              <description>Running count of the squelch reset instead of normal end for HS RX.</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>DEBUG1</name>
          <description>UTMI Debug Status Register 1</description>
          <addressOffset>0x70</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x1000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RSVD0</name>
              <description>Reserved. Note: This bit should remain clear.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>13</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENTAILADJVD</name>
              <description>Delay increment of the rise of squelch: 00 = Delay is nominal 01 = Delay is +20% 10 = Delay is -20% 11 = Delay is -40%</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved.</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>17</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>DEBUG1_SET</name>
          <description>UTMI Debug Status Register 1</description>
          <addressOffset>0x74</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x1000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RSVD0</name>
              <description>Reserved. Note: This bit should remain clear.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>13</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENTAILADJVD</name>
              <description>Delay increment of the rise of squelch: 00 = Delay is nominal 01 = Delay is +20% 10 = Delay is -20% 11 = Delay is -40%</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved.</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>17</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>DEBUG1_CLR</name>
          <description>UTMI Debug Status Register 1</description>
          <addressOffset>0x78</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x1000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RSVD0</name>
              <description>Reserved. Note: This bit should remain clear.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>13</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENTAILADJVD</name>
              <description>Delay increment of the rise of squelch: 00 = Delay is nominal 01 = Delay is +20% 10 = Delay is -20% 11 = Delay is -40%</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved.</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>17</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>DEBUG1_TOG</name>
          <description>UTMI Debug Status Register 1</description>
          <addressOffset>0x7C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x1000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RSVD0</name>
              <description>Reserved. Note: This bit should remain clear.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>13</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENTAILADJVD</name>
              <description>Delay increment of the rise of squelch: 00 = Delay is nominal 01 = Delay is +20% 10 = Delay is -20% 11 = Delay is -40%</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved.</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>17</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>VERSION</name>
          <description>UTMI RTL Version</description>
          <addressOffset>0x80</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0x4020000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>STEP</name>
              <description>Fixed read-only value reflecting the stepping of the RTL version.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>MINOR</name>
              <description>Fixed read-only value reflecting the MINOR field of the RTL version.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>MAJOR</name>
              <description>Fixed read-only value reflecting the MAJOR field of the RTL version.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
      </registers>
    </peripheral>
    <peripheral derivedFrom="USBPHY1">
      <name>USBPHY2</name>
      <description>USBPHY Register Reference Index</description>
      <groupName>USBPHY</groupName>
      <prependToName>USBPHY2_</prependToName>
      <baseAddress>0x20CA000</baseAddress>
      <addressBlock>
        <offset>0</offset>
        <size>0x84</size>
        <usage>registers</usage>
      </addressBlock>
      <interrupt>
        <name>USB_PHY2</name>
        <value>77</value>
      </interrupt>
    </peripheral>
    <peripheral>
      <name>EPIT1</name>
      <description>EPIT</description>
      <groupName>EPIT</groupName>
      <prependToName>EPIT1_</prependToName>
      <baseAddress>0x20D0000</baseAddress>
      <headerStructName>EPIT</headerStructName>
      <addressBlock>
        <offset>0</offset>
        <size>0x14</size>
        <usage>registers</usage>
      </addressBlock>
      <interrupt>
        <name>EPIT1</name>
        <value>88</value>
      </interrupt>
      <registers>
        <register>
          <name>CR</name>
          <description>Control register</description>
          <addressOffset>0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>EN</name>
              <description>This bit enables the EPIT</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>EN_0</name>
                  <description>EPIT is disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>EN_1</name>
                  <description>EPIT is enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ENMOD</name>
              <description>EPIT enable mode</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ENMOD_0</name>
                  <description>Counter starts counting from the value it had when it was disabled.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENMOD_1</name>
                  <description>Counter starts count from load value (RLD=1) or 0xFFFF_FFFF (If RLD=0)</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>OCIEN</name>
              <description>Output compare interrupt enable</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>OCIEN_0</name>
                  <description>Compare interrupt disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>OCIEN_1</name>
                  <description>Compare interrupt enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RLD</name>
              <description>Counter reload control</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RLD_0</name>
                  <description>When the counter reaches zero it rolls over to 0xFFFF_FFFF (free-running mode)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RLD_1</name>
                  <description>When the counter reaches zero it reloads from the modulus register (set-and-forget mode)</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PRESCALAR</name>
              <description>Counter clock prescaler value</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>12</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PRESCALAR_0</name>
                  <description>Divide by 1</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PRESCALAR_1</name>
                  <description>Divide by 2...</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PRESCALAR_4095</name>
                  <description>Divide by 4096</description>
                  <value>0xFFF</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SWR</name>
              <description>Software reset</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SWR_0</name>
                  <description>EPIT is out of reset</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SWR_1</name>
                  <description>EPIT is undergoing reset</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>IOVW</name>
              <description>EPIT counter overwrite enable</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>IOVW_0</name>
                  <description>Write to load register does not result in counter value being overwritten.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>IOVW_1</name>
                  <description>Write to load register results in immediate overwriting of counter value.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DBGEN</name>
              <description>This bit is used to keep the EPIT functional in debug mode</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DBGEN_0</name>
                  <description>Inactive in debug mode</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DBGEN_1</name>
                  <description>Active in debug mode</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WAITEN</name>
              <description>This read/write control bit enables the operation of the EPIT during wait mode</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>WAITEN_0</name>
                  <description>EPIT is disabled in wait mode</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WAITEN_1</name>
                  <description>EPIT is enabled in wait mode</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>STOPEN</name>
              <description>EPIT stop mode enable</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>STOPEN_0</name>
                  <description>EPIT is disabled in stop mode</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>STOPEN_1</name>
                  <description>EPIT is enabled in stop mode</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>OM</name>
              <description>EPIT output mode.This bit field determines the mode of EPIT output on the output pin.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>OM_0</name>
                  <description>EPIT output is disconnected from pad</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>OM_1</name>
                  <description>Toggle output pin</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>OM_2</name>
                  <description>Clear output pin</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>OM_3</name>
                  <description>Set output pin</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CLKSRC</name>
              <description>Select clock source These bits determine which clock input is to be selected for running the counter</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CLKSRC_0</name>
                  <description>Clock is off</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLKSRC_1</name>
                  <description>Peripheral clock</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLKSRC_2</name>
                  <description>High-frequency reference clock</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLKSRC_3</name>
                  <description>Low-frequency reference clock</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SR</name>
          <description>Status register</description>
          <addressOffset>0x4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>OCIF</name>
              <description>Output compare interrupt flag</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
              <enumeratedValues>
                <enumeratedValue>
                  <name>OCIF_0</name>
                  <description>Compare event has not occurred</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>OCIF_1</name>
                  <description>Compare event occurred</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>LR</name>
          <description>Load register</description>
          <addressOffset>0x8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0xFFFFFFFF</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>LOAD</name>
              <description>Load value. Value that is loaded into the counter at the start of each count cycle.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CMPR</name>
          <description>Compare register</description>
          <addressOffset>0xC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>COMPARE</name>
              <description>Compare Value. When the counter value equals this bit field value a compare event is generated.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CNR</name>
          <description>Counter register</description>
          <addressOffset>0x10</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0xFFFFFFFF</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>COUNT</name>
              <description>Counter value. This contains the current value of the counter.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
      </registers>
    </peripheral>
    <peripheral derivedFrom="EPIT1">
      <name>EPIT2</name>
      <description>EPIT</description>
      <groupName>EPIT</groupName>
      <prependToName>EPIT2_</prependToName>
      <baseAddress>0x20D4000</baseAddress>
      <addressBlock>
        <offset>0</offset>
        <size>0x14</size>
        <usage>registers</usage>
      </addressBlock>
      <interrupt>
        <name>EPIT2</name>
        <value>89</value>
      </interrupt>
    </peripheral>
    <peripheral>
      <name>SRC</name>
      <description>SRC</description>
      <groupName>SRC</groupName>
      <prependToName>SRC_</prependToName>
      <baseAddress>0x20D8000</baseAddress>
      <addressBlock>
        <offset>0</offset>
        <size>0x48</size>
        <usage>registers</usage>
      </addressBlock>
      <interrupt>
        <name>SRC</name>
        <value>123</value>
      </interrupt>
      <interrupt>
        <name>SRC_Combined</name>
        <value>128</value>
      </interrupt>
      <registers>
        <register>
          <name>SCR</name>
          <description>SRC Control Register</description>
          <addressOffset>0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x521</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>warm_reset_enable</name>
              <description>WARM reset enable bit</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>warm_reset_enable_0</name>
                  <description>WARM reset disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>warm_reset_enable_1</name>
                  <description>WARM reset enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>warm_rst_bypass_count</name>
              <description>Defines the XTALI cycles to count before bypassing the MMDC acknowledge for WARM reset</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>warm_rst_bypass_count_0</name>
                  <description>Counter not to be used - system will wait until MMDC acknowledge until it is asserted.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>warm_rst_bypass_count_1</name>
                  <description>Wait 16 XTALI cycles before changing WARM reset to a COLD reset.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>warm_rst_bypass_count_2</name>
                  <description>Wait 32 XTALI cycles before changing WARM reset to a COLD reset.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>warm_rst_bypass_count_3</name>
                  <description>Wait 64 XTALI cycles before changing WARM reset to a COLD reset</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>mask_wdog_rst</name>
              <description>Mask wdog_rst_b source</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>mask_wdog_rst_5</name>
                  <description>wdog_rst_b is masked</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>mask_wdog_rst_10</name>
                  <description>wdog_rst_b is not masked (default)</description>
                  <value>0xA</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>eim_rst</name>
              <description>EIM reset is needed in order to reconfigure the eim chip select</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>core0_rst</name>
              <description>Software reset for core0 only</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>core0_rst_0</name>
                  <description>do not assert core0 reset</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>core0_rst_1</name>
                  <description>assert core0 reset</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>core0_dbg_rst</name>
              <description>Software reset for core0 debug only</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>core0_dbg_rst_0</name>
                  <description>do not assert core0 debug reset</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>core0_dbg_rst_1</name>
                  <description>assert core0 debug reset</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>cores_dbg_rst</name>
              <description>Software reset for debug of arm platform only</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>cores_dbg_rst_0</name>
                  <description>do not assert arm platform debug reset</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>cores_dbg_rst_1</name>
                  <description>assert arm platform debug reset</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>wdog3_rst_optn</name>
              <description>Wdog3_rst_b option</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>wdog3_rst_optn_0</name>
                  <description>Wdog3_rst_b asserts M4 reset (default)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wdog3_rst_optn_1</name>
                  <description>Wdog3_rst_b asserts global reset</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>dbg_rst_msk_pg</name>
              <description>Do not assert debug resets after power gating event of core</description>
              <bitOffset>0x19</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>dbg_rst_msk_pg_0</name>
                  <description>do not mask core debug resets (debug resets will be asserted after power gating event)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>dbg_rst_msk_pg_1</name>
                  <description>mask core debug resets (debug resets won't be asserted after power gating event)</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>mix_rst_strch</name>
              <description>SoC mix (Audio, ENET, uSDHC, EIM, QSPI, OCRAM, MMDC, etc) power up reset stretch mix reset width = (mix_rst_strtch +1)* 88 ipg_clk cycles</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>mix_rst_strch_0</name>
                  <description>mix reset width is 88 ipg_cycle cycles</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>mix_rst_strch_1</name>
                  <description>mix reset width is 2 * 88 ipg_cycle cycles</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>mix_rst_strch_2</name>
                  <description>mix reset width is 3 * 88 ipg_cycle cycles</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>mix_rst_strch_3</name>
                  <description>mix reset width is 4 * 88 ipg_cycle cycles</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>mask_wdog3_rst</name>
              <description>Mask wdog3_rst_b source</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>mask_wdog3_rst_5</name>
                  <description>wdog3_rst_b is masked</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>mask_wdog3_rst_10</name>
                  <description>wdog3_rst_b is not masked</description>
                  <value>0xA</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SBMR1</name>
          <description>SRC Boot Mode Register 1</description>
          <addressOffset>0x4</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BOOT_CFG1</name>
              <description>Refer to fusemap.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>BOOT_CFG2</name>
              <description>Refer to fusemap.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>BOOT_CFG3</name>
              <description>Refer to fusemap.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>BOOT_CFG4</name>
              <description>Refer to fusemap.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>SRSR</name>
          <description>SRC Reset Status Register</description>
          <addressOffset>0x8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x1</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ipp_reset_b</name>
              <description>Indicates whether reset was the result of ipp_reset_b pin (Power-up sequence)</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ipp_reset_b_0</name>
                  <description>Reset is not a result of ipp_reset_b pin.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ipp_reset_b_1</name>
                  <description>Reset is a result of ipp_reset_b pin.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>csu_reset_b</name>
              <description>Indicates whether the reset was the result of the csu_reset_b input</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
              <enumeratedValues>
                <enumeratedValue>
                  <name>csu_reset_b_0</name>
                  <description>Reset is not a result of the csu_reset_b event.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>csu_reset_b_1</name>
                  <description>Reset is a result of the csu_reset_b event.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ipp_user_reset_b</name>
              <description>Indicates whether the reset was the result of the ipp_user_reset_b qualified reset.</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ipp_user_reset_b_0</name>
                  <description>Reset is not a result of the ipp_user_reset_b qualified as COLD reset event.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ipp_user_reset_b_1</name>
                  <description>Reset is a result of the ipp_user_reset_b qualified as COLD reset event.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>wdog_rst_b</name>
              <description>IC Watchdog Time-out reset</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
              <enumeratedValues>
                <enumeratedValue>
                  <name>wdog_rst_b_0</name>
                  <description>Reset is not a result of the watchdog time-out event.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wdog_rst_b_1</name>
                  <description>Reset is a result of the watchdog time-out event.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>jtag_rst_b</name>
              <description>HIGH - Z JTAG reset. Indicates whether the reset was the result of HIGH-Z reset from JTAG.</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
              <enumeratedValues>
                <enumeratedValue>
                  <name>jtag_rst_b_0</name>
                  <description>Reset is not a result of HIGH-Z reset from JTAG.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>jtag_rst_b_1</name>
                  <description>Reset is a result of HIGH-Z reset from JTAG.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>jtag_sw_rst</name>
              <description>JTAG software reset. Indicates whether the reset was the result of software reset from JTAG.</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
              <enumeratedValues>
                <enumeratedValue>
                  <name>jtag_sw_rst_0</name>
                  <description>Reset is not a result of software reset from JTAG.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>jtag_sw_rst_1</name>
                  <description>Reset is a result of software reset from JTAG.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>wdog3_rst_b</name>
              <description>IC Watchdog3 Time-out reset</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
              <enumeratedValues>
                <enumeratedValue>
                  <name>wdog3_rst_b_0</name>
                  <description>Reset is not a result of the watchdog3 time-out event.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wdog3_rst_b_1</name>
                  <description>Reset is a result of the watchdog3 time-out event.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>tempsense_rst_b</name>
              <description>Temper Sensor software reset</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>tempsense_rst_b_0</name>
                  <description>Reset is not a result of software reset from Temperature Sensor.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tempsense_rst_b_1</name>
                  <description>Reset is a result of software reset from Temperature Sensor.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>warm_boot</name>
              <description>WARM boot indication shows that WARM boot was initiated by software</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>warm_boot_0</name>
                  <description>WARM boot process not initiated by software.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>warm_boot_1</name>
                  <description>WARM boot initiated by software.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SISR</name>
          <description>SRC Interrupt Status Register</description>
          <addressOffset>0x14</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>core0_wdog_rst_req</name>
              <description>WDOG reset request from core0. Read-only status bit.</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>SBMR2</name>
          <description>SRC Boot Mode Register 2</description>
          <addressOffset>0x1C</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SEC_CONFIG</name>
              <description>SECONFIG[1] shows the state of the SECONFIG[1] fuse</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>DIR_BT_DIS</name>
              <description>DIR_BT_DIS shows the state of the DIR_BT_DIS fuse</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>BT_FUSE_SEL</name>
              <description>BT_FUSE_SEL (connected to gpio bt_fuse_sel) shows the state of the BT_FUSE_SEL fuse</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>BMOD</name>
              <description>BMOD[1:0] shows the latched state of the BOOT_MODE1 and BOOT_MODE0 signals on the rising edge of POR_B</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>GPR1</name>
          <description>SRC General Purpose Register 1</description>
          <addressOffset>0x20</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>PERSISTENT_ENTRY0</name>
              <description>Holds entry function for core0 for waking-up from low power mode</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>GPR2</name>
          <description>SRC General Purpose Register 2</description>
          <addressOffset>0x24</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>PERSISTENT_ARG0</name>
              <description>Holds argument of entry function for core0 for waking-up from low power mode</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>GPR3</name>
          <description>SRC General Purpose Register 3</description>
          <addressOffset>0x28</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
        </register>
        <register>
          <name>GPR4</name>
          <description>SRC General Purpose Register 4</description>
          <addressOffset>0x2C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
        </register>
        <register>
          <name>GPR5</name>
          <description>SRC General Purpose Register 5</description>
          <addressOffset>0x30</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
        </register>
        <register>
          <name>GPR6</name>
          <description>SRC General Purpose Register 6</description>
          <addressOffset>0x34</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
        </register>
        <register>
          <name>GPR7</name>
          <description>SRC General Purpose Register 7</description>
          <addressOffset>0x38</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
        </register>
        <register>
          <name>GPR8</name>
          <description>SRC General Purpose Register 8</description>
          <addressOffset>0x3C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
        </register>
        <register>
          <name>GPR9</name>
          <description>SRC General Purpose Register 9</description>
          <addressOffset>0x40</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
        </register>
        <register>
          <name>GPR10</name>
          <description>SRC General Purpose Register 10</description>
          <addressOffset>0x44</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
        </register>
      </registers>
    </peripheral>
    <peripheral>
      <name>GPC</name>
      <description>GPC</description>
      <groupName>GPC</groupName>
      <prependToName>GPC_</prependToName>
      <baseAddress>0x20DC000</baseAddress>
      <addressBlock>
        <offset>0</offset>
        <size>0x28</size>
        <usage>registers</usage>
      </addressBlock>
      <interrupt>
        <name>GPC</name>
        <value>121</value>
      </interrupt>
      <registers>
        <register>
          <name>CNTR</name>
          <description>GPC Interface control register</description>
          <addressOffset>0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x520000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MEGA_PDN_REQ</name>
              <description>MEGA domain power down request</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>MEGA_PDN_REQ_0</name>
                  <description>No Request</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MEGA_PDN_REQ_1</name>
                  <description>Request power down sequence</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>MEGA_PUP_REQ</name>
              <description>MEGA domain power up request</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>MEGA_PUP_REQ_0</name>
                  <description>No Request</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MEGA_PUP_REQ_1</name>
                  <description>Request power up sequence</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DISPLAY_PDN_REQ</name>
              <description>Display Power Down request</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISPLAY_PDN_REQ_0</name>
                  <description>no request</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DISPLAY_PDN_REQ_1</name>
                  <description>Request Power Down sequence to start for Display</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DISPLAY_PUP_REQ</name>
              <description>Display Power Up request</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISPLAY_PUP_REQ_0</name>
                  <description>no request</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DISPLAY_PUP_REQ_1</name>
                  <description>Request Power Up sequence to start for Display</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DVFS0CR</name>
              <description>DVFS0 (ARM) Change request (bit is read-only)</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DVFS0CR_0</name>
                  <description>DVFS0 has no request</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DVFS0CR_1</name>
                  <description>DVFS0 is requesting for frequency/voltage update</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>VADC_ANALOG_OFF</name>
              <description>Indication to VADC whether the analog power to VADC is available or not</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>VADC_ANALOG_OFF_0</name>
                  <description>VADC analog power is on</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>VADC_ANALOG_OFF_1</name>
                  <description>VADC analog power is off</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>VADC_EXT_PWD_N</name>
              <description>VADC power down bit</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>VADC_EXT_PWD_N_0</name>
                  <description>VADC power down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>VADC_EXT_PWD_N_1</name>
                  <description>VADC not power down</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>GPCIRQM</name>
              <description>GPC interrupt/event masking</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>GPCIRQM_0</name>
                  <description>not masked</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>GPCIRQM_1</name>
                  <description>interrupt/event is masked</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>L2_PGE</name>
              <description>L2 Cache Power Gate Enable</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>L2_PGE_0</name>
                  <description>L2 cache will keep power on even if CPU core is power down and will not be hardware invalidated when CPU core is re-power up the reset value is 1'b1</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>L2_PGE_1</name>
                  <description>L2 cache power gate off request, L2 cache will be power down once when CPU core is power down and will be hardware invalidated automatically when CPU core is re-power up</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>PGR</name>
          <description>GPC Power Gating Register</description>
          <addressOffset>0x4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DRCIC</name>
              <description>Debug ref cir in mux control</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DRCIC_0</name>
                  <description>ccm_cosr_1_clk_in</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DRCIC_1</name>
                  <description>ccm_cosr_2_clk_in</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DRCIC_2</name>
                  <description>restricted</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DRCIC_3</name>
                  <description>restricted</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>IMR1</name>
          <description>IRQ masking register 1</description>
          <addressOffset>0x8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>IMR1</name>
              <description>IRQ[63:32] masking bits: 1-irq masked, 0-irq is not masked</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>IMR2</name>
          <description>IRQ masking register 2</description>
          <addressOffset>0xC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>IMR2</name>
              <description>IRQ[95:64] masking bits: 1-irq masked, 0-irq is not masked</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>IMR3</name>
          <description>IRQ masking register 3</description>
          <addressOffset>0x10</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>IMR3</name>
              <description>IRQ[127:96] masking bits: 1-irq masked, 0-irq is not masked</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>IMR4</name>
          <description>IRQ masking register 4</description>
          <addressOffset>0x14</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>IMR4</name>
              <description>IRQ[159:128] masking bits: 1-irq masked, 0-irq is not masked</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ISR1</name>
          <description>IRQ status resister 1</description>
          <addressOffset>0x18</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ISR1</name>
              <description>IRQ[63:32] status, read only</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ISR2</name>
          <description>IRQ status resister 2</description>
          <addressOffset>0x1C</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ISR2</name>
              <description>IRQ[95:64] status, read only</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ISR3</name>
          <description>IRQ status resister 3</description>
          <addressOffset>0x20</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ISR3</name>
              <description>IRQ[127:96] status, read only</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ISR4</name>
          <description>IRQ status resister 4</description>
          <addressOffset>0x24</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ISR4</name>
              <description>IRQ[159:128] status, read only</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
      </registers>
    </peripheral>
    <peripheral>
      <name>DVFSC</name>
      <description>DVFSC</description>
      <groupName>DVFSC</groupName>
      <prependToName>DVFSC_</prependToName>
      <baseAddress>0x20DC180</baseAddress>
      <addressBlock>
        <offset>0</offset>
        <size>0x44</size>
        <usage>registers</usage>
      </addressBlock>
      <registers>
        <register>
          <name>THRS</name>
          <description>DVFS Thresholds</description>
          <addressOffset>0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0xFAF003E</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>PNCTHR</name>
              <description>Panic threshold for load tracking</description>
              <bitOffset>0</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DWTHR</name>
              <description>Down threshold for load tracking</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>UPTHR</name>
              <description>Upper threshold for load tracking</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>COUN</name>
          <description>DVFS Counters thresholds</description>
          <addressOffset>0x4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x70020</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>UPCNT</name>
              <description>UP counter threshold value</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DN_CNT</name>
              <description>Down counter threshold value</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>SIG1</name>
          <description>DVFS general purpose bits weight</description>
          <addressOffset>0x8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>WSW6</name>
              <description>General purpose load tracking signal weight dvfs_w_sig[6]</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>WSW7</name>
              <description>General purpose load tracking signal weight dvfs_w_sig[7]</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>WSW8</name>
              <description>General purpose load tracking signal weight dvfs_w_sig[8]</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>WSW9</name>
              <description>General purpose load tracking signal weight dvfs_w_sig[9]</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>WSW10</name>
              <description>General purpose load tracking signal weight dvfs_w_sig[10]</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>WSW11</name>
              <description>General purpose load tracking signal weight dvfs_w_sig[11]</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>WSW12</name>
              <description>General purpose load tracking signal weight dvfs_w_sig[12]</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>WSW13</name>
              <description>General purpose load tracking signal weight dvfs_w_sig[13]</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>WSW14</name>
              <description>General purpose load tracking signal weight dvfs_w_sig[14]</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>WSW15</name>
              <description>General purpose load tracking signal weight dvfs_w_sig[15]</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>DVFSSIG0</name>
          <description>DVFS general purpose bits weight</description>
          <addressOffset>0xC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>WSW0</name>
              <description>General purpose load tracking signal weight dvfs_w_sig[0]</description>
              <bitOffset>0</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>WSW1</name>
              <description>General purpose load tracking signal weight dvfs_w_sig[1]</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>WSW2</name>
              <description>General purpose load tracking signal weight dvfs_w_sig[2]</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>WSW3</name>
              <description>General purpose load tracking signal weight dvfs_w_sig[3]</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>WSW4</name>
              <description>General purpose load tracking signal weight dvfs_w_sig[4]</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>WSW5</name>
              <description>General purpose load tracking signal weight dvfs_w_sig[5]</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>DVFSGPC0</name>
          <description>DVFS general purpose bit 0 weight counter</description>
          <addressOffset>0x10</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>GPBC0</name>
              <description>GPBC0 - General Purpose bits Counter 0 During period of this counter the GeP bit 0 will be set and WSW0 will be added to the calculations</description>
              <bitOffset>0</bitOffset>
              <bitWidth>17</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>C0ACT</name>
              <description>C0ACT - Counter 0 active indicator</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>C0ACT_0</name>
                  <description>General Purpose bit0 counter reached value of &quot;0&quot; - the instead of WSW0, &quot;0&quot; (zero) is provided to DVFS calculation</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>C0ACT_1</name>
                  <description>General Purpose bit0 counter didn't reach value of &quot;0&quot; - the WSW0 is provided to DVFS calculation</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>C0STRT</name>
              <description>C0STRT - Counter 0 start Setting of this bit will initialize down counting of the GPC0 value</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>DVFSGPC1</name>
          <description>DVFS general purpose bit 1 weight counter</description>
          <addressOffset>0x14</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>GPBC1</name>
              <description>GPBC1 - General Purpose bits Counter 1 During period of this counter the GeP bit 1 will be set and WSW1 will be added to the calculations</description>
              <bitOffset>0</bitOffset>
              <bitWidth>17</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>C1ACT</name>
              <description>C1ACT - Counter 1 active indicator</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>C1ACT_0</name>
                  <description>General Purpose bit1 counter reached value of &quot;0&quot; - the instead of WSW1, &quot;0&quot; (zero) is provided to DVFS calculation</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>C1ACT_1</name>
                  <description>General Purpose bit1 counter didn't reach value of &quot;0&quot; - the WSW1 is provided to DVFS calculation</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>C1STRT</name>
              <description>C1STRT - Counter 1start Setting of this bit will initialize down counting of the GPC1 value</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>DVFSGPBT</name>
          <description>DVFS general purpose bits enables</description>
          <addressOffset>0x18</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>GPB0</name>
              <description>General purpose bit 0</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>GPB1</name>
              <description>General purpose bit 1</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>GPB2</name>
              <description>General purpose bit 2. Its weight is set by WSW2 value.</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>GPB3</name>
              <description>General purpose bit 3. Its weight is set by WSW3 value.</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>GPB4</name>
              <description>General purpose bit 4. Its weight is set by WSW4 value.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>GPB5</name>
              <description>General purpose bit 5. Its weight is set by WSW5 value.</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>GPB6</name>
              <description>General purpose bit 6. Its weight is set by WSW6 value.</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>GPB7</name>
              <description>General purpose bit 7. Its weight is set by WSW7 value.</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>GPB8</name>
              <description>General purpose bit 8. Its weight is set by WSW8 value.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>GPB9</name>
              <description>General purpose bit 9. Its weight is set by WSW9 value.</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>GPB10</name>
              <description>General purpose bit 10. Its weight is set by WSW10 value.</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>GPB11</name>
              <description>General purpose bit 11. Its weight is set by WSW11 value.</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>GPB12</name>
              <description>General purpose bit 12. Its weight is set by WSW12 value.</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>GPB13</name>
              <description>General purpose bit 13. Its weight is set by WSW13 value.</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>GPB14</name>
              <description>General purpose bit 14. Its weight is set by WSW14 value.</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>GPB15</name>
              <description>General purpose bit 15. Its weight is set by WSW15 value.</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>DVFSEMAC</name>
          <description>DVFS EMAC settings</description>
          <addressOffset>0x1C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x4</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>EMAC</name>
              <description>EMAC - EMA control value</description>
              <bitOffset>0</bitOffset>
              <bitWidth>9</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DVFEN0</name>
              <description>DVFS tracking for core0 enable.</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DVFEN0_0</name>
                  <description>DVFS disabled.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DVFEN0_1</name>
                  <description>DVFS enabled.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>FSVAI0</name>
              <description>DVFS Frequency adjustment status of core 0</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>FSVAI0_0</name>
                  <description>no change</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FSVAI0_1</name>
                  <description>frequency should be increased. Low priority source for interrupt. Interrupt is asserted, if FSVAIM=0. Interrupt is masked if MAXF = 1 (highest frequency).</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FSVAI0_2</name>
                  <description>frequency should be decreased. Interrupt is asserted, if FSVAIM=0. Interrupt is masked if MINF= 1 (lowest frequency).</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FSVAI0_3</name>
                  <description>frequency should be increased immediately. High priority source of interrupt. Interrupt is asserted, if FSVAIM=0. Interrupt is masked if MAXF = 1 (highest frequency).</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WFIM0</name>
              <description>DVFS Wait for Interrupt of core 0 mask bit</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>WFIM0_0</name>
                  <description>Wait for interrupt of core 0 isn't masked</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WFIM0_1</name>
                  <description>Wait for interrupt of core 0 is masked.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>CNTR</name>
          <description>DVFS Control</description>
          <addressOffset>0x20</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x900000E</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>LTBRSR</name>
              <description>LTBRSR - Load Tracking Buffer Register Source:</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LTBRSR_0</name>
                  <description>pre_ld_add</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LTBRSR_1</name>
                  <description>ld_add</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LTBRSR_2</name>
                  <description>ema_ld</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>LTBRSH</name>
              <description>LTBRSH - Load Tracking Buffer Register Shift:</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LTBRSH_0</name>
                  <description>values of [5:2] of the selected input are saving in Load Tracking Buffer</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LTBRSH_1</name>
                  <description>values of [4:1] of the selected input are saving in Load Tracking Buffer</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PFUS</name>
              <description>PFUS - Periodic Frequency Update Status</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PFUS_0</name>
                  <description>no update</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PFUS_4</name>
                  <description>DVFSPT0 period, previous finished(can be performance level decrease)</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PFUS_5</name>
                  <description>DVFSPT1 period, previous finished(can be EMA-detected performance level)</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PFUS_6</name>
                  <description>DVFSPT2 period, previous finished(can be performance level increase)</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PFUS_7</name>
                  <description>DVFSPT3 period, previous finished (can be EMA-detected performance level)</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PFUE</name>
              <description>PFUE - Period Frequency Update Enable</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PFUE_0</name>
                  <description>disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PFUE_1</name>
                  <description>enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DIV_RATIO</name>
              <description>DIV_RATIO - Divider value. Divider divides the input ARM clock, following the table</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>MINF</name>
              <description>Minimum frequency reached</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>MINF_0</name>
                  <description>min frequency not reached</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MINF_1</name>
                  <description>min frequency reached</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>MAXF</name>
              <description>Maximum frequency reached</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>MAXF_0</name>
                  <description>max frequency not reached</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MAXF_1</name>
                  <description>max frequency reached</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>FSVAI</name>
              <description>FSVAI DVFS Frequency adjustment interrupt</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>FSVAI_0</name>
                  <description>no interrupt</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FSVAI_1</name>
                  <description>frequency should be increased. Low priority interrupt. Interrupt is asserted, if FSVAIM=0. Interrupt is masked if MAXF = 1 (highest frequency).</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FSVAI_2</name>
                  <description>frequency should be decreased. Interrupt is asserted, if FSVAIM=0. Interrupt is masked if MINF= 1 (lowest frequency).</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FSVAI_3</name>
                  <description>frequency should be increased immediately. High priority interrupt. Interrupt is asserted, if FSVAIM=0. Interrupt is masked if MAXF = 1 (highest frequency).</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>FSVAIM</name>
              <description>DVFS Frequency adjustment interrupt mask</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>FSVAIM_0</name>
                  <description>interrupt is enabled.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FSVAIM_1</name>
                  <description>interrupt is masked.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PIRQS</name>
              <description>PIRQS - Pattern IRQ Source * write '1' to clear</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PIRQS_0</name>
                  <description>DVFS IRQ source was not from pattern</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PIRQS_1</name>
                  <description>DVFS IRQ source was from pattern</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DVFIS</name>
              <description>DVFS Interrupt select. These bits define destination of DVFS interrupts.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DVFIS_0</name>
                  <description>SDMA interrupt will be generated for DVFS events.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DVFIS_1</name>
                  <description>MCU interrupt will be generated for DVFS events.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>LBFL0</name>
              <description>Load buffer 0 - full status bit</description>
              <bitOffset>0x19</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LBFL0_0</name>
                  <description>Load buffer1 is not full.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LBFL0_1</name>
                  <description>Load buffer1 is full.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>LBFL1</name>
              <description>Load buffer 1 - full status bit</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LBFL1_0</name>
                  <description>Load buffer0 is not full.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LBFL1_1</name>
                  <description>Load buffer0 is full.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>LBMI</name>
              <description>Load buffer full mask interrupt</description>
              <bitOffset>0x1B</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DVFEV</name>
              <description>Always give a DVFS event.</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DVFEV_0</name>
                  <description>Do not give an event always.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DVFEV_1</name>
                  <description>Always give event.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DIV3CK</name>
              <description>DIV3CK - div_3_clk division ratio inside the DVFS module. According to the</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>DVFSLTR0_0</name>
          <description>DVFS Load Tracking Register 0, portion 0</description>
          <addressOffset>0x24</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>LTS0_0</name>
              <description>core 0 Load Tracking Sample 0</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>LTS0_1</name>
              <description>core 0 Load Tracking Sample 1</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>LTS0_2</name>
              <description>core 0 Load Tracking Sample 2</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>LTS0_3</name>
              <description>core 0 Load Tracking Sample 3</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>LTS0_4</name>
              <description>core 0 Load Tracking Sample 4</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>LTS0_5</name>
              <description>core 0 Load Tracking Sample 5</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>LTS0_6</name>
              <description>core 0 Load Tracking Sample 6</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>LTS0_7</name>
              <description>core 0 Load Tracking Sample 7</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>DVFSLTR0_1</name>
          <description>DVFS Load Tracking Register 0, portion 1</description>
          <addressOffset>0x28</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>LTS0_8</name>
              <description>core 0 Load Tracking Sample 8</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>LTS0_9</name>
              <description>core 0 Load Tracking Sample 9</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>LTS0_10</name>
              <description>core 0 Load Tracking Sample 10</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>LTS0_11</name>
              <description>core 0 Load Tracking Sample 11</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>LTS0_12</name>
              <description>core 0 Load Tracking Sample 12</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>LTS0_13</name>
              <description>core 0 Load Tracking Sample 13</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>LTS0_14</name>
              <description>core 0 Load Tracking Sample 14</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>LTS0_15</name>
              <description>core 0 Load Tracking Sample 15</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>DVFSLTR1_0</name>
          <description>DVFS Load Tracking Register 1, portion 0</description>
          <addressOffset>0x2C</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>LTS1_0</name>
              <description>core 0 Load Tracking Sample 0</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>LTS1_1</name>
              <description>core 0 Load Tracking Sample 1</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>LTS1_2</name>
              <description>core 0 Load Tracking Sample 2</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>LTS1_3</name>
              <description>core 0 Load Tracking Sample 3</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>LTS1_4</name>
              <description>core 0 Load Tracking Sample 4</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>LTS1_5</name>
              <description>core 0 Load Tracking Sample 5</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>LTS1_6</name>
              <description>core 0 Load Tracking Sample 6</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>LTS1_7</name>
              <description>core 0 Load Tracking Sample 7</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>DVFSLTR1_1</name>
          <description>DVFS Load Tracking Register 3, portion 1</description>
          <addressOffset>0x30</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>LTS1_8</name>
              <description>core 0 Load Tracking Sample 8</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>LTS1_9</name>
              <description>core 0 Load Tracking Sample 9</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>LTS1_10</name>
              <description>core 0 Load Tracking Sample 10</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>LTS1_11</name>
              <description>core 0 Load Tracking Sample 11</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>LTS1_12</name>
              <description>core 0 Load Tracking Sample 12</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>LTS1_13</name>
              <description>core 0 Load Tracking Sample 13</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>LTS1_14</name>
              <description>core 0 Load Tracking Sample 14</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>LTS1_15</name>
              <description>core 0 Load Tracking Sample 15</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>DVFSPT0</name>
          <description>DVFS pattern 0 length</description>
          <addressOffset>0x34</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>FPTN0</name>
              <description>FPTN0 - Frequency pattern 0 counter During period of this counter the frequency will be reduced from the EMA-detected level</description>
              <bitOffset>0</bitOffset>
              <bitWidth>17</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PT0A</name>
              <description>PT0A - Pattern 0 currently active (read-only)</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PT0A_0</name>
                  <description>non-active</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PT0A_1</name>
                  <description>active</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>DVFSPT1</name>
          <description>DVFS pattern 1 length</description>
          <addressOffset>0x38</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>FPTN1</name>
              <description>FPTN1 - Frequency pattern 1 counter During period of this counter the frequency will be set to the EMA-detected level</description>
              <bitOffset>0</bitOffset>
              <bitWidth>17</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PT1A</name>
              <description>PT1A - Pattern 1 currently active (read-only)</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PT1A_0</name>
                  <description>non-active</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PT1A_1</name>
                  <description>active</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>DVFSPT2</name>
          <description>DVFS pattern 2 length</description>
          <addressOffset>0x3C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>FPTN2</name>
              <description>FPTN2 - Frequency pattern 2 counter During period of this counter the frequency will be increased to higher, than detected by the EMA-detected level</description>
              <bitOffset>0</bitOffset>
              <bitWidth>17</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PT2A</name>
              <description>PT2A - Pattern 2 currently active (read-only)</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PT2A_0</name>
                  <description>non-active</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PT2A_1</name>
                  <description>active</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>P2THR</name>
              <description>P2THR - Pattern 2 Threshold Threshold of current DVFS load (after EMA), for generating interrupts with PFUS indicators 110, 111</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>DVFSPT3</name>
          <description>DVFS pattern 3 length</description>
          <addressOffset>0x40</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>FPTN3</name>
              <description>FPTN3 - Frequency pattern 3 counter During period of this counter the frequency will be set to the EMA-detected level</description>
              <bitOffset>0</bitOffset>
              <bitWidth>17</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PT3A</name>
              <description>PT3A - Pattern 3 currently active (read-only)</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PT3A_0</name>
                  <description>non-active</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PT3A_1</name>
                  <description>active</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
      </registers>
    </peripheral>
    <peripheral>
      <name>PGC</name>
      <description>PGC</description>
      <groupName>PGC</groupName>
      <prependToName>PGC_</prependToName>
      <baseAddress>0x20DC220</baseAddress>
      <addressBlock>
        <offset>0</offset>
        <size>0x90</size>
        <usage>registers</usage>
      </addressBlock>
      <registers>
        <register>
          <name>MEGA_CTRL</name>
          <description>PGC Mega Control Register</description>
          <addressOffset>0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>PCR</name>
              <description>Power Control PCR must not change from power-down request (pdn_req) assertion until the target subsystem is completely powered up</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PCR_0</name>
                  <description>Do not switch off power even if pdn_req is asserted.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PCR_1</name>
                  <description>Switch off power when pdn_req is asserted.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>MEGA_PUPSCR</name>
          <description>PGC Mega Power Up Sequence Control Register</description>
          <addressOffset>0x4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0xF01</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SW</name>
              <description>After a power-up request (pup_req assertion), the PGC waits a number of IPG clocks equal to the value of SW before asserting power toggle on/off signal (switch_b)</description>
              <bitOffset>0</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SW2ISO</name>
              <description>After asserting power toggle on/off signal (switch_b), the PGC waits a number of IPG clocks equal to the value of SW2ISO before negating isolation</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>MEGA_PDNSCR</name>
          <description>PGC Mega Pull Down Sequence Control Register</description>
          <addressOffset>0x8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x101</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ISO</name>
              <description>After a power-down request (pdn_req assertion), the PGC waits a number of IPG clocks equal to the value of ISO before asserting isolation</description>
              <bitOffset>0</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ISO2SW</name>
              <description>After asserting isolation, the PGC waits a number of IPG clocks equal to the value of ISO2SW before negating power toggle on/off signal (switch_b)</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>MEGA_SR</name>
          <description>PGC Mega Power Gating Controller Status Register</description>
          <addressOffset>0xC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>PSR</name>
              <description>Power status</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PSR_0</name>
                  <description>The target subsystem was not powered down for the previous power-down request.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PSR_1</name>
                  <description>The target subsystem was powered down for the previous power-down request.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>CPU_CTRL</name>
          <description>PGC CPU Control Register</description>
          <addressOffset>0x80</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>PCR</name>
              <description>Power Control PCR must not change from power-down request (pdn_req) assertion until the target subsystem is completely powered up</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PCR_0</name>
                  <description>Do not switch off power even if pdn_req is asserted.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PCR_1</name>
                  <description>Switch off power when pdn_req is asserted.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>CPU_PUPSCR</name>
          <description>PGC CPU Power Up Sequence Control Register</description>
          <addressOffset>0x84</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0xF01</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SW</name>
              <description>There are two different silicon revisions: 1</description>
              <bitOffset>0</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SW2ISO</name>
              <description>There are two different silicon revisions: 1</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CPU_PDNSCR</name>
          <description>PGC CPU Pull Down Sequence Control Register</description>
          <addressOffset>0x88</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x101</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ISO</name>
              <description>After a power-down request (pdn_req assertion), the PGC waits a number of 32k clocks equal to the value of ISO before asserting isolation</description>
              <bitOffset>0</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ISO2SW</name>
              <description>After asserting isolation, the PGC waits a number of 32k clocks equal to the value of ISO2SW before negating</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CPU_SR</name>
          <description>PGC CPU Power Gating Controller Status Register</description>
          <addressOffset>0x8C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>PSR</name>
              <description>Power status</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PSR_0</name>
                  <description>The target subsystem was not powered down for the previous power-down request.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PSR_1</name>
                  <description>The target subsystem was powered down for the previous power-down request.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
      </registers>
    </peripheral>
    <peripheral>
      <name>IOMUXC</name>
      <description>IOMUXC</description>
      <groupName>IOMUXC</groupName>
      <prependToName>IOMUXC_</prependToName>
      <baseAddress>0x20E0000</baseAddress>
      <addressBlock>
        <offset>0</offset>
        <size>0x6A0</size>
        <usage>registers</usage>
      </addressBlock>
      <registers>
        <register>
          <name>SW_MUX_CTL_PAD_JTAG_MOD</name>
          <description>SW_MUX_CTL_PAD_JTAG_MOD SW MUX Control Register</description>
          <addressOffset>0x44</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: SJC_MOD of instance: sjc</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: GPT2_CLK of instance: gpt2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT2</name>
                  <description>Select mux mode: ALT2 mux port: SPDIF_OUT of instance: spdif</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: ENET1_REF_CLK_25M of instance: enet1</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: CCM_PMIC_RDY of instance: ccm</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO1_IO10 of instance: gpio1</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT6</name>
                  <description>Select mux mode: ALT6 mux port: SDMA_EXT_EVENT00 of instance: sdma</description>
                  <value>0x6</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad JTAG_MOD</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_JTAG_TMS</name>
          <description>SW_MUX_CTL_PAD_JTAG_TMS SW MUX Control Register</description>
          <addressOffset>0x48</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: SJC_TMS of instance: sjc</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: GPT2_CAPTURE1 of instance: gpt2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT2</name>
                  <description>Select mux mode: ALT2 mux port: SAI2_MCLK of instance: sai2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: CCM_CLKO1 of instance: ccm</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: CCM_WAIT of instance: ccm</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO1_IO11 of instance: gpio1</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT6</name>
                  <description>Select mux mode: ALT6 mux port: SDMA_EXT_EVENT01 of instance: sdma</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: EPIT1_OUT of instance: epit1</description>
                  <value>0x8</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad JTAG_TMS</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_JTAG_TDO</name>
          <description>SW_MUX_CTL_PAD_JTAG_TDO SW MUX Control Register</description>
          <addressOffset>0x4C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: SJC_TDO of instance: sjc</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: GPT2_CAPTURE2 of instance: gpt2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT2</name>
                  <description>Select mux mode: ALT2 mux port: SAI2_TX_SYNC of instance: sai2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: CCM_CLKO2 of instance: ccm</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: CCM_STOP of instance: ccm</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO1_IO12 of instance: gpio1</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT6</name>
                  <description>Select mux mode: ALT6 mux port: MQS_RIGHT of instance: mqs</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: EPIT2_OUT of instance: epit2</description>
                  <value>0x8</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad JTAG_TDO</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_JTAG_TDI</name>
          <description>SW_MUX_CTL_PAD_JTAG_TDI SW MUX Control Register</description>
          <addressOffset>0x50</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: SJC_TDI of instance: sjc</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: GPT2_COMPARE1 of instance: gpt2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT2</name>
                  <description>Select mux mode: ALT2 mux port: SAI2_TX_BCLK of instance: sai2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: PWM6_OUT of instance: pwm6</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO1_IO13 of instance: gpio1</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT6</name>
                  <description>Select mux mode: ALT6 mux port: MQS_LEFT of instance: mqs</description>
                  <value>0x6</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad JTAG_TDI</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_JTAG_TCK</name>
          <description>SW_MUX_CTL_PAD_JTAG_TCK SW MUX Control Register</description>
          <addressOffset>0x54</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: SJC_TCK of instance: sjc</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: GPT2_COMPARE2 of instance: gpt2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT2</name>
                  <description>Select mux mode: ALT2 mux port: SAI2_RX_DATA of instance: sai2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: PWM7_OUT of instance: pwm7</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO1_IO14 of instance: gpio1</description>
                  <value>0x5</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad JTAG_TCK</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_JTAG_TRST_B</name>
          <description>SW_MUX_CTL_PAD_JTAG_TRST_B SW MUX Control Register</description>
          <addressOffset>0x58</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: SJC_TRSTB of instance: sjc</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: GPT2_COMPARE3 of instance: gpt2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT2</name>
                  <description>Select mux mode: ALT2 mux port: SAI2_TX_DATA of instance: sai2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: PWM8_OUT of instance: pwm8</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO1_IO15 of instance: gpio1</description>
                  <value>0x5</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad JTAG_TRST_B</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_GPIO1_IO00</name>
          <description>SW_MUX_CTL_PAD_GPIO1_IO00 SW MUX Control Register</description>
          <addressOffset>0x5C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: I2C2_SCL of instance: i2c2</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: GPT1_CAPTURE1 of instance: gpt1</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT2</name>
                  <description>Select mux mode: ALT2 mux port: ANATOP_OTG1_ID of instance: anatop</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: ENET1_REF_CLK1 of instance: enet1</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: MQS_RIGHT of instance: mqs</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO1_IO00 of instance: gpio1</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT6</name>
                  <description>Select mux mode: ALT6 mux port: ENET1_1588_EVENT0_IN of instance: enet1</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT7</name>
                  <description>Select mux mode: ALT7 mux port: SRC_SYSTEM_RESET of instance: src</description>
                  <value>0x7</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: WDOG3_WDOG_B of instance: wdog3</description>
                  <value>0x8</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad GPIO1_IO00</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_GPIO1_IO01</name>
          <description>SW_MUX_CTL_PAD_GPIO1_IO01 SW MUX Control Register</description>
          <addressOffset>0x60</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: I2C2_SDA of instance: i2c2</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: GPT1_COMPARE1 of instance: gpt1</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT2</name>
                  <description>Select mux mode: ALT2 mux port: USB_OTG1_OC of instance: usb</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: ENET2_REF_CLK2 of instance: enet2</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: MQS_LEFT of instance: mqs</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO1_IO01 of instance: gpio1</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT6</name>
                  <description>Select mux mode: ALT6 mux port: ENET1_1588_EVENT0_OUT of instance: enet1</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT7</name>
                  <description>Select mux mode: ALT7 mux port: SRC_EARLY_RESET of instance: src</description>
                  <value>0x7</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: WDOG1_WDOG_B of instance: wdog1</description>
                  <value>0x8</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad GPIO1_IO01</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_GPIO1_IO02</name>
          <description>SW_MUX_CTL_PAD_GPIO1_IO02 SW MUX Control Register</description>
          <addressOffset>0x64</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: I2C1_SCL of instance: i2c1</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: GPT1_COMPARE2 of instance: gpt1</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT2</name>
                  <description>Select mux mode: ALT2 mux port: USB_OTG2_PWR of instance: usb</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: ENET1_REF_CLK_25M of instance: enet1</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: USDHC1_WP of instance: usdhc1</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO1_IO02 of instance: gpio1</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT6</name>
                  <description>Select mux mode: ALT6 mux port: SDMA_EXT_EVENT00 of instance: sdma</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT7</name>
                  <description>Select mux mode: ALT7 mux port: SRC_ANY_PU_RESET of instance: src</description>
                  <value>0x7</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: UART1_TX of instance: uart1</description>
                  <value>0x8</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad GPIO1_IO02</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_GPIO1_IO03</name>
          <description>SW_MUX_CTL_PAD_GPIO1_IO03 SW MUX Control Register</description>
          <addressOffset>0x68</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: I2C1_SDA of instance: i2c1</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: GPT1_COMPARE3 of instance: gpt1</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT2</name>
                  <description>Select mux mode: ALT2 mux port: USB_OTG2_OC of instance: usb</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: USDHC1_CD_B of instance: usdhc1</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO1_IO03 of instance: gpio1</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT6</name>
                  <description>Select mux mode: ALT6 mux port: CCM_DI0_EXT_CLK of instance: ccm</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT7</name>
                  <description>Select mux mode: ALT7 mux port: SRC_TESTER_ACK of instance: src ALT7 mode will be automatically active when system reset. The PAD setting will be 100 K pull down and input enable during reset period. Once system reset is completed, the state of GPIO1_IO03 will be output keeper and input enable.</description>
                  <value>0x7</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: UART1_RX of instance: uart1</description>
                  <value>0x8</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad GPIO1_IO03</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_GPIO1_IO04</name>
          <description>SW_MUX_CTL_PAD_GPIO1_IO04 SW MUX Control Register</description>
          <addressOffset>0x6C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: ENET1_REF_CLK1 of instance: enet1</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: PWM3_OUT of instance: pwm3</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT2</name>
                  <description>Select mux mode: ALT2 mux port: USB_OTG1_PWR of instance: usb</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: USDHC1_RESET_B of instance: usdhc1</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO1_IO04 of instance: gpio1</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT6</name>
                  <description>Select mux mode: ALT6 mux port: ENET2_1588_EVENT0_IN of instance: enet2</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: UART5_TX of instance: uart5</description>
                  <value>0x8</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad GPIO1_IO04</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_GPIO1_IO05</name>
          <description>SW_MUX_CTL_PAD_GPIO1_IO05 SW MUX Control Register</description>
          <addressOffset>0x70</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: ENET2_REF_CLK2 of instance: enet2</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: PWM4_OUT of instance: pwm4</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT2</name>
                  <description>Select mux mode: ALT2 mux port: ANATOP_OTG2_ID of instance: anatop</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: CSI_FIELD of instance: csi</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: USDHC1_VSELECT of instance: usdhc1</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO1_IO05 of instance: gpio1</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT6</name>
                  <description>Select mux mode: ALT6 mux port: ENET2_1588_EVENT0_OUT of instance: enet2</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: UART5_RX of instance: uart5</description>
                  <value>0x8</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad GPIO1_IO05</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_GPIO1_IO06</name>
          <description>SW_MUX_CTL_PAD_GPIO1_IO06 SW MUX Control Register</description>
          <addressOffset>0x74</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: ENET1_MDIO of instance: enet1</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: ENET2_MDIO of instance: enet2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT2</name>
                  <description>Select mux mode: ALT2 mux port: USB_OTG_PWR_WAKE of instance: usb</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: CSI_MCLK of instance: csi</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: USDHC2_WP of instance: usdhc2</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO1_IO06 of instance: gpio1</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT6</name>
                  <description>Select mux mode: ALT6 mux port: CCM_WAIT of instance: ccm</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT7</name>
                  <description>Select mux mode: ALT7 mux port: CCM_REF_EN_B of instance: ccm</description>
                  <value>0x7</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: UART1_CTS_B of instance: uart1</description>
                  <value>0x8</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad GPIO1_IO06</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_GPIO1_IO07</name>
          <description>SW_MUX_CTL_PAD_GPIO1_IO07 SW MUX Control Register</description>
          <addressOffset>0x78</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: ENET1_MDC of instance: enet1</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: ENET2_MDC of instance: enet2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT2</name>
                  <description>Select mux mode: ALT2 mux port: USB_OTG_HOST_MODE of instance: usb</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: CSI_PIXCLK of instance: csi</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: USDHC2_CD_B of instance: usdhc2</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO1_IO07 of instance: gpio1</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT6</name>
                  <description>Select mux mode: ALT6 mux port: CCM_STOP of instance: ccm</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: UART1_RTS_B of instance: uart1</description>
                  <value>0x8</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad GPIO1_IO07</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_GPIO1_IO08</name>
          <description>SW_MUX_CTL_PAD_GPIO1_IO08 SW MUX Control Register</description>
          <addressOffset>0x7C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: PWM1_OUT of instance: pwm1</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: WDOG1_WDOG_B of instance: wdog1</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT2</name>
                  <description>Select mux mode: ALT2 mux port: SPDIF_OUT of instance: spdif</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: CSI_VSYNC of instance: csi</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: USDHC2_VSELECT of instance: usdhc2</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO1_IO08 of instance: gpio1</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT6</name>
                  <description>Select mux mode: ALT6 mux port: CCM_PMIC_RDY of instance: ccm</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: UART5_RTS_B of instance: uart5</description>
                  <value>0x8</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad GPIO1_IO08</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_GPIO1_IO09</name>
          <description>SW_MUX_CTL_PAD_GPIO1_IO09 SW MUX Control Register</description>
          <addressOffset>0x80</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: PWM2_OUT of instance: pwm2</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: WDOG1_WDOG_ANY of instance: wdog1</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT2</name>
                  <description>Select mux mode: ALT2 mux port: SPDIF_IN of instance: spdif</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: CSI_HSYNC of instance: csi</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: USDHC2_RESET_B of instance: usdhc2</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO1_IO09 of instance: gpio1</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT6</name>
                  <description>Select mux mode: ALT6 mux port: USDHC1_RESET_B of instance: usdhc1</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: UART5_CTS_B of instance: uart5</description>
                  <value>0x8</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad GPIO1_IO09</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_UART1_TX_DATA</name>
          <description>SW_MUX_CTL_PAD_UART1_TX_DATA SW MUX Control Register</description>
          <addressOffset>0x84</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: UART1_TX of instance: uart1</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: ENET1_RDATA02 of instance: enet1</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT2</name>
                  <description>Select mux mode: ALT2 mux port: I2C3_SCL of instance: i2c3</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: CSI_DATA02 of instance: csi</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: GPT1_COMPARE1 of instance: gpt1</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO1_IO16 of instance: gpio1</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: SPDIF_OUT of instance: spdif</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT9</name>
                  <description>Select mux mode: ALT9 mux port: UART5_TX of instance: uart5</description>
                  <value>0x9</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad UART1_TX_DATA</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_UART1_RX_DATA</name>
          <description>SW_MUX_CTL_PAD_UART1_RX_DATA SW MUX Control Register</description>
          <addressOffset>0x88</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: UART1_RX of instance: uart1</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: ENET1_RDATA03 of instance: enet1</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT2</name>
                  <description>Select mux mode: ALT2 mux port: I2C3_SDA of instance: i2c3</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: CSI_DATA03 of instance: csi</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: GPT1_CLK of instance: gpt1</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO1_IO17 of instance: gpio1</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: SPDIF_IN of instance: spdif</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT9</name>
                  <description>Select mux mode: ALT9 mux port: UART5_RX of instance: uart5</description>
                  <value>0x9</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad UART1_RX_DATA</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_UART1_CTS_B</name>
          <description>SW_MUX_CTL_PAD_UART1_CTS_B SW MUX Control Register</description>
          <addressOffset>0x8C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: UART1_CTS_B of instance: uart1</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: ENET1_RX_CLK of instance: enet1</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT2</name>
                  <description>Select mux mode: ALT2 mux port: USDHC1_WP of instance: usdhc1</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: CSI_DATA04 of instance: csi</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: ENET2_1588_EVENT1_IN of instance: enet2</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO1_IO18 of instance: gpio1</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: USDHC2_WP of instance: usdhc2</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT9</name>
                  <description>Select mux mode: ALT9 mux port: UART5_CTS_B of instance: uart5</description>
                  <value>0x9</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad UART1_CTS_B</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_UART1_RTS_B</name>
          <description>SW_MUX_CTL_PAD_UART1_RTS_B SW MUX Control Register</description>
          <addressOffset>0x90</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: UART1_RTS_B of instance: uart1</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: ENET1_TX_ER of instance: enet1</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT2</name>
                  <description>Select mux mode: ALT2 mux port: USDHC1_CD_B of instance: usdhc1</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: CSI_DATA05 of instance: csi</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: ENET2_1588_EVENT1_OUT of instance: enet2</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO1_IO19 of instance: gpio1</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: USDHC2_CD_B of instance: usdhc2</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT9</name>
                  <description>Select mux mode: ALT9 mux port: UART5_RTS_B of instance: uart5</description>
                  <value>0x9</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad UART1_RTS_B</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_UART2_TX_DATA</name>
          <description>SW_MUX_CTL_PAD_UART2_TX_DATA SW MUX Control Register</description>
          <addressOffset>0x94</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: UART2_TX of instance: uart2</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: ENET1_TDATA02 of instance: enet1</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT2</name>
                  <description>Select mux mode: ALT2 mux port: I2C4_SCL of instance: i2c4</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: CSI_DATA06 of instance: csi</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: GPT1_CAPTURE1 of instance: gpt1</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO1_IO20 of instance: gpio1</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: ECSPI3_SS0 of instance: ecspi3</description>
                  <value>0x8</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad UART2_TX_DATA</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_UART2_RX_DATA</name>
          <description>SW_MUX_CTL_PAD_UART2_RX_DATA SW MUX Control Register</description>
          <addressOffset>0x98</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: UART2_RX of instance: uart2</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: ENET1_TDATA03 of instance: enet1</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT2</name>
                  <description>Select mux mode: ALT2 mux port: I2C4_SDA of instance: i2c4</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: CSI_DATA07 of instance: csi</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: GPT1_CAPTURE2 of instance: gpt1</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO1_IO21 of instance: gpio1</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT7</name>
                  <description>Select mux mode: ALT7 mux port: SJC_DONE of instance: sjc</description>
                  <value>0x7</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: ECSPI3_SCLK of instance: ecspi3</description>
                  <value>0x8</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad UART2_RX_DATA</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_UART2_CTS_B</name>
          <description>SW_MUX_CTL_PAD_UART2_CTS_B SW MUX Control Register</description>
          <addressOffset>0x9C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: UART2_CTS_B of instance: uart2</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: ENET1_CRS of instance: enet1</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT2</name>
                  <description>Select mux mode: ALT2 mux port: FLEXCAN2_TX of instance: flexcan2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: CSI_DATA08 of instance: csi</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: GPT1_COMPARE2 of instance: gpt1</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO1_IO22 of instance: gpio1</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT7</name>
                  <description>Select mux mode: ALT7 mux port: SJC_DE_B of instance: sjc</description>
                  <value>0x7</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: ECSPI3_MOSI of instance: ecspi3</description>
                  <value>0x8</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad UART2_CTS_B</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_UART2_RTS_B</name>
          <description>SW_MUX_CTL_PAD_UART2_RTS_B SW MUX Control Register</description>
          <addressOffset>0xA0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: UART2_RTS_B of instance: uart2</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: ENET1_COL of instance: enet1</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT2</name>
                  <description>Select mux mode: ALT2 mux port: FLEXCAN2_RX of instance: flexcan2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: CSI_DATA09 of instance: csi</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: GPT1_COMPARE3 of instance: gpt1</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO1_IO23 of instance: gpio1</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT7</name>
                  <description>Select mux mode: ALT7 mux port: SJC_FAIL of instance: sjc</description>
                  <value>0x7</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: ECSPI3_MISO of instance: ecspi3</description>
                  <value>0x8</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad UART2_RTS_B</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_UART3_TX_DATA</name>
          <description>SW_MUX_CTL_PAD_UART3_TX_DATA SW MUX Control Register</description>
          <addressOffset>0xA4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: UART3_TX of instance: uart3</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: ENET2_RDATA02 of instance: enet2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: CSI_DATA01 of instance: csi</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: UART2_CTS_B of instance: uart2</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO1_IO24 of instance: gpio1</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT7</name>
                  <description>Select mux mode: ALT7 mux port: SJC_JTAG_ACT of instance: sjc ALT7 mode will be automatically active (output SJC.SJC_JTAG_ACT) when system reset. Once system reset is completed, the state of UART3_TX_DATA will be output keeper and input enenable.</description>
                  <value>0x7</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: ANATOP_OTG1_ID of instance: anatop</description>
                  <value>0x8</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad UART3_TX_DATA</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_UART3_RX_DATA</name>
          <description>SW_MUX_CTL_PAD_UART3_RX_DATA SW MUX Control Register</description>
          <addressOffset>0xA8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: UART3_RX of instance: uart3</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: ENET2_RDATA03 of instance: enet2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: CSI_DATA00 of instance: csi</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: UART2_RTS_B of instance: uart2</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO1_IO25 of instance: gpio1</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: EPIT1_OUT of instance: epit1</description>
                  <value>0x8</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad UART3_RX_DATA</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_UART3_CTS_B</name>
          <description>SW_MUX_CTL_PAD_UART3_CTS_B SW MUX Control Register</description>
          <addressOffset>0xAC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: UART3_CTS_B of instance: uart3</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: ENET2_RX_CLK of instance: enet2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT2</name>
                  <description>Select mux mode: ALT2 mux port: FLEXCAN1_TX of instance: flexcan1</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: CSI_DATA10 of instance: csi</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: ENET1_1588_EVENT1_IN of instance: enet1</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO1_IO26 of instance: gpio1</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: EPIT2_OUT of instance: epit2</description>
                  <value>0x8</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad UART3_CTS_B</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_UART3_RTS_B</name>
          <description>SW_MUX_CTL_PAD_UART3_RTS_B SW MUX Control Register</description>
          <addressOffset>0xB0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: UART3_RTS_B of instance: uart3</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: ENET2_TX_ER of instance: enet2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT2</name>
                  <description>Select mux mode: ALT2 mux port: FLEXCAN1_RX of instance: flexcan1</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: CSI_DATA11 of instance: csi</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: ENET1_1588_EVENT1_OUT of instance: enet1</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO1_IO27 of instance: gpio1</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: WDOG1_WDOG_B of instance: wdog1</description>
                  <value>0x8</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad UART3_RTS_B</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_UART4_TX_DATA</name>
          <description>SW_MUX_CTL_PAD_UART4_TX_DATA SW MUX Control Register</description>
          <addressOffset>0xB4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: UART4_TX of instance: uart4</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: ENET2_TDATA02 of instance: enet2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT2</name>
                  <description>Select mux mode: ALT2 mux port: I2C1_SCL of instance: i2c1</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: CSI_DATA12 of instance: csi</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: CSU_CSU_ALARM_AUT02 of instance: csu</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO1_IO28 of instance: gpio1</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: ECSPI2_SCLK of instance: ecspi2</description>
                  <value>0x8</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad UART4_TX_DATA</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_UART4_RX_DATA</name>
          <description>SW_MUX_CTL_PAD_UART4_RX_DATA SW MUX Control Register</description>
          <addressOffset>0xB8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: UART4_RX of instance: uart4</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: ENET2_TDATA03 of instance: enet2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT2</name>
                  <description>Select mux mode: ALT2 mux port: I2C1_SDA of instance: i2c1</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: CSI_DATA13 of instance: csi</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: CSU_CSU_ALARM_AUT01 of instance: csu</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO1_IO29 of instance: gpio1</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: ECSPI2_SS0 of instance: ecspi2</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT9</name>
                  <description>Select mux mode: ALT9 mux port: EPDC_PWRCTRL01 of instance: epdc</description>
                  <value>0x9</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad UART4_RX_DATA</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_UART5_TX_DATA</name>
          <description>SW_MUX_CTL_PAD_UART5_TX_DATA SW MUX Control Register</description>
          <addressOffset>0xBC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: UART5_TX of instance: uart5</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: ENET2_CRS of instance: enet2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT2</name>
                  <description>Select mux mode: ALT2 mux port: I2C2_SCL of instance: i2c2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: CSI_DATA14 of instance: csi</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: CSU_CSU_ALARM_AUT00 of instance: csu</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO1_IO30 of instance: gpio1</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: ECSPI2_MOSI of instance: ecspi2</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT9</name>
                  <description>Select mux mode: ALT9 mux port: EPDC_PWRCTRL02 of instance: epdc</description>
                  <value>0x9</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad UART5_TX_DATA</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_UART5_RX_DATA</name>
          <description>SW_MUX_CTL_PAD_UART5_RX_DATA SW MUX Control Register</description>
          <addressOffset>0xC0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: UART5_RX of instance: uart5</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: ENET2_COL of instance: enet2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT2</name>
                  <description>Select mux mode: ALT2 mux port: I2C2_SDA of instance: i2c2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: CSI_DATA15 of instance: csi</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: CSU_CSU_INT_DEB of instance: csu</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO1_IO31 of instance: gpio1</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: ECSPI2_MISO of instance: ecspi2</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT9</name>
                  <description>Select mux mode: ALT9 mux port: EPDC_PWRCTRL03 of instance: epdc</description>
                  <value>0x9</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad UART5_RX_DATA</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_ENET1_RX_DATA0</name>
          <description>SW_MUX_CTL_PAD_ENET1_RX_DATA0 SW MUX Control Register</description>
          <addressOffset>0xC4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: ENET1_RDATA00 of instance: enet1</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: UART4_RTS_B of instance: uart4</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT2</name>
                  <description>Select mux mode: ALT2 mux port: PWM1_OUT of instance: pwm1</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: CSI_DATA16 of instance: csi</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: FLEXCAN1_TX of instance: flexcan1</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO2_IO00 of instance: gpio2</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT6</name>
                  <description>Select mux mode: ALT6 mux port: KPP_ROW00 of instance: kpp</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: USDHC1_LCTL of instance: usdhc1</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT9</name>
                  <description>Select mux mode: ALT9 mux port: EPDC_SDCE04 of instance: epdc</description>
                  <value>0x9</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad ENET1_RX_DATA0</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_ENET1_RX_DATA1</name>
          <description>SW_MUX_CTL_PAD_ENET1_RX_DATA1 SW MUX Control Register</description>
          <addressOffset>0xC8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: ENET1_RDATA01 of instance: enet1</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: UART4_CTS_B of instance: uart4</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT2</name>
                  <description>Select mux mode: ALT2 mux port: PWM2_OUT of instance: pwm2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: CSI_DATA17 of instance: csi</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: FLEXCAN1_RX of instance: flexcan1</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO2_IO01 of instance: gpio2</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT6</name>
                  <description>Select mux mode: ALT6 mux port: KPP_COL00 of instance: kpp</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: USDHC2_LCTL of instance: usdhc2</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT9</name>
                  <description>Select mux mode: ALT9 mux port: EPDC_SDCE05 of instance: epdc</description>
                  <value>0x9</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad ENET1_RX_DATA1</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_ENET1_RX_EN</name>
          <description>SW_MUX_CTL_PAD_ENET1_RX_EN SW MUX Control Register</description>
          <addressOffset>0xCC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: ENET1_RX_EN of instance: enet1</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: UART5_RTS_B of instance: uart5</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: CSI_DATA18 of instance: csi</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: FLEXCAN2_TX of instance: flexcan2</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO2_IO02 of instance: gpio2</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT6</name>
                  <description>Select mux mode: ALT6 mux port: KPP_ROW01 of instance: kpp</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: USDHC1_VSELECT of instance: usdhc1</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT9</name>
                  <description>Select mux mode: ALT9 mux port: EPDC_SDCE06 of instance: epdc</description>
                  <value>0x9</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad ENET1_RX_EN</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_ENET1_TX_DATA0</name>
          <description>SW_MUX_CTL_PAD_ENET1_TX_DATA0 SW MUX Control Register</description>
          <addressOffset>0xD0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: ENET1_TDATA00 of instance: enet1</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: UART5_CTS_B of instance: uart5</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: CSI_DATA19 of instance: csi</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: FLEXCAN2_RX of instance: flexcan2</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO2_IO03 of instance: gpio2</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT6</name>
                  <description>Select mux mode: ALT6 mux port: KPP_COL01 of instance: kpp</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: USDHC2_VSELECT of instance: usdhc2</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT9</name>
                  <description>Select mux mode: ALT9 mux port: EPDC_SDCE07 of instance: epdc</description>
                  <value>0x9</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad ENET1_TX_DATA0</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_ENET1_TX_DATA1</name>
          <description>SW_MUX_CTL_PAD_ENET1_TX_DATA1 SW MUX Control Register</description>
          <addressOffset>0xD4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: ENET1_TDATA01 of instance: enet1</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: UART6_CTS_B of instance: uart6</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT2</name>
                  <description>Select mux mode: ALT2 mux port: PWM5_OUT of instance: pwm5</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: CSI_DATA20 of instance: csi</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: ENET2_MDIO of instance: enet2</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO2_IO04 of instance: gpio2</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT6</name>
                  <description>Select mux mode: ALT6 mux port: KPP_ROW02 of instance: kpp</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: WDOG1_WDOG_RST_B_DEB of instance: wdog1</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT9</name>
                  <description>Select mux mode: ALT9 mux port: EPDC_SDCE08 of instance: epdc</description>
                  <value>0x9</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad ENET1_TX_DATA1</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_ENET1_TX_EN</name>
          <description>SW_MUX_CTL_PAD_ENET1_TX_EN SW MUX Control Register</description>
          <addressOffset>0xD8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: ENET1_TX_EN of instance: enet1</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: UART6_RTS_B of instance: uart6</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT2</name>
                  <description>Select mux mode: ALT2 mux port: PWM6_OUT of instance: pwm6</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: CSI_DATA21 of instance: csi</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: ENET2_MDC of instance: enet2</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO2_IO05 of instance: gpio2</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT6</name>
                  <description>Select mux mode: ALT6 mux port: KPP_COL02 of instance: kpp</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: WDOG2_WDOG_RST_B_DEB of instance: wdog2</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT9</name>
                  <description>Select mux mode: ALT9 mux port: EPDC_SDCE09 of instance: epdc</description>
                  <value>0x9</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad ENET1_TX_EN</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_ENET1_TX_CLK</name>
          <description>SW_MUX_CTL_PAD_ENET1_TX_CLK SW MUX Control Register</description>
          <addressOffset>0xDC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: ENET1_TX_CLK of instance: enet1</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: UART7_CTS_B of instance: uart7</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT2</name>
                  <description>Select mux mode: ALT2 mux port: PWM7_OUT of instance: pwm7</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: CSI_DATA22 of instance: csi</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: ENET1_REF_CLK1 of instance: enet1</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO2_IO06 of instance: gpio2</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT6</name>
                  <description>Select mux mode: ALT6 mux port: KPP_ROW03 of instance: kpp</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: GPT1_CLK of instance: gpt1</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT9</name>
                  <description>Select mux mode: ALT9 mux port: EPDC_SDOED of instance: epdc</description>
                  <value>0x9</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad ENET1_TX_CLK</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_ENET1_RX_ER</name>
          <description>SW_MUX_CTL_PAD_ENET1_RX_ER SW MUX Control Register</description>
          <addressOffset>0xE0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: ENET1_RX_ER of instance: enet1</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: UART7_RTS_B of instance: uart7</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT2</name>
                  <description>Select mux mode: ALT2 mux port: PWM8_OUT of instance: pwm8</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: CSI_DATA23 of instance: csi</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: EIM_CRE of instance: eim</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO2_IO07 of instance: gpio2</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT6</name>
                  <description>Select mux mode: ALT6 mux port: KPP_COL03 of instance: kpp</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: GPT1_CAPTURE2 of instance: gpt1</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT9</name>
                  <description>Select mux mode: ALT9 mux port: EPDC_SDOEZ of instance: epdc</description>
                  <value>0x9</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad ENET1_RX_ER</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_ENET2_RX_DATA0</name>
          <description>SW_MUX_CTL_PAD_ENET2_RX_DATA0 SW MUX Control Register</description>
          <addressOffset>0xE4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: ENET2_RDATA00 of instance: enet2</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: UART6_TX of instance: uart6</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: I2C3_SCL of instance: i2c3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: ENET1_MDIO of instance: enet1</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO2_IO08 of instance: gpio2</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT6</name>
                  <description>Select mux mode: ALT6 mux port: KPP_ROW04 of instance: kpp</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: USB_OTG1_PWR of instance: usb</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT9</name>
                  <description>Select mux mode: ALT9 mux port: EPDC_SDDO08 of instance: epdc</description>
                  <value>0x9</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad ENET2_RX_DATA0</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_ENET2_RX_DATA1</name>
          <description>SW_MUX_CTL_PAD_ENET2_RX_DATA1 SW MUX Control Register</description>
          <addressOffset>0xE8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: ENET2_RDATA01 of instance: enet2</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: UART6_RX of instance: uart6</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: I2C3_SDA of instance: i2c3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: ENET1_MDC of instance: enet1</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO2_IO09 of instance: gpio2</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT6</name>
                  <description>Select mux mode: ALT6 mux port: KPP_COL04 of instance: kpp</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: USB_OTG1_OC of instance: usb</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT9</name>
                  <description>Select mux mode: ALT9 mux port: EPDC_SDDO09 of instance: epdc</description>
                  <value>0x9</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad ENET2_RX_DATA1</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_ENET2_RX_EN</name>
          <description>SW_MUX_CTL_PAD_ENET2_RX_EN SW MUX Control Register</description>
          <addressOffset>0xEC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: ENET2_RX_EN of instance: enet2</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: UART7_TX of instance: uart7</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: I2C4_SCL of instance: i2c4</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: EIM_ADDR26 of instance: eim</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO2_IO10 of instance: gpio2</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT6</name>
                  <description>Select mux mode: ALT6 mux port: KPP_ROW05 of instance: kpp</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: ENET1_REF_CLK_25M of instance: enet1</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT9</name>
                  <description>Select mux mode: ALT9 mux port: EPDC_SDDO10 of instance: epdc</description>
                  <value>0x9</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad ENET2_RX_EN</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_ENET2_TX_DATA0</name>
          <description>SW_MUX_CTL_PAD_ENET2_TX_DATA0 SW MUX Control Register</description>
          <addressOffset>0xF0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: ENET2_TDATA00 of instance: enet2</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: UART7_RX of instance: uart7</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: I2C4_SDA of instance: i2c4</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: EIM_EB_B02 of instance: eim</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO2_IO11 of instance: gpio2</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT6</name>
                  <description>Select mux mode: ALT6 mux port: KPP_COL05 of instance: kpp</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT9</name>
                  <description>Select mux mode: ALT9 mux port: EPDC_SDDO11 of instance: epdc</description>
                  <value>0x9</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad ENET2_TX_DATA0</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_ENET2_TX_DATA1</name>
          <description>SW_MUX_CTL_PAD_ENET2_TX_DATA1 SW MUX Control Register</description>
          <addressOffset>0xF4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: ENET2_TDATA01 of instance: enet2</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: UART8_TX of instance: uart8</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: ECSPI4_SCLK of instance: ecspi4</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: EIM_EB_B03 of instance: eim</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO2_IO12 of instance: gpio2</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT6</name>
                  <description>Select mux mode: ALT6 mux port: KPP_ROW06 of instance: kpp</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: USB_OTG2_PWR of instance: usb</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT9</name>
                  <description>Select mux mode: ALT9 mux port: EPDC_SDDO12 of instance: epdc</description>
                  <value>0x9</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad ENET2_TX_DATA1</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_ENET2_TX_EN</name>
          <description>SW_MUX_CTL_PAD_ENET2_TX_EN SW MUX Control Register</description>
          <addressOffset>0xF8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: ENET2_TX_EN of instance: enet2</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: UART8_RX of instance: uart8</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: ECSPI4_MOSI of instance: ecspi4</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: EIM_ACLK_FREERUN of instance: eim</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO2_IO13 of instance: gpio2</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT6</name>
                  <description>Select mux mode: ALT6 mux port: KPP_COL06 of instance: kpp</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: USB_OTG2_OC of instance: usb</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT9</name>
                  <description>Select mux mode: ALT9 mux port: EPDC_SDDO13 of instance: epdc</description>
                  <value>0x9</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad ENET2_TX_EN</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_ENET2_TX_CLK</name>
          <description>SW_MUX_CTL_PAD_ENET2_TX_CLK SW MUX Control Register</description>
          <addressOffset>0xFC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: ENET2_TX_CLK of instance: enet2</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: UART8_CTS_B of instance: uart8</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: ECSPI4_MISO of instance: ecspi4</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: ENET2_REF_CLK2 of instance: enet2</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO2_IO14 of instance: gpio2</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT6</name>
                  <description>Select mux mode: ALT6 mux port: KPP_ROW07 of instance: kpp</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: ANATOP_OTG2_ID of instance: anatop</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT9</name>
                  <description>Select mux mode: ALT9 mux port: EPDC_SDDO14 of instance: epdc</description>
                  <value>0x9</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad ENET2_TX_CLK</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_ENET2_RX_ER</name>
          <description>SW_MUX_CTL_PAD_ENET2_RX_ER SW MUX Control Register</description>
          <addressOffset>0x100</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: ENET2_RX_ER of instance: enet2</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: UART8_RTS_B of instance: uart8</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: ECSPI4_SS0 of instance: ecspi4</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: EIM_ADDR25 of instance: eim</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO2_IO15 of instance: gpio2</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT6</name>
                  <description>Select mux mode: ALT6 mux port: KPP_COL07 of instance: kpp</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: WDOG1_WDOG_ANY of instance: wdog1</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT9</name>
                  <description>Select mux mode: ALT9 mux port: EPDC_SDDO15 of instance: epdc</description>
                  <value>0x9</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad ENET2_RX_ER</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_LCD_CLK</name>
          <description>SW_MUX_CTL_PAD_LCD_CLK SW MUX Control Register</description>
          <addressOffset>0x104</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: LCDIF_CLK of instance: lcdif</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: LCDIF_WR_RWN of instance: lcdif</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT2</name>
                  <description>Select mux mode: ALT2 mux port: UART4_TX of instance: uart4</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: SAI3_MCLK of instance: sai3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: EIM_CS2_B of instance: eim</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO3_IO00 of instance: gpio3</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: WDOG1_WDOG_RST_B_DEB of instance: wdog1</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT9</name>
                  <description>Select mux mode: ALT9 mux port: EPDC_SDCLK of instance: epdc</description>
                  <value>0x9</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad LCD_CLK</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_LCD_ENABLE</name>
          <description>SW_MUX_CTL_PAD_LCD_ENABLE SW MUX Control Register</description>
          <addressOffset>0x108</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: LCDIF_ENABLE of instance: lcdif</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: LCDIF_RD_E of instance: lcdif</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT2</name>
                  <description>Select mux mode: ALT2 mux port: UART4_RX of instance: uart4</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: SAI3_TX_SYNC of instance: sai3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: EIM_CS3_B of instance: eim</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO3_IO01 of instance: gpio3</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: ECSPI2_RDY of instance: ecspi2</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT9</name>
                  <description>Select mux mode: ALT9 mux port: EPDC_SDLE of instance: epdc</description>
                  <value>0x9</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad LCD_ENABLE</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_LCD_HSYNC</name>
          <description>SW_MUX_CTL_PAD_LCD_HSYNC SW MUX Control Register</description>
          <addressOffset>0x10C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: LCDIF_HSYNC of instance: lcdif</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: LCDIF_RS of instance: lcdif</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT2</name>
                  <description>Select mux mode: ALT2 mux port: UART4_CTS_B of instance: uart4</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: SAI3_TX_BCLK of instance: sai3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: WDOG3_WDOG_RST_B_DEB of instance: wdog3</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO3_IO02 of instance: gpio3</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: ECSPI2_SS1 of instance: ecspi2</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT9</name>
                  <description>Select mux mode: ALT9 mux port: EPDC_SDOE of instance: epdc</description>
                  <value>0x9</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad LCD_HSYNC</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_LCD_VSYNC</name>
          <description>SW_MUX_CTL_PAD_LCD_VSYNC SW MUX Control Register</description>
          <addressOffset>0x110</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: LCDIF_VSYNC of instance: lcdif</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: LCDIF_BUSY of instance: lcdif</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT2</name>
                  <description>Select mux mode: ALT2 mux port: UART4_RTS_B of instance: uart4</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: SAI3_RX_DATA of instance: sai3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: WDOG2_WDOG_B of instance: wdog2</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO3_IO03 of instance: gpio3</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: ECSPI2_SS2 of instance: ecspi2</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT9</name>
                  <description>Select mux mode: ALT9 mux port: EPDC_SDCE00 of instance: epdc</description>
                  <value>0x9</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad LCD_VSYNC</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_LCD_RESET</name>
          <description>SW_MUX_CTL_PAD_LCD_RESET SW MUX Control Register</description>
          <addressOffset>0x114</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: LCDIF_RESET of instance: lcdif</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: LCDIF_CS of instance: lcdif</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT2</name>
                  <description>Select mux mode: ALT2 mux port: CA7_MX6ULL_EVENTI of instance: ca7_mx6ull</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: SAI3_TX_DATA of instance: sai3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: WDOG1_WDOG_ANY of instance: wdog1</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO3_IO04 of instance: gpio3</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: ECSPI2_SS3 of instance: ecspi2</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT9</name>
                  <description>Select mux mode: ALT9 mux port: EPDC_GDOE of instance: epdc</description>
                  <value>0x9</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad LCD_RESET</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_LCD_DATA00</name>
          <description>SW_MUX_CTL_PAD_LCD_DATA00 SW MUX Control Register</description>
          <addressOffset>0x118</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: LCDIF_DATA00 of instance: lcdif</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: PWM1_OUT of instance: pwm1</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: ENET1_1588_EVENT2_IN of instance: enet1</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: I2C3_SDA of instance: i2c3</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO3_IO05 of instance: gpio3</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT6</name>
                  <description>Select mux mode: ALT6 mux port: SRC_BT_CFG00 of instance: src</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: SAI1_MCLK of instance: sai1</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT9</name>
                  <description>Select mux mode: ALT9 mux port: EPDC_SDDO00 of instance: epdc</description>
                  <value>0x9</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad LCD_DATA00</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_LCD_DATA01</name>
          <description>SW_MUX_CTL_PAD_LCD_DATA01 SW MUX Control Register</description>
          <addressOffset>0x11C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: LCDIF_DATA01 of instance: lcdif</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: PWM2_OUT of instance: pwm2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: ENET1_1588_EVENT2_OUT of instance: enet1</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: I2C3_SCL of instance: i2c3</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO3_IO06 of instance: gpio3</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT6</name>
                  <description>Select mux mode: ALT6 mux port: SRC_BT_CFG01 of instance: src</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: SAI1_TX_SYNC of instance: sai1</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT9</name>
                  <description>Select mux mode: ALT9 mux port: EPDC_SDDO01 of instance: epdc</description>
                  <value>0x9</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad LCD_DATA01</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_LCD_DATA02</name>
          <description>SW_MUX_CTL_PAD_LCD_DATA02 SW MUX Control Register</description>
          <addressOffset>0x120</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: LCDIF_DATA02 of instance: lcdif</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: PWM3_OUT of instance: pwm3</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: ENET1_1588_EVENT3_IN of instance: enet1</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: I2C4_SDA of instance: i2c4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO3_IO07 of instance: gpio3</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT6</name>
                  <description>Select mux mode: ALT6 mux port: SRC_BT_CFG02 of instance: src</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: SAI1_TX_BCLK of instance: sai1</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT9</name>
                  <description>Select mux mode: ALT9 mux port: EPDC_SDDO02 of instance: epdc</description>
                  <value>0x9</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad LCD_DATA02</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_LCD_DATA03</name>
          <description>SW_MUX_CTL_PAD_LCD_DATA03 SW MUX Control Register</description>
          <addressOffset>0x124</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: LCDIF_DATA03 of instance: lcdif</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: PWM4_OUT of instance: pwm4</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: ENET1_1588_EVENT3_OUT of instance: enet1</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: I2C4_SCL of instance: i2c4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO3_IO08 of instance: gpio3</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT6</name>
                  <description>Select mux mode: ALT6 mux port: SRC_BT_CFG03 of instance: src</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: SAI1_RX_DATA of instance: sai1</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT9</name>
                  <description>Select mux mode: ALT9 mux port: EPDC_SDDO03 of instance: epdc</description>
                  <value>0x9</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad LCD_DATA03</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_LCD_DATA04</name>
          <description>SW_MUX_CTL_PAD_LCD_DATA04 SW MUX Control Register</description>
          <addressOffset>0x128</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: LCDIF_DATA04 of instance: lcdif</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: UART8_CTS_B of instance: uart8</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: ENET2_1588_EVENT2_IN of instance: enet2</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: SPDIF_SR_CLK of instance: spdif</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO3_IO09 of instance: gpio3</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT6</name>
                  <description>Select mux mode: ALT6 mux port: SRC_BT_CFG04 of instance: src</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: SAI1_TX_DATA of instance: sai1</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT9</name>
                  <description>Select mux mode: ALT9 mux port: EPDC_SDDO04 of instance: epdc</description>
                  <value>0x9</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad LCD_DATA04</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_LCD_DATA05</name>
          <description>SW_MUX_CTL_PAD_LCD_DATA05 SW MUX Control Register</description>
          <addressOffset>0x12C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: LCDIF_DATA05 of instance: lcdif</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: UART8_RTS_B of instance: uart8</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: ENET2_1588_EVENT2_OUT of instance: enet2</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: SPDIF_OUT of instance: spdif</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO3_IO10 of instance: gpio3</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT6</name>
                  <description>Select mux mode: ALT6 mux port: SRC_BT_CFG05 of instance: src</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: ECSPI1_SS1 of instance: ecspi1</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT9</name>
                  <description>Select mux mode: ALT9 mux port: EPDC_SDDO05 of instance: epdc</description>
                  <value>0x9</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad LCD_DATA05</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_LCD_DATA06</name>
          <description>SW_MUX_CTL_PAD_LCD_DATA06 SW MUX Control Register</description>
          <addressOffset>0x130</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: LCDIF_DATA06 of instance: lcdif</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: UART7_CTS_B of instance: uart7</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: ENET2_1588_EVENT3_IN of instance: enet2</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: SPDIF_LOCK of instance: spdif</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO3_IO11 of instance: gpio3</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT6</name>
                  <description>Select mux mode: ALT6 mux port: SRC_BT_CFG06 of instance: src</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: ECSPI1_SS2 of instance: ecspi1</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT9</name>
                  <description>Select mux mode: ALT9 mux port: EPDC_SDDO06 of instance: epdc</description>
                  <value>0x9</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad LCD_DATA06</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_LCD_DATA07</name>
          <description>SW_MUX_CTL_PAD_LCD_DATA07 SW MUX Control Register</description>
          <addressOffset>0x134</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: LCDIF_DATA07 of instance: lcdif</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: UART7_RTS_B of instance: uart7</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: ENET2_1588_EVENT3_OUT of instance: enet2</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: SPDIF_EXT_CLK of instance: spdif</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO3_IO12 of instance: gpio3</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT6</name>
                  <description>Select mux mode: ALT6 mux port: SRC_BT_CFG07 of instance: src</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: ECSPI1_SS3 of instance: ecspi1</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT9</name>
                  <description>Select mux mode: ALT9 mux port: EPDC_SDDO07 of instance: epdc</description>
                  <value>0x9</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad LCD_DATA07</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_LCD_DATA08</name>
          <description>SW_MUX_CTL_PAD_LCD_DATA08 SW MUX Control Register</description>
          <addressOffset>0x138</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: LCDIF_DATA08 of instance: lcdif</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: SPDIF_IN of instance: spdif</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: CSI_DATA16 of instance: csi</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: EIM_DATA00 of instance: eim</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO3_IO13 of instance: gpio3</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT6</name>
                  <description>Select mux mode: ALT6 mux port: SRC_BT_CFG08 of instance: src</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: FLEXCAN1_TX of instance: flexcan1</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT9</name>
                  <description>Select mux mode: ALT9 mux port: EPDC_PWRIRQ of instance: epdc</description>
                  <value>0x9</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad LCD_DATA08</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_LCD_DATA09</name>
          <description>SW_MUX_CTL_PAD_LCD_DATA09 SW MUX Control Register</description>
          <addressOffset>0x13C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: LCDIF_DATA09 of instance: lcdif</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: SAI3_MCLK of instance: sai3</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: CSI_DATA17 of instance: csi</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: EIM_DATA01 of instance: eim</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO3_IO14 of instance: gpio3</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT6</name>
                  <description>Select mux mode: ALT6 mux port: SRC_BT_CFG09 of instance: src</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: FLEXCAN1_RX of instance: flexcan1</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT9</name>
                  <description>Select mux mode: ALT9 mux port: EPDC_PWRWAKE of instance: epdc</description>
                  <value>0x9</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad LCD_DATA09</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_LCD_DATA10</name>
          <description>SW_MUX_CTL_PAD_LCD_DATA10 SW MUX Control Register</description>
          <addressOffset>0x140</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: LCDIF_DATA10 of instance: lcdif</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: SAI3_RX_SYNC of instance: sai3</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: CSI_DATA18 of instance: csi</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: EIM_DATA02 of instance: eim</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO3_IO15 of instance: gpio3</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT6</name>
                  <description>Select mux mode: ALT6 mux port: SRC_BT_CFG10 of instance: src</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: FLEXCAN2_TX of instance: flexcan2</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT9</name>
                  <description>Select mux mode: ALT9 mux port: EPDC_PWRCOM of instance: epdc</description>
                  <value>0x9</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad LCD_DATA10</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_LCD_DATA11</name>
          <description>SW_MUX_CTL_PAD_LCD_DATA11 SW MUX Control Register</description>
          <addressOffset>0x144</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: LCDIF_DATA11 of instance: lcdif</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: SAI3_RX_BCLK of instance: sai3</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: CSI_DATA19 of instance: csi</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: EIM_DATA03 of instance: eim</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO3_IO16 of instance: gpio3</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT6</name>
                  <description>Select mux mode: ALT6 mux port: SRC_BT_CFG11 of instance: src</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: FLEXCAN2_RX of instance: flexcan2</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT9</name>
                  <description>Select mux mode: ALT9 mux port: EPDC_PWRSTAT of instance: epdc</description>
                  <value>0x9</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad LCD_DATA11</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_LCD_DATA12</name>
          <description>SW_MUX_CTL_PAD_LCD_DATA12 SW MUX Control Register</description>
          <addressOffset>0x148</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: LCDIF_DATA12 of instance: lcdif</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: SAI3_TX_SYNC of instance: sai3</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: CSI_DATA20 of instance: csi</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: EIM_DATA04 of instance: eim</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO3_IO17 of instance: gpio3</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT6</name>
                  <description>Select mux mode: ALT6 mux port: SRC_BT_CFG12 of instance: src</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: ECSPI1_RDY of instance: ecspi1</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT9</name>
                  <description>Select mux mode: ALT9 mux port: EPDC_PWRCTRL00 of instance: epdc</description>
                  <value>0x9</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad LCD_DATA12</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_LCD_DATA13</name>
          <description>SW_MUX_CTL_PAD_LCD_DATA13 SW MUX Control Register</description>
          <addressOffset>0x14C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: LCDIF_DATA13 of instance: lcdif</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: SAI3_TX_BCLK of instance: sai3</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: CSI_DATA21 of instance: csi</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: EIM_DATA05 of instance: eim</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO3_IO18 of instance: gpio3</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT6</name>
                  <description>Select mux mode: ALT6 mux port: SRC_BT_CFG13 of instance: src</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: USDHC2_RESET_B of instance: usdhc2</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT9</name>
                  <description>Select mux mode: ALT9 mux port: EPDC_BDR00 of instance: epdc</description>
                  <value>0x9</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad LCD_DATA13</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_LCD_DATA14</name>
          <description>SW_MUX_CTL_PAD_LCD_DATA14 SW MUX Control Register</description>
          <addressOffset>0x150</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: LCDIF_DATA14 of instance: lcdif</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: SAI3_RX_DATA of instance: sai3</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: CSI_DATA22 of instance: csi</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: EIM_DATA06 of instance: eim</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO3_IO19 of instance: gpio3</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT6</name>
                  <description>Select mux mode: ALT6 mux port: SRC_BT_CFG14 of instance: src</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: USDHC2_DATA4 of instance: usdhc2</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT9</name>
                  <description>Select mux mode: ALT9 mux port: EPDC_SDSHR of instance: epdc</description>
                  <value>0x9</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad LCD_DATA14</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_LCD_DATA15</name>
          <description>SW_MUX_CTL_PAD_LCD_DATA15 SW MUX Control Register</description>
          <addressOffset>0x154</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: LCDIF_DATA15 of instance: lcdif</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: SAI3_TX_DATA of instance: sai3</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: CSI_DATA23 of instance: csi</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: EIM_DATA07 of instance: eim</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO3_IO20 of instance: gpio3</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT6</name>
                  <description>Select mux mode: ALT6 mux port: SRC_BT_CFG15 of instance: src</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: USDHC2_DATA5 of instance: usdhc2</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT9</name>
                  <description>Select mux mode: ALT9 mux port: EPDC_GDRL of instance: epdc</description>
                  <value>0x9</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad LCD_DATA15</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_LCD_DATA16</name>
          <description>SW_MUX_CTL_PAD_LCD_DATA16 SW MUX Control Register</description>
          <addressOffset>0x158</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: LCDIF_DATA16 of instance: lcdif</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: UART7_TX of instance: uart7</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: CSI_DATA01 of instance: csi</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: EIM_DATA08 of instance: eim</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO3_IO21 of instance: gpio3</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT6</name>
                  <description>Select mux mode: ALT6 mux port: SRC_BT_CFG24 of instance: src</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: USDHC2_DATA6 of instance: usdhc2</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT9</name>
                  <description>Select mux mode: ALT9 mux port: EPDC_GDCLK of instance: epdc</description>
                  <value>0x9</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad LCD_DATA16</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_LCD_DATA17</name>
          <description>SW_MUX_CTL_PAD_LCD_DATA17 SW MUX Control Register</description>
          <addressOffset>0x15C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: LCDIF_DATA17 of instance: lcdif</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: UART7_RX of instance: uart7</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: CSI_DATA00 of instance: csi</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: EIM_DATA09 of instance: eim</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO3_IO22 of instance: gpio3</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT6</name>
                  <description>Select mux mode: ALT6 mux port: SRC_BT_CFG25 of instance: src</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: USDHC2_DATA7 of instance: usdhc2</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT9</name>
                  <description>Select mux mode: ALT9 mux port: EPDC_GDSP of instance: epdc</description>
                  <value>0x9</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad LCD_DATA17</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_LCD_DATA18</name>
          <description>SW_MUX_CTL_PAD_LCD_DATA18 SW MUX Control Register</description>
          <addressOffset>0x160</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: LCDIF_DATA18 of instance: lcdif</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: PWM5_OUT of instance: pwm5</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT2</name>
                  <description>Select mux mode: ALT2 mux port: CA7_MX6ULL_EVENTO of instance: ca7_mx6ull</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: CSI_DATA10 of instance: csi</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: EIM_DATA10 of instance: eim</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO3_IO23 of instance: gpio3</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT6</name>
                  <description>Select mux mode: ALT6 mux port: SRC_BT_CFG26 of instance: src</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: USDHC2_CMD of instance: usdhc2</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT9</name>
                  <description>Select mux mode: ALT9 mux port: EPDC_BDR01 of instance: epdc</description>
                  <value>0x9</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad LCD_DATA18</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_LCD_DATA19</name>
          <description>SW_MUX_CTL_PAD_LCD_DATA19 SW MUX Control Register</description>
          <addressOffset>0x164</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: LCDIF_DATA19 of instance: lcdif</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: PWM6_OUT of instance: pwm6</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT2</name>
                  <description>Select mux mode: ALT2 mux port: WDOG1_WDOG_ANY of instance: wdog1</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: CSI_DATA11 of instance: csi</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: EIM_DATA11 of instance: eim</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO3_IO24 of instance: gpio3</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT6</name>
                  <description>Select mux mode: ALT6 mux port: SRC_BT_CFG27 of instance: src</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: USDHC2_CLK of instance: usdhc2</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT9</name>
                  <description>Select mux mode: ALT9 mux port: EPDC_VCOM00 of instance: epdc</description>
                  <value>0x9</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad LCD_DATA19</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_LCD_DATA20</name>
          <description>SW_MUX_CTL_PAD_LCD_DATA20 SW MUX Control Register</description>
          <addressOffset>0x168</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: LCDIF_DATA20 of instance: lcdif</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: UART8_TX of instance: uart8</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT2</name>
                  <description>Select mux mode: ALT2 mux port: ECSPI1_SCLK of instance: ecspi1</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: CSI_DATA12 of instance: csi</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: EIM_DATA12 of instance: eim</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO3_IO25 of instance: gpio3</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT6</name>
                  <description>Select mux mode: ALT6 mux port: SRC_BT_CFG28 of instance: src</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: USDHC2_DATA0 of instance: usdhc2</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT9</name>
                  <description>Select mux mode: ALT9 mux port: EPDC_VCOM01 of instance: epdc</description>
                  <value>0x9</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad LCD_DATA20</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_LCD_DATA21</name>
          <description>SW_MUX_CTL_PAD_LCD_DATA21 SW MUX Control Register</description>
          <addressOffset>0x16C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: LCDIF_DATA21 of instance: lcdif</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: UART8_RX of instance: uart8</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT2</name>
                  <description>Select mux mode: ALT2 mux port: ECSPI1_SS0 of instance: ecspi1</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: CSI_DATA13 of instance: csi</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: EIM_DATA13 of instance: eim</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO3_IO26 of instance: gpio3</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT6</name>
                  <description>Select mux mode: ALT6 mux port: SRC_BT_CFG29 of instance: src</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: USDHC2_DATA1 of instance: usdhc2</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT9</name>
                  <description>Select mux mode: ALT9 mux port: EPDC_SDCE01 of instance: epdc</description>
                  <value>0x9</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad LCD_DATA21</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_LCD_DATA22</name>
          <description>SW_MUX_CTL_PAD_LCD_DATA22 SW MUX Control Register</description>
          <addressOffset>0x170</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: LCDIF_DATA22 of instance: lcdif</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: MQS_RIGHT of instance: mqs</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT2</name>
                  <description>Select mux mode: ALT2 mux port: ECSPI1_MOSI of instance: ecspi1</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: CSI_DATA14 of instance: csi</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: EIM_DATA14 of instance: eim</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO3_IO27 of instance: gpio3</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT6</name>
                  <description>Select mux mode: ALT6 mux port: SRC_BT_CFG30 of instance: src</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: USDHC2_DATA2 of instance: usdhc2</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT9</name>
                  <description>Select mux mode: ALT9 mux port: EPDC_SDCE02 of instance: epdc</description>
                  <value>0x9</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad LCD_DATA22</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_LCD_DATA23</name>
          <description>SW_MUX_CTL_PAD_LCD_DATA23 SW MUX Control Register</description>
          <addressOffset>0x174</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: LCDIF_DATA23 of instance: lcdif</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: MQS_LEFT of instance: mqs</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT2</name>
                  <description>Select mux mode: ALT2 mux port: ECSPI1_MISO of instance: ecspi1</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: CSI_DATA15 of instance: csi</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: EIM_DATA15 of instance: eim</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO3_IO28 of instance: gpio3</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT6</name>
                  <description>Select mux mode: ALT6 mux port: SRC_BT_CFG31 of instance: src</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: USDHC2_DATA3 of instance: usdhc2</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT9</name>
                  <description>Select mux mode: ALT9 mux port: EPDC_SDCE03 of instance: epdc</description>
                  <value>0x9</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad LCD_DATA23</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_NAND_RE_B</name>
          <description>SW_MUX_CTL_PAD_NAND_RE_B SW MUX Control Register</description>
          <addressOffset>0x178</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: RAWNAND_RE_B of instance: rawnand</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: USDHC2_CLK of instance: usdhc2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT2</name>
                  <description>Select mux mode: ALT2 mux port: QSPI_B_SCLK of instance: qspi</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: KPP_ROW00 of instance: kpp</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: EIM_EB_B00 of instance: eim</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO4_IO00 of instance: gpio4</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: ECSPI3_SS2 of instance: ecspi3</description>
                  <value>0x8</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad NAND_RE_B</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_NAND_WE_B</name>
          <description>SW_MUX_CTL_PAD_NAND_WE_B SW MUX Control Register</description>
          <addressOffset>0x17C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: RAWNAND_WE_B of instance: rawnand</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: USDHC2_CMD of instance: usdhc2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT2</name>
                  <description>Select mux mode: ALT2 mux port: QSPI_B_SS0_B of instance: qspi</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: KPP_COL00 of instance: kpp</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: EIM_EB_B01 of instance: eim</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO4_IO01 of instance: gpio4</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: ECSPI3_SS3 of instance: ecspi3</description>
                  <value>0x8</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad NAND_WE_B</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_NAND_DATA00</name>
          <description>SW_MUX_CTL_PAD_NAND_DATA00 SW MUX Control Register</description>
          <addressOffset>0x180</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: RAWNAND_DATA00 of instance: rawnand</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: USDHC2_DATA0 of instance: usdhc2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT2</name>
                  <description>Select mux mode: ALT2 mux port: QSPI_B_SS1_B of instance: qspi</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: KPP_ROW01 of instance: kpp</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: EIM_AD08 of instance: eim</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO4_IO02 of instance: gpio4</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: ECSPI4_RDY of instance: ecspi4</description>
                  <value>0x8</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad NAND_DATA00</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_NAND_DATA01</name>
          <description>SW_MUX_CTL_PAD_NAND_DATA01 SW MUX Control Register</description>
          <addressOffset>0x184</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: RAWNAND_DATA01 of instance: rawnand</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: USDHC2_DATA1 of instance: usdhc2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT2</name>
                  <description>Select mux mode: ALT2 mux port: QSPI_B_DQS of instance: qspi</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: KPP_COL01 of instance: kpp</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: EIM_AD09 of instance: eim</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO4_IO03 of instance: gpio4</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: ECSPI4_SS1 of instance: ecspi4</description>
                  <value>0x8</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad NAND_DATA01</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_NAND_DATA02</name>
          <description>SW_MUX_CTL_PAD_NAND_DATA02 SW MUX Control Register</description>
          <addressOffset>0x188</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: RAWNAND_DATA02 of instance: rawnand</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: USDHC2_DATA2 of instance: usdhc2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT2</name>
                  <description>Select mux mode: ALT2 mux port: QSPI_B_DATA00 of instance: qspi</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: KPP_ROW02 of instance: kpp</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: EIM_AD10 of instance: eim</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO4_IO04 of instance: gpio4</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: ECSPI4_SS2 of instance: ecspi4</description>
                  <value>0x8</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad NAND_DATA02</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_NAND_DATA03</name>
          <description>SW_MUX_CTL_PAD_NAND_DATA03 SW MUX Control Register</description>
          <addressOffset>0x18C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: RAWNAND_DATA03 of instance: rawnand</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: USDHC2_DATA3 of instance: usdhc2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT2</name>
                  <description>Select mux mode: ALT2 mux port: QSPI_B_DATA01 of instance: qspi</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: KPP_COL02 of instance: kpp</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: EIM_AD11 of instance: eim</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO4_IO05 of instance: gpio4</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: ECSPI4_SS3 of instance: ecspi4</description>
                  <value>0x8</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad NAND_DATA03</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_NAND_DATA04</name>
          <description>SW_MUX_CTL_PAD_NAND_DATA04 SW MUX Control Register</description>
          <addressOffset>0x190</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: RAWNAND_DATA04 of instance: rawnand</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: USDHC2_DATA4 of instance: usdhc2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT2</name>
                  <description>Select mux mode: ALT2 mux port: QSPI_B_DATA02 of instance: qspi</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: ECSPI4_SCLK of instance: ecspi4</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: EIM_AD12 of instance: eim</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO4_IO06 of instance: gpio4</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: UART2_TX of instance: uart2</description>
                  <value>0x8</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad NAND_DATA04</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_NAND_DATA05</name>
          <description>SW_MUX_CTL_PAD_NAND_DATA05 SW MUX Control Register</description>
          <addressOffset>0x194</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: RAWNAND_DATA05 of instance: rawnand</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: USDHC2_DATA5 of instance: usdhc2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT2</name>
                  <description>Select mux mode: ALT2 mux port: QSPI_B_DATA03 of instance: qspi</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: ECSPI4_MOSI of instance: ecspi4</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: EIM_AD13 of instance: eim</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO4_IO07 of instance: gpio4</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: UART2_RX of instance: uart2</description>
                  <value>0x8</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad NAND_DATA05</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_NAND_DATA06</name>
          <description>SW_MUX_CTL_PAD_NAND_DATA06 SW MUX Control Register</description>
          <addressOffset>0x198</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: RAWNAND_DATA06 of instance: rawnand</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: USDHC2_DATA6 of instance: usdhc2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT2</name>
                  <description>Select mux mode: ALT2 mux port: SAI2_RX_BCLK of instance: sai2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: ECSPI4_MISO of instance: ecspi4</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: EIM_AD14 of instance: eim</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO4_IO08 of instance: gpio4</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: UART2_CTS_B of instance: uart2</description>
                  <value>0x8</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad NAND_DATA06</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_NAND_DATA07</name>
          <description>SW_MUX_CTL_PAD_NAND_DATA07 SW MUX Control Register</description>
          <addressOffset>0x19C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: RAWNAND_DATA07 of instance: rawnand</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: USDHC2_DATA7 of instance: usdhc2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT2</name>
                  <description>Select mux mode: ALT2 mux port: QSPI_A_SS1_B of instance: qspi</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: ECSPI4_SS0 of instance: ecspi4</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: EIM_AD15 of instance: eim</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO4_IO09 of instance: gpio4</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: UART2_RTS_B of instance: uart2</description>
                  <value>0x8</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad NAND_DATA07</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_NAND_ALE</name>
          <description>SW_MUX_CTL_PAD_NAND_ALE SW MUX Control Register</description>
          <addressOffset>0x1A0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: RAWNAND_ALE of instance: rawnand</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: USDHC2_RESET_B of instance: usdhc2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT2</name>
                  <description>Select mux mode: ALT2 mux port: QSPI_A_DQS of instance: qspi</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: PWM3_OUT of instance: pwm3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: EIM_ADDR17 of instance: eim</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO4_IO10 of instance: gpio4</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: ECSPI3_SS1 of instance: ecspi3</description>
                  <value>0x8</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad NAND_ALE</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_NAND_WP_B</name>
          <description>SW_MUX_CTL_PAD_NAND_WP_B SW MUX Control Register</description>
          <addressOffset>0x1A4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: RAWNAND_WP_B of instance: rawnand</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: USDHC1_RESET_B of instance: usdhc1</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT2</name>
                  <description>Select mux mode: ALT2 mux port: QSPI_A_SCLK of instance: qspi</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: PWM4_OUT of instance: pwm4</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: EIM_BCLK of instance: eim</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO4_IO11 of instance: gpio4</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: ECSPI3_RDY of instance: ecspi3</description>
                  <value>0x8</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad NAND_WP_B</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_NAND_READY_B</name>
          <description>SW_MUX_CTL_PAD_NAND_READY_B SW MUX Control Register</description>
          <addressOffset>0x1A8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: RAWNAND_READY_B of instance: rawnand</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: USDHC1_DATA4 of instance: usdhc1</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT2</name>
                  <description>Select mux mode: ALT2 mux port: QSPI_A_DATA00 of instance: qspi</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: ECSPI3_SS0 of instance: ecspi3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: EIM_CS1_B of instance: eim</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO4_IO12 of instance: gpio4</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: UART3_TX of instance: uart3</description>
                  <value>0x8</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad NAND_READY_B</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_NAND_CE0_B</name>
          <description>SW_MUX_CTL_PAD_NAND_CE0_B SW MUX Control Register</description>
          <addressOffset>0x1AC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: RAWNAND_CE0_B of instance: rawnand</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: USDHC1_DATA5 of instance: usdhc1</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT2</name>
                  <description>Select mux mode: ALT2 mux port: QSPI_A_DATA01 of instance: qspi</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: ECSPI3_SCLK of instance: ecspi3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: EIM_DTACK_B of instance: eim</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO4_IO13 of instance: gpio4</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: UART3_RX of instance: uart3</description>
                  <value>0x8</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad NAND_CE0_B</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_NAND_CE1_B</name>
          <description>SW_MUX_CTL_PAD_NAND_CE1_B SW MUX Control Register</description>
          <addressOffset>0x1B0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: RAWNAND_CE1_B of instance: rawnand</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: USDHC1_DATA6 of instance: usdhc1</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT2</name>
                  <description>Select mux mode: ALT2 mux port: QSPI_A_DATA02 of instance: qspi</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: ECSPI3_MOSI of instance: ecspi3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: EIM_ADDR18 of instance: eim</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO4_IO14 of instance: gpio4</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: UART3_CTS_B of instance: uart3</description>
                  <value>0x8</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad NAND_CE1_B</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_NAND_CLE</name>
          <description>SW_MUX_CTL_PAD_NAND_CLE SW MUX Control Register</description>
          <addressOffset>0x1B4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: RAWNAND_CLE of instance: rawnand</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: USDHC1_DATA7 of instance: usdhc1</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT2</name>
                  <description>Select mux mode: ALT2 mux port: QSPI_A_DATA03 of instance: qspi</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: ECSPI3_MISO of instance: ecspi3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: EIM_ADDR16 of instance: eim</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO4_IO15 of instance: gpio4</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: UART3_RTS_B of instance: uart3</description>
                  <value>0x8</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad NAND_CLE</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_NAND_DQS</name>
          <description>SW_MUX_CTL_PAD_NAND_DQS SW MUX Control Register</description>
          <addressOffset>0x1B8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: RAWNAND_DQS of instance: rawnand</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: CSI_FIELD of instance: csi</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT2</name>
                  <description>Select mux mode: ALT2 mux port: QSPI_A_SS0_B of instance: qspi</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: PWM5_OUT of instance: pwm5</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: EIM_WAIT of instance: eim</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO4_IO16 of instance: gpio4</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT6</name>
                  <description>Select mux mode: ALT6 mux port: SDMA_EXT_EVENT01 of instance: sdma</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: SPDIF_EXT_CLK of instance: spdif</description>
                  <value>0x8</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad NAND_DQS</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_SD1_CMD</name>
          <description>SW_MUX_CTL_PAD_SD1_CMD SW MUX Control Register</description>
          <addressOffset>0x1BC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: USDHC1_CMD of instance: usdhc1</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: GPT2_COMPARE1 of instance: gpt2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT2</name>
                  <description>Select mux mode: ALT2 mux port: SAI2_RX_SYNC of instance: sai2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: SPDIF_OUT of instance: spdif</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: EIM_ADDR19 of instance: eim</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO2_IO16 of instance: gpio2</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT6</name>
                  <description>Select mux mode: ALT6 mux port: SDMA_EXT_EVENT00 of instance: sdma</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: USB_OTG1_PWR of instance: usb</description>
                  <value>0x8</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad SD1_CMD</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_SD1_CLK</name>
          <description>SW_MUX_CTL_PAD_SD1_CLK SW MUX Control Register</description>
          <addressOffset>0x1C0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: USDHC1_CLK of instance: usdhc1</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: GPT2_COMPARE2 of instance: gpt2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT2</name>
                  <description>Select mux mode: ALT2 mux port: SAI2_MCLK of instance: sai2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: SPDIF_IN of instance: spdif</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: EIM_ADDR20 of instance: eim</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO2_IO17 of instance: gpio2</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: USB_OTG1_OC of instance: usb</description>
                  <value>0x8</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad SD1_CLK</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_SD1_DATA0</name>
          <description>SW_MUX_CTL_PAD_SD1_DATA0 SW MUX Control Register</description>
          <addressOffset>0x1C4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: USDHC1_DATA0 of instance: usdhc1</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: GPT2_COMPARE3 of instance: gpt2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT2</name>
                  <description>Select mux mode: ALT2 mux port: SAI2_TX_SYNC of instance: sai2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: FLEXCAN1_TX of instance: flexcan1</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: EIM_ADDR21 of instance: eim</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO2_IO18 of instance: gpio2</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: ANATOP_OTG1_ID of instance: anatop</description>
                  <value>0x8</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad SD1_DATA0</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_SD1_DATA1</name>
          <description>SW_MUX_CTL_PAD_SD1_DATA1 SW MUX Control Register</description>
          <addressOffset>0x1C8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: USDHC1_DATA1 of instance: usdhc1</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: GPT2_CLK of instance: gpt2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT2</name>
                  <description>Select mux mode: ALT2 mux port: SAI2_TX_BCLK of instance: sai2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: FLEXCAN1_RX of instance: flexcan1</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: EIM_ADDR22 of instance: eim</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO2_IO19 of instance: gpio2</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: USB_OTG2_PWR of instance: usb</description>
                  <value>0x8</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad SD1_DATA1</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_SD1_DATA2</name>
          <description>SW_MUX_CTL_PAD_SD1_DATA2 SW MUX Control Register</description>
          <addressOffset>0x1CC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: USDHC1_DATA2 of instance: usdhc1</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: GPT2_CAPTURE1 of instance: gpt2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT2</name>
                  <description>Select mux mode: ALT2 mux port: SAI2_RX_DATA of instance: sai2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: FLEXCAN2_TX of instance: flexcan2</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: EIM_ADDR23 of instance: eim</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO2_IO20 of instance: gpio2</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT6</name>
                  <description>Select mux mode: ALT6 mux port: CCM_CLKO1 of instance: ccm</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: USB_OTG2_OC of instance: usb</description>
                  <value>0x8</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad SD1_DATA2</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_SD1_DATA3</name>
          <description>SW_MUX_CTL_PAD_SD1_DATA3 SW MUX Control Register</description>
          <addressOffset>0x1D0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: USDHC1_DATA3 of instance: usdhc1</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: GPT2_CAPTURE2 of instance: gpt2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT2</name>
                  <description>Select mux mode: ALT2 mux port: SAI2_TX_DATA of instance: sai2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: FLEXCAN2_RX of instance: flexcan2</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: EIM_ADDR24 of instance: eim</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO2_IO21 of instance: gpio2</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT6</name>
                  <description>Select mux mode: ALT6 mux port: CCM_CLKO2 of instance: ccm</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: ANATOP_OTG2_ID of instance: anatop</description>
                  <value>0x8</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad SD1_DATA3</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_CSI_MCLK</name>
          <description>SW_MUX_CTL_PAD_CSI_MCLK SW MUX Control Register</description>
          <addressOffset>0x1D4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: CSI_MCLK of instance: csi</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: USDHC2_CD_B of instance: usdhc2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT2</name>
                  <description>Select mux mode: ALT2 mux port: RAWNAND_CE2_B of instance: rawnand</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: I2C1_SDA of instance: i2c1</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: EIM_CS0_B of instance: eim</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO4_IO17 of instance: gpio4</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT6</name>
                  <description>Select mux mode: ALT6 mux port: SNVS_HP_VIO_5_CTL of instance: snvs_hp</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: UART6_TX of instance: uart6</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT9</name>
                  <description>Select mux mode: ALT9 mux port: ESAI_TX3_RX2 of instance: esai</description>
                  <value>0x9</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad CSI_MCLK</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_CSI_PIXCLK</name>
          <description>SW_MUX_CTL_PAD_CSI_PIXCLK SW MUX Control Register</description>
          <addressOffset>0x1D8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: CSI_PIXCLK of instance: csi</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: USDHC2_WP of instance: usdhc2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT2</name>
                  <description>Select mux mode: ALT2 mux port: RAWNAND_CE3_B of instance: rawnand</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: I2C1_SCL of instance: i2c1</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: EIM_OE of instance: eim</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO4_IO18 of instance: gpio4</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT6</name>
                  <description>Select mux mode: ALT6 mux port: SNVS_HP_VIO_5 of instance: snvs_hp</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: UART6_RX of instance: uart6</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT9</name>
                  <description>Select mux mode: ALT9 mux port: ESAI_TX2_RX3 of instance: esai</description>
                  <value>0x9</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad CSI_PIXCLK</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_CSI_VSYNC</name>
          <description>SW_MUX_CTL_PAD_CSI_VSYNC SW MUX Control Register</description>
          <addressOffset>0x1DC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: CSI_VSYNC of instance: csi</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: USDHC2_CLK of instance: usdhc2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: I2C2_SDA of instance: i2c2</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: EIM_RW of instance: eim</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO4_IO19 of instance: gpio4</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT6</name>
                  <description>Select mux mode: ALT6 mux port: PWM7_OUT of instance: pwm7</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: UART6_RTS_B of instance: uart6</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT9</name>
                  <description>Select mux mode: ALT9 mux port: ESAI_TX4_RX1 of instance: esai</description>
                  <value>0x9</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad CSI_VSYNC</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_CSI_HSYNC</name>
          <description>SW_MUX_CTL_PAD_CSI_HSYNC SW MUX Control Register</description>
          <addressOffset>0x1E0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: CSI_HSYNC of instance: csi</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: USDHC2_CMD of instance: usdhc2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: I2C2_SCL of instance: i2c2</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: EIM_LBA_B of instance: eim</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO4_IO20 of instance: gpio4</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT6</name>
                  <description>Select mux mode: ALT6 mux port: PWM8_OUT of instance: pwm8</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: UART6_CTS_B of instance: uart6</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT9</name>
                  <description>Select mux mode: ALT9 mux port: ESAI_TX1 of instance: esai</description>
                  <value>0x9</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad CSI_HSYNC</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_CSI_DATA00</name>
          <description>SW_MUX_CTL_PAD_CSI_DATA00 SW MUX Control Register</description>
          <addressOffset>0x1E4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: CSI_DATA02 of instance: csi</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: USDHC2_DATA0 of instance: usdhc2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: ECSPI2_SCLK of instance: ecspi2</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: EIM_AD00 of instance: eim</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO4_IO21 of instance: gpio4</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT6</name>
                  <description>Select mux mode: ALT6 mux port: SRC_INT_BOOT of instance: src</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: UART5_TX of instance: uart5</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT9</name>
                  <description>Select mux mode: ALT9 mux port: ESAI_TX_HF_CLK of instance: esai</description>
                  <value>0x9</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad CSI_DATA00</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_CSI_DATA01</name>
          <description>SW_MUX_CTL_PAD_CSI_DATA01 SW MUX Control Register</description>
          <addressOffset>0x1E8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: CSI_DATA03 of instance: csi</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: USDHC2_DATA1 of instance: usdhc2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: ECSPI2_SS0 of instance: ecspi2</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: EIM_AD01 of instance: eim</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO4_IO22 of instance: gpio4</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT6</name>
                  <description>Select mux mode: ALT6 mux port: SAI1_MCLK of instance: sai1</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: UART5_RX of instance: uart5</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT9</name>
                  <description>Select mux mode: ALT9 mux port: ESAI_RX_HF_CLK of instance: esai</description>
                  <value>0x9</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad CSI_DATA01</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_CSI_DATA02</name>
          <description>SW_MUX_CTL_PAD_CSI_DATA02 SW MUX Control Register</description>
          <addressOffset>0x1EC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: CSI_DATA04 of instance: csi</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: USDHC2_DATA2 of instance: usdhc2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: ECSPI2_MOSI of instance: ecspi2</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: EIM_AD02 of instance: eim</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO4_IO23 of instance: gpio4</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT6</name>
                  <description>Select mux mode: ALT6 mux port: SAI1_RX_SYNC of instance: sai1</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: UART5_RTS_B of instance: uart5</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT9</name>
                  <description>Select mux mode: ALT9 mux port: ESAI_RX_FS of instance: esai</description>
                  <value>0x9</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad CSI_DATA02</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_CSI_DATA03</name>
          <description>SW_MUX_CTL_PAD_CSI_DATA03 SW MUX Control Register</description>
          <addressOffset>0x1F0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: CSI_DATA05 of instance: csi</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: USDHC2_DATA3 of instance: usdhc2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: ECSPI2_MISO of instance: ecspi2</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: EIM_AD03 of instance: eim</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO4_IO24 of instance: gpio4</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT6</name>
                  <description>Select mux mode: ALT6 mux port: SAI1_RX_BCLK of instance: sai1</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: UART5_CTS_B of instance: uart5</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT9</name>
                  <description>Select mux mode: ALT9 mux port: ESAI_RX_CLK of instance: esai</description>
                  <value>0x9</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad CSI_DATA03</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_CSI_DATA04</name>
          <description>SW_MUX_CTL_PAD_CSI_DATA04 SW MUX Control Register</description>
          <addressOffset>0x1F4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: CSI_DATA06 of instance: csi</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: USDHC2_DATA4 of instance: usdhc2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: ECSPI1_SCLK of instance: ecspi1</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: EIM_AD04 of instance: eim</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO4_IO25 of instance: gpio4</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT6</name>
                  <description>Select mux mode: ALT6 mux port: SAI1_TX_SYNC of instance: sai1</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: USDHC1_WP of instance: usdhc1</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT9</name>
                  <description>Select mux mode: ALT9 mux port: ESAI_TX_FS of instance: esai</description>
                  <value>0x9</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad CSI_DATA04</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_CSI_DATA05</name>
          <description>SW_MUX_CTL_PAD_CSI_DATA05 SW MUX Control Register</description>
          <addressOffset>0x1F8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: CSI_DATA07 of instance: csi</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: USDHC2_DATA5 of instance: usdhc2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: ECSPI1_SS0 of instance: ecspi1</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: EIM_AD05 of instance: eim</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO4_IO26 of instance: gpio4</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT6</name>
                  <description>Select mux mode: ALT6 mux port: SAI1_TX_BCLK of instance: sai1</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: USDHC1_CD_B of instance: usdhc1</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT9</name>
                  <description>Select mux mode: ALT9 mux port: ESAI_TX_CLK of instance: esai</description>
                  <value>0x9</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad CSI_DATA05</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_CSI_DATA06</name>
          <description>SW_MUX_CTL_PAD_CSI_DATA06 SW MUX Control Register</description>
          <addressOffset>0x1FC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: CSI_DATA08 of instance: csi</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: USDHC2_DATA6 of instance: usdhc2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: ECSPI1_MOSI of instance: ecspi1</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: EIM_AD06 of instance: eim</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO4_IO27 of instance: gpio4</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT6</name>
                  <description>Select mux mode: ALT6 mux port: SAI1_RX_DATA of instance: sai1</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: USDHC1_RESET_B of instance: usdhc1</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT9</name>
                  <description>Select mux mode: ALT9 mux port: ESAI_TX5_RX0 of instance: esai</description>
                  <value>0x9</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad CSI_DATA06</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_CSI_DATA07</name>
          <description>SW_MUX_CTL_PAD_CSI_DATA07 SW MUX Control Register</description>
          <addressOffset>0x200</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT0</name>
                  <description>Select mux mode: ALT0 mux port: CSI_DATA09 of instance: csi</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT1</name>
                  <description>Select mux mode: ALT1 mux port: USDHC2_DATA7 of instance: usdhc2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT3</name>
                  <description>Select mux mode: ALT3 mux port: ECSPI1_MISO of instance: ecspi1</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT4</name>
                  <description>Select mux mode: ALT4 mux port: EIM_AD07 of instance: eim</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO4_IO28 of instance: gpio4</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT6</name>
                  <description>Select mux mode: ALT6 mux port: SAI1_TX_DATA of instance: sai1</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT8</name>
                  <description>Select mux mode: ALT8 mux port: USDHC1_VSELECT of instance: usdhc1</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALT9</name>
                  <description>Select mux mode: ALT9 mux port: ESAI_TX0 of instance: esai</description>
                  <value>0x9</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad CSI_DATA07</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_DRAM_ADDR00</name>
          <description>SW_PAD_CTL_PAD_DRAM_ADDR00 SW PAD Control Register</description>
          <addressOffset>0x204</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x8000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODT</name>
              <description>On Die Termination Field</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODT_0_off</name>
                  <description>off</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_1_120_Ohm_ODT</name>
                  <description>120 Ohm ODT</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_2_60_Ohm_ODT</name>
                  <description>60 Ohm ODT</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_3_40_Ohm_ODT</name>
                  <description>40 Ohm ODT</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_4_30_Ohm_ODT</name>
                  <description>30 Ohm ODT</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_5_24_Ohm_ODT</name>
                  <description>24 Ohm ODT</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_6_20_Ohm_ODT</name>
                  <description>20 Ohm ODT</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_7_17_Ohm_ODT</name>
                  <description>17 Ohm ODT</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DDR_INPUT</name>
              <description>DDR / CMOS Input Mode Field</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DDR_INPUT_0_CMOS_input_type</name>
                  <description>CMOS input type</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DDR_INPUT_1_Differential_input_mode</name>
                  <description>Differential input mode</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DDR_SEL</name>
              <description>ddr_sel Field</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>DO_TRIM</name>
              <description>do_trim Field</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DO_TRIM</name>
                  <description>min delay</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_DRAM_ADDR01</name>
          <description>SW_PAD_CTL_PAD_DRAM_ADDR01 SW PAD Control Register</description>
          <addressOffset>0x208</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x8000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODT</name>
              <description>On Die Termination Field</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODT_0_off</name>
                  <description>off</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_1_120_Ohm_ODT</name>
                  <description>120 Ohm ODT</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_2_60_Ohm_ODT</name>
                  <description>60 Ohm ODT</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_3_40_Ohm_ODT</name>
                  <description>40 Ohm ODT</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_4_30_Ohm_ODT</name>
                  <description>30 Ohm ODT</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_5_24_Ohm_ODT</name>
                  <description>24 Ohm ODT</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_6_20_Ohm_ODT</name>
                  <description>20 Ohm ODT</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_7_17_Ohm_ODT</name>
                  <description>17 Ohm ODT</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DDR_INPUT</name>
              <description>DDR / CMOS Input Mode Field</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DDR_INPUT_0_CMOS_input_type</name>
                  <description>CMOS input type</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DDR_INPUT_1_Differential_input_mode</name>
                  <description>Differential input mode</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DDR_SEL</name>
              <description>ddr_sel Field</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>DO_TRIM</name>
              <description>do_trim Field</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DO_TRIM</name>
                  <description>min delay</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_DRAM_ADDR02</name>
          <description>SW_PAD_CTL_PAD_DRAM_ADDR02 SW PAD Control Register</description>
          <addressOffset>0x20C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x8000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODT</name>
              <description>On Die Termination Field</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODT_0_off</name>
                  <description>off</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_1_120_Ohm_ODT</name>
                  <description>120 Ohm ODT</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_2_60_Ohm_ODT</name>
                  <description>60 Ohm ODT</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_3_40_Ohm_ODT</name>
                  <description>40 Ohm ODT</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_4_30_Ohm_ODT</name>
                  <description>30 Ohm ODT</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_5_24_Ohm_ODT</name>
                  <description>24 Ohm ODT</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_6_20_Ohm_ODT</name>
                  <description>20 Ohm ODT</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_7_17_Ohm_ODT</name>
                  <description>17 Ohm ODT</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DDR_INPUT</name>
              <description>DDR / CMOS Input Mode Field</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DDR_INPUT_0_CMOS_input_type</name>
                  <description>CMOS input type</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DDR_INPUT_1_Differential_input_mode</name>
                  <description>Differential input mode</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DDR_SEL</name>
              <description>ddr_sel Field</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>DO_TRIM</name>
              <description>do_trim Field</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DO_TRIM</name>
                  <description>min delay</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_DRAM_ADDR03</name>
          <description>SW_PAD_CTL_PAD_DRAM_ADDR03 SW PAD Control Register</description>
          <addressOffset>0x210</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x8000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODT</name>
              <description>On Die Termination Field</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODT_0_off</name>
                  <description>off</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_1_120_Ohm_ODT</name>
                  <description>120 Ohm ODT</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_2_60_Ohm_ODT</name>
                  <description>60 Ohm ODT</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_3_40_Ohm_ODT</name>
                  <description>40 Ohm ODT</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_4_30_Ohm_ODT</name>
                  <description>30 Ohm ODT</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_5_24_Ohm_ODT</name>
                  <description>24 Ohm ODT</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_6_20_Ohm_ODT</name>
                  <description>20 Ohm ODT</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_7_17_Ohm_ODT</name>
                  <description>17 Ohm ODT</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DDR_INPUT</name>
              <description>DDR / CMOS Input Mode Field</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DDR_INPUT_0_CMOS_input_type</name>
                  <description>CMOS input type</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DDR_INPUT_1_Differential_input_mode</name>
                  <description>Differential input mode</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DDR_SEL</name>
              <description>ddr_sel Field</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>DO_TRIM</name>
              <description>do_trim Field</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DO_TRIM</name>
                  <description>min delay</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_DRAM_ADDR04</name>
          <description>SW_PAD_CTL_PAD_DRAM_ADDR04 SW PAD Control Register</description>
          <addressOffset>0x214</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x8000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODT</name>
              <description>On Die Termination Field</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODT_0_off</name>
                  <description>off</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_1_120_Ohm_ODT</name>
                  <description>120 Ohm ODT</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_2_60_Ohm_ODT</name>
                  <description>60 Ohm ODT</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_3_40_Ohm_ODT</name>
                  <description>40 Ohm ODT</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_4_30_Ohm_ODT</name>
                  <description>30 Ohm ODT</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_5_24_Ohm_ODT</name>
                  <description>24 Ohm ODT</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_6_20_Ohm_ODT</name>
                  <description>20 Ohm ODT</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_7_17_Ohm_ODT</name>
                  <description>17 Ohm ODT</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DDR_INPUT</name>
              <description>DDR / CMOS Input Mode Field</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DDR_INPUT_0_CMOS_input_type</name>
                  <description>CMOS input type</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DDR_INPUT_1_Differential_input_mode</name>
                  <description>Differential input mode</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DDR_SEL</name>
              <description>ddr_sel Field</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>DO_TRIM</name>
              <description>do_trim Field</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DO_TRIM</name>
                  <description>min delay</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_DRAM_ADDR05</name>
          <description>SW_PAD_CTL_PAD_DRAM_ADDR05 SW PAD Control Register</description>
          <addressOffset>0x218</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x8000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODT</name>
              <description>On Die Termination Field</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODT_0_off</name>
                  <description>off</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_1_120_Ohm_ODT</name>
                  <description>120 Ohm ODT</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_2_60_Ohm_ODT</name>
                  <description>60 Ohm ODT</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_3_40_Ohm_ODT</name>
                  <description>40 Ohm ODT</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_4_30_Ohm_ODT</name>
                  <description>30 Ohm ODT</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_5_24_Ohm_ODT</name>
                  <description>24 Ohm ODT</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_6_20_Ohm_ODT</name>
                  <description>20 Ohm ODT</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_7_17_Ohm_ODT</name>
                  <description>17 Ohm ODT</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DDR_INPUT</name>
              <description>DDR / CMOS Input Mode Field</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DDR_INPUT_0_CMOS_input_type</name>
                  <description>CMOS input type</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DDR_INPUT_1_Differential_input_mode</name>
                  <description>Differential input mode</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DDR_SEL</name>
              <description>ddr_sel Field</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>DO_TRIM</name>
              <description>do_trim Field</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DO_TRIM</name>
                  <description>min delay</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_DRAM_ADDR06</name>
          <description>SW_PAD_CTL_PAD_DRAM_ADDR06 SW PAD Control Register</description>
          <addressOffset>0x21C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x8000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODT</name>
              <description>On Die Termination Field</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODT_0_off</name>
                  <description>off</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_1_120_Ohm_ODT</name>
                  <description>120 Ohm ODT</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_2_60_Ohm_ODT</name>
                  <description>60 Ohm ODT</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_3_40_Ohm_ODT</name>
                  <description>40 Ohm ODT</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_4_30_Ohm_ODT</name>
                  <description>30 Ohm ODT</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_5_24_Ohm_ODT</name>
                  <description>24 Ohm ODT</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_6_20_Ohm_ODT</name>
                  <description>20 Ohm ODT</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_7_17_Ohm_ODT</name>
                  <description>17 Ohm ODT</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DDR_INPUT</name>
              <description>DDR / CMOS Input Mode Field</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DDR_INPUT_0_CMOS_input_type</name>
                  <description>CMOS input type</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DDR_INPUT_1_Differential_input_mode</name>
                  <description>Differential input mode</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DDR_SEL</name>
              <description>ddr_sel Field</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>DO_TRIM</name>
              <description>do_trim Field</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DO_TRIM</name>
                  <description>min delay</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_DRAM_ADDR07</name>
          <description>SW_PAD_CTL_PAD_DRAM_ADDR07 SW PAD Control Register</description>
          <addressOffset>0x220</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x8000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODT</name>
              <description>On Die Termination Field</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODT_0_off</name>
                  <description>off</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_1_120_Ohm_ODT</name>
                  <description>120 Ohm ODT</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_2_60_Ohm_ODT</name>
                  <description>60 Ohm ODT</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_3_40_Ohm_ODT</name>
                  <description>40 Ohm ODT</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_4_30_Ohm_ODT</name>
                  <description>30 Ohm ODT</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_5_24_Ohm_ODT</name>
                  <description>24 Ohm ODT</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_6_20_Ohm_ODT</name>
                  <description>20 Ohm ODT</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_7_17_Ohm_ODT</name>
                  <description>17 Ohm ODT</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DDR_INPUT</name>
              <description>DDR / CMOS Input Mode Field</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DDR_INPUT_0_CMOS_input_type</name>
                  <description>CMOS input type</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DDR_INPUT_1_Differential_input_mode</name>
                  <description>Differential input mode</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DDR_SEL</name>
              <description>ddr_sel Field</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>DO_TRIM</name>
              <description>do_trim Field</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DO_TRIM</name>
                  <description>min delay</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_DRAM_ADDR08</name>
          <description>SW_PAD_CTL_PAD_DRAM_ADDR08 SW PAD Control Register</description>
          <addressOffset>0x224</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x8000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODT</name>
              <description>On Die Termination Field</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODT_0_off</name>
                  <description>off</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_1_120_Ohm_ODT</name>
                  <description>120 Ohm ODT</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_2_60_Ohm_ODT</name>
                  <description>60 Ohm ODT</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_3_40_Ohm_ODT</name>
                  <description>40 Ohm ODT</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_4_30_Ohm_ODT</name>
                  <description>30 Ohm ODT</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_5_24_Ohm_ODT</name>
                  <description>24 Ohm ODT</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_6_20_Ohm_ODT</name>
                  <description>20 Ohm ODT</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_7_17_Ohm_ODT</name>
                  <description>17 Ohm ODT</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DDR_INPUT</name>
              <description>DDR / CMOS Input Mode Field</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DDR_INPUT_0_CMOS_input_type</name>
                  <description>CMOS input type</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DDR_INPUT_1_Differential_input_mode</name>
                  <description>Differential input mode</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DDR_SEL</name>
              <description>ddr_sel Field</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>DO_TRIM</name>
              <description>do_trim Field</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DO_TRIM</name>
                  <description>min delay</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_DRAM_ADDR09</name>
          <description>SW_PAD_CTL_PAD_DRAM_ADDR09 SW PAD Control Register</description>
          <addressOffset>0x228</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x8000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODT</name>
              <description>On Die Termination Field</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODT_0_off</name>
                  <description>off</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_1_120_Ohm_ODT</name>
                  <description>120 Ohm ODT</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_2_60_Ohm_ODT</name>
                  <description>60 Ohm ODT</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_3_40_Ohm_ODT</name>
                  <description>40 Ohm ODT</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_4_30_Ohm_ODT</name>
                  <description>30 Ohm ODT</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_5_24_Ohm_ODT</name>
                  <description>24 Ohm ODT</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_6_20_Ohm_ODT</name>
                  <description>20 Ohm ODT</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_7_17_Ohm_ODT</name>
                  <description>17 Ohm ODT</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DDR_INPUT</name>
              <description>DDR / CMOS Input Mode Field</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DDR_INPUT_0_CMOS_input_type</name>
                  <description>CMOS input type</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DDR_INPUT_1_Differential_input_mode</name>
                  <description>Differential input mode</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DDR_SEL</name>
              <description>ddr_sel Field</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>DO_TRIM</name>
              <description>do_trim Field</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DO_TRIM</name>
                  <description>min delay</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_DRAM_ADDR10</name>
          <description>SW_PAD_CTL_PAD_DRAM_ADDR10 SW PAD Control Register</description>
          <addressOffset>0x22C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x8000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODT</name>
              <description>On Die Termination Field</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODT_0_off</name>
                  <description>off</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_1_120_Ohm_ODT</name>
                  <description>120 Ohm ODT</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_2_60_Ohm_ODT</name>
                  <description>60 Ohm ODT</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_3_40_Ohm_ODT</name>
                  <description>40 Ohm ODT</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_4_30_Ohm_ODT</name>
                  <description>30 Ohm ODT</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_5_24_Ohm_ODT</name>
                  <description>24 Ohm ODT</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_6_20_Ohm_ODT</name>
                  <description>20 Ohm ODT</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_7_17_Ohm_ODT</name>
                  <description>17 Ohm ODT</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DDR_INPUT</name>
              <description>DDR / CMOS Input Mode Field</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DDR_INPUT_0_CMOS_input_type</name>
                  <description>CMOS input type</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DDR_INPUT_1_Differential_input_mode</name>
                  <description>Differential input mode</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DDR_SEL</name>
              <description>ddr_sel Field</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>DO_TRIM</name>
              <description>do_trim Field</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DO_TRIM_0_min_delay</name>
                  <description>min delay</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DO_TRIM_1_____50ps__ipp_do____pad_delay</name>
                  <description>+ ~50ps ipp_do -&gt; pad delay</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DO_TRIM_2_____100ps_ipp_do____pad_delay</name>
                  <description>+ ~100ps ipp_do -&gt; pad delay</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DO_TRIM_3_____150ps_ipp_do____pad_delay</name>
                  <description>+ ~150ps ipp_do -&gt; pad delay</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_DRAM_ADDR11</name>
          <description>SW_PAD_CTL_PAD_DRAM_ADDR11 SW PAD Control Register</description>
          <addressOffset>0x230</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x8000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODT</name>
              <description>On Die Termination Field</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODT_0_off</name>
                  <description>off</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_1_120_Ohm_ODT</name>
                  <description>120 Ohm ODT</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_2_60_Ohm_ODT</name>
                  <description>60 Ohm ODT</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_3_40_Ohm_ODT</name>
                  <description>40 Ohm ODT</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_4_30_Ohm_ODT</name>
                  <description>30 Ohm ODT</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_5_24_Ohm_ODT</name>
                  <description>24 Ohm ODT</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_6_20_Ohm_ODT</name>
                  <description>20 Ohm ODT</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_7_17_Ohm_ODT</name>
                  <description>17 Ohm ODT</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DDR_INPUT</name>
              <description>DDR / CMOS Input Mode Field</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DDR_INPUT_0_CMOS_input_type</name>
                  <description>CMOS input type</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DDR_INPUT_1_Differential_input_mode</name>
                  <description>Differential input mode</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DDR_SEL</name>
              <description>ddr_sel Field</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>DO_TRIM</name>
              <description>do_trim Field</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DO_TRIM_0_min_delay</name>
                  <description>min delay</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DO_TRIM_1_____50ps__ipp_do____pad_delay</name>
                  <description>+ ~50ps ipp_do -&gt; pad delay</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DO_TRIM_2_____100ps_ipp_do____pad_delay</name>
                  <description>+ ~100ps ipp_do -&gt; pad delay</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DO_TRIM_3_____150ps_ipp_do____pad_delay</name>
                  <description>+ ~150ps ipp_do -&gt; pad delay</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_DRAM_ADDR12</name>
          <description>SW_PAD_CTL_PAD_DRAM_ADDR12 SW PAD Control Register</description>
          <addressOffset>0x234</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x8000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODT</name>
              <description>On Die Termination Field</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODT_0_off</name>
                  <description>off</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_1_120_Ohm_ODT</name>
                  <description>120 Ohm ODT</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_2_60_Ohm_ODT</name>
                  <description>60 Ohm ODT</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_3_40_Ohm_ODT</name>
                  <description>40 Ohm ODT</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_4_30_Ohm_ODT</name>
                  <description>30 Ohm ODT</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_5_24_Ohm_ODT</name>
                  <description>24 Ohm ODT</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_6_20_Ohm_ODT</name>
                  <description>20 Ohm ODT</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_7_17_Ohm_ODT</name>
                  <description>17 Ohm ODT</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DDR_INPUT</name>
              <description>DDR / CMOS Input Mode Field</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DDR_INPUT_0_CMOS_input_type</name>
                  <description>CMOS input type</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DDR_INPUT_1_Differential_input_mode</name>
                  <description>Differential input mode</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DDR_SEL</name>
              <description>ddr_sel Field</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>DO_TRIM</name>
              <description>do_trim Field</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DO_TRIM_0_min_delay</name>
                  <description>min delay</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DO_TRIM_1_____50ps__ipp_do____pad_delay</name>
                  <description>+ ~50ps ipp_do -&gt; pad delay</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DO_TRIM_2_____100ps_ipp_do____pad_delay</name>
                  <description>+ ~100ps ipp_do -&gt; pad delay</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DO_TRIM_3_____150ps_ipp_do____pad_delay</name>
                  <description>+ ~150ps ipp_do -&gt; pad delay</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_DRAM_ADDR13</name>
          <description>SW_PAD_CTL_PAD_DRAM_ADDR13 SW PAD Control Register</description>
          <addressOffset>0x238</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x8000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODT</name>
              <description>On Die Termination Field</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODT_0_off</name>
                  <description>off</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_1_120_Ohm_ODT</name>
                  <description>120 Ohm ODT</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_2_60_Ohm_ODT</name>
                  <description>60 Ohm ODT</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_3_40_Ohm_ODT</name>
                  <description>40 Ohm ODT</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_4_30_Ohm_ODT</name>
                  <description>30 Ohm ODT</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_5_24_Ohm_ODT</name>
                  <description>24 Ohm ODT</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_6_20_Ohm_ODT</name>
                  <description>20 Ohm ODT</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_7_17_Ohm_ODT</name>
                  <description>17 Ohm ODT</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DDR_INPUT</name>
              <description>DDR / CMOS Input Mode Field</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DDR_INPUT_0_CMOS_input_type</name>
                  <description>CMOS input type</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DDR_INPUT_1_Differential_input_mode</name>
                  <description>Differential input mode</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DDR_SEL</name>
              <description>ddr_sel Field</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>DO_TRIM</name>
              <description>do_trim Field</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DO_TRIM_0_min_delay</name>
                  <description>min delay</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DO_TRIM_1_____50ps__ipp_do____pad_delay</name>
                  <description>+ ~50ps ipp_do -&gt; pad delay</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DO_TRIM_2_____100ps_ipp_do____pad_delay</name>
                  <description>+ ~100ps ipp_do -&gt; pad delay</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DO_TRIM_3_____150ps_ipp_do____pad_delay</name>
                  <description>+ ~150ps ipp_do -&gt; pad delay</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_DRAM_ADDR14</name>
          <description>SW_PAD_CTL_PAD_DRAM_ADDR14 SW PAD Control Register</description>
          <addressOffset>0x23C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x8000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODT</name>
              <description>On Die Termination Field</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODT_0_off</name>
                  <description>off</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_1_120_Ohm_ODT</name>
                  <description>120 Ohm ODT</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_2_60_Ohm_ODT</name>
                  <description>60 Ohm ODT</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_3_40_Ohm_ODT</name>
                  <description>40 Ohm ODT</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_4_30_Ohm_ODT</name>
                  <description>30 Ohm ODT</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_5_24_Ohm_ODT</name>
                  <description>24 Ohm ODT</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_6_20_Ohm_ODT</name>
                  <description>20 Ohm ODT</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_7_17_Ohm_ODT</name>
                  <description>17 Ohm ODT</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DDR_INPUT</name>
              <description>DDR / CMOS Input Mode Field</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DDR_INPUT_0_CMOS_input_type</name>
                  <description>CMOS input type</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DDR_INPUT_1_Differential_input_mode</name>
                  <description>Differential input mode</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DDR_SEL</name>
              <description>ddr_sel Field</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>DO_TRIM</name>
              <description>do_trim Field</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DO_TRIM_0_min_delay</name>
                  <description>min delay</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DO_TRIM_1_____50ps__ipp_do____pad_delay</name>
                  <description>+ ~50ps ipp_do -&gt; pad delay</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DO_TRIM_2_____100ps_ipp_do____pad_delay</name>
                  <description>+ ~100ps ipp_do -&gt; pad delay</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DO_TRIM_3_____150ps_ipp_do____pad_delay</name>
                  <description>+ ~150ps ipp_do -&gt; pad delay</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_DRAM_ADDR15</name>
          <description>SW_PAD_CTL_PAD_DRAM_ADDR15 SW PAD Control Register</description>
          <addressOffset>0x240</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x8000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODT</name>
              <description>On Die Termination Field</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODT_0_off</name>
                  <description>off</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_1_120_Ohm_ODT</name>
                  <description>120 Ohm ODT</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_2_60_Ohm_ODT</name>
                  <description>60 Ohm ODT</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_3_40_Ohm_ODT</name>
                  <description>40 Ohm ODT</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_4_30_Ohm_ODT</name>
                  <description>30 Ohm ODT</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_5_24_Ohm_ODT</name>
                  <description>24 Ohm ODT</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_6_20_Ohm_ODT</name>
                  <description>20 Ohm ODT</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_7_17_Ohm_ODT</name>
                  <description>17 Ohm ODT</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DDR_INPUT</name>
              <description>DDR / CMOS Input Mode Field</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DDR_INPUT_0_CMOS_input_type</name>
                  <description>CMOS input type</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DDR_INPUT_1_Differential_input_mode</name>
                  <description>Differential input mode</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DDR_SEL</name>
              <description>ddr_sel Field</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>DO_TRIM</name>
              <description>do_trim Field</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DO_TRIM_0_min_delay</name>
                  <description>min delay</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DO_TRIM_1_____50ps__ipp_do____pad_delay</name>
                  <description>+ ~50ps ipp_do -&gt; pad delay</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DO_TRIM_2_____100ps_ipp_do____pad_delay</name>
                  <description>+ ~100ps ipp_do -&gt; pad delay</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DO_TRIM_3_____150ps_ipp_do____pad_delay</name>
                  <description>+ ~150ps ipp_do -&gt; pad delay</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_DRAM_DQM0</name>
          <description>SW_PAD_CTL_PAD_DRAM_DQM0 SW PAD Control Register</description>
          <addressOffset>0x244</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x8030</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODT</name>
              <description>On Die Termination Field</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODT_0_off</name>
                  <description>off</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_1_120_Ohm_ODT</name>
                  <description>120 Ohm ODT</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_2_60_Ohm_ODT</name>
                  <description>60 Ohm ODT</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_3_40_Ohm_ODT</name>
                  <description>40 Ohm ODT</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_4_30_Ohm_ODT</name>
                  <description>30 Ohm ODT</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_5_24_Ohm_ODT</name>
                  <description>24 Ohm ODT</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_6_20_Ohm_ODT</name>
                  <description>20 Ohm ODT</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_7_17_Ohm_ODT</name>
                  <description>17 Ohm ODT</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DDR_INPUT</name>
              <description>DDR / CMOS Input Mode Field</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DDR_INPUT_0_CMOS_input_type</name>
                  <description>CMOS input type</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DDR_INPUT_1_Differential_input_mode</name>
                  <description>Differential input mode</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DDR_SEL</name>
              <description>ddr_sel Field</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>DO_TRIM</name>
              <description>do_trim Field</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DO_TRIM</name>
                  <description>min delay</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_DRAM_DQM1</name>
          <description>SW_PAD_CTL_PAD_DRAM_DQM1 SW PAD Control Register</description>
          <addressOffset>0x248</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x8030</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODT</name>
              <description>On Die Termination Field</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODT_0_off</name>
                  <description>off</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_1_120_Ohm_ODT</name>
                  <description>120 Ohm ODT</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_2_60_Ohm_ODT</name>
                  <description>60 Ohm ODT</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_3_40_Ohm_ODT</name>
                  <description>40 Ohm ODT</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_4_30_Ohm_ODT</name>
                  <description>30 Ohm ODT</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_5_24_Ohm_ODT</name>
                  <description>24 Ohm ODT</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_6_20_Ohm_ODT</name>
                  <description>20 Ohm ODT</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_7_17_Ohm_ODT</name>
                  <description>17 Ohm ODT</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DDR_INPUT</name>
              <description>DDR / CMOS Input Mode Field</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DDR_INPUT_0_CMOS_input_type</name>
                  <description>CMOS input type</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DDR_INPUT_1_Differential_input_mode</name>
                  <description>Differential input mode</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DDR_SEL</name>
              <description>ddr_sel Field</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>DO_TRIM</name>
              <description>do_trim Field</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DO_TRIM</name>
                  <description>min delay</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_DRAM_RAS_B</name>
          <description>SW_PAD_CTL_PAD_DRAM_RAS_B SW PAD Control Register</description>
          <addressOffset>0x24C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x8030</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODT</name>
              <description>On Die Termination Field</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODT_0_off</name>
                  <description>off</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_1_120_Ohm_ODT</name>
                  <description>120 Ohm ODT</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_2_60_Ohm_ODT</name>
                  <description>60 Ohm ODT</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_3_40_Ohm_ODT</name>
                  <description>40 Ohm ODT</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_4_30_Ohm_ODT</name>
                  <description>30 Ohm ODT</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_5_24_Ohm_ODT</name>
                  <description>24 Ohm ODT</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_6_20_Ohm_ODT</name>
                  <description>20 Ohm ODT</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_7_17_Ohm_ODT</name>
                  <description>17 Ohm ODT</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DDR_INPUT</name>
              <description>DDR / CMOS Input Mode Field</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DDR_INPUT_0_CMOS_input_type</name>
                  <description>CMOS input type</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DDR_INPUT_1_Differential_input_mode</name>
                  <description>Differential input mode</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DDR_SEL</name>
              <description>ddr_sel Field</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>DO_TRIM</name>
              <description>do_trim Field</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DO_TRIM_0_min_delay</name>
                  <description>min delay</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DO_TRIM_1_____50ps__ipp_do____pad_delay</name>
                  <description>+ ~50ps ipp_do -&gt; pad delay</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DO_TRIM_2_____100ps_ipp_do____pad_delay</name>
                  <description>+ ~100ps ipp_do -&gt; pad delay</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DO_TRIM_3_____150ps_ipp_do____pad_delay</name>
                  <description>+ ~150ps ipp_do -&gt; pad delay</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_DRAM_CAS_B</name>
          <description>SW_PAD_CTL_PAD_DRAM_CAS_B SW PAD Control Register</description>
          <addressOffset>0x250</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x8030</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODT</name>
              <description>On Die Termination Field</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODT_0_off</name>
                  <description>off</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_1_120_Ohm_ODT</name>
                  <description>120 Ohm ODT</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_2_60_Ohm_ODT</name>
                  <description>60 Ohm ODT</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_3_40_Ohm_ODT</name>
                  <description>40 Ohm ODT</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_4_30_Ohm_ODT</name>
                  <description>30 Ohm ODT</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_5_24_Ohm_ODT</name>
                  <description>24 Ohm ODT</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_6_20_Ohm_ODT</name>
                  <description>20 Ohm ODT</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_7_17_Ohm_ODT</name>
                  <description>17 Ohm ODT</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DDR_INPUT</name>
              <description>DDR / CMOS Input Mode Field</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DDR_INPUT_0_CMOS_input_type</name>
                  <description>CMOS input type</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DDR_INPUT_1_Differential_input_mode</name>
                  <description>Differential input mode</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DDR_SEL</name>
              <description>ddr_sel Field</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>DO_TRIM</name>
              <description>do_trim Field</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DO_TRIM_0_min_delay</name>
                  <description>min delay</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DO_TRIM_1_____50ps__ipp_do____pad_delay</name>
                  <description>+ ~50ps ipp_do -&gt; pad delay</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DO_TRIM_2_____100ps_ipp_do____pad_delay</name>
                  <description>+ ~100ps ipp_do -&gt; pad delay</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DO_TRIM_3_____150ps_ipp_do____pad_delay</name>
                  <description>+ ~150ps ipp_do -&gt; pad delay</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_DRAM_CS0_B</name>
          <description>SW_PAD_CTL_PAD_DRAM_CS0_B SW PAD Control Register</description>
          <addressOffset>0x254</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x8000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODT</name>
              <description>On Die Termination Field</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODT_0_off</name>
                  <description>off</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_1_120_Ohm_ODT</name>
                  <description>120 Ohm ODT</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_2_60_Ohm_ODT</name>
                  <description>60 Ohm ODT</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_3_40_Ohm_ODT</name>
                  <description>40 Ohm ODT</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_4_30_Ohm_ODT</name>
                  <description>30 Ohm ODT</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_5_24_Ohm_ODT</name>
                  <description>24 Ohm ODT</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_6_20_Ohm_ODT</name>
                  <description>20 Ohm ODT</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_7_17_Ohm_ODT</name>
                  <description>17 Ohm ODT</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DDR_INPUT</name>
              <description>DDR / CMOS Input Mode Field</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DDR_INPUT_0_CMOS_input_type</name>
                  <description>CMOS input type</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DDR_INPUT_1_Differential_input_mode</name>
                  <description>Differential input mode</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DDR_SEL</name>
              <description>ddr_sel Field</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>DO_TRIM</name>
              <description>do_trim Field</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DO_TRIM_0_min_delay</name>
                  <description>min delay</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DO_TRIM_1_____50ps__ipp_do____pad_delay</name>
                  <description>+ ~50ps ipp_do -&gt; pad delay</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DO_TRIM_2_____100ps_ipp_do____pad_delay</name>
                  <description>+ ~100ps ipp_do -&gt; pad delay</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DO_TRIM_3_____150ps_ipp_do____pad_delay</name>
                  <description>+ ~150ps ipp_do -&gt; pad delay</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_DRAM_CS1_B</name>
          <description>SW_PAD_CTL_PAD_DRAM_CS1_B SW PAD Control Register</description>
          <addressOffset>0x258</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x8000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODT</name>
              <description>On Die Termination Field</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODT_0_off</name>
                  <description>off</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_1_120_Ohm_ODT</name>
                  <description>120 Ohm ODT</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_2_60_Ohm_ODT</name>
                  <description>60 Ohm ODT</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_3_40_Ohm_ODT</name>
                  <description>40 Ohm ODT</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_4_30_Ohm_ODT</name>
                  <description>30 Ohm ODT</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_5_24_Ohm_ODT</name>
                  <description>24 Ohm ODT</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_6_20_Ohm_ODT</name>
                  <description>20 Ohm ODT</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_7_17_Ohm_ODT</name>
                  <description>17 Ohm ODT</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DDR_INPUT</name>
              <description>DDR / CMOS Input Mode Field</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DDR_INPUT_0_CMOS_input_type</name>
                  <description>CMOS input type</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DDR_INPUT_1_Differential_input_mode</name>
                  <description>Differential input mode</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DDR_SEL</name>
              <description>ddr_sel Field</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>DO_TRIM</name>
              <description>do_trim Field</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DO_TRIM_0_min_delay</name>
                  <description>min delay</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DO_TRIM_1_____50ps__ipp_do____pad_delay</name>
                  <description>+ ~50ps ipp_do -&gt; pad delay</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DO_TRIM_2_____100ps_ipp_do____pad_delay</name>
                  <description>+ ~100ps ipp_do -&gt; pad delay</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DO_TRIM_3_____150ps_ipp_do____pad_delay</name>
                  <description>+ ~150ps ipp_do -&gt; pad delay</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_DRAM_SDWE_B</name>
          <description>SW_PAD_CTL_PAD_DRAM_SDWE_B SW PAD Control Register</description>
          <addressOffset>0x25C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x8000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODT</name>
              <description>On Die Termination Field</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODT_0_off</name>
                  <description>off</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_1_120_Ohm_ODT</name>
                  <description>120 Ohm ODT</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_2_60_Ohm_ODT</name>
                  <description>60 Ohm ODT</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_3_40_Ohm_ODT</name>
                  <description>40 Ohm ODT</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_4_30_Ohm_ODT</name>
                  <description>30 Ohm ODT</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_5_24_Ohm_ODT</name>
                  <description>24 Ohm ODT</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_6_20_Ohm_ODT</name>
                  <description>20 Ohm ODT</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_7_17_Ohm_ODT</name>
                  <description>17 Ohm ODT</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DDR_INPUT</name>
              <description>DDR / CMOS Input Mode Field</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DDR_INPUT_0_CMOS_input_type</name>
                  <description>CMOS input type</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DDR_INPUT_1_Differential_input_mode</name>
                  <description>Differential input mode</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DDR_SEL</name>
              <description>ddr_sel Field</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>DO_TRIM</name>
              <description>do_trim Field</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DO_TRIM_0_min_delay</name>
                  <description>min delay</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DO_TRIM_1_____50ps__ipp_do____pad_delay</name>
                  <description>+ ~50ps ipp_do -&gt; pad delay</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DO_TRIM_2_____100ps_ipp_do____pad_delay</name>
                  <description>+ ~100ps ipp_do -&gt; pad delay</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DO_TRIM_3_____150ps_ipp_do____pad_delay</name>
                  <description>+ ~150ps ipp_do -&gt; pad delay</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_DRAM_ODT0</name>
          <description>SW_PAD_CTL_PAD_DRAM_ODT0 SW PAD Control Register</description>
          <addressOffset>0x260</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x3030</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODT</name>
              <description>On Die Termination Field</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODT_0_off</name>
                  <description>off</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_1_120_Ohm_ODT</name>
                  <description>120 Ohm ODT</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_2_60_Ohm_ODT</name>
                  <description>60 Ohm ODT</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_3_40_Ohm_ODT</name>
                  <description>40 Ohm ODT</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_4_30_Ohm_ODT</name>
                  <description>30 Ohm ODT</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_5_24_Ohm_ODT</name>
                  <description>24 Ohm ODT</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_6_20_Ohm_ODT</name>
                  <description>20 Ohm ODT</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_7_17_Ohm_ODT</name>
                  <description>17 Ohm ODT</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DDR_INPUT</name>
              <description>DDR / CMOS Input Mode Field</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DDR_INPUT_0_CMOS_input_type</name>
                  <description>CMOS input type</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DDR_INPUT_1_Differential_input_mode</name>
                  <description>Differential input mode</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DDR_SEL</name>
              <description>ddr_sel Field</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>DO_TRIM</name>
              <description>do_trim Field</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DO_TRIM_0_min_delay</name>
                  <description>min delay</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DO_TRIM_1_____50ps__ipp_do____pad_delay</name>
                  <description>+ ~50ps ipp_do -&gt; pad delay</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DO_TRIM_2_____100ps_ipp_do____pad_delay</name>
                  <description>+ ~100ps ipp_do -&gt; pad delay</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DO_TRIM_3_____150ps_ipp_do____pad_delay</name>
                  <description>+ ~150ps ipp_do -&gt; pad delay</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_DRAM_ODT1</name>
          <description>SW_PAD_CTL_PAD_DRAM_ODT1 SW PAD Control Register</description>
          <addressOffset>0x264</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x3030</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODT</name>
              <description>On Die Termination Field</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODT_0_off</name>
                  <description>off</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_1_120_Ohm_ODT</name>
                  <description>120 Ohm ODT</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_2_60_Ohm_ODT</name>
                  <description>60 Ohm ODT</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_3_40_Ohm_ODT</name>
                  <description>40 Ohm ODT</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_4_30_Ohm_ODT</name>
                  <description>30 Ohm ODT</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_5_24_Ohm_ODT</name>
                  <description>24 Ohm ODT</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_6_20_Ohm_ODT</name>
                  <description>20 Ohm ODT</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_7_17_Ohm_ODT</name>
                  <description>17 Ohm ODT</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DDR_INPUT</name>
              <description>DDR / CMOS Input Mode Field</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DDR_INPUT_0_CMOS_input_type</name>
                  <description>CMOS input type</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DDR_INPUT_1_Differential_input_mode</name>
                  <description>Differential input mode</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DDR_SEL</name>
              <description>ddr_sel Field</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>DO_TRIM</name>
              <description>do_trim Field</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DO_TRIM_0_min_delay</name>
                  <description>min delay</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DO_TRIM_1_____50ps__ipp_do____pad_delay</name>
                  <description>+ ~50ps ipp_do -&gt; pad delay</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DO_TRIM_2_____100ps_ipp_do____pad_delay</name>
                  <description>+ ~100ps ipp_do -&gt; pad delay</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DO_TRIM_3_____150ps_ipp_do____pad_delay</name>
                  <description>+ ~150ps ipp_do -&gt; pad delay</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_DRAM_SDBA0</name>
          <description>SW_PAD_CTL_PAD_DRAM_SDBA0 SW PAD Control Register</description>
          <addressOffset>0x268</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x8000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODT</name>
              <description>On Die Termination Field</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODT_0_off</name>
                  <description>off</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_1_120_Ohm_ODT</name>
                  <description>120 Ohm ODT</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_2_60_Ohm_ODT</name>
                  <description>60 Ohm ODT</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_3_40_Ohm_ODT</name>
                  <description>40 Ohm ODT</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_4_30_Ohm_ODT</name>
                  <description>30 Ohm ODT</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_5_24_Ohm_ODT</name>
                  <description>24 Ohm ODT</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_6_20_Ohm_ODT</name>
                  <description>20 Ohm ODT</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_7_17_Ohm_ODT</name>
                  <description>17 Ohm ODT</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DDR_INPUT</name>
              <description>DDR / CMOS Input Mode Field</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DDR_INPUT_0_CMOS_input_type</name>
                  <description>CMOS input type</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DDR_INPUT_1_Differential_input_mode</name>
                  <description>Differential input mode</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DDR_SEL</name>
              <description>ddr_sel Field</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>DO_TRIM</name>
              <description>do_trim Field</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DO_TRIM_0_min_delay</name>
                  <description>min delay</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DO_TRIM_1_____50ps__ipp_do____pad_delay</name>
                  <description>+ ~50ps ipp_do -&gt; pad delay</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DO_TRIM_2_____100ps_ipp_do____pad_delay</name>
                  <description>+ ~100ps ipp_do -&gt; pad delay</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DO_TRIM_3_____150ps_ipp_do____pad_delay</name>
                  <description>+ ~150ps ipp_do -&gt; pad delay</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_DRAM_SDBA1</name>
          <description>SW_PAD_CTL_PAD_DRAM_SDBA1 SW PAD Control Register</description>
          <addressOffset>0x26C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x8000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODT</name>
              <description>On Die Termination Field</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODT_0_off</name>
                  <description>off</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_1_120_Ohm_ODT</name>
                  <description>120 Ohm ODT</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_2_60_Ohm_ODT</name>
                  <description>60 Ohm ODT</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_3_40_Ohm_ODT</name>
                  <description>40 Ohm ODT</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_4_30_Ohm_ODT</name>
                  <description>30 Ohm ODT</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_5_24_Ohm_ODT</name>
                  <description>24 Ohm ODT</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_6_20_Ohm_ODT</name>
                  <description>20 Ohm ODT</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_7_17_Ohm_ODT</name>
                  <description>17 Ohm ODT</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DDR_INPUT</name>
              <description>DDR / CMOS Input Mode Field</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DDR_INPUT_0_CMOS_input_type</name>
                  <description>CMOS input type</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DDR_INPUT_1_Differential_input_mode</name>
                  <description>Differential input mode</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DDR_SEL</name>
              <description>ddr_sel Field</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>DO_TRIM</name>
              <description>do_trim Field</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DO_TRIM_0_min_delay</name>
                  <description>min delay</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DO_TRIM_1_____50ps__ipp_do____pad_delay</name>
                  <description>+ ~50ps ipp_do -&gt; pad delay</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DO_TRIM_2_____100ps_ipp_do____pad_delay</name>
                  <description>+ ~100ps ipp_do -&gt; pad delay</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DO_TRIM_3_____150ps_ipp_do____pad_delay</name>
                  <description>+ ~150ps ipp_do -&gt; pad delay</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_DRAM_SDBA2</name>
          <description>SW_PAD_CTL_PAD_DRAM_SDBA2 SW PAD Control Register</description>
          <addressOffset>0x270</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0xB000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODT</name>
              <description>On Die Termination Field</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODT_0_off</name>
                  <description>off</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_1_120_Ohm_ODT</name>
                  <description>120 Ohm ODT</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_2_60_Ohm_ODT</name>
                  <description>60 Ohm ODT</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_3_40_Ohm_ODT</name>
                  <description>40 Ohm ODT</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_4_30_Ohm_ODT</name>
                  <description>30 Ohm ODT</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_5_24_Ohm_ODT</name>
                  <description>24 Ohm ODT</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_6_20_Ohm_ODT</name>
                  <description>20 Ohm ODT</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_7_17_Ohm_ODT</name>
                  <description>17 Ohm ODT</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DDR_INPUT</name>
              <description>DDR / CMOS Input Mode Field</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DDR_INPUT_0_CMOS_input_type</name>
                  <description>CMOS input type</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DDR_INPUT_1_Differential_input_mode</name>
                  <description>Differential input mode</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DDR_SEL</name>
              <description>ddr_sel Field</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>DO_TRIM</name>
              <description>do_trim Field</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DO_TRIM_0_min_delay</name>
                  <description>min delay</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DO_TRIM_1_____50ps__ipp_do____pad_delay</name>
                  <description>+ ~50ps ipp_do -&gt; pad delay</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DO_TRIM_2_____100ps_ipp_do____pad_delay</name>
                  <description>+ ~100ps ipp_do -&gt; pad delay</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DO_TRIM_3_____150ps_ipp_do____pad_delay</name>
                  <description>+ ~150ps ipp_do -&gt; pad delay</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_DRAM_SDCKE0</name>
          <description>SW_PAD_CTL_PAD_DRAM_SDCKE0 SW PAD Control Register</description>
          <addressOffset>0x274</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x3000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODT</name>
              <description>On Die Termination Field</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODT_0_off</name>
                  <description>off</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_1_120_Ohm_ODT</name>
                  <description>120 Ohm ODT</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_2_60_Ohm_ODT</name>
                  <description>60 Ohm ODT</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_3_40_Ohm_ODT</name>
                  <description>40 Ohm ODT</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_4_30_Ohm_ODT</name>
                  <description>30 Ohm ODT</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_5_24_Ohm_ODT</name>
                  <description>24 Ohm ODT</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_6_20_Ohm_ODT</name>
                  <description>20 Ohm ODT</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_7_17_Ohm_ODT</name>
                  <description>17 Ohm ODT</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DDR_INPUT</name>
              <description>DDR / CMOS Input Mode Field</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DDR_INPUT_0_CMOS_input_type</name>
                  <description>CMOS input type</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DDR_INPUT_1_Differential_input_mode</name>
                  <description>Differential input mode</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DDR_SEL</name>
              <description>ddr_sel Field</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>DO_TRIM</name>
              <description>do_trim Field</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DO_TRIM_0_min_delay</name>
                  <description>min delay</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DO_TRIM_1_____50ps__ipp_do____pad_delay</name>
                  <description>+ ~50ps ipp_do -&gt; pad delay</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DO_TRIM_2_____100ps_ipp_do____pad_delay</name>
                  <description>+ ~100ps ipp_do -&gt; pad delay</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DO_TRIM_3_____150ps_ipp_do____pad_delay</name>
                  <description>+ ~150ps ipp_do -&gt; pad delay</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_DRAM_SDCKE1</name>
          <description>SW_PAD_CTL_PAD_DRAM_SDCKE1 SW PAD Control Register</description>
          <addressOffset>0x278</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x3000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODT</name>
              <description>On Die Termination Field</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODT_0_off</name>
                  <description>off</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_1_120_Ohm_ODT</name>
                  <description>120 Ohm ODT</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_2_60_Ohm_ODT</name>
                  <description>60 Ohm ODT</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_3_40_Ohm_ODT</name>
                  <description>40 Ohm ODT</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_4_30_Ohm_ODT</name>
                  <description>30 Ohm ODT</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_5_24_Ohm_ODT</name>
                  <description>24 Ohm ODT</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_6_20_Ohm_ODT</name>
                  <description>20 Ohm ODT</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_7_17_Ohm_ODT</name>
                  <description>17 Ohm ODT</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DDR_INPUT</name>
              <description>DDR / CMOS Input Mode Field</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DDR_INPUT_0_CMOS_input_type</name>
                  <description>CMOS input type</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DDR_INPUT_1_Differential_input_mode</name>
                  <description>Differential input mode</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DDR_SEL</name>
              <description>ddr_sel Field</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>DO_TRIM</name>
              <description>do_trim Field</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DO_TRIM_0_min_delay</name>
                  <description>min delay</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DO_TRIM_1_____50ps__ipp_do____pad_delay</name>
                  <description>+ ~50ps ipp_do -&gt; pad delay</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DO_TRIM_2_____100ps_ipp_do____pad_delay</name>
                  <description>+ ~100ps ipp_do -&gt; pad delay</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DO_TRIM_3_____150ps_ipp_do____pad_delay</name>
                  <description>+ ~150ps ipp_do -&gt; pad delay</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_DRAM_SDCLK0_P</name>
          <description>SW_PAD_CTL_PAD_DRAM_SDCLK0_P SW PAD Control Register</description>
          <addressOffset>0x27C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x8030</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODT</name>
              <description>On Die Termination Field</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODT_0_off</name>
                  <description>off</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_1_120_Ohm_ODT</name>
                  <description>120 Ohm ODT</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_2_60_Ohm_ODT</name>
                  <description>60 Ohm ODT</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_3_40_Ohm_ODT</name>
                  <description>40 Ohm ODT</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_4_30_Ohm_ODT</name>
                  <description>30 Ohm ODT</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_5_24_Ohm_ODT</name>
                  <description>24 Ohm ODT</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_6_20_Ohm_ODT</name>
                  <description>20 Ohm ODT</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_7_17_Ohm_ODT</name>
                  <description>17 Ohm ODT</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DDR_INPUT</name>
              <description>DDR / CMOS Input Mode Field</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DDR_INPUT_0_CMOS_input_type</name>
                  <description>CMOS input type</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DDR_INPUT_1_Differential_input_mode</name>
                  <description>Differential input mode</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DDR_SEL</name>
              <description>ddr_sel Field</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>DO_TRIM</name>
              <description>do_trim Field</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DO_TRIM_0_min_delay</name>
                  <description>min delay</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DO_TRIM_1_____50ps__ipp_do____pad_delay</name>
                  <description>+ ~50ps ipp_do -&gt; pad delay</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DO_TRIM_2_____100ps_ipp_do____pad_delay</name>
                  <description>+ ~100ps ipp_do -&gt; pad delay</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DO_TRIM_3_____150ps_ipp_do____pad_delay</name>
                  <description>+ ~150ps ipp_do -&gt; pad delay</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DO_TRIM_PADN</name>
              <description>do_trim_padn Field</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DO_TRIM_PADN_0_min_delay</name>
                  <description>min delay</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DO_TRIM_PADN_1_____50ps__ipp_do____pad_delay</name>
                  <description>+ ~50ps ipp_do -&gt; pad delay</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DO_TRIM_PADN_2_____100ps_ipp_do____pad_delay</name>
                  <description>+ ~100ps ipp_do -&gt; pad delay</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DO_TRIM_PADN_3_____150ps_ipp_do____pad_delay</name>
                  <description>+ ~150ps ipp_do -&gt; pad delay</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_DRAM_SDQS0_P</name>
          <description>SW_PAD_CTL_PAD_DRAM_SDQS0_P SW PAD Control Register</description>
          <addressOffset>0x280</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x2030</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODT</name>
              <description>On Die Termination Field</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODT</name>
                  <description>off</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DDR_INPUT</name>
              <description>DDR / CMOS Input Mode Field</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DDR_INPUT</name>
                  <description>CMOS input type</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DDR_SEL</name>
              <description>ddr_sel Field</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>DO_TRIM</name>
              <description>do_trim Field</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DO_TRIM_0_min_delay</name>
                  <description>min delay</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DO_TRIM_1_____50ps__ipp_do____pad_delay</name>
                  <description>+ ~50ps ipp_do -&gt; pad delay</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DO_TRIM_2_____100ps_ipp_do____pad_delay</name>
                  <description>+ ~100ps ipp_do -&gt; pad delay</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DO_TRIM_3_____150ps_ipp_do____pad_delay</name>
                  <description>+ ~150ps ipp_do -&gt; pad delay</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DO_TRIM_PADN</name>
              <description>do_trim_padn Field</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DO_TRIM_PADN_0_min_delay</name>
                  <description>min delay</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DO_TRIM_PADN_1_____50ps__ipp_do____pad_delay</name>
                  <description>+ ~50ps ipp_do -&gt; pad delay</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DO_TRIM_PADN_2_____100ps_ipp_do____pad_delay</name>
                  <description>+ ~100ps ipp_do -&gt; pad delay</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DO_TRIM_PADN_3_____150ps_ipp_do____pad_delay</name>
                  <description>+ ~150ps ipp_do -&gt; pad delay</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_DRAM_SDQS1_P</name>
          <description>SW_PAD_CTL_PAD_DRAM_SDQS1_P SW PAD Control Register</description>
          <addressOffset>0x284</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x2030</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODT</name>
              <description>On Die Termination Field</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODT</name>
                  <description>off</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DDR_INPUT</name>
              <description>DDR / CMOS Input Mode Field</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DDR_INPUT</name>
                  <description>CMOS input type</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DDR_SEL</name>
              <description>ddr_sel Field</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>DO_TRIM</name>
              <description>do_trim Field</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DO_TRIM_0_min_delay</name>
                  <description>min delay</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DO_TRIM_1_____50ps__ipp_do____pad_delay</name>
                  <description>+ ~50ps ipp_do -&gt; pad delay</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DO_TRIM_2_____100ps_ipp_do____pad_delay</name>
                  <description>+ ~100ps ipp_do -&gt; pad delay</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DO_TRIM_3_____150ps_ipp_do____pad_delay</name>
                  <description>+ ~150ps ipp_do -&gt; pad delay</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DO_TRIM_PADN</name>
              <description>do_trim_padn Field</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DO_TRIM_PADN_0_min_delay</name>
                  <description>min delay</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DO_TRIM_PADN_1_____50ps__ipp_do____pad_delay</name>
                  <description>+ ~50ps ipp_do -&gt; pad delay</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DO_TRIM_PADN_2_____100ps_ipp_do____pad_delay</name>
                  <description>+ ~100ps ipp_do -&gt; pad delay</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DO_TRIM_PADN_3_____150ps_ipp_do____pad_delay</name>
                  <description>+ ~150ps ipp_do -&gt; pad delay</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_DRAM_RESET</name>
          <description>SW_PAD_CTL_PAD_DRAM_RESET SW PAD Control Register</description>
          <addressOffset>0x288</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x83030</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODT</name>
              <description>On Die Termination Field</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODT_0_off</name>
                  <description>off</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_1_120_Ohm_ODT</name>
                  <description>120 Ohm ODT</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_2_60_Ohm_ODT</name>
                  <description>60 Ohm ODT</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_3_40_Ohm_ODT</name>
                  <description>40 Ohm ODT</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_4_30_Ohm_ODT</name>
                  <description>30 Ohm ODT</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_5_24_Ohm_ODT</name>
                  <description>24 Ohm ODT</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_6_20_Ohm_ODT</name>
                  <description>20 Ohm ODT</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_7_17_Ohm_ODT</name>
                  <description>17 Ohm ODT</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DDR_INPUT</name>
              <description>DDR / CMOS Input Mode Field</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DDR_INPUT_0_CMOS_input_type</name>
                  <description>CMOS input type</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DDR_INPUT_1_Differential_input_mode</name>
                  <description>Differential input mode</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DDR_SEL</name>
              <description>ddr_sel Field</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DDR_SEL_2_LPDDR2_mode</name>
                  <description>LPDDR2 mode</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DDR_SEL_3_DDR3_mode</name>
                  <description>DDR3 mode</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DO_TRIM</name>
              <description>do_trim Field</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DO_TRIM_0_min_delay</name>
                  <description>min delay</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DO_TRIM_1_____50ps__ipp_do____pad_delay</name>
                  <description>+ ~50ps ipp_do -&gt; pad delay</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DO_TRIM_2_____100ps_ipp_do____pad_delay</name>
                  <description>+ ~100ps ipp_do -&gt; pad delay</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DO_TRIM_3_____150ps_ipp_do____pad_delay</name>
                  <description>+ ~150ps ipp_do -&gt; pad delay</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_JTAG_MOD</name>
          <description>SW_PAD_CTL_PAD_JTAG_MOD SW PAD Control Register</description>
          <addressOffset>0x2D0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0xB0A0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_JTAG_TMS</name>
          <description>SW_PAD_CTL_PAD_JTAG_TMS SW PAD Control Register</description>
          <addressOffset>0x2D4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x70A0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_JTAG_TDO</name>
          <description>SW_PAD_CTL_PAD_JTAG_TDO SW PAD Control Register</description>
          <addressOffset>0x2D8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x90B1</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_JTAG_TDI</name>
          <description>SW_PAD_CTL_PAD_JTAG_TDI SW PAD Control Register</description>
          <addressOffset>0x2DC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x70A0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_JTAG_TCK</name>
          <description>SW_PAD_CTL_PAD_JTAG_TCK SW PAD Control Register</description>
          <addressOffset>0x2E0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x70A0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_JTAG_TRST_B</name>
          <description>SW_PAD_CTL_PAD_JTAG_TRST_B SW PAD Control Register</description>
          <addressOffset>0x2E4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x70A0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_GPIO1_IO00</name>
          <description>SW_PAD_CTL_PAD_GPIO1_IO00 SW PAD Control Register</description>
          <addressOffset>0x2E8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_GPIO1_IO01</name>
          <description>SW_PAD_CTL_PAD_GPIO1_IO01 SW PAD Control Register</description>
          <addressOffset>0x2EC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_GPIO1_IO02</name>
          <description>SW_PAD_CTL_PAD_GPIO1_IO02 SW PAD Control Register</description>
          <addressOffset>0x2F0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_GPIO1_IO03</name>
          <description>SW_PAD_CTL_PAD_GPIO1_IO03 SW PAD Control Register</description>
          <addressOffset>0x2F4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_GPIO1_IO04</name>
          <description>SW_PAD_CTL_PAD_GPIO1_IO04 SW PAD Control Register</description>
          <addressOffset>0x2F8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_GPIO1_IO05</name>
          <description>SW_PAD_CTL_PAD_GPIO1_IO05 SW PAD Control Register</description>
          <addressOffset>0x2FC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_GPIO1_IO06</name>
          <description>SW_PAD_CTL_PAD_GPIO1_IO06 SW PAD Control Register</description>
          <addressOffset>0x300</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_GPIO1_IO07</name>
          <description>SW_PAD_CTL_PAD_GPIO1_IO07 SW PAD Control Register</description>
          <addressOffset>0x304</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_GPIO1_IO08</name>
          <description>SW_PAD_CTL_PAD_GPIO1_IO08 SW PAD Control Register</description>
          <addressOffset>0x308</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_GPIO1_IO09</name>
          <description>SW_PAD_CTL_PAD_GPIO1_IO09 SW PAD Control Register</description>
          <addressOffset>0x30C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_UART1_TX_DATA</name>
          <description>SW_PAD_CTL_PAD_UART1_TX_DATA SW PAD Control Register</description>
          <addressOffset>0x310</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_UART1_RX_DATA</name>
          <description>SW_PAD_CTL_PAD_UART1_RX_DATA SW PAD Control Register</description>
          <addressOffset>0x314</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_UART1_CTS_B</name>
          <description>SW_PAD_CTL_PAD_UART1_CTS_B SW PAD Control Register</description>
          <addressOffset>0x318</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_UART1_RTS_B</name>
          <description>SW_PAD_CTL_PAD_UART1_RTS_B SW PAD Control Register</description>
          <addressOffset>0x31C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_UART2_TX_DATA</name>
          <description>SW_PAD_CTL_PAD_UART2_TX_DATA SW PAD Control Register</description>
          <addressOffset>0x320</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_UART2_RX_DATA</name>
          <description>SW_PAD_CTL_PAD_UART2_RX_DATA SW PAD Control Register</description>
          <addressOffset>0x324</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_UART2_CTS_B</name>
          <description>SW_PAD_CTL_PAD_UART2_CTS_B SW PAD Control Register</description>
          <addressOffset>0x328</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_UART2_RTS_B</name>
          <description>SW_PAD_CTL_PAD_UART2_RTS_B SW PAD Control Register</description>
          <addressOffset>0x32C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_UART3_TX_DATA</name>
          <description>SW_PAD_CTL_PAD_UART3_TX_DATA SW PAD Control Register</description>
          <addressOffset>0x330</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_UART3_RX_DATA</name>
          <description>SW_PAD_CTL_PAD_UART3_RX_DATA SW PAD Control Register</description>
          <addressOffset>0x334</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_UART3_CTS_B</name>
          <description>SW_PAD_CTL_PAD_UART3_CTS_B SW PAD Control Register</description>
          <addressOffset>0x338</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_UART3_RTS_B</name>
          <description>SW_PAD_CTL_PAD_UART3_RTS_B SW PAD Control Register</description>
          <addressOffset>0x33C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_UART4_TX_DATA</name>
          <description>SW_PAD_CTL_PAD_UART4_TX_DATA SW PAD Control Register</description>
          <addressOffset>0x340</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_UART4_RX_DATA</name>
          <description>SW_PAD_CTL_PAD_UART4_RX_DATA SW PAD Control Register</description>
          <addressOffset>0x344</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_UART5_TX_DATA</name>
          <description>SW_PAD_CTL_PAD_UART5_TX_DATA SW PAD Control Register</description>
          <addressOffset>0x348</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_UART5_RX_DATA</name>
          <description>SW_PAD_CTL_PAD_UART5_RX_DATA SW PAD Control Register</description>
          <addressOffset>0x34C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_ENET1_RX_DATA0</name>
          <description>SW_PAD_CTL_PAD_ENET1_RX_DATA0 SW PAD Control Register</description>
          <addressOffset>0x350</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_ENET1_RX_DATA1</name>
          <description>SW_PAD_CTL_PAD_ENET1_RX_DATA1 SW PAD Control Register</description>
          <addressOffset>0x354</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_ENET1_RX_EN</name>
          <description>SW_PAD_CTL_PAD_ENET1_RX_EN SW PAD Control Register</description>
          <addressOffset>0x358</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_ENET1_TX_DATA0</name>
          <description>SW_PAD_CTL_PAD_ENET1_TX_DATA0 SW PAD Control Register</description>
          <addressOffset>0x35C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_ENET1_TX_DATA1</name>
          <description>SW_PAD_CTL_PAD_ENET1_TX_DATA1 SW PAD Control Register</description>
          <addressOffset>0x360</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_ENET1_TX_EN</name>
          <description>SW_PAD_CTL_PAD_ENET1_TX_EN SW PAD Control Register</description>
          <addressOffset>0x364</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_ENET1_TX_CLK</name>
          <description>SW_PAD_CTL_PAD_ENET1_TX_CLK SW PAD Control Register</description>
          <addressOffset>0x368</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_ENET1_RX_ER</name>
          <description>SW_PAD_CTL_PAD_ENET1_RX_ER SW PAD Control Register</description>
          <addressOffset>0x36C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_ENET2_RX_DATA0</name>
          <description>SW_PAD_CTL_PAD_ENET2_RX_DATA0 SW PAD Control Register</description>
          <addressOffset>0x370</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_ENET2_RX_DATA1</name>
          <description>SW_PAD_CTL_PAD_ENET2_RX_DATA1 SW PAD Control Register</description>
          <addressOffset>0x374</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_ENET2_RX_EN</name>
          <description>SW_PAD_CTL_PAD_ENET2_RX_EN SW PAD Control Register</description>
          <addressOffset>0x378</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_ENET2_TX_DATA0</name>
          <description>SW_PAD_CTL_PAD_ENET2_TX_DATA0 SW PAD Control Register</description>
          <addressOffset>0x37C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_ENET2_TX_DATA1</name>
          <description>SW_PAD_CTL_PAD_ENET2_TX_DATA1 SW PAD Control Register</description>
          <addressOffset>0x380</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_ENET2_TX_EN</name>
          <description>SW_PAD_CTL_PAD_ENET2_TX_EN SW PAD Control Register</description>
          <addressOffset>0x384</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_ENET2_TX_CLK</name>
          <description>SW_PAD_CTL_PAD_ENET2_TX_CLK SW PAD Control Register</description>
          <addressOffset>0x388</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_ENET2_RX_ER</name>
          <description>SW_PAD_CTL_PAD_ENET2_RX_ER SW PAD Control Register</description>
          <addressOffset>0x38C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_LCD_CLK</name>
          <description>SW_PAD_CTL_PAD_LCD_CLK SW PAD Control Register</description>
          <addressOffset>0x390</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_LCD_ENABLE</name>
          <description>SW_PAD_CTL_PAD_LCD_ENABLE SW PAD Control Register</description>
          <addressOffset>0x394</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_LCD_HSYNC</name>
          <description>SW_PAD_CTL_PAD_LCD_HSYNC SW PAD Control Register</description>
          <addressOffset>0x398</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_LCD_VSYNC</name>
          <description>SW_PAD_CTL_PAD_LCD_VSYNC SW PAD Control Register</description>
          <addressOffset>0x39C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_LCD_RESET</name>
          <description>SW_PAD_CTL_PAD_LCD_RESET SW PAD Control Register</description>
          <addressOffset>0x3A0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_LCD_DATA00</name>
          <description>SW_PAD_CTL_PAD_LCD_DATA00 SW PAD Control Register</description>
          <addressOffset>0x3A4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_LCD_DATA01</name>
          <description>SW_PAD_CTL_PAD_LCD_DATA01 SW PAD Control Register</description>
          <addressOffset>0x3A8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_LCD_DATA02</name>
          <description>SW_PAD_CTL_PAD_LCD_DATA02 SW PAD Control Register</description>
          <addressOffset>0x3AC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_LCD_DATA03</name>
          <description>SW_PAD_CTL_PAD_LCD_DATA03 SW PAD Control Register</description>
          <addressOffset>0x3B0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_LCD_DATA04</name>
          <description>SW_PAD_CTL_PAD_LCD_DATA04 SW PAD Control Register</description>
          <addressOffset>0x3B4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_LCD_DATA05</name>
          <description>SW_PAD_CTL_PAD_LCD_DATA05 SW PAD Control Register</description>
          <addressOffset>0x3B8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_LCD_DATA06</name>
          <description>SW_PAD_CTL_PAD_LCD_DATA06 SW PAD Control Register</description>
          <addressOffset>0x3BC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_LCD_DATA07</name>
          <description>SW_PAD_CTL_PAD_LCD_DATA07 SW PAD Control Register</description>
          <addressOffset>0x3C0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_LCD_DATA08</name>
          <description>SW_PAD_CTL_PAD_LCD_DATA08 SW PAD Control Register</description>
          <addressOffset>0x3C4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_LCD_DATA09</name>
          <description>SW_PAD_CTL_PAD_LCD_DATA09 SW PAD Control Register</description>
          <addressOffset>0x3C8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_LCD_DATA10</name>
          <description>SW_PAD_CTL_PAD_LCD_DATA10 SW PAD Control Register</description>
          <addressOffset>0x3CC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_LCD_DATA11</name>
          <description>SW_PAD_CTL_PAD_LCD_DATA11 SW PAD Control Register</description>
          <addressOffset>0x3D0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_LCD_DATA12</name>
          <description>SW_PAD_CTL_PAD_LCD_DATA12 SW PAD Control Register</description>
          <addressOffset>0x3D4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_LCD_DATA13</name>
          <description>SW_PAD_CTL_PAD_LCD_DATA13 SW PAD Control Register</description>
          <addressOffset>0x3D8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_LCD_DATA14</name>
          <description>SW_PAD_CTL_PAD_LCD_DATA14 SW PAD Control Register</description>
          <addressOffset>0x3DC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_LCD_DATA15</name>
          <description>SW_PAD_CTL_PAD_LCD_DATA15 SW PAD Control Register</description>
          <addressOffset>0x3E0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_LCD_DATA16</name>
          <description>SW_PAD_CTL_PAD_LCD_DATA16 SW PAD Control Register</description>
          <addressOffset>0x3E4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_LCD_DATA17</name>
          <description>SW_PAD_CTL_PAD_LCD_DATA17 SW PAD Control Register</description>
          <addressOffset>0x3E8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_LCD_DATA18</name>
          <description>SW_PAD_CTL_PAD_LCD_DATA18 SW PAD Control Register</description>
          <addressOffset>0x3EC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_LCD_DATA19</name>
          <description>SW_PAD_CTL_PAD_LCD_DATA19 SW PAD Control Register</description>
          <addressOffset>0x3F0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_LCD_DATA20</name>
          <description>SW_PAD_CTL_PAD_LCD_DATA20 SW PAD Control Register</description>
          <addressOffset>0x3F4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_LCD_DATA21</name>
          <description>SW_PAD_CTL_PAD_LCD_DATA21 SW PAD Control Register</description>
          <addressOffset>0x3F8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_LCD_DATA22</name>
          <description>SW_PAD_CTL_PAD_LCD_DATA22 SW PAD Control Register</description>
          <addressOffset>0x3FC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_LCD_DATA23</name>
          <description>SW_PAD_CTL_PAD_LCD_DATA23 SW PAD Control Register</description>
          <addressOffset>0x400</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_NAND_RE_B</name>
          <description>SW_PAD_CTL_PAD_NAND_RE_B SW PAD Control Register</description>
          <addressOffset>0x404</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_NAND_WE_B</name>
          <description>SW_PAD_CTL_PAD_NAND_WE_B SW PAD Control Register</description>
          <addressOffset>0x408</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_NAND_DATA00</name>
          <description>SW_PAD_CTL_PAD_NAND_DATA00 SW PAD Control Register</description>
          <addressOffset>0x40C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_NAND_DATA01</name>
          <description>SW_PAD_CTL_PAD_NAND_DATA01 SW PAD Control Register</description>
          <addressOffset>0x410</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_NAND_DATA02</name>
          <description>SW_PAD_CTL_PAD_NAND_DATA02 SW PAD Control Register</description>
          <addressOffset>0x414</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_NAND_DATA03</name>
          <description>SW_PAD_CTL_PAD_NAND_DATA03 SW PAD Control Register</description>
          <addressOffset>0x418</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_NAND_DATA04</name>
          <description>SW_PAD_CTL_PAD_NAND_DATA04 SW PAD Control Register</description>
          <addressOffset>0x41C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_NAND_DATA05</name>
          <description>SW_PAD_CTL_PAD_NAND_DATA05 SW PAD Control Register</description>
          <addressOffset>0x420</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_NAND_DATA06</name>
          <description>SW_PAD_CTL_PAD_NAND_DATA06 SW PAD Control Register</description>
          <addressOffset>0x424</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_NAND_DATA07</name>
          <description>SW_PAD_CTL_PAD_NAND_DATA07 SW PAD Control Register</description>
          <addressOffset>0x428</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_NAND_ALE</name>
          <description>SW_PAD_CTL_PAD_NAND_ALE SW PAD Control Register</description>
          <addressOffset>0x42C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_NAND_WP_B</name>
          <description>SW_PAD_CTL_PAD_NAND_WP_B SW PAD Control Register</description>
          <addressOffset>0x430</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_NAND_READY_B</name>
          <description>SW_PAD_CTL_PAD_NAND_READY_B SW PAD Control Register</description>
          <addressOffset>0x434</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_NAND_CE0_B</name>
          <description>SW_PAD_CTL_PAD_NAND_CE0_B SW PAD Control Register</description>
          <addressOffset>0x438</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_NAND_CE1_B</name>
          <description>SW_PAD_CTL_PAD_NAND_CE1_B SW PAD Control Register</description>
          <addressOffset>0x43C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_NAND_CLE</name>
          <description>SW_PAD_CTL_PAD_NAND_CLE SW PAD Control Register</description>
          <addressOffset>0x440</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_NAND_DQS</name>
          <description>SW_PAD_CTL_PAD_NAND_DQS SW PAD Control Register</description>
          <addressOffset>0x444</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_SD1_CMD</name>
          <description>SW_PAD_CTL_PAD_SD1_CMD SW PAD Control Register</description>
          <addressOffset>0x448</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_SD1_CLK</name>
          <description>SW_PAD_CTL_PAD_SD1_CLK SW PAD Control Register</description>
          <addressOffset>0x44C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_SD1_DATA0</name>
          <description>SW_PAD_CTL_PAD_SD1_DATA0 SW PAD Control Register</description>
          <addressOffset>0x450</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_SD1_DATA1</name>
          <description>SW_PAD_CTL_PAD_SD1_DATA1 SW PAD Control Register</description>
          <addressOffset>0x454</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_SD1_DATA2</name>
          <description>SW_PAD_CTL_PAD_SD1_DATA2 SW PAD Control Register</description>
          <addressOffset>0x458</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_SD1_DATA3</name>
          <description>SW_PAD_CTL_PAD_SD1_DATA3 SW PAD Control Register</description>
          <addressOffset>0x45C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_CSI_MCLK</name>
          <description>SW_PAD_CTL_PAD_CSI_MCLK SW PAD Control Register</description>
          <addressOffset>0x460</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_CSI_PIXCLK</name>
          <description>SW_PAD_CTL_PAD_CSI_PIXCLK SW PAD Control Register</description>
          <addressOffset>0x464</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_CSI_VSYNC</name>
          <description>SW_PAD_CTL_PAD_CSI_VSYNC SW PAD Control Register</description>
          <addressOffset>0x468</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_CSI_HSYNC</name>
          <description>SW_PAD_CTL_PAD_CSI_HSYNC SW PAD Control Register</description>
          <addressOffset>0x46C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_CSI_DATA00</name>
          <description>SW_PAD_CTL_PAD_CSI_DATA00 SW PAD Control Register</description>
          <addressOffset>0x470</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_CSI_DATA01</name>
          <description>SW_PAD_CTL_PAD_CSI_DATA01 SW PAD Control Register</description>
          <addressOffset>0x474</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_CSI_DATA02</name>
          <description>SW_PAD_CTL_PAD_CSI_DATA02 SW PAD Control Register</description>
          <addressOffset>0x478</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_CSI_DATA03</name>
          <description>SW_PAD_CTL_PAD_CSI_DATA03 SW PAD Control Register</description>
          <addressOffset>0x47C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_CSI_DATA04</name>
          <description>SW_PAD_CTL_PAD_CSI_DATA04 SW PAD Control Register</description>
          <addressOffset>0x480</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_CSI_DATA05</name>
          <description>SW_PAD_CTL_PAD_CSI_DATA05 SW PAD Control Register</description>
          <addressOffset>0x484</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_CSI_DATA06</name>
          <description>SW_PAD_CTL_PAD_CSI_DATA06 SW PAD Control Register</description>
          <addressOffset>0x488</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_CSI_DATA07</name>
          <description>SW_PAD_CTL_PAD_CSI_DATA07 SW PAD Control Register</description>
          <addressOffset>0x48C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10B0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED_0_low_50MHz_</name>
                  <description>low(50MHz)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_1_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_2_medium_100MHz_</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SPEED_3_max_200MHz_</name>
                  <description>max(200MHz)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_GRP_ADDDS</name>
          <description>SW_PAD_CTL_GRP_ADDDS SW GRP Register</description>
          <addressOffset>0x490</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x30</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_GRP_DDRMODE_CTL</name>
          <description>SW_PAD_CTL_GRP_DDRMODE_CTL SW GRP Register</description>
          <addressOffset>0x494</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DDR_INPUT</name>
              <description>DDR / CMOS Input Mode Field</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DDR_INPUT_0_CMOS_input_type</name>
                  <description>CMOS input type</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DDR_INPUT_1_Differential_input_mode</name>
                  <description>Differential input mode</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_GRP_B0DS</name>
          <description>SW_PAD_CTL_GRP_B0DS SW GRP Register</description>
          <addressOffset>0x498</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x30</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_GRP_DDRPK</name>
          <description>SW_PAD_CTL_GRP_DDRPK SW GRP Register</description>
          <addressOffset>0x49C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x2000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_GRP_CTLDS</name>
          <description>SW_PAD_CTL_GRP_CTLDS SW GRP Register</description>
          <addressOffset>0x4A0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x30</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_GRP_B1DS</name>
          <description>SW_PAD_CTL_GRP_B1DS SW GRP Register</description>
          <addressOffset>0x4A4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x30</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_GRP_DDRHYS</name>
          <description>SW_PAD_CTL_GRP_DDRHYS SW GRP Register</description>
          <addressOffset>0x4A8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_GRP_DDRPKE</name>
          <description>SW_PAD_CTL_GRP_DDRPKE SW GRP Register</description>
          <addressOffset>0x4AC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x1000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_GRP_DDRMODE</name>
          <description>SW_PAD_CTL_GRP_DDRMODE SW GRP Register</description>
          <addressOffset>0x4B0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DDR_INPUT</name>
              <description>DDR / CMOS Input Mode Field</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DDR_INPUT_0_CMOS_input_type</name>
                  <description>CMOS input type</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DDR_INPUT_1_Differential_input_mode</name>
                  <description>Differential input mode</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_GRP_DDR_TYPE</name>
          <description>SW_PAD_CTL_GRP_DDR_TYPE SW GRP Register</description>
          <addressOffset>0x4B4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x80000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DDR_SEL</name>
              <description>ddr_sel Field</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DDR_SEL_2_LPDDR2_mode</name>
                  <description>LPDDR2 mode</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DDR_SEL_3_DDR3_mode</name>
                  <description>DDR3 mode</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>ANATOP_USB_OTG_ID_SELECT_INPUT</name>
          <description>USB_OTG1_ID_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x4B8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>GPIO1_IO00_ALT2</name>
                  <description>Selecting Pad: GPIO1_IO00 for Mode: ALT2</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>UART3_TX_DATA_ALT8</name>
                  <description>Selecting Pad: UART3_TX_DATA for Mode: ALT8</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SD1_DATA0_ALT8</name>
                  <description>Selecting Pad: SD1_DATA0 for Mode: ALT8</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>USB_OTG2_ID_SELECT_INPUT</name>
          <description>USB_OTG2_ID_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x4BC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>GPIO1_IO05_ALT2</name>
                  <description>Selecting Pad: GPIO1_IO05 for Mode: ALT2</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENET2_TX_CLK_ALT8</name>
                  <description>Selecting Pad: ENET2_TX_CLK for Mode: ALT8</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SD1_DATA3_ALT8</name>
                  <description>Selecting Pad: SD1_DATA3 for Mode: ALT8</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>CCM_PMIC_READY_SELECT_INPUT</name>
          <description>CCM_PMIC_READY_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x4C0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>JTAG_MOD_ALT4</name>
                  <description>Selecting Pad: JTAG_MOD for Mode: ALT4</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>GPIO1_IO08_ALT6</name>
                  <description>Selecting Pad: GPIO1_IO08 for Mode: ALT6</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>CSI_DATA02_SELECT_INPUT</name>
          <description>CSI_DATA02_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x4C4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CSI_DATA00_ALT0</name>
                  <description>Selecting Pad: CSI_DATA00 for Mode: ALT0</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>UART1_TX_DATA_ALT3</name>
                  <description>Selecting Pad: UART1_TX_DATA for Mode: ALT3</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>CSI_DATA03_SELECT_INPUT</name>
          <description>CSI_DATA03_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x4C8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CSI_DATA01_ALT0</name>
                  <description>Selecting Pad: CSI_DATA01 for Mode: ALT0</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>UART1_RX_DATA_ALT3</name>
                  <description>Selecting Pad: UART1_RX_DATA for Mode: ALT3</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>CSI_DATA05_SELECT_INPUT</name>
          <description>CSI_DATA05_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x4CC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CSI_DATA03_ALT0</name>
                  <description>Selecting Pad: CSI_DATA03 for Mode: ALT0</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>UART1_RTS_B_ALT3</name>
                  <description>Selecting Pad: UART1_RTS_B for Mode: ALT3</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>CSI_DATA00_SELECT_INPUT</name>
          <description>CSI_DATA00_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x4D0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>UART3_RX_DATA_ALT3</name>
                  <description>Selecting Pad: UART3_RX_DATA for Mode: ALT3</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LCD_DATA17_ALT3</name>
                  <description>Selecting Pad: LCD_DATA17 for Mode: ALT3</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>CSI_DATA01_SELECT_INPUT</name>
          <description>CSI_DATA01_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x4D4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>UART3_TX_DATA_ALT3</name>
                  <description>Selecting Pad: UART3_TX_DATA for Mode: ALT3</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LCD_DATA16_ALT3</name>
                  <description>Selecting Pad: LCD_DATA16 for Mode: ALT3</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>CSI_DATA04_SELECT_INPUT</name>
          <description>CSI_DATA04_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x4D8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>UART1_CTS_B_ALT3</name>
                  <description>Selecting Pad: UART1_CTS_B for Mode: ALT3</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CSI_DATA02_ALT0</name>
                  <description>Selecting Pad: CSI_DATA02 for Mode: ALT0</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>CSI_DATA06_SELECT_INPUT</name>
          <description>CSI_DATA06_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x4DC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>UART2_TX_DATA_ALT3</name>
                  <description>Selecting Pad: UART2_TX_DATA for Mode: ALT3</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CSI_DATA04_ALT0</name>
                  <description>Selecting Pad: CSI_DATA04 for Mode: ALT0</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>CSI_DATA07_SELECT_INPUT</name>
          <description>CSI_DATA07_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x4E0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>UART2_RX_DATA_ALT3</name>
                  <description>Selecting Pad: UART2_RX_DATA for Mode: ALT3</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CSI_DATA05_ALT0</name>
                  <description>Selecting Pad: CSI_DATA05 for Mode: ALT0</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>CSI_DATA08_SELECT_INPUT</name>
          <description>CSI_DATA08_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x4E4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>UART2_CTS_B_ALT3</name>
                  <description>Selecting Pad: UART2_CTS_B for Mode: ALT3</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CSI_DATA06_ALT0</name>
                  <description>Selecting Pad: CSI_DATA06 for Mode: ALT0</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>CSI_DATA09_SELECT_INPUT</name>
          <description>CSI_DATA09_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x4E8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>UART2_RTS_B_ALT3</name>
                  <description>Selecting Pad: UART2_RTS_B for Mode: ALT3</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CSI_DATA07_ALT0</name>
                  <description>Selecting Pad: CSI_DATA07 for Mode: ALT0</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>CSI_DATA10_SELECT_INPUT</name>
          <description>CSI_DATA10_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x4EC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>UART3_CTS_B_ALT3</name>
                  <description>Selecting Pad: UART3_CTS_B for Mode: ALT3</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LCD_DATA18_ALT3</name>
                  <description>Selecting Pad: LCD_DATA18 for Mode: ALT3</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>CSI_DATA11_SELECT_INPUT</name>
          <description>CSI_DATA11_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x4F0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>UART3_RTS_B_ALT3</name>
                  <description>Selecting Pad: UART3_RTS_B for Mode: ALT3</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LCD_DATA19_ALT3</name>
                  <description>Selecting Pad: LCD_DATA19 for Mode: ALT3</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>CSI_DATA12_SELECT_INPUT</name>
          <description>CSI_DATA12_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x4F4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>UART4_TX_DATA_ALT3</name>
                  <description>Selecting Pad: UART4_TX_DATA for Mode: ALT3</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LCD_DATA20_ALT3</name>
                  <description>Selecting Pad: LCD_DATA20 for Mode: ALT3</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>CSI_DATA13_SELECT_INPUT</name>
          <description>CSI_DATA13_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x4F8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>UART4_RX_DATA_ALT3</name>
                  <description>Selecting Pad: UART4_RX_DATA for Mode: ALT3</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LCD_DATA21_ALT3</name>
                  <description>Selecting Pad: LCD_DATA21 for Mode: ALT3</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>CSI_DATA14_SELECT_INPUT</name>
          <description>CSI_DATA14_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x4FC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>UART5_TX_DATA_ALT3</name>
                  <description>Selecting Pad: UART5_TX_DATA for Mode: ALT3</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LCD_DATA22_ALT3</name>
                  <description>Selecting Pad: LCD_DATA22 for Mode: ALT3</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>CSI_DATA15_SELECT_INPUT</name>
          <description>CSI_DATA15_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x500</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>UART5_RX_DATA_ALT3</name>
                  <description>Selecting Pad: UART5_RX_DATA for Mode: ALT3</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LCD_DATA23_ALT3</name>
                  <description>Selecting Pad: LCD_DATA23 for Mode: ALT3</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>CSI_DATA16_SELECT_INPUT</name>
          <description>CSI_DATA16_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x504</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ENET1_RX_DATA0_ALT3</name>
                  <description>Selecting Pad: ENET1_RX_DATA0 for Mode: ALT3</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LCD_DATA08_ALT3</name>
                  <description>Selecting Pad: LCD_DATA08 for Mode: ALT3</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>CSI_DATA17_SELECT_INPUT</name>
          <description>CSI_DATA17_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x508</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ENET1_RX_DATA1_ALT3</name>
                  <description>Selecting Pad: ENET1_RX_DATA1 for Mode: ALT3</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LCD_DATA09_ALT3</name>
                  <description>Selecting Pad: LCD_DATA09 for Mode: ALT3</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>CSI_DATA18_SELECT_INPUT</name>
          <description>CSI_DATA18_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x50C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ENET1_RX_EN_ALT3</name>
                  <description>Selecting Pad: ENET1_RX_EN for Mode: ALT3</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LCD_DATA10_ALT3</name>
                  <description>Selecting Pad: LCD_DATA10 for Mode: ALT3</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>CSI_DATA19_SELECT_INPUT</name>
          <description>CSI_DATA19_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x510</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ENET1_TX_DATA0_ALT3</name>
                  <description>Selecting Pad: ENET1_TX_DATA0 for Mode: ALT3</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LCD_DATA11_ALT3</name>
                  <description>Selecting Pad: LCD_DATA11 for Mode: ALT3</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>CSI_DATA20_SELECT_INPUT</name>
          <description>CSI_DATA20_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x514</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ENET1_TX_DATA1_ALT3</name>
                  <description>Selecting Pad: ENET1_TX_DATA1 for Mode: ALT3</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LCD_DATA12_ALT3</name>
                  <description>Selecting Pad: LCD_DATA12 for Mode: ALT3</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>CSI_DATA21_SELECT_INPUT</name>
          <description>CSI_DATA21_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x518</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ENET1_TX_EN_ALT3</name>
                  <description>Selecting Pad: ENET1_TX_EN for Mode: ALT3</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LCD_DATA13_ALT3</name>
                  <description>Selecting Pad: LCD_DATA13 for Mode: ALT3</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>CSI_DATA22_SELECT_INPUT</name>
          <description>CSI_DATA22_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x51C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ENET1_TX_CLK_ALT3</name>
                  <description>Selecting Pad: ENET1_TX_CLK for Mode: ALT3</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LCD_DATA14_ALT3</name>
                  <description>Selecting Pad: LCD_DATA14 for Mode: ALT3</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>CSI_DATA23_SELECT_INPUT</name>
          <description>CSI_DATA23_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x520</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ENET1_RX_ER_ALT3</name>
                  <description>Selecting Pad: ENET1_RX_ER for Mode: ALT3</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LCD_DATA15_ALT3</name>
                  <description>Selecting Pad: LCD_DATA15 for Mode: ALT3</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>CSI_HSYNC_SELECT_INPUT</name>
          <description>CSI_HSYNC_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x524</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CSI_HSYNC_ALT0</name>
                  <description>Selecting Pad: CSI_HSYNC for Mode: ALT0</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>GPIO1_IO09_ALT3</name>
                  <description>Selecting Pad: GPIO1_IO09 for Mode: ALT3</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>CSI_PIXCLK_SELECT_INPUT</name>
          <description>CSI_PIXCLK_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x528</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>GPIO1_IO07_ALT3</name>
                  <description>Selecting Pad: GPIO1_IO07 for Mode: ALT3</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CSI_PIXCLK_ALT0</name>
                  <description>Selecting Pad: CSI_PIXCLK for Mode: ALT0</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>CSI_VSYNC_SELECT_INPUT</name>
          <description>CSI_VSYNC_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x52C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CSI_VSYNC_ALT0</name>
                  <description>Selecting Pad: CSI_VSYNC for Mode: ALT0</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>GPIO1_IO08_ALT3</name>
                  <description>Selecting Pad: GPIO1_IO08 for Mode: ALT3</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>CSI_FIELD_SELECT_INPUT</name>
          <description>CSI_FIELD_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x530</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>GPIO1_IO05_ALT3</name>
                  <description>Selecting Pad: GPIO1_IO05 for Mode: ALT3</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND_DQS_ALT1</name>
                  <description>Selecting Pad: NAND_DQS for Mode: ALT1</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>ECSPI1_SCLK_SELECT_INPUT</name>
          <description>ECSPI1_SCLK_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x534</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LCD_DATA20_ALT2</name>
                  <description>Selecting Pad: LCD_DATA20 for Mode: ALT2</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CSI_DATA04_ALT3</name>
                  <description>Selecting Pad: CSI_DATA04 for Mode: ALT3</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>ECSPI1_MISO_SELECT_INPUT</name>
          <description>ECSPI1_MISO_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x538</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LCD_DATA23_ALT2</name>
                  <description>Selecting Pad: LCD_DATA23 for Mode: ALT2</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CSI_DATA07_ALT3</name>
                  <description>Selecting Pad: CSI_DATA07 for Mode: ALT3</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>ECSPI1_MOSI_SELECT_INPUT</name>
          <description>ECSPI1_MOSI_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x53C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LCD_DATA22_ALT2</name>
                  <description>Selecting Pad: LCD_DATA22 for Mode: ALT2</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CSI_DATA06_ALT3</name>
                  <description>Selecting Pad: CSI_DATA06 for Mode: ALT3</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>ECSPI1_SS0_B_SELECT_INPUT</name>
          <description>ECSPI1_SS0_B_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x540</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LCD_DATA21_ALT2</name>
                  <description>Selecting Pad: LCD_DATA21 for Mode: ALT2</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CSI_DATA05_ALT3</name>
                  <description>Selecting Pad: CSI_DATA05 for Mode: ALT3</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>ECSPI2_SCLK_SELECT_INPUT</name>
          <description>ECSPI2_SCLK_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x544</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CSI_DATA00_ALT3</name>
                  <description>Selecting Pad: CSI_DATA00 for Mode: ALT3</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>UART4_TX_DATA_ALT8</name>
                  <description>Selecting Pad: UART4_TX_DATA for Mode: ALT8</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>ECSPI2_MISO_SELECT_INPUT</name>
          <description>ECSPI2_MISO_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x548</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CSI_DATA03_ALT3</name>
                  <description>Selecting Pad: CSI_DATA03 for Mode: ALT3</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>UART5_RX_DATA_ALT8</name>
                  <description>Selecting Pad: UART5_RX_DATA for Mode: ALT8</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>ECSPI2_MOSI_SELECT_INPUT</name>
          <description>ECSPI2_MOSI_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x54C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>UART5_TX_DATA_ALT8</name>
                  <description>Selecting Pad: UART5_TX_DATA for Mode: ALT8</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CSI_DATA02_ALT3</name>
                  <description>Selecting Pad: CSI_DATA02 for Mode: ALT3</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>ECSPI2_SS0_B_SELECT_INPUT</name>
          <description>ECSPI2_SS0_B_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x550</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CSI_DATA01_ALT3</name>
                  <description>Selecting Pad: CSI_DATA01 for Mode: ALT3</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>UART4_RX_DATA_ALT8</name>
                  <description>Selecting Pad: UART4_RX_DATA for Mode: ALT8</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>ECSPI3_SCLK_SELECT_INPUT</name>
          <description>ECSPI3_SCLK_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x554</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>UART2_RX_DATA_ALT8</name>
                  <description>Selecting Pad: UART2_RX_DATA for Mode: ALT8</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND_CE0_B_ALT3</name>
                  <description>Selecting Pad: NAND_CE0_B for Mode: ALT3</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>ECSPI3_MISO_SELECT_INPUT</name>
          <description>ECSPI3_MISO_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x558</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>UART2_RTS_B_ALT8</name>
                  <description>Selecting Pad: UART2_RTS_B for Mode: ALT8</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND_CLE_ALT3</name>
                  <description>Selecting Pad: NAND_CLE for Mode: ALT3</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>ECSPI3_MOSI_SELECT_INPUT</name>
          <description>ECSPI3_MOSI_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x55C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>UART2_CTS_B_ALT8</name>
                  <description>Selecting Pad: UART2_CTS_B for Mode: ALT8</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND_CE1_B_ALT3</name>
                  <description>Selecting Pad: NAND_CE1_B for Mode: ALT3</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>ECSPI3_SS0_B_SELECT_INPUT</name>
          <description>ECSPI3_SS0_B_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x560</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>UART2_TX_DATA_ALT8</name>
                  <description>Selecting Pad: UART2_TX_DATA for Mode: ALT8</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND_READY_B_ALT3</name>
                  <description>Selecting Pad: NAND_READY_B for Mode: ALT3</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>ECSPI4_SCLK_SELECT_INPUT</name>
          <description>ECSPI4_SCLK_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x564</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ENET2_TX_DATA1_ALT3</name>
                  <description>Selecting Pad: ENET2_TX_DATA1 for Mode: ALT3</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND_DATA04_ALT3</name>
                  <description>Selecting Pad: NAND_DATA04 for Mode: ALT3</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>ECSPI4_MISO_SELECT_INPUT</name>
          <description>ECSPI4_MISO_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x568</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ENET2_TX_CLK_ALT3</name>
                  <description>Selecting Pad: ENET2_TX_CLK for Mode: ALT3</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND_DATA06_ALT3</name>
                  <description>Selecting Pad: NAND_DATA06 for Mode: ALT3</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>ECSPI4_MOSI_SELECT_INPUT</name>
          <description>ECSPI4_MOSI_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x56C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ENET2_TX_EN_ALT3</name>
                  <description>Selecting Pad: ENET2_TX_EN for Mode: ALT3</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND_DATA05_ALT3</name>
                  <description>Selecting Pad: NAND_DATA05 for Mode: ALT3</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>ECSPI4_SS0_B_SELECT_INPUT</name>
          <description>ECSPI4_SS0_B_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x570</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ENET2_RX_ER_ALT3</name>
                  <description>Selecting Pad: ENET2_RX_ER for Mode: ALT3</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND_DATA07_ALT3</name>
                  <description>Selecting Pad: NAND_DATA07 for Mode: ALT3</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>ENET1_REF_CLK1_SELECT_INPUT</name>
          <description>ENET1_REF_CLK1_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x574</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>GPIO1_IO00_ALT3</name>
                  <description>Selecting Pad: GPIO1_IO00 for Mode: ALT3</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>GPIO1_IO04_ALT0</name>
                  <description>Selecting Pad: GPIO1_IO04 for Mode: ALT0</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENET1_TX_CLK_ALT4</name>
                  <description>Selecting Pad: ENET1_TX_CLK for Mode: ALT4</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>ENET1_MAC0_MDIO_SELECT_INPUT</name>
          <description>ENET1_MAC0_MDIO_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x578</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>GPIO1_IO06_ALT0</name>
                  <description>Selecting Pad: GPIO1_IO06 for Mode: ALT0</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENET2_RX_DATA0_ALT4</name>
                  <description>Selecting Pad: ENET2_RX_DATA0 for Mode: ALT4</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>ENET2_REF_CLK2_SELECT_INPUT</name>
          <description>ENET2_REF_CLK2_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x57C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>GPIO1_IO01_ALT3</name>
                  <description>Selecting Pad: GPIO1_IO01 for Mode: ALT3</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>GPIO1_IO05_ALT0</name>
                  <description>Selecting Pad: GPIO1_IO05 for Mode: ALT0</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENET2_TX_CLK_ALT4</name>
                  <description>Selecting Pad: ENET2_TX_CLK for Mode: ALT4</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>ENET2_MAC0_MDIO_SELECT_INPUT</name>
          <description>ENET2_MAC0_MDIO_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x580</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>GPIO1_IO06_ALT1</name>
                  <description>Selecting Pad: GPIO1_IO06 for Mode: ALT1</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENET1_TX_DATA1_ALT4</name>
                  <description>Selecting Pad: ENET1_TX_DATA1 for Mode: ALT4</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>FLEXCAN1_RX_SELECT_INPUT</name>
          <description>FLEXCAN1_RX_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x584</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>UART3_RTS_B_ALT2</name>
                  <description>Selecting Pad: UART3_RTS_B for Mode: ALT2</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENET1_RX_DATA1_ALT4</name>
                  <description>Selecting Pad: ENET1_RX_DATA1 for Mode: ALT4</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LCD_DATA09_ALT8</name>
                  <description>Selecting Pad: LCD_DATA09 for Mode: ALT8</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SD1_DATA1_ALT3</name>
                  <description>Selecting Pad: SD1_DATA1 for Mode: ALT3</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>FLEXCAN2_RX_SELECT_INPUT</name>
          <description>FLEXCAN2_RX_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x588</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>UART2_RTS_B_ALT2</name>
                  <description>Selecting Pad: UART2_RTS_B for Mode: ALT2</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENET1_TX_DATA0_ALT4</name>
                  <description>Selecting Pad: ENET1_TX_DATA0 for Mode: ALT4</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LCD_DATA11_ALT8</name>
                  <description>Selecting Pad: LCD_DATA11 for Mode: ALT8</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SD1_DATA3_ALT3</name>
                  <description>Selecting Pad: SD1_DATA3 for Mode: ALT3</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>GPT1_CAPTURE1_SELECT_INPUT</name>
          <description>GPT1_CAPTURE1_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x58C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>GPIO1_IO00_ALT1</name>
                  <description>Selecting Pad: GPIO1_IO00 for Mode: ALT1</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>UART2_TX_DATA_ALT4</name>
                  <description>Selecting Pad: UART2_TX_DATA for Mode: ALT4</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>GPT1_CAPTURE2_SELECT_INPUT</name>
          <description>GPT1_CAPTURE2_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x590</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>UART2_RX_DATA_ALT4</name>
                  <description>Selecting Pad: UART2_RX_DATA for Mode: ALT4</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENET1_RX_ER_ALT8</name>
                  <description>Selecting Pad: ENET1_RX_ER for Mode: ALT8</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>GPT1_CLK_SELECT_INPUT</name>
          <description>GPT1_CLK_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x594</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>UART1_RX_DATA_ALT4</name>
                  <description>Selecting Pad: UART1_RX_DATA for Mode: ALT4</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENET1_TX_CLK_ALT8</name>
                  <description>Selecting Pad: ENET1_TX_CLK for Mode: ALT8</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>GPT2_CAPTURE1_SELECT_INPUT</name>
          <description>GPT2_CAPTURE1_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x598</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>JTAG_TMS_ALT1</name>
                  <description>Selecting Pad: JTAG_TMS for Mode: ALT1</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SD1_DATA2_ALT1</name>
                  <description>Selecting Pad: SD1_DATA2 for Mode: ALT1</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>GPT2_CAPTURE2_SELECT_INPUT</name>
          <description>GPT2_CAPTURE2_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x59C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>JTAG_TDO_ALT1</name>
                  <description>Selecting Pad: JTAG_TDO for Mode: ALT1</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SD1_DATA3_ALT1</name>
                  <description>Selecting Pad: SD1_DATA3 for Mode: ALT1</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>GPT2_CLK_SELECT_INPUT</name>
          <description>GPT2_CLK_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x5A0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>JTAG_MOD_ALT1</name>
                  <description>Selecting Pad: JTAG_MOD for Mode: ALT1</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SD1_DATA1_ALT1</name>
                  <description>Selecting Pad: SD1_DATA1 for Mode: ALT1</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>I2C1_SCL_SELECT_INPUT</name>
          <description>I2C1_SCL_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x5A4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>GPIO1_IO02_ALT0</name>
                  <description>Selecting Pad: GPIO1_IO02 for Mode: ALT0</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>UART4_TX_DATA_ALT2</name>
                  <description>Selecting Pad: UART4_TX_DATA for Mode: ALT2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CSI_PIXCLK_ALT3</name>
                  <description>Selecting Pad: CSI_PIXCLK for Mode: ALT3</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>I2C1_SDA_SELECT_INPUT</name>
          <description>I2C1_SDA_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x5A8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CSI_MCLK_ALT3</name>
                  <description>Selecting Pad: CSI_MCLK for Mode: ALT3</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>GPIO1_IO03_ALT0</name>
                  <description>Selecting Pad: GPIO1_IO03 for Mode: ALT0</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>UART4_RX_DATA_ALT2</name>
                  <description>Selecting Pad: UART4_RX_DATA for Mode: ALT2</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>I2C2_SCL_SELECT_INPUT</name>
          <description>I2C2_SCL_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x5AC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CSI_HSYNC_ALT3</name>
                  <description>Selecting Pad: CSI_HSYNC for Mode: ALT3</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>GPIO1_IO00_ALT0</name>
                  <description>Selecting Pad: GPIO1_IO00 for Mode: ALT0</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>UART5_TX_DATA_ALT2</name>
                  <description>Selecting Pad: UART5_TX_DATA for Mode: ALT2</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>I2C2_SDA_SELECT_INPUT</name>
          <description>I2C2_SDA_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x5B0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CSI_VSYNC_ALT3</name>
                  <description>Selecting Pad: CSI_VSYNC for Mode: ALT3</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>GPIO1_IO01_ALT0</name>
                  <description>Selecting Pad: GPIO1_IO01 for Mode: ALT0</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>UART5_RX_DATA_ALT2</name>
                  <description>Selecting Pad: UART5_RX_DATA for Mode: ALT2</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>I2C3_SCL_SELECT_INPUT</name>
          <description>I2C3_SCL_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x5B4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>UART1_TX_DATA_ALT2</name>
                  <description>Selecting Pad: UART1_TX_DATA for Mode: ALT2</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENET2_RX_DATA0_ALT3</name>
                  <description>Selecting Pad: ENET2_RX_DATA0 for Mode: ALT3</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LCD_DATA01_ALT4</name>
                  <description>Selecting Pad: LCD_DATA01 for Mode: ALT4</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>I2C3_SDA_SELECT_INPUT</name>
          <description>I2C3_SDA_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x5B8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>UART1_RX_DATA_ALT2</name>
                  <description>Selecting Pad: UART1_RX_DATA for Mode: ALT2</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENET2_RX_DATA1_ALT3</name>
                  <description>Selecting Pad: ENET2_RX_DATA1 for Mode: ALT3</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LCD_DATA00_ALT4</name>
                  <description>Selecting Pad: LCD_DATA00 for Mode: ALT4</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>I2C4_SCL_SELECT_INPUT</name>
          <description>I2C4_SCL_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x5BC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>UART2_TX_DATA_ALT2</name>
                  <description>Selecting Pad: UART2_TX_DATA for Mode: ALT2</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENET2_RX_EN_ALT3</name>
                  <description>Selecting Pad: ENET2_RX_EN for Mode: ALT3</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LCD_DATA03_ALT4</name>
                  <description>Selecting Pad: LCD_DATA03 for Mode: ALT4</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>I2C4_SDA_SELECT_INPUT</name>
          <description>I2C4_SDA_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x5C0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>UART2_RX_DATA_ALT2</name>
                  <description>Selecting Pad: UART2_RX_DATA for Mode: ALT2</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENET2_TX_DATA0_ALT3</name>
                  <description>Selecting Pad: ENET2_TX_DATA0 for Mode: ALT3</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LCD_DATA02_ALT4</name>
                  <description>Selecting Pad: LCD_DATA02 for Mode: ALT4</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>KPP_COL0_SELECT_INPUT</name>
          <description>KPP_COL0_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x5C4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ENET1_RX_DATA1_ALT6</name>
                  <description>Selecting Pad: ENET1_RX_DATA1 for Mode: ALT6</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND_WE_B_ALT3</name>
                  <description>Selecting Pad: NAND_WE_B for Mode: ALT3</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>KPP_COL1_SELECT_INPUT</name>
          <description>KPP_COL1_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x5C8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ENET1_TX_DATA0_ALT6</name>
                  <description>Selecting Pad: ENET1_TX_DATA0 for Mode: ALT6</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND_DATA01_ALT3</name>
                  <description>Selecting Pad: NAND_DATA01 for Mode: ALT3</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>KPP_COL2_SELECT_INPUT</name>
          <description>KPP_COL2_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x5CC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ENET1_TX_EN_ALT6</name>
                  <description>Selecting Pad: ENET1_TX_EN for Mode: ALT6</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND_DATA03_ALT3</name>
                  <description>Selecting Pad: NAND_DATA03 for Mode: ALT3</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>KPP_ROW0_SELECT_INPUT</name>
          <description>KPP_ROW0_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x5D0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ENET1_RX_DATA0_ALT6</name>
                  <description>Selecting Pad: ENET1_RX_DATA0 for Mode: ALT6</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND_RE_B_ALT3</name>
                  <description>Selecting Pad: NAND_RE_B for Mode: ALT3</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>KPP_ROW1_SELECT_INPUT</name>
          <description>KPP_ROW1_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x5D4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ENET1_RX_EN_ALT6</name>
                  <description>Selecting Pad: ENET1_RX_EN for Mode: ALT6</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND_DATA00_ALT3</name>
                  <description>Selecting Pad: NAND_DATA00 for Mode: ALT3</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>KPP_ROW2_SELECT_INPUT</name>
          <description>KPP_ROW2_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x5D8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ENET1_TX_DATA1_ALT6</name>
                  <description>Selecting Pad: ENET1_TX_DATA1 for Mode: ALT6</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND_DATA02_ALT3</name>
                  <description>Selecting Pad: NAND_DATA02 for Mode: ALT3</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>LCD_BUSY_SELECT_INPUT</name>
          <description>LCD_BUSY_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x5DC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LCD_HSYNC_ALT0</name>
                  <description>Selecting Pad: LCD_HSYNC for Mode: ALT0</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LCD_VSYNC_ALT1</name>
                  <description>Selecting Pad: LCD_VSYNC for Mode: ALT1</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SAI1_MCLK_SELECT_INPUT</name>
          <description>SAI1_MCLK_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x5E0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CSI_DATA01_ALT6</name>
                  <description>Selecting Pad: CSI_DATA01 for Mode: ALT6</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LCD_DATA00_ALT8</name>
                  <description>Selecting Pad: LCD_DATA00 for Mode: ALT8</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SAI1_RX_DATA_SELECT_INPUT</name>
          <description>SAI1_RX_DATA_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x5E4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LCD_DATA03_ALT8</name>
                  <description>Selecting Pad: LCD_DATA03 for Mode: ALT8</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CSI_DATA06_ALT6</name>
                  <description>Selecting Pad: CSI_DATA06 for Mode: ALT6</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SAI1_TX_BCLK_SELECT_INPUT</name>
          <description>SAI1_TX_BCLK_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x5E8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LCD_DATA02_ALT8</name>
                  <description>Selecting Pad: LCD_DATA02 for Mode: ALT8</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CSI_DATA05_ALT6</name>
                  <description>Selecting Pad: CSI_DATA05 for Mode: ALT6</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SAI1_TX_SYNC_SELECT_INPUT</name>
          <description>SAI1_TX_SYNC_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x5EC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LCD_DATA01_ALT8</name>
                  <description>Selecting Pad: LCD_DATA01 for Mode: ALT8</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CSI_DATA04_ALT6</name>
                  <description>Selecting Pad: CSI_DATA04 for Mode: ALT6</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SAI2_MCLK_SELECT_INPUT</name>
          <description>SAI2_MCLK_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x5F0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>JTAG_TMS_ALT2</name>
                  <description>Selecting Pad: JTAG_TMS for Mode: ALT2</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SD1_CLK_ALT2</name>
                  <description>Selecting Pad: SD1_CLK for Mode: ALT2</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SAI2_RX_DATA_SELECT_INPUT</name>
          <description>SAI2_RX_DATA_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x5F4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>JTAG_TCK_ALT2</name>
                  <description>Selecting Pad: JTAG_TCK for Mode: ALT2</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SD1_DATA2_ALT2</name>
                  <description>Selecting Pad: SD1_DATA2 for Mode: ALT2</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SAI2_TX_BCLK_SELECT_INPUT</name>
          <description>SAI2_TX_BCLK_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x5F8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>JTAG_TDI_ALT2</name>
                  <description>Selecting Pad: JTAG_TDI for Mode: ALT2</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SD1_DATA1_ALT2</name>
                  <description>Selecting Pad: SD1_DATA1 for Mode: ALT2</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SAI2_TX_SYNC_SELECT_INPUT</name>
          <description>SAI2_TX_SYNC_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x5FC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>JTAG_TDO_ALT2</name>
                  <description>Selecting Pad: JTAG_TDO for Mode: ALT2</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SD1_DATA0_ALT2</name>
                  <description>Selecting Pad: SD1_DATA0 for Mode: ALT2</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SAI3_MCLK_SELECT_INPUT</name>
          <description>SAI3_MCLK_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x600</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LCD_CLK_ALT3</name>
                  <description>Selecting Pad: LCD_CLK for Mode: ALT3</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LCD_DATA09_ALT1</name>
                  <description>Selecting Pad: LCD_DATA09 for Mode: ALT1</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SAI3_RX_DATA_SELECT_INPUT</name>
          <description>SAI3_RX_DATA_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x604</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LCD_VSYNC_ALT3</name>
                  <description>Selecting Pad: LCD_VSYNC for Mode: ALT3</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LCD_DATA14_ALT1</name>
                  <description>Selecting Pad: LCD_DATA14 for Mode: ALT1</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SAI3_TX_BCLK_SELECT_INPUT</name>
          <description>SAI3_TX_BCLK_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x608</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LCD_HSYNC_ALT3</name>
                  <description>Selecting Pad: LCD_HSYNC for Mode: ALT3</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LCD_DATA13_ALT1</name>
                  <description>Selecting Pad: LCD_DATA13 for Mode: ALT1</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SAI3_TX_SYNC_SELECT_INPUT</name>
          <description>SAI3_TX_SYNC_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x60C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LCD_ENABLE_ALT3</name>
                  <description>Selecting Pad: LCD_ENABLE for Mode: ALT3</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LCD_DATA12_ALT1</name>
                  <description>Selecting Pad: LCD_DATA12 for Mode: ALT1</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SDMA_EVENTS0_SELECT_INPUT</name>
          <description>SDMA_EVENTS0_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x610</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>JTAG_MOD_ALT6</name>
                  <description>Selecting Pad: JTAG_MOD for Mode: ALT6</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>GPIO1_IO02_ALT6</name>
                  <description>Selecting Pad: GPIO1_IO02 for Mode: ALT6</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SD1_CMD_ALT6</name>
                  <description>Selecting Pad: SD1_CMD for Mode: ALT6</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SDMA_EVENTS1_SELECT_INPUT</name>
          <description>SDMA_EVENTS1_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x614</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>JTAG_TMS_ALT6</name>
                  <description>Selecting Pad: JTAG_TMS for Mode: ALT6</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND_DQS_ALT6</name>
                  <description>Selecting Pad: NAND_DQS for Mode: ALT6</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SPDIF_IN_SELECT_INPUT</name>
          <description>SPDIF_IN_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x618</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>GPIO1_IO09_ALT2</name>
                  <description>Selecting Pad: GPIO1_IO09 for Mode: ALT2</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>UART1_RX_DATA_ALT8</name>
                  <description>Selecting Pad: UART1_RX_DATA for Mode: ALT8</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LCD_DATA08_ALT1</name>
                  <description>Selecting Pad: LCD_DATA08 for Mode: ALT1</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SD1_CLK_ALT3</name>
                  <description>Selecting Pad: SD1_CLK for Mode: ALT3</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SPDIF_EXT_CLK_SELECT_INPUT</name>
          <description>SPDIF_EXT_CLK_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x61C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LCD_DATA07_ALT4</name>
                  <description>Selecting Pad: LCD_DATA07 for Mode: ALT4</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND_DQS_ALT8</name>
                  <description>Selecting Pad: NAND_DQS for Mode: ALT8</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>UART1_RTS_B_SELECT_INPUT</name>
          <description>UART1_RTS_B_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x620</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>GPIO1_IO06_ALT8</name>
                  <description>Selecting Pad: GPIO1_IO06 for Mode: ALT8</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>GPIO1_IO07_ALT8</name>
                  <description>Selecting Pad: GPIO1_IO07 for Mode: ALT8</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>UART1_CTS_B_ALT0</name>
                  <description>Selecting Pad: UART1_CTS_B for Mode: ALT0</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>UART1_RTS_B_ALT0</name>
                  <description>Selecting Pad: UART1_RTS_B for Mode: ALT0</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>UART1_RX_DATA_SELECT_INPUT</name>
          <description>UART1_RX_DATA_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x624</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>GPIO1_IO02_ALT8</name>
                  <description>Selecting Pad: GPIO1_IO02 for Mode: ALT8</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>GPIO1_IO03_ALT8</name>
                  <description>Selecting Pad: GPIO1_IO03 for Mode: ALT8</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>UART1_TX_DATA_ALT0</name>
                  <description>Selecting Pad: UART1_TX_DATA for Mode: ALT0</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>UART1_RX_DATA_ALT0</name>
                  <description>Selecting Pad: UART1_RX_DATA for Mode: ALT0</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>UART2_RTS_B_SELECT_INPUT</name>
          <description>UART2_RTS_B_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x628</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>UART2_CTS_B_ALT0</name>
                  <description>Selecting Pad: UART2_CTS_B for Mode: ALT0</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>UART2_RTS_B_ALT0</name>
                  <description>Selecting Pad: UART2_RTS_B for Mode: ALT0</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>UART3_TX_DATA_ALT4</name>
                  <description>Selecting Pad: UART3_TX_DATA for Mode: ALT4</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>UART3_RX_DATA_ALT4</name>
                  <description>Selecting Pad: UART3_RX_DATA for Mode: ALT4</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND_DATA06_ALT8</name>
                  <description>Selecting Pad: NAND_DATA06 for Mode: ALT8</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND_DATA07_ALT8</name>
                  <description>Selecting Pad: NAND_DATA07 for Mode: ALT8</description>
                  <value>0x5</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>UART2_RX_DATA_SELECT_INPUT</name>
          <description>UART2_RX_DATA_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x62C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>UART2_TX_DATA_ALT0</name>
                  <description>Selecting Pad: UART2_TX_DATA for Mode: ALT0</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>UART2_RX_DATA_ALT0</name>
                  <description>Selecting Pad: UART2_RX_DATA for Mode: ALT0</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND_DATA04_ALT8</name>
                  <description>Selecting Pad: NAND_DATA04 for Mode: ALT8</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND_DATA05_ALT8</name>
                  <description>Selecting Pad: NAND_DATA05 for Mode: ALT8</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>UART3_RTS_B_SELECT_INPUT</name>
          <description>UART3_RTS_B_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x630</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>UART3_CTS_B_ALT0</name>
                  <description>Selecting Pad: UART3_CTS_B for Mode: ALT0</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>UART3_RTS_B_ALT0</name>
                  <description>Selecting Pad: UART3_RTS_B for Mode: ALT0</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND_CE1_B_ALT8</name>
                  <description>Selecting Pad: NAND_CE1_B for Mode: ALT8</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND_CLE_ALT8</name>
                  <description>Selecting Pad: NAND_CLE for Mode: ALT8</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>UART3_RX_DATA_SELECT_INPUT</name>
          <description>UART3_RX_DATA_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x634</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>UART3_TX_DATA_ALT0</name>
                  <description>Selecting Pad: UART3_TX_DATA for Mode: ALT0</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>UART3_RX_DATA_ALT0</name>
                  <description>Selecting Pad: UART3_RX_DATA for Mode: ALT0</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND_READY_B_ALT8</name>
                  <description>Selecting Pad: NAND_READY_B for Mode: ALT8</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND_CE0_B_ALT8</name>
                  <description>Selecting Pad: NAND_CE0_B for Mode: ALT8</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>UART4_RTS_B_SELECT_INPUT</name>
          <description>UART4_RTS_B_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x638</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ENET1_RX_DATA0_ALT1</name>
                  <description>Selecting Pad: ENET1_RX_DATA0 for Mode: ALT1</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENET1_RX_DATA1_ALT1</name>
                  <description>Selecting Pad: ENET1_RX_DATA1 for Mode: ALT1</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LCD_HSYNC_ALT2</name>
                  <description>Selecting Pad: LCD_HSYNC for Mode: ALT2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LCD_VSYNC_ALT2</name>
                  <description>Selecting Pad: LCD_VSYNC for Mode: ALT2</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>UART4_RX_DATA_SELECT_INPUT</name>
          <description>UART4_RX_DATA_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x63C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>UART4_TX_DATA_ALT0</name>
                  <description>Selecting Pad: UART4_TX_DATA for Mode: ALT0</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>UART4_RX_DATA_ALT0</name>
                  <description>Selecting Pad: UART4_RX_DATA for Mode: ALT0</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LCD_CLK_ALT2</name>
                  <description>Selecting Pad: LCD_CLK for Mode: ALT2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LCD_ENABLE_ALT2</name>
                  <description>Selecting Pad: LCD_ENABLE for Mode: ALT2</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>UART5_RTS_B_SELECT_INPUT</name>
          <description>UART5_RTS_B_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x640</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CSI_DATA03_ALT8</name>
                  <description>Selecting Pad: CSI_DATA03 for Mode: ALT8</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>GPIO1_IO08_ALT8</name>
                  <description>Selecting Pad: GPIO1_IO08 for Mode: ALT8</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>GPIO1_IO09_ALT8</name>
                  <description>Selecting Pad: GPIO1_IO09 for Mode: ALT8</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>UART1_CTS_B_ALT9</name>
                  <description>Selecting Pad: UART1_CTS_B for Mode: ALT9</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>UART1_RTS_B_ALT9</name>
                  <description>Selecting Pad: UART1_RTS_B for Mode: ALT9</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENET1_RX_EN_ALT1</name>
                  <description>Selecting Pad: ENET1_RX_EN for Mode: ALT1</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENET1_TX_DATA0_ALT1</name>
                  <description>Selecting Pad: ENET1_TX_DATA0 for Mode: ALT1</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CSI_DATA02_ALT8</name>
                  <description>Selecting Pad: CSI_DATA02 for Mode: ALT8</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>UART5_RX_DATA_SELECT_INPUT</name>
          <description>UART5_RX_DATA_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x644</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CSI_DATA00_ALT8</name>
                  <description>Selecting Pad: CSI_DATA00 for Mode: ALT8</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CSI_DATA01_ALT8</name>
                  <description>Selecting Pad: CSI_DATA01 for Mode: ALT8</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>GPIO1_IO04_ALT8</name>
                  <description>Selecting Pad: GPIO1_IO04 for Mode: ALT8</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>GPIO1_IO05_ALT8</name>
                  <description>Selecting Pad: GPIO1_IO05 for Mode: ALT8</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>UART1_TX_DATA_ALT9</name>
                  <description>Selecting Pad: UART1_TX_DATA for Mode: ALT9</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>UART1_RX_DATA_ALT9</name>
                  <description>Selecting Pad: UART1_RX_DATA for Mode: ALT9</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>UART5_TX_DATA_ALT0</name>
                  <description>Selecting Pad: UART5_TX_DATA for Mode: ALT0</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>UART5_RX_DATA_ALT0</name>
                  <description>Selecting Pad: UART5_RX_DATA for Mode: ALT0</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>UART6_RTS_B_SELECT_INPUT</name>
          <description>UART6_RTS_B_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x648</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CSI_VSYNC_ALT8</name>
                  <description>Selecting Pad: CSI_VSYNC for Mode: ALT8</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CSI_HSYNC_ALT8</name>
                  <description>Selecting Pad: CSI_HSYNC for Mode: ALT8</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENET1_TX_DATA1_ALT1</name>
                  <description>Selecting Pad: ENET1_TX_DATA1 for Mode: ALT1</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENET1_TX_EN_ALT1</name>
                  <description>Selecting Pad: ENET1_TX_EN for Mode: ALT1</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>UART6_RX_DATA_SELECT_INPUT</name>
          <description>UART6_RX_DATA_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x64C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CSI_MCLK_ALT8</name>
                  <description>Selecting Pad: CSI_MCLK for Mode: ALT8</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENET2_RX_DATA0_ALT1</name>
                  <description>Selecting Pad: ENET2_RX_DATA0 for Mode: ALT1</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENET2_RX_DATA1_ALT1</name>
                  <description>Selecting Pad: ENET2_RX_DATA1 for Mode: ALT1</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CSI_PIXCLK_ALT8</name>
                  <description>Selecting Pad: CSI_PIXCLK for Mode: ALT8</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>UART7_RTS_B_SELECT_INPUT</name>
          <description>UART7_RTS_B_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x650</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ENET1_TX_CLK_ALT1</name>
                  <description>Selecting Pad: ENET1_TX_CLK for Mode: ALT1</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENET1_RX_ER_ALT1</name>
                  <description>Selecting Pad: ENET1_RX_ER for Mode: ALT1</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LCD_DATA06_ALT1</name>
                  <description>Selecting Pad: LCD_DATA06 for Mode: ALT1</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LCD_DATA07_ALT1</name>
                  <description>Selecting Pad: LCD_DATA07 for Mode: ALT1</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>UART7_RX_DATA_SELECT_INPUT</name>
          <description>UART7_RX_DATA_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x654</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ENET2_RX_EN_ALT1</name>
                  <description>Selecting Pad: ENET2_RX_EN for Mode: ALT1</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENET2_TX_DATA0_ALT1</name>
                  <description>Selecting Pad: ENET2_TX_DATA0 for Mode: ALT1</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LCD_DATA16_ALT1</name>
                  <description>Selecting Pad: LCD_DATA16 for Mode: ALT1</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LCD_DATA17_ALT1</name>
                  <description>Selecting Pad: LCD_DATA17 for Mode: ALT1</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>UART8_RTS_B_SELECT_INPUT</name>
          <description>UART8_RTS_B_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x658</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ENET2_TX_CLK_ALT1</name>
                  <description>Selecting Pad: ENET2_TX_CLK for Mode: ALT1</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENET2_RX_ER_ALT1</name>
                  <description>Selecting Pad: ENET2_RX_ER for Mode: ALT1</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LCD_DATA04_ALT1</name>
                  <description>Selecting Pad: LCD_DATA04 for Mode: ALT1</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LCD_DATA05_ALT1</name>
                  <description>Selecting Pad: LCD_DATA05 for Mode: ALT1</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>UART8_RX_DATA_SELECT_INPUT</name>
          <description>UART8_RX_DATA_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x65C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ENET2_TX_DATA1_ALT1</name>
                  <description>Selecting Pad: ENET2_TX_DATA1 for Mode: ALT1</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENET2_TX_EN_ALT1</name>
                  <description>Selecting Pad: ENET2_TX_EN for Mode: ALT1</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LCD_DATA20_ALT1</name>
                  <description>Selecting Pad: LCD_DATA20 for Mode: ALT1</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LCD_DATA21_ALT1</name>
                  <description>Selecting Pad: LCD_DATA21 for Mode: ALT1</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>USB_OTG2_OC_SELECT_INPUT</name>
          <description>USB_OTG2_OC_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x660</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>GPIO1_IO03_ALT2</name>
                  <description>Selecting Pad: GPIO1_IO03 for Mode: ALT2</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENET2_TX_EN_ALT8</name>
                  <description>Selecting Pad: ENET2_TX_EN for Mode: ALT8</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SD1_DATA2_ALT8</name>
                  <description>Selecting Pad: SD1_DATA2 for Mode: ALT8</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>USB_OTG_OC_SELECT_INPUT</name>
          <description>USB_OTG_OC_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x664</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>GPIO1_IO01_ALT2</name>
                  <description>Selecting Pad: GPIO1_IO01 for Mode: ALT2</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENET2_RX_DATA1_ALT8</name>
                  <description>Selecting Pad: ENET2_RX_DATA1 for Mode: ALT8</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SD1_CLK_ALT8</name>
                  <description>Selecting Pad: SD1_CLK for Mode: ALT8</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>USDHC1_CD_B_SELECT_INPUT</name>
          <description>USDHC1_CD_B_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x668</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>GPIO1_IO03_ALT4</name>
                  <description>Selecting Pad: GPIO1_IO03 for Mode: ALT4</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>UART1_RTS_B_ALT2</name>
                  <description>Selecting Pad: UART1_RTS_B for Mode: ALT2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CSI_DATA05_ALT8</name>
                  <description>Selecting Pad: CSI_DATA05 for Mode: ALT8</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>USDHC1_WP_SELECT_INPUT</name>
          <description>USDHC1_WP_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x66C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>GPIO1_IO02_ALT4</name>
                  <description>Selecting Pad: GPIO1_IO02 for Mode: ALT4</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>UART1_CTS_B_ALT2</name>
                  <description>Selecting Pad: UART1_CTS_B for Mode: ALT2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CSI_DATA04_ALT8</name>
                  <description>Selecting Pad: CSI_DATA04 for Mode: ALT8</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>USDHC2_CLK_SELECT_INPUT</name>
          <description>USDHC2_CLK_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x670</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CSI_VSYNC_ALT1</name>
                  <description>Selecting Pad: CSI_VSYNC for Mode: ALT1</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LCD_DATA19_ALT8</name>
                  <description>Selecting Pad: LCD_DATA19 for Mode: ALT8</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND_RE_B_ALT1</name>
                  <description>Selecting Pad: NAND_RE_B for Mode: ALT1</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>USDHC2_CD_B_SELECT_INPUT</name>
          <description>USDHC2_CD_B_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x674</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CSI_MCLK_ALT1</name>
                  <description>Selecting Pad: CSI_MCLK for Mode: ALT1</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>GPIO1_IO07_ALT4</name>
                  <description>Selecting Pad: GPIO1_IO07 for Mode: ALT4</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>UART1_RTS_B_ALT8</name>
                  <description>Selecting Pad: UART1_RTS_B for Mode: ALT8</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>USDHC2_CMD_SELECT_INPUT</name>
          <description>USDHC2_CMD_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x678</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CSI_HSYNC_ALT1</name>
                  <description>Selecting Pad: CSI_HSYNC for Mode: ALT1</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LCD_DATA18_ALT8</name>
                  <description>Selecting Pad: LCD_DATA18 for Mode: ALT8</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND_WE_B_ALT1</name>
                  <description>Selecting Pad: NAND_WE_B for Mode: ALT1</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>USDHC2_DATA0_SELECT_INPUT</name>
          <description>USDHC2_DATA0_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x67C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CSI_DATA00_ALT1</name>
                  <description>Selecting Pad: CSI_DATA00 for Mode: ALT1</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LCD_DATA20_ALT8</name>
                  <description>Selecting Pad: LCD_DATA20 for Mode: ALT8</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND_DATA00_ALT1</name>
                  <description>Selecting Pad: NAND_DATA00 for Mode: ALT1</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>USDHC2_DATA1_SELECT_INPUT</name>
          <description>USDHC2_DATA1_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x680</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CSI_DATA01_ALT1</name>
                  <description>Selecting Pad: CSI_DATA01 for Mode: ALT1</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LCD_DATA21_ALT8</name>
                  <description>Selecting Pad: LCD_DATA21 for Mode: ALT8</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND_DATA01_ALT1</name>
                  <description>Selecting Pad: NAND_DATA01 for Mode: ALT1</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>USDHC2_DATA2_SELECT_INPUT</name>
          <description>USDHC2_DATA2_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x684</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LCD_DATA22_ALT8</name>
                  <description>Selecting Pad: LCD_DATA22 for Mode: ALT8</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND_DATA02_ALT1</name>
                  <description>Selecting Pad: NAND_DATA02 for Mode: ALT1</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CSI_DATA02_ALT1</name>
                  <description>Selecting Pad: CSI_DATA02 for Mode: ALT1</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>USDHC2_DATA3_SELECT_INPUT</name>
          <description>USDHC2_DATA3_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x688</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CSI_DATA03_ALT1</name>
                  <description>Selecting Pad: CSI_DATA03 for Mode: ALT1</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LCD_DATA23_ALT8</name>
                  <description>Selecting Pad: LCD_DATA23 for Mode: ALT8</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND_DATA03_ALT1</name>
                  <description>Selecting Pad: NAND_DATA03 for Mode: ALT1</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>USDHC2_DATA4_SELECT_INPUT</name>
          <description>USDHC2_DATA4_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x68C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LCD_DATA14_ALT8</name>
                  <description>Selecting Pad: LCD_DATA14 for Mode: ALT8</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND_DATA04_ALT1</name>
                  <description>Selecting Pad: NAND_DATA04 for Mode: ALT1</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CSI_DATA04_ALT1</name>
                  <description>Selecting Pad: CSI_DATA04 for Mode: ALT1</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>USDHC2_DATA5_SELECT_INPUT</name>
          <description>USDHC2_DATA5_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x690</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LCD_DATA15_ALT8</name>
                  <description>Selecting Pad: LCD_DATA15 for Mode: ALT8</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND_DATA05_ALT1</name>
                  <description>Selecting Pad: NAND_DATA05 for Mode: ALT1</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CSI_DATA05_ALT1</name>
                  <description>Selecting Pad: CSI_DATA05 for Mode: ALT1</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>USDHC2_DATA6_SELECT_INPUT</name>
          <description>USDHC2_DATA6_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x694</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LCD_DATA16_ALT8</name>
                  <description>Selecting Pad: LCD_DATA16 for Mode: ALT8</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND_DATA06_ALT1</name>
                  <description>Selecting Pad: NAND_DATA06 for Mode: ALT1</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CSI_DATA06_ALT1</name>
                  <description>Selecting Pad: CSI_DATA06 for Mode: ALT1</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>USDHC2_DATA7_SELECT_INPUT</name>
          <description>USDHC2_DATA7_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x698</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LCD_DATA17_ALT8</name>
                  <description>Selecting Pad: LCD_DATA17 for Mode: ALT8</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NAND_DATA07_ALT1</name>
                  <description>Selecting Pad: NAND_DATA07 for Mode: ALT1</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CSI_DATA07_ALT1</name>
                  <description>Selecting Pad: CSI_DATA07 for Mode: ALT1</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>USDHC2_WP_SELECT_INPUT</name>
          <description>USDHC2_WP_SELECT_INPUT DAISY Register</description>
          <addressOffset>0x69C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DAISY</name>
              <description>Selecting Pads Involved in Daisy Chain.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>GPIO1_IO06_ALT4</name>
                  <description>Selecting Pad: GPIO1_IO06 for Mode: ALT4</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>UART1_CTS_B_ALT8</name>
                  <description>Selecting Pad: UART1_CTS_B for Mode: ALT8</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CSI_PIXCLK_ALT1</name>
                  <description>Selecting Pad: CSI_PIXCLK for Mode: ALT1</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
      </registers>
    </peripheral>
    <peripheral>
      <name>IOMUXC_GPR</name>
      <description>IOMUXC</description>
      <groupName>IOMUXC_GPR</groupName>
      <prependToName>IOMUXC_GPR_</prependToName>
      <baseAddress>0x20E4000</baseAddress>
      <addressBlock>
        <offset>0</offset>
        <size>0x3C</size>
        <usage>registers</usage>
      </addressBlock>
      <registers>
        <register>
          <name>GPR0</name>
          <description>GPR0 General Purpose Register</description>
          <addressOffset>0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DMAREQ_MUX_SEL0</name>
              <description>Selects between two possible sources for SDMA_EVENT[2]:</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DMAREQ_MUX_SEL0_0</name>
                  <description>sim2.ipd_sim_tx_dmareq</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DMAREQ_MUX_SEL0_1</name>
                  <description>uart6.ipd_uart_tx_dmareq</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DMAREQ_MUX_SEL1</name>
              <description>Selects between two possible sources for SDMA_EVENT[7]:</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DMAREQ_MUX_SEL1_0</name>
                  <description>sim2.ipd_sim_rx_dmareq</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DMAREQ_MUX_SEL1_1</name>
                  <description>uart6.ipd_uart_rx_dmareq</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DMAREQ_MUX_SEL2</name>
              <description>Selects between two possible sources for SDMA_EVENT[8]:</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DMAREQ_MUX_SEL2_0</name>
                  <description>sim1.ipd_sim_tx_dmareq</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DMAREQ_MUX_SEL2_1</name>
                  <description>uart5.ipd_uart_tx_dmareq</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DMAREQ_MUX_SEL3</name>
              <description>Selects between two possible sources for SDMA_EVENT[9]:</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DMAREQ_MUX_SEL3_0</name>
                  <description>sim1.ipd_sim_rx_dmareq</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DMAREQ_MUX_SEL3_1</name>
                  <description>uart5.ipd_uart_rx_dmareq</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DMAREQ_MUX_SEL4</name>
              <description>Selects between two possible sources for SDMA_EVENT[10]:</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DMAREQ_MUX_SEL4_0</name>
                  <description>enet2.ipd_req_mac0_timer[1]</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DMAREQ_MUX_SEL4_1</name>
                  <description>uart8.ipd_uart_tx_dmareq</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DMAREQ_MUX_SEL5</name>
              <description>Selects between two possible sources for SDMA_EVENT[16]:</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DMAREQ_MUX_SEL5_0</name>
                  <description>enet2.ipd_req_mac0_timer[0]</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DMAREQ_MUX_SEL5_1</name>
                  <description>uart8.ipd_uart_rx_dmareq</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DMAREQ_MUX_SEL6</name>
              <description>Selects between two possible sources for SDMA_EVENT[24]:</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DMAREQ_MUX_SEL6_0</name>
                  <description>enet1.ipd_req_mac0_timer[1]</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DMAREQ_MUX_SEL6_1</name>
                  <description>uart7.ipd_uart_tx_dmareq</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DMAREQ_MUX_SEL7</name>
              <description>Selects between two possible sources for SDMA_EVENT[13]:</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DMAREQ_MUX_SEL7_0</name>
                  <description>enet1.ipd_req_mac0_timer[0]</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DMAREQ_MUX_SEL7_1</name>
                  <description>uart7.ipd_uart_rx_dmareq</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DMAREQ_MUX_SEL8</name>
              <description>Selects between two possible sources for SDMA_EVENT[43]:</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DMAREQ_MUX_SEL8_0</name>
                  <description>adc2.ipd_req</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DMAREQ_MUX_SEL8_1</name>
                  <description>tsc_dig.interrupt</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DMAREQ_MUX_SEL9</name>
              <description>Selects between two possible sources for SDMA_EVENT[44]:</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DMAREQ_MUX_SEL9_0</name>
                  <description>gpt2.ipi_int_gpt</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DMAREQ_MUX_SEL9_1</name>
                  <description>lcdif.lcdif_irq</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DMAREQ_MUX_SEL10</name>
              <description>Selects between two possible sources for SDMA_EVENT[45]:</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DMAREQ_MUX_SEL10_0</name>
                  <description>epit1.ipi_int_epit_oc</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DMAREQ_MUX_SEL10_1</name>
                  <description>csi.ipi_csi_int</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DMAREQ_MUX_SEL11</name>
              <description>Selects between two possible sources for SDMA_EVENT[46]:</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DMAREQ_MUX_SEL11_0</name>
                  <description>ecspi4.ipd_req_cspi_tdma</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DMAREQ_MUX_SEL11_1</name>
                  <description>i2c4.ipi_int</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DMAREQ_MUX_SEL12</name>
              <description>Selects between two possible sources for SDMA_EVENT[33]:</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DMAREQ_MUX_SEL12_0</name>
                  <description>ecspi4.ipd_req_cspi_rdma</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DMAREQ_MUX_SEL12_1</name>
                  <description>i2c3.ipi_int</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DMAREQ_MUX_SEL13</name>
              <description>Selects between two possible sources for SDMA_EVENT[34]:</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DMAREQ_MUX_SEL13_0</name>
                  <description>ecspi3.ipd_req_cspi_tdma</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DMAREQ_MUX_SEL13_1</name>
                  <description>i2c2.ipi_int</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DMAREQ_MUX_SEL14</name>
              <description>Selects between two possible sources for SDMA_EVENT[0]:</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DMAREQ_MUX_SEL14_0</name>
                  <description>ecspi3.ipd_req_cspi_rdma</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DMAREQ_MUX_SEL14_1</name>
                  <description>i2c1.ipi_int</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DMAREQ_MUX_SEL15</name>
              <description>Selects between two possible sources for SDMA_EVENT[47]:</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DMAREQ_MUX_SEL15_0</name>
                  <description>epit2.ipi_int_epit_oc</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DMAREQ_MUX_SEL15_1</name>
                  <description>pxp.pxp_irq</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DMAREQ_MUX_SEL16</name>
              <description>Selects between two possible sources for SDMA_EVENT[32]:</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DMAREQ_MUX_SEL16_0</name>
                  <description>uart4.ipd_uart_tx_dmareq_b (default)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DMAREQ_MUX_SEL16_1</name>
                  <description>sai1.ipd_req_sai_tx</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DMAREQ_MUX_SEL17</name>
              <description>Selects between two possible sources for SDMA_EVENT[33]:</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DMAREQ_MUX_SEL17_0</name>
                  <description>uart5.ipd_uart_rx_dmareq_b (default)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DMAREQ_MUX_SEL17_1</name>
                  <description>sai2.ipd_req_sai_rx</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DMAREQ_MUX_SEL18</name>
              <description>Selects between two possible sources for SDMA_EVENT[34]:</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DMAREQ_MUX_SEL18_0</name>
                  <description>uart5.ipd_uart_tx_dmareq_b (default)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DMAREQ_MUX_SEL18_1</name>
                  <description>sai2.ipd_req_sai_tx</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DMAREQ_MUX_SEL19</name>
              <description>Selects between two possible sources for SDMA_EVENT[47]:</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DMAREQ_MUX_SEL19_0</name>
                  <description>uart6.ipd_uart_tx_dmareq_b (default)</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DMAREQ_MUX_SEL20</name>
              <description>Selects between two possible sources for SDMA_EVENT[2]:</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DMAREQ_MUX_SEL20_0</name>
                  <description>iomux_top.sdma_events[14] (default)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DMAREQ_MUX_SEL20_1</name>
                  <description>csi2.ipi_csi_int_b</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DMAREQ_MUX_SEL21</name>
              <description>Selects between two possible sources for SDMA_EVENT[29]:</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DMAREQ_MUX_SEL21_0</name>
                  <description>uart3.ipd_uart_rx_dmareq_b (default)</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DMAREQ_MUX_SEL22</name>
              <description>Selects between two possible sources for SDMA_EVENT[30]:</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DMAREQ_MUX_SEL22_0</name>
                  <description>uart3.ipd_uart_tx_dmareq_b (default)</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>GPR1</name>
          <description>GPR1 General Purpose Register</description>
          <addressOffset>0x4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0xF400005</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ACT_CS0</name>
              <description>See description for ADDRS3[10]</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ADDRS0</name>
              <description>See description for ADDRS3[10]</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ACT_CS1</name>
              <description>See description for ADDRS3[10]</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ADDRS1</name>
              <description>See description for ADDRS3[10]</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ACT_CS2</name>
              <description>See description for ADDRS3[10]</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ADDRS2</name>
              <description>See description for ADDRS3[10]</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ACT_CS3</name>
              <description>See description for ADDRS3[10]</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ADDRS3</name>
              <description>Active Chip Select and Address Space</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ADDRS3_0</name>
                  <description>32 MByte</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ADDRS3_1</name>
                  <description>64 MByte</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ADDRS3_2</name>
                  <description>128 MByte</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>GINT</name>
              <description>Global interrupt &quot;0&quot; bit (connected to ARM A7 IRQ#0 and GPC)</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>GINT_0</name>
                  <description>Global interrupt request is not asserted</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>GINT_1</name>
                  <description>Global interrupt request is asserted</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ENET1_CLK_SEL</name>
              <description>ENET1 reference clock mode select.</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ENET1_CLK_SEL_0</name>
                  <description>ENET1 TX reference clock driven by ref_enetpll. This clock is also output to pins via the IOMUX. ENET_REF_CLK1 function.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENET1_CLK_SEL_1</name>
                  <description>Gets ENET1 TX reference clk from the ENET1_TX_CLK pin. In this use case, an external OSC provides the clock for both the external PHY and the internal controller</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ENET2_CLK_SEL</name>
              <description>ENET2 reference clock mode select.</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ENET2_CLK_SEL_0</name>
                  <description>ENET2 TX reference clock driven by ref_enetpll. This clock is also output to pins via the IOMUX. ENET_REF_CLK2 function.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENET2_CLK_SEL_1</name>
                  <description>Gets ENET2 TX reference clk from the ENET2_TX_CLK pin. In this use case, an external OSC provides the clock for both the external PHY and the internal controller</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>USB_EXP_MODE</name>
              <description>USB Exposure mode</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>USB_EXP_MODE_0</name>
                  <description>Exposure mode is disabled.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>USB_EXP_MODE_1</name>
                  <description>Exposure mode is enabled.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ADD_DS</name>
              <description>Setting ADD_DS to 0 will make the output driver of the SD3 pins ~10% stronger at highest drive strength (DSE=111). This is for use if the I/O buffer operation at WCS and 200 MHz is marginal.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ADD_DS_0</name>
                  <description>output driver ~10% stronger</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ADD_DS_1</name>
                  <description>output driver is normal</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ENET1_TX_CLK_DIR</name>
              <description>ENET1_TX_CLK data direction control when anatop. ENET_REF_CLK1 is selected (ALT1)</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ENET1_TX_CLK_DIR_0</name>
                  <description>ENET1_TX_CLK output driver is disabled when configured for ALT1</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENET1_TX_CLK_DIR_1</name>
                  <description>ENET1_TX_CLK output driver is enabled when configured for ALT1</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ENET2_TX_CLK_DIR</name>
              <description>ENET2_TX_CLK data direction control when anatop. ENET_REF_CLK2 is selected (ALT1)</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ENET2_TX_CLK_DIR_0</name>
                  <description>ENET2_TX_CLK output driver is disabled when configured for ALT1</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENET2_TX_CLK_DIR_1</name>
                  <description>ENET2_TX_CLK output driver is enabled when configured for ALT1</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SAI1_MCLK_DIR</name>
              <description>LCD_DATA00 data direction control when sai1.MCLK is selected (ALT8)</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SAI1_MCLK_DIR_0</name>
                  <description>LCD_DATA00 output driver is disabled when configured for ALT8</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SAI1_MCLK_DIR_1</name>
                  <description>LCD_DATA00 output driver is enabled when configured for ALT8</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SAI2_MCLK_DIR</name>
              <description>SD1_CLK data direction control when sai2.MCLK is selected (ALT2)</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SAI2_MCLK_DIR_0</name>
                  <description>SD1_CLK output driver is disabled when configured for ALT2</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SAI2_MCLK_DIR_1</name>
                  <description>SD1_CLK output driver is enabled when configured for ALT2</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SAI3_MCLK_DIR</name>
              <description>LCD_CLK data direction control when sai3.MCLK is selected (ALT3)</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SAI3_MCLK_DIR_0</name>
                  <description>LCD_CLK output driver is disabled when configured for ALT3</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SAI3_MCLK_DIR_1</name>
                  <description>LCD_CLK output driver is enabled when configured for ALT3</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>EXC_MON</name>
              <description>Exclusive monitor response select of illegal command</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>EXC_MON_0</name>
                  <description>OKAY response</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>EXC_MON_1</name>
                  <description>SLVError response (default)</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TZASC1_BOOT_LOCK</name>
              <description>TZASC-1 secure boot lock</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TZASC1_BOOT_LOCK_0</name>
                  <description>secure boot lock is disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TZASC1_BOOT_LOCK_1</name>
                  <description>secure boot lock is enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ARMA7_CLK_APB_DBG_EN</name>
              <description>ARM A7 platform APB clock enable</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ARMA7_CLK_APB_DBG_EN_0</name>
                  <description>APB clock is not running (gated)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ARMA7_CLK_APB_DBG_EN_1</name>
                  <description>APB clock is running (enabled)</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ARMA7_CLK_ATB_EN</name>
              <description>ARM A7 platform ATB clock enable</description>
              <bitOffset>0x19</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ARMA7_CLK_ATB_EN_0</name>
                  <description>ATB clock is not running (gated)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ARMA7_CLK_ATB_EN_1</name>
                  <description>ATB clock is running (enabled)</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ARMA7_CLK_AHB_EN</name>
              <description>ARM A7 platform AHB clock enable</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ARMA7_CLK_AHB_EN_0</name>
                  <description>AHB clock is not running (gated)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ARMA7_CLK_AHB_EN_1</name>
                  <description>AHB clock is running (enabled)</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>GPR2</name>
          <description>GPR2 General Purpose Register</description>
          <addressOffset>0x8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>PXP_MEM_EN_POWERSAVING</name>
              <description>enable power saving features on PXP memory</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PXP_MEM_EN_POWERSAVING_0</name>
                  <description>none memory power saving features enabled, SHUTDOWN/DEEPSLEEP/LIGHTSLEEP will have no effect</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PXP_MEM_EN_POWERSAVING_1</name>
                  <description>memory power saving features enabled, set SHUTDOWN/DEEPSLEEP/LIGHTSLEEP(priority high to low) to enable power saving levels</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PXP_MEM_SHUTDOWN</name>
              <description>set to bring memory to shutdown state (most power saving state, Shut Down periphery and core, no memory retention)</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PXP_MEM_DEEPSLEEP</name>
              <description>control how memory enter Deep Sleep mode (shutdown periphery power, but maintain memory contents, outputs of memory are pulled low)</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PXP_MEM_DEEPSLEEP_0</name>
                  <description>no force sleep control supported, memory deep sleep mode only entered when whole system in stop mode</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PXP_MEM_DEEPSLEEP_1</name>
                  <description>force memory into deep sleep mode</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PXP_MEM_LIGHTSLEEP</name>
              <description>set to bring memory to light sleep state (Low leakage mode, maintain memory contents, no change to memory output)</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>LCDIF1_MEM_EN_POWERSAVING</name>
              <description>enable power saving features on LCDIF memory</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LCDIF1_MEM_EN_POWERSAVING_0</name>
                  <description>none memory power saving features enabled, SHUTDOWN/DEEPSLEEP/LIGHTSLEEP will have no effect</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LCDIF1_MEM_EN_POWERSAVING_1</name>
                  <description>memory power saving features enabled, set SHUTDOWN/DEEPSLEEP/LIGHTSLEEP(priority high to low) to enable power saving levels</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>LCDIF1_MEM_SHUTDOWN</name>
              <description>set to bring memory to shutdown state (most power saving state, Shut Down periphery and core, no memory retention)</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>LCDIF1_MEM_DEEPSLEEP</name>
              <description>control how memory enter Deep Sleep mode (shutdown periphery power, but maintain memory contents, outputs of memory are pulled low)</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LCDIF1_MEM_DEEPSLEEP_0</name>
                  <description>no force sleep control supported, memory deep sleep mode only entered when whole system in stop mode</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LCDIF1_MEM_DEEPSLEEP_1</name>
                  <description>force memory into deep sleep mode</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>LCDIF1_MEM_LIGHTSLEEP</name>
              <description>set to bring memory to light sleep state (Low leakage mode, maintain memory contents, no change to memory output)</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>LCDIF2_MEM_EN_POWERSAVING</name>
              <description>enable power saving features on LCDIF memory</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LCDIF2_MEM_EN_POWERSAVING_0</name>
                  <description>none memory power saving features enabled, SHUTDOWN/DEEPSLEEP/LIGHTSLEEP will have no effect</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LCDIF2_MEM_EN_POWERSAVING_1</name>
                  <description>memory power saving features enabled, set SHUTDOWN/DEEPSLEEP/LIGHTSLEEP(priority high to low) to enable power saving levels</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>LCDIF2_MEM_SHUTDOWN</name>
              <description>set to bring memory to shutdown state (most power saving state, Shut Down periphery and core, no memory retention)</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>LCDIF2_MEM_DEEPSLEEP</name>
              <description>control how memory enter Deep Sleep mode (shutdown periphery power, but maintain memory contents, outputs of memory are pulled low)</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LCDIF2_MEM_DEEPSLEEP_0</name>
                  <description>no force sleep control supported, memory deep sleep mode only entered when whole system in stop mode</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LCDIF2_MEM_DEEPSLEEP_1</name>
                  <description>force memory into deep sleep mode</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>LCDIF2_MEM_LIGHTSLEEP</name>
              <description>set to bring memory to light sleep state (Low leakage mode, maintain memory contents, no change to memory output)</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>L2_MEM_EN_POWERSAVING</name>
              <description>enable power saving features on L2 memory</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>L2_MEM_EN_POWERSAVING_0</name>
                  <description>none memory power saving features enabled, SHUTDOWN/DEEPSLEEP/LIGHTSLEEP will have no effect</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>L2_MEM_EN_POWERSAVING_1</name>
                  <description>memory power saving features enabled, set SHUTDOWN/DEEPSLEEP/LIGHTSLEEP(priority high to low) to enable power saving levels</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>L2_MEM_SHUTDOWN</name>
              <description>set to bring memory to shutdown state (most power saving state, Shut Down periphery and core, no memory retention)</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>L2_MEM_DEEPSLEEP</name>
              <description>control how memory enter Deep Sleep mode (shutdown periphery power, but maintain memory contents, outputs of memory are pulled low)</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>L2_MEM_DEEPSLEEP_0</name>
                  <description>no force sleep control supported, memory deep sleep mode only entered when whole system in stop mode</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>L2_MEM_DEEPSLEEP_1</name>
                  <description>force memory into deep sleep mode</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>L2_MEM_LIGHTSLEEP</name>
              <description>set to bring memory to light sleep state (Low leakage mode, maintain memory contents, no change to memory output)</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>MQS_CLK_DIV</name>
              <description>Divider ratio control for mclk from hmclk. mclk frequency = 1/(n+1) * hmclk frequency.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>MQS_CLK_DIV_0</name>
                  <description>mclk frequency = hmclk frequency</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MQS_CLK_DIV_1</name>
                  <description>mclk frequency = 1/2 * hmclk frequency</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MQS_CLK_DIV_2</name>
                  <description>mclk frequency = 1/3 * hmclk frequency</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MQS_CLK_DIV_255</name>
                  <description>mclk frequency = 1/256 * hmclk frequency</description>
                  <value>0xFF</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>MQS_SW_RST</name>
              <description>MQS software reset.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>MQS_SW_RST_0</name>
                  <description>Exit software reset for MQS</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MQS_SW_RST_1</name>
                  <description>Enable software reset for MQS</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>MQS_EN</name>
              <description>MQS enable.</description>
              <bitOffset>0x19</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>MQS_EN_0</name>
                  <description>Disable MQS</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MQS_EN_1</name>
                  <description>Enable MQS</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>MQS_OVERSAMPLE</name>
              <description>Used to control the PWM oversampling rate compared with mclk.</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>MQS_OVERSAMPLE_0</name>
                  <description>32</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MQS_OVERSAMPLE_1</name>
                  <description>64</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DRAM_RESET_BYPASS</name>
              <description>DRAM Reset Bypass Select</description>
              <bitOffset>0x1B</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DRAM_RESET_BYPASS_0</name>
                  <description>DRAM reset driven by MMDC PHY Controller</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DRAM_RESET_BYPASS_1</name>
                  <description>DRAM reset driven by GPR2 register bit [28]</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DRAM_RESET</name>
              <description>DRAM Reset Value</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DRAM_RESET_0</name>
                  <description>Drive DRAM reset with 0</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DRAM_RESET_1</name>
                  <description>Drive DRAM reset with 1</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DRAM_CKE0</name>
              <description>CKE0 Bypass Value</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DRAM_CKE0_0</name>
                  <description>Drive CKE0 with 0</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DRAM_CKE0_1</name>
                  <description>Drive CKE0 with 1</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DRAM_CKE1</name>
              <description>CKE1 Bypass Value</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DRAM_CKE1_0</name>
                  <description>Drive CKE1 with 0</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DRAM_CKE1_1</name>
                  <description>Drive CKE1 with 1</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DRAM_CKE_BYPASS</name>
              <description>DRAM CKE Bypass Select</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DRAM_CKE_BYPASS_0</name>
                  <description>DRAM CKE1, CKE0 driven by MMDC PHY Controller</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DRAM_CKE_BYPASS_1</name>
                  <description>DRAM CKE1, CKE0 driven by GPR2 register bits [30:29]</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>GPR3</name>
          <description>GPR3 General Purpose Register</description>
          <addressOffset>0xC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0xFFF</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>OCRAM_CTL</name>
              <description>OCRAM_CTL[3] write address pipeline control bit</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>OCRAM_CTL_0</name>
                  <description>read data pipeline is disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>OCRAM_CTL_1</name>
                  <description>read data pipeline is enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CORE_DBG_ACK_EN</name>
              <description>Mask control of Core debug acknowledge to global debug acknowledge</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CORE_DBG_ACK_EN_0</name>
                  <description>Core debug acknowledge is part of global acknowledge.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CORE_DBG_ACK_EN_1</name>
                  <description>Core debug acknowledge is masked by this bit, and it is not part of global acknowledge.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>OCRAM_STATUS</name>
              <description>This field shows the OCRAM pipeline settings status, controlled by OCRAM_CTL[24:21] bits respectively</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>OCRAM_STATUS_0</name>
                  <description>read data pipeline configuration valid</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>OCRAM_STATUS_1</name>
                  <description>read data pipeline control bit changed</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>GPR4</name>
          <description>GPR4 General Purpose Register</description>
          <addressOffset>0x10</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SDMA_STOP_REQ</name>
              <description>SDMA stop request.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SDMA_STOP_REQ_0</name>
                  <description>stop request off</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SDMA_STOP_REQ_1</name>
                  <description>stop request on</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CAN1_STOP_REQ</name>
              <description>CAN1 stop request.</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CAN1_STOP_REQ_0</name>
                  <description>stop request off</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CAN1_STOP_REQ_1</name>
                  <description>stop request on</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CAN2_STOP_REQ</name>
              <description>CAN2 stop request.</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CAN2_STOP_REQ_0</name>
                  <description>stop request off</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CAN2_STOP_REQ_1</name>
                  <description>stop request on</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ENET1_STOP_REQ</name>
              <description>ENET1 stop request.</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ENET1_STOP_REQ_0</name>
                  <description>stop request off</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENET1_STOP_REQ_1</name>
                  <description>stop request on</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ENET2_STOP_REQ</name>
              <description>ENET2 stop request.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ENET2_STOP_REQ_0</name>
                  <description>stop request off</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENET2_STOP_REQ_1</name>
                  <description>stop request on</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SAI1_STOP_REQ</name>
              <description>SAI1 stop request.</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SAI1_STOP_REQ_0</name>
                  <description>stop request off</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SAI1_STOP_REQ_1</name>
                  <description>stop request on</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SAI2_STOP_REQ</name>
              <description>SAI2 stop request.</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SAI2_STOP_REQ_0</name>
                  <description>stop request off</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SAI2_STOP_REQ_1</name>
                  <description>stop request on</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SAI3_STOP_REQ</name>
              <description>SAI3 stop request.</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SAI3_STOP_REQ_0</name>
                  <description>stop request off</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SAI3_STOP_REQ_1</name>
                  <description>stop request on</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ENET_IPG_CLK_S_EN</name>
              <description>ENET ipg_clk_s clock gating enable</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ENET_IPG_CLK_S_EN_0</name>
                  <description>ipg_clk_s is gated when there's no IPS access</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENET_IPG_CLK_S_EN_1</name>
                  <description>ipg_clk_s is always on</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SDMA_STOP_ACK</name>
              <description>SDMA stop acknowledge. This is a status (read-only) bit</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SDMA_STOP_ACK_0</name>
                  <description>SDMA stop acknowledge is not asserted</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SDMA_STOP_ACK_1</name>
                  <description>SDMA stop acknowledge is asserted, SDMA is in STOP mode</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CAN1_STOP_ACK</name>
              <description>CAN1 stop acknowledge. This is a status (read-only) bit</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CAN1_STOP_ACK_0</name>
                  <description>CAN1 stop acknowledge is not asserted</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CAN1_STOP_ACK_1</name>
                  <description>CAN1 stop acknowledge is asserted, SDMA is in STOP mode</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CAN2_STOP_ACK</name>
              <description>CAN2 stop acknowledge. This is a status (read-only) bit</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CAN2_STOP_ACK_0</name>
                  <description>CAN2 stop acknowledge is not asserted</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CAN2_STOP_ACK_1</name>
                  <description>CAN2 stop acknowledge is asserted, SDMA is in STOP mode</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ENET1_STOP_ACK</name>
              <description>ENET1 stop acknowledge. This is a status (read-only) bit</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ENET1_STOP_ACK_0</name>
                  <description>ENET1 stop acknowledge is not asserted</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENET1_STOP_ACK_1</name>
                  <description>ENET1 stop acknowledge is asserted, SDMA is in STOP mode</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ENET2_STOP_ACK</name>
              <description>ENET2 stop acknowledge. This is a status (read-only) bit</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ENET2_STOP_ACK_0</name>
                  <description>ENET2 stop acknowledge is not asserted</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENET2_STOP_ACK_1</name>
                  <description>ENET2 stop acknowledge is asserted, SDMA is in STOP mode</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SAI1_STOP_ACK</name>
              <description>SAI1 stop acknowledge. This is a status (read-only) bit</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SAI1_STOP_ACK_0</name>
                  <description>SAI1 stop acknowledge is not asserted</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SAI1_STOP_ACK_1</name>
                  <description>SAI1 stop acknowledge is asserted, SDMA is in STOP mode</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SAI2_STOP_ACK</name>
              <description>SAI2 stop acknowledge. This is a status (read-only) bit</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SAI2_STOP_ACK_0</name>
                  <description>SAI2 stop acknowledge is not asserted</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SAI2_STOP_ACK_1</name>
                  <description>SAI2 stop acknowledge is asserted, SDMA is in STOP mode</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SAI3_STOP_ACK</name>
              <description>SAI3 stop acknowledge. This is a status (read-only) bit</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SAI3_STOP_ACK_0</name>
                  <description>SAI3 stop acknowledge is not asserted</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SAI3_STOP_ACK_1</name>
                  <description>SAI3 stop acknowledge is asserted, SDMA is in STOP mode</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ARM_WFI</name>
              <description>ARM A7 WFI event out indicating on WFI state of the cores (these are status, read only bits)</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ARM_WFI_0</name>
                  <description>ARM Core[GPR5-index] is not in WFI mode</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ARM_WFI_1</name>
                  <description>ARM Core[GPR5-index] is in WFI mode</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ARM_WFE</name>
              <description>ARM A7 WFE event out indication on WFE state of the cores (these are status, read only bits)</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ARM_WFE_0</name>
                  <description>ARM Core[GPR5-index - 4] is not in WFE mode</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ARM_WFE_1</name>
                  <description>ARM Core[GPR5-index - 4] is in WFE mode</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>GPR5</name>
          <description>GPR5 General Purpose Register</description>
          <addressOffset>0x14</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>WDOG1_MASK</name>
              <description>WDOG1 Timeout Mask</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>WDOG1_MASK_0</name>
                  <description>WDOG1 Timeout behaves normally</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WDOG1_MASK_1</name>
                  <description>WDOG1 Timeout is masked</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WDOG2_MASK</name>
              <description>WDOG2 Timeout Mask</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>WDOG2_MASK_0</name>
                  <description>WDOG2 Timeout behaves normally</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WDOG2_MASK_1</name>
                  <description>WDOG2 Timeout is masked</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WDOG3_MASK</name>
              <description>WDOG3 Timeout Mask</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>WDOG3_MASK_0</name>
                  <description>WDOG3 Timeout behaves normally</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WDOG3_MASK_1</name>
                  <description>WDOG3 Timeout is masked</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>GPT2_CAPIN1_SEL</name>
              <description>GPT2 input capture channel 1 source select</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>GPT2_CAPIN1_SEL_0</name>
                  <description>source from pad</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>GPT2_CAPIN1_SEL_1</name>
                  <description>source from enet1.ipp_do_mac0_timer[3]</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>GPT2_CAPIN2_SEL</name>
              <description>GPT2 input capture channel 2 source select</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>GPT2_CAPIN2_SEL_0</name>
                  <description>source from pad</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>GPT2_CAPIN2_SEL_1</name>
                  <description>source from enet2.ipp_do_mac0_timer[3]</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ENET1_EVENT3IN_SEL</name>
              <description>ENET1 input timer event3 source select</description>
              <bitOffset>0x19</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ENET1_EVENT3IN_SEL_0</name>
                  <description>event3 source input from pad</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENET1_EVENT3IN_SEL_1</name>
                  <description>event3 source input from gpt2.ipp_do_cmpout1</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ENET2_EVENT3IN_SEL</name>
              <description>ENET2 input timer event3 source select</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ENET2_EVENT3IN_SEL_0</name>
                  <description>event3 source input from pad</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENET2_EVENT3IN_SEL_1</name>
                  <description>event3 source input from gpt2.ipp_do_cmpout2</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>VREF_1M_CLK_GPT1</name>
              <description>GPT1 1 MHz clock source select</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>VREF_1M_CLK_GPT1_0</name>
                  <description>GPT1 ipg_clk_highfreq driven by IPG_PERCLK</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>VREF_1M_CLK_GPT1_1</name>
                  <description>GPT1 ipg_clk_highfreq driven by anatop 1 MHz clock</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>VREF_1M_CLK_GPT2</name>
              <description>GPT2 1 MHz clock source select</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>VREF_1M_CLK_GPT2_0</name>
                  <description>GPT2 ipg_clk_highfreq driven by IPG_PERCLK</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>VREF_1M_CLK_GPT2_1</name>
                  <description>GPT2 ipg_clk_highfreq driven by anatop 1 MHz clock</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>REF_1M_CLK_EPIT1</name>
              <description>EPIT1 1 MHz clock source select</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>REF_1M_CLK_EPIT1_0</name>
                  <description>EPIT1 ipg_clk_highfreq driven by IPG_PERCLK</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REF_1M_CLK_EPIT1_1</name>
                  <description>EPIT1 ipg_clk highfreq driven by anatop 1 MHz clock</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>REF_1M_CLK_EPIT2</name>
              <description>EPIT2 1 MHz clock source select</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>REF_1M_CLK_EPIT2_0</name>
                  <description>EPIT2 ipg_clk_highfreq driven by IPG_PERCLK</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REF_1M_CLK_EPIT2_1</name>
                  <description>EPIT2 ipg_clk_highfreq driven by anatop 1 MHz clock</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>GPR9</name>
          <description>GPR9 General Purpose Register</description>
          <addressOffset>0x24</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TZASC1_BYP</name>
              <description>TZASC-1 BYPASS MUX control</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TZASC1_BYP_0</name>
                  <description>The TZASC-1 is bypassed and the transactions to DDR are not being checked.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TZASC1_BYP_1</name>
                  <description>The TZASC-1 is not bypassed and the transactions to DDR are being monitored / checked.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>GPR10</name>
          <description>GPR10 General Purpose Register</description>
          <addressOffset>0x28</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x7</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DBG_EN</name>
              <description>ARM non secure (non-invasive) debug enable</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DBG_EN_0</name>
                  <description>Debug turned off.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DBG_EN_1</name>
                  <description>Debug enabled (default).</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DBG_CLK_EN</name>
              <description>ARM Debug clock enable</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DBG_CLK_EN_0</name>
                  <description>Debug turned off.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DBG_CLK_EN_1</name>
                  <description>Debug enabled (default).</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SEC_ERR_RESP</name>
              <description>Security error response enable for all security gaskets (on both AHB and AXI busses)</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SEC_ERR_RESP_0</name>
                  <description>OKEY response</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SEC_ERR_RESP_1</name>
                  <description>SLVError (default)</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>OCRAM_TZ_EN</name>
              <description>OCRAM TrustZone (TZ) enable.</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>OCRAM_TZ_EN_0</name>
                  <description>The TrustZone feature is disabled. Entire OCRAM space is available for all access types (secure/non-secure/user/supervisor).</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>OCRAM_TZ_EN_1</name>
                  <description>The TrustZone feature is enabled. Access to address in the range specified by [ENDADDR:STARTADDR] follows the execution mode access policy described in CSU chapter.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>OCRAM_TZ_ADDR</name>
              <description>OCRAM TrustZone (TZ) start address</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>GPR14</name>
          <description>GPR14 General Purpose Register</description>
          <addressOffset>0x38</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>GPR</name>
              <description>General purpose bits</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>30</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
      </registers>
    </peripheral>
    <peripheral>
      <name>SDMAARM</name>
      <description>SDMA</description>
      <groupName>SDMAARM</groupName>
      <prependToName>SDMAARM_</prependToName>
      <baseAddress>0x20EC000</baseAddress>
      <addressBlock>
        <offset>0</offset>
        <size>0x2C0</size>
        <usage>registers</usage>
      </addressBlock>
      <interrupt>
        <name>SDMA</name>
        <value>34</value>
      </interrupt>
      <registers>
        <register>
          <name>MC0PTR</name>
          <description>ARM platform Channel 0 Pointer</description>
          <addressOffset>0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MC0PTR</name>
              <description>Channel 0 Pointer contains the 32-bit address, in ARM platform memory, of channel 0 control block (the boot channel)</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>INTR</name>
          <description>Channel Interrupts</description>
          <addressOffset>0x4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>HI</name>
              <description>The ARM platform Interrupts register contains the 32 HI[i] bits</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
            </field>
          </fields>
        </register>
        <register>
          <name>STOP_STAT</name>
          <description>Channel Stop/Channel Status</description>
          <addressOffset>0x8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>HE</name>
              <description>This 32-bit register gives access to the ARM platform Enable bits</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
            </field>
          </fields>
        </register>
        <register>
          <name>HSTART</name>
          <description>Channel Start</description>
          <addressOffset>0xC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>HSTART_HE</name>
              <description>The HSTART_HE registers are 32 bits wide with one bit for every channel</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
            </field>
          </fields>
        </register>
        <register>
          <name>EVTOVR</name>
          <description>Channel Event Override</description>
          <addressOffset>0x10</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>EO</name>
              <description>The Channel Event Override register contains the 32 EO[i] bits</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>DSPOVR</name>
          <description>Channel BP Override</description>
          <addressOffset>0x14</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0xFFFFFFFF</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DO</name>
              <description>This register is reserved</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DO_0</name>
                  <description>- Reserved</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DO_1</name>
                  <description>- Reset value.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>HOSTOVR</name>
          <description>Channel ARM platform Override</description>
          <addressOffset>0x18</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>HO</name>
              <description>The Channel ARM platform Override register contains the 32 HO[i] bits</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>EVTPEND</name>
          <description>Channel Event Pending</description>
          <addressOffset>0x1C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>EP</name>
              <description>The Channel Event Pending register contains the 32 EP[i] bits</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
            </field>
          </fields>
        </register>
        <register>
          <name>RESET</name>
          <description>Reset Register</description>
          <addressOffset>0x24</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RESET</name>
              <description>When set, this bit causes the SDMA to be held in a software reset</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>RESCHED</name>
              <description>When set, this bit forces the SDMA to reschedule as if a script had executed a done instruction</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>EVTERR</name>
          <description>DMA Request Error Register</description>
          <addressOffset>0x28</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>CHNERR</name>
              <description>This register is used by the SDMA to warn the ARM platform when an incoming DMA request was detected and it triggers a channel that is already pending or being serviced</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>INTRMASK</name>
          <description>Channel ARM platform Interrupt Mask</description>
          <addressOffset>0x2C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>HIMASK</name>
              <description>The Interrupt Mask Register contains 32 interrupt generation mask bits</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>PSW</name>
          <description>Schedule Status</description>
          <addressOffset>0x30</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>CCR</name>
              <description>The Current Channel Register indicates the number of the channel that is being executed by the SDMA</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>CCP</name>
              <description>The Current Channel Priority indicates the priority of the current active channel</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CCP_0</name>
                  <description>No running channel</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CCP_1</name>
                  <description>Active channel priority</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>NCR</name>
              <description>The Next Channel Register indicates the number of the next scheduled pending channel with the highest priority</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>NCP</name>
              <description>The Next Channel Priority gives the next pending channel priority</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NCP_0</name>
                  <description>No running channel</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NCP_1</name>
                  <description>Active channel priority</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>EVTERRDBG</name>
          <description>DMA Request Error Register</description>
          <addressOffset>0x34</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>CHNERR</name>
              <description>This register is the same as EVTERR, except reading it does not clear its contents</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CONFIG</name>
          <description>Configuration Register</description>
          <addressOffset>0x38</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x3</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>CSM</name>
              <description>Selects the Context Switch Mode</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CSM_0</name>
                  <description>static</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CSM_1</name>
                  <description>dynamic low power</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CSM_2</name>
                  <description>dynamic with no loop</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CSM_3</name>
                  <description>dynamic</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ACR</name>
              <description>ARM platform DMA / SDMA Core Clock Ratio</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ACR_0</name>
                  <description>ARM platform DMA interface frequency equals twice core frequency</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ACR_1</name>
                  <description>ARM platform DMA interface frequency equals core frequency</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RTDOBS</name>
              <description>Indicates if Real-Time Debug pins are used: They do not toggle by default in order to reduce power consumption</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RTDOBS_0</name>
                  <description>RTD pins disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RTDOBS_1</name>
                  <description>RTD pins enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSPDMA</name>
              <description>This bit's function is reserved and should be configured as zero.</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSPDMA_0</name>
                  <description>- Reset Value</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSPDMA_1</name>
                  <description>- Reserved</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SDMA_LOCK</name>
          <description>SDMA LOCK</description>
          <addressOffset>0x3C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>LOCK</name>
              <description>The LOCK bit is used to restrict access to update SDMA script memory through ROM channel zero scripts and through the OnCE interface under ARM platform control</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LOCK_0</name>
                  <description>LOCK disengaged.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LOCK_1</name>
                  <description>LOCK enabled.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SRESET_LOCK_CLR</name>
              <description>The SRESET_LOCK_CLR bit determine if the LOCK bit is cleared on a software reset triggered by writing to the RESET register</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRESET_LOCK_CLR_0</name>
                  <description>Software Reset does not clear the LOCK bit.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRESET_LOCK_CLR_1</name>
                  <description>Software Reset clears the LOCK bit.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>ONCE_ENB</name>
          <description>OnCE Enable</description>
          <addressOffset>0x40</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ENB</name>
              <description>The OnCE Enable register selects the OnCE control source: When cleared (0), the OnCE registers are accessed through the JTAG interface; when set (1), the OnCE registers may be accessed by the ARM platform through the addresses described, as follows</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ONCE_DATA</name>
          <description>OnCE Data Register</description>
          <addressOffset>0x44</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA</name>
              <description>Data register of the OnCE JTAG controller</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ONCE_INSTR</name>
          <description>OnCE Instruction Register</description>
          <addressOffset>0x48</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>INSTR</name>
              <description>Instruction register of the OnCE JTAG controller</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ONCE_STAT</name>
          <description>OnCE Status Register</description>
          <addressOffset>0x4C</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0xE000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ECDR</name>
              <description>Event Cell Debug Request</description>
              <bitOffset>0</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ECDR_0</name>
                  <description>1 matched addra_cond</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECDR_1</name>
                  <description>1 matched addrb_cond</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECDR_2</name>
                  <description>1 matched data_cond</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>MST</name>
              <description>This flag is raised when the OnCE is controlled from the ARM platform peripheral interface.</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>MST_0</name>
                  <description>The JTAG interface controls the OnCE.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MST_1</name>
                  <description>The ARM platform peripheral interface controls the OnCE.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SWB</name>
              <description>This flag is raised when the SDMA has entered debug mode after a software breakpoint.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>ODR</name>
              <description>This flag is raised when the SDMA has entered debug mode after a OnCE debug request.</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>EDR</name>
              <description>This flag is raised when the SDMA has entered debug mode after an external debug request.</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>RCV</name>
              <description>After each write access to the real time buffer (RTB), the RCV bit is set</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>PST</name>
              <description>The Processor Status bits reflect the state of the SDMA RISC engine</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PST_0</name>
                  <description>Program</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PST_1</name>
                  <description>Data</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PST_2</name>
                  <description>Change of Flow</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PST_3</name>
                  <description>Change of Flow in Loop</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PST_4</name>
                  <description>Debug</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PST_5</name>
                  <description>Functional Unit</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PST_6</name>
                  <description>Sleep</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PST_7</name>
                  <description>Save</description>
                  <value>0x7</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PST_8</name>
                  <description>Program in Sleep</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PST_9</name>
                  <description>Data in Sleep</description>
                  <value>0x9</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PST_12</name>
                  <description>Debug in Sleep</description>
                  <value>0xC</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PST_13</name>
                  <description>Functional Unit in Sleep</description>
                  <value>0xD</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PST_14</name>
                  <description>Sleep after Reset</description>
                  <value>0xE</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PST_15</name>
                  <description>Restore</description>
                  <value>0xF</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>ONCE_CMD</name>
          <description>OnCE Command Register</description>
          <addressOffset>0x50</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>CMD</name>
              <description>Writing to this register will cause the OnCE to execute the command that is written</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CMD_0</name>
                  <description>rstatus</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CMD_1</name>
                  <description>dmov</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CMD_2</name>
                  <description>exec_once</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CMD_3</name>
                  <description>run_core</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CMD_4</name>
                  <description>exec_core</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CMD_5</name>
                  <description>debug_rqst</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CMD_6</name>
                  <description>rbuffer</description>
                  <value>0x6</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>ILLINSTADDR</name>
          <description>Illegal Instruction Trap Address</description>
          <addressOffset>0x58</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x1</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ILLINSTADDR</name>
              <description>The Illegal Instruction Trap Address is the address where the SDMA jumps when an illegal instruction is executed</description>
              <bitOffset>0</bitOffset>
              <bitWidth>14</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CHN0ADDR</name>
          <description>Channel 0 Boot Address</description>
          <addressOffset>0x5C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x50</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>CHN0ADDR</name>
              <description>This 14-bit register is used by the boot code of the SDMA</description>
              <bitOffset>0</bitOffset>
              <bitWidth>14</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SMSZ</name>
              <description>The bit 14 (Scratch Memory Size) determines if scratch memory must be available after every channel context</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SMSZ_0</name>
                  <description>24 words per context</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SMSZ_1</name>
                  <description>32 words per context</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>EVT_MIRROR</name>
          <description>DMA Requests</description>
          <addressOffset>0x60</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>EVENTS</name>
              <description>This register reflects the DMA requests received by the SDMA for events 31-0</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>EVENTS_0</name>
                  <description>DMA request event not pending</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>EVENTS_1</name>
                  <description>DMA request event pending</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>EVT_MIRROR2</name>
          <description>DMA Requests 2</description>
          <addressOffset>0x64</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>EVENTS</name>
              <description>This register reflects the DMA requests received by the SDMA for events 47-32</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>EVENTS_0</name>
                  <description>- DMA request event not pending</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>XTRIG_CONF1</name>
          <description>Cross-Trigger Events Configuration Register 1</description>
          <addressOffset>0x70</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>NUM0</name>
              <description>Contains the number of the DMA request or channel that triggers the pulse on the cross-trigger event line number i</description>
              <bitOffset>0</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CNF0</name>
              <description>Configuration of the SDMA event line number i that is connected to the cross-trigger</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CNF0_0</name>
                  <description>channel</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CNF0_1</name>
                  <description>DMA request</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>NUM1</name>
              <description>Contains the number of the DMA request or channel that triggers the pulse on the cross-trigger event line number i</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CNF1</name>
              <description>Configuration of the SDMA event line number i that is connected to the cross-trigger</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CNF1_0</name>
                  <description>channel</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CNF1_1</name>
                  <description>DMA request</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>NUM2</name>
              <description>Contains the number of the DMA request or channel that triggers the pulse on the cross-trigger event line number i</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CNF2</name>
              <description>Configuration of the SDMA event line number i that is connected to the cross-trigger</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CNF2_0</name>
                  <description>channel</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CNF2_1</name>
                  <description>DMA request</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>NUM3</name>
              <description>Contains the number of the DMA request or channel that triggers the pulse on the cross-trigger event line number i</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CNF3</name>
              <description>Configuration of the SDMA event line number i that is connected to the cross-trigger</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CNF3_0</name>
                  <description>channel</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CNF3_1</name>
                  <description>DMA request</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>XTRIG_CONF2</name>
          <description>Cross-Trigger Events Configuration Register 2</description>
          <addressOffset>0x74</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>NUM4</name>
              <description>Contains the number of the DMA request or channel that triggers the pulse on the cross-trigger event line number i</description>
              <bitOffset>0</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CNF4</name>
              <description>Configuration of the SDMA event line number i that is connected to the cross-trigger</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CNF4_0</name>
                  <description>channel</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CNF4_1</name>
                  <description>DMA request</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>NUM5</name>
              <description>Contains the number of the DMA request or channel that triggers the pulse on the cross-trigger event line number i</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CNF5</name>
              <description>Configuration of the SDMA event line number i that is connected to the cross-trigger</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CNF5_0</name>
                  <description>channel</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CNF5_1</name>
                  <description>DMA request</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>NUM6</name>
              <description>Contains the number of the DMA request or channel that triggers the pulse on the cross-trigger event line number i</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CNF6</name>
              <description>Configuration of the SDMA event line number i that is connected to the cross-trigger</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CNF6_0</name>
                  <description>channel</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CNF6_1</name>
                  <description>DMA request</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>NUM7</name>
              <description>Contains the number of the DMA request or channel that triggers the pulse on the cross-trigger event line number i</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CNF7</name>
              <description>Configuration of the SDMA event line number i that is connected to the cross-trigger</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CNF7_0</name>
                  <description>channel</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CNF7_1</name>
                  <description>DMA request</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <dim>32</dim>
          <dimIncrement>0x4</dimIncrement>
          <name>SDMA_CHNPRI%s</name>
          <description>Channel Priority Registers</description>
          <addressOffset>0x100</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>CHNPRIn</name>
              <description>This contains the priority of channel number n</description>
              <bitOffset>0</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <dim>48</dim>
          <dimIncrement>0x4</dimIncrement>
          <name>CHNENBL%s</name>
          <description>Channel Enable RAM</description>
          <addressOffset>0x200</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ENBLn</name>
              <description>This 32-bit value selects the channels that are triggered by the DMA request number n</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
      </registers>
    </peripheral>
    <peripheral>
      <name>USB1</name>
      <description>USB</description>
      <groupName>USB</groupName>
      <prependToName>USB1_</prependToName>
      <baseAddress>0x2184000</baseAddress>
      <headerStructName>USB</headerStructName>
      <addressBlock>
        <offset>0</offset>
        <size>0x1E0</size>
        <usage>registers</usage>
      </addressBlock>
      <interrupt>
        <name>USB_OTG1</name>
        <value>75</value>
      </interrupt>
      <registers>
        <register>
          <name>ID</name>
          <description>Identification register</description>
          <addressOffset>0</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0xE4A1FA05</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ID</name>
              <description>Configuration number</description>
              <bitOffset>0</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>NID</name>
              <description>Complement version of ID</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>REVISION</name>
              <description>Revision number of the controller core.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HWGENERAL</name>
          <description>Hardware General</description>
          <addressOffset>0x4</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0x35</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>PHYW</name>
              <description>Data width of the transciever connected to the controller core. PHYW bit reset value is</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PHYW_0</name>
                  <description>8 bit wide data bus Software non-programmable</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PHYW_1</name>
                  <description>16 bit wide data bus Software non-programmable</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PHYW_2</name>
                  <description>Reset to 8 bit wide data bus Software programmable</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PHYW_3</name>
                  <description>Reset to 16 bit wide data bus Software programmable</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PHYM</name>
              <description>Transciever type</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PHYM_0</name>
                  <description>UTMI/UMTI+</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PHYM_1</name>
                  <description>ULPI DDR</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PHYM_2</name>
                  <description>ULPI</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PHYM_3</name>
                  <description>Serial Only</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PHYM_4</name>
                  <description>Software programmable - reset to UTMI/UTMI+</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PHYM_5</name>
                  <description>Software programmable - reset to ULPI DDR</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PHYM_6</name>
                  <description>Software programmable - reset to ULPI</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PHYM_7</name>
                  <description>Software programmable - reset to Serial</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SM</name>
              <description>Serial interface mode capability</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SM_0</name>
                  <description>No Serial Engine, always use parallel signalling.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SM_1</name>
                  <description>Serial Engine present, always use serial signalling for FS/LS.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SM_2</name>
                  <description>Software programmable - Reset to use parallel signalling for FS/LS</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SM_3</name>
                  <description>Software programmable - Reset to use serial signalling for FS/LS</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>HWHOST</name>
          <description>Host Hardware Parameters</description>
          <addressOffset>0x8</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0x10020001</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>HC</name>
              <description>Host Capable. Indicating whether host operation mode is supported or not.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HC_0</name>
                  <description>Not supported</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HC_1</name>
                  <description>Supported</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>NPORT</name>
              <description>The Nmber of downstream ports supported by the host controller is (NPORT+1)</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HWDEVICE</name>
          <description>Device Hardware Parameters</description>
          <addressOffset>0xC</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0x11</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DC</name>
              <description>Device Capable. Indicating whether device operation mode is supported or not.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DC_0</name>
                  <description>Not supported</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DC_1</name>
                  <description>Supported</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DEVEP</name>
              <description>Device Endpoint Number</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HWTXBUF</name>
          <description>TX Buffer Hardware Parameters</description>
          <addressOffset>0x10</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0x80080B08</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TXBURST</name>
              <description>Default burst size for memory to TX buffer transfer</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>TXCHANADD</name>
              <description>TX FIFO Buffer size is: (2^TXCHANADD) * 4 Bytes</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HWRXBUF</name>
          <description>RX Buffer Hardware Parameters</description>
          <addressOffset>0x14</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0x808</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RXBURST</name>
              <description>Default burst size for memory to RX buffer transfer</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>RXADD</name>
              <description>Buffer total size for all receive endpoints is (2^RXADD)</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>GPTIMER0LD</name>
          <description>General Purpose Timer #0 Load</description>
          <addressOffset>0x80</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>GPTLD</name>
              <description>General Purpose Timer Load Value These bit fields are loaded to GPTCNT bits when GPTRST bit is set '1b'</description>
              <bitOffset>0</bitOffset>
              <bitWidth>24</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>GPTIMER0CTRL</name>
          <description>General Purpose Timer #0 Controller</description>
          <addressOffset>0x84</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>GPTCNT</name>
              <description>General Purpose Timer Counter. This field is the count value of the countdown timer.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>24</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>GPTMODE</name>
              <description>General Purpose Timer Mode In one shot mode, the timer will count down to zero, generate an interrupt, and stop until the counter is reset by software; In repeat mode, the timer will count down to zero, generate an interrupt and automatically reload the counter value from GPTLD bits to start again</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>GPTMODE_0</name>
                  <description>One Shot Mode</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>GPTMODE_1</name>
                  <description>Repeat Mode</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>GPTRST</name>
              <description>General Purpose Timer Reset</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>GPTRST_0</name>
                  <description>No action</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>GPTRST_1</name>
                  <description>Load counter value from GPTLD bits in n_GPTIMER0LD</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>GPTRUN</name>
              <description>General Purpose Timer Run GPTCNT bits are not effected when setting or clearing this bit.</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>GPTRUN_0</name>
                  <description>Stop counting</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>GPTRUN_1</name>
                  <description>Run</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>GPTIMER1LD</name>
          <description>General Purpose Timer #1 Load</description>
          <addressOffset>0x88</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>GPTLD</name>
              <description>General Purpose Timer Load Value These bit fields are loaded to GPTCNT bits when GPTRST bit is set '1b'</description>
              <bitOffset>0</bitOffset>
              <bitWidth>24</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>GPTIMER1CTRL</name>
          <description>General Purpose Timer #1 Controller</description>
          <addressOffset>0x8C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>GPTCNT</name>
              <description>General Purpose Timer Counter. This field is the count value of the countdown timer.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>24</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>GPTMODE</name>
              <description>General Purpose Timer Mode In one shot mode, the timer will count down to zero, generate an interrupt, and stop until the counter is reset by software</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>GPTMODE_0</name>
                  <description>One Shot Mode</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>GPTMODE_1</name>
                  <description>Repeat Mode</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>GPTRST</name>
              <description>General Purpose Timer Reset</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>GPTRST_0</name>
                  <description>No action</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>GPTRST_1</name>
                  <description>Load counter value from GPTLD bits in USB_n_GPTIMER0LD</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>GPTRUN</name>
              <description>General Purpose Timer Run GPTCNT bits are not effected when setting or clearing this bit.</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>GPTRUN_0</name>
                  <description>Stop counting</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>GPTRUN_1</name>
                  <description>Run</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SBUSCFG</name>
          <description>System Bus Config</description>
          <addressOffset>0x90</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x2</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>AHBBRST</name>
              <description>AHB master interface Burst configuration These bits control AHB master transfer type sequence (or priority)</description>
              <bitOffset>0</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>AHBBRST_0</name>
                  <description>Incremental burst of unspecified length only</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AHBBRST_1</name>
                  <description>INCR4 burst, then single transfer</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AHBBRST_2</name>
                  <description>INCR8 burst, INCR4 burst, then single transfer</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AHBBRST_3</name>
                  <description>INCR16 burst, INCR8 burst, INCR4 burst, then single transfer</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AHBBRST_5</name>
                  <description>INCR4 burst, then incremental burst of unspecified length</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AHBBRST_6</name>
                  <description>INCR8 burst, INCR4 burst, then incremental burst of unspecified length</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AHBBRST_7</name>
                  <description>INCR16 burst, INCR8 burst, INCR4 burst, then incremental burst of unspecified length</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>CAPLENGTH</name>
          <description>Capability Registers Length</description>
          <addressOffset>0x100</addressOffset>
          <size>8</size>
          <access>read-only</access>
          <resetValue>0x40</resetValue>
          <resetMask>0xFF</resetMask>
          <fields>
            <field>
              <name>CAPLENGTH</name>
              <description>These bits are used as an offset to add to register base to find the beginning of the Operational Register</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HCIVERSION</name>
          <description>Host Controller Interface Version</description>
          <addressOffset>0x102</addressOffset>
          <size>16</size>
          <access>read-only</access>
          <resetValue>0x100</resetValue>
          <resetMask>0xFFFF</resetMask>
          <fields>
            <field>
              <name>HCIVERSION</name>
              <description>Host Controller Interface Version Number Default value is '10h', which means EHCI rev1.0.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HCSPARAMS</name>
          <description>Host Controller Structural Parameters</description>
          <addressOffset>0x104</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0x10011</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>N_PORTS</name>
              <description>Number of downstream ports</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>PPC</name>
              <description>Port Power Control This field indicates whether the host controller implementation includes port power control</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>N_PCC</name>
              <description>Number of Ports per Companion Controller This field indicates the number of ports supported per internal Companion Controller</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>N_CC</name>
              <description>Number of Companion Controller (N_CC)</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>N_CC_0</name>
                  <description>There is no internal Companion Controller and port-ownership hand-off is not supported.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>N_CC_1</name>
                  <description>There are internal companion controller(s) and port-ownership hand-offs is supported.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PI</name>
              <description>Port Indicators (P INDICATOR) This bit indicates whether the ports support port indicator control</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>N_PTT</name>
              <description>Number of Ports per Transaction Translator (N_PTT)</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>N_TT</name>
              <description>Number of Transaction Translators (N_TT)</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HCCPARAMS</name>
          <description>Host Controller Capability Parameters</description>
          <addressOffset>0x108</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0x6</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ADC</name>
              <description>64-bit Addressing Capability This bit is set '0b' in all controller core, no 64-bit addressing capability is supported</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>PFL</name>
              <description>Programmable Frame List Flag If this bit is set to zero, then the system software must use a frame list length of 1024 elements with this host controller</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>ASP</name>
              <description>Asynchronous Schedule Park Capability If this bit is set to a one, then the host controller supports the park feature for high-speed queue heads in the Asynchronous Schedule</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>IST</name>
              <description>Isochronous Scheduling Threshold</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>EECP</name>
              <description>EHCI Extended Capabilities Pointer</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>DCIVERSION</name>
          <description>Device Controller Interface Version</description>
          <addressOffset>0x120</addressOffset>
          <size>16</size>
          <access>read-only</access>
          <resetValue>0x1</resetValue>
          <resetMask>0xFFFF</resetMask>
          <fields>
            <field>
              <name>DCIVERSION</name>
              <description>Device Controller Interface Version Number Default value is '01h', which means rev0.1.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>DCCPARAMS</name>
          <description>Device Controller Capability Parameters</description>
          <addressOffset>0x124</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0x188</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DEN</name>
              <description>Device Endpoint Number This field indicates the number of endpoints built into the device controller</description>
              <bitOffset>0</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>DC</name>
              <description>Device Capable When this bit is 1, this controller is capable of operating as a USB 2.0 device.</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>HC</name>
              <description>Host Capable When this bit is 1, this controller is capable of operating as an EHCI compatible USB 2</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>USBCMD</name>
          <description>USB Command Register</description>
          <addressOffset>0x140</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x80000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RS</name>
              <description>Run/Stop (RS) - Read/Write</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RST</name>
              <description>Controller Reset (RESET) - Read/Write</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>FS_1</name>
              <description>See description at bit 15</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PSE</name>
              <description>Periodic Schedule Enable- Read/Write</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PSE_0</name>
                  <description>Do not process the Periodic Schedule</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PSE_1</name>
                  <description>Use the PERIODICLISTBASE register to access the Periodic Schedule.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ASE</name>
              <description>Asynchronous Schedule Enable - Read/Write</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ASE_0</name>
                  <description>Do not process the Asynchronous Schedule.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ASE_1</name>
                  <description>Use the ASYNCLISTADDR register to access the Asynchronous Schedule.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>IAA</name>
              <description>Interrupt on Async Advance Doorbell - Read/Write</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ASP</name>
              <description>Asynchronous Schedule Park Mode Count - Read/Write</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ASPE</name>
              <description>Asynchronous Schedule Park Mode Enable - Read/Write</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ATDTW</name>
              <description>Add dTD TripWire - Read/Write</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SUTW</name>
              <description>Setup TripWire - Read/Write</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>FS_2</name>
              <description>See also bits 3-2 Frame List Size - (Read/Write or Read Only)</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>FS_2_0</name>
                  <description>1024 elements (4096 bytes) Default value</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FS_2_1</name>
                  <description>512 elements (2048 bytes)</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ITC</name>
              <description>Interrupt Threshold Control -Read/Write</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ITC_0</name>
                  <description>Immediate (no threshold)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ITC_1</name>
                  <description>1 micro-frame</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ITC_2</name>
                  <description>2 micro-frames</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ITC_4</name>
                  <description>4 micro-frames</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ITC_8</name>
                  <description>8 micro-frames</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ITC_16</name>
                  <description>16 micro-frames</description>
                  <value>0x10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ITC_32</name>
                  <description>32 micro-frames</description>
                  <value>0x20</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ITC_64</name>
                  <description>64 micro-frames</description>
                  <value>0x40</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>USBSTS</name>
          <description>USB Status Register</description>
          <addressOffset>0x144</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>UI</name>
              <description>USB Interrupt (USBINT) - R/WC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>UEI</name>
              <description>USB Error Interrupt (USBERRINT) - R/WC</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PCI</name>
              <description>Port Change Detect - R/WC</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>FRI</name>
              <description>Frame List Rollover - R/WC</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SEI</name>
              <description>System Error- R/WC</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>AAI</name>
              <description>Interrupt on Async Advance - R/WC</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>URI</name>
              <description>USB Reset Received - R/WC</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SRI</name>
              <description>SOF Received - R/WC</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SLI</name>
              <description>DCSuspend - R/WC</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ULPII</name>
              <description>ULPI Interrupt - R/WC</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>HCH</name>
              <description>HCHaIted - Read Only</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RCL</name>
              <description>Reclamation - Read Only</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PS</name>
              <description>Periodic Schedule Status - Read Only</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>AS</name>
              <description>Asynchronous Schedule Status - Read Only</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>NAKI</name>
              <description>NAK Interrupt Bit--RO</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>TI0</name>
              <description>General Purpose Timer Interrupt 0(GPTINT0)--R/WC</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TI1</name>
              <description>General Purpose Timer Interrupt 1(GPTINT1)--R/WC</description>
              <bitOffset>0x19</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>USBINTR</name>
          <description>Interrupt Enable Register</description>
          <addressOffset>0x148</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>UE</name>
              <description>USB Interrupt Enable When this bit is one and the UI bit in n_USBSTS register is a one the controller will issue an interrupt</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>UEE</name>
              <description>USB Error Interrupt Enable When this bit is one and the UEI bit in n_USBSTS register is a one the controller will issue an interrupt</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PCE</name>
              <description>Port Change Detect Interrupt Enable When this bit is one and the PCI bit in n_USBSTS register is a one the controller will issue an interrupt</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>FRE</name>
              <description>Frame List Rollover Interrupt Enable When this bit is one and the FRI bit in n_USBSTS register is a one the controller will issue an interrupt</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SEE</name>
              <description>System Error Interrupt Enable When this bit is one and the SEI bit in n_USBSTS register is a one the controller will issue an interrupt</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>AAE</name>
              <description>Async Advance Interrupt Enable When this bit is one and the AAI bit in n_USBSTS register is a one the controller will issue an interrupt</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>URE</name>
              <description>USB Reset Interrupt Enable When this bit is one and the URI bit in n_USBSTS register is a one the controller will issue an interrupt</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SRE</name>
              <description>SOF Received Interrupt Enable When this bit is one and the SRI bit in n_USBSTS register is a one the controller will issue an interrupt</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SLE</name>
              <description>Sleep Interrupt Enable When this bit is one and the SLI bit in n_n_USBSTS register is a one the controller will issue an interrupt</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ULPIE</name>
              <description>ULPI Interrupt Enable When this bit is one and the UPLII bit in n_USBSTS register is a one the controller will issue an interrupt</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>NAKE</name>
              <description>NAK Interrupt Enable When this bit is one and the NAKI bit in n_USBSTS register is a one the controller will issue an interrupt</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>UAIE</name>
              <description>USB Host Asynchronous Interrupt Enable When this bit is one, and the UAI bit in the n_USBSTS register is one, host controller will issue an interrupt at the next interrupt threshold</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>UPIE</name>
              <description>USB Host Periodic Interrupt Enable When this bit is one, and the UPI bit in the n_USBSTS register is one, host controller will issue an interrupt at the next interrupt threshold</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TIE0</name>
              <description>General Purpose Timer #0 Interrupt Enable When this bit is one and the TI0 bit in n_USBSTS register is a one the controller will issue an interrupt</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TIE1</name>
              <description>General Purpose Timer #1 Interrupt Enable When this bit is one and the TI1 bit in n_USBSTS register is a one the controller will issue an interrupt</description>
              <bitOffset>0x19</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>FRINDEX</name>
          <description>USB Frame Index</description>
          <addressOffset>0x14C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>FRINDEX</name>
              <description>Frame Index</description>
              <bitOffset>0</bitOffset>
              <bitWidth>14</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>FRINDEX_0</name>
                  <description>(1024) 12</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FRINDEX_1</name>
                  <description>(512) 11</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FRINDEX_2</name>
                  <description>(256) 10</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FRINDEX_3</name>
                  <description>(128) 9</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FRINDEX_4</name>
                  <description>(64) 8</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FRINDEX_5</name>
                  <description>(32) 7</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FRINDEX_6</name>
                  <description>(16) 6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FRINDEX_7</name>
                  <description>(8) 5</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>DEVICEADDR</name>
          <description>Device Address</description>
          <alternateGroup>DEVICEADDR_PERIODICLISTBASE</alternateGroup>
          <addressOffset>0x154</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>USBADRA</name>
              <description>Device Address Advance</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>USBADR</name>
              <description>Device Address. These bits correspond to the USB device address</description>
              <bitOffset>0x19</bitOffset>
              <bitWidth>7</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>PERIODICLISTBASE</name>
          <description>Frame List Base Address</description>
          <alternateGroup>DEVICEADDR_PERIODICLISTBASE</alternateGroup>
          <addressOffset>0x154</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BASEADR</name>
              <description>Base Address (Low)</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>20</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ASYNCLISTADDR</name>
          <description>Next Asynch. Address</description>
          <alternateGroup>ASYNCLISTADDR_ENDPTLISTADDR</alternateGroup>
          <addressOffset>0x158</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ASYBASE</name>
              <description>Link Pointer Low (LPL)</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>27</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ENDPTLISTADDR</name>
          <description>Endpoint List Address</description>
          <alternateGroup>ASYNCLISTADDR_ENDPTLISTADDR</alternateGroup>
          <addressOffset>0x158</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>EPBASE</name>
              <description>Endpoint List Pointer(Low)</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>21</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>BURSTSIZE</name>
          <description>Programmable Burst Size</description>
          <addressOffset>0x160</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x808</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RXPBURST</name>
              <description>Programmable RX Burst Size</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TXPBURST</name>
              <description>Programmable TX Burst Size</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>9</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>TXFILLTUNING</name>
          <description>TX FIFO Fill Tuning</description>
          <addressOffset>0x164</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0xA0000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TXSCHOH</name>
              <description>Scheduler Overhead</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TXSCHHEALTH</name>
              <description>Scheduler Health Counter</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TXFIFOTHRES</name>
              <description>FIFO Burst Threshold</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ENDPTNAK</name>
          <description>Endpoint NAK</description>
          <addressOffset>0x178</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>EPRN</name>
              <description>RX Endpoint NAK - R/WC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>EPTN</name>
              <description>TX Endpoint NAK - R/WC</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ENDPTNAKEN</name>
          <description>Endpoint NAK Enable</description>
          <addressOffset>0x17C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>EPRNE</name>
              <description>RX Endpoint NAK Enable - R/W</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>EPTNE</name>
              <description>TX Endpoint NAK Enable - R/W</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CONFIGFLAG</name>
          <description>Configure Flag Register</description>
          <addressOffset>0x180</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0x1</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>CF</name>
              <description>Configure Flag Host software sets this bit as the last action in its process of configuring the Host Controller</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CF_0</name>
                  <description>Port routing control logic default-routes each port to an implementation dependent classic host controller.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CF_1</name>
                  <description>Port routing control logic default-routes all ports to this host controller.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>PORTSC1</name>
          <description>Port Status &amp; Control</description>
          <addressOffset>0x184</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10000000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>CCS</name>
              <description>Current Connect Status-Read Only</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>CSC</name>
              <description>Connect Status Change-R/WC</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PE</name>
              <description>Port Enabled/Disabled-Read/Write</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PEC</name>
              <description>Port Enable/Disable Change-R/WC</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>OCA</name>
              <description>Over-current Active-Read Only</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>OCA_0</name>
                  <description>This port does not have an over-current condition.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>OCA_1</name>
                  <description>This port currently has an over-current condition</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>OCC</name>
              <description>Over-current Change-R/WC</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>FPR</name>
              <description>Force Port Resume -Read/Write</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SUSP</name>
              <description>Suspend - Read/Write or Read Only</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PR</name>
              <description>Port Reset - Read/Write or Read Only</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>HSP</name>
              <description>High-Speed Port - Read Only</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>LS</name>
              <description>Line Status-Read Only</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LS_0</name>
                  <description>SE0</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LS_1</name>
                  <description>K-state</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LS_2</name>
                  <description>J-state</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LS_3</name>
                  <description>Undefined</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PP</name>
              <description>Port Power (PP)-Read/Write or Read Only</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PO</name>
              <description>Port Owner-Read/Write</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PIC</name>
              <description>Port Indicator Control - Read/Write</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PIC_0</name>
                  <description>Port indicators are off</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PIC_1</name>
                  <description>Amber</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PIC_2</name>
                  <description>Green</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PIC_3</name>
                  <description>Undefined</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PTC</name>
              <description>Port Test Control - Read/Write</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PTC_0</name>
                  <description>TEST_MODE_DISABLE</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PTC_1</name>
                  <description>J_STATE</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PTC_2</name>
                  <description>K_STATE</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PTC_3</name>
                  <description>SE0 (host) / NAK (device)</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PTC_4</name>
                  <description>Packet</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PTC_5</name>
                  <description>FORCE_ENABLE_HS</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PTC_6</name>
                  <description>FORCE_ENABLE_FS</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PTC_7</name>
                  <description>FORCE_ENABLE_LS</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WKCN</name>
              <description>Wake on Connect Enable (WKCNNT_E) - Read/Write</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>WKDC</name>
              <description>Wake on Disconnect Enable (WKDSCNNT_E) - Read/Write</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>WKOC</name>
              <description>Wake on Over-current Enable (WKOC_E) - Read/Write</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PHCD</name>
              <description>PHY Low Power Suspend - Clock Disable (PLPSCD) - Read/Write</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PHCD_0</name>
                  <description>Enable PHY clock</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PHCD_1</name>
                  <description>Disable PHY clock</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PFSC</name>
              <description>Port Force Full Speed Connect - Read/Write</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PFSC_0</name>
                  <description>Normal operation</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PFSC_1</name>
                  <description>Forced to full speed</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PTS_2</name>
              <description>See description at bits 31-30</description>
              <bitOffset>0x19</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PSPD</name>
              <description>Port Speed - Read Only. This register field indicates the speed at which the port is operating.</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PSPD_0</name>
                  <description>Full Speed</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PSPD_1</name>
                  <description>Low Speed</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PSPD_2</name>
                  <description>High Speed</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PSPD_3</name>
                  <description>Undefined</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PTW</name>
              <description>Parallel Transceiver Width This bit has no effect if serial interface engine is used</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PTW_0</name>
                  <description>Select the 8-bit UTMI interface [60MHz]</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PTW_1</name>
                  <description>Select the 16-bit UTMI interface [30MHz]</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>STS</name>
              <description>Serial Transceiver Select 1 Serial Interface Engine is selected 0 Parallel Interface signals is selected Serial Interface Engine can be used in combination with UTMI+/ULPI physical interface to provide FS/LS signaling instead of the parallel interface signals</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PTS_1</name>
              <description>All USB port interface modes are listed in this field description, but not all are supported</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>OTGSC</name>
          <description>On-The-Go Status &amp; control</description>
          <addressOffset>0x1A4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x1120</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>VD</name>
              <description>VBUS_Discharge - Read/Write. Setting this bit causes VBus to discharge through a resistor.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>VC</name>
              <description>VBUS Charge - Read/Write</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>OT</name>
              <description>OTG Termination - Read/Write</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DP</name>
              <description>Data Pulsing - Read/Write</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>IDPU</name>
              <description>ID Pullup - Read/Write This bit provide control over the ID pull-up resistor; 0 = off, 1 = on [default]</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ID</name>
              <description>USB ID - Read Only. 0 = A device, 1 = B device</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>AVV</name>
              <description>A VBus Valid - Read Only. Indicates VBus is above the A VBus valid threshold.</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>ASV</name>
              <description>A Session Valid - Read Only. Indicates VBus is above the A session valid threshold.</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>BSV</name>
              <description>B Session Valid - Read Only. Indicates VBus is above the B session valid threshold.</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>BSE</name>
              <description>B Session End - Read Only. Indicates VBus is below the B session end threshold.</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>TOG_1MS</name>
              <description>1 millisecond timer toggle - Read Only. This bit toggles once per millisecond.</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>DPS</name>
              <description>Data Bus Pulsing Status - Read Only</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>IDIS</name>
              <description>USB ID Interrupt Status - Read/Write</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>AVVIS</name>
              <description>A VBus Valid Interrupt Status - Read/Write to Clear</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ASVIS</name>
              <description>A Session Valid Interrupt Status - Read/Write to Clear</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BSVIS</name>
              <description>B Session Valid Interrupt Status - Read/Write to Clear</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BSEIS</name>
              <description>B Session End Interrupt Status - Read/Write to Clear</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>STATUS_1MS</name>
              <description>1 millisecond timer Interrupt Status - Read/Write to Clear</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DPIS</name>
              <description>Data Pulse Interrupt Status - Read/Write to Clear</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>IDIE</name>
              <description>USB ID Interrupt Enable - Read/Write. Setting this bit enables the USB ID interrupt.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>AVVIE</name>
              <description>A VBus Valid Interrupt Enable - Read/Write. Setting this bit enables the A VBus valid interrupt.</description>
              <bitOffset>0x19</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ASVIE</name>
              <description>A Session Valid Interrupt Enable - Read/Write</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BSVIE</name>
              <description>B Session Valid Interrupt Enable - Read/Write</description>
              <bitOffset>0x1B</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BSEIE</name>
              <description>B Session End Interrupt Enable - Read/Write. Setting this bit enables the B session end interrupt.</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>EN_1MS</name>
              <description>1 millisecond timer Interrupt Enable - Read/Write</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DPIE</name>
              <description>Data Pulse Interrupt Enable</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>USBMODE</name>
          <description>USB Device Mode</description>
          <addressOffset>0x1A8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>CM</name>
              <description>Controller Mode - R/WO</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CM_0</name>
                  <description>Idle [Default for combination host/device]</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CM_2</name>
                  <description>Device Controller [Default for device only controller]</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CM_3</name>
                  <description>Host Controller [Default for host only controller]</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ES</name>
              <description>Endian Select - Read/Write</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ES_0</name>
                  <description>Little Endian [Default]</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ES_1</name>
                  <description>Big Endian</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SLOM</name>
              <description>Setup Lockout Mode</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SLOM_0</name>
                  <description>Setup Lockouts On (default);</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SLOM_1</name>
                  <description>Setup Lockouts Off (DCD requires use of Setup Data Buffer Tripwire in USBCMDUSB Command Register .</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SDIS</name>
              <description>Stream Disable Mode</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ENDPTSETUPSTAT</name>
          <description>Endpoint Setup Status</description>
          <addressOffset>0x1AC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ENDPTSETUPSTAT</name>
              <description>Setup Endpoint Status</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ENDPTPRIME</name>
          <description>Endpoint Prime</description>
          <addressOffset>0x1B0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>PERB</name>
              <description>Prime Endpoint Receive Buffer - R/WS</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PETB</name>
              <description>Prime Endpoint Transmit Buffer - R/WS</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ENDPTFLUSH</name>
          <description>Endpoint Flush</description>
          <addressOffset>0x1B4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>FERB</name>
              <description>Flush Endpoint Receive Buffer - R/WS</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>FETB</name>
              <description>Flush Endpoint Transmit Buffer - R/WS</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ENDPTSTAT</name>
          <description>Endpoint Status</description>
          <addressOffset>0x1B8</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ERBR</name>
              <description>Endpoint Receive Buffer Ready -- Read Only</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>ETBR</name>
              <description>Endpoint Transmit Buffer Ready -- Read Only</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ENDPTCOMPLETE</name>
          <description>Endpoint Complete</description>
          <addressOffset>0x1BC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ERCE</name>
              <description>Endpoint Receive Complete Event - RW/C</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ETCE</name>
              <description>Endpoint Transmit Complete Event - R/WC</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ENDPTCTRL0</name>
          <description>Endpoint Control0</description>
          <addressOffset>0x1C0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x800080</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RXS</name>
              <description>RX Endpoint Stall - Read/Write 0 End Point OK</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RXT</name>
              <description>RX Endpoint Type - Read/Write 00 Control Endpoint0 is fixed as a Control End Point.</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RXE</name>
              <description>RX Endpoint Enable 1 Enabled Endpoint0 is always enabled.</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TXS</name>
              <description>TX Endpoint Stall - Read/Write 0 End Point OK [Default] 1 End Point Stalled Software can write a one to this bit to force the endpoint to return a STALL handshake to the Host</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TXT</name>
              <description>TX Endpoint Type - Read/Write 00 - Control Endpoint0 is fixed as a Control End Point.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TXE</name>
              <description>TX Endpoint Enable 1 Enabled Endpoint0 is always enabled.</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ENDPTCTRL1</name>
          <description>Endpoint Control 1</description>
          <addressOffset>0x1C4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RXS</name>
              <description>RX Endpoint Stall - Read/Write 0 End Point OK</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RXD</name>
              <description>RX Endpoint Data Sink - Read/Write 0 Dual Port Memory Buffer/DMA Engine [Default] Should always be written as zero</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RXT</name>
              <description>RX Endpoint Type - Read/Write 00 Control 01 Isochronous 10 Bulk 11 Interrupt</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RXI</name>
              <description>RX Data Toggle Inhibit 0 Disabled [Default] 1 Enabled This bit is only used for test and should always be written as zero</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RXR</name>
              <description>RX Data Toggle Reset (WS) Write 1 - Reset PID Sequence Whenever a configuration event is received for this Endpoint, software must write a one to this bit in order to synchronize the data PID's between the host and device</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RXE</name>
              <description>RX Endpoint Enable 0 Disabled [Default] 1 Enabled An Endpoint should be enabled only after it has been configured</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TXS</name>
              <description>TX Endpoint Stall - Read/Write 0 End Point OK 1 End Point Stalled This bit will be cleared automatically upon receipt of a SETUP request if this Endpoint is configured as a Control Endpoint and this bit will continue to be cleared by hardware until the associated ENDPTSETUPSTAT bit is cleared</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TXD</name>
              <description>TX Endpoint Data Source - Read/Write 0 Dual Port Memory Buffer/DMA Engine [DEFAULT] Should always be written as 0</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TXT</name>
              <description>TX Endpoint Type - Read/Write 00 Control 01 Isochronous 10 Bulk 11 Interrupt</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TXI</name>
              <description>TX Data Toggle Inhibit 0 PID Sequencing Enabled</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TXR</name>
              <description>TX Data Toggle Reset (WS) Write 1 - Reset PID Sequence Whenever a configuration event is received for this Endpoint, software must write a one to this bit in order to synchronize the data PID's between the Host and device</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TXE</name>
              <description>TX Endpoint Enable 0 Disabled [Default] 1 Enabled An Endpoint should be enabled only after it has been configured</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ENDPTCTRL2</name>
          <description>Endpoint Control 2</description>
          <addressOffset>0x1C8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RXS</name>
              <description>RX Endpoint Stall - Read/Write 0 End Point OK</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RXD</name>
              <description>RX Endpoint Data Sink - Read/Write 0 Dual Port Memory Buffer/DMA Engine [Default] Should always be written as zero</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RXT</name>
              <description>RX Endpoint Type - Read/Write 00 Control 01 Isochronous 10 Bulk 11 Interrupt</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RXI</name>
              <description>RX Data Toggle Inhibit 0 Disabled [Default] 1 Enabled This bit is only used for test and should always be written as zero</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RXR</name>
              <description>RX Data Toggle Reset (WS) Write 1 - Reset PID Sequence Whenever a configuration event is received for this Endpoint, software must write a one to this bit in order to synchronize the data PID's between the host and device</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RXE</name>
              <description>RX Endpoint Enable 0 Disabled [Default] 1 Enabled An Endpoint should be enabled only after it has been configured</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TXS</name>
              <description>TX Endpoint Stall - Read/Write 0 End Point OK 1 End Point Stalled This bit will be cleared automatically upon receipt of a SETUP request if this Endpoint is configured as a Control Endpoint and this bit will continue to be cleared by hardware until the associated ENDPTSETUPSTAT bit is cleared</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TXD</name>
              <description>TX Endpoint Data Source - Read/Write 0 Dual Port Memory Buffer/DMA Engine [DEFAULT] Should always be written as 0</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TXT</name>
              <description>TX Endpoint Type - Read/Write 00 Control 01 Isochronous 10 Bulk 11 Interrupt</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TXI</name>
              <description>TX Data Toggle Inhibit 0 PID Sequencing Enabled</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TXR</name>
              <description>TX Data Toggle Reset (WS) Write 1 - Reset PID Sequence Whenever a configuration event is received for this Endpoint, software must write a one to this bit in order to synchronize the data PID's between the Host and device</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TXE</name>
              <description>TX Endpoint Enable 0 Disabled [Default] 1 Enabled An Endpoint should be enabled only after it has been configured</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ENDPTCTRL3</name>
          <description>Endpoint Control 3</description>
          <addressOffset>0x1CC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RXS</name>
              <description>RX Endpoint Stall - Read/Write 0 End Point OK</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RXD</name>
              <description>RX Endpoint Data Sink - Read/Write 0 Dual Port Memory Buffer/DMA Engine [Default] Should always be written as zero</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RXT</name>
              <description>RX Endpoint Type - Read/Write 00 Control 01 Isochronous 10 Bulk 11 Interrupt</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RXI</name>
              <description>RX Data Toggle Inhibit 0 Disabled [Default] 1 Enabled This bit is only used for test and should always be written as zero</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RXR</name>
              <description>RX Data Toggle Reset (WS) Write 1 - Reset PID Sequence Whenever a configuration event is received for this Endpoint, software must write a one to this bit in order to synchronize the data PID's between the host and device</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RXE</name>
              <description>RX Endpoint Enable 0 Disabled [Default] 1 Enabled An Endpoint should be enabled only after it has been configured</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TXS</name>
              <description>TX Endpoint Stall - Read/Write 0 End Point OK 1 End Point Stalled This bit will be cleared automatically upon receipt of a SETUP request if this Endpoint is configured as a Control Endpoint and this bit will continue to be cleared by hardware until the associated ENDPTSETUPSTAT bit is cleared</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TXD</name>
              <description>TX Endpoint Data Source - Read/Write 0 Dual Port Memory Buffer/DMA Engine [DEFAULT] Should always be written as 0</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TXT</name>
              <description>TX Endpoint Type - Read/Write 00 Control 01 Isochronous 10 Bulk 11 Interrupt</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TXI</name>
              <description>TX Data Toggle Inhibit 0 PID Sequencing Enabled</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TXR</name>
              <description>TX Data Toggle Reset (WS) Write 1 - Reset PID Sequence Whenever a configuration event is received for this Endpoint, software must write a one to this bit in order to synchronize the data PID's between the Host and device</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TXE</name>
              <description>TX Endpoint Enable 0 Disabled [Default] 1 Enabled An Endpoint should be enabled only after it has been configured</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ENDPTCTRL4</name>
          <description>Endpoint Control 4</description>
          <addressOffset>0x1D0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RXS</name>
              <description>RX Endpoint Stall - Read/Write 0 End Point OK</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RXD</name>
              <description>RX Endpoint Data Sink - Read/Write 0 Dual Port Memory Buffer/DMA Engine [Default] Should always be written as zero</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RXT</name>
              <description>RX Endpoint Type - Read/Write 00 Control 01 Isochronous 10 Bulk 11 Interrupt</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RXI</name>
              <description>RX Data Toggle Inhibit 0 Disabled [Default] 1 Enabled This bit is only used for test and should always be written as zero</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RXR</name>
              <description>RX Data Toggle Reset (WS) Write 1 - Reset PID Sequence Whenever a configuration event is received for this Endpoint, software must write a one to this bit in order to synchronize the data PID's between the host and device</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RXE</name>
              <description>RX Endpoint Enable 0 Disabled [Default] 1 Enabled An Endpoint should be enabled only after it has been configured</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TXS</name>
              <description>TX Endpoint Stall - Read/Write 0 End Point OK 1 End Point Stalled This bit will be cleared automatically upon receipt of a SETUP request if this Endpoint is configured as a Control Endpoint and this bit will continue to be cleared by hardware until the associated ENDPTSETUPSTAT bit is cleared</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TXD</name>
              <description>TX Endpoint Data Source - Read/Write 0 Dual Port Memory Buffer/DMA Engine [DEFAULT] Should always be written as 0</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TXT</name>
              <description>TX Endpoint Type - Read/Write 00 Control 01 Isochronous 10 Bulk 11 Interrupt</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TXI</name>
              <description>TX Data Toggle Inhibit 0 PID Sequencing Enabled</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TXR</name>
              <description>TX Data Toggle Reset (WS) Write 1 - Reset PID Sequence Whenever a configuration event is received for this Endpoint, software must write a one to this bit in order to synchronize the data PID's between the Host and device</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TXE</name>
              <description>TX Endpoint Enable 0 Disabled [Default] 1 Enabled An Endpoint should be enabled only after it has been configured</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ENDPTCTRL5</name>
          <description>Endpoint Control 5</description>
          <addressOffset>0x1D4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RXS</name>
              <description>RX Endpoint Stall - Read/Write 0 End Point OK</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RXD</name>
              <description>RX Endpoint Data Sink - Read/Write 0 Dual Port Memory Buffer/DMA Engine [Default] Should always be written as zero</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RXT</name>
              <description>RX Endpoint Type - Read/Write 00 Control 01 Isochronous 10 Bulk 11 Interrupt</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RXI</name>
              <description>RX Data Toggle Inhibit 0 Disabled [Default] 1 Enabled This bit is only used for test and should always be written as zero</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RXR</name>
              <description>RX Data Toggle Reset (WS) Write 1 - Reset PID Sequence Whenever a configuration event is received for this Endpoint, software must write a one to this bit in order to synchronize the data PID's between the host and device</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RXE</name>
              <description>RX Endpoint Enable 0 Disabled [Default] 1 Enabled An Endpoint should be enabled only after it has been configured</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TXS</name>
              <description>TX Endpoint Stall - Read/Write 0 End Point OK 1 End Point Stalled This bit will be cleared automatically upon receipt of a SETUP request if this Endpoint is configured as a Control Endpoint and this bit will continue to be cleared by hardware until the associated ENDPTSETUPSTAT bit is cleared</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TXD</name>
              <description>TX Endpoint Data Source - Read/Write 0 Dual Port Memory Buffer/DMA Engine [DEFAULT] Should always be written as 0</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TXT</name>
              <description>TX Endpoint Type - Read/Write 00 Control 01 Isochronous 10 Bulk 11 Interrupt</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TXI</name>
              <description>TX Data Toggle Inhibit 0 PID Sequencing Enabled</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TXR</name>
              <description>TX Data Toggle Reset (WS) Write 1 - Reset PID Sequence Whenever a configuration event is received for this Endpoint, software must write a one to this bit in order to synchronize the data PID's between the Host and device</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TXE</name>
              <description>TX Endpoint Enable 0 Disabled [Default] 1 Enabled An Endpoint should be enabled only after it has been configured</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ENDPTCTRL6</name>
          <description>Endpoint Control 6</description>
          <addressOffset>0x1D8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RXS</name>
              <description>RX Endpoint Stall - Read/Write 0 End Point OK</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RXD</name>
              <description>RX Endpoint Data Sink - Read/Write 0 Dual Port Memory Buffer/DMA Engine [Default] Should always be written as zero</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RXT</name>
              <description>RX Endpoint Type - Read/Write 00 Control 01 Isochronous 10 Bulk 11 Interrupt</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RXI</name>
              <description>RX Data Toggle Inhibit 0 Disabled [Default] 1 Enabled This bit is only used for test and should always be written as zero</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RXR</name>
              <description>RX Data Toggle Reset (WS) Write 1 - Reset PID Sequence Whenever a configuration event is received for this Endpoint, software must write a one to this bit in order to synchronize the data PID's between the host and device</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RXE</name>
              <description>RX Endpoint Enable 0 Disabled [Default] 1 Enabled An Endpoint should be enabled only after it has been configured</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TXS</name>
              <description>TX Endpoint Stall - Read/Write 0 End Point OK 1 End Point Stalled This bit will be cleared automatically upon receipt of a SETUP request if this Endpoint is configured as a Control Endpoint and this bit will continue to be cleared by hardware until the associated ENDPTSETUPSTAT bit is cleared</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TXD</name>
              <description>TX Endpoint Data Source - Read/Write 0 Dual Port Memory Buffer/DMA Engine [DEFAULT] Should always be written as 0</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TXT</name>
              <description>TX Endpoint Type - Read/Write 00 Control 01 Isochronous 10 Bulk 11 Interrupt</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TXI</name>
              <description>TX Data Toggle Inhibit 0 PID Sequencing Enabled</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TXR</name>
              <description>TX Data Toggle Reset (WS) Write 1 - Reset PID Sequence Whenever a configuration event is received for this Endpoint, software must write a one to this bit in order to synchronize the data PID's between the Host and device</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TXE</name>
              <description>TX Endpoint Enable 0 Disabled [Default] 1 Enabled An Endpoint should be enabled only after it has been configured</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ENDPTCTRL7</name>
          <description>Endpoint Control 7</description>
          <addressOffset>0x1DC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RXS</name>
              <description>RX Endpoint Stall - Read/Write 0 End Point OK</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RXD</name>
              <description>RX Endpoint Data Sink - Read/Write 0 Dual Port Memory Buffer/DMA Engine [Default] Should always be written as zero</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RXT</name>
              <description>RX Endpoint Type - Read/Write 00 Control 01 Isochronous 10 Bulk 11 Interrupt</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RXI</name>
              <description>RX Data Toggle Inhibit 0 Disabled [Default] 1 Enabled This bit is only used for test and should always be written as zero</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RXR</name>
              <description>RX Data Toggle Reset (WS) Write 1 - Reset PID Sequence Whenever a configuration event is received for this Endpoint, software must write a one to this bit in order to synchronize the data PID's between the host and device</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RXE</name>
              <description>RX Endpoint Enable 0 Disabled [Default] 1 Enabled An Endpoint should be enabled only after it has been configured</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TXS</name>
              <description>TX Endpoint Stall - Read/Write 0 End Point OK 1 End Point Stalled This bit will be cleared automatically upon receipt of a SETUP request if this Endpoint is configured as a Control Endpoint and this bit will continue to be cleared by hardware until the associated ENDPTSETUPSTAT bit is cleared</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TXD</name>
              <description>TX Endpoint Data Source - Read/Write 0 Dual Port Memory Buffer/DMA Engine [DEFAULT] Should always be written as 0</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TXT</name>
              <description>TX Endpoint Type - Read/Write 00 Control 01 Isochronous 10 Bulk 11 Interrupt</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TXI</name>
              <description>TX Data Toggle Inhibit 0 PID Sequencing Enabled</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TXR</name>
              <description>TX Data Toggle Reset (WS) Write 1 - Reset PID Sequence Whenever a configuration event is received for this Endpoint, software must write a one to this bit in order to synchronize the data PID's between the Host and device</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TXE</name>
              <description>TX Endpoint Enable 0 Disabled [Default] 1 Enabled An Endpoint should be enabled only after it has been configured</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
      </registers>
    </peripheral>
    <peripheral derivedFrom="USB1">
      <name>USB2</name>
      <description>USB</description>
      <groupName>USB</groupName>
      <prependToName>USB2_</prependToName>
      <baseAddress>0x2184200</baseAddress>
      <addressBlock>
        <offset>0</offset>
        <size>0x1E0</size>
        <usage>registers</usage>
      </addressBlock>
      <interrupt>
        <name>USB_OTG2</name>
        <value>74</value>
      </interrupt>
    </peripheral>
    <peripheral>
      <name>USBNC1</name>
      <description>USB</description>
      <groupName>USBNC</groupName>
      <prependToName>USBNC1_</prependToName>
      <baseAddress>0x2184800</baseAddress>
      <headerStructName>USBNC</headerStructName>
      <addressBlock>
        <offset>0</offset>
        <size>0x1C</size>
        <usage>registers</usage>
      </addressBlock>
      <registers>
        <register>
          <name>USB_OTGn_CTRL</name>
          <description>USB OTGn Control Register</description>
          <addressOffset>0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x30001000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>OVER_CUR_DIS</name>
              <description>Disable OTGn Overcurrent Detection</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>OVER_CUR_DIS_0</name>
                  <description>Enables overcurrent detection</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>OVER_CUR_DIS_1</name>
                  <description>Disables overcurrent detection</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>OVER_CUR_POL</name>
              <description>OTGn Polarity of Overcurrent The polarity of OTGn port overcurrent event</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>OVER_CUR_POL_0</name>
                  <description>High active (high on this signal represents an overcurrent condition)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>OVER_CUR_POL_1</name>
                  <description>Low active (low on this signal represents an overcurrent condition)</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PWR_POL</name>
              <description>OTGn Power Polarity This bit should be set according to PMIC Power Pin polarity.</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PWR_POL_0</name>
                  <description>PMIC Power Pin is Low active.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PWR_POL_1</name>
                  <description>PMIC Power Pin is High active.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WIE</name>
              <description>OTGn Wake-up Interrupt Enable This bit enables or disables the OTGn wake-up interrupt</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>WIE_0</name>
                  <description>Interrupt Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WIE_1</name>
                  <description>Interrupt Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WKUP_SW_EN</name>
              <description>OTGn Software Wake-up Enable</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>WKUP_SW_EN_0</name>
                  <description>Disable</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WKUP_SW_EN_1</name>
                  <description>Enable</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WKUP_SW</name>
              <description>OTGn Software Wake-up</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>WKUP_SW_0</name>
                  <description>Inactive</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WKUP_SW_1</name>
                  <description>Force wake-up</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WKUP_ID_EN</name>
              <description>OTGn Wake-up on ID change enable</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>WKUP_ID_EN_0</name>
                  <description>Disable</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WKUP_ID_EN_1</name>
                  <description>Enable</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WKUP_VBUS_EN</name>
              <description>OTGn wake-up on VBUS change enable</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>WKUP_VBUS_EN_0</name>
                  <description>Disable</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WKUP_VBUS_EN_1</name>
                  <description>Enable</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WIR</name>
              <description>OTGn Wake-up Interrupt Request This bit indicates that a wake-up interrupt request is received on the OTGn port</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>WIR_0</name>
                  <description>No wake-up interrupt request received</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WIR_1</name>
                  <description>Wake-up Interrupt Request received</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>USB_OTGn_PHY_CTRL_0</name>
          <description>OTGn UTMI PHY Control 0 Register</description>
          <addressOffset>0x18</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x80000000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>UTMI_CLK_VLD</name>
              <description>Indicating whether OTGn UTMI PHY clock is valid</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>UTMI_CLK_VLD_0</name>
                  <description>Invalid</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>UTMI_CLK_VLD_1</name>
                  <description>Valid</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
      </registers>
    </peripheral>
    <peripheral derivedFrom="USBNC1">
      <name>USBNC2</name>
      <description>USB</description>
      <groupName>USBNC</groupName>
      <prependToName>USBNC2_</prependToName>
      <baseAddress>0x2184804</baseAddress>
      <addressBlock>
        <offset>0</offset>
        <size>0x1C</size>
        <usage>registers</usage>
      </addressBlock>
    </peripheral>
    <peripheral>
      <name>ENET1</name>
      <description>Ethernet MAC-NET Core</description>
      <groupName>ENET</groupName>
      <prependToName>ENET1_</prependToName>
      <baseAddress>0x2188000</baseAddress>
      <headerStructName>ENET</headerStructName>
      <addressBlock>
        <offset>0</offset>
        <size>0x628</size>
        <usage>registers</usage>
      </addressBlock>
      <interrupt>
        <name>ENET1</name>
        <value>150</value>
      </interrupt>
      <registers>
        <register>
          <name>EIR</name>
          <description>Interrupt Event Register</description>
          <addressOffset>0x4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TS_TIMER</name>
              <description>Timestamp Timer</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
            </field>
            <field>
              <name>TS_AVAIL</name>
              <description>Transmit Timestamp Available</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
            </field>
            <field>
              <name>WAKEUP</name>
              <description>Node Wakeup Request Indication</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
            </field>
            <field>
              <name>PLR</name>
              <description>Payload Receive Error</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
            </field>
            <field>
              <name>UN</name>
              <description>Transmit FIFO Underrun</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
            </field>
            <field>
              <name>RL</name>
              <description>Collision Retry Limit</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
            </field>
            <field>
              <name>LC</name>
              <description>Late Collision</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
            </field>
            <field>
              <name>EBERR</name>
              <description>Ethernet Bus Error</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
            </field>
            <field>
              <name>MII</name>
              <description>MII Interrupt.</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
            </field>
            <field>
              <name>RXB</name>
              <description>Receive Buffer Interrupt</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
            </field>
            <field>
              <name>RXF</name>
              <description>Receive Frame Interrupt</description>
              <bitOffset>0x19</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
            </field>
            <field>
              <name>TXB</name>
              <description>Transmit Buffer Interrupt</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
            </field>
            <field>
              <name>TXF</name>
              <description>Transmit Frame Interrupt</description>
              <bitOffset>0x1B</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
            </field>
            <field>
              <name>GRA</name>
              <description>Graceful Stop Complete</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
            </field>
            <field>
              <name>BABT</name>
              <description>Babbling Transmit Error</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
            </field>
            <field>
              <name>BABR</name>
              <description>Babbling Receive Error</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
            </field>
          </fields>
        </register>
        <register>
          <name>EIMR</name>
          <description>Interrupt Mask Register</description>
          <addressOffset>0x8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TS_TIMER</name>
              <description>TS_TIMER Interrupt Mask</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TS_AVAIL</name>
              <description>TS_AVAIL Interrupt Mask</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>WAKEUP</name>
              <description>WAKEUP Interrupt Mask</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PLR</name>
              <description>PLR Interrupt Mask</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>UN</name>
              <description>UN Interrupt Mask</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RL</name>
              <description>RL Interrupt Mask</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>LC</name>
              <description>LC Interrupt Mask</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>EBERR</name>
              <description>EBERR Interrupt Mask</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>MII</name>
              <description>MII Interrupt Mask</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RXB</name>
              <description>RXB Interrupt Mask</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RXF</name>
              <description>RXF Interrupt Mask</description>
              <bitOffset>0x19</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TXB</name>
              <description>TXB Interrupt Mask</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TXB_0</name>
                  <description>The corresponding interrupt source is masked.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TXB_1</name>
                  <description>The corresponding interrupt source is not masked.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TXF</name>
              <description>TXF Interrupt Mask</description>
              <bitOffset>0x1B</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TXF_0</name>
                  <description>The corresponding interrupt source is masked.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TXF_1</name>
                  <description>The corresponding interrupt source is not masked.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>GRA</name>
              <description>GRA Interrupt Mask</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>GRA_0</name>
                  <description>The corresponding interrupt source is masked.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>GRA_1</name>
                  <description>The corresponding interrupt source is not masked.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BABT</name>
              <description>BABT Interrupt Mask</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>BABT_0</name>
                  <description>The corresponding interrupt source is masked.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BABT_1</name>
                  <description>The corresponding interrupt source is not masked.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BABR</name>
              <description>BABR Interrupt Mask</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>BABR_0</name>
                  <description>The corresponding interrupt source is masked.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BABR_1</name>
                  <description>The corresponding interrupt source is not masked.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>RDAR</name>
          <description>Receive Descriptor Active Register</description>
          <addressOffset>0x10</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RDAR</name>
              <description>Receive Descriptor Active</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>TDAR</name>
          <description>Transmit Descriptor Active Register</description>
          <addressOffset>0x14</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TDAR</name>
              <description>Transmit Descriptor Active</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ECR</name>
          <description>Ethernet Control Register</description>
          <addressOffset>0x24</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x70000000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RESET</name>
              <description>Ethernet MAC Reset</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ETHEREN</name>
              <description>Ethernet Enable</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ETHEREN_0</name>
                  <description>Reception immediately stops and transmission stops after a bad CRC is appended to any currently transmitted frame.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ETHEREN_1</name>
                  <description>MAC is enabled, and reception and transmission are possible.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>MAGICEN</name>
              <description>Magic Packet Detection Enable</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>MAGICEN_0</name>
                  <description>Magic detection logic disabled.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MAGICEN_1</name>
                  <description>The MAC core detects magic packets and asserts EIR[WAKEUP] when a frame is detected.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SLEEP</name>
              <description>Sleep Mode Enable</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SLEEP_0</name>
                  <description>Normal operating mode.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SLEEP_1</name>
                  <description>Sleep mode.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>EN1588</name>
              <description>EN1588 Enable</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>EN1588_0</name>
                  <description>Legacy FEC buffer descriptors and functions enabled.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>EN1588_1</name>
                  <description>Enhanced frame time-stamping functions enabled.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DBGEN</name>
              <description>Debug Enable</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DBGEN_0</name>
                  <description>MAC continues operation in debug mode.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DBGEN_1</name>
                  <description>MAC enters hardware freeze mode when the processor is in debug mode.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DBSWP</name>
              <description>Descriptor Byte Swapping Enable</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DBSWP_0</name>
                  <description>The buffer descriptor bytes are not swapped to support big-endian devices.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DBSWP_1</name>
                  <description>The buffer descriptor bytes are swapped to support little-endian devices.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>MMFR</name>
          <description>MII Management Frame Register</description>
          <addressOffset>0x40</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA</name>
              <description>Management Frame Data</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TA</name>
              <description>Turn Around</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RA</name>
              <description>Register Address</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PA</name>
              <description>PHY Address</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>OP</name>
              <description>Operation Code</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ST</name>
              <description>Start Of Frame Delimiter</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>MSCR</name>
          <description>MII Speed Control Register</description>
          <addressOffset>0x44</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MII_SPEED</name>
              <description>MII Speed</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DIS_PRE</name>
              <description>Disable Preamble</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DIS_PRE_0</name>
                  <description>Preamble enabled.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DIS_PRE_1</name>
                  <description>Preamble (32 ones) is not prepended to the MII management frame.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HOLDTIME</name>
              <description>Hold time On MDIO Output</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HOLDTIME_0</name>
                  <description>1 internal module clock cycle</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HOLDTIME_1</name>
                  <description>2 internal module clock cycles</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HOLDTIME_2</name>
                  <description>3 internal module clock cycles</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HOLDTIME_7</name>
                  <description>8 internal module clock cycles</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>MIBC</name>
          <description>MIB Control Register</description>
          <addressOffset>0x64</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0xC0000000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MIB_CLEAR</name>
              <description>MIB Clear</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>MIB_CLEAR_0</name>
                  <description>See note above.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MIB_CLEAR_1</name>
                  <description>All statistics counters are reset to 0.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>MIB_IDLE</name>
              <description>MIB Idle</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>MIB_IDLE_0</name>
                  <description>The MIB block is updating MIB counters.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MIB_IDLE_1</name>
                  <description>The MIB block is not currently updating any MIB counters.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>MIB_DIS</name>
              <description>Disable MIB Logic</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>MIB_DIS_0</name>
                  <description>MIB logic is enabled.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MIB_DIS_1</name>
                  <description>MIB logic is disabled. The MIB logic halts and does not update any MIB counters.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>RCR</name>
          <description>Receive Control Register</description>
          <addressOffset>0x84</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5EE0001</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>LOOP</name>
              <description>Internal Loopback</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LOOP_0</name>
                  <description>Loopback disabled.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LOOP_1</name>
                  <description>Transmitted frames are looped back internal to the device and transmit MII output signals are not asserted. DRT must be cleared.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DRT</name>
              <description>Disable Receive On Transmit</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DRT_0</name>
                  <description>Receive path operates independently of transmit (i.e., full-duplex mode). Can also be used to monitor transmit activity in half-duplex mode.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DRT_1</name>
                  <description>Disable reception of frames while transmitting. (Normally used for half-duplex mode.)</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>MII_MODE</name>
              <description>Media Independent Interface Mode</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>MII_MODE_1</name>
                  <description>MII or RMII mode, as indicated by the RMII_MODE field.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PROM</name>
              <description>Promiscuous Mode</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PROM_0</name>
                  <description>Disabled.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PROM_1</name>
                  <description>Enabled.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BC_REJ</name>
              <description>Broadcast Frame Reject</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>FCE</name>
              <description>Flow Control Enable</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RMII_MODE</name>
              <description>RMII Mode Enable</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RMII_MODE_0</name>
                  <description>MAC configured for MII mode.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RMII_MODE_1</name>
                  <description>MAC configured for RMII operation.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RMII_10T</name>
              <description>Enables 10-Mbit/s mode of the RMII .</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RMII_10T_0</name>
                  <description>100-Mbit/s operation.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RMII_10T_1</name>
                  <description>10-Mbit/s operation.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PADEN</name>
              <description>Enable Frame Padding Remove On Receive</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PADEN_0</name>
                  <description>No padding is removed on receive by the MAC.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PADEN_1</name>
                  <description>Padding is removed from received frames.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PAUFWD</name>
              <description>Terminate/Forward Pause Frames</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PAUFWD_0</name>
                  <description>Pause frames are terminated and discarded in the MAC.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PAUFWD_1</name>
                  <description>Pause frames are forwarded to the user application.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CRCFWD</name>
              <description>Terminate/Forward Received CRC</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CRCFWD_0</name>
                  <description>The CRC field of received frames is transmitted to the user application.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CRCFWD_1</name>
                  <description>The CRC field is stripped from the frame.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CFEN</name>
              <description>MAC Control Frame Enable</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CFEN_0</name>
                  <description>MAC control frames with any opcode other than 0x0001 (pause frame) are accepted and forwarded to the client interface.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CFEN_1</name>
                  <description>MAC control frames with any opcode other than 0x0001 (pause frame) are silently discarded.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>MAX_FL</name>
              <description>Maximum Frame Length</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>14</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>NLC</name>
              <description>Payload Length Check Disable</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NLC_0</name>
                  <description>The payload length check is disabled.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NLC_1</name>
                  <description>The core checks the frame's payload length with the frame length/type field. Errors are indicated in the EIR[PLC] field.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>GRS</name>
              <description>Graceful Receive Stopped</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>TCR</name>
          <description>Transmit Control Register</description>
          <addressOffset>0xC4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>GTS</name>
              <description>Graceful Transmit Stop</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>FDEN</name>
              <description>Full-Duplex Enable</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TFC_PAUSE</name>
              <description>Transmit Frame Control Pause</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TFC_PAUSE_0</name>
                  <description>No PAUSE frame transmitted.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TFC_PAUSE_1</name>
                  <description>The MAC stops transmission of data frames after the current transmission is complete.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RFC_PAUSE</name>
              <description>Receive Frame Control Pause</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>ADDSEL</name>
              <description>Source MAC Address Select On Transmit</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ADDSEL_0</name>
                  <description>Node MAC address programmed on PADDR1/2 registers.</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ADDINS</name>
              <description>Set MAC Address On Transmit</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ADDINS_0</name>
                  <description>The source MAC address is not modified by the MAC.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ADDINS_1</name>
                  <description>The MAC overwrites the source MAC address with the programmed MAC address according to ADDSEL.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CRCFWD</name>
              <description>Forward Frame From Application With CRC</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CRCFWD_0</name>
                  <description>TxBD[TC] controls whether the frame has a CRC from the application.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CRCFWD_1</name>
                  <description>The transmitter does not append any CRC to transmitted frames, as it is expecting a frame with CRC from the application.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>PALR</name>
          <description>Physical Address Lower Register</description>
          <addressOffset>0xE4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>PADDR1</name>
              <description>Pause Address</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>PAUR</name>
          <description>Physical Address Upper Register</description>
          <addressOffset>0xE8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x8808</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TYPE</name>
              <description>Type Field In PAUSE Frames</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>PADDR2</name>
              <description>Bytes 4 (bits 31:24) and 5 (bits 23:16) of the 6-byte individual address used for exact match, and the source address field in PAUSE frames</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>OPD</name>
          <description>Opcode/Pause Duration Register</description>
          <addressOffset>0xEC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>PAUSE_DUR</name>
              <description>Pause Duration</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>OPCODE</name>
              <description>Opcode Field In PAUSE Frames</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>TXIC</name>
          <description>Transmit Interrupt Coalescing Register</description>
          <addressOffset>0xF0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ICTT</name>
              <description>Interrupt coalescing timer threshold</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ICFT</name>
              <description>Interrupt coalescing frame count threshold</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ICCS</name>
              <description>Interrupt Coalescing Timer Clock Source Select</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ICCS_0</name>
                  <description>Use MII/GMII TX clocks.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ICCS_1</name>
                  <description>Use ENET system clock.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ICEN</name>
              <description>Interrupt Coalescing Enable</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ICEN_0</name>
                  <description>Disable Interrupt coalescing.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ICEN_1</name>
                  <description>Enable Interrupt coalescing.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>RXIC</name>
          <description>Receive Interrupt Coalescing Register</description>
          <addressOffset>0x100</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ICTT</name>
              <description>Interrupt coalescing timer threshold</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ICFT</name>
              <description>Interrupt coalescing frame count threshold</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ICCS</name>
              <description>Interrupt Coalescing Timer Clock Source Select</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ICCS_0</name>
                  <description>Use MII/GMII TX clocks.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ICCS_1</name>
                  <description>Use ENET system clock.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ICEN</name>
              <description>Interrupt Coalescing Enable</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ICEN_0</name>
                  <description>Disable Interrupt coalescing.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ICEN_1</name>
                  <description>Enable Interrupt coalescing.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>IAUR</name>
          <description>Descriptor Individual Upper Address Register</description>
          <addressOffset>0x118</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>IADDR1</name>
              <description>Contains the upper 32 bits of the 64-bit hash table used in the address recognition process for receive frames with a unicast address</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>IALR</name>
          <description>Descriptor Individual Lower Address Register</description>
          <addressOffset>0x11C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>IADDR2</name>
              <description>Contains the lower 32 bits of the 64-bit hash table used in the address recognition process for receive frames with a unicast address</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>GAUR</name>
          <description>Descriptor Group Upper Address Register</description>
          <addressOffset>0x120</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>GADDR1</name>
              <description>Contains the upper 32 bits of the 64-bit hash table used in the address recognition process for receive frames with a multicast address</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>GALR</name>
          <description>Descriptor Group Lower Address Register</description>
          <addressOffset>0x124</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>GADDR2</name>
              <description>Contains the lower 32 bits of the 64-bit hash table used in the address recognition process for receive frames with a multicast address</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>TFWR</name>
          <description>Transmit FIFO Watermark Register</description>
          <addressOffset>0x144</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TFWR</name>
              <description>Transmit FIFO Write</description>
              <bitOffset>0</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TFWR_0</name>
                  <description>64 bytes written.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TFWR_1</name>
                  <description>64 bytes written.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TFWR_2</name>
                  <description>128 bytes written.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TFWR_3</name>
                  <description>192 bytes written.</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TFWR_31</name>
                  <description>1984 bytes written.</description>
                  <value>0x1F</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>STRFWD</name>
              <description>Store And Forward Enable</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>STRFWD_0</name>
                  <description>Reset. The transmission start threshold is programmed in TFWR[TFWR].</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>STRFWD_1</name>
                  <description>Enabled.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>RDSR</name>
          <description>Receive Descriptor Ring Start Register</description>
          <addressOffset>0x180</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>R_DES_START</name>
              <description>Pointer to the beginning of the receive buffer descriptor queue.</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>29</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>TDSR</name>
          <description>Transmit Buffer Descriptor Ring Start Register</description>
          <addressOffset>0x184</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>X_DES_START</name>
              <description>Pointer to the beginning of the transmit buffer descriptor queue.</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>29</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>MRBR</name>
          <description>Maximum Receive Buffer Size Register</description>
          <addressOffset>0x188</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>R_BUF_SIZE</name>
              <description>Receive buffer size in bytes</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>10</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>RSFL</name>
          <description>Receive FIFO Section Full Threshold</description>
          <addressOffset>0x190</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RX_SECTION_FULL</name>
              <description>Value Of Receive FIFO Section Full Threshold</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>RSEM</name>
          <description>Receive FIFO Section Empty Threshold</description>
          <addressOffset>0x194</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RX_SECTION_EMPTY</name>
              <description>Value Of The Receive FIFO Section Empty Threshold</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>STAT_SECTION_EMPTY</name>
              <description>RX Status FIFO Section Empty Threshold</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>RAEM</name>
          <description>Receive FIFO Almost Empty Threshold</description>
          <addressOffset>0x198</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x4</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RX_ALMOST_EMPTY</name>
              <description>Value Of The Receive FIFO Almost Empty Threshold</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>RAFL</name>
          <description>Receive FIFO Almost Full Threshold</description>
          <addressOffset>0x19C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x4</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RX_ALMOST_FULL</name>
              <description>Value Of The Receive FIFO Almost Full Threshold</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>TSEM</name>
          <description>Transmit FIFO Section Empty Threshold</description>
          <addressOffset>0x1A0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TX_SECTION_EMPTY</name>
              <description>Value Of The Transmit FIFO Section Empty Threshold</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>TAEM</name>
          <description>Transmit FIFO Almost Empty Threshold</description>
          <addressOffset>0x1A4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x4</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TX_ALMOST_EMPTY</name>
              <description>Value of Transmit FIFO Almost Empty Threshold</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>TAFL</name>
          <description>Transmit FIFO Almost Full Threshold</description>
          <addressOffset>0x1A8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x8</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TX_ALMOST_FULL</name>
              <description>Value Of The Transmit FIFO Almost Full Threshold</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>TIPG</name>
          <description>Transmit Inter-Packet Gap</description>
          <addressOffset>0x1AC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0xC</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>IPG</name>
              <description>Transmit Inter-Packet Gap</description>
              <bitOffset>0</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>FTRL</name>
          <description>Frame Truncation Length</description>
          <addressOffset>0x1B0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x7FF</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TRUNC_FL</name>
              <description>Frame Truncation Length</description>
              <bitOffset>0</bitOffset>
              <bitWidth>14</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>TACC</name>
          <description>Transmit Accelerator Function Configuration</description>
          <addressOffset>0x1C0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SHIFT16</name>
              <description>TX FIFO Shift-16</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SHIFT16_0</name>
                  <description>Disabled.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SHIFT16_1</name>
                  <description>Indicates to the transmit data FIFO that the written frames contain two additional octets before the frame data. This means the actual frame begins at bit 16 of the first word written into the FIFO. This function allows putting the frame payload on a 32-bit boundary in memory, as the 14-byte Ethernet header is extended to a 16-byte header.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>IPCHK</name>
              <description>Enables insertion of IP header checksum.</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>IPCHK_0</name>
                  <description>Checksum is not inserted.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>IPCHK_1</name>
                  <description>If an IP frame is transmitted, the checksum is inserted automatically. The IP header checksum field must be cleared. If a non-IP frame is transmitted the frame is not modified.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PROCHK</name>
              <description>Enables insertion of protocol checksum.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PROCHK_0</name>
                  <description>Checksum not inserted.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PROCHK_1</name>
                  <description>If an IP frame with a known protocol is transmitted, the checksum is inserted automatically into the frame. The checksum field must be cleared. The other frames are not modified.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>RACC</name>
          <description>Receive Accelerator Function Configuration</description>
          <addressOffset>0x1C4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>PADREM</name>
              <description>Enable Padding Removal For Short IP Frames</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PADREM_0</name>
                  <description>Padding not removed.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PADREM_1</name>
                  <description>Any bytes following the IP payload section of the frame are removed from the frame.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>IPDIS</name>
              <description>Enable Discard Of Frames With Wrong IPv4 Header Checksum</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>IPDIS_0</name>
                  <description>Frames with wrong IPv4 header checksum are not discarded.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>IPDIS_1</name>
                  <description>If an IPv4 frame is received with a mismatching header checksum, the frame is discarded. IPv6 has no header checksum and is not affected by this setting. Discarding is only available when the RX FIFO operates in store and forward mode (RSFL cleared).</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PRODIS</name>
              <description>Enable Discard Of Frames With Wrong Protocol Checksum</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PRODIS_0</name>
                  <description>Frames with wrong checksum are not discarded.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PRODIS_1</name>
                  <description>If a TCP/IP, UDP/IP, or ICMP/IP frame is received that has a wrong TCP, UDP, or ICMP checksum, the frame is discarded. Discarding is only available when the RX FIFO operates in store and forward mode (RSFL cleared).</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>LINEDIS</name>
              <description>Enable Discard Of Frames With MAC Layer Errors</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LINEDIS_0</name>
                  <description>Frames with errors are not discarded.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LINEDIS_1</name>
                  <description>Any frame received with a CRC, length, or PHY error is automatically discarded and not forwarded to the user application interface.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SHIFT16</name>
              <description>RX FIFO Shift-16</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SHIFT16_0</name>
                  <description>Disabled.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SHIFT16_1</name>
                  <description>Instructs the MAC to write two additional bytes in front of each frame received into the RX FIFO.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>RMON_T_DROP</name>
          <description>Reserved Statistic Register</description>
          <addressOffset>0x200</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
        </register>
        <register>
          <name>RMON_T_PACKETS</name>
          <description>Tx Packet Count Statistic Register</description>
          <addressOffset>0x204</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TXPKTS</name>
              <description>Packet count</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>RMON_T_BC_PKT</name>
          <description>Tx Broadcast Packets Statistic Register</description>
          <addressOffset>0x208</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TXPKTS</name>
              <description>Broadcast packets</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>RMON_T_MC_PKT</name>
          <description>Tx Multicast Packets Statistic Register</description>
          <addressOffset>0x20C</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TXPKTS</name>
              <description>Multicast packets</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>RMON_T_CRC_ALIGN</name>
          <description>Tx Packets with CRC/Align Error Statistic Register</description>
          <addressOffset>0x210</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TXPKTS</name>
              <description>Packets with CRC/align error</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>RMON_T_UNDERSIZE</name>
          <description>Tx Packets Less Than Bytes and Good CRC Statistic Register</description>
          <addressOffset>0x214</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TXPKTS</name>
              <description>Number of transmit packets less than 64 bytes with good CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>RMON_T_OVERSIZE</name>
          <description>Tx Packets GT MAX_FL bytes and Good CRC Statistic Register</description>
          <addressOffset>0x218</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TXPKTS</name>
              <description>Number of transmit packets greater than MAX_FL bytes with good CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>RMON_T_FRAG</name>
          <description>Tx Packets Less Than 64 Bytes and Bad CRC Statistic Register</description>
          <addressOffset>0x21C</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TXPKTS</name>
              <description>Number of packets less than 64 bytes with bad CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>RMON_T_JAB</name>
          <description>Tx Packets Greater Than MAX_FL bytes and Bad CRC Statistic Register</description>
          <addressOffset>0x220</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TXPKTS</name>
              <description>Number of transmit packets greater than MAX_FL bytes and bad CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>RMON_T_COL</name>
          <description>Tx Collision Count Statistic Register</description>
          <addressOffset>0x224</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TXPKTS</name>
              <description>Number of transmit collisions</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>RMON_T_P64</name>
          <description>Tx 64-Byte Packets Statistic Register</description>
          <addressOffset>0x228</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TXPKTS</name>
              <description>Number of 64-byte transmit packets</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>RMON_T_P65TO127</name>
          <description>Tx 65- to 127-byte Packets Statistic Register</description>
          <addressOffset>0x22C</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TXPKTS</name>
              <description>Number of 65- to 127-byte transmit packets</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>RMON_T_P128TO255</name>
          <description>Tx 128- to 255-byte Packets Statistic Register</description>
          <addressOffset>0x230</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TXPKTS</name>
              <description>Number of 128- to 255-byte transmit packets</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>RMON_T_P256TO511</name>
          <description>Tx 256- to 511-byte Packets Statistic Register</description>
          <addressOffset>0x234</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TXPKTS</name>
              <description>Number of 256- to 511-byte transmit packets</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>RMON_T_P512TO1023</name>
          <description>Tx 512- to 1023-byte Packets Statistic Register</description>
          <addressOffset>0x238</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TXPKTS</name>
              <description>Number of 512- to 1023-byte transmit packets</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>RMON_T_P1024TO2047</name>
          <description>Tx 1024- to 2047-byte Packets Statistic Register</description>
          <addressOffset>0x23C</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TXPKTS</name>
              <description>Number of 1024- to 2047-byte transmit packets</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>RMON_T_P_GTE2048</name>
          <description>Tx Packets Greater Than 2048 Bytes Statistic Register</description>
          <addressOffset>0x240</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TXPKTS</name>
              <description>Number of transmit packets greater than 2048 bytes</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>RMON_T_OCTETS</name>
          <description>Tx Octets Statistic Register</description>
          <addressOffset>0x244</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TXOCTS</name>
              <description>Number of transmit octets</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>IEEE_T_DROP</name>
          <description>Reserved Statistic Register</description>
          <addressOffset>0x248</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
        </register>
        <register>
          <name>IEEE_T_FRAME_OK</name>
          <description>Frames Transmitted OK Statistic Register</description>
          <addressOffset>0x24C</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>COUNT</name>
              <description>Number of frames transmitted OK</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>IEEE_T_1COL</name>
          <description>Frames Transmitted with Single Collision Statistic Register</description>
          <addressOffset>0x250</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>COUNT</name>
              <description>Number of frames transmitted with one collision</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>IEEE_T_MCOL</name>
          <description>Frames Transmitted with Multiple Collisions Statistic Register</description>
          <addressOffset>0x254</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>COUNT</name>
              <description>Number of frames transmitted with multiple collisions</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>IEEE_T_DEF</name>
          <description>Frames Transmitted after Deferral Delay Statistic Register</description>
          <addressOffset>0x258</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>COUNT</name>
              <description>Number of frames transmitted with deferral delay</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>IEEE_T_LCOL</name>
          <description>Frames Transmitted with Late Collision Statistic Register</description>
          <addressOffset>0x25C</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>COUNT</name>
              <description>Number of frames transmitted with late collision</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>IEEE_T_EXCOL</name>
          <description>Frames Transmitted with Excessive Collisions Statistic Register</description>
          <addressOffset>0x260</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>COUNT</name>
              <description>Number of frames transmitted with excessive collisions</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>IEEE_T_MACERR</name>
          <description>Frames Transmitted with Tx FIFO Underrun Statistic Register</description>
          <addressOffset>0x264</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>COUNT</name>
              <description>Number of frames transmitted with transmit FIFO underrun</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>IEEE_T_CSERR</name>
          <description>Frames Transmitted with Carrier Sense Error Statistic Register</description>
          <addressOffset>0x268</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>COUNT</name>
              <description>Number of frames transmitted with carrier sense error</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>IEEE_T_SQE</name>
          <description>Reserved Statistic Register</description>
          <addressOffset>0x26C</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>COUNT</name>
              <description>This read-only field is reserved and always has the value 0</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>IEEE_T_FDXFC</name>
          <description>Flow Control Pause Frames Transmitted Statistic Register</description>
          <addressOffset>0x270</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>COUNT</name>
              <description>Number of flow-control pause frames transmitted</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>IEEE_T_OCTETS_OK</name>
          <description>Octet Count for Frames Transmitted w/o Error Statistic Register</description>
          <addressOffset>0x274</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>COUNT</name>
              <description>Octet count for frames transmitted without error Counts total octets (includes header and FCS fields).</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>RMON_R_PACKETS</name>
          <description>Rx Packet Count Statistic Register</description>
          <addressOffset>0x284</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>COUNT</name>
              <description>Number of packets received</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>RMON_R_BC_PKT</name>
          <description>Rx Broadcast Packets Statistic Register</description>
          <addressOffset>0x288</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>COUNT</name>
              <description>Number of receive broadcast packets</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>RMON_R_MC_PKT</name>
          <description>Rx Multicast Packets Statistic Register</description>
          <addressOffset>0x28C</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>COUNT</name>
              <description>Number of receive multicast packets</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>RMON_R_CRC_ALIGN</name>
          <description>Rx Packets with CRC/Align Error Statistic Register</description>
          <addressOffset>0x290</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>COUNT</name>
              <description>Number of receive packets with CRC or align error</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>RMON_R_UNDERSIZE</name>
          <description>Rx Packets with Less Than 64 Bytes and Good CRC Statistic Register</description>
          <addressOffset>0x294</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>COUNT</name>
              <description>Number of receive packets with less than 64 bytes and good CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>RMON_R_OVERSIZE</name>
          <description>Rx Packets Greater Than MAX_FL and Good CRC Statistic Register</description>
          <addressOffset>0x298</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>COUNT</name>
              <description>Number of receive packets greater than MAX_FL and good CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>RMON_R_FRAG</name>
          <description>Rx Packets Less Than 64 Bytes and Bad CRC Statistic Register</description>
          <addressOffset>0x29C</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>COUNT</name>
              <description>Number of receive packets with less than 64 bytes and bad CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>RMON_R_JAB</name>
          <description>Rx Packets Greater Than MAX_FL Bytes and Bad CRC Statistic Register</description>
          <addressOffset>0x2A0</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>COUNT</name>
              <description>Number of receive packets greater than MAX_FL and bad CRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>RMON_R_RESVD_0</name>
          <description>Reserved Statistic Register</description>
          <addressOffset>0x2A4</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
        </register>
        <register>
          <name>RMON_R_P64</name>
          <description>Rx 64-Byte Packets Statistic Register</description>
          <addressOffset>0x2A8</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>COUNT</name>
              <description>Number of 64-byte receive packets</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>RMON_R_P65TO127</name>
          <description>Rx 65- to 127-Byte Packets Statistic Register</description>
          <addressOffset>0x2AC</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>COUNT</name>
              <description>Number of 65- to 127-byte recieve packets</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>RMON_R_P128TO255</name>
          <description>Rx 128- to 255-Byte Packets Statistic Register</description>
          <addressOffset>0x2B0</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>COUNT</name>
              <description>Number of 128- to 255-byte recieve packets</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>RMON_R_P256TO511</name>
          <description>Rx 256- to 511-Byte Packets Statistic Register</description>
          <addressOffset>0x2B4</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>COUNT</name>
              <description>Number of 256- to 511-byte recieve packets</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>RMON_R_P512TO1023</name>
          <description>Rx 512- to 1023-Byte Packets Statistic Register</description>
          <addressOffset>0x2B8</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>COUNT</name>
              <description>Number of 512- to 1023-byte recieve packets</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>RMON_R_P1024TO2047</name>
          <description>Rx 1024- to 2047-Byte Packets Statistic Register</description>
          <addressOffset>0x2BC</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>COUNT</name>
              <description>Number of 1024- to 2047-byte recieve packets</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>RMON_R_P_GTE2048</name>
          <description>Rx Packets Greater than 2048 Bytes Statistic Register</description>
          <addressOffset>0x2C0</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>COUNT</name>
              <description>Number of greater-than-2048-byte recieve packets</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>RMON_R_OCTETS</name>
          <description>Rx Octets Statistic Register</description>
          <addressOffset>0x2C4</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>COUNT</name>
              <description>Number of receive octets</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>IEEE_R_DROP</name>
          <description>Frames not Counted Correctly Statistic Register</description>
          <addressOffset>0x2C8</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>COUNT</name>
              <description>Frame count</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>IEEE_R_FRAME_OK</name>
          <description>Frames Received OK Statistic Register</description>
          <addressOffset>0x2CC</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>COUNT</name>
              <description>Number of frames received OK</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>IEEE_R_CRC</name>
          <description>Frames Received with CRC Error Statistic Register</description>
          <addressOffset>0x2D0</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>COUNT</name>
              <description>Number of frames received with CRC error</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>IEEE_R_ALIGN</name>
          <description>Frames Received with Alignment Error Statistic Register</description>
          <addressOffset>0x2D4</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>COUNT</name>
              <description>Number of frames received with alignment error</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>IEEE_R_MACERR</name>
          <description>Receive FIFO Overflow Count Statistic Register</description>
          <addressOffset>0x2D8</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>COUNT</name>
              <description>Receive FIFO overflow count</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>IEEE_R_FDXFC</name>
          <description>Flow Control Pause Frames Received Statistic Register</description>
          <addressOffset>0x2DC</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>COUNT</name>
              <description>Number of flow-control pause frames received</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>IEEE_R_OCTETS_OK</name>
          <description>Octet Count for Frames Received without Error Statistic Register</description>
          <addressOffset>0x2E0</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>COUNT</name>
              <description>Number of octets for frames received without error</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ATCR</name>
          <description>Adjustable Timer Control Register</description>
          <addressOffset>0x400</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>EN</name>
              <description>Enable Timer</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>EN_0</name>
                  <description>The timer stops at the current value.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>EN_1</name>
                  <description>The timer starts incrementing.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>OFFEN</name>
              <description>Enable One-Shot Offset Event</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>OFFEN_0</name>
                  <description>Disable.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>OFFEN_1</name>
                  <description>The timer can be reset to zero when the given offset time is reached (offset event). The field is cleared when the offset event is reached, so no further event occurs until the field is set again. The timer offset value must be set before setting this field.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>OFFRST</name>
              <description>Reset Timer On Offset Event</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>OFFRST_0</name>
                  <description>The timer is not affected and no action occurs, besides clearing OFFEN, when the offset is reached.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>OFFRST_1</name>
                  <description>If OFFEN is set, the timer resets to zero when the offset setting is reached. The offset event does not cause a timer interrupt.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PEREN</name>
              <description>Enable Periodical Event</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PEREN_0</name>
                  <description>Disable.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PEREN_1</name>
                  <description>A period event interrupt can be generated (EIR[TS_TIMER]) and the event signal output is asserted when the timer wraps around according to the periodic setting ATPER. The timer period value must be set before setting this bit. Not all devices contain the event signal output. See the chip configuration details.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PINPER</name>
              <description>Enables event signal output assertion on period event</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PINPER_0</name>
                  <description>Disable.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PINPER_1</name>
                  <description>Enable.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RESTART</name>
              <description>Reset Timer</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CAPTURE</name>
              <description>Capture Timer Value</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CAPTURE_0</name>
                  <description>No effect.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CAPTURE_1</name>
                  <description>The current time is captured and can be read from the ATVR register.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SLAVE</name>
              <description>Enable Timer Slave Mode</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SLAVE_0</name>
                  <description>The timer is active and all configuration fields in this register are relevant.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SLAVE_1</name>
                  <description>The internal timer is disabled and the externally provided timer value is used. All other fields, except CAPTURE, in this register have no effect. CAPTURE can still be used to capture the current timer value.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>ATVR</name>
          <description>Timer Value Register</description>
          <addressOffset>0x404</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ATIME</name>
              <description>A write sets the timer</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ATOFF</name>
          <description>Timer Offset Register</description>
          <addressOffset>0x408</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>OFFSET</name>
              <description>Offset value for one-shot event generation</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ATPER</name>
          <description>Timer Period Register</description>
          <addressOffset>0x40C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x3B9ACA00</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>PERIOD</name>
              <description>Value for generating periodic events</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ATCOR</name>
          <description>Timer Correction Register</description>
          <addressOffset>0x410</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>COR</name>
              <description>Correction Counter Wrap-Around Value</description>
              <bitOffset>0</bitOffset>
              <bitWidth>31</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ATINC</name>
          <description>Time-Stamping Clock Period Register</description>
          <addressOffset>0x414</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>INC</name>
              <description>Clock Period Of The Timestamping Clock (ts_clk) In Nanoseconds</description>
              <bitOffset>0</bitOffset>
              <bitWidth>7</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>INC_CORR</name>
              <description>Correction Increment Value</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>7</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ATSTMP</name>
          <description>Timestamp of Last Transmitted Frame</description>
          <addressOffset>0x418</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TIMESTAMP</name>
              <description>Timestamp of the last frame transmitted by the core that had TxBD[TS] set</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>TGSR</name>
          <description>Timer Global Status Register</description>
          <addressOffset>0x604</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TF0</name>
              <description>Copy Of Timer Flag For Channel 0</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TF0_0</name>
                  <description>Timer Flag for Channel 0 is clear</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TF0_1</name>
                  <description>Timer Flag for Channel 0 is set</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TF1</name>
              <description>Copy Of Timer Flag For Channel 1</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TF1_0</name>
                  <description>Timer Flag for Channel 1 is clear</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TF1_1</name>
                  <description>Timer Flag for Channel 1 is set</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TF2</name>
              <description>Copy Of Timer Flag For Channel 2</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TF2_0</name>
                  <description>Timer Flag for Channel 2 is clear</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TF2_1</name>
                  <description>Timer Flag for Channel 2 is set</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TF3</name>
              <description>Copy Of Timer Flag For Channel 3</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TF3_0</name>
                  <description>Timer Flag for Channel 3 is clear</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TF3_1</name>
                  <description>Timer Flag for Channel 3 is set</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <dim>4</dim>
          <dimIncrement>0x8</dimIncrement>
          <name>TCSR%s</name>
          <description>Timer Control Status Register</description>
          <addressOffset>0x608</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TDRE</name>
              <description>Timer DMA Request Enable</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TDRE_0</name>
                  <description>DMA request is disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TDRE_1</name>
                  <description>DMA request is enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TMODE</name>
              <description>Timer Mode</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TMODE_0</name>
                  <description>Timer Channel is disabled.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TMODE_1</name>
                  <description>Timer Channel is configured for Input Capture on rising edge.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TMODE_2</name>
                  <description>Timer Channel is configured for Input Capture on falling edge.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TMODE_3</name>
                  <description>Timer Channel is configured for Input Capture on both edges.</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TMODE_4</name>
                  <description>Timer Channel is configured for Output Compare - software only.</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TMODE_5</name>
                  <description>Timer Channel is configured for Output Compare - toggle output on compare.</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TMODE_6</name>
                  <description>Timer Channel is configured for Output Compare - clear output on compare.</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TMODE_7</name>
                  <description>Timer Channel is configured for Output Compare - set output on compare.</description>
                  <value>0x7</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TMODE_10</name>
                  <description>Timer Channel is configured for Output Compare - clear output on compare, set output on overflow.</description>
                  <value>0xA</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TMODE_14</name>
                  <description>Timer Channel is configured for Output Compare - pulse output low on compare for 1 to 32 1588-clock cycles as specified by TPWC.</description>
                  <value>0xE</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TMODE_15</name>
                  <description>Timer Channel is configured for Output Compare - pulse output high on compare for 1 to 32 1588-clock cycles as specified by TPWC.</description>
                  <value>0xF</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TIE</name>
              <description>Timer Interrupt Enable</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TIE_0</name>
                  <description>Interrupt is disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TIE_1</name>
                  <description>Interrupt is enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TF</name>
              <description>Timer Flag</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TF_0</name>
                  <description>Input Capture or Output Compare has not occurred.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TF_1</name>
                  <description>Input Capture or Output Compare has occurred.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TPWC</name>
              <description>Timer PulseWidth Control</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TPWC_0</name>
                  <description>Pulse width is one 1588-clock cycle.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TPWC_1</name>
                  <description>Pulse width is two 1588-clock cycles.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TPWC_2</name>
                  <description>Pulse width is three 1588-clock cycles.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TPWC_3</name>
                  <description>Pulse width is four 1588-clock cycles.</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TPWC_31</name>
                  <description>Pulse width is 32 1588-clock cycles.</description>
                  <value>0x1F</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <dim>4</dim>
          <dimIncrement>0x8</dimIncrement>
          <name>TCCR%s</name>
          <description>Timer Compare Capture Register</description>
          <addressOffset>0x60C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TCC</name>
              <description>Timer Capture Compare</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
      </registers>
    </peripheral>
    <peripheral derivedFrom="ENET1">
      <name>ENET2</name>
      <description>Ethernet MAC-NET Core</description>
      <groupName>ENET</groupName>
      <prependToName>ENET2_</prependToName>
      <baseAddress>0x20B4000</baseAddress>
      <addressBlock>
        <offset>0</offset>
        <size>0x628</size>
        <usage>registers</usage>
      </addressBlock>
      <interrupt>
        <name>ENET2</name>
        <value>152</value>
      </interrupt>
    </peripheral>
    <peripheral>
      <name>USDHC1</name>
      <description>USDHC</description>
      <groupName>USDHC</groupName>
      <prependToName>USDHC1_</prependToName>
      <baseAddress>0x2190000</baseAddress>
      <headerStructName>USDHC</headerStructName>
      <addressBlock>
        <offset>0</offset>
        <size>0xD0</size>
        <usage>registers</usage>
      </addressBlock>
      <interrupt>
        <name>USDHC1</name>
        <value>54</value>
      </interrupt>
      <registers>
        <register>
          <name>DS_ADDR</name>
          <description>DMA System Address</description>
          <addressOffset>0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DS_ADDR</name>
              <description>DMA System Address / Argument 2 When ACMD23_ARGU2_EN is set to 0, SDMA uses this register as system address and supports only 32-bit addressing mode</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>BLK_ATT</name>
          <description>Block Attributes</description>
          <addressOffset>0x4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BLKSIZE</name>
              <description>Transfer Block Size: This register specifies the block size for block data transfers</description>
              <bitOffset>0</bitOffset>
              <bitWidth>13</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>BLKSIZE_0</name>
                  <description>No data transfer</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BLKSIZE_1</name>
                  <description>1 Byte</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BLKSIZE_2</name>
                  <description>2 Bytes</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BLKSIZE_3</name>
                  <description>3 Bytes</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BLKSIZE_4</name>
                  <description>4 Bytes</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BLKSIZE_8</name>
                  <description>4096 Bytes</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BLKSIZE_200</name>
                  <description>512 Bytes</description>
                  <value>0xC8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BLKSIZE_800</name>
                  <description>2048 Bytes</description>
                  <value>0x320</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BLKCNT</name>
              <description>Blocks Count For Current Transfer: This register is enabled when the Block Count Enable bit in the Transfer Mode register is set to 1 and is valid only for multiple block transfers</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>BLKCNT_0</name>
                  <description>Stop Count</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BLKCNT_1</name>
                  <description>1 block</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BLKCNT_2</name>
                  <description>2 blocks</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>CMD_ARG</name>
          <description>Command Argument</description>
          <addressOffset>0x8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>CMDARG</name>
              <description>Command Argument</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CMD_XFR_TYP</name>
          <description>Command Transfer Type</description>
          <addressOffset>0xC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RSPTYP</name>
              <description>Response Type Select</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RSPTYP_0</name>
                  <description>No Response</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RSPTYP_1</name>
                  <description>Response Length 136</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RSPTYP_2</name>
                  <description>Response Length 48</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RSPTYP_3</name>
                  <description>Response Length 48, check Busy after response</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CCCEN</name>
              <description>Command CRC Check Enable</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CCCEN_0</name>
                  <description>Disable</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CCCEN_1</name>
                  <description>Enable</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CICEN</name>
              <description>Command Index Check Enable</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CICEN_0</name>
                  <description>Disable</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CICEN_1</name>
                  <description>Enable</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DPSEL</name>
              <description>Data Present Select</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DPSEL_0</name>
                  <description>No Data Present</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DPSEL_1</name>
                  <description>Data Present</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CMDTYP</name>
              <description>Command Type</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CMDTYP_0</name>
                  <description>Normal Other commands</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CMDTYP_1</name>
                  <description>Suspend CMD52 for writing Bus Suspend in CCCR</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CMDTYP_2</name>
                  <description>Resume CMD52 for writing Function Select in CCCR</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CMDTYP_3</name>
                  <description>Abort CMD12, CMD52 for writing I/O Abort in CCCR</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CMDINX</name>
              <description>Command Index</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CMD_RSP0</name>
          <description>Command Response0</description>
          <addressOffset>0x10</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>CMDRSP0</name>
              <description>Command Response 0</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CMD_RSP1</name>
          <description>Command Response1</description>
          <addressOffset>0x14</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>CMDRSP1</name>
              <description>Command Response 1</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CMD_RSP2</name>
          <description>Command Response2</description>
          <addressOffset>0x18</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>CMDRSP2</name>
              <description>Command Response 2</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CMD_RSP3</name>
          <description>Command Response3</description>
          <addressOffset>0x1C</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>CMDRSP3</name>
              <description>Command Response 3</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>DATA_BUFF_ACC_PORT</name>
          <description>Data Buffer Access Port</description>
          <addressOffset>0x20</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATCONT</name>
              <description>Data Content</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>PRES_STATE</name>
          <description>Present State</description>
          <addressOffset>0x24</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0x8080</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>CIHB</name>
              <description>Command Inhibit (CMD)</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CIHB_0</name>
                  <description>Can issue command using only CMD line</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CIHB_1</name>
                  <description>Cannot issue command</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CDIHB</name>
              <description>Command Inhibit (DATA)</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CDIHB_0</name>
                  <description>Can issue command which uses the DATA line</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CDIHB_1</name>
                  <description>Cannot issue command which uses the DATA line</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DLA</name>
              <description>Data Line Active</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DLA_0</name>
                  <description>DATA Line Inactive</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DLA_1</name>
                  <description>DATA Line Active</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SDSTB</name>
              <description>SD Clock Stable</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SDSTB_0</name>
                  <description>Clock is changing frequency and not stable.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SDSTB_1</name>
                  <description>Clock is stable.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>IPGOFF</name>
              <description>IPG_CLK Gated Off Internally</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>IPGOFF_0</name>
                  <description>IPG_CLK is active.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>IPGOFF_1</name>
                  <description>IPG_CLK is gated off.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HCKOFF</name>
              <description>HCLK Gated Off Internally</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HCKOFF_0</name>
                  <description>HCLK is active.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HCKOFF_1</name>
                  <description>HCLK is gated off.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PEROFF</name>
              <description>IPG_PERCLK Gated Off Internally</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PEROFF_0</name>
                  <description>IPG_PERCLK is active.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PEROFF_1</name>
                  <description>IPG_PERCLK is gated off.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SDOFF</name>
              <description>SD Clock Gated Off Internally</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SDOFF_0</name>
                  <description>SD Clock is active.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SDOFF_1</name>
                  <description>SD Clock is gated off.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WTA</name>
              <description>Write Transfer Active</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>WTA_0</name>
                  <description>No valid data</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WTA_1</name>
                  <description>Transferring data</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RTA</name>
              <description>Read Transfer Active</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RTA_0</name>
                  <description>No valid data</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RTA_1</name>
                  <description>Transferring data</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BWEN</name>
              <description>Buffer Write Enable</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>BWEN_0</name>
                  <description>Write disable</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BWEN_1</name>
                  <description>Write enable</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BREN</name>
              <description>Buffer Read Enable</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>BREN_0</name>
                  <description>Read disable</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BREN_1</name>
                  <description>Read enable</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RTR</name>
              <description>Re-Tuning Request (only for SD3.0 SDR104 mode)</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RTR_0</name>
                  <description>Fixed or well tuned sampling clock</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RTR_1</name>
                  <description>Sampling clock needs re-tuning</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TSCD</name>
              <description>Tape Select Change Done</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TSCD_0</name>
                  <description>Delay cell select change is not finished.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TSCD_1</name>
                  <description>Delay cell select change is finished.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CINST</name>
              <description>Card Inserted</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CINST_0</name>
                  <description>Power on Reset or No Card</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CINST_1</name>
                  <description>Card Inserted</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CDPL</name>
              <description>Card Detect Pin Level</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CDPL_0</name>
                  <description>No card present (CD_B = 1)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CDPL_1</name>
                  <description>Card present (CD_B = 0)</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WPSPL</name>
              <description>Write Protect Switch Pin Level</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>WPSPL_0</name>
                  <description>Write protected (WP = 1)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WPSPL_1</name>
                  <description>Write enabled (WP = 0)</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CLSL</name>
              <description>CMD Line Signal Level</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>DLSL</name>
              <description>DATA[7:0] Line Signal Level</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>PROT_CTRL</name>
          <description>Protocol Control</description>
          <addressOffset>0x28</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x8800020</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>LCTL</name>
              <description>LED Control</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LCTL_0</name>
                  <description>LED off</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LCTL_1</name>
                  <description>LED on</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DTW</name>
              <description>Data Transfer Width</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DTW_0</name>
                  <description>1-bit mode</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DTW_1</name>
                  <description>4-bit mode</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DTW_2</name>
                  <description>8-bit mode</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>D3CD</name>
              <description>DATA3 as Card Detection Pin</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>D3CD_0</name>
                  <description>DATA3 does not monitor Card Insertion</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>D3CD_1</name>
                  <description>DATA3 as Card Detection Pin</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>EMODE</name>
              <description>Endian Mode</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>EMODE_0</name>
                  <description>Big Endian Mode</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>EMODE_1</name>
                  <description>Half Word Big Endian Mode</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>EMODE_2</name>
                  <description>Little Endian Mode</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CDTL</name>
              <description>Card Detect Test Level</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CDTL_0</name>
                  <description>Card Detect Test Level is 0, no card inserted</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CDTL_1</name>
                  <description>Card Detect Test Level is 1, card inserted</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CDSS</name>
              <description>Card Detect Signal Selection</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CDSS_0</name>
                  <description>Card Detection Level is selected (for normal purpose).</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CDSS_1</name>
                  <description>Card Detection Test Level is selected (for test purpose).</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DMASEL</name>
              <description>DMA Select</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DMASEL_0</name>
                  <description>No DMA or Simple DMA is selected</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DMASEL_1</name>
                  <description>ADMA1 is selected</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DMASEL_2</name>
                  <description>ADMA2 is selected</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SABGREQ</name>
              <description>Stop At Block Gap Request</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SABGREQ_0</name>
                  <description>Transfer</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SABGREQ_1</name>
                  <description>Stop</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CREQ</name>
              <description>Continue Request</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CREQ_0</name>
                  <description>No effect</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CREQ_1</name>
                  <description>Restart</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RWCTL</name>
              <description>Read Wait Control</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RWCTL_0</name>
                  <description>Disable Read Wait Control, and stop SD Clock at block gap when SABGREQ bit is set</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RWCTL_1</name>
                  <description>Enable Read Wait Control, and assert Read Wait without stopping SD Clock at block gap when SABGREQ bit is set</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>IABG</name>
              <description>Interrupt At Block Gap</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>IABG_0</name>
                  <description>Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>IABG_1</name>
                  <description>Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RD_DONE_NO_8CLK</name>
              <description>Read done no 8 clock: According to the SD/MMC spec, for read data transaction, 8 clocks are needed after the end bit of the last data block</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>WECINT</name>
              <description>Wakeup Event Enable On Card Interrupt</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>WECINT_0</name>
                  <description>Disable</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WECINT_1</name>
                  <description>Enable</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WECINS</name>
              <description>Wakeup Event Enable On SD Card Insertion</description>
              <bitOffset>0x19</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>WECINS_0</name>
                  <description>Disable</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WECINS_1</name>
                  <description>Enable</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WECRM</name>
              <description>Wakeup Event Enable On SD Card Removal</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>WECRM_0</name>
                  <description>Disable</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WECRM_1</name>
                  <description>Enable</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BURST_LEN_EN</name>
              <description>BURST length enable for INCR, INCR4 / INCR8 / INCR16, INCR4-WRAP / INCR8-WRAP / INCR16-WRAP</description>
              <bitOffset>0x1B</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>NON_EXACT_BLK_RD</name>
              <description>Current block read is non-exact block read. It is only used for SDIO.</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NON_EXACT_BLK_RD_0</name>
                  <description>The block read is exact block read. Host driver doesn't need to issue abort command to terminate this multi-block read.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NON_EXACT_BLK_RD_1</name>
                  <description>The block read is non-exact block read. Host driver needs to issue abort command to terminate this multi-block read.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SYS_CTRL</name>
          <description>System Control</description>
          <addressOffset>0x2C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x8080800F</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DVS</name>
              <description>Divisor</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DVS_0</name>
                  <description>Divide-by-1</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DVS_1</name>
                  <description>Divide-by-2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DVS_14</name>
                  <description>Divide-by-15</description>
                  <value>0xE</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DVS_15</name>
                  <description>Divide-by-16</description>
                  <value>0xF</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SDCLKFS</name>
              <description>SDCLK Frequency Select</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DTOCV</name>
              <description>Data Timeout Counter Value</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DTOCV_0</name>
                  <description>SDCLK x 2 1 3</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DTOCV_1</name>
                  <description>SDCLK x 2 14</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DTOCV_14</name>
                  <description>SDCLK x 2 2 7</description>
                  <value>0xE</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DTOCV_15</name>
                  <description>SDCLK x 2 28</description>
                  <value>0xF</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>IPP_RST_N</name>
              <description>This register's value will be output to CARD from pad directly for hardware reset of the card if the card supports this feature</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSTA</name>
              <description>Software Reset For ALL</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RSTA_0</name>
                  <description>No Reset</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RSTA_1</name>
                  <description>Reset</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RSTC</name>
              <description>Software Reset For CMD Line</description>
              <bitOffset>0x19</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RSTC_0</name>
                  <description>No Reset</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RSTC_1</name>
                  <description>Reset</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RSTD</name>
              <description>Software Reset For DATA Line</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RSTD_0</name>
                  <description>No Reset</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RSTD_1</name>
                  <description>Reset</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>INITA</name>
              <description>Initialization Active</description>
              <bitOffset>0x1B</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSTT</name>
              <description>Reset Tuning</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>INT_STATUS</name>
          <description>Interrupt Status</description>
          <addressOffset>0x30</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>CC</name>
              <description>Command Complete</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CC_0</name>
                  <description>Command not complete</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CC_1</name>
                  <description>Command complete</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TC</name>
              <description>Transfer Complete</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TC_0</name>
                  <description>Transfer not complete</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TC_1</name>
                  <description>Transfer complete</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BGE</name>
              <description>Block Gap Event</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
              <enumeratedValues>
                <enumeratedValue>
                  <name>BGE_0</name>
                  <description>No block gap event</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BGE_1</name>
                  <description>Transaction stopped at block gap</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DINT</name>
              <description>DMA Interrupt</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DINT_0</name>
                  <description>No DMA Interrupt</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DINT_1</name>
                  <description>DMA Interrupt is generated</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BWR</name>
              <description>Buffer Write Ready</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
              <enumeratedValues>
                <enumeratedValue>
                  <name>BWR_0</name>
                  <description>Not ready to write buffer</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BWR_1</name>
                  <description>Ready to write buffer:</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BRR</name>
              <description>Buffer Read Ready</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
              <enumeratedValues>
                <enumeratedValue>
                  <name>BRR_0</name>
                  <description>Not ready to read buffer</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BRR_1</name>
                  <description>Ready to read buffer</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CINS</name>
              <description>Card Insertion</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CINS_0</name>
                  <description>Card state unstable or removed</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CINS_1</name>
                  <description>Card inserted</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CRM</name>
              <description>Card Removal</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CRM_0</name>
                  <description>Card state unstable or inserted</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CRM_1</name>
                  <description>Card removed</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CINT</name>
              <description>Card Interrupt</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CINT_0</name>
                  <description>No Card Interrupt</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CINT_1</name>
                  <description>Generate Card Interrupt</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RTE</name>
              <description>Re-Tuning Event: (only for SD3.0 SDR104 mode)</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RTE_0</name>
                  <description>Re-Tuning is not required</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RTE_1</name>
                  <description>Re-Tuning should be performed</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TP</name>
              <description>Tuning Pass:(only for SD3.0 SDR104 mode)</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
            </field>
            <field>
              <name>CTOE</name>
              <description>Command Timeout Error</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CTOE_0</name>
                  <description>No Error</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CTOE_1</name>
                  <description>Time out</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CCE</name>
              <description>Command CRC Error</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CCE_0</name>
                  <description>No Error</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CCE_1</name>
                  <description>CRC Error Generated.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CEBE</name>
              <description>Command End Bit Error</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CEBE_0</name>
                  <description>No Error</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CEBE_1</name>
                  <description>End Bit Error Generated</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CIE</name>
              <description>Command Index Error</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CIE_0</name>
                  <description>No Error</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CIE_1</name>
                  <description>Error</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DTOE</name>
              <description>Data Timeout Error</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DTOE_0</name>
                  <description>No Error</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DTOE_1</name>
                  <description>Time out</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DCE</name>
              <description>Data CRC Error</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DCE_0</name>
                  <description>No Error</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DCE_1</name>
                  <description>Error</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DEBE</name>
              <description>Data End Bit Error</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DEBE_0</name>
                  <description>No Error</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DEBE_1</name>
                  <description>Error</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>AC12E</name>
              <description>Auto CMD12 Error</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
              <enumeratedValues>
                <enumeratedValue>
                  <name>AC12E_0</name>
                  <description>No Error</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AC12E_1</name>
                  <description>Error</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TNE</name>
              <description>Tuning Error: (only for SD3.0 SDR104 mode)</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
            </field>
            <field>
              <name>DMAE</name>
              <description>DMA Error</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DMAE_0</name>
                  <description>No Error</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DMAE_1</name>
                  <description>Error</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>INT_STATUS_EN</name>
          <description>Interrupt Status Enable</description>
          <addressOffset>0x34</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>CCSEN</name>
              <description>Command Complete Status Enable</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CCSEN_0</name>
                  <description>Masked</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CCSEN_1</name>
                  <description>Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TCSEN</name>
              <description>Transfer Complete Status Enable</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TCSEN_0</name>
                  <description>Masked</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TCSEN_1</name>
                  <description>Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BGESEN</name>
              <description>Block Gap Event Status Enable</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>BGESEN_0</name>
                  <description>Masked</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BGESEN_1</name>
                  <description>Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DINTSEN</name>
              <description>DMA Interrupt Status Enable</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DINTSEN_0</name>
                  <description>Masked</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DINTSEN_1</name>
                  <description>Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BWRSEN</name>
              <description>Buffer Write Ready Status Enable</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>BWRSEN_0</name>
                  <description>Masked</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BWRSEN_1</name>
                  <description>Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BRRSEN</name>
              <description>Buffer Read Ready Status Enable</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>BRRSEN_0</name>
                  <description>Masked</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BRRSEN_1</name>
                  <description>Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CINSSEN</name>
              <description>Card Insertion Status Enable</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CINSSEN_0</name>
                  <description>Masked</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CINSSEN_1</name>
                  <description>Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CRMSEN</name>
              <description>Card Removal Status Enable</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CRMSEN_0</name>
                  <description>Masked</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CRMSEN_1</name>
                  <description>Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CINTSEN</name>
              <description>Card Interrupt Status Enable</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CINTSEN_0</name>
                  <description>Masked</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CINTSEN_1</name>
                  <description>Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RTESEN</name>
              <description>Re-Tuning Event Status Enable</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RTESEN_0</name>
                  <description>Masked</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RTESEN_1</name>
                  <description>Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TPSEN</name>
              <description>Tuning Pass Status Enable</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TPSEN_0</name>
                  <description>Masked</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TPSEN_1</name>
                  <description>Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CTOESEN</name>
              <description>Command Timeout Error Status Enable</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CTOESEN_0</name>
                  <description>Masked</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CTOESEN_1</name>
                  <description>Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CCESEN</name>
              <description>Command CRC Error Status Enable</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CCESEN_0</name>
                  <description>Masked</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CCESEN_1</name>
                  <description>Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CEBESEN</name>
              <description>Command End Bit Error Status Enable</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CEBESEN_0</name>
                  <description>Masked</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CEBESEN_1</name>
                  <description>Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CIESEN</name>
              <description>Command Index Error Status Enable</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CIESEN_0</name>
                  <description>Masked</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CIESEN_1</name>
                  <description>Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DTOESEN</name>
              <description>Data Timeout Error Status Enable</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DTOESEN_0</name>
                  <description>Masked</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DTOESEN_1</name>
                  <description>Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DCESEN</name>
              <description>Data CRC Error Status Enable</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DCESEN_0</name>
                  <description>Masked</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DCESEN_1</name>
                  <description>Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DEBESEN</name>
              <description>Data End Bit Error Status Enable</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DEBESEN_0</name>
                  <description>Masked</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DEBESEN_1</name>
                  <description>Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>AC12ESEN</name>
              <description>Auto CMD12 Error Status Enable</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>AC12ESEN_0</name>
                  <description>Masked</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AC12ESEN_1</name>
                  <description>Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TNESEN</name>
              <description>Tuning Error Status Enable</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TNESEN_0</name>
                  <description>Masked</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TNESEN_1</name>
                  <description>Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DMAESEN</name>
              <description>DMA Error Status Enable</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DMAESEN_0</name>
                  <description>Masked</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DMAESEN_1</name>
                  <description>Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>INT_SIGNAL_EN</name>
          <description>Interrupt Signal Enable</description>
          <addressOffset>0x38</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>CCIEN</name>
              <description>Command Complete Interrupt Enable</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CCIEN_0</name>
                  <description>Masked</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CCIEN_1</name>
                  <description>Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TCIEN</name>
              <description>Transfer Complete Interrupt Enable</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TCIEN_0</name>
                  <description>Masked</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TCIEN_1</name>
                  <description>Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BGEIEN</name>
              <description>Block Gap Event Interrupt Enable</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>BGEIEN_0</name>
                  <description>Masked</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BGEIEN_1</name>
                  <description>Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DINTIEN</name>
              <description>DMA Interrupt Enable</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DINTIEN_0</name>
                  <description>Masked</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DINTIEN_1</name>
                  <description>Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BWRIEN</name>
              <description>Buffer Write Ready Interrupt Enable</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>BWRIEN_0</name>
                  <description>Masked</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BWRIEN_1</name>
                  <description>Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BRRIEN</name>
              <description>Buffer Read Ready Interrupt Enable</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>BRRIEN_0</name>
                  <description>Masked</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BRRIEN_1</name>
                  <description>Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CINSIEN</name>
              <description>Card Insertion Interrupt Enable</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CINSIEN_0</name>
                  <description>Masked</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CINSIEN_1</name>
                  <description>Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CRMIEN</name>
              <description>Card Removal Interrupt Enable</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CRMIEN_0</name>
                  <description>Masked</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CRMIEN_1</name>
                  <description>Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CINTIEN</name>
              <description>Card Interrupt Interrupt Enable</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CINTIEN_0</name>
                  <description>Masked</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CINTIEN_1</name>
                  <description>Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RTEIEN</name>
              <description>Re-Tuning Event Interrupt Enable</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RTEIEN_0</name>
                  <description>Masked</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RTEIEN_1</name>
                  <description>Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TPIEN</name>
              <description>Tuning Pass Interrupt Enable</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TPIEN_0</name>
                  <description>Masked</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TPIEN_1</name>
                  <description>Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CTOEIEN</name>
              <description>Command Timeout Error Interrupt Enable</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CTOEIEN_0</name>
                  <description>Masked</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CTOEIEN_1</name>
                  <description>Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CCEIEN</name>
              <description>Command CRC Error Interrupt Enable</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CCEIEN_0</name>
                  <description>Masked</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CCEIEN_1</name>
                  <description>Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CEBEIEN</name>
              <description>Command End Bit Error Interrupt Enable</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CEBEIEN_0</name>
                  <description>Masked</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CEBEIEN_1</name>
                  <description>Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CIEIEN</name>
              <description>Command Index Error Interrupt Enable</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CIEIEN_0</name>
                  <description>Masked</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CIEIEN_1</name>
                  <description>Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DTOEIEN</name>
              <description>Data Timeout Error Interrupt Enable</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DTOEIEN_0</name>
                  <description>Masked</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DTOEIEN_1</name>
                  <description>Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DCEIEN</name>
              <description>Data CRC Error Interrupt Enable</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DCEIEN_0</name>
                  <description>Masked</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DCEIEN_1</name>
                  <description>Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DEBEIEN</name>
              <description>Data End Bit Error Interrupt Enable</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DEBEIEN_0</name>
                  <description>Masked</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DEBEIEN_1</name>
                  <description>Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>AC12EIEN</name>
              <description>Auto CMD12 Error Interrupt Enable</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>AC12EIEN_0</name>
                  <description>Masked</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AC12EIEN_1</name>
                  <description>Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TNEIEN</name>
              <description>Tuning Error Interrupt Enable</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TNEIEN_0</name>
                  <description>Masked</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TNEIEN_1</name>
                  <description>Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DMAEIEN</name>
              <description>DMA Error Interrupt Enable</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DMAEIEN_0</name>
                  <description>Masked</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DMAEIEN_1</name>
                  <description>Enable</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>AUTOCMD12_ERR_STATUS</name>
          <description>Auto CMD12 Error Status</description>
          <addressOffset>0x3C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>AC12NE</name>
              <description>Auto CMD12 Not Executed</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>AC12NE_0</name>
                  <description>Executed</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AC12NE_1</name>
                  <description>Not executed</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>AC12TOE</name>
              <description>Auto CMD12 / 23 Timeout Error</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>AC12TOE_0</name>
                  <description>No error</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AC12TOE_1</name>
                  <description>Time out</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>AC12EBE</name>
              <description>Auto CMD12 / 23 End Bit Error</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>AC12EBE_0</name>
                  <description>No error</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AC12EBE_1</name>
                  <description>End Bit Error Generated</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>AC12CE</name>
              <description>Auto CMD12 / 23 CRC Error</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>AC12CE_0</name>
                  <description>No CRC error</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AC12CE_1</name>
                  <description>CRC Error Met in Auto CMD12/23 Response</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>AC12IE</name>
              <description>Auto CMD12 / 23 Index Error</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>AC12IE_0</name>
                  <description>No error</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AC12IE_1</name>
                  <description>Error, the CMD index in response is not CMD12/23</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CNIBAC12E</name>
              <description>Command Not Issued By Auto CMD12 Error</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CNIBAC12E_0</name>
                  <description>No error</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CNIBAC12E_1</name>
                  <description>Not Issued</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>EXECUTE_TUNING</name>
              <description>Execute Tuning</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SMP_CLK_SEL</name>
              <description>Sample Clock Select</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SMP_CLK_SEL_0</name>
                  <description>Fixed clock is used to sample data</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SMP_CLK_SEL_1</name>
                  <description>Tuned clock is used to sample data</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>HOST_CTRL_CAP</name>
          <description>Host Controller Capabilities</description>
          <addressOffset>0x40</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x7F3B407</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SDR50_SUPPORT</name>
              <description>SDR50 support</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>SDR104_SUPPORT</name>
              <description>SDR104 support</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>DDR50_SUPPORT</name>
              <description>DDR50 support</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>TIME_COUNT_RETUNING</name>
              <description>Time Counter for Retuning</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>USE_TUNING_SDR50</name>
              <description>Use Tuning for SDR50</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>USE_TUNING_SDR50_0</name>
                  <description>SDR does not require tuning</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>USE_TUNING_SDR50_1</name>
                  <description>SDR50 requires tuning</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RETUNING_MODE</name>
              <description>Retuning Mode</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RETUNING_MODE_0</name>
                  <description>Mode 1</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RETUNING_MODE_1</name>
                  <description>Mode 2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RETUNING_MODE_2</name>
                  <description>Mode 3</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>MBL</name>
              <description>Max Block Length</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>MBL_0</name>
                  <description>512 bytes</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MBL_1</name>
                  <description>1024 bytes</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MBL_2</name>
                  <description>2048 bytes</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MBL_3</name>
                  <description>4096 bytes</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ADMAS</name>
              <description>ADMA Support</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ADMAS_0</name>
                  <description>Advanced DMA Not supported</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ADMAS_1</name>
                  <description>Advanced DMA Supported</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HSS</name>
              <description>High Speed Support</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HSS_0</name>
                  <description>High Speed Not Supported</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HSS_1</name>
                  <description>High Speed Supported</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DMAS</name>
              <description>DMA Support</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DMAS_0</name>
                  <description>DMA not supported</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DMAS_1</name>
                  <description>DMA Supported</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SRS</name>
              <description>Suspend / Resume Support</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRS_0</name>
                  <description>Not supported</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRS_1</name>
                  <description>Supported</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>VS33</name>
              <description>Voltage Support 3.3V</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>VS33_0</name>
                  <description>3.3V not supported</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>VS33_1</name>
                  <description>3.3V supported</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>VS30</name>
              <description>Voltage Support 3.0 V</description>
              <bitOffset>0x19</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>VS30_0</name>
                  <description>3.0V not supported</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>VS30_1</name>
                  <description>3.0V supported</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>VS18</name>
              <description>Voltage Support 1.8 V</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>VS18_0</name>
                  <description>1.8V not supported</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>VS18_1</name>
                  <description>1.8V supported</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>WTMK_LVL</name>
          <description>Watermark Level</description>
          <addressOffset>0x44</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x8100810</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RD_WML</name>
              <description>Read Watermark Level</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RD_BRST_LEN</name>
              <description>Read Burst Length Due to system restriction, the actual burst length may not exceed 16.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>WR_WML</name>
              <description>Write Watermark Level</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>WR_BRST_LEN</name>
              <description>Write Burst Length Due to system restriction, the actual burst length may not exceed 16.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>MIX_CTRL</name>
          <description>Mixer Control</description>
          <addressOffset>0x48</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x80000000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DMAEN</name>
              <description>DMA Enable</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DMAEN_0</name>
                  <description>Disable</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DMAEN_1</name>
                  <description>Enable</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BCEN</name>
              <description>Block Count Enable</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>BCEN_0</name>
                  <description>Disable</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BCEN_1</name>
                  <description>Enable</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>AC12EN</name>
              <description>Auto CMD12 Enable</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>AC12EN_0</name>
                  <description>Disable</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AC12EN_1</name>
                  <description>Enable</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DDR_EN</name>
              <description>Dual Data Rate mode selection</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DTDSEL</name>
              <description>Data Transfer Direction Select</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DTDSEL_0</name>
                  <description>Write (Host to Card)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DTDSEL_1</name>
                  <description>Read (Card to Host)</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>MSBSEL</name>
              <description>Multi / Single Block Select</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>MSBSEL_0</name>
                  <description>Single Block</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MSBSEL_1</name>
                  <description>Multiple Blocks</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>NIBBLE_POS</name>
              <description>In DDR 4-bit mode nibble position indictation</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>AC23EN</name>
              <description>Auto CMD23 Enable</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>EXE_TUNE</name>
              <description>Execute Tuning: (Only used for SD3.0, SDR104 mode)</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>EXE_TUNE_0</name>
                  <description>Not Tuned or Tuning Completed</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>EXE_TUNE_1</name>
                  <description>Execute Tuning</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SMP_CLK_SEL</name>
              <description>When STD_TUNING_EN is 0, this bit is used to select Tuned clock or Fixed clock to sample data / cmd (Only used for SD3</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SMP_CLK_SEL_0</name>
                  <description>Fixed clock is used to sample data / cmd</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SMP_CLK_SEL_1</name>
                  <description>Tuned clock is used to sample data / cmd</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>AUTO_TUNE_EN</name>
              <description>Auto Tuning Enable (Only used for SD3.0, SDR104 mode)</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>AUTO_TUNE_EN_0</name>
                  <description>Disable auto tuning</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AUTO_TUNE_EN_1</name>
                  <description>Enable auto tuning</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>FBCLK_SEL</name>
              <description>Feedback Clock Source Selection (Only used for SD3.0, SDR104 mode)</description>
              <bitOffset>0x19</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>FBCLK_SEL_0</name>
                  <description>Feedback clock comes from the loopback CLK</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FBCLK_SEL_1</name>
                  <description>Feedback clock comes from the ipp_card_clk_out</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>FORCE_EVENT</name>
          <description>Force Event</description>
          <addressOffset>0x50</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>FEVTAC12NE</name>
              <description>Force Event Auto Command 12 Not Executed</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>write-only</access>
            </field>
            <field>
              <name>FEVTAC12TOE</name>
              <description>Force Event Auto Command 12 Time Out Error</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>write-only</access>
            </field>
            <field>
              <name>FEVTAC12CE</name>
              <description>Force Event Auto Command 12 CRC Error</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>write-only</access>
            </field>
            <field>
              <name>FEVTAC12EBE</name>
              <description>Force Event Auto Command 12 End Bit Error</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>write-only</access>
            </field>
            <field>
              <name>FEVTAC12IE</name>
              <description>Force Event Auto Command 12 Index Error</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>write-only</access>
            </field>
            <field>
              <name>FEVTCNIBAC12E</name>
              <description>Force Event Command Not Executed By Auto Command 12 Error</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>write-only</access>
            </field>
            <field>
              <name>FEVTCTOE</name>
              <description>Force Event Command Time Out Error</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>write-only</access>
            </field>
            <field>
              <name>FEVTCCE</name>
              <description>Force Event Command CRC Error</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>write-only</access>
            </field>
            <field>
              <name>FEVTCEBE</name>
              <description>Force Event Command End Bit Error</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>write-only</access>
            </field>
            <field>
              <name>FEVTCIE</name>
              <description>Force Event Command Index Error</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>write-only</access>
            </field>
            <field>
              <name>FEVTDTOE</name>
              <description>Force Event Data Time Out Error</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>write-only</access>
            </field>
            <field>
              <name>FEVTDCE</name>
              <description>Force Event Data CRC Error</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>write-only</access>
            </field>
            <field>
              <name>FEVTDEBE</name>
              <description>Force Event Data End Bit Error</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>write-only</access>
            </field>
            <field>
              <name>FEVTAC12E</name>
              <description>Force Event Auto Command 12 Error</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>1</bitWidth>
              <access>write-only</access>
            </field>
            <field>
              <name>FEVTTNE</name>
              <description>Force Tuning Error</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>1</bitWidth>
              <access>write-only</access>
            </field>
            <field>
              <name>FEVTDMAE</name>
              <description>Force Event DMA Error</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>1</bitWidth>
              <access>write-only</access>
            </field>
            <field>
              <name>FEVTCINT</name>
              <description>Force Event Card Interrupt</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>write-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ADMA_ERR_STATUS</name>
          <description>ADMA Error Status Register</description>
          <addressOffset>0x54</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ADMAES</name>
              <description>ADMA Error State (when ADMA Error is occurred)</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>ADMALME</name>
              <description>ADMA Length Mismatch Error</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ADMALME_0</name>
                  <description>No Error</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ADMALME_1</name>
                  <description>Error</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ADMADCE</name>
              <description>ADMA Descritor Error</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ADMADCE_0</name>
                  <description>No Error</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ADMADCE_1</name>
                  <description>Error</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>ADMA_SYS_ADDR</name>
          <description>ADMA System Address</description>
          <addressOffset>0x58</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ADS_ADDR</name>
              <description>ADMA System Address</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>30</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>DLL_CTRL</name>
          <description>DLL (Delay Line) Control</description>
          <addressOffset>0x60</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x200</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DLL_CTRL_ENABLE</name>
              <description>Set this bit to 1 to enable the DLL and delay chain; otherwise; set to 0 to bypasses DLL</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DLL_CTRL_RESET</name>
              <description>Setting this bit to 1 force a reset on DLL</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DLL_CTRL_SLV_FORCE_UPD</name>
              <description>Setting this bit to 1, forces the slave delay line to update to the DLL calibrated value immediately</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DLL_CTRL_SLV_DLY_TARGET0</name>
              <description>The delay target for the USDHC loopback read clock can be programmed in 1/16th increments of an ref_clock half-period</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DLL_CTRL_GATE_UPDATE</name>
              <description>Set this bit to 1 to prevent the DLL from updating (since when clock_in exists, glitches may appear during DLL updates)</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DLL_CTRL_SLV_OVERRIDE</name>
              <description>Set this bit to 1 to Enable manual override for slave delay chain using SLV_OVERRIDE_VAL; to set 0 to disable manual override</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DLL_CTRL_SLV_OVERRIDE_VAL</name>
              <description>When SLV_OVERRIDE = 1 This field is used to select 1 of 128 physical taps manually</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>7</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DLL_CTRL_SLV_DLY_TARGET1</name>
              <description>Refer to DLL_CTRL_SLV_DLY_TARGET0 below.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DLL_CTRL_SLV_UPDATE_INT</name>
              <description>Slave delay line update interval</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DLL_CTRL_REF_UPDATE_INT</name>
              <description>DLL control loop update interval</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>DLL_STATUS</name>
          <description>DLL Status</description>
          <addressOffset>0x64</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DLL_STS_SLV_LOCK</name>
              <description>Slave delay-line lock status</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>DLL_STS_REF_LOCK</name>
              <description>Reference DLL lock status</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>DLL_STS_SLV_SEL</name>
              <description>Slave delay line select status</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>7</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>DLL_STS_REF_SEL</name>
              <description>Reference delay line select taps. This is encoded by 7 bits for 127 taps.</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>7</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CLK_TUNE_CTRL_STATUS</name>
          <description>CLK Tuning Control and Status</description>
          <addressOffset>0x68</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DLY_CELL_SET_POST</name>
              <description>Set the number of delay cells on the feedback clock between CLK_OUT and CLK_POST.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DLY_CELL_SET_OUT</name>
              <description>Set the number of delay cells on the feedback clock between CLK_PRE and CLK_OUT.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DLY_CELL_SET_PRE</name>
              <description>Set the number of delay cells on the feedback clock between the feedback clock and CLK_PRE.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>7</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>NXT_ERR</name>
              <description>NXT error which means the number of delay cells added on the feedback clock is too large</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>TAP_SEL_POST</name>
              <description>Reflect the number of delay cells added on the feedback clock between CLK_OUT and CLK_POST.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>TAP_SEL_OUT</name>
              <description>Reflect the number of delay cells added on the feedback clock between CLK_PRE and CLK_OUT.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>TAP_SEL_PRE</name>
              <description>Reflects the number of delay cells added on the feedback clock between the feedback clock and CLK_PRE</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>7</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>PRE_ERR</name>
              <description>PRE error which means the number of delay cells added on the feedback clock is too small</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>VEND_SPEC</name>
          <description>Vendor Specific Register</description>
          <addressOffset>0xC0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x20007809</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>EXT_DMA_EN</name>
              <description>External DMA Request Enable</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>EXT_DMA_EN_0</name>
                  <description>In any scenario, USDHC does not send out external DMA request.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>EXT_DMA_EN_1</name>
                  <description>When internal DMA is not active, the external DMA request will be sent out.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>VSELECT</name>
              <description>Voltage Selection</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>VSELECT_0</name>
                  <description>Change the voltage to high voltage range, around 3.0 V</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>VSELECT_1</name>
                  <description>Change the voltage to low voltage range, around 1.8 V</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CONFLICT_CHK_EN</name>
              <description>Conflict check enable.</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CONFLICT_CHK_EN_0</name>
                  <description>Conflict check disable</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CONFLICT_CHK_EN_1</name>
                  <description>Conflict check enable</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>AC12_WR_CHKBUSY_EN</name>
              <description>Check busy enable after auto CMD12 for write data packet</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>AC12_WR_CHKBUSY_EN_0</name>
                  <description>Do not check busy after auto CMD12 for write data packet</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AC12_WR_CHKBUSY_EN_1</name>
                  <description>Check busy after auto CMD12 for write data packet</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DAT3_CD_POL</name>
              <description>Only for debug. Polarity of DATA3 pin when it is used as card detection.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DAT3_CD_POL_0</name>
                  <description>Card detected when DATA3 is high.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DAT3_CD_POL_1</name>
                  <description>Card detected when DATA3 is low.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CD_POL</name>
              <description>Only for debug. Polarity of the CD_B pin:</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CD_POL_0</name>
                  <description>CD_B pin is low active.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CD_POL_1</name>
                  <description>CD_B pin is high active.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WP_POL</name>
              <description>Only for debug. Polarity of the WP pin:</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>WP_POL_0</name>
                  <description>WP pin is high active.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WP_POL_1</name>
                  <description>WP pin is low active.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CLKONJ_IN_ABORT</name>
              <description>Only for debug. Force CLK output active when sending Abort command:</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CLKONJ_IN_ABORT_0</name>
                  <description>The CLK output is active when sending abort command while data is transmitting even if the internal FIFO is full (for read) or empty (for write).</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLKONJ_IN_ABORT_1</name>
                  <description>The CLK output is inactive when sending abort command while data is transmitting if the internal FIFO is full (for read) or empty (for write).</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>FRC_SDCLK_ON</name>
              <description>Force CLK output active</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>FRC_SDCLK_ON_0</name>
                  <description>CLK active or inactive is fully controlled by the hardware.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FRC_SDCLK_ON_1</name>
                  <description>Force CLK active.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>IPG_CLK_SOFT_EN</name>
              <description>IPG_CLK Software Enable</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>IPG_CLK_SOFT_EN_0</name>
                  <description>Gate off the IPG_CLK</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>IPG_CLK_SOFT_EN_1</name>
                  <description>Enable the IPG_CLK</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HCLK_SOFT_EN</name>
              <description>AHB Clock Software Enable</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HCLK_SOFT_EN_0</name>
                  <description>Gate off the AHB clock.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HCLK_SOFT_EN_1</name>
                  <description>Enable the AHB clock.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>IPG_PERCLK_SOFT_EN</name>
              <description>IPG_PERCLK Software Enable</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>IPG_PERCLK_SOFT_EN_0</name>
                  <description>Gate off the IPG_PERCLK</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>IPG_PERCLK_SOFT_EN_1</name>
                  <description>Enable the IPG_PERCLK</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CARD_CLK_SOFT_EN</name>
              <description>Card Clock Software Enable</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CARD_CLK_SOFT_EN_0</name>
                  <description>Gate off the sd_clk</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CARD_CLK_SOFT_EN_1</name>
                  <description>Enable the sd_clk</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CRC_CHK_DIS</name>
              <description>CRC Check Disable</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CRC_CHK_DIS_0</name>
                  <description>Check CRC16 for every read data packet and check CRC bits for every write data packet</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CRC_CHK_DIS_1</name>
                  <description>Ignore CRC16 check for every read data packet and ignore CRC bits check for every write data packet</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>INT_ST_VAL</name>
              <description>Internal State Value</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>CMD_BYTE_EN</name>
              <description>Byte access</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CMD_BYTE_EN_0</name>
                  <description>Disable</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CMD_BYTE_EN_1</name>
                  <description>Enable</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>MMC_BOOT</name>
          <description>MMC Boot Register</description>
          <addressOffset>0xC4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DTOCV_ACK</name>
              <description>Boot ACK time out counter value.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DTOCV_ACK_0</name>
                  <description>SDCLK x 2^13</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DTOCV_ACK_1</name>
                  <description>SDCLK x 2^14</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DTOCV_ACK_2</name>
                  <description>SDCLK x 2^15</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DTOCV_ACK_3</name>
                  <description>SDCLK x 2^16</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DTOCV_ACK_4</name>
                  <description>SDCLK x 2^17</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DTOCV_ACK_5</name>
                  <description>SDCLK x 2^18</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DTOCV_ACK_6</name>
                  <description>SDCLK x 2^19</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DTOCV_ACK_7</name>
                  <description>SDCLK x 2^20</description>
                  <value>0x7</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DTOCV_ACK_14</name>
                  <description>SDCLK x 2^27</description>
                  <value>0xE</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DTOCV_ACK_15</name>
                  <description>SDCLK x 2^28</description>
                  <value>0xF</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BOOT_ACK</name>
              <description>Boot ACK mode select</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>BOOT_ACK_0</name>
                  <description>No ack</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BOOT_ACK_1</name>
                  <description>Ack</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BOOT_MODE</name>
              <description>Boot mode select</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>BOOT_MODE_0</name>
                  <description>Normal boot</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BOOT_MODE_1</name>
                  <description>Alternative boot</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BOOT_EN</name>
              <description>Boot mode enable</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>BOOT_EN_0</name>
                  <description>Fast boot disable</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BOOT_EN_1</name>
                  <description>Fast boot enable</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>AUTO_SABG_EN</name>
              <description>During boot, enable auto stop at block gap function</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DISABLE_TIME_OUT</name>
              <description>Disable Time Out</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLE_TIME_OUT_0</name>
                  <description>Enable time out</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DISABLE_TIME_OUT_1</name>
                  <description>Disable time out</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BOOT_BLK_CNT</name>
              <description>The value defines the Stop At Block Gap value of automatic mode</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>VEND_SPEC2</name>
          <description>Vendor Specific 2 Register</description>
          <addressOffset>0xC8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x6</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SDR104_TIMING_DIS</name>
              <description>Timeout counter test. This bit only uses for debugging.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SDR104_TIMING_DIS_0</name>
                  <description>The timeout counter for Ncr changes to 80, Ncrc changes to 21.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SDR104_TIMING_DIS_1</name>
                  <description>The timeout counter for Ncr changes to 72, Ncrc changes to 15.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SDR104_OE_DIS</name>
              <description>CMD_OE / DATA_OE logic generation test. This bit only uses for debugging.</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SDR104_OE_DIS_0</name>
                  <description>Drive the CMD_OE / DATA_OE for one more clock cycle after the end bit.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SDR104_OE_DIS_1</name>
                  <description>Stop to drive the CMD_OE / DATA_OE at once after driving the end bit.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SDR104_NSD_DIS</name>
              <description>Interrupt window after abort command is sent. This bit only uses for debugging.</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SDR104_NSD_DIS_0</name>
                  <description>Enable the interrupt window 9 cycles later after the end of the I/O abort command (or CMD12) is sent.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SDR104_NSD_DIS_1</name>
                  <description>Enable the interrupt window 5 cycles later after the end of the I/O abort command (or CMD12) is sent.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CARD_INT_D3_TEST</name>
              <description>Card Interrupt Detection Test</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CARD_INT_D3_TEST_0</name>
                  <description>Check the card interrupt only when DATA3 is high.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CARD_INT_D3_TEST_1</name>
                  <description>Check the card interrupt by ignoring the status of DATA3.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TUNING_8bit_EN</name>
              <description>Enable the auto tuning circuit to check the DATA[7:0]</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TUNING_8bit_EN_0</name>
                  <description>Tuning circuit only checks the DATA[3:0].</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TUNING_8bit_EN_1</name>
                  <description>Tuning circuit only checks the DATA0.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TUNING_1bit_EN</name>
              <description>Enable the auto tuning circuit to check the DATA0 only</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TUNING_CMD_EN</name>
              <description>Enable the auto tuning circuit to check the CMD line.</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TUNING_CMD_EN_0</name>
                  <description>Auto tuning circuit does not check the CMD line.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TUNING_CMD_EN_1</name>
                  <description>Auto tuning circuit checks the CMD line.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CARD_INT_AUTO_CLR_DIS</name>
              <description>Disable the feature to clear the Card interrupt status bit when Card Interrupt status enable bit is cleared</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CARD_INT_AUTO_CLR_DIS_0</name>
                  <description>Card interrupt status bit (CINT) can be cleared when Card Interrupt status enable bit is 0.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CARD_INT_AUTO_CLR_DIS_1</name>
                  <description>Card interrupt status bit (CINT) can only be cleared by writting a 1 to CINT bit.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ACMD23_ARGU2_EN</name>
              <description>Default1</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ACMD23_ARGU2_EN_0</name>
                  <description>Disable</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ACMD23_ARGU2_EN_1</name>
                  <description>Argument2 register enable for ACMD23 sharing with SDMA system address register. Default is enable.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>TUNING_CTRL</name>
          <description>Tuning Control Register</description>
          <addressOffset>0xCC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x212800</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TUNING_START_TAP</name>
              <description>The start dealy cell point when send first CMD19 in tuning procedure.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TUNING_COUNTER</name>
              <description>The MAX repeat CMD19 times in tuning procedure.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TUNING_STEP</name>
              <description>The increasing delay cell steps in tuning procedure.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TUNING_WINDOW</name>
              <description>Select data window value for auto tuning</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>STD_TUNING_EN</name>
              <description>Standard tuning circuit and procedure enable: This bit is used to enable standard tuning circuit and procedure</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
      </registers>
    </peripheral>
    <peripheral derivedFrom="USDHC1">
      <name>USDHC2</name>
      <description>USDHC</description>
      <groupName>USDHC</groupName>
      <prependToName>USDHC2_</prependToName>
      <baseAddress>0x2194000</baseAddress>
      <addressBlock>
        <offset>0</offset>
        <size>0xD0</size>
        <usage>registers</usage>
      </addressBlock>
      <interrupt>
        <name>USDHC2</name>
        <value>55</value>
      </interrupt>
    </peripheral>
    <peripheral>
      <name>ADC1</name>
      <description>Analog-to-Digital Converter</description>
      <groupName>ADC</groupName>
      <prependToName>ADC1_</prependToName>
      <baseAddress>0x2198000</baseAddress>
      <addressBlock>
        <offset>0</offset>
        <size>0x2C</size>
        <usage>registers</usage>
      </addressBlock>
      <interrupt>
        <name>ADC1</name>
        <value>132</value>
      </interrupt>
      <registers>
        <register>
          <name>HC0</name>
          <description>Control register</description>
          <addressOffset>0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x1F</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ADCH</name>
              <description>Input Channel Select</description>
              <bitOffset>0</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ADCH_25</name>
                  <description>VREFSH = internal channel, for ADC self-test, hard connected to VRH internally</description>
                  <value>0x19</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ADCH_31</name>
                  <description>Conversion Disabled.</description>
                  <value>0x1F</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>AIEN</name>
              <description>Conversion Complete Interrupt Enable/Disable Control</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>AIEN_0</name>
                  <description>Conversion complete interrupt disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AIEN_1</name>
                  <description>Conversion complete interrupt enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>HS</name>
          <description>Status register</description>
          <addressOffset>0x8</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>COCO0</name>
              <description>Conversion Complete Flag</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>R0</name>
          <description>Data result register</description>
          <addressOffset>0xC</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>CDATA</name>
              <description>Data (result of an ADC conversion)</description>
              <bitOffset>0</bitOffset>
              <bitWidth>12</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CFG</name>
          <description>Configuration register</description>
          <addressOffset>0x14</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x200</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ADICLK</name>
              <description>Input Clock Select</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ADICLK_0</name>
                  <description>IPG clock</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ADICLK_1</name>
                  <description>IPG clock divided by 2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ADICLK_3</name>
                  <description>Asynchronous clock (ADACK)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>MODE</name>
              <description>Conversion Mode Selection</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>MODE_0</name>
                  <description>8-bit conversion</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MODE_1</name>
                  <description>10-bit conversion</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MODE_2</name>
                  <description>12-bit conversion</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ADLSMP</name>
              <description>Long Sample Time Configuration</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ADLSMP_0</name>
                  <description>Short sample mode.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ADLSMP_1</name>
                  <description>Long sample mode.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ADIV</name>
              <description>Clock Divide Select</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ADIV_0</name>
                  <description>Input clock</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ADIV_1</name>
                  <description>Input clock / 2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ADIV_2</name>
                  <description>Input clock / 4</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ADIV_3</name>
                  <description>Input clock / 8</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ADLPC</name>
              <description>Low-Power Configuration</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ADLPC_0</name>
                  <description>ADC hard block not in low power mode.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ADLPC_1</name>
                  <description>ADC hard block in low power mode.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ADSTS</name>
              <description>Defines the sample time duration</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ADSTS_0</name>
                  <description>Sample period (ADC clocks) = 2 if ADLSMP=0b Sample period (ADC clocks) = 12 if ADLSMP=1b</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ADSTS_1</name>
                  <description>Sample period (ADC clocks) = 4 if ADLSMP=0b Sample period (ADC clocks) = 16 if ADLSMP=1b</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ADSTS_2</name>
                  <description>Sample period (ADC clocks) = 6 if ADLSMP=0b Sample period (ADC clocks) = 20 if ADLSMP=1b</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ADSTS_3</name>
                  <description>Sample period (ADC clocks) = 8 if ADLSMP=0b Sample period (ADC clocks) = 24 if ADLSMP=1b</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ADHSC</name>
              <description>High Speed Configuration</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ADHSC_0</name>
                  <description>Normal conversion selected.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ADHSC_1</name>
                  <description>High speed conversion selected.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>REFSEL</name>
              <description>Voltage Reference Selection</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>REFSEL_0</name>
                  <description>Selects VREFH/VREFL as reference voltage.</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ADTRG</name>
              <description>Conversion Trigger Select</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ADTRG_0</name>
                  <description>Software trigger selected</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>AVGS</name>
              <description>Hardware Average select</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>AVGS_0</name>
                  <description>4 samples averaged</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AVGS_1</name>
                  <description>8 samples averaged</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AVGS_2</name>
                  <description>16 samples averaged</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AVGS_3</name>
                  <description>32 samples averaged</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>OVWREN</name>
              <description>Data Overwrite Enable</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>OVWREN_0</name>
                  <description>Disable the overwriting. Existing Data in Data result register will not be overwritten by subsequent converted data.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>OVWREN_1</name>
                  <description>Enable the overwriting.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>GC</name>
          <description>General control register</description>
          <addressOffset>0x18</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ADACKEN</name>
              <description>Asynchronous clock output enable</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ADACKEN_0</name>
                  <description>Asynchronous clock output disabled; Asynchronous clock only enabled if selected by ADICLK and a conversion is active.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ADACKEN_1</name>
                  <description>Asynchronous clock and clock output enabled regardless of the state of the ADC</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DMAEN</name>
              <description>DMA Enable</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DMAEN_0</name>
                  <description>DMA disabled (default)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DMAEN_1</name>
                  <description>DMA enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ACREN</name>
              <description>Compare Function Range Enable</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ACREN_0</name>
                  <description>Range function disabled. Only the compare value 1 of ADC_CV register (CV1) is compared.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ACREN_1</name>
                  <description>Range function enabled. Both compare values of ADC_CV registers (CV1 and CV2) are compared.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ACFGT</name>
              <description>Compare Function Greater Than Enable</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ACFGT_0</name>
                  <description>Configures &quot;Less Than Threshold, Outside Range Not Inclusive and Inside Range Not Inclusive&quot; functionality based on the values placed in the ADC_CV register.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ACFGT_1</name>
                  <description>Configures &quot;Greater Than Or Equal To Threshold, Outside Range Inclusive and Inside Range Inclusive&quot; functionality based on the values placed in the ADC_CV registers.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ACFE</name>
              <description>Compare Function Enable</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ACFE_0</name>
                  <description>Compare function disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ACFE_1</name>
                  <description>Compare function enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>AVGE</name>
              <description>Hardware average enable</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>AVGE_0</name>
                  <description>Hardware average function disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AVGE_1</name>
                  <description>Hardware average function enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ADCO</name>
              <description>Continuous Conversion Enable</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ADCO_0</name>
                  <description>One conversion or one set of conversions if the hardware average function is enabled (AVGE=1) after initiating a conversion.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ADCO_1</name>
                  <description>Continuous conversions or sets of conversions if the hardware average function is enabled (AVGE=1) after initiating a conversion.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CAL</name>
              <description>Calibration</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>GS</name>
          <description>General status register</description>
          <addressOffset>0x1C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ADACT</name>
              <description>Conversion Active</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ADACT_0</name>
                  <description>Conversion not in progress.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ADACT_1</name>
                  <description>Conversion in progress.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CALF</name>
              <description>Calibration Failed Flag</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CALF_0</name>
                  <description>Calibration completed normally.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CALF_1</name>
                  <description>Calibration failed. ADC accuracy specifications are not guaranteed.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>AWKST</name>
              <description>Asynchronous wakeup interrupt status</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
              <enumeratedValues>
                <enumeratedValue>
                  <name>AWKST_0</name>
                  <description>No asynchronous interrupt.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AWKST_1</name>
                  <description>Asynnchronous wake up interrupt occured in stop mode.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>CV</name>
          <description>Compare value register</description>
          <addressOffset>0x20</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>CV1</name>
              <description>Compare Value 1</description>
              <bitOffset>0</bitOffset>
              <bitWidth>12</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CV2</name>
              <description>Compare Value 2</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>12</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>OFS</name>
          <description>Offset correction value register</description>
          <addressOffset>0x24</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>OFS</name>
              <description>Offset value</description>
              <bitOffset>0</bitOffset>
              <bitWidth>12</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SIGN</name>
              <description>Sign bit</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SIGN_0</name>
                  <description>The offset value is added with the raw result</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SIGN_1</name>
                  <description>The offset value is subtracted from the raw converted value</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>CAL</name>
          <description>Calibration value register</description>
          <addressOffset>0x28</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>CAL_CODE</name>
              <description>Calibration Result Value</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
      </registers>
    </peripheral>
    <peripheral>
      <name>ADC_5HC</name>
      <description>Analog-to-Digital Converter</description>
      <groupName>ADC_5HC</groupName>
      <prependToName>ADC_5HC_</prependToName>
      <baseAddress>0x219C000</baseAddress>
      <addressBlock>
        <offset>0</offset>
        <size>0x44</size>
        <usage>registers</usage>
      </addressBlock>
      <interrupt>
        <name>ADC_5HC</name>
        <value>133</value>
      </interrupt>
      <registers>
        <register>
          <name>HC0</name>
          <description>Control register for hardware triggers</description>
          <addressOffset>0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x1F</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ADCH</name>
              <description>Input Channel Select</description>
              <bitOffset>0</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ADCH_25</name>
                  <description>VREFSH = internal channel, for ADC self-test, hard connected to VRH internally</description>
                  <value>0x19</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ADCH_31</name>
                  <description>Conversion Disabled. Hardware Triggers will not initiate any conversion.</description>
                  <value>0x1F</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>AIEN</name>
              <description>Conversion Complete Interrupt Enable/Disable Control</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>AIEN_0</name>
                  <description>Conversion complete interrupt disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AIEN_1</name>
                  <description>Conversion complete interrupt enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <dim>4</dim>
          <dimIncrement>0x4</dimIncrement>
          <dimIndex>1,2,3,4</dimIndex>
          <name>HC%s</name>
          <description>Control register for hardware triggers</description>
          <addressOffset>0x4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x1F</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ADCH</name>
              <description>Input Channel Select</description>
              <bitOffset>0</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ADCH_25</name>
                  <description>VREFSH = internal channel, for ADC self-test, hard connected to VRH internally</description>
                  <value>0x19</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ADCH_31</name>
                  <description>Conversion Disabled. Hardware Triggers will not initiate any conversion.</description>
                  <value>0x1F</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>AIEN</name>
              <description>Conversion Complete Interrupt Enable/Disable Control</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>AIEN_0</name>
                  <description>Conversion complete interrupt disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AIEN_1</name>
                  <description>Conversion complete interrupt enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>HS</name>
          <description>Status register for HW triggers</description>
          <addressOffset>0x14</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>COCO0</name>
              <description>Conversion Complete Flag</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>COCO1</name>
              <description>See description for COCO0.</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>COCO2</name>
              <description>See description for COCO0.</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>COCO3</name>
              <description>See description for COCO0.</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>COCO4</name>
              <description>See description for COCO0.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>R0</name>
          <description>Data result register for HW triggers</description>
          <addressOffset>0x18</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>CDATA</name>
              <description>Data (result of an ADC conversion)</description>
              <bitOffset>0</bitOffset>
              <bitWidth>12</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <dim>4</dim>
          <dimIncrement>0x4</dimIncrement>
          <dimIndex>1,2,3,4</dimIndex>
          <name>R%s</name>
          <description>Data result register for HW triggers</description>
          <addressOffset>0x1C</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>CDATA</name>
              <description>Data (result of an ADC conversion)</description>
              <bitOffset>0</bitOffset>
              <bitWidth>12</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CFG</name>
          <description>Configuration register</description>
          <addressOffset>0x2C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x200</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ADICLK</name>
              <description>Input Clock Select</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ADICLK_0</name>
                  <description>IPG clock</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ADICLK_1</name>
                  <description>IPG clock divided by 2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ADICLK_3</name>
                  <description>Asynchronous clock (ADACK)</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>MODE</name>
              <description>Conversion Mode Selection</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>MODE_0</name>
                  <description>8-bit conversion</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MODE_1</name>
                  <description>10-bit conversion</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MODE_2</name>
                  <description>12-bit conversion</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ADLSMP</name>
              <description>Long Sample Time Configuration</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ADLSMP_0</name>
                  <description>Short sample mode.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ADLSMP_1</name>
                  <description>Long sample mode.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ADIV</name>
              <description>Clock Divide Select</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ADIV_0</name>
                  <description>Input clock</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ADIV_1</name>
                  <description>Input clock / 2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ADIV_2</name>
                  <description>Input clock / 4</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ADIV_3</name>
                  <description>Input clock / 8</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ADLPC</name>
              <description>Low-Power Configuration</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ADLPC_0</name>
                  <description>ADC hard block not in low power mode.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ADLPC_1</name>
                  <description>ADC hard block in low power mode.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ADSTS</name>
              <description>Defines the sample time duration</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ADSTS_0</name>
                  <description>Sample period (ADC clocks) = 2 if ADLSMP=0b Sample period (ADC clocks) = 12 if ADLSMP=1b</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ADSTS_1</name>
                  <description>Sample period (ADC clocks) = 4 if ADLSMP=0b Sample period (ADC clocks) = 16 if ADLSMP=1b</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ADSTS_2</name>
                  <description>Sample period (ADC clocks) = 6 if ADLSMP=0b Sample period (ADC clocks) = 20 if ADLSMP=1b</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ADSTS_3</name>
                  <description>Sample period (ADC clocks) = 8 if ADLSMP=0b Sample period (ADC clocks) = 24 if ADLSMP=1b</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ADHSC</name>
              <description>High Speed Configuration</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ADHSC_0</name>
                  <description>Normal conversion selected.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ADHSC_1</name>
                  <description>High speed conversion selected.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>REFSEL</name>
              <description>Voltage Reference Selection</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>REFSEL_0</name>
                  <description>Selects VREFH/VREFL as reference voltage.</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ADTRG</name>
              <description>Conversion Trigger Select</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ADTRG_0</name>
                  <description>Software trigger selected</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ADTRG_1</name>
                  <description>Hardware trigger selected</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>AVGS</name>
              <description>Hardware Average select</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>AVGS_0</name>
                  <description>4 samples averaged</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AVGS_1</name>
                  <description>8 samples averaged</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AVGS_2</name>
                  <description>16 samples averaged</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AVGS_3</name>
                  <description>32 samples averaged</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>OVWREN</name>
              <description>Data Overwrite Enable</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>OVWREN_0</name>
                  <description>Disable the overwriting. Existing Data in Data result register will not be overwritten by subsequent converted data.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>OVWREN_1</name>
                  <description>Enable the overwriting.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>GC</name>
          <description>General control register</description>
          <addressOffset>0x30</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ADACKEN</name>
              <description>Asynchronous clock output enable</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ADACKEN_0</name>
                  <description>Asynchronous clock output disabled; Asynchronous clock only enabled if selected by ADICLK and a conversion is active.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ADACKEN_1</name>
                  <description>Asynchronous clock and clock output enabled regardless of the state of the ADC</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DMAEN</name>
              <description>DMA Enable</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DMAEN_0</name>
                  <description>DMA disabled (default)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DMAEN_1</name>
                  <description>DMA enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ACREN</name>
              <description>Compare Function Range Enable</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ACREN_0</name>
                  <description>Range function disabled. Only the compare value 1 of ADC_CV register (CV1) is compared.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ACREN_1</name>
                  <description>Range function enabled. Both compare values of ADC_CV registers (CV1 and CV2) are compared.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ACFGT</name>
              <description>Compare Function Greater Than Enable</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ACFGT_0</name>
                  <description>Configures &quot;Less Than Threshold, Outside Range Not Inclusive and Inside Range Not Inclusive&quot; functionality based on the values placed in the ADC_CV register.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ACFGT_1</name>
                  <description>Configures &quot;Greater Than Or Equal To Threshold, Outside Range Inclusive and Inside Range Inclusive&quot; functionality based on the values placed in the ADC_CV registers.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ACFE</name>
              <description>Compare Function Enable</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ACFE_0</name>
                  <description>Compare function disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ACFE_1</name>
                  <description>Compare function enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>AVGE</name>
              <description>Hardware average enable</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>AVGE_0</name>
                  <description>Hardware average function disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AVGE_1</name>
                  <description>Hardware average function enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ADCO</name>
              <description>Continuous Conversion Enable</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ADCO_0</name>
                  <description>One conversion or one set of conversions if the hardware average function is enabled (AVGE=1) after initiating a conversion.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ADCO_1</name>
                  <description>Continuous conversions or sets of conversions if the hardware average function is enabled (AVGE=1) after initiating a conversion.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CAL</name>
              <description>Calibration</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>GS</name>
          <description>General status register</description>
          <addressOffset>0x34</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ADACT</name>
              <description>Conversion Active</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ADACT_0</name>
                  <description>Conversion not in progress.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ADACT_1</name>
                  <description>Conversion in progress.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CALF</name>
              <description>Calibration Failed Flag</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CALF_0</name>
                  <description>Calibration completed normally.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CALF_1</name>
                  <description>Calibration failed. ADC accuracy specifications are not guaranteed.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>AWKST</name>
              <description>Asynchronous wakeup interrupt status</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
              <enumeratedValues>
                <enumeratedValue>
                  <name>AWKST_0</name>
                  <description>No asynchronous interrupt.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AWKST_1</name>
                  <description>Asynnchronous wake up interrupt occured in stop mode.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>CV</name>
          <description>Compare value register</description>
          <addressOffset>0x38</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>CV1</name>
              <description>Compare Value 1</description>
              <bitOffset>0</bitOffset>
              <bitWidth>12</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CV2</name>
              <description>Compare Value 2</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>12</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>OFS</name>
          <description>Offset correction value register</description>
          <addressOffset>0x3C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>OFS</name>
              <description>Offset value</description>
              <bitOffset>0</bitOffset>
              <bitWidth>12</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SIGN</name>
              <description>Sign bit</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SIGN_0</name>
                  <description>The offset value is added with the raw result</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SIGN_1</name>
                  <description>The offset value is subtracted from the raw converted value</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>CAL</name>
          <description>Calibration value register</description>
          <addressOffset>0x40</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>CAL_CODE</name>
              <description>Calibration Result Value</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
      </registers>
    </peripheral>
    <peripheral>
      <name>I2C1</name>
      <description>I2C</description>
      <groupName>I2C</groupName>
      <prependToName>I2C1_</prependToName>
      <baseAddress>0x21A0000</baseAddress>
      <headerStructName>I2C</headerStructName>
      <addressBlock>
        <offset>0</offset>
        <size>0x12</size>
        <usage>registers</usage>
      </addressBlock>
      <interrupt>
        <name>I2C1</name>
        <value>68</value>
      </interrupt>
      <registers>
        <register>
          <name>IADR</name>
          <description>I2C Address Register</description>
          <addressOffset>0</addressOffset>
          <size>16</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFF</resetMask>
          <fields>
            <field>
              <name>ADR</name>
              <description>Slave address</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>7</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>IFDR</name>
          <description>I2C Frequency Divider Register</description>
          <addressOffset>0x4</addressOffset>
          <size>16</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFF</resetMask>
          <fields>
            <field>
              <name>IC</name>
              <description>I2C clock rate</description>
              <bitOffset>0</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>I2CR</name>
          <description>I2C Control Register</description>
          <addressOffset>0x8</addressOffset>
          <size>16</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFF</resetMask>
          <fields>
            <field>
              <name>RSTA</name>
              <description>Repeat start</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>write-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RSTA_0</name>
                  <description>No repeat start</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RSTA_1</name>
                  <description>Generates a Repeated Start condition</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TXAK</name>
              <description>Transmit acknowledge enable</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TXAK_0</name>
                  <description>An acknowledge signal is sent to the bus at the ninth clock bit after receiving one byte of data.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TXAK_1</name>
                  <description>No acknowledge signal response is sent (that is, the acknowledge bit = 1).</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>MTX</name>
              <description>Transmit/Receive mode select bit. Selects the direction of master and slave transfers.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>MTX_0</name>
                  <description>Receive.When a slave is addressed, the software should set MTX according to the slave read/write bit in the I2C status register (I2C_I2SR[SRW]).</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MTX_1</name>
                  <description>Transmit.In Master mode, MTX should be set according to the type of transfer required. Therefore, for address cycles, MTX is always 1.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>MSTA</name>
              <description>Master/Slave mode select bit</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>MSTA_0</name>
                  <description>Slave mode. Changing MSTA from 1 to 0 generates a Stop and selects Slave mode.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MSTA_1</name>
                  <description>Master mode. Changing MSTA from 0 to 1 signals a Start on the bus and selects Master mode.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>IIEN</name>
              <description>I2C interrupt enable</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>IIEN_0</name>
                  <description>I2C interrupts are disabled, but the status flag I2C_I2SR[IIF] continues to be set when an Interrupt condition occurs.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>IIEN_1</name>
                  <description>I2C interrupts are enabled. An I2C interrupt occurs if I2C_I2SR[IIF] is also set.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>IEN</name>
              <description>I2C enable</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>IEN_0</name>
                  <description>The block is disabled, but registers can still be accessed.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>IEN_1</name>
                  <description>The I2C is enabled. This bit must be set before any other I2C_I2CR bits have an effect.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>I2SR</name>
          <description>I2C Status Register</description>
          <addressOffset>0xC</addressOffset>
          <size>16</size>
          <access>read-write</access>
          <resetValue>0x81</resetValue>
          <resetMask>0xFFFF</resetMask>
          <fields>
            <field>
              <name>RXAK</name>
              <description>Received acknowledge</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RXAK_0</name>
                  <description>An &quot;acknowledge&quot; signal was received after the completion of an 8-bit data transmission on the bus.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RXAK_1</name>
                  <description>A &quot;No acknowledge&quot; signal was detected at the ninth clock.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>IIF</name>
              <description>I2C interrupt</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>IIF_0</name>
                  <description>No I2C interrupt pending.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>IIF_1</name>
                  <description>An interrupt is pending.This causes a processor interrupt request (if the interrupt enable is asserted [IIEN = 1]). The interrupt is set when one of the following occurs: One byte transfer is completed (the interrupt is set at the falling edge of the ninth clock). An address is received that matches its own specific address in Slave Receive mode. Arbitration is lost.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SRW</name>
              <description>Slave read/write</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRW_0</name>
                  <description>Slave receive, master writing to slave</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRW_1</name>
                  <description>Slave transmit, master reading from slave</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>IAL</name>
              <description>Arbitration lost</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>IAL_0</name>
                  <description>No arbitration lost.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>IAL_1</name>
                  <description>Arbitration is lost.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>IBB</name>
              <description>I2C bus busy bit</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>IBB_0</name>
                  <description>Bus is idle. If a Stop signal is detected, IBB is cleared.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>IBB_1</name>
                  <description>Bus is busy. When Start is detected, IBB is set.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>IAAS</name>
              <description>I2C addressed as a slave bit</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>IAAS_0</name>
                  <description>Not addressed</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>IAAS_1</name>
                  <description>Addressed as a slave. Set when its own address (I2C_IADR) matches the calling address.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ICF</name>
              <description>Data transferring bit. While one byte of data is transferred, ICF is cleared.</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ICF_0</name>
                  <description>Transfer is in progress.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ICF_1</name>
                  <description>Transfer is complete. This bit is set by the falling edge of the ninth clock of the last byte transfer.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>I2DR</name>
          <description>I2C Data I/O Register</description>
          <addressOffset>0x10</addressOffset>
          <size>16</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFF</resetMask>
          <fields>
            <field>
              <name>DATA</name>
              <description>Data Byte</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
      </registers>
    </peripheral>
    <peripheral derivedFrom="I2C1">
      <name>I2C2</name>
      <description>I2C</description>
      <groupName>I2C</groupName>
      <prependToName>I2C2_</prependToName>
      <baseAddress>0x21A4000</baseAddress>
      <addressBlock>
        <offset>0</offset>
        <size>0x12</size>
        <usage>registers</usage>
      </addressBlock>
      <interrupt>
        <name>I2C2</name>
        <value>69</value>
      </interrupt>
    </peripheral>
    <peripheral derivedFrom="I2C1">
      <name>I2C3</name>
      <description>I2C</description>
      <groupName>I2C</groupName>
      <prependToName>I2C3_</prependToName>
      <baseAddress>0x21A8000</baseAddress>
      <addressBlock>
        <offset>0</offset>
        <size>0x12</size>
        <usage>registers</usage>
      </addressBlock>
      <interrupt>
        <name>I2C3</name>
        <value>70</value>
      </interrupt>
    </peripheral>
    <peripheral derivedFrom="I2C1">
      <name>I2C4</name>
      <description>I2C</description>
      <groupName>I2C</groupName>
      <prependToName>I2C4_</prependToName>
      <baseAddress>0x21F8000</baseAddress>
      <addressBlock>
        <offset>0</offset>
        <size>0x12</size>
        <usage>registers</usage>
      </addressBlock>
      <interrupt>
        <name>I2C4</name>
        <value>67</value>
      </interrupt>
    </peripheral>
    <peripheral>
      <name>ROMC</name>
      <description>ROMC</description>
      <groupName>ROMC</groupName>
      <prependToName>ROMC_</prependToName>
      <baseAddress>0x21AC000</baseAddress>
      <addressBlock>
        <offset>0</offset>
        <size>0x20C</size>
        <usage>registers</usage>
      </addressBlock>
      <registers>
        <register>
          <dim>8</dim>
          <dimIncrement>0x4</dimIncrement>
          <dimIndex>7,6,5,4,3,2,1,0</dimIndex>
          <name>ROMPATCH%sD</name>
          <description>ROMC Data Registers</description>
          <addressOffset>0xD4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATAX</name>
              <description>Data Fix Registers - Stores the data used for 1-word data fix operations</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ROMPATCHCNTL</name>
          <description>ROMC Control Register</description>
          <addressOffset>0xF4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x8400000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATAFIX</name>
              <description>Data Fix Enable - Controls the use of the first 8 address comparators for 1-word data fix or for code patch routine</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DATAFIX_0</name>
                  <description>Address comparator triggers a opcode patch</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DATAFIX_1</name>
                  <description>Address comparator triggers a data fix</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DIS</name>
              <description>ROMC Disable -- This bit, when set, disables all ROMC operations</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DIS_0</name>
                  <description>Does not affect any ROMC functions (default)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DIS_1</name>
                  <description>Disable all ROMC functions: data fixing, and opcode patching</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>ROMPATCHENH</name>
          <description>ROMC Enable Register High</description>
          <addressOffset>0xF8</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
        </register>
        <register>
          <name>ROMPATCHENL</name>
          <description>ROMC Enable Register Low</description>
          <addressOffset>0xFC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ENABLE</name>
              <description>Enable Address Comparator - This bit enables the corresponding address comparator to trigger an event</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ENABLE_0</name>
                  <description>Address comparator disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLE_1</name>
                  <description>Address comparator enabled, ROMC will trigger a opcode patch or data fix event upon matching of the associated address</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <dim>16</dim>
          <dimIncrement>0x4</dimIncrement>
          <name>ROMPATCH%sA</name>
          <description>ROMC Address Registers</description>
          <addressOffset>0x100</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>THUMBX</name>
              <description>THUMB Comparator Select - Indicates that this address will trigger a THUMB opcode patch or an ARM opcode patch</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>THUMBX_0</name>
                  <description>ARM patch</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>THUMBX_1</name>
                  <description>THUMB patch (ignore if data fix)</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ADDRX</name>
              <description>Address Comparator Registers - Indicates the memory address to be watched</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>22</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ROMPATCHSR</name>
          <description>ROMC Status Register</description>
          <addressOffset>0x208</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SOURCE</name>
              <description>ROMC Source Number - Binary encoding of the number of the address comparator which has an address match in the most recent patch event on ROMC AHB</description>
              <bitOffset>0</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SOURCE_0</name>
                  <description>Address Comparator 0 matched</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SOURCE_1</name>
                  <description>Address Comparator 1 matched</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SOURCE_15</name>
                  <description>Address Comparator 15 matched</description>
                  <value>0xF</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SW</name>
              <description>ROMC AHB Multiple Address Comparator matches Indicator - Indicates that multiple address comparator matches occurred</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SW_0</name>
                  <description>no event or comparator collisions</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SW_1</name>
                  <description>a collision has occurred</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
      </registers>
    </peripheral>
    <peripheral>
      <name>MMDC</name>
      <description>MMDC</description>
      <groupName>MMDC</groupName>
      <prependToName>MMDC_</prependToName>
      <baseAddress>0x21B0000</baseAddress>
      <addressBlock>
        <offset>0</offset>
        <size>0x8C4</size>
        <usage>registers</usage>
      </addressBlock>
      <registers>
        <register>
          <name>MDCTL</name>
          <description>MMDC Core Control Register</description>
          <addressOffset>0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x3110000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DSIZ</name>
              <description>DDR data bus size. This field determines the size of the data bus of the DDR memory</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSIZ_0</name>
                  <description>16-bit data bus</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BL</name>
              <description>Burst Length</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>BL_0</name>
                  <description>Burst Length 4 is used</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BL_1</name>
                  <description>Burst Length 8 is used</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>COL</name>
              <description>Column Address Width</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>COL_0</name>
                  <description>9 bits column</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>COL_1</name>
                  <description>10 bits column</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>COL_2</name>
                  <description>11 bits column</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>COL_3</name>
                  <description>8 bits column</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>COL_4</name>
                  <description>12 bits column</description>
                  <value>0x4</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ROW</name>
              <description>Row Address Width</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ROW_0</name>
                  <description>11 bits Row</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ROW_1</name>
                  <description>12 bits Row</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ROW_2</name>
                  <description>13 bits Row</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ROW_3</name>
                  <description>14 bits Row</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ROW_4</name>
                  <description>15 bits Row</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ROW_5</name>
                  <description>16 bits Row</description>
                  <value>0x5</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SDE_1</name>
              <description>MMDC Enable CS1</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SDE_1_0</name>
                  <description>Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SDE_1_1</name>
                  <description>Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SDE_0</name>
              <description>MMDC Enable CS0</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SDE_0_0</name>
                  <description>Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SDE_0_1</name>
                  <description>Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>MDPDC</name>
          <description>MMDC Core Power Down Control Register</description>
          <addressOffset>0x4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x30012</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>tCKSRE</name>
              <description>Valid clock cycles after self-refresh entry</description>
              <bitOffset>0</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>tCKSRE_0</name>
                  <description>0 cycle</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tCKSRE_1</name>
                  <description>1 cycles</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tCKSRE_6</name>
                  <description>6 cycles</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tCKSRE_7</name>
                  <description>7 cycles</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>tCKSRX</name>
              <description>Valid clock cycles before self-refresh exit</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>tCKSRX_0</name>
                  <description>0 cycle</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tCKSRX_1</name>
                  <description>1 cycles</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tCKSRX_6</name>
                  <description>6 cycles</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tCKSRX_7</name>
                  <description>7 cycles</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BOTH_CS_PD</name>
              <description>Parallel power down entry to both chip selects</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>BOTH_CS_PD_0</name>
                  <description>Each chip select can enter power down independently according to its configuration.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BOTH_CS_PD_1</name>
                  <description>Chip selects can enter power down only if the amount of idle cycles of both chip selects was obtained.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SLOW_PD</name>
              <description>Slow/fast power down</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SLOW_PD_0</name>
                  <description>Fast mode.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SLOW_PD_1</name>
                  <description>Slow mode.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PWDT_0</name>
              <description>Power Down Timer - Chip Select 0</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PWDT_1</name>
              <description>Power Down Timer - Chip Select 1</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>tCKE</name>
              <description>CKE minimum pulse width. This field determines the minimum pulse width of CKE.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>tCKE_0</name>
                  <description>1 cycle</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tCKE_1</name>
                  <description>2 cycles</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tCKE_6</name>
                  <description>7 cycles</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tCKE_7</name>
                  <description>8 cycles</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PRCT_0</name>
              <description>Precharge Timer - Chip Select 0</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PRCT_1</name>
              <description>Precharge Timer - Chip Select 1</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>MDOTC</name>
          <description>MMDC Core ODT Timing Control Register</description>
          <addressOffset>0x8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x12272000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>tODT_idle_off</name>
              <description>ODT turn off latency</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>tODT_idle_off_0</name>
                  <description>0 cycle (turned off at the earliest possible time)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tODT_idle_off_1</name>
                  <description>1 cycle</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tODT_idle_off_2</name>
                  <description>2 cycles</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tODT_idle_off_30</name>
                  <description>30 cycles</description>
                  <value>0x1E</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tODT_idle_off_31</name>
                  <description>31 cycles</description>
                  <value>0x1F</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>tODTLon</name>
              <description>ODT turn on latency</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>tODTLon_0</name>
                  <description>- 0x1 Reserved</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tODTLon_2</name>
                  <description>2 cycles</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tODTLon_3</name>
                  <description>3 cycles</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tODTLon_4</name>
                  <description>4 cycles</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tODTLon_5</name>
                  <description>5 cycles</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tODTLon_6</name>
                  <description>6 cycles</description>
                  <value>0x6</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>tAXPD</name>
              <description>Asynchronous ODT to power down exit delay</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>tAXPD_0</name>
                  <description>1 clock</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tAXPD_1</name>
                  <description>2 clocks</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tAXPD_2</name>
                  <description>3 clocks</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tAXPD_14</name>
                  <description>15 clocks</description>
                  <value>0xE</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tAXPD_15</name>
                  <description>16 clocks</description>
                  <value>0xF</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>tANPD</name>
              <description>Asynchronous ODT to power down entry delay</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>tANPD_0</name>
                  <description>1 clock</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tANPD_1</name>
                  <description>2 clocks</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tANPD_2</name>
                  <description>3 clocks</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tANPD_14</name>
                  <description>15 clocks</description>
                  <value>0xE</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tANPD_15</name>
                  <description>16 clocks</description>
                  <value>0xF</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>tAONPD</name>
              <description>Asynchronous RTT turn-on delay (power down with DLL frozen)</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>tAONPD_0</name>
                  <description>1 cycle</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tAONPD_1</name>
                  <description>2 cycles</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tAONPD_6</name>
                  <description>7 cycles</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tAONPD_7</name>
                  <description>8 cycles</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>tAOFPD</name>
              <description>Asynchronous RTT turn-off delay (power down with DLL frozen)</description>
              <bitOffset>0x1B</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>tAOFPD_0</name>
                  <description>1 cycle</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tAOFPD_1</name>
                  <description>2 cycles</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tAOFPD_6</name>
                  <description>7 cycles</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tAOFPD_7</name>
                  <description>8 cycles</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>MDCFG0</name>
          <description>MMDC Core Timing Configuration Register 0</description>
          <addressOffset>0xC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x323622D3</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>tCL</name>
              <description>CAS Read Latency</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>tCL_0</name>
                  <description>3 cycles</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tCL_1</name>
                  <description>4 cycles</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tCL_2</name>
                  <description>5 cycles</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tCL_3</name>
                  <description>6 cycles</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tCL_4</name>
                  <description>7 cycles</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tCL_5</name>
                  <description>8 cycles</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tCL_6</name>
                  <description>9 cycles</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tCL_7</name>
                  <description>10 cycles</description>
                  <value>0x7</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tCL_8</name>
                  <description>11 cycles</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tCL_9</name>
                  <description>- 0xF Reserved</description>
                  <value>0x9</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>tFAW</name>
              <description>Four Active Window (all banks)</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>tFAW_0</name>
                  <description>1 clock</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tFAW_1</name>
                  <description>2 clocks</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tFAW_2</name>
                  <description>3 clocks</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tFAW_30</name>
                  <description>31 clocks</description>
                  <value>0x1E</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tFAW_31</name>
                  <description>32 clocks</description>
                  <value>0x1F</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>tXPDLL</name>
              <description>Exit precharge power down with DLL frozen to commands requiring DLL</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>tXPDLL_0</name>
                  <description>1 clock</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tXPDLL_1</name>
                  <description>2 clocks</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tXPDLL_2</name>
                  <description>3 clocks</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tXPDLL_14</name>
                  <description>15 clocks</description>
                  <value>0xE</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tXPDLL_15</name>
                  <description>16 clocks</description>
                  <value>0xF</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>tXP</name>
              <description>Exit power down with DLL-on to any valid command</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>tXP_0</name>
                  <description>1 cycle</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tXP_1</name>
                  <description>2 cycles</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tXP_6</name>
                  <description>7 cycles</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tXP_7</name>
                  <description>8 cycles</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>tXS</name>
              <description>Exit self refresh to non READ command</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>tXS_0</name>
                  <description>- 0x15 reserved</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tXS_22</name>
                  <description>23 clocks</description>
                  <value>0x16</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tXS_23</name>
                  <description>24 clocks</description>
                  <value>0x17</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tXS_254</name>
                  <description>255 clocks</description>
                  <value>0xFE</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tXS_255</name>
                  <description>256 clocks</description>
                  <value>0xFF</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>tRFC</name>
              <description>Refresh command to Active or Refresh command time</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>tRFC_0</name>
                  <description>1 clock</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tRFC_1</name>
                  <description>2 clocks</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tRFC_2</name>
                  <description>3 clocks</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tRFC_254</name>
                  <description>255 clocks</description>
                  <value>0xFE</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tRFC_255</name>
                  <description>256 clocks</description>
                  <value>0xFF</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>MDCFG1</name>
          <description>MMDC Core Timing Configuration Register 1</description>
          <addressOffset>0x10</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0xB6B18A23</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>tCWL</name>
              <description>CAS Write Latency</description>
              <bitOffset>0</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>tCWL_0</name>
                  <description>2 cycles (DDR2/DDR3) , 1 cycles (LPDDR2/LPDDR3)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tCWL_1</name>
                  <description>3 cycles (DDR2/DDR3) , 2 cycles (LPDDR2/LPDDR3)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tCWL_2</name>
                  <description>4 cycles (DDR2/DDR3) , 3 cycles (LPDDR2/LPDDR3)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tCWL_3</name>
                  <description>5 cycles (DDR2/DDR3) , 4 cycles (LPDDR2/LPDDR3)</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tCWL_4</name>
                  <description>6 cycles (DDR2/DDR3) , 5 cycles (LPDDR2/LPDDR3)</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tCWL_5</name>
                  <description>7 cycles (DDR2/DDR3) , 6 cycles (LPDDR2/LPDDR3)</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tCWL_6</name>
                  <description>8 cycles (DDR2/DDR3) , 7 cycles (LPDDR2/LPDDR3)</description>
                  <value>0x6</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>tMRD</name>
              <description>Mode Register Set command cycle (all banks)</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>tMRD_0</name>
                  <description>1 clock</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tMRD_1</name>
                  <description>2 clocks</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tMRD_2</name>
                  <description>3 clocks</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tMRD_14</name>
                  <description>15 clocks</description>
                  <value>0xE</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tMRD_15</name>
                  <description>16 clocks</description>
                  <value>0xF</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>tWR</name>
              <description>WRITE recovery time (same bank)</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>tWR_0</name>
                  <description>1cycle</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tWR_1</name>
                  <description>2cycles</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tWR_2</name>
                  <description>3cycles</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tWR_3</name>
                  <description>4cycles</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tWR_4</name>
                  <description>5cycles</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tWR_5</name>
                  <description>6cycles</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tWR_6</name>
                  <description>7cycles</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tWR_7</name>
                  <description>8 cycles</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>tRPA</name>
              <description>Precharge-all command period</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>tRPA_0</name>
                  <description>Will be equal to: tRP.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tRPA_1</name>
                  <description>Will be equal to: tRP+1.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>tRAS</name>
              <description>Active to Precharge command period (same bank)</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>tRAS_0</name>
                  <description>1 clock</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tRAS_1</name>
                  <description>2 clocks</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tRAS_2</name>
                  <description>3 clocks</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tRAS_30</name>
                  <description>31 clocks</description>
                  <value>0x1E</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>tRC</name>
              <description>Active to Active or Refresh command period (same bank)</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>tRC_0</name>
                  <description>1 clock</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tRC_1</name>
                  <description>2 clocks</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tRC_2</name>
                  <description>3 clocks</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tRC_30</name>
                  <description>31 clocks</description>
                  <value>0x1E</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tRC_31</name>
                  <description>32 clocks</description>
                  <value>0x1F</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>tRP</name>
              <description>Precharge command period (same bank)</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>tRP_0</name>
                  <description>1 clock</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tRP_1</name>
                  <description>2 clocks</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tRP_2</name>
                  <description>3 clocks</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tRP_3</name>
                  <description>4 clocks</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tRP_4</name>
                  <description>5 clocks</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tRP_5</name>
                  <description>6 clocks</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tRP_6</name>
                  <description>7 clocks</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tRP_7</name>
                  <description>8 clocks</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>tRCD</name>
              <description>Active command to internal read or write delay time (same bank)</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>tRCD_0</name>
                  <description>1 clock</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tRCD_1</name>
                  <description>2 clocks</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tRCD_2</name>
                  <description>3 clocks</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tRCD_3</name>
                  <description>4 clocks</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tRCD_4</name>
                  <description>5 clocks</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tRCD_5</name>
                  <description>6 clocks</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tRCD_6</name>
                  <description>7 clocks</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tRCD_7</name>
                  <description>8 clocks</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>MDCFG2</name>
          <description>MMDC Core Timing Configuration Register 2</description>
          <addressOffset>0x14</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0xC70092</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>tRRD</name>
              <description>Active to Active command period (all banks)</description>
              <bitOffset>0</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>tRRD_0</name>
                  <description>1cycle</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tRRD_1</name>
                  <description>2cycles</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tRRD_2</name>
                  <description>3cycles</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tRRD_3</name>
                  <description>4cycles</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tRRD_4</name>
                  <description>5cycles</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tRRD_5</name>
                  <description>6cycles</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tRRD_6</name>
                  <description>7cycles</description>
                  <value>0x6</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>tWTR</name>
              <description>Internal WRITE to READ command delay (same bank)</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>tWTR_0</name>
                  <description>1cycle</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tWTR_1</name>
                  <description>2cycles</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tWTR_2</name>
                  <description>3cycles</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tWTR_3</name>
                  <description>4cycles</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tWTR_4</name>
                  <description>5cycles</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tWTR_5</name>
                  <description>6cycles</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tWTR_6</name>
                  <description>7cycles</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tWTR_7</name>
                  <description>8 cycles</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>tRTP</name>
              <description>Internal READ command to Precharge command delay (same bank)</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>tRTP_0</name>
                  <description>1cycle</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tRTP_1</name>
                  <description>2cycles</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tRTP_2</name>
                  <description>3cycles</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tRTP_3</name>
                  <description>4cycles</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tRTP_4</name>
                  <description>5cycles</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tRTP_5</name>
                  <description>6cycles</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tRTP_6</name>
                  <description>7cycles</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tRTP_7</name>
                  <description>8 cycles</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>tDLLK</name>
              <description>DLL locking time</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>9</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>tDLLK_0</name>
                  <description>1 cycle.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tDLLK_1</name>
                  <description>2 cycles.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tDLLK_2</name>
                  <description>3 cycles.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tDLLK_199</name>
                  <description>200 cycles</description>
                  <value>0xC7</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tDLLK_510</name>
                  <description>511 cycles.</description>
                  <value>0x1FE</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tDLLK_511</name>
                  <description>512 cycles (JEDEC value for DDR3).</description>
                  <value>0x1FF</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>MDMISC</name>
          <description>MMDC Core Miscellaneous Register</description>
          <addressOffset>0x18</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x1600</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RST</name>
              <description>Software Reset</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RST_0</name>
                  <description>Do nothing.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RST_1</name>
                  <description>Assert reset to the MMDC.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DDR_TYPE</name>
              <description>DDR TYPE. This field determines the type of the external DDR device.</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DDR_TYPE_0</name>
                  <description>DDR3 device is used.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DDR_TYPE_1</name>
                  <description>LPDDR2 device is used.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DDR_4_BANK</name>
              <description>Number of banks per DDR device</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DDR_4_BANK_0</name>
                  <description>8 banks device is being used. (Default)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DDR_4_BANK_1</name>
                  <description>4 banks device is being used</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RALAT</name>
              <description>Read Additional Latency</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RALAT_0</name>
                  <description>no additional latency.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RALAT_1</name>
                  <description>1 cycle additional latency.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RALAT_2</name>
                  <description>2 cycles additional latency.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RALAT_3</name>
                  <description>3 cycles additional latency.</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RALAT_4</name>
                  <description>4 cycles additional latency.</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RALAT_5</name>
                  <description>5 cycles additional latency.</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RALAT_6</name>
                  <description>6 cycles additional latency.</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RALAT_7</name>
                  <description>7 cycles additional latency.</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>MIF3_MODE</name>
              <description>Command prediction working mode</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>MIF3_MODE_0</name>
                  <description>Disable prediction.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MIF3_MODE_1</name>
                  <description>Enable prediction based on : Valid access on first pipe line stage.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MIF3_MODE_2</name>
                  <description>Enable prediction based on: Valid access on first pipe line stage, Valid access on axi bus.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MIF3_MODE_3</name>
                  <description>Enable prediction based on: Valid access on first pipe line stage, Valid access on axi bus, Next miss access from access queue.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>LPDDR2_S2</name>
              <description>LPDDR2 S2 device type indication</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LPDDR2_S2_0</name>
                  <description>LPDDR2-S4 device is used.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LPDDR2_S2_1</name>
                  <description>LPDDR2-S2 device is used.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BI_ON</name>
              <description>Bank Interleaving On</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>BI_ON_0</name>
                  <description>Banks are not interleaved, and address will be decoded as bank-row-column</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BI_ON_1</name>
                  <description>Banks are interleaved, and address will be decoded as row-bank-column</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WALAT</name>
              <description>Write Additional latency</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>WALAT_0</name>
                  <description>No additional latency required.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WALAT_1</name>
                  <description>1 cycle additional delay</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WALAT_2</name>
                  <description>2 cycles additional delay</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WALAT_3</name>
                  <description>3 cycles additional delay</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>LHD</name>
              <description>Latency hiding disable</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LHD_0</name>
                  <description>Latency hiding on.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LHD_1</name>
                  <description>Latency hiding disable.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ADDR_MIRROR</name>
              <description>Address mirroring</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ADDR_MIRROR_0</name>
                  <description>Address mirroring disabled.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ADDR_MIRROR_1</name>
                  <description>Address mirroring enabled.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CALIB_PER_CS</name>
              <description>Number of chip-select for calibration process</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CALIB_PER_CS_0</name>
                  <description>Calibration is targetted to CS0</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CALIB_PER_CS_1</name>
                  <description>Calibration is targetted to CS1</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CK1_GATING</name>
              <description>Gating the secondary DDR clock</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CK1_GATING_0</name>
                  <description>MMDC drives two clocks toward the DDR memory</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CK1_GATING_1</name>
                  <description>MMDC drives only one clock toward the DDR memory (CK0)</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CS1_RDY</name>
              <description>External status device on CS1</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CS1_RDY_0</name>
                  <description>Device in wake-up period.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CS1_RDY_1</name>
                  <description>Device is ready for initialization.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CS0_RDY</name>
              <description>External status device on CS0</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CS0_RDY_0</name>
                  <description>Device in wake-up period.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CS0_RDY_1</name>
                  <description>Device is ready for initialization.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>MDSCR</name>
          <description>MMDC Core Special Command Register</description>
          <addressOffset>0x1C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>CMD_BA</name>
              <description>Bank Address</description>
              <bitOffset>0</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CMD_BA_0</name>
                  <description>bank address 0</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CMD_BA_1</name>
                  <description>bank address 1</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CMD_BA_2</name>
                  <description>bank address 2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CMD_BA_7</name>
                  <description>bank address 7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CMD_CS</name>
              <description>Chip Select. This field determines which chip select the command is targeted to</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CMD_CS_0</name>
                  <description>to Chip-select 0</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CMD_CS_1</name>
                  <description>to Chip-select 1</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CMD</name>
              <description>Command</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CMD_0</name>
                  <description>Normal operation</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CMD_2</name>
                  <description>Auto-Refresh Command (set correct CMD_CS).</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CMD_3</name>
                  <description>Load Mode Register Command DDR2/DDR3, set correct CMD_CS, CMD_BA, CMD_ADDR_LSB, CMD_ADDR_MSB), MRW Command (LPDDR2/LPDDR3, set correct CMD_CS, MR_OP, MR_ADDR)</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CMD_4</name>
                  <description>ZQ calibration (DDR2/DDR3, set correct CMD_CS, {CMD_ADDR_MSB,CMD_ADDR_LSB} = 0x400 or 0x0 )</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CMD_5</name>
                  <description>Precharge all, only if banks open (set correct CMD_CS).</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CMD_6</name>
                  <description>MRR command (LPDDR2/LPDDR3, set correct CMD_CS, MR_ADDR)</description>
                  <value>0x6</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WL_EN</name>
              <description>DQS pads direction</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>WL_EN_0</name>
                  <description>Exit write leveling mode or stay in normal mode.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WL_EN_1</name>
                  <description>Write leveling entry command was sent.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>MRR_READ_DATA_VALID</name>
              <description>MRR read data valid</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>MRR_READ_DATA_VALID_0</name>
                  <description>Cleared upon the assertion of MRR command</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MRR_READ_DATA_VALID_1</name>
                  <description>Set after MRR data is valid and stored at MDMRR register.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CON_ACK</name>
              <description>Configuration acknowledge</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CON_ACK_0</name>
                  <description>Configuration of MMDC registers is forbidden.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CON_ACK_1</name>
                  <description>Configuration of MMDC registers is permitted.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CON_REQ</name>
              <description>Configuration request</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CON_REQ_0</name>
                  <description>No request to configure MMDC.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CON_REQ_1</name>
                  <description>A request to configure MMDC is valid</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CMD_ADDR_LSB_MR_ADDR</name>
              <description>Command/Address LSB</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CMD_ADDR_MSB_MR_OP</name>
              <description>Command/Address MSB</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>MDREF</name>
          <description>MMDC Core Refresh Control Register</description>
          <addressOffset>0x20</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0xC000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>START_REF</name>
              <description>Manual start of refresh cycle</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>START_REF_0</name>
                  <description>Do nothing.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>START_REF_1</name>
                  <description>Start a refresh cycle.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>REFR</name>
              <description>Refresh Rate</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>REFR_0</name>
                  <description>1 refresh</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REFR_1</name>
                  <description>2 refreshes</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REFR_2</name>
                  <description>3 refreshes</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REFR_3</name>
                  <description>4 refreshes</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REFR_4</name>
                  <description>5 refreshes</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REFR_5</name>
                  <description>6 refreshes</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REFR_6</name>
                  <description>7 refreshes</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REFR_7</name>
                  <description>8 refreshes</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>REF_SEL</name>
              <description>Refresh Selector. This bit selects the source of the clock that will trigger each refresh cycle:</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>REF_SEL_0</name>
                  <description>Periodic refresh cycles will be triggered in frequency of 64KHz.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REF_SEL_1</name>
                  <description>Periodic refresh cycles will be triggered in frequency of 32KHz.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REF_SEL_2</name>
                  <description>Periodic refresh cycles will be triggered every amount of cycles that are configured in REF_CNT field.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REF_SEL_3</name>
                  <description>No refresh cycles will be triggered.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>REF_CNT</name>
              <description>Refresh Counter at DDR clock period If REF_SEL equals '2' a refresh cycle will begin every amount of DDR cycles configured in this field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>REF_CNT_1</name>
                  <description>1 cycle.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REF_CNT_65534</name>
                  <description>65534 cycles.</description>
                  <value>0xFFFE</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REF_CNT_65535</name>
                  <description>65535 cycles.</description>
                  <value>0xFFFF</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>MDRWD</name>
          <description>MMDC Core Read/Write Command Delay Register</description>
          <addressOffset>0x2C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0xF9F26D2</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RTR_DIFF</name>
              <description>Read to read delay for different chip-select</description>
              <bitOffset>0</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RTR_DIFF_0</name>
                  <description>0 cycle</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RTR_DIFF_1</name>
                  <description>1 cycle</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RTR_DIFF_2</name>
                  <description>2 cycles (Default)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RTR_DIFF_3</name>
                  <description>3 cycles</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RTR_DIFF_4</name>
                  <description>4 cycles</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RTR_DIFF_5</name>
                  <description>5 cycles</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RTR_DIFF_6</name>
                  <description>6 cycles</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RTR_DIFF_7</name>
                  <description>7 cycles</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RTW_DIFF</name>
              <description>Read to write delay for different chip-select</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RTW_DIFF_0</name>
                  <description>0 cycle</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RTW_DIFF_1</name>
                  <description>1 cycle</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RTW_DIFF_2</name>
                  <description>2 cycles (Default)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RTW_DIFF_3</name>
                  <description>3 cycles</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RTW_DIFF_4</name>
                  <description>4 cycles</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RTW_DIFF_5</name>
                  <description>5 cycles</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RTW_DIFF_6</name>
                  <description>6 cycles</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RTW_DIFF_7</name>
                  <description>7 cycles</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WTW_DIFF</name>
              <description>Write to write delay for different chip-select</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>WTW_DIFF_0</name>
                  <description>0 cycle</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WTW_DIFF_1</name>
                  <description>1 cycle</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WTW_DIFF_2</name>
                  <description>2 cycles</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WTW_DIFF_3</name>
                  <description>3 cycles (Default)</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WTW_DIFF_4</name>
                  <description>4 cycles</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WTW_DIFF_5</name>
                  <description>5 cycles</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WTW_DIFF_6</name>
                  <description>6 cycles</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WTW_DIFF_7</name>
                  <description>7 cycles</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WTR_DIFF</name>
              <description>Write to read delay for different chip-select</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>WTR_DIFF_0</name>
                  <description>0 cycle</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WTR_DIFF_1</name>
                  <description>1 cycle</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WTR_DIFF_2</name>
                  <description>2 cycles</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WTR_DIFF_3</name>
                  <description>3 cycles (Default)</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WTR_DIFF_4</name>
                  <description>4 cycles</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WTR_DIFF_5</name>
                  <description>5 cycles</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WTR_DIFF_6</name>
                  <description>6 cycles</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WTR_DIFF_7</name>
                  <description>7 cycles</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RTW_SAME</name>
              <description>Read to write delay for the same chip-select</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RTW_SAME_0</name>
                  <description>0 cycle</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RTW_SAME_1</name>
                  <description>1 cycle</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RTW_SAME_2</name>
                  <description>2 cycles (Default)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RTW_SAME_3</name>
                  <description>3 cycles</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RTW_SAME_4</name>
                  <description>4 cycles</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RTW_SAME_5</name>
                  <description>5 cycles</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RTW_SAME_6</name>
                  <description>6 cycles</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RTW_SAME_7</name>
                  <description>7 cycles</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>tDAI</name>
              <description>Device auto initialization period.(maximum) This field is relevant only to LPDDR2 mode</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>13</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>tDAI_0</name>
                  <description>1 cycle</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tDAI_3999</name>
                  <description>4000 cycles (Default, JEDEC value for LPDDR2, gives 10us at 400MHz clock).</description>
                  <value>0xF9F</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tDAI_8191</name>
                  <description>8192 cycles</description>
                  <value>0x1FFF</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>MDOR</name>
          <description>MMDC Core Out of Reset Delays Register</description>
          <addressOffset>0x30</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x9F0E0E</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RST_to_CKE</name>
              <description>DDR3: Time from SDE enable to CKE rise</description>
              <bitOffset>0</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RST_to_CKE_3</name>
                  <description>1 cycles</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RST_to_CKE_16</name>
                  <description>14 cycles (JEDEC value for LPDDR2) - total of 200 us</description>
                  <value>0x10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RST_to_CKE_35</name>
                  <description>33 cycles (JEDEC value for DDR3) - total of 500 us</description>
                  <value>0x23</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RST_to_CKE_62</name>
                  <description>60 cycles</description>
                  <value>0x3E</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RST_to_CKE_63</name>
                  <description>61 cycles</description>
                  <value>0x3F</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SDE_to_RST</name>
              <description>DDR3 mode: Time from SDE enable until DDR reset# is high</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SDE_to_RST_3</name>
                  <description>1 cycles</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SDE_to_RST_4</name>
                  <description>2 cycles</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SDE_to_RST_16</name>
                  <description>14 cycles (JEDEC value for DDR3) - total of 200 us</description>
                  <value>0x10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SDE_to_RST_62</name>
                  <description>60 cycles</description>
                  <value>0x3E</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SDE_to_RST_63</name>
                  <description>61 cycles</description>
                  <value>0x3F</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>tXPR</name>
              <description>DDR2/DDR3: CKE HIGH to a valid command</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>tXPR_1</name>
                  <description>2 cycles</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tXPR_2</name>
                  <description>3 cycles</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tXPR_254</name>
                  <description>255 cycles</description>
                  <value>0xFE</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tXPR_255</name>
                  <description>256 cycles</description>
                  <value>0xFF</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>MDMRR</name>
          <description>MMDC Core MRR Data Register</description>
          <addressOffset>0x34</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MRR_READ_DATA0</name>
              <description>MRR DATA that arrived on DQ[7:0]</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>MRR_READ_DATA1</name>
              <description>MRR DATA that arrived on DQ[15:8]</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>MDCFG3LP</name>
          <description>MMDC Core Timing Configuration Register 3</description>
          <addressOffset>0x38</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>tRPab_LP</name>
              <description>Precharge (all banks) command period. This field is valid only for LPDDR2 memories</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>tRPab_LP_0</name>
                  <description>1 clock</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tRPab_LP_1</name>
                  <description>2 clocks</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tRPab_LP_2</name>
                  <description>3 clocks</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tRPab_LP_14</name>
                  <description>15 clocks</description>
                  <value>0xE</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>tRPpb_LP</name>
              <description>Precharge (per bank) command period (same bank). This field is valid only for LPDDR2 memories</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>tRPpb_LP_0</name>
                  <description>1 clock</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tRPpb_LP_1</name>
                  <description>2 clocks</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tRPpb_LP_2</name>
                  <description>3 clocks</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tRPpb_LP_14</name>
                  <description>15 clocks</description>
                  <value>0xE</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>tRCD_LP</name>
              <description>Active command to internal read or write delay time (same bank)</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>tRCD_LP_0</name>
                  <description>1 clock</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tRCD_LP_1</name>
                  <description>2 clocks</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tRCD_LP_2</name>
                  <description>3 clocks</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tRCD_LP_14</name>
                  <description>15 clocks</description>
                  <value>0xE</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RC_LP</name>
              <description>Active to Active or Refresh command period (same bank)</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RC_LP_0</name>
                  <description>1 clock</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RC_LP_1</name>
                  <description>2 clocks</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RC_LP_2</name>
                  <description>3 clocks</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RC_LP_62</name>
                  <description>63 clocks</description>
                  <value>0x3E</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>MDMR4</name>
          <description>MMDC Core MR4 Derating Register</description>
          <addressOffset>0x3C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>UPDATE_DE_REQ</name>
              <description>Update Derated Values Request</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>UPDATE_DE_REQ_0</name>
                  <description>Do nothing.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>UPDATE_DE_REQ_1</name>
                  <description>Request to update the following values: tRRD, tRCD, tRP, tRC, tRAS and refresh related fields(MDREF register): REF_CNT, REF_SEL, REFR</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>UPDATE_DE_ACK</name>
              <description>Update Derated Values Acknowledge</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>tRCD_DE</name>
              <description>tRCD derating value.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>tRCD_DE_0</name>
                  <description>Original tRCD is used.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tRCD_DE_1</name>
                  <description>tRCD is derated in 1 cycle.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>tRC_DE</name>
              <description>tRC derating value.</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>tRC_DE_0</name>
                  <description>Original tRC is used.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tRC_DE_1</name>
                  <description>tRC is derated in 1 cycle.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>tRAS_DE</name>
              <description>tRAS derating value.</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>tRAS_DE_0</name>
                  <description>Original tRAS is used.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tRAS_DE_1</name>
                  <description>tRAS is derated in 1 cycle.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>tRP_DE</name>
              <description>tRP derating value.</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>tRP_DE_0</name>
                  <description>Original tRP is used.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tRP_DE_1</name>
                  <description>tRP is derated in 1 cycle.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>tRRD_DE</name>
              <description>tRRD derating value.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>tRRD_DE_0</name>
                  <description>Original tRRD is used.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>tRRD_DE_1</name>
                  <description>tRRD is derated in 1 cycle.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>MDASP</name>
          <description>MMDC Core Address Space Partition Register</description>
          <addressOffset>0x40</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x3F</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>CS0_END</name>
              <description>CS0_END</description>
              <bitOffset>0</bitOffset>
              <bitWidth>7</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>MAARCR</name>
          <description>MMDC Core AXI Reordering Control Register</description>
          <addressOffset>0x400</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x514201F0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ARCR_GUARD</name>
              <description>ARCR Guard</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ARCR_GUARD_0</name>
                  <description>15 (default)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ARCR_GUARD_1</name>
                  <description>16</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ARCR_GUARD_15</name>
                  <description>30</description>
                  <value>0xF</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ARCR_DYN_MAX</name>
              <description>ARCR Dynamic Maximum</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ARCR_DYN_MAX_0</name>
                  <description>0</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ARCR_DYN_MAX_1</name>
                  <description>1</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ARCR_DYN_MAX_15</name>
                  <description>15 (default)</description>
                  <value>0xF</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ARCR_DYN_JMP</name>
              <description>ARCR Dynamic Jump</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ARCR_ACC_HIT</name>
              <description>ARCR Access Hit Rate</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ARCR_PAG_HIT</name>
              <description>ARCR Page Hit Rate</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ARCR_RCH_EN</name>
              <description>This bit defines whether Real time channel is activated and bypassed all other pending accesses, So accesses with QoS=='F' will be granted the highest priority in the optimization/reordering mechanism Default value is 0x1 - encoding 1 (Enabled)</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ARCR_RCH_EN_0</name>
                  <description>normal prioritization, no bypassing</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ARCR_RCH_EN_1</name>
                  <description>accesses with QoS=='F' bypass the arbitration</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ARCR_REO_DIS</name>
              <description>no description available</description>
              <bitOffset>0x19</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ARCR_REO_DIS_0</name>
                  <description>MMDC reordering controls only enabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ARCR_REO_DIS_1</name>
                  <description>MMDC reordering controls only disabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ARCR_ARB_REO_DIS</name>
              <description>no description available</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ARCR_ARB_REO_DIS_0</name>
                  <description>MMDC arbitration and reordering controls enabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ARCR_ARB_REO_DIS_1</name>
                  <description>MMDC arbitration and reordering controls disabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ARCR_EXC_ERR_EN</name>
              <description>This bit defines whether exclusive read/write access violation of AXI 6</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ARCR_EXC_ERR_EN_0</name>
                  <description>violation of AXI exclusive rules (6.2.4) result in OKAY response (rresp/bresp=2'b00)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ARCR_EXC_ERR_EN_1</name>
                  <description>violation of AXI exclusive rules (6.2.4) result in SLAVE Error response (rresp/bresp=2'b10)</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ARCR_SEC_ERR_EN</name>
              <description>This bit defines whether security read/write access violation result in SLV Error response or in OKAY response Default value is 0x1 - encoding 1(response is SLV Error, rresp/bresp=2'b10)</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ARCR_SEC_ERR_EN_0</name>
                  <description>security violation results in OKAY response (rresp/bresp=2'b00)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ARCR_SEC_ERR_EN_1</name>
                  <description>security violation results in SLAVE Error response (rresp/bresp=2'b10)</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ARCR_SEC_ERR_LOCK</name>
              <description>Once set, this bit locks ARCR_SEC_ERR_EN and prevents from its updating</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ARCR_SEC_ERR_LOCK_0</name>
                  <description>ARCR_SEC_ERR_EN is unlocked, so can be updated any moment</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ARCR_SEC_ERR_LOCK_1</name>
                  <description>ARCR_SEC_ERR_EN is locked, so it can't be updated</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>MAPSR</name>
          <description>MMDC Core Power Saving Control and Status Register</description>
          <addressOffset>0x404</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x1007</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>PSD</name>
              <description>Automatic Power Saving Disable</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PSD_0</name>
                  <description>power saving enabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PSD_1</name>
                  <description>power saving disabled (default)</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PSS</name>
              <description>Power Saving Status</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PSS_0</name>
                  <description>not in power saving</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PSS_1</name>
                  <description>power saving</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RIS</name>
              <description>Read Idle Status. This read only bit indicates whether read request buffer is idle (empty) or not.</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RIS_0</name>
                  <description>idle</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RIS_1</name>
                  <description>not idle</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WIS</name>
              <description>Write Idle Status</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>WIS_0</name>
                  <description>idle</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WIS_1</name>
                  <description>not idle</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PST</name>
              <description>Automatic Power saving timer</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PST_1</name>
                  <description>timer is configured to 64 clock cycles.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PST_2</name>
                  <description>timer is configured to 128 clock cycles.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PST_16</name>
                  <description>(Default)- 1024 clock cycles.</description>
                  <value>0x10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PST_255</name>
                  <description>timer clock is configured to 16320 clock cycles.</description>
                  <value>0xFF</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>LPMD</name>
              <description>General LPMD request</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LPMD_0</name>
                  <description>no lpmd request</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LPMD_1</name>
                  <description>lpmd request</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DVFS</name>
              <description>General DVFS request</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DVFS_0</name>
                  <description>no dvfs request</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DVFS_1</name>
                  <description>dvfs request</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>LPACK</name>
              <description>General low-power acknowledge</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>DVACK</name>
              <description>General DVFS acknowledge</description>
              <bitOffset>0x19</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>MAEXIDR0</name>
          <description>MMDC Core Exclusive ID Monitor Register0</description>
          <addressOffset>0x408</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x200000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>EXC_ID_MONITOR0</name>
              <description>This field defines ID for Exclusive monitor#0. Default value is 0x0000</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>EXC_ID_MONITOR1</name>
              <description>This field defines ID for Exclusive monitor#1. Default value is 0x0020</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>MAEXIDR1</name>
          <description>MMDC Core Exclusive ID Monitor Register1</description>
          <addressOffset>0x40C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x600040</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>EXC_ID_MONITOR2</name>
              <description>This field defines ID for Exclusive monitor#2. Default value is 0x0040</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>EXC_ID_MONITOR3</name>
              <description>This field defines ID for Exclusive monitor#3. Default value is 0x0060</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>MADPCR0</name>
          <description>MMDC Core Debug and Profiling Control Register 0</description>
          <addressOffset>0x410</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DBG_EN</name>
              <description>Debug and Profiling Enable</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DBG_EN_0</name>
                  <description>disable</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DBG_EN_1</name>
                  <description>enable</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DBG_RST</name>
              <description>Debug and Profiling Reset. Reset all debug and profiling counters and components.</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DBG_RST_0</name>
                  <description>no reset</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DBG_RST_1</name>
                  <description>reset</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PRF_FRZ</name>
              <description>Profiling freeze</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PRF_FRZ_0</name>
                  <description>profiling counters are not frozen</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PRF_FRZ_1</name>
                  <description>profiling counters are frozen</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CYC_OVF</name>
              <description>Total Profiling Cycles Count Overflow</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CYC_OVF_0</name>
                  <description>no overflow</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CYC_OVF_1</name>
                  <description>overflow</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SBS_EN</name>
              <description>Step By Step debug Enable</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SBS_EN_0</name>
                  <description>disable</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SBS_EN_1</name>
                  <description>enable</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SBS</name>
              <description>Step By Step trigger</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SBS_0</name>
                  <description>No access will be launched toward the DDR</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SBS_1</name>
                  <description>Launch AXI pending access toward the DDR</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>MADPCR1</name>
          <description>MMDC Core Debug and Profiling Control Register 1</description>
          <addressOffset>0x414</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>PRF_AXI_ID</name>
              <description>Profiling AXI ID</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PRF_AXI_IDMASK</name>
              <description>Profiling AXI ID Mask. AXI ID bits which masked by this value are chosen for profiling.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PRF_AXI_IDMASK_0</name>
                  <description>AXI ID specific bit is ignored (don't care)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PRF_AXI_IDMASK_1</name>
                  <description>AXI ID specific bit is chosen for profiling</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>MADPSR0</name>
          <description>MMDC Core Debug and Profiling Status Register 0</description>
          <addressOffset>0x418</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>CYC_COUNT</name>
              <description>Total Profiling cycle Count</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>MADPSR1</name>
          <description>MMDC Core Debug and Profiling Status Register 1</description>
          <addressOffset>0x41C</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BUSY_COUNT</name>
              <description>Profiling Busy Cycles Count</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>MADPSR2</name>
          <description>MMDC Core Debug and Profiling Status Register 2</description>
          <addressOffset>0x420</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RD_ACC_COUNT</name>
              <description>Profiling Read Access Count</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>MADPSR3</name>
          <description>MMDC Core Debug and Profiling Status Register 3</description>
          <addressOffset>0x424</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>WR_ACC_COUNT</name>
              <description>Profiling Write Access Count</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>MADPSR4</name>
          <description>MMDC Core Debug and Profiling Status Register 4</description>
          <addressOffset>0x428</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RD_BYTES_COUNT</name>
              <description>Profiling Read Bytes Count</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>MADPSR5</name>
          <description>MMDC Core Debug and Profiling Status Register 5</description>
          <addressOffset>0x42C</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>WR_BYTES_COUNT</name>
              <description>Profiling Write Bytes Count</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>MASBS0</name>
          <description>MMDC Core Step By Step Address Register</description>
          <addressOffset>0x430</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SBS_ADDR</name>
              <description>Step By Step Address</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>MASBS1</name>
          <description>MMDC Core Step By Step Address Attributes Register</description>
          <addressOffset>0x434</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SBS_VLD</name>
              <description>Step By Step Valid</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SBS_VLD_0</name>
                  <description>not valid</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SBS_VLD_1</name>
                  <description>valid</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SBS_TYPE</name>
              <description>Step By Step Request Type</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SBS_TYPE_0</name>
                  <description>write</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SBS_TYPE_1</name>
                  <description>read</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SBS_LOCK</name>
              <description>Step By Step Lock</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>SBS_PROT</name>
              <description>Step By Step Protection</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>SBS_SIZE</name>
              <description>Step By Step Size</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SBS_SIZE_0</name>
                  <description>8 bits</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SBS_SIZE_1</name>
                  <description>16 bits</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SBS_SIZE_2</name>
                  <description>32 bits</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SBS_SIZE_3</name>
                  <description>64 bits</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SBS_SIZE_4</name>
                  <description>128bits</description>
                  <value>0x4</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SBS_BURST</name>
              <description>Step By Step Burst</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SBS_BURST_0</name>
                  <description>FIXED</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SBS_BURST_1</name>
                  <description>INCR burst</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SBS_BURST_2</name>
                  <description>WRAP burst</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SBS_BUFF</name>
              <description>Step By Step Buffered</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>SBS_LEN</name>
              <description>Step By Step Length</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SBS_LEN_0</name>
                  <description>burst of length 1</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SBS_LEN_1</name>
                  <description>burst of length 2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SBS_LEN_7</name>
                  <description>burst of length 8</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SBS_AXI_ID</name>
              <description>Step By Step AXI ID</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>MAGENP</name>
          <description>MMDC Core General Purpose Register</description>
          <addressOffset>0x440</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>GP31_GP0</name>
              <description>General purpose read/write bits.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>MPZQHWCTRL</name>
          <description>MMDC PHY ZQ HW control register</description>
          <addressOffset>0x800</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0xA1380000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ZQ_MODE</name>
              <description>ZQ calibration mode:</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ZQ_MODE_0</name>
                  <description>No ZQ calibration is issued. (Default)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ZQ_MODE_1</name>
                  <description>ZQ calibration is issued to i.MX ZQ calibration pad together with ZQ long command to the external DDR device only when exiting self refresh.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ZQ_MODE_2</name>
                  <description>ZQ calibration command long/short is issued only to the external DDR device periodically and when exiting self refresh</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ZQ_MODE_3</name>
                  <description>ZQ calibration is issued to i.MX ZQ calibration pad together with ZQ calibration command long/short to the external DDR device periodically and when exiting self refresh</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ZQ_HW_PER</name>
              <description>ZQ periodic calibration time</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ZQ_HW_PER_0</name>
                  <description>ZQ calibration is performed every 1 ms.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ZQ_HW_PER_1</name>
                  <description>ZQ calibration is performed every 2 ms.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ZQ_HW_PER_2</name>
                  <description>ZQ calibration is performed every 4 ms.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ZQ_HW_PER_10</name>
                  <description>ZQ calibration is performed every 1 sec.</description>
                  <value>0xA</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ZQ_HW_PER_14</name>
                  <description>ZQ calibration is performed every 16 sec.</description>
                  <value>0xE</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ZQ_HW_PER_15</name>
                  <description>ZQ calibration is performed every 32 sec.</description>
                  <value>0xF</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ZQ_HW_PU_RES</name>
              <description>ZQ automatic calibration pull-up result</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ZQ_HW_PU_RES_0</name>
                  <description>Min. resistance.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ZQ_HW_PU_RES_31</name>
                  <description>Max. resistance.</description>
                  <value>0x1F</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ZQ_HW_PD_RES</name>
              <description>ZQ HW calibration pull-down result</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ZQ_HW_PD_RES_0</name>
                  <description>Max. resistance.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ZQ_HW_PD_RES_31</name>
                  <description>Min. resistance.</description>
                  <value>0x1F</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ZQ_HW_FOR</name>
              <description>Force ZQ automatic calibration process with the i</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TZQ_INIT</name>
              <description>Device ZQ long/init time</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TZQ_INIT_2</name>
                  <description>128 cycles</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TZQ_INIT_3</name>
                  <description>256 cycles</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TZQ_INIT_4</name>
                  <description>512 cycles - Default (JEDEC value for DDR3)</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TZQ_INIT_5</name>
                  <description>1024 cycles</description>
                  <value>0x5</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TZQ_OPER</name>
              <description>Device ZQ long/oper time</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TZQ_OPER_2</name>
                  <description>128 cycles</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TZQ_OPER_3</name>
                  <description>256 cycles - Default (JEDEC value for DDR3)</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TZQ_OPER_4</name>
                  <description>512 cycles</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TZQ_OPER_5</name>
                  <description>1024 cycles</description>
                  <value>0x5</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TZQ_CS</name>
              <description>Device ZQ short time</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TZQ_CS_2</name>
                  <description>128 cycles (Default)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TZQ_CS_3</name>
                  <description>256 cycles</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TZQ_CS_4</name>
                  <description>512 cycles</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TZQ_CS_5</name>
                  <description>1024 cycles</description>
                  <value>0x5</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ZQ_EARLY_COMPARATOR_EN_TIMER</name>
              <description>ZQ early comparator enable timer</description>
              <bitOffset>0x1B</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ZQ_EARLY_COMPARATOR_EN_TIMER_0</name>
                  <description>- 0x6 Reserved</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ZQ_EARLY_COMPARATOR_EN_TIMER_7</name>
                  <description>8 cycles</description>
                  <value>0x7</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ZQ_EARLY_COMPARATOR_EN_TIMER_20</name>
                  <description>21 cycles (Default)</description>
                  <value>0x14</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ZQ_EARLY_COMPARATOR_EN_TIMER_30</name>
                  <description>31 cycles</description>
                  <value>0x1E</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ZQ_EARLY_COMPARATOR_EN_TIMER_31</name>
                  <description>32 cycles</description>
                  <value>0x1F</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>MPZQSWCTRL</name>
          <description>MMDC PHY ZQ SW control register</description>
          <addressOffset>0x804</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ZQ_SW_FOR</name>
              <description>ZQ SW calibration enable</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ZQ_SW_RES</name>
              <description>ZQ software calibration result. This bit reflects the ZQ calibration voltage comparator value.</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ZQ_SW_RES_0</name>
                  <description>Current ZQ calibration voltage is less than VDD/2.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ZQ_SW_RES_1</name>
                  <description>Current ZQ calibration voltage is more than VDD/2</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ZQ_SW_PU_VAL</name>
              <description>ZQ software pull-up resistence</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ZQ_SW_PU_VAL_0</name>
                  <description>Min. resistance.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ZQ_SW_PU_VAL_31</name>
                  <description>Max. resistance.</description>
                  <value>0x1F</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ZQ_SW_PD_VAL</name>
              <description>ZQ software pull-down resistence</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ZQ_SW_PD_VAL_0</name>
                  <description>Max. resistance.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ZQ_SW_PD_VAL_31</name>
                  <description>Min. resistance.</description>
                  <value>0x1F</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ZQ_SW_PD</name>
              <description>ZQ software PU/PD calibration. This bit determines the calibration stage (PU or PD).</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ZQ_SW_PD_0</name>
                  <description>PU resistor calibration</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ZQ_SW_PD_1</name>
                  <description>PD resistor calibration</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>USE_ZQ_SW_VAL</name>
              <description>Use SW ZQ configured value for I/O pads resistor controls</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>USE_ZQ_SW_VAL_0</name>
                  <description>Fields ZQ_HW_PD_VAL &amp; ZQ_HW_PU_VAL will be driven to I/O pads resistor controls.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>USE_ZQ_SW_VAL_1</name>
                  <description>Fields ZQ_SW_PD_VAL &amp; ZQ_SW_PU_VAL will be driven to I/O pads resistor controls.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ZQ_CMP_OUT_SMP</name>
              <description>Defines the amount of cycles between driving the ZQ signals to the ZQ pad and till sampling the comparator enable output while performing ZQ calibration process with the i</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ZQ_CMP_OUT_SMP_0</name>
                  <description>7 cycles</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ZQ_CMP_OUT_SMP_1</name>
                  <description>15 cycles</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ZQ_CMP_OUT_SMP_2</name>
                  <description>23 cycles</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ZQ_CMP_OUT_SMP_3</name>
                  <description>31 cycles</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>MPWLGCR</name>
          <description>MMDC PHY Write Leveling Configuration and Error Status Register</description>
          <addressOffset>0x808</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>HW_WL_EN</name>
              <description>Write-Leveling HW (automatic) enable</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SW_WL_EN</name>
              <description>Write-Leveling SW enable</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SW_WL_CNT_EN</name>
              <description>SW write-leveling count down enable</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SW_WL_CNT_EN_0</name>
                  <description>MMDC doesn't count 25+15 cycles before issuing write-leveling DQS.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SW_WL_CNT_EN_1</name>
                  <description>MMDC counts 25+15 cycles before issuing write-leveling DQS.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WL_SW_RES0</name>
              <description>Byte0 write-leveling software result</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>WL_SW_RES0_0</name>
                  <description>DQS0 sampled low CK during SW write-leveling.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WL_SW_RES0_1</name>
                  <description>DQS0 sampled high CK during SW write-leveling.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WL_SW_RES1</name>
              <description>Byte1 write-leveling software result</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>WL_SW_RES1_0</name>
                  <description>DQS1 sampled low CK during SW write-leveling.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WL_SW_RES1_1</name>
                  <description>DQS1 sampled high CK during SW write-leveling.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WL_HW_ERR0</name>
              <description>Byte0 write-leveling HW calibration error</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>WL_HW_ERR0_0</name>
                  <description>No error was found on byte0 during write-leveling HW calibration.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WL_HW_ERR0_1</name>
                  <description>An error was found on byte0 during write-leveling HW calibration.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WL_HW_ERR1</name>
              <description>Byte1 write-leveling HW calibration error</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>WL_HW_ERR1_0</name>
                  <description>No error was found on byte1 during write-leveling HW calibration.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WL_HW_ERR1_1</name>
                  <description>An error was found on byte1 during write-leveling HW calibration.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>MPWLDECTRL0</name>
          <description>MMDC PHY Write Leveling Delay Control Register 0</description>
          <addressOffset>0x80C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>WL_DL_ABS_OFFSET0</name>
              <description>Absolute write-leveling delay offset for Byte 0</description>
              <bitOffset>0</bitOffset>
              <bitWidth>7</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>WL_HC_DEL0</name>
              <description>Write leveling half cycle delay for Byte 0</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>WL_HC_DEL0_0</name>
                  <description>No delay is added.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WL_HC_DEL0_1</name>
                  <description>Half cycle delay is added.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WL_CYC_DEL0</name>
              <description>Write leveling cycle delay for Byte 0</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>WL_CYC_DEL0_0</name>
                  <description>No delay is added.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WL_CYC_DEL0_1</name>
                  <description>1 cycle delay is added.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WL_CYC_DEL0_2</name>
                  <description>2 cycles delay is added.</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WL_DL_ABS_OFFSET1</name>
              <description>Absolute write-leveling delay offset for Byte 1</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>7</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>WL_HC_DEL1</name>
              <description>Write leveling half cycle delay for Byte 1</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>WL_HC_DEL1_0</name>
                  <description>No delay is added.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WL_HC_DEL1_1</name>
                  <description>Half cycle delay is added.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WL_CYC_DEL1</name>
              <description>Write leveling cycle delay for Byte 1</description>
              <bitOffset>0x19</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>WL_CYC_DEL1_0</name>
                  <description>No delay is added.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WL_CYC_DEL1_1</name>
                  <description>1 cycle delay is added.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WL_CYC_DEL1_2</name>
                  <description>2 cycles delay is added.</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>MPWLDLST</name>
          <description>MMDC PHY Write Leveling delay-line Status Register</description>
          <addressOffset>0x814</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>WL_DL_UNIT_NUM0</name>
              <description>This field reflects the number of delay units that are actually used by write leveling delay-line 0</description>
              <bitOffset>0</bitOffset>
              <bitWidth>7</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>WL_DL_UNIT_NUM1</name>
              <description>This field reflects the number of delay units that are actually used by write leveling delay-line 1</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>7</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>MPODTCTRL</name>
          <description>MMDC PHY ODT control register</description>
          <addressOffset>0x818</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ODT_WR_PAS_EN</name>
              <description>Inactive write CS ODT enable</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODT_WR_PAS_EN_0</name>
                  <description>Inactive CS ODT pin is disabled during write accesses to other CS.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_WR_PAS_EN_1</name>
                  <description>Inactive CS ODT pin is enabled during write accesses to other CS.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODT_WR_ACT_EN</name>
              <description>Active write CS ODT enable</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODT_WR_ACT_EN_0</name>
                  <description>Active CS ODT pin is disabled during write access.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_WR_ACT_EN_1</name>
                  <description>Active CS ODT pin is enabled during write access.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODT_RD_PAS_EN</name>
              <description>Inactive read CS ODT enable</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODT_RD_PAS_EN_0</name>
                  <description>Inactive CS ODT pin is disabled during read accesses to other CS.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_RD_PAS_EN_1</name>
                  <description>Inactive CS ODT pin is enabled during read accesses to other CS.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODT_RD_ACT_EN</name>
              <description>Active read CS ODT enable</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODT_RD_ACT_EN_0</name>
                  <description>Active CS ODT pin is disabled during read access.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT_RD_ACT_EN_1</name>
                  <description>Active CS ODT pin is enabled during read access.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODT0_INT_RES</name>
              <description>On chip ODT byte0 resistor - This field determines the Rtt_Nom of the on chip ODT byte0 resistor during read accesses</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODT0_INT_RES_0</name>
                  <description>Rtt_Nom Disabled.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT0_INT_RES_1</name>
                  <description>Rtt_Nom 120 Ohm</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT0_INT_RES_2</name>
                  <description>Rtt_Nom 60 Ohm</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT0_INT_RES_3</name>
                  <description>Rtt_Nom 40 Ohm</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT0_INT_RES_4</name>
                  <description>Rtt_Nom 30 Ohm</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT0_INT_RES_5</name>
                  <description>Rtt_Nom 24 Ohm</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT0_INT_RES_6</name>
                  <description>Rtt_Nom 20 Ohm</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT0_INT_RES_7</name>
                  <description>Rtt_Nom 17 Ohm</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODT1_INT_RES</name>
              <description>On chip ODT byte1 resistor - This field determines the Rtt_Nom of the on chip ODT byte1 resistor during read accesses</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODT1_INT_RES_0</name>
                  <description>Rtt_Nom Disabled.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT1_INT_RES_1</name>
                  <description>Rtt_Nom 120 Ohm</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT1_INT_RES_2</name>
                  <description>Rtt_Nom 60 Ohm</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT1_INT_RES_3</name>
                  <description>Rtt_Nom 40 Ohm</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT1_INT_RES_4</name>
                  <description>Rtt_Nom 30 Ohm</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT1_INT_RES_5</name>
                  <description>Rtt_Nom 24 Ohm</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT1_INT_RES_6</name>
                  <description>Rtt_Nom 20 Ohm</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODT1_INT_RES_7</name>
                  <description>Rtt_Nom 17 Ohm</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>MPRDDQBY0DL</name>
          <description>MMDC PHY Read DQ Byte0 Delay Register</description>
          <addressOffset>0x81C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>rd_dq0_del</name>
              <description>Read dqs0 to dq0 delay fine-tuning</description>
              <bitOffset>0</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>rd_dq0_del_0</name>
                  <description>No change in dq0 delay</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq0_del_1</name>
                  <description>Add dq0 delay of 1 delay unit</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq0_del_2</name>
                  <description>Add dq0 delay of 2 delay units.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq0_del_3</name>
                  <description>Add dq0 delay of 3 delay units.</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq0_del_4</name>
                  <description>Add dq0 delay of 4 delay units.</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq0_del_5</name>
                  <description>Add dq0 delay of 5 delay units.</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq0_del_6</name>
                  <description>Add dq0 delay of 6 delay units.</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq0_del_7</name>
                  <description>Add dq0 delay of 7 delay units.</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>rd_dq1_del</name>
              <description>Read dqs0 to dq1 delay fine-tuning</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>rd_dq1_del_0</name>
                  <description>No change in dq1 delay</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq1_del_1</name>
                  <description>Add dq1 delay of 1 delay unit</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq1_del_2</name>
                  <description>Add dq1 delay of 2 delay units.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq1_del_3</name>
                  <description>Add dq1 delay of 3 delay units.</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq1_del_4</name>
                  <description>Add dq1 delay of 4 delay units.</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq1_del_5</name>
                  <description>Add dq1 delay of 5 delay units.</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq1_del_6</name>
                  <description>Add dq1 delay of 6 delay units.</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq1_del_7</name>
                  <description>Add dq1 delay of 7 delay units.</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>rd_dq2_del</name>
              <description>Read dqs0 to dq2 delay fine-tuning</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>rd_dq2_del_0</name>
                  <description>No change in dq2 delay</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq2_del_1</name>
                  <description>Add dq2 delay of 1 delay unit</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq2_del_2</name>
                  <description>Add dq2 delay of 2 delay units.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq2_del_3</name>
                  <description>Add dq2 delay of 3 delay units.</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq2_del_4</name>
                  <description>Add dq2 delay of 4 delay units.</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq2_del_5</name>
                  <description>Add dq2 delay of 5 delay units.</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq2_del_6</name>
                  <description>Add dq2 delay of 6 delay units.</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq2_del_7</name>
                  <description>Add dq2 delay of 7 delay units.</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>rd_dq3_del</name>
              <description>Read dqs0 to dq3 delay fine-tuning</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>rd_dq3_del_0</name>
                  <description>No change in dq3 delay</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq3_del_1</name>
                  <description>Add dq3 delay of 1 delay unit</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq3_del_2</name>
                  <description>Add dq3 delay of 2 delay units.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq3_del_3</name>
                  <description>Add dq3 delay of 3 delay units.</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq3_del_4</name>
                  <description>Add dq3 delay of 4 delay units.</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq3_del_5</name>
                  <description>Add dq3 delay of 5 delay units.</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq3_del_6</name>
                  <description>Add dq3 delay of 6 delay units.</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq3_del_7</name>
                  <description>Add dq3 delay of 7 delay units.</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>rd_dq4_del</name>
              <description>Read dqs0 to dq4 delay fine-tuning</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>rd_dq4_del_0</name>
                  <description>No change in dq4 delay</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq4_del_1</name>
                  <description>Add dq4 delay of 1 delay unit</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq4_del_2</name>
                  <description>Add dq4 delay of 2 delay units.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq4_del_3</name>
                  <description>Add dq4 delay of 3 delay units.</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq4_del_4</name>
                  <description>Add dq4 delay of 4 delay units.</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq4_del_5</name>
                  <description>Add dq4 delay of 5 delay units.</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq4_del_6</name>
                  <description>Add dq4 delay of 6 delay units.</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq4_del_7</name>
                  <description>Add dq4 delay of 7 delay units.</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>rd_dq5_del</name>
              <description>Read dqs0 to dq5 delay fine-tuning</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>rd_dq5_del_0</name>
                  <description>No change in dq5 delay</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq5_del_1</name>
                  <description>Add dq5 delay of 1 delay unit</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq5_del_2</name>
                  <description>Add dq5 delay of 2 delay units.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq5_del_3</name>
                  <description>Add dq5 delay of 3 delay units.</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq5_del_4</name>
                  <description>Add dq5 delay of 4 delay units.</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq5_del_5</name>
                  <description>Add dq5 delay of 5 delay units.</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq5_del_6</name>
                  <description>Add dq5 delay of 6 delay units.</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq5_del_7</name>
                  <description>Add dq5 delay of 7 delay units.</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>rd_dq6_del</name>
              <description>Read dqs0 to dq6 delay fine-tuning</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>rd_dq6_del_0</name>
                  <description>No change in dq6 delay</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq6_del_1</name>
                  <description>Add dq6 delay of 1 delay unit</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq6_del_2</name>
                  <description>Add dq6 delay of 2 delay units.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq6_del_3</name>
                  <description>Add dq6 delay of 3 delay units.</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq6_del_4</name>
                  <description>Add dq6 delay of 4 delay units.</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq6_del_5</name>
                  <description>Add dq6 delay of 5 delay units.</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq6_del_6</name>
                  <description>Add dq6 delay of 6 delay units.</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq6_del_7</name>
                  <description>Add dq6 delay of 7 delay units.</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>rd_dq7_del</name>
              <description>Read dqs0 to dq7 delay fine-tuning</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>rd_dq7_del_0</name>
                  <description>No change in dq7 delay</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq7_del_1</name>
                  <description>Add dq7 delay of 1 delay unit</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq7_del_2</name>
                  <description>Add dq7 delay of 2 delay units.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq7_del_3</name>
                  <description>Add dq7 delay of 3 delay units.</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq7_del_4</name>
                  <description>Add dq7 delay of 4 delay units.</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq7_del_5</name>
                  <description>Add dq7 delay of 5 delay units.</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq7_del_6</name>
                  <description>Add dq7 delay of 6 delay units.</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq7_del_7</name>
                  <description>Add dq7 delay of 7 delay units.</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>MPRDDQBY1DL</name>
          <description>MMDC PHY Read DQ Byte1 Delay Register</description>
          <addressOffset>0x820</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>rd_dq8_del</name>
              <description>Read dqs1 to dq8 delay fine-tuning</description>
              <bitOffset>0</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>rd_dq8_del_0</name>
                  <description>No change in dq8 delay</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq8_del_1</name>
                  <description>Add dq8 delay of 1 delay unit</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq8_del_2</name>
                  <description>Add dq8 delay of 2 delay units.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq8_del_3</name>
                  <description>Add dq8 delay of 3 delay units.</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq8_del_4</name>
                  <description>Add dq8 delay of 4 delay units.</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq8_del_5</name>
                  <description>Add dq8 delay of 5 delay units.</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq8_del_6</name>
                  <description>Add dq8 delay of 6 delay units.</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq8_del_7</name>
                  <description>Add dq8 delay of 7 delay units.</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>rd_dq9_del</name>
              <description>Read dqs1 to dq9 delay fine-tuning</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>rd_dq9_del_0</name>
                  <description>No change in dq9 delay</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq9_del_1</name>
                  <description>Add dq9 delay of 1 delay unit</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq9_del_2</name>
                  <description>Add dq9 delay of 2 delay units.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq9_del_3</name>
                  <description>Add dq9 delay of 3 delay units.</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq9_del_4</name>
                  <description>Add dq9 delay of 4 delay units.</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq9_del_5</name>
                  <description>Add dq9 delay of 5 delay units.</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq9_del_6</name>
                  <description>Add dq9 delay of 6 delay units.</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq9_del_7</name>
                  <description>Add dq9 delay of 7 delay units.</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>rd_dq10_del</name>
              <description>Read dqs1 to dq10 delay fine-tuning</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>rd_dq10_del_0</name>
                  <description>No change in dq10 delay</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq10_del_1</name>
                  <description>Add dq10 delay of 1 delay unit</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq10_del_2</name>
                  <description>Add dq10 delay of 2 delay units.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq10_del_3</name>
                  <description>Add dq10 delay of 3 delay units.</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq10_del_4</name>
                  <description>Add dq10 delay of 4 delay units.</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq10_del_5</name>
                  <description>Add dq10 delay of 5 delay unit</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq10_del_6</name>
                  <description>Add dq10 delay of 6 delay units.</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq10_del_7</name>
                  <description>Add dq10 delay of 7 delay units.</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>rd_dq11_del</name>
              <description>Read dqs1 to dq11 delay fine-tuning</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>rd_dq11_del_0</name>
                  <description>No change in dq11 delay</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq11_del_1</name>
                  <description>Add dq11 delay of 1 delay unit</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq11_del_2</name>
                  <description>Add dq11 delay of 2 delay units.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq11_del_3</name>
                  <description>Add dq11 delay of 3 delay units.</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq11_del_4</name>
                  <description>Add dq11 delay of 4 delay units.</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq11_del_5</name>
                  <description>Add dq11 delay of 5 delay units.</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq11_del_6</name>
                  <description>Add dq11 delay of 6 delay units.</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq11_del_7</name>
                  <description>Add dq11 delay of 7 delay units.</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>rd_dq12_del</name>
              <description>Read dqs1 to dq12 delay fine-tuning</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>rd_dq12_del_0</name>
                  <description>No change in dq12 delay</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq12_del_1</name>
                  <description>Add dq12 delay of 1 delay unit</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq12_del_2</name>
                  <description>Add dq12 delay of 2 delay units.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq12_del_3</name>
                  <description>Add dq12 delay of 3 delay units.</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq12_del_4</name>
                  <description>Add dq12 delay of 4 delay units.</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq12_del_5</name>
                  <description>Add dq12 delay of 5 delay units.</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq12_del_6</name>
                  <description>Add dq12 delay of 6 delay units.</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq12_del_7</name>
                  <description>Add dq12 delay of 7 delay units.</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>rd_dq13_del</name>
              <description>Read dqs1 to dq13 delay fine-tuning</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>rd_dq13_del_0</name>
                  <description>No change in dq13 delay</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq13_del_1</name>
                  <description>Add dq13 delay of 1 delay unit</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq13_del_2</name>
                  <description>Add dq13 delay of 2 delay units.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq13_del_3</name>
                  <description>Add dq13 delay of 3 delay units.</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq13_del_4</name>
                  <description>Add dq13 delay of 4 delay units.</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq13_del_5</name>
                  <description>Add dq13 delay of 5 delay units.</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq13_del_6</name>
                  <description>Add dq13 delay of 6 delay units.</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq13_del_7</name>
                  <description>Add dq13 delay of 7 delay units.</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>rd_dq14_del</name>
              <description>Read dqs1 to dq14 delay fine-tuning</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>rd_dq14_del_0</name>
                  <description>No change in dq14 delay</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq14_del_1</name>
                  <description>Add dq14 delay of 1 delay unit</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq14_del_2</name>
                  <description>Add dq14 delay of 2 delay units.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq14_del_3</name>
                  <description>Add dq14 delay of 3 delay units.</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq14_del_4</name>
                  <description>Add dq14 delay of 4 delay units.</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq14_del_5</name>
                  <description>Add dq14 delay of 5 delay units.</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq14_del_6</name>
                  <description>Add dq14 delay of 6 delay units.</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq14_del_7</name>
                  <description>Add dq14 delay of 7 delay units.</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>rd_dq15_del</name>
              <description>Read dqs1 to dq15 delay fine-tuning</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>rd_dq15_del_0</name>
                  <description>No change in dq15 delay</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq15_del_1</name>
                  <description>Add dq15 delay of 1 delay unit</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq15_del_2</name>
                  <description>Add dq15 delay of 2 delay units.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq15_del_3</name>
                  <description>Add dq15 delay of 3 delay units.</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq15_del_4</name>
                  <description>Add dq15 delay of 4 delay units.</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq15_del_5</name>
                  <description>Add dq15 delay of 5 delay units.</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq15_del_6</name>
                  <description>Add dq15 delay of 6 delay units.</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>rd_dq15_del_7</name>
                  <description>Add dq15 delay of 7 delay units.</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>MPWRDQBY0DL</name>
          <description>MMDC PHY Write DQ Byte0 Delay Register</description>
          <addressOffset>0x82C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>wr_dq0_del</name>
              <description>Write dq0 delay fine-tuning</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>wr_dq0_del_0</name>
                  <description>No change in dq0 delay</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dq0_del_1</name>
                  <description>Add dq0 delay of 1 delay unit.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dq0_del_2</name>
                  <description>Add dq0 delay of 2 delay units.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dq0_del_3</name>
                  <description>Add dq0 delay of 3 delay units.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>wr_dq1_del</name>
              <description>Write dq1 delay fine-tuning</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>wr_dq1_del_0</name>
                  <description>No change in dq1 delay</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dq1_del_1</name>
                  <description>Add dq1 delay of 1 delay unit.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dq1_del_2</name>
                  <description>Add dq1 delay of 2 delay units.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dq1_del_3</name>
                  <description>Add dq1 delay of 3 delay units.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>wr_dq2_del</name>
              <description>Write dq2 delay fine-tuning</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>wr_dq2_del_0</name>
                  <description>No change in dq2 delay</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dq2_del_1</name>
                  <description>Add dq2 delay of 1 delay unit.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dq2_del_2</name>
                  <description>Add dq2 delay of 2 delay units.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dq2_del_3</name>
                  <description>Add dq2 delay of 3 delay units.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>wr_dq3_del</name>
              <description>Write dq3 delay fine-tuning</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>wr_dq3_del_0</name>
                  <description>No change in dq3 delay</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dq3_del_1</name>
                  <description>Add dq3 delay of 1 delay unit.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dq3_del_2</name>
                  <description>Add dq3 delay of 2 delay units.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dq3_del_3</name>
                  <description>Add dq3 delay of 3 delay units.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>wr_dq4_del</name>
              <description>Write dq4 delay fine-tuning</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>wr_dq4_del_0</name>
                  <description>No change in dq4 delay</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dq4_del_1</name>
                  <description>Add dq4 delay of 1 delay unit..</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dq4_del_2</name>
                  <description>Add dq4 delay of 2 delay units.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dq4_del_3</name>
                  <description>Add dq4 delay of 3 delay units.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>wr_dq5_del</name>
              <description>Write dq5 delay fine-tuning</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>wr_dq5_del_0</name>
                  <description>No change in dq5 delay</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dq5_del_1</name>
                  <description>Add dq5 delay of 1 delay unit.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dq5_del_2</name>
                  <description>Add dq5 delay of 2 delay units.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dq5_del_3</name>
                  <description>Add dq5 delay of 3 delay units.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>wr_dq6_del</name>
              <description>Write dq6 delay fine-tuning</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>wr_dq6_del_0</name>
                  <description>No change in dq6 delay</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dq6_del_1</name>
                  <description>Add dq6 delay of 1 delay unit.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dq6_del_2</name>
                  <description>Add dq6 delay of 2 delay units.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dq6_del_3</name>
                  <description>Add dq6 delay of 3 delay units.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>wr_dq7_del</name>
              <description>Write dq7 delay fine-tuning</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>wr_dq7_del_0</name>
                  <description>No change in dq7 delay</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dq7_del_1</name>
                  <description>Add dq7 delay of 1 delay unit.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dq7_del_2</name>
                  <description>Add dq7 delay of 2 delay units.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dq7_del_3</name>
                  <description>Add dq7 delay of 3 delay units.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>wr_dm0_del</name>
              <description>Write dm0 delay fine-tuning</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>wr_dm0_del_0</name>
                  <description>No change in dm0 delay</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dm0_del_1</name>
                  <description>Add dm0 delay of 1 delay unit.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dm0_del_2</name>
                  <description>Add dm0 delay of 2 delay units.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dm0_del_3</name>
                  <description>Add dm0 delay of 3 delay units.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>MPWRDQBY1DL</name>
          <description>MMDC PHY Write DQ Byte1 Delay Register</description>
          <addressOffset>0x830</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>wr_dq8_del</name>
              <description>Write dq8 delay fine-tuning</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>wr_dq8_del_0</name>
                  <description>No change in dq8 delay</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dq8_del_1</name>
                  <description>Add dq8 delay of 1 delay unit.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dq8_del_2</name>
                  <description>Add dq8 delay of 2 delay units.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dq8_del_3</name>
                  <description>Add dq8 delay of 3 delay units.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>wr_dq9_del</name>
              <description>Write dq9 delay fine-tuning</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>wr_dq9_del_0</name>
                  <description>No change in dq9 delay</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dq9_del_1</name>
                  <description>Add dq9 delay of 1 delay unit.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dq9_del_2</name>
                  <description>Add dq9 delay of 2 delay units.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dq9_del_3</name>
                  <description>Add dq9 delay of 3 delay units.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>wr_dq10_del</name>
              <description>Write dq10 delay fine-tuning</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>wr_dq10_del_0</name>
                  <description>No change in dq10 delay</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dq10_del_1</name>
                  <description>Add dq10 delay of 1 delay unit.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dq10_del_2</name>
                  <description>Add dq10 delay of 2 delay units.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dq10_del_3</name>
                  <description>Add dq10 delay of 3 delay units.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>wr_dq11_del</name>
              <description>Write dq11 delay fine-tuning</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>wr_dq11_del_0</name>
                  <description>No change in dq11 delay</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dq11_del_1</name>
                  <description>Add dq11 delay of 1 delay unit.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dq11_del_2</name>
                  <description>Add dq11 delay of 2 delay units.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dq11_del_3</name>
                  <description>Add dq11 delay of 3 delay units.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>wr_dq12_del</name>
              <description>Write dq12 delay fine-tuning</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>wr_dq12_del_0</name>
                  <description>No change in dq12 delay</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dq12_del_1</name>
                  <description>Add dq12 delay of 1 delay unit.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dq12_del_2</name>
                  <description>Add dq12 delay of 2 delay units.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dq12_del_3</name>
                  <description>Add dq12 delay of 3 delay units.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>wr_dq13_del</name>
              <description>Write dq13 delay fine-tuning</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>wr_dq13_del_0</name>
                  <description>No change in dq13 delay</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dq13_del_1</name>
                  <description>Add dq13 delay of 1 delay unit.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dq13_del_2</name>
                  <description>Add dq13 delay of 2 delay units.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dq13_del_3</name>
                  <description>Add dq13 delay of 3 delay units.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>wr_dq14_del</name>
              <description>Write dq14 delay fine-tuning</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>wr_dq14_del_0</name>
                  <description>No change in dq14 delay</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dq14_del_1</name>
                  <description>Add dq14 delay of 1 delay unit.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dq14_del_2</name>
                  <description>Add dq14 delay of 2 delay units.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dq14_del_3</name>
                  <description>Add dq14 delay of 3 delay units.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>wr_dq15_del</name>
              <description>Write dq15 delay fine-tuning</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>wr_dq15_del_0</name>
                  <description>No change in dq15 delay</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dq15_del_1</name>
                  <description>Add dq15 delay of 1 delay unit.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dq15_del_2</name>
                  <description>Add dq15 delay of 2 delay units.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dq15_del_3</name>
                  <description>Add dq15 delay of 3 delay units.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>wr_dm1_del</name>
              <description>Write dm1 delay fine-tuning</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>wr_dm1_del_0</name>
                  <description>No change in dm1 delay</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dm1_del_1</name>
                  <description>Add dm1 delay of 1 delay unit.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dm1_del_2</name>
                  <description>Add dm1 delay of 2 delay units.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dm1_del_3</name>
                  <description>Add dm1 delay of 3 delay units.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>MPWRDQBY2DL</name>
          <description>MMDC PHY Write DQ Byte2 Delay Register</description>
          <addressOffset>0x834</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>wr_dq16_del</name>
              <description>Write dq16 delay fine tuning</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>wr_dq16_del_0</name>
                  <description>No change in dq16 delay</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dq16_del_1</name>
                  <description>Add dq16 delay of 1 delay unit.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dq16_del_2</name>
                  <description>Add dq16 delay of 2 delay units.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dq16_del_3</name>
                  <description>Add dq16 delay of 3 delay units.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>wr_dq17_del</name>
              <description>Write dq17 delay fine tuning</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>wr_dq17_del_0</name>
                  <description>No change in dq17 delay</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dq17_del_1</name>
                  <description>Add dq17 delay of 1 delay unit.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dq17_del_2</name>
                  <description>Add dq17 delay of 2 delay units.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dq17_del_3</name>
                  <description>Add dq17 delay of 3 delay units.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>wr_dq18_del</name>
              <description>Write dq18 delay fine tuning</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>wr_dq18_del_0</name>
                  <description>No change in dq18 delay</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dq18_del_1</name>
                  <description>Add dq18 delay of 1 delay unit.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dq18_del_2</name>
                  <description>Add dq18 delay of 2 delay units.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dq18_del_3</name>
                  <description>Add dq18 delay of 3 delay units.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>wr_dq19_del</name>
              <description>Write dq19 delay fine tuning</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>wr_dq19_del_0</name>
                  <description>No change in dq19 delay</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dq19_del_1</name>
                  <description>Add dq19 delay of 1 delay unit.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dq19_del_2</name>
                  <description>Add dq19 delay of 2 delay units.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dq19_del_3</name>
                  <description>Add dq19 delay of 3 delay units.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>wr_dq20_del</name>
              <description>Write dq20 delay fine tuning</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>wr_dq20_del_0</name>
                  <description>No change in dq20 delay</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dq20_del_1</name>
                  <description>Add dq20 delay of 1 delay unit.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dq20_del_2</name>
                  <description>Add dq20 delay of 2 delay units.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dq20_del_3</name>
                  <description>Add dq20 delay of 3 delay units.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>wr_dq21_del</name>
              <description>Write dq21 delay fine tuning</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>wr_dq21_del_0</name>
                  <description>No change in dq21 delay</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dq21_del_1</name>
                  <description>Add dq21 delay of 1 delay unit.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dq21_del_2</name>
                  <description>Add dq21 delay of 2 delay units.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dq21_del_3</name>
                  <description>Add dq21 delay of 3 delay units.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>wr_dq22_del</name>
              <description>Write dq22 delay fine tuning</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>wr_dq22_del_0</name>
                  <description>No change in dq22 delay</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dq22_del_1</name>
                  <description>Add dq22 delay of 1 delay unit.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dq22_del_2</name>
                  <description>Add dq22 delay of 2 delay units.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dq22_del_3</name>
                  <description>Add dq22 delay of 3 delay units.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>wr_dq23_del</name>
              <description>Write dq23 delay fine tuning</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>wr_dq23_del_0</name>
                  <description>No change in dq23 delay</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dq23_del_1</name>
                  <description>Add dq23 delay of 1 delay unit.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dq23_del_2</name>
                  <description>Add dq23 delay of 2 delay units.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dq23_del_3</name>
                  <description>Add dq23 delay of 3 delay units.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>wr_dm2_del</name>
              <description>Write dm2 delay fine-tuning</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>wr_dm2_del_0</name>
                  <description>No change in dm2 delay</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dm2_del_1</name>
                  <description>Add dm2 delay of 1 delay unit.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dm2_del_2</name>
                  <description>Add dm2 delay of 2 delay units.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dm2_del_3</name>
                  <description>Add dm2 delay of 3 delay units.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>MPWRDQBY3DL</name>
          <description>MMDC PHY Write DQ Byte3 Delay Register</description>
          <addressOffset>0x838</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>wr_dq24_del</name>
              <description>Write dq24 delay fine tuning</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>wr_dq24_del_0</name>
                  <description>No change in dq24 delay</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dq24_del_1</name>
                  <description>Add dq24 delay of 1 delay unit.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dq24_del_2</name>
                  <description>Add dq24 delay of 2 delay units.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dq24_del_3</name>
                  <description>Add dq24 delay of 3 delay units.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>wr_dq25_del</name>
              <description>Write dq25 delay fine tuning</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>wr_dq25_del_0</name>
                  <description>No change in dq25 delay</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dq25_del_1</name>
                  <description>Add dq25 delay of 1 delay unit.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dq25_del_2</name>
                  <description>Add dq25 delay of 2 delay units.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dq25_del_3</name>
                  <description>Add dq25 delay of 3 delay units.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>wr_dq26_del</name>
              <description>Write dq26 delay fine tuning</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>wr_dq26_del_0</name>
                  <description>No change in dq26 delay</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dq26_del_1</name>
                  <description>Add dq26 delay of 1 delay unit.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dq26_del_2</name>
                  <description>Add dq26 delay of 2 delay units.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dq26_del_3</name>
                  <description>Add dq26 delay of 3 delay units.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>wr_dq27_del</name>
              <description>Write dq27 delay fine tuning</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>wr_dq27_del_0</name>
                  <description>No change in dq27 delay</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dq27_del_1</name>
                  <description>Add dq27 delay of 1 delay unit.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dq27_del_2</name>
                  <description>Add dq27 delay of 2 delay units.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dq27_del_3</name>
                  <description>Add dq27 delay of 3 delay units.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>wr_dq28_del</name>
              <description>Write dq28 delay fine tuning</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>wr_dq28_del_0</name>
                  <description>No change in dq28 delay</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dq28_del_1</name>
                  <description>Add dq28 delay of 1 delay unit.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dq28_del_2</name>
                  <description>Add dq28 delay of 2 delay units.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dq28_del_3</name>
                  <description>Add dq28 delay of 3 delay units.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>wr_dq29_del</name>
              <description>Write dq29 delay fine tuning</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>wr_dq29_del_0</name>
                  <description>No change in dq29 delay</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dq29_del_1</name>
                  <description>Add dq29 delay of 1 delay unit.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dq29_del_2</name>
                  <description>Add dq29 delay of 2 delay units.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dq29_del_3</name>
                  <description>Add dq29 delay of 3 delay units.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>wr_dq30_del</name>
              <description>Write dq30 delay fine tuning</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>wr_dq30_del_0</name>
                  <description>No change in dq30 delay</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dq30_del_1</name>
                  <description>Add dq30 delay of 1 delay unit.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dq30_del_2</name>
                  <description>Add dq30 delay of 2 delay units.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dq30_del_3</name>
                  <description>Add dq30 delay of 3 delay units.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>wr_dq31_del</name>
              <description>Write dq31 delay fine tuning</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>wr_dq31_del_0</name>
                  <description>No change in dq31 delay</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dq31_del_1</name>
                  <description>Add dq31 delay of 1 delay unit.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dq31_del_2</name>
                  <description>Add dq31 delay of 2 delay units.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dq31_del_3</name>
                  <description>Add dq31 delay of 3 delay units.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>wr_dm3_del</name>
              <description>Write dm3 delay fine tuning</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>wr_dm3_del_0</name>
                  <description>No change in dm3 delay</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dm3_del_1</name>
                  <description>Add dm3 delay of 1 delay unit.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dm3_del_2</name>
                  <description>Add dm3 delay of 2 delay units.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>wr_dm3_del_3</name>
                  <description>Add dm3 delay of 3 delay units.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>MPDGCTRL0</name>
          <description>MMDC PHY Read DQS Gating Control Register 0</description>
          <addressOffset>0x83C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DG_DL_ABS_OFFSET0</name>
              <description>Absolute read DQS gating delay offset for Byte0</description>
              <bitOffset>0</bitOffset>
              <bitWidth>7</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DG_HC_DEL0</name>
              <description>Read DQS gating half cycles delay for Byte0</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DG_HC_DEL0_0</name>
                  <description>0 cycles delay.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DG_HC_DEL0_1</name>
                  <description>Half cycle delay.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DG_HC_DEL0_2</name>
                  <description>1 cycle delay</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DG_HC_DEL0_13</name>
                  <description>6.5 cycles delay</description>
                  <value>0xD</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HW_DG_ERR</name>
              <description>HW DQS gating error</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HW_DG_ERR_0</name>
                  <description>No error was found during the DQS gating HW calibration process.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HW_DG_ERR_1</name>
                  <description>An error was found during the DQS gating HW calibration process.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DG_DL_ABS_OFFSET1</name>
              <description>Absolute read DQS gating delay offset for Byte1</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>7</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DG_EXT_UP</name>
              <description>DG extend upper boundary</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DG_HC_DEL1</name>
              <description>Read DQS gating half cycles delay for Byte1</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DG_HC_DEL1_0</name>
                  <description>0 cycles delay.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DG_HC_DEL1_1</name>
                  <description>Half cycle delay.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DG_HC_DEL1_2</name>
                  <description>1 cycle delay</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DG_HC_DEL1_13</name>
                  <description>6.5 cycles delay</description>
                  <value>0xD</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HW_DG_EN</name>
              <description>Enable automatic read DQS gating calibration</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HW_DG_EN_0</name>
                  <description>Disable automatic read DQS gating calibration</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HW_DG_EN_1</name>
                  <description>Start automatic read DQS gating calibration</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DG_DIS</name>
              <description>Read DQS gating disable</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DG_DIS_0</name>
                  <description>Read DQS gating mechanism is enabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DG_DIS_1</name>
                  <description>Read DQS gating mechanism is disabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DG_CMP_CYC</name>
              <description>Read DQS gating sample cycle</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DG_CMP_CYC_0</name>
                  <description>MMDC waits 16 DDR cycles</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DG_CMP_CYC_1</name>
                  <description>MMDC waits 32 DDR cycles</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RST_RD_FIFO</name>
              <description>Reset Read Data FIFO and associated pointers</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>MPDGDLST0</name>
          <description>MMDC PHY Read DQS Gating delay-line Status Register</description>
          <addressOffset>0x844</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DG_DL_UNIT_NUM0</name>
              <description>This field reflects the number of delay units that are actually used by read DQS gating delay-line 0</description>
              <bitOffset>0</bitOffset>
              <bitWidth>7</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>DG_DL_UNIT_NUM1</name>
              <description>This field reflects the number of delay units that are actually used by read DQS gating delay-line 1</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>7</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>MPRDDLCTL</name>
          <description>MMDC PHY Read delay-lines Configuration Register</description>
          <addressOffset>0x848</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x40404040</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RD_DL_ABS_OFFSET0</name>
              <description>Absolute read delay offset for Byte0</description>
              <bitOffset>0</bitOffset>
              <bitWidth>7</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RD_DL_ABS_OFFSET1</name>
              <description>Absolute read delay offset for Byte1</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>7</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>MPRDDLST</name>
          <description>MMDC PHY Read delay-lines Status Register</description>
          <addressOffset>0x84C</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RD_DL_UNIT_NUM0</name>
              <description>This field reflects the number of delay units that are actually used by read delay-line 0.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>7</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>RD_DL_UNIT_NUM1</name>
              <description>This field reflects the number of delay units that are actually used by read delay-line 1.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>7</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>MPWRDLCTL</name>
          <description>MMDC PHY Write delay-lines Configuration Register</description>
          <addressOffset>0x850</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x40404040</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>WR_DL_ABS_OFFSET0</name>
              <description>Absolute write delay offset for Byte0</description>
              <bitOffset>0</bitOffset>
              <bitWidth>7</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>WR_DL_ABS_OFFSET1</name>
              <description>Absolute write delay offset for Byte1</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>7</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>MPWRDLST</name>
          <description>MMDC PHY Write delay-lines Status Register</description>
          <addressOffset>0x854</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>WR_DL_UNIT_NUM0</name>
              <description>This field reflects the number of delay units that are actually used by write delay-line 0.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>7</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>WR_DL_UNIT_NUM1</name>
              <description>This field reflects the number of delay units that are actually used by write delay-line 1.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>7</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>MPSDCTRL</name>
          <description>MMDC PHY CK Control Register</description>
          <addressOffset>0x858</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SDclk0_del</name>
              <description>DDR clock0 delay fine tuning</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SDclk0_del_0</name>
                  <description>No change in DDR clock0 delay</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SDclk0_del_1</name>
                  <description>Add DDR clock0 delay of 1 delay unit.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SDclk0_del_2</name>
                  <description>Add DDR clock0 delay of 2 delay units.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SDclk0_del_3</name>
                  <description>Add DDR clock0 delay of 3 delay units.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SDCLK1_del</name>
              <description>DDR clock1 delay fine tuning</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SDCLK1_del_0</name>
                  <description>No change in DDR clock delay</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SDCLK1_del_1</name>
                  <description>Add DDR clock delay of 1 delay unit.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SDCLK1_del_2</name>
                  <description>Add DDR clock delay of 2 delay units.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SDCLK1_del_3</name>
                  <description>Add DDR clock delay of 3 delay units.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>MPZQLP2CTL</name>
          <description>MMDC ZQ LPDDR2 HW Control Register</description>
          <addressOffset>0x85C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x1B5F0109</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ZQ_LP2_HW_ZQINIT</name>
              <description>This register defines the period in cycles that it takes the memory device to perform a Init ZQ calibration</description>
              <bitOffset>0</bitOffset>
              <bitWidth>9</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ZQ_LP2_HW_ZQINIT_55</name>
                  <description>112 cycles</description>
                  <value>0x37</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ZQ_LP2_HW_ZQINIT_56</name>
                  <description>114 cycles</description>
                  <value>0x38</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ZQ_LP2_HW_ZQINIT_265</name>
                  <description>532 cycles (Default, JEDEC value, tZQINIT, for LPDDR2, 1us @ clock frequency 533MHz)</description>
                  <value>0x109</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ZQ_LP2_HW_ZQINIT_510</name>
                  <description>1022 cycles</description>
                  <value>0x1FE</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ZQ_LP2_HW_ZQINIT_511</name>
                  <description>1024 cycles</description>
                  <value>0x1FF</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ZQ_LP2_HW_ZQCL</name>
              <description>This register defines the period in cycles that it takes the memory device to perform a long ZQ calibration</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ZQ_LP2_HW_ZQCL_55</name>
                  <description>112 cycles</description>
                  <value>0x37</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ZQ_LP2_HW_ZQCL_56</name>
                  <description>114 cycles</description>
                  <value>0x38</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ZQ_LP2_HW_ZQCL_95</name>
                  <description>192 cycles (Default, JEDEC value, tZQCL, for LPDDR2, 360ns @ clock frequency 533MHz)</description>
                  <value>0x5F</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ZQ_LP2_HW_ZQCL_254</name>
                  <description>510 cycles</description>
                  <value>0xFE</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ZQ_LP2_HW_ZQCL_255</name>
                  <description>512 cycles</description>
                  <value>0xFF</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ZQ_LP2_HW_ZQCS</name>
              <description>This register defines the period in cycles that it takes the memory device to perform a short ZQ calibration</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>7</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ZQ_LP2_HW_ZQCS_27</name>
                  <description>112 cycles (default)</description>
                  <value>0x1B</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ZQ_LP2_HW_ZQCS_28</name>
                  <description>116 cycles</description>
                  <value>0x1C</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ZQ_LP2_HW_ZQCS_126</name>
                  <description>508 cycles</description>
                  <value>0x7E</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ZQ_LP2_HW_ZQCS_127</name>
                  <description>512 cycles</description>
                  <value>0x7F</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>MPRDDLHWCTL</name>
          <description>MMDC PHY Read Delay HW Calibration Control Register</description>
          <addressOffset>0x860</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>HW_RD_DL_ERR0</name>
              <description>Automatic (HW) read calibration error of Byte0</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HW_RD_DL_ERR0_0</name>
                  <description>No error was found in read delay-line 0 during the automatic (HW) read calibration process of read delay-line 0.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HW_RD_DL_ERR0_1</name>
                  <description>An error was found in read delay-line 0 during the automatic (HW) read calibration process of read delay-line 0.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HW_RD_DL_ERR1</name>
              <description>Automatic (HW) read calibration error of Byte1</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HW_RD_DL_ERR1_0</name>
                  <description>No error was found in read delay-line 1 during the automatic (HW) read calibration process of read delay-line 1.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HW_RD_DL_ERR1_1</name>
                  <description>An error was found in read delay-line 1 during the automatic (HW) read calibration process of read delay-line 1.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HW_RD_DL_EN</name>
              <description>Enable automatic (HW) read calibration</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>HW_RD_DL_CMP_CYC</name>
              <description>Automatic (HW) read sample cycle</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>MPWRDLHWCTL</name>
          <description>MMDC PHY Write Delay HW Calibration Control Register</description>
          <addressOffset>0x864</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>HW_WR_DL_ERR0</name>
              <description>Automatic (HW) write calibration error of Byte0</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HW_WR_DL_ERR0_0</name>
                  <description>No error was found during the automatic (HW) write calibration process of write delay-line 0.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HW_WR_DL_ERR0_1</name>
                  <description>An error was found during the automatic (HW) write calibration process of write delay-line 0.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HW_WR_DL_ERR1</name>
              <description>Automatic (HW) write calibration error of Byte1</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HW_WR_DL_ERR1_0</name>
                  <description>No error was found during the automatic (HW) write calibration process of write delay-line 1.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HW_WR_DL_ERR1_1</name>
                  <description>An error was found during the automatic (HW) write calibration process of write delay-line 1.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HW_WR_DL_EN</name>
              <description>Enable automatic (HW) write calibration</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>HW_WR_DL_CMP_CYC</name>
              <description>Write sample cycle</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>MPRDDLHWST0</name>
          <description>MMDC PHY Read Delay HW Calibration Status Register 0</description>
          <addressOffset>0x868</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>HW_RD_DL_LOW0</name>
              <description>Automatic (HW) read calibration result of the lower boundary of Byte0</description>
              <bitOffset>0</bitOffset>
              <bitWidth>7</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>HW_RD_DL_UP0</name>
              <description>Automatic (HW) read calibration result of the upper boundary of Byte0</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>7</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>HW_RD_DL_LOW1</name>
              <description>Automatic (HW) read calibration result of the lower boundary of Byte1</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>7</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>HW_RD_DL_UP1</name>
              <description>Automatic (HW) read calibration result of the upper boundary of Byte1</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>7</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>MPWRDLHWST0</name>
          <description>MMDC PHY Write Delay HW Calibration Status Register 0</description>
          <addressOffset>0x870</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>HW_WR_DL_LOW0</name>
              <description>Automatic (HW) write calibration result of the lower boundary of Byte0</description>
              <bitOffset>0</bitOffset>
              <bitWidth>7</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>HW_WR_DL_UP0</name>
              <description>Automatic (HW) write calibration result of the upper boundary of Byte0</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>7</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>HW_WR_DL_LOW1</name>
              <description>Automatic (HW) write calibration result of the lower boundary of Byte1</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>7</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>HW_WR_DL_UP1</name>
              <description>Automatic (HW) write automatic (HW) write calibration result of the upper boundary of Byte1</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>7</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>MPWLHWERR</name>
          <description>MMDC PHY Write Leveling HW Error Register</description>
          <addressOffset>0x878</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>HW_WL0_DQ</name>
              <description>HW write-leveling calibration result of Byte0</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>HW_WL1_DQ</name>
              <description>HW write-leveling calibration result of Byte1</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>MPDGHWST0</name>
          <description>MMDC PHY Read DQS Gating HW Status Register 0</description>
          <addressOffset>0x87C</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>HW_DG_LOW0</name>
              <description>HW DQS gating calibration result of the lower boundary of Byte0</description>
              <bitOffset>0</bitOffset>
              <bitWidth>11</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>HW_DG_UP0</name>
              <description>HW DQS gating calibration result of the upper boundary of Byte0</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>11</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>MPDGHWST1</name>
          <description>MMDC PHY Read DQS Gating HW Status Register 1</description>
          <addressOffset>0x880</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>HW_DG_LOW1</name>
              <description>HW DQS gating calibration result of the lower boundary of Byte1</description>
              <bitOffset>0</bitOffset>
              <bitWidth>11</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>HW_DG_UP1</name>
              <description>HW DQS gating calibration result of the upper boundary of Byte1</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>11</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>MPPDCMPR1</name>
          <description>MMDC PHY Pre-defined Compare Register 1</description>
          <addressOffset>0x88C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>PDV1</name>
              <description>MMDC Pre defined compare value2</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PDV2</name>
              <description>MMDC Pre defined compare value2</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>MPPDCMPR2</name>
          <description>MMDC PHY Pre-defined Compare and CA delay-line Configuration Register</description>
          <addressOffset>0x890</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x400000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MPR_CMP</name>
              <description>MPR(DDR3)/ DQ calibration (LPDDR2/LPDDR3) compare enable</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>MPR_FULL_CMP</name>
              <description>MPR(DDR3)/ DQ calibration (LPDDR2/LPDDR3) full compare enable</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>READ_LEVEL_PATTERN</name>
              <description>MPR(DDR3)/ DQ calibration (LPDDR2/LPDDR3) read compare pattern</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>READ_LEVEL_PATTERN_0</name>
                  <description>Compare with read pattern 1010</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>READ_LEVEL_PATTERN_1</name>
                  <description>Compare with read pattern 0011 (Used only in LPDDR2/LPDDR3 mode)</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ZQ_OFFSET_EN</name>
              <description>no description available</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ZQ_OFFSET_EN_0</name>
                  <description>Hardware ZQ offset disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ZQ_OFFSET_EN_1</name>
                  <description>Hardware ZQ offset enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ZQ_PD_OFFSET</name>
              <description>Programmable offset from -7 to 7 added to the MMDC_MPZQHWCTRL[ZQ_HW_PD_RES] field when ZQ_OFFSET_EN is enabled</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ZQ_PD_OFFSET_0</name>
                  <description>+0</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ZQ_PD_OFFSET_1</name>
                  <description>+1</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ZQ_PD_OFFSET_2</name>
                  <description>+2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ZQ_PD_OFFSET_3</name>
                  <description>+3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ZQ_PD_OFFSET_4</name>
                  <description>+4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ZQ_PD_OFFSET_5</name>
                  <description>+5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ZQ_PD_OFFSET_6</name>
                  <description>+6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ZQ_PD_OFFSET_7</name>
                  <description>+7</description>
                  <value>0x7</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ZQ_PD_OFFSET_8</name>
                  <description>-0</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ZQ_PD_OFFSET_9</name>
                  <description>-1</description>
                  <value>0x9</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ZQ_PD_OFFSET_10</name>
                  <description>-2</description>
                  <value>0xA</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ZQ_PD_OFFSET_11</name>
                  <description>-3</description>
                  <value>0xB</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ZQ_PD_OFFSET_12</name>
                  <description>-4</description>
                  <value>0xC</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ZQ_PD_OFFSET_13</name>
                  <description>-5</description>
                  <value>0xD</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ZQ_PD_OFFSET_14</name>
                  <description>-6</description>
                  <value>0xE</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ZQ_PD_OFFSET_15</name>
                  <description>-7</description>
                  <value>0xF</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ZQ_PU_OFFSET</name>
              <description>Programmable offset from -7 to 7 added to the MMDC_MPZQHWCTRL[ZQ_HW_PU_RES] field when ZQ_OFFSET_EN is enabled</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ZQ_PU_OFFSET_0</name>
                  <description>+0</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ZQ_PU_OFFSET_1</name>
                  <description>+1</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ZQ_PU_OFFSET_2</name>
                  <description>+2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ZQ_PU_OFFSET_3</name>
                  <description>+3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ZQ_PU_OFFSET_4</name>
                  <description>+4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ZQ_PU_OFFSET_5</name>
                  <description>+5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ZQ_PU_OFFSET_6</name>
                  <description>+6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ZQ_PU_OFFSET_7</name>
                  <description>+7</description>
                  <value>0x7</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ZQ_PU_OFFSET_8</name>
                  <description>-0</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ZQ_PU_OFFSET_9</name>
                  <description>-1</description>
                  <value>0x9</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ZQ_PU_OFFSET_10</name>
                  <description>-2</description>
                  <value>0xA</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ZQ_PU_OFFSET_11</name>
                  <description>-3</description>
                  <value>0xB</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ZQ_PU_OFFSET_12</name>
                  <description>-4</description>
                  <value>0xC</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ZQ_PU_OFFSET_13</name>
                  <description>-5</description>
                  <value>0xD</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ZQ_PU_OFFSET_14</name>
                  <description>-6</description>
                  <value>0xE</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ZQ_PU_OFFSET_15</name>
                  <description>-7</description>
                  <value>0xF</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CA_DL_ABS_OFFSET</name>
              <description>Absolute CA (Command/Address of LPDDRR2) offset</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>7</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PHY_CA_DL_UNIT</name>
              <description>This field reflects the number of delay units that are actually used by CA(Command/Address of LPDDR2) delay-line</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>7</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>MPSWDAR0</name>
          <description>MMDC PHY SW Dummy Access Register</description>
          <addressOffset>0x894</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SW_DUMMY_WR</name>
              <description>SW dummy write</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SW_DUMMY_RD</name>
              <description>SW dummy read</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SW_DUM_CMP0</name>
              <description>SW dummy read byte0 compare results</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SW_DUM_CMP0_0</name>
                  <description>Dummy read fail</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SW_DUM_CMP0_1</name>
                  <description>Dummy read pass</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SW_DUM_CMP1</name>
              <description>SW dummy read byte1 compare results</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SW_DUM_CMP1_0</name>
                  <description>Dummy read fail</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SW_DUM_CMP1_1</name>
                  <description>Dummy read pass</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>MPSWDRDR0</name>
          <description>MMDC PHY SW Dummy Read Data Register 0</description>
          <addressOffset>0x898</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0xFFFFFFFF</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DUM_RD0</name>
              <description>Dummy read data0</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>MPSWDRDR1</name>
          <description>MMDC PHY SW Dummy Read Data Register 1</description>
          <addressOffset>0x89C</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0xFFFFFFFF</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DUM_RD1</name>
              <description>Dummy read data1</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>MPSWDRDR2</name>
          <description>MMDC PHY SW Dummy Read Data Register 2</description>
          <addressOffset>0x8A0</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0xFFFFFFFF</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DUM_RD2</name>
              <description>Dummy read data2</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>MPSWDRDR3</name>
          <description>MMDC PHY SW Dummy Read Data Register 3</description>
          <addressOffset>0x8A4</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0xFFFFFFFF</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DUM_RD3</name>
              <description>Dummy read data3</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>MPSWDRDR4</name>
          <description>MMDC PHY SW Dummy Read Data Register 4</description>
          <addressOffset>0x8A8</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0xFFFFFFFF</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DUM_RD4</name>
              <description>Dummy read data4</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>MPSWDRDR5</name>
          <description>MMDC PHY SW Dummy Read Data Register 5</description>
          <addressOffset>0x8AC</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0xFFFFFFFF</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DUM_RD5</name>
              <description>Dummy read data5</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>MPSWDRDR6</name>
          <description>MMDC PHY SW Dummy Read Data Register 6</description>
          <addressOffset>0x8B0</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0xFFFFFFFF</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DUM_RD6</name>
              <description>Dummy read data6</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>MPSWDRDR7</name>
          <description>MMDC PHY SW Dummy Read Data Register 7</description>
          <addressOffset>0x8B4</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0xFFFFFFFF</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DUM_RD7</name>
              <description>Dummy read data7</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>MPMUR0</name>
          <description>MMDC PHY Measure Unit Register</description>
          <addressOffset>0x8B8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MU_BYP_VAL</name>
              <description>Number of delay units for measurement bypass</description>
              <bitOffset>0</bitOffset>
              <bitWidth>10</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>MU_BYP_EN</name>
              <description>Measure unit bypass enable</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>MU_BYP_EN_0</name>
                  <description>The delay-lines use delay units as indicated at MU_UNIT_DEL_NUM.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MU_BYP_EN_1</name>
                  <description>The delay-lines use delay units as indicated at MU_BYPASS_VAL.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>FRC_MSR</name>
              <description>Force measurement on delay-lines</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>FRC_MSR_0</name>
                  <description>No measurement is performed</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FRC_MSR_1</name>
                  <description>Perform measurement process</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>MU_UNIT_DEL_NUM</name>
              <description>Number of delay units measured per cycle</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>10</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>MPWRCADL</name>
          <description>MMDC Write CA delay-line controller</description>
          <addressOffset>0x8BC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>WR_CA0_DEL</name>
              <description>CA(Command/Address LPDDR2 bus) bit 0 delay fine tuning</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>WR_CA0_DEL_0</name>
                  <description>No change in CA0 delay</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WR_CA0_DEL_1</name>
                  <description>Add CA0 delay of 1 delay unit</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WR_CA0_DEL_2</name>
                  <description>Add CA0 delay of 2 delay units.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WR_CA0_DEL_3</name>
                  <description>Add CA0 delay of 3 delay units.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WR_CA1_DEL</name>
              <description>CA (Command/Address LPDDR2 bus) bit 1 delay fine tuning</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>WR_CA1_DEL_0</name>
                  <description>No change in CA1 delay</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WR_CA1_DEL_1</name>
                  <description>Add CA1 delay of 1 delay unit</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WR_CA1_DEL_2</name>
                  <description>Add CA1 delay of 2 delay units.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WR_CA1_DEL_3</name>
                  <description>Add CA1 delay of 3 delay units.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WR_CA2_DEL</name>
              <description>CA (Command/Address LPDDR2 bus) bit 2 delay fine tuning</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>WR_CA2_DEL_0</name>
                  <description>No change in CA2 delay</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WR_CA2_DEL_1</name>
                  <description>Add CA2 delay of 1 delay unit</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WR_CA2_DEL_2</name>
                  <description>Add CA2 delay of 2 delay units.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WR_CA2_DEL_3</name>
                  <description>Add CA2 delay of 3 delay units.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WR_CA3_DEL</name>
              <description>CA (Command/Address LPDDR2 bus) bit 3 delay fine tuning</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>WR_CA3_DEL_0</name>
                  <description>No change in CA3 delay</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WR_CA3_DEL_1</name>
                  <description>Add CA3 delay of 1 delay unit</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WR_CA3_DEL_2</name>
                  <description>Add CA3 delay of 2 delay units.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WR_CA3_DEL_3</name>
                  <description>Add CA3 delay of 3 delay units.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WR_CA4_DEL</name>
              <description>CA (Command/Address LPDDR2 bus) bit 4 delay fine tuning</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>WR_CA4_DEL_0</name>
                  <description>No change in CA4 delay</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WR_CA4_DEL_1</name>
                  <description>Add CA4 delay of 1 delay unit</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WR_CA4_DEL_2</name>
                  <description>Add CA4 delay of 2 delay units.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WR_CA4_DEL_3</name>
                  <description>Add CA4 delay of 3 delay units.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WR_CA5_DEL</name>
              <description>CA (Command/Address LPDDR2 bus) bit 5 delay fine tuning</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>WR_CA5_DEL_0</name>
                  <description>No change in CA5 delay</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WR_CA5_DEL_1</name>
                  <description>Add CA5 delay of 1 delay unit</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WR_CA5_DEL_2</name>
                  <description>Add CA5 delay of 2 delay units.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WR_CA5_DEL_3</name>
                  <description>Add CA5 delay of 3 delay units.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WR_CA6_DEL</name>
              <description>CA (Command/Address LPDDR2 bus) bit 6 delay fine tuning</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>WR_CA6_DEL_0</name>
                  <description>No change in CA6 delay</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WR_CA6_DEL_1</name>
                  <description>Add CA6 delay of 1 delay unit</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WR_CA6_DEL_2</name>
                  <description>Add CA6 delay of 2 delay units.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WR_CA6_DEL_3</name>
                  <description>Add CA6 delay of 3 delay units.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WR_CA7_DEL</name>
              <description>CA (Command/Address LPDDR2 bus) bit 7 delay fine tuning</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>WR_CA7_DEL_0</name>
                  <description>No change in CA7 delay</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WR_CA7_DEL_1</name>
                  <description>Add CA7 delay of 1 delay unit</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WR_CA7_DEL_2</name>
                  <description>Add CA7 delay of 2 delay units.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WR_CA7_DEL_3</name>
                  <description>Add CA7 delay of 3 delay units.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WR_CA8_DEL</name>
              <description>CA (Command/Address LPDDR2 bus) bit 8 delay fine tuning</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>WR_CA8_DEL_0</name>
                  <description>No change in CA8 delay</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WR_CA8_DEL_1</name>
                  <description>Add CA8 delay of 1 delay unit</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WR_CA8_DEL_2</name>
                  <description>Add CA8 delay of 2 delay units.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WR_CA8_DEL_3</name>
                  <description>Add CA8 delay of 3 delay units.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WR_CA9_DEL</name>
              <description>CA (Command/Address LPDDR2 bus) bit 9 delay fine tuning</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>WR_CA9_DEL_0</name>
                  <description>No change in CA9 delay</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WR_CA9_DEL_1</name>
                  <description>Add CA9 delay of 1 delay unit</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WR_CA9_DEL_2</name>
                  <description>Add CA9 delay of 2 delay units.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WR_CA9_DEL_3</name>
                  <description>Add CA9 delay of 3 delay units.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>MPDCCR</name>
          <description>MMDC Duty Cycle Control Register</description>
          <addressOffset>0x8C0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x24922492</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>WR_DQS0_FT_DCC</name>
              <description>Write DQS duty cycle fine tuning control of Byte0</description>
              <bitOffset>0</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>WR_DQS0_FT_DCC_1</name>
                  <description>51.5% low 48.5% high</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WR_DQS0_FT_DCC_2</name>
                  <description>50% duty cycle (default)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WR_DQS0_FT_DCC_4</name>
                  <description>48.5% low 51.5% high</description>
                  <value>0x4</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WR_DQS1_FT_DCC</name>
              <description>Write DQS duty cycle fine tuning control of Byte1</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>WR_DQS1_FT_DCC_1</name>
                  <description>51.5% low 48.5% high</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WR_DQS1_FT_DCC_2</name>
                  <description>50% duty cycle (default)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WR_DQS1_FT_DCC_4</name>
                  <description>48.5% low 51.5% high</description>
                  <value>0x4</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CK_FT0_DCC</name>
              <description>Primary duty cycle fine tuning control of DDR clock</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CK_FT0_DCC_1</name>
                  <description>48.5% low 51.5% high</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CK_FT0_DCC_2</name>
                  <description>50% duty cycle (default)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CK_FT0_DCC_4</name>
                  <description>51.5% low 48.5% high</description>
                  <value>0x4</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CK_FT1_DCC</name>
              <description>Secondary duty cycle fine tuning control of DDR clock</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CK_FT1_DCC_1</name>
                  <description>48.5% low 51.5% high</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CK_FT1_DCC_2</name>
                  <description>50% duty cycle (default)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CK_FT1_DCC_4</name>
                  <description>51.5% low 48.5% high</description>
                  <value>0x4</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RD_DQS0_FT_DCC</name>
              <description>Read DQS duty cycle fine tuning control of Byte0</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RD_DQS0_FT_DCC_1</name>
                  <description>51.5% low 48.5% high</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RD_DQS0_FT_DCC_2</name>
                  <description>50% duty cycle (default)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RD_DQS0_FT_DCC_4</name>
                  <description>48.5% low 51.5% high</description>
                  <value>0x4</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RD_DQS1_FT_DCC</name>
              <description>Read DQS duty cycle fine tuning control of Byte1</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RD_DQS1_FT_DCC_1</name>
                  <description>51.5% low 48.5% high</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RD_DQS1_FT_DCC_2</name>
                  <description>50% duty cycle (default)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RD_DQS1_FT_DCC_4</name>
                  <description>48.5% low 51.5% high</description>
                  <value>0x4</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
      </registers>
    </peripheral>
    <peripheral>
      <name>EIM</name>
      <description>EIM</description>
      <groupName>EIM</groupName>
      <prependToName>EIM_</prependToName>
      <baseAddress>0x21B8000</baseAddress>
      <addressBlock>
        <offset>0</offset>
        <size>0x94</size>
        <usage>registers</usage>
      </addressBlock>
      <interrupt>
        <name>WEIM</name>
        <value>46</value>
      </interrupt>
      <registers>
        <register>
          <dim>6</dim>
          <dimIncrement>0x18</dimIncrement>
          <name>CS%sGCR1</name>
          <description>Chip Select n General Configuration Register 1</description>
          <addressOffset>0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10080</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>CSEN</name>
              <description>CS Enable</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CSEN_0</name>
                  <description>Chip select function is disabled; attempts to access an address mapped by this chip select results in an error respond and no assertion of the chip select output</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CSEN_1</name>
                  <description>Chip select is enabled, and is asserted when presented with a valid access.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SWR</name>
              <description>Synchronous Write Data</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SWR_0</name>
                  <description>write accesses are in Asynchronous mode</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SWR_1</name>
                  <description>write accesses are in Synchronous mode</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SRD</name>
              <description>Synchronous Read Data</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRD_0</name>
                  <description>read accesses are in Asynchronous mode</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRD_1</name>
                  <description>read accesses are in Synchronous mode</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>MUM</name>
              <description>Multiplexed Mode</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>MUM_0</name>
                  <description>Multiplexed Mode disable</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MUM_1</name>
                  <description>Multiplexed Mode enable</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WFL</name>
              <description>Write Fix Latency</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>WFL_0</name>
                  <description>the External device WAIT signal is being monitored, and it reflect the external data bus state</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WFL_1</name>
                  <description>the state of the External devices is determined internally (Fix latency mode only)</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RFL</name>
              <description>Read Fix Latency</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RFL_0</name>
                  <description>the External device WAIT signal is being monitored, and it reflect the external data bus state</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RFL_1</name>
                  <description>the state of the External devices is determined internally (Fix latency mode only)</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CRE</name>
              <description>Configuration Register Enable</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CRE_0</name>
                  <description>CRE signal use is disable</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CRE_1</name>
                  <description>CRE signal use is enable</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CREP</name>
              <description>Configuration Register Enable Polarity</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CREP_0</name>
                  <description>CRE signal is active low</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CREP_1</name>
                  <description>CRE signal is active high</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BL</name>
              <description>Burst Length</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>BL_0</name>
                  <description>4 words Memory wrap burst length (read page burst size when APR = 1)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BL_1</name>
                  <description>8 words Memory wrap burst length (read page burst size when APR = 1)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BL_2</name>
                  <description>16 words Memory wrap burst length (read page burst size when APR = 1)</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BL_3</name>
                  <description>32 words Memory wrap burst length (read page burst size when APR = 1)</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BL_4</name>
                  <description>Continuous burst length (2 words read page burst size when APR = 1)</description>
                  <value>0x4</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WC</name>
              <description>Write Continuous</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>WC_0</name>
                  <description>Write access burst length occurs according to BL value.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WC_1</name>
                  <description>Write access burst length is continuous.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BCD</name>
              <description>Burst Clock Divisor</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>BCD_0</name>
                  <description>Divide EIM clock by 1</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BCD_1</name>
                  <description>Divide EIM clock by 2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BCD_2</name>
                  <description>Divide EIM clock by 3</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BCD_3</name>
                  <description>Divide EIM clock by 4</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BCS</name>
              <description>Burst Clock Start</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>BCS_0</name>
                  <description>0 EIM clock cycle additional delay</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BCS_1</name>
                  <description>1 EIM clock cycle additional delay</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BCS_2</name>
                  <description>2 EIM clock cycle additional delay</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BCS_3</name>
                  <description>3 EIM clock cycle additional delay</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSZ</name>
              <description>Data Port Size</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSZ_1</name>
                  <description>16 bit port resides on DATA[15:0]</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSZ_2</name>
                  <description>16 bit port resides on DATA[31:16]</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSZ_3</name>
                  <description>32 bit port resides on DATA[31:0]</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSZ_4</name>
                  <description>8 bit port resides on DATA[7:0]</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSZ_5</name>
                  <description>8 bit port resides on DATA[15:8]</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSZ_6</name>
                  <description>8 bit port resides on DATA[23:16]</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSZ_7</name>
                  <description>8 bit port resides on DATA[31:24]</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SP</name>
              <description>Supervisor Protect</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SP_0</name>
                  <description>User mode accesses are allowed in the memory range defined by chip select.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SP_1</name>
                  <description>User mode accesses are prohibited. All attempts to access an address mapped by this chip select in User mode results in an error response and no assertion of the chip select output.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CSREC</name>
              <description>CS Recovery</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CSREC_0</name>
                  <description>0 EIM clock cycles minimum width of CS, OE and WE signals (read async. mode only)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CSREC_1</name>
                  <description>1 EIM clock cycles minimum width of CS, OE and WE signals</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CSREC_2</name>
                  <description>2 EIM clock cycles minimum width of CS, OE and WE signals</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CSREC_7</name>
                  <description>7 EIM clock cycles minimum width of CS, OE and WE signals</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>AUS</name>
              <description>Address UnShifted</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>AUS_0</name>
                  <description>Address shifted according to port size (DSZ config) (128 Mbyte maximum supported memory density).</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AUS_1</name>
                  <description>Address unshifted (32 Mbyte maximum supported memory density).</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>GBC</name>
              <description>Gap Between Chip Selects</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>GBC_0</name>
                  <description>minimum of 0 EIM clock cycles before next access from different chip select (async. mode only)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>GBC_1</name>
                  <description>minimum of 1 EIM clock cycles before next access from different chip select</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>GBC_2</name>
                  <description>minimum of 2 EIM clock cycles before next access from different chip select</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>GBC_7</name>
                  <description>minimum of 7 EIM clock cycles before next access from different chip select</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WP</name>
              <description>Write Protect</description>
              <bitOffset>0x1B</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>WP_0</name>
                  <description>Writes are allowed in the memory range defined by chip.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WP_1</name>
                  <description>Writes are prohibited. All attempts to write to an address mapped by this chip select result in a error response and no assertion of the chip select output.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PSZ</name>
              <description>Page Size</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PSZ_0</name>
                  <description>8 words page size</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PSZ_1</name>
                  <description>16 words page size</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PSZ_2</name>
                  <description>32 words page size</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PSZ_3</name>
                  <description>64 words page size</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PSZ_4</name>
                  <description>128 words page size</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PSZ_5</name>
                  <description>256 words page size</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PSZ_6</name>
                  <description>512 words page size</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PSZ_7</name>
                  <description>1024 (1k) words page size</description>
                  <value>0x7</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PSZ_8</name>
                  <description>2048 (2k) words page size</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PSZ_9</name>
                  <description>- 1111 Reserved</description>
                  <value>0x9</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <dim>6</dim>
          <dimIncrement>0x18</dimIncrement>
          <name>CS%sGCR2</name>
          <description>Chip Select n General Configuration Register 2</description>
          <addressOffset>0x4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x1000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ADH</name>
              <description>Address hold time - This bit field determine the address hold time after ADV negation when mum = 1 (muxed mode)</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ADH_0</name>
                  <description>0 cycle after ADV negation</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ADH_1</name>
                  <description>1 cycle after ADV negation</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ADH_2</name>
                  <description>2 cycle after ADV negation</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DAPS</name>
              <description>Data Acknowledge Poling Start</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DAPS_0</name>
                  <description>3 EIM clk cycle between start of access and first DTACK check</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DAPS_1</name>
                  <description>4 EIM clk cycles between start of access and first DTACK check</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DAPS_2</name>
                  <description>5 EIM clk cycles between start of access and first DTACK check</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DAPS_7</name>
                  <description>10 EIM clk cycles between start of access and first DTACK check</description>
                  <value>0x7</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DAPS_11</name>
                  <description>14 EIM clk cycles between start of access and first DTACK check</description>
                  <value>0xB</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DAPS_15</name>
                  <description>18 EIM clk cycles between start of access and first DTACK check</description>
                  <value>0xF</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DAE</name>
              <description>Data Acknowledge Enable</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DAE_0</name>
                  <description>DTACK signal use is disable</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DAE_1</name>
                  <description>DTACK signal use is enable</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DAP</name>
              <description>Data Acknowledge Polarity</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DAP_0</name>
                  <description>DTACK signal is active high</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DAP_1</name>
                  <description>DTACK signal is active low</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>MUX16_BYP_GRANT</name>
              <description>Muxed 16 bypass grant</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>MUX16_BYP_GRANT_0</name>
                  <description>EIM waits for grant before driving a 16 bit muxed mode access to the memory.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MUX16_BYP_GRANT_1</name>
                  <description>EIM ignores the grant signal and immediately drives a 16 bit muxed mode access to the memory.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <dim>6</dim>
          <dimIncrement>0x18</dimIncrement>
          <name>CS%sRCR1</name>
          <description>Chip Select n Read Configuration Register 1</description>
          <addressOffset>0x8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RCSN</name>
              <description>Read CS Negation</description>
              <bitOffset>0</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RCSN_0</name>
                  <description>0 EIM clock cycles between end of read access and CS negation</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RCSN_1</name>
                  <description>1 EIM clock cycles between end of read access and CS negation</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RCSN_2</name>
                  <description>2 EIM clock cycles between end of read access and CS negation</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RCSN_7</name>
                  <description>7 EIM clock cycles between end of read access and CS negation</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RCSA</name>
              <description>Read CS Assertion</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RCSA_0</name>
                  <description>0 EIM clock cycles between beginning of read access and CS assertion</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RCSA_1</name>
                  <description>1 EIM clock cycles between beginning of read access and CS assertion</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RCSA_2</name>
                  <description>2 EIM clock cycles between beginning of read access and CS assertion</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RCSA_7</name>
                  <description>7 EIM clock cycles between beginning of read access and CS assertion</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>OEN</name>
              <description>OE Negation</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>OEN_0</name>
                  <description>0 EIM clock cycles between end of access and OE negation</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>OEN_1</name>
                  <description>1 EIM clock cycles between end of access and OE negation</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>OEN_2</name>
                  <description>2 EIM clock cycles between end of access and OE negation</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>OEN_7</name>
                  <description>7 EIM clock cycles between end of access and OE negation</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>OEA</name>
              <description>OE Assertion</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>OEA_0</name>
                  <description>0 EIM clock cycles between beginning of access and OE assertion</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>OEA_1</name>
                  <description>1 EIM clock cycles between beginning of access and OE assertion</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>OEA_2</name>
                  <description>2 EIM clock cycles between beginning of access and OE assertion</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>OEA_7</name>
                  <description>7 EIM clock cycles between beginning of access and OE assertion</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RADVN</name>
              <description>ADV Negation</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RAL</name>
              <description>Read ADV Low</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RADVA</name>
              <description>ADV Assertion</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RADVA_0</name>
                  <description>0 EIM clock cycles between beginning of access and ADV assertion</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RADVA_1</name>
                  <description>1 EIM clock cycles between beginning of access and ADV assertion</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RADVA_2</name>
                  <description>2 EIM clock cycles between beginning of access and ADV assertion</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RADVA_7</name>
                  <description>7 EIM clock cycles between beginning of access and ADV assertion</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RWSC</name>
              <description>Read Wait State Control</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RWSC_1</name>
                  <description>RWSC value is 1</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RWSC_2</name>
                  <description>RWSC value is 2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RWSC_61</name>
                  <description>RWSC value is 61</description>
                  <value>0x3D</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RWSC_62</name>
                  <description>RWSC value is 62</description>
                  <value>0x3E</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RWSC_63</name>
                  <description>RWSC value is 63</description>
                  <value>0x3F</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <dim>6</dim>
          <dimIncrement>0x18</dimIncrement>
          <name>CS%sRCR2</name>
          <description>Chip Select n Read Configuration Register 2</description>
          <addressOffset>0xC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RBEN</name>
              <description>Read BE Negation</description>
              <bitOffset>0</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RBEN_0</name>
                  <description>0 EIM clock cycles between end of read access and BE negation</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RBEN_1</name>
                  <description>1 EIM clock cycles between end of read access and BE negation</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RBEN_2</name>
                  <description>2 EIM clock cycles between end of read access and BE negation</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RBEN_7</name>
                  <description>7 EIM clock cycles between end of read access and BE negation</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RBE</name>
              <description>Read BE enable. This bit field determines if BE will be asserted during read access.</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RBE_0</name>
                  <description>- BE are disabled during read access.</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RBEA</name>
              <description>Read BE Assertion</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RBEA_0</name>
                  <description>0 EIM clock cycles between beginning of read access and BE assertion</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RBEA_1</name>
                  <description>1 EIM clock cycles between beginning of read access and BE assertion</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RBEA_2</name>
                  <description>2 EIM clock cycles between beginning of read access and BE assertion</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RBEA_7</name>
                  <description>7 EIM clock cycles between beginning of read access and BE assertion</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RL</name>
              <description>Read Latency</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RL_0</name>
                  <description>Feedback clock loop delay is up to 1 cycle for BCD = 0 or 1.5 cycles for BCD != 0</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RL_1</name>
                  <description>Feedback clock loop delay is up to 2 cycles for BCD = 0 or 2.5 cycles for BCD != 0</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RL_2</name>
                  <description>Feedback clock loop delay is up to 3 cycles for BCD = 0 or 3.5 cycles for BCD != 0</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RL_3</name>
                  <description>Feedback clock loop delay is up to 4 cycles for BCD = 0 or 4.5 cycles for BCD != 0</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PAT</name>
              <description>Page Access Time</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PAT_0</name>
                  <description>Address width is 2 EIM clock cycles</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PAT_1</name>
                  <description>Address width is 3 EIM clock cycles</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PAT_2</name>
                  <description>Address width is 4 EIM clock cycles</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PAT_3</name>
                  <description>Address width is 5 EIM clock cycles</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PAT_4</name>
                  <description>Address width is 6 EIM clock cycles</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PAT_5</name>
                  <description>Address width is 7 EIM clock cycles</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PAT_6</name>
                  <description>Address width is 8 EIM clock cycles</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PAT_7</name>
                  <description>Address width is 9 EIM clock cycles</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>APR</name>
              <description>Asynchronous Page Read</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <dim>6</dim>
          <dimIncrement>0x18</dimIncrement>
          <name>CS%sWCR1</name>
          <description>Chip Select n Write Configuration Register 1</description>
          <addressOffset>0x10</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>WCSN</name>
              <description>Write CS Negation</description>
              <bitOffset>0</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>WCSN_0</name>
                  <description>0 EIM clock cycles between end of read access and CS negation</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WCSN_1</name>
                  <description>1 EIM clock cycles between end of read access and CS negation</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WCSN_2</name>
                  <description>2 EIM clock cycles between end of read access and CS negation</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WCSN_7</name>
                  <description>7 EIM clock cycles between end of read access and CS negation</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WCSA</name>
              <description>Write CS Assertion</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>WCSA_0</name>
                  <description>0 EIM clock cycles between beginning of write access and CS assertion</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WCSA_1</name>
                  <description>1 EIM clock cycles between beginning of write access and CS assertion</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WCSA_2</name>
                  <description>2 EIM clock cycles between beginning of write access and CS assertion</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WCSA_7</name>
                  <description>7 EIMclock cycles between beginning of write access and CS assertion</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WEN</name>
              <description>WE Negation</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>WEN_0</name>
                  <description>0 EIM clock cycles between beginning of access and WE assertion</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WEN_1</name>
                  <description>1 EIM clock cycles between beginning of access and WE assertion</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WEN_2</name>
                  <description>2 EIM clock cycles between beginning of access and WE assertion</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WEN_7</name>
                  <description>7 EIM clock cycles between beginning of access and WE assertion</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WEA</name>
              <description>WE Assertion</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>WEA_0</name>
                  <description>0 EIM clock cycles between beginning of access and WE assertion</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WEA_1</name>
                  <description>1 EIM clock cycles between beginning of access and WE assertion</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WEA_2</name>
                  <description>2 EIM clock cycles between beginning of access and WE assertion</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WEA_7</name>
                  <description>7 EIMclock cycles between beginning of access and WE assertion</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WBEN</name>
              <description>BE[3:0] Negation</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>WBEA</name>
              <description>BE Assertion</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>WBEA_0</name>
                  <description>0 EIM clock cycles between beginning of access and BE assertion</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WBEA_1</name>
                  <description>1 EIM clock cycles between beginning of access and BE assertion</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WBEA_2</name>
                  <description>2 EIM clock cycles between beginning of access and BE assertion</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WBEA_7</name>
                  <description>7 EIM clock cycles between beginning of access and BE assertion</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WADVN</name>
              <description>ADV Negation</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>WADVA</name>
              <description>ADV Assertion</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>WADVA_0</name>
                  <description>0 EIM clock cycles between beginning of access and ADV assertion</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WADVA_1</name>
                  <description>1 EIM clock cycles between beginning of access and ADV assertion</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WADVA_2</name>
                  <description>2 EIM clock cycles between beginning of access and ADV assertion</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WADVA_7</name>
                  <description>7 EIM clock cycles between beginning of access and ADV assertion</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WWSC</name>
              <description>Write Wait State Control</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>WWSC_1</name>
                  <description>WWSC value is 1</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WWSC_2</name>
                  <description>WWSC value is 2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WWSC_3</name>
                  <description>WWSC value is 3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WWSC_63</name>
                  <description>WWSC value is 63</description>
                  <value>0x3F</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WBED</name>
              <description>Write Byte Enable Disable</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>WAL</name>
              <description>Write ADV Low</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <dim>6</dim>
          <dimIncrement>0x18</dimIncrement>
          <name>CS%sWCR2</name>
          <description>Chip Select n Write Configuration Register 2</description>
          <addressOffset>0x14</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>WBCDD</name>
              <description>Write Burst Clock Divisor Decrement</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>WCR</name>
          <description>EIM Configuration Register</description>
          <addressOffset>0x90</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x20</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BCM</name>
              <description>Burst Clock Mode</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>BCM_0</name>
                  <description>The burst clock runs only when accessing a chip select range with the SWR/SRD bits set. When the burst clock is not running it remains in a logic 0 state. When the burst clock is running it is configured by the BCD and BCS bit fields in the chip select Configuration Register.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BCM_1</name>
                  <description>The burst clock runs whenever ACLK is active (independent of chip select configuration)</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>GBCD</name>
              <description>General Burst Clock Divisor</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>GBCD_0</name>
                  <description>Divide EIM clock by 1</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>GBCD_1</name>
                  <description>Divide EIM clock by 2</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>GBCD_2</name>
                  <description>Divide EIM clock by 3</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>GBCD_3</name>
                  <description>Divide EIM clock by 4</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CONT_BCLK_SEL</name>
              <description>Continuous BCLK select</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CONT_BCLK_SEL_0</name>
                  <description>BCLK When nesserary</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CONT_BCLK_SEL_1</name>
                  <description>BCLK Continuous</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>INTEN</name>
              <description>Interrupt Enable</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>INTEN_0</name>
                  <description>External interrupt Disable</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>INTEN_1</name>
                  <description>External interrupt Enable</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>INTPOL</name>
              <description>Interrupt Polarity. This bit field determines the polarity of the external device interrupt.</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>INTPOL_0</name>
                  <description>External interrupt polarity is active low</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>INTPOL_1</name>
                  <description>External interrupt polarity is active high</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WDOG_EN</name>
              <description>Memory WDOG enable</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>WDOG_EN_0</name>
                  <description>Memory WDOG is Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WDOG_EN_1</name>
                  <description>Memory WDOG is Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WDOG_LIMIT</name>
              <description>Memory Watchdog (WDOG) cycle limit</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>WDOG_LIMIT_0</name>
                  <description>128 BCLK cycles</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WDOG_LIMIT_1</name>
                  <description>256 BCLK cycles</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WDOG_LIMIT_2</name>
                  <description>512 BCLK cycles</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WDOG_LIMIT_3</name>
                  <description>1024 BCLK cycles</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>FRUN_ACLK_EN</name>
              <description>Free run ACLK enable</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
      </registers>
    </peripheral>
    <peripheral>
      <name>OCOTP</name>
      <description>OCOTP Register Reference Index</description>
      <groupName>OCOTP</groupName>
      <prependToName>OCOTP_</prependToName>
      <baseAddress>0x21BC000</baseAddress>
      <addressBlock>
        <offset>0</offset>
        <size>0x8F4</size>
        <usage>registers</usage>
      </addressBlock>
      <registers>
        <register>
          <name>CTRL</name>
          <description>OTP Controller Control Register</description>
          <addressOffset>0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ADDR</name>
              <description>OTP write and read access address register</description>
              <bitOffset>0</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>BUSY</name>
              <description>OTP controller status bit</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>ERROR</name>
              <description>Set by the controller when an access to a locked region(OTP or shadow register) is requested</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RELOAD_SHADOWS</name>
              <description>Set to force re-loading the shadow registers (HW/SW capability and LOCK)</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CRC_TEST</name>
              <description>Set to calculate CRC according to start address and end address in CRC_ADDR register</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CRC_FAIL</name>
              <description>Set by controller when calculated CRC value is not equal to appointed CRC fuse word</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>WR_UNLOCK</name>
              <description>Write 0x3E77 to enable OTP write accesses</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>KEY</name>
                  <description>Key needed to unlock HW_OCOTP_DATA register.</description>
                  <value>0x3E77</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>CTRL_SET</name>
          <description>OTP Controller Control Register</description>
          <addressOffset>0x4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ADDR</name>
              <description>OTP write and read access address register</description>
              <bitOffset>0</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>BUSY</name>
              <description>OTP controller status bit</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>ERROR</name>
              <description>Set by the controller when an access to a locked region(OTP or shadow register) is requested</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RELOAD_SHADOWS</name>
              <description>Set to force re-loading the shadow registers (HW/SW capability and LOCK)</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CRC_TEST</name>
              <description>Set to calculate CRC according to start address and end address in CRC_ADDR register</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CRC_FAIL</name>
              <description>Set by controller when calculated CRC value is not equal to appointed CRC fuse word</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>WR_UNLOCK</name>
              <description>Write 0x3E77 to enable OTP write accesses</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>KEY</name>
                  <description>Key needed to unlock HW_OCOTP_DATA register.</description>
                  <value>0x3E77</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>CTRL_CLR</name>
          <description>OTP Controller Control Register</description>
          <addressOffset>0x8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ADDR</name>
              <description>OTP write and read access address register</description>
              <bitOffset>0</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>BUSY</name>
              <description>OTP controller status bit</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>ERROR</name>
              <description>Set by the controller when an access to a locked region(OTP or shadow register) is requested</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RELOAD_SHADOWS</name>
              <description>Set to force re-loading the shadow registers (HW/SW capability and LOCK)</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CRC_TEST</name>
              <description>Set to calculate CRC according to start address and end address in CRC_ADDR register</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CRC_FAIL</name>
              <description>Set by controller when calculated CRC value is not equal to appointed CRC fuse word</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>WR_UNLOCK</name>
              <description>Write 0x3E77 to enable OTP write accesses</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>KEY</name>
                  <description>Key needed to unlock HW_OCOTP_DATA register.</description>
                  <value>0x3E77</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>CTRL_TOG</name>
          <description>OTP Controller Control Register</description>
          <addressOffset>0xC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ADDR</name>
              <description>OTP write and read access address register</description>
              <bitOffset>0</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>BUSY</name>
              <description>OTP controller status bit</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>ERROR</name>
              <description>Set by the controller when an access to a locked region(OTP or shadow register) is requested</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RELOAD_SHADOWS</name>
              <description>Set to force re-loading the shadow registers (HW/SW capability and LOCK)</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CRC_TEST</name>
              <description>Set to calculate CRC according to start address and end address in CRC_ADDR register</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CRC_FAIL</name>
              <description>Set by controller when calculated CRC value is not equal to appointed CRC fuse word</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>WR_UNLOCK</name>
              <description>Write 0x3E77 to enable OTP write accesses</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>KEY</name>
                  <description>Key needed to unlock HW_OCOTP_DATA register.</description>
                  <value>0x3E77</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>TIMING</name>
          <description>OTP Controller Timing Register</description>
          <addressOffset>0x10</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x2C64116</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>STROBE_PROG</name>
              <description>This count value specifies the strobe period in one time write OTP</description>
              <bitOffset>0</bitOffset>
              <bitWidth>12</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RELAX</name>
              <description>This count value specifies the time to add to all default timing parameters other than the Tpgm and Trd</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>STROBE_READ</name>
              <description>This count value specifies the strobe period in one time read OTP</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>WAIT</name>
              <description>This count value specifies time interval between auto read and write access in one time program</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSRVD0</name>
              <description>These bits always read back zero.</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>DATA</name>
          <description>OTP Controller Write Data Register</description>
          <addressOffset>0x20</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA</name>
              <description>Used to initiate a write to OTP</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>READ_CTRL</name>
          <description>OTP Controller Write Data Register</description>
          <addressOffset>0x30</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>READ_FUSE</name>
              <description>Used to initiate a read to OTP</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>31</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>READ_FUSE_DATA</name>
          <description>OTP Controller Read Data Register</description>
          <addressOffset>0x40</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA</name>
              <description>The data read from OTP</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_STICKY</name>
          <description>Sticky bit Register</description>
          <addressOffset>0x50</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRK_REVOKE_LOCK</name>
              <description>Shadow register write and OTP write lock for SRK_REVOKE region</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>FIELD_RETURN_LOCK</name>
              <description>Shadow register write and OTP write lock for FIELD_RETURN region</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>27</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>SCS</name>
          <description>Software Controllable Signals Register</description>
          <addressOffset>0x60</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>HAB_JDE</name>
              <description>HAB JTAG Debug Enable</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SPARE</name>
              <description>Unallocated read/write bits for implementation specific software use.</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>30</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>LOCK</name>
              <description>When set, all of the bits in this register are locked and can not be changed through SW programming</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>SCS_SET</name>
          <description>Software Controllable Signals Register</description>
          <addressOffset>0x64</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>HAB_JDE</name>
              <description>HAB JTAG Debug Enable</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SPARE</name>
              <description>Unallocated read/write bits for implementation specific software use.</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>30</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>LOCK</name>
              <description>When set, all of the bits in this register are locked and can not be changed through SW programming</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>SCS_CLR</name>
          <description>Software Controllable Signals Register</description>
          <addressOffset>0x68</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>HAB_JDE</name>
              <description>HAB JTAG Debug Enable</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SPARE</name>
              <description>Unallocated read/write bits for implementation specific software use.</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>30</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>LOCK</name>
              <description>When set, all of the bits in this register are locked and can not be changed through SW programming</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>SCS_TOG</name>
          <description>Software Controllable Signals Register</description>
          <addressOffset>0x6C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>HAB_JDE</name>
              <description>HAB JTAG Debug Enable</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SPARE</name>
              <description>Unallocated read/write bits for implementation specific software use.</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>30</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>LOCK</name>
              <description>When set, all of the bits in this register are locked and can not be changed through SW programming</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CRC_ADDR</name>
          <description>OTP Controller CRC test address</description>
          <addressOffset>0x70</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_START_ADDR</name>
              <description>End address of fuse location for CRC calculation</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_END_ADDR</name>
              <description>Start address of fuse location for CRC calculation</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CRC_ADDR</name>
              <description>Address of 32-bit CRC result for comparing</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>OTPMK_CRC</name>
              <description>Enable bit for CRC32 calculation address When OTPMK_CRC_ADDR_OTPMK_CRC bit sets to 1, calculation address sets to OTPMK_CRC (recommend)</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>12</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CRC_VALUE</name>
          <description>OTP Controller CRC Value Register</description>
          <addressOffset>0x80</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA</name>
              <description>The crc32 value based on CRC_ADDR</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>VERSION</name>
          <description>OTP Controller Version Register</description>
          <addressOffset>0x90</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0x3000000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>STEP</name>
              <description>Fixed read-only value reflecting the stepping of the RTL version.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>MINOR</name>
              <description>Fixed read-only value reflecting the MINOR field of the RTL version.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>MAJOR</name>
              <description>Fixed read-only value reflecting the MAJOR field of the RTL version.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>TIMING2</name>
          <description>OTP Controller Timing Register 2</description>
          <addressOffset>0x100</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x1C10042</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RELAX_PROG</name>
              <description>This count value specifies the time to add to write OTP for complement address enable time.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>12</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RELAX_READ</name>
              <description>This count value specifies the time to add to read OTP for complement address enable cycle time.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RELAX1</name>
              <description>Not used, preserved</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>7</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>LOCK</name>
          <description>Value of OTP Bank0 Word0 (Lock controls)</description>
          <addressOffset>0x400</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TESTER</name>
              <description>Status of shadow register and OTP write lock for tester region</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>BOOT_CFG</name>
              <description>Status of shadow register and OTP write lock for boot_cfg region</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>MEM_TRIM</name>
              <description>Status of shadow register and OTP write lock for mem_trim region</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>SJC_RESP</name>
              <description>Status of shadow register read and write, OTP read and write lock for sjc_resp region</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>MAC_ADDR</name>
              <description>Status of shadow register and OTP write lock for mac_addr region</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>GP1</name>
              <description>Status of shadow register and OTP write lock for gp2 region</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>GP2</name>
              <description>Status of shadow register and OTP write lock for gp2 region</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>SRK</name>
              <description>Status of shadow register and OTP write lock for srk region</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>GP3</name>
              <description>Status of shadow register and OTP write lock for GP3 region</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>SW_GP</name>
              <description>Status of shadow register and OTP write lock for SW_GP region</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>OTPMK</name>
              <description>Status of shadow register and OTP write lock for OTPMK region</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>ANALOG</name>
              <description>Status of shadow register and OTP write lock for analog region</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>OTPMK_CRC</name>
              <description>Status of shadow register and OTP write lock for otpmk crc region</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>ROM_PATCH</name>
              <description>Status of shadow register and OTP write lock for rom_patch region</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>MISC_CONF</name>
              <description>Status of shadow register and OTP write lock for misc_conf region</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>GP4</name>
              <description>Status of shadow register and OTP write lock for GP4 region</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>PIN</name>
              <description>Status of Pin access lock bit. When set, pin access is disabled.</description>
              <bitOffset>0x19</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>GP4_RLOCK</name>
              <description>Status of shadow register and OTP read lock for GP4 region</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>GP3_RLOCK</name>
              <description>Status of shadow register and OTP read lock for GP3 region</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CFG0</name>
          <description>Value of OTP Bank0 Word1 (Configuration and Manufacturing Info.)</description>
          <addressOffset>0x410</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BITS</name>
              <description>This register contains 32 bits of the Unique ID and SJC_CHALLENGE field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CFG1</name>
          <description>Value of OTP Bank0 Word2 (Configuration and Manufacturing Info.)</description>
          <addressOffset>0x420</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BITS</name>
              <description>This register contains 32 bits of the Unique ID and SJC_CHALLENGE field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CFG2</name>
          <description>Value of OTP Bank0 Word3 (Configuration and Manufacturing Info.)</description>
          <addressOffset>0x430</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BITS</name>
              <description>Reflects value of OTP Bank 0, word 3 (ADDR = 0x03)</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CFG3</name>
          <description>Value of OTP Bank0 Word4 (Configuration and Manufacturing Info.)</description>
          <addressOffset>0x440</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BITS</name>
              <description>Reflects value of OTP Bank 0, word 4 (ADDR = 0x04)</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CFG4</name>
          <description>Value of OTP Bank0 Word5 (Configuration and Manufacturing Info.)</description>
          <addressOffset>0x450</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BITS</name>
              <description>Reflects value of OTP Bank 0, word 5 (ADDR = 0x05)</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CFG5</name>
          <description>Value of OTP Bank0 Word6 (Configuration and Manufacturing Info.)</description>
          <addressOffset>0x460</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BITS</name>
              <description>Reflects value of OTP Bank 0, word 6 (ADDR = 0x06)</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CFG6</name>
          <description>Value of OTP Bank0 Word7 (Configuration and Manufacturing Info.)</description>
          <addressOffset>0x470</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BITS</name>
              <description>Reflects value of OTP Bank 0, word 7 (ADDR = 0x07)</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>MEM0</name>
          <description>Value of OTP Bank1 Word0 (Memory Related Info.)</description>
          <addressOffset>0x480</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BITS</name>
              <description>Reflects value of OTP bank 1, word 0 (ADDR = 0x08)</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>MEM1</name>
          <description>Value of OTP Bank1 Word1 (Memory Related Info.)</description>
          <addressOffset>0x490</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BITS</name>
              <description>Reflects value of OTP bank 1, word 1 (ADDR = 0x09)</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>MEM2</name>
          <description>Value of OTP Bank1 Word2 (Memory Related Info.)</description>
          <addressOffset>0x4A0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BITS</name>
              <description>Reflects value of OTP bank 1, word 2 (ADDR = 0x0A)</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>MEM3</name>
          <description>Value of OTP Bank1 Word3 (Memory Related Info.)</description>
          <addressOffset>0x4B0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BITS</name>
              <description>Reflects value of OTP bank 1, word 3 (ADDR = 0x0B)</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>MEM4</name>
          <description>Value of OTP Bank1 Word4 (Memory Related Info.)</description>
          <addressOffset>0x4C0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BITS</name>
              <description>Reflects value of OTP bank 1, word 4 (ADDR = 0x0C)</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ANA0</name>
          <description>Value of OTP Bank1 Word5 (Memory Related Info.)</description>
          <addressOffset>0x4D0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BITS</name>
              <description>Reflects value of OTP bank 1, word 5 (ADDR = 0x0D)</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ANA1</name>
          <description>Value of OTP Bank1 Word6 (General Purpose Customer Defined Info.)</description>
          <addressOffset>0x4E0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BITS</name>
              <description>Reflects value of OTP bank 1, word 6 (ADDR = 0x0E)</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ANA2</name>
          <description>Value of OTP Bank1 Word7 (General Purpose Customer Defined Info.)</description>
          <addressOffset>0x4F0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BITS</name>
              <description>Reflects value of OTP bank 1, word 7 (ADDR = 0x0F)</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>OTPMK0</name>
          <description>Value of OTP Bank2 Word0 (OTPMK Key)</description>
          <addressOffset>0x500</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BITS</name>
              <description>Shadow register for the OTPMK Key word0 (Copy of OTP Bank 2, word 0 (ADDR = 0x10))</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>OTPMK1</name>
          <description>Value of OTP Bank2 Word1 (OTPMK Key)</description>
          <addressOffset>0x510</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BITS</name>
              <description>Shadow register for the OTPMK Key word0 (Copy of OTP Bank 2, word 1 (ADDR = 0x11))</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>OTPMK2</name>
          <description>Value of OTP Bank2 Word2 (OTPMK Key)</description>
          <addressOffset>0x520</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BITS</name>
              <description>Shadow register for the OTPMK Key word0 (Copy of OTP Bank 2, word 2 (ADDR = 0x12))</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>OTPMK3</name>
          <description>Value of OTP Bank2 Word3 (OTPMK Key)</description>
          <addressOffset>0x530</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BITS</name>
              <description>Shadow register for the OTPMK Key word0 (Copy of OTP Bank 2, word 3 (ADDR = 0x13))</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>OTPMK4</name>
          <description>Value of OTP Bank2 Word4 (OTPMK Key)</description>
          <addressOffset>0x540</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BITS</name>
              <description>Shadow register for the OTPMK Key word0 (Copy of OTP Bank 2, word 4 (ADDR = 0x14))</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>OTPMK5</name>
          <description>Value of OTP Bank2 Word5 (OTPMK Key)</description>
          <addressOffset>0x550</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BITS</name>
              <description>Shadow register for the OTPMK Key word0 (Copy of OTP Bank 2, word 4 (ADDR = 0x14))</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>OTPMK6</name>
          <description>Value of OTP Bank2 Word6 (OTPMK Key)</description>
          <addressOffset>0x560</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BITS</name>
              <description>Shadow register for the OTPMK Key word0 (Copy of OTP Bank 2, word 6 (ADDR = 0x16))</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>OTPMK7</name>
          <description>Value of OTP Bank2 Word7 (OTPMK Key)</description>
          <addressOffset>0x570</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BITS</name>
              <description>Shadow register for the OTPMK Key word0 (Copy of OTP Bank 2, word 7 (ADDR = 0x17))</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>SRK0</name>
          <description>Shadow Register for OTP Bank3 Word0 (SRK Hash)</description>
          <addressOffset>0x580</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BITS</name>
              <description>Shadow register for the hash of the Super Root Key word0 (Copy of OTP Bank 3, word 0 (ADDR = 0x18))</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>SRK1</name>
          <description>Shadow Register for OTP Bank3 Word1 (SRK Hash)</description>
          <addressOffset>0x590</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BITS</name>
              <description>Shadow register for the hash of the Super Root Key word1 (Copy of OTP Bank 3, word 1 (ADDR = 0x19))</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>SRK2</name>
          <description>Shadow Register for OTP Bank3 Word2 (SRK Hash)</description>
          <addressOffset>0x5A0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BITS</name>
              <description>Shadow register for the hash of the Super Root Key word2 (Copy of OTP Bank 3, word 2 (ADDR = 0x1A))</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>SRK3</name>
          <description>Shadow Register for OTP Bank3 Word3 (SRK Hash)</description>
          <addressOffset>0x5B0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BITS</name>
              <description>Shadow register for the hash of the Super Root Key word3 (Copy of OTP Bank 3, word 3 (ADDR = 0x1B))</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>SRK4</name>
          <description>Shadow Register for OTP Bank3 Word4 (SRK Hash)</description>
          <addressOffset>0x5C0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BITS</name>
              <description>Shadow register for the hash of the Super Root Key word4 (Copy of OTP Bank 3, word 4 (ADDR = 0x1C))</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>SRK5</name>
          <description>Shadow Register for OTP Bank3 Word5 (SRK Hash)</description>
          <addressOffset>0x5D0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BITS</name>
              <description>Shadow register for the hash of the Super Root Key word5 (Copy of OTP Bank 3, word 5 (ADDR = 0x1D))</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>SRK6</name>
          <description>Shadow Register for OTP Bank3 Word6 (SRK Hash)</description>
          <addressOffset>0x5E0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BITS</name>
              <description>Shadow register for the hash of the Super Root Key word6 (Copy of OTP Bank 3, word 6 (ADDR = 0x1E))</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>SRK7</name>
          <description>Shadow Register for OTP Bank3 Word7 (SRK Hash)</description>
          <addressOffset>0x5F0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BITS</name>
              <description>Shadow register for the hash of the Super Root Key word7 (Copy of OTP Bank 3, word 7 (ADDR = 0x1F))</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>SJC_RESP0</name>
          <description>Value of OTP Bank4 Word0 (Secure JTAG Response Field)</description>
          <addressOffset>0x600</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BITS</name>
              <description>Shadow register for the SJC_RESP Key word0 (Copy of OTP Bank 4, word 0 (ADDR = 0x20))</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>SJC_RESP1</name>
          <description>Value of OTP Bank4 Word1 (Secure JTAG Response Field)</description>
          <addressOffset>0x610</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BITS</name>
              <description>Shadow register for the SJC_RESP Key word1 (Copy of OTP Bank 4, word 1 (ADDR = 0x21))</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>MAC0</name>
          <description>Value of OTP Bank4 Word2 (MAC Address)</description>
          <addressOffset>0x620</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BITS</name>
              <description>Reflects value of OTP Bank 4, word 2 (ADDR = 0x22).</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>MAC1</name>
          <description>Value of OTP Bank4 Word3 (MAC Address)</description>
          <addressOffset>0x630</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BITS</name>
              <description>Reflects value of OTP Bank 4, word 3 (ADDR = 0x23).</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>MAC</name>
          <description>Value of OTP Bank4 Word4 (MAC Address) (OCOTP_RESERVED)</description>
          <addressOffset>0x640</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BITS</name>
              <description>Reflects value of OTP Bank 4, word 4 (ADDR = 0x24).</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CRC</name>
          <description>Value of OTP Bank4 Word5 (CRC Key)</description>
          <addressOffset>0x650</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BITS</name>
              <description>Reflects value of OTP Bank 4, word 5 (ADDR = 0x25).</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>GP1</name>
          <description>Value of OTP Bank4 Word6 (General Purpose Customer Defined Info)</description>
          <addressOffset>0x660</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BITS</name>
              <description>Reflects value of OTP Bank 4, word 6 (ADDR = 0x26).</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>GP2</name>
          <description>Value of OTP Bank4 Word7 (General Purpose Customer Defined Info)</description>
          <addressOffset>0x670</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BITS</name>
              <description>Reflects value of OTP Bank 4, word 7 (ADDR = 0x27).</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_GP0</name>
          <description>Value of OTP Bank5 Word0 (SW GP)</description>
          <addressOffset>0x680</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BITS</name>
              <description>Reflects value of OTP Bank 5, word 0 (ADDR = 0x28).</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_GP1</name>
          <description>Value of OTP Bank5 Word1 (SW GP)</description>
          <addressOffset>0x690</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BITS</name>
              <description>Reflects value of OTP Bank 5, word 1 (ADDR = 0x29).</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_GP2</name>
          <description>Value of OTP Bank5 Word2 (SW GP)</description>
          <addressOffset>0x6A0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BITS</name>
              <description>Reflects value of OTP Bank 5, word 2 (ADDR = 0x2a).</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_GP3</name>
          <description>Value of OTP Bank5 Word3 (SW GP)</description>
          <addressOffset>0x6B0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BITS</name>
              <description>Reflects value of OTP Bank 5, word 3 (ADDR = 0x2b).</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_GP4</name>
          <description>Value of OTP Bank5 Word4 (SW GP)</description>
          <addressOffset>0x6C0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BITS</name>
              <description>Reflects value of OTP Bank 5, word 4 (ADDR = 0x2c).</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>MISC_CONF</name>
          <description>Value of OTP Bank5 Word5 (Misc Conf)</description>
          <addressOffset>0x6D0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BITS</name>
              <description>Reflects value of OTP Bank 5, word 5 (ADDR = 0x2d).</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>FIELD_RETURN</name>
          <description>Value of OTP Bank5 Word6 (Field Return)</description>
          <addressOffset>0x6E0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BITS</name>
              <description>Reflects value of OTP Bank 5, word 6 (ADDR = 0x2e).</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>SRK_REVOKE</name>
          <description>Value of OTP Bank5 Word7 (SRK Revoke)</description>
          <addressOffset>0x6F0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BITS</name>
              <description>Reflects value of OTP Bank 5, word 7 (ADDR = 0x2f).</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ROM_PATCH0</name>
          <description>Value of OTP Bank6 Word0 (ROM Patch)</description>
          <addressOffset>0x800</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BITS</name>
              <description>Reflects value of OTP Bank 6, word 0 (ADDR = 0x30).</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ROM_PATCH1</name>
          <description>Value of OTP Bank6 Word1 (ROM Patch)</description>
          <addressOffset>0x810</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BITS</name>
              <description>Reflects value of OTP Bank 6, word 1 (ADDR = 0x31).</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ROM_PATCH2</name>
          <description>Value of OTP Bank6 Word2 (ROM Patch)</description>
          <addressOffset>0x820</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BITS</name>
              <description>Reflects value of OTP Bank 6, word 2 (ADDR = 0x32).</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ROM_PATCH3</name>
          <description>Value of OTP Bank6 Word3 (ROM Patch)</description>
          <addressOffset>0x830</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BITS</name>
              <description>Reflects value of OTP Bank 6, word 3 (ADDR = 0x33).</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ROM_PATCH4</name>
          <description>Value of OTP Bank6 Word4 (ROM Patch)</description>
          <addressOffset>0x840</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BITS</name>
              <description>Reflects value of OTP Bank 6, word 4 (ADDR = 0x34).</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ROM_PATCH5</name>
          <description>Value of OTP Bank6 Word5 (ROM Patch)</description>
          <addressOffset>0x850</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BITS</name>
              <description>Reflects value of OTP Bank 6, word 5 (ADDR = 0x35).</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ROM_PATCH6</name>
          <description>Value of OTP Bank6 Word6 (ROM Patch)</description>
          <addressOffset>0x860</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BITS</name>
              <description>Reflects value of OTP Bank 6, word 6 (ADDR = 0x36).</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>ROM_PATCH7</name>
          <description>Value of OTP Bank6 Word7 (ROM Patch)</description>
          <addressOffset>0x870</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BITS</name>
              <description>Reflects value of OTP Bank 6, word 7 (ADDR = 0x37).</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>GP3_0</name>
          <description>Value of OTP Bank7 Word0 (General Purpose Customer Defined Info)</description>
          <addressOffset>0x880</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BITS</name>
              <description>Reflects value of OTP Bank 8, word 0 (ADDR = 0x40).</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>GP3_1</name>
          <description>Value of OTP Bank7 Word1 (General Purpose Customer Defined Info)</description>
          <addressOffset>0x890</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BITS</name>
              <description>Reflects value of OTP Bank 8, word 1 (ADDR = 0x41).</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>GP3_2</name>
          <description>Value of OTP Bank7 Word2 (General Purpose Customer Defined Info)</description>
          <addressOffset>0x8A0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BITS</name>
              <description>Reflects value of OTP Bank 8, word 2 (ADDR = 0x42).</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>GP3_3</name>
          <description>Value of OTP Bank7 Word3 (General Purpose Customer Defined Info)</description>
          <addressOffset>0x8B0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BITS</name>
              <description>Reflects value of OTP Bank 8, word 3 (ADDR = 0x43).</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>GP3_4</name>
          <description>Value of OTP Bank8 Word4 (General Purpose Customer Defined Info)</description>
          <addressOffset>0x8C0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BITS</name>
              <description>Reflects value of OTP Bank 8, word 4 (ADDR = 0x44).</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>GP4_0</name>
          <description>Value of OTP Bank7 Word5 (General Purpose Customer Defined Info)</description>
          <addressOffset>0x8D0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BITS</name>
              <description>Reflects value of OTP Bank 8, word 5 (ADDR = 0x45).</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>GP4_1</name>
          <description>Value of OTP Bank7 Word6 (General Purpose Customer Defined Info)</description>
          <addressOffset>0x8E0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BITS</name>
              <description>Reflects value of OTP Bank 8, word 6 (ADDR = 0x46).</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>GP4_2</name>
          <description>Value of OTP Bank7 Word7 (General Purpose Customer Defined Info)</description>
          <addressOffset>0x8F0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BITS</name>
              <description>Reflects value of OTP Bank 8, word 7 (ADDR = 0x47).</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
      </registers>
    </peripheral>
    <peripheral>
      <name>CSI</name>
      <description>CSI</description>
      <groupName>CSI</groupName>
      <prependToName>CSI_</prependToName>
      <baseAddress>0x21C4000</baseAddress>
      <addressBlock>
        <offset>0</offset>
        <size>0x50</size>
        <usage>registers</usage>
      </addressBlock>
      <interrupt>
        <name>CSI</name>
        <value>39</value>
      </interrupt>
      <registers>
        <register>
          <name>CSICR1</name>
          <description>CSI Control Register 1</description>
          <addressOffset>0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x40000800</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>PIXEL_BIT</name>
              <description>Pixel Bit</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PIXEL_BIT_0</name>
                  <description>8-bit data for each pixel</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PIXEL_BIT_1</name>
                  <description>10-bit data for each pixel</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>REDGE</name>
              <description>Valid Pixel Clock Edge Select</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>REDGE_0</name>
                  <description>Pixel data is latched at the falling edge of CSI_PIXCLK</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REDGE_1</name>
                  <description>Pixel data is latched at the rising edge of CSI_PIXCLK</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>INV_PCLK</name>
              <description>Invert Pixel Clock Input</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>INV_PCLK_0</name>
                  <description>CSI_PIXCLK is directly applied to internal circuitry</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>INV_PCLK_1</name>
                  <description>CSI_PIXCLK is inverted before applied to internal circuitry</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>INV_DATA</name>
              <description>Invert Data Input. This bit enables or disables internal inverters on the data lines.</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>INV_DATA_0</name>
                  <description>CSI_D[7:0] data lines are directly applied to internal circuitry</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>INV_DATA_1</name>
                  <description>CSI_D[7:0] data lines are inverted before applied to internal circuitry</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>GCLK_MODE</name>
              <description>Gated Clock Mode Enable</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>GCLK_MODE_0</name>
                  <description>Non-gated clock mode. All incoming pixel clocks are valid. HSYNC is ignored.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>GCLK_MODE_1</name>
                  <description>Gated clock mode. Pixel clock signal is valid only when HSYNC is active.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CLR_RXFIFO</name>
              <description>Asynchronous RXFIFO Clear</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CLR_STATFIFO</name>
              <description>Asynchronous STATFIFO Clear</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PACK_DIR</name>
              <description>Data Packing Direction</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PACK_DIR_0</name>
                  <description>Pack from LSB first. For image data, 0x11, 0x22, 0x33, 0x44, it will appear as 0x44332211 in RX FIFO. For stat data, 0xAAAA, 0xBBBB, it will appear as 0xBBBBAAAA in STAT FIFO.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PACK_DIR_1</name>
                  <description>Pack from MSB first. For image data, 0x11, 0x22, 0x33, 0x44, it will appear as 0x11223344 in RX FIFO. For stat data, 0xAAAA, 0xBBBB, it will appear as 0xAAAABBBB in STAT FIFO.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>FCC</name>
              <description>FIFO Clear Control</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>FCC_0</name>
                  <description>Asynchronous FIFO clear is selected.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FCC_1</name>
                  <description>Synchronous FIFO clear is selected.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CCIR_EN</name>
              <description>CCIR656 Interface Enable</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CCIR_EN_0</name>
                  <description>Traditional interface is selected. Timing interface logic is used to latch data.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CCIR_EN_1</name>
                  <description>CCIR656 interface is selected.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HSYNC_POL</name>
              <description>HSYNC Polarity Select</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HSYNC_POL_0</name>
                  <description>HSYNC is active low</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HSYNC_POL_1</name>
                  <description>HSYNC is active high</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SOF_INTEN</name>
              <description>Start Of Frame (SOF) Interrupt Enable. This bit enables the SOF interrupt.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SOF_INTEN_0</name>
                  <description>SOF interrupt disable</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SOF_INTEN_1</name>
                  <description>SOF interrupt enable</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SOF_POL</name>
              <description>SOF Interrupt Polarity. This bit controls the condition that generates an SOF interrupt.</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SOF_POL_0</name>
                  <description>SOF interrupt is generated on SOF falling edge</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SOF_POL_1</name>
                  <description>SOF interrupt is generated on SOF rising edge</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RXFF_INTEN</name>
              <description>RxFIFO Full Interrupt Enable. This bit enables the RxFIFO full interrupt.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RXFF_INTEN_0</name>
                  <description>RxFIFO full interrupt disable</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RXFF_INTEN_1</name>
                  <description>RxFIFO full interrupt enable</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>FB1_DMA_DONE_INTEN</name>
              <description>Frame Buffer1 DMA Transfer Done Interrupt Enable</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>FB1_DMA_DONE_INTEN_0</name>
                  <description>Frame Buffer1 DMA Transfer Done interrupt disable</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FB1_DMA_DONE_INTEN_1</name>
                  <description>Frame Buffer1 DMA Transfer Done interrupt enable</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>FB2_DMA_DONE_INTEN</name>
              <description>Frame Buffer2 DMA Transfer Done Interrupt Enable</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>FB2_DMA_DONE_INTEN_0</name>
                  <description>Frame Buffer2 DMA Transfer Done interrupt disable</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FB2_DMA_DONE_INTEN_1</name>
                  <description>Frame Buffer2 DMA Transfer Done interrupt enable</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>STATFF_INTEN</name>
              <description>STATFIFO Full Interrupt Enable. This bit enables the STAT FIFO interrupt.</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>STATFF_INTEN_0</name>
                  <description>STATFIFO full interrupt disable</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>STATFF_INTEN_1</name>
                  <description>STATFIFO full interrupt enable</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SFF_DMA_DONE_INTEN</name>
              <description>STATFIFO DMA Transfer Done Interrupt Enable</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SFF_DMA_DONE_INTEN_0</name>
                  <description>STATFIFO DMA Transfer Done interrupt disable</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SFF_DMA_DONE_INTEN_1</name>
                  <description>STATFIFO DMA Transfer Done interrupt enable</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RF_OR_INTEN</name>
              <description>RxFIFO Overrun Interrupt Enable. This bit enables the RX FIFO overrun interrupt.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RF_OR_INTEN_0</name>
                  <description>RxFIFO overrun interrupt is disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RF_OR_INTEN_1</name>
                  <description>RxFIFO overrun interrupt is enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SF_OR_INTEN</name>
              <description>STAT FIFO Overrun Interrupt Enable. This bit enables the STATFIFO overrun interrupt.</description>
              <bitOffset>0x19</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SF_OR_INTEN_0</name>
                  <description>STATFIFO overrun interrupt is disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SF_OR_INTEN_1</name>
                  <description>STATFIFO overrun interrupt is enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>COF_INT_EN</name>
              <description>Change Of Image Field (COF) Interrupt Enable</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>COF_INT_EN_0</name>
                  <description>COF interrupt is disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>COF_INT_EN_1</name>
                  <description>COF interrupt is enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>VIDEO_MODE</name>
              <description>Video mode select. This bit controls the video mode in CCIR mode and TV decoder input.</description>
              <bitOffset>0x1B</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>VIDEO_MODE_0</name>
                  <description>Progressive mode is selected</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>VIDEO_MODE_1</name>
                  <description>Interlace mode is selected</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PrP_IF_EN</name>
              <description>CSI-PrP Interface Enable</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PrP_IF_EN_0</name>
                  <description>CSI to PrP bus is disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PrP_IF_EN_1</name>
                  <description>CSI to PrP bus is enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>EOF_INT_EN</name>
              <description>End-of-Frame Interrupt Enable. This bit enables and disables the EOF interrupt.</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>EOF_INT_EN_0</name>
                  <description>EOF interrupt is disabled.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>EOF_INT_EN_1</name>
                  <description>EOF interrupt is generated when RX count value is reached.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>EXT_VSYNC</name>
              <description>External VSYNC Enable</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>EXT_VSYNC_0</name>
                  <description>Internal VSYNC mode</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>EXT_VSYNC_1</name>
                  <description>External VSYNC mode</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SWAP16_EN</name>
              <description>SWAP 16-Bit Enable</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SWAP16_EN_0</name>
                  <description>Disable swapping</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SWAP16_EN_1</name>
                  <description>Enable swapping</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>CSICR2</name>
          <description>CSI Control Register 2</description>
          <addressOffset>0x4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>HSC</name>
              <description>Horizontal Skip Count</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>VSC</name>
              <description>Vertical Skip Count. Contains the number of rows to skip. SCE must be 1, otherwise VSC is ignored.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>LVRM</name>
              <description>Live View Resolution Mode. Selects the grid size used for live view resolution.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LVRM_0</name>
                  <description>512 x 384</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LVRM_1</name>
                  <description>448 x 336</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LVRM_2</name>
                  <description>384 x 288</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LVRM_3</name>
                  <description>384 x 256</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LVRM_4</name>
                  <description>320 x 240</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LVRM_5</name>
                  <description>288 x 216</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LVRM_6</name>
                  <description>400 x 300</description>
                  <value>0x6</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BTS</name>
              <description>Bayer Tile Start. Controls the Bayer pattern starting point.</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>BTS_0</name>
                  <description>GR</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BTS_1</name>
                  <description>RG</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BTS_2</name>
                  <description>BG</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BTS_3</name>
                  <description>GB</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SCE</name>
              <description>Skip Count Enable. Enables or disables the skip count feature.</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SCE_0</name>
                  <description>Skip count disable</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SCE_1</name>
                  <description>Skip count enable</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>AFS</name>
              <description>Auto Focus Spread. Selects which green pixels are used for auto-focus.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>AFS_0</name>
                  <description>Abs Diff on consecutive green pixels</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AFS_1</name>
                  <description>Abs Diff on every third green pixels</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DRM</name>
              <description>Double Resolution Mode. Controls size of statistics grid.</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DRM_0</name>
                  <description>Stats grid of 8 x 6</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DRM_1</name>
                  <description>Stats grid of 8 x 12</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DMA_BURST_TYPE_SFF</name>
              <description>Burst Type of DMA Transfer from STATFIFO. Selects the burst type of DMA transfer from STATFIFO.</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DMA_BURST_TYPE_SFF_1</name>
                  <description>INCR4</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DMA_BURST_TYPE_SFF_3</name>
                  <description>INCR16</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DMA_BURST_TYPE_RFF</name>
              <description>Burst Type of DMA Transfer from RxFIFO. Selects the burst type of DMA transfer from RxFIFO.</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DMA_BURST_TYPE_RFF_1</name>
                  <description>INCR4</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DMA_BURST_TYPE_RFF_3</name>
                  <description>INCR16</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>CSICR3</name>
          <description>CSI Control Register 3</description>
          <addressOffset>0x8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ECC_AUTO_EN</name>
              <description>Automatic Error Correction Enable</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ECC_AUTO_EN_0</name>
                  <description>Auto Error correction is disabled.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC_AUTO_EN_1</name>
                  <description>Auto Error correction is enabled.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ECC_INT_EN</name>
              <description>Error Detection Interrupt Enable</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ECC_INT_EN_0</name>
                  <description>No interrupt is generated when error is detected. Only the status bit ECC_INT is set.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC_INT_EN_1</name>
                  <description>Interrupt is generated when error is detected.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ZERO_PACK_EN</name>
              <description>Dummy Zero Packing Enable</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ZERO_PACK_EN_0</name>
                  <description>Zero packing disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ZERO_PACK_EN_1</name>
                  <description>Zero packing enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TWO_8BIT_SENSOR</name>
              <description>Two 8-bit Sensor Mode</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TWO_8BIT_SENSOR_0</name>
                  <description>Only one sensor is connected.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TWO_8BIT_SENSOR_1</name>
                  <description>Two 8-bit sensors are connected or one 16-bit sensor is connected.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RxFF_LEVEL</name>
              <description>RxFIFO Full Level</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RxFF_LEVEL_0</name>
                  <description>4 Words</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RxFF_LEVEL_1</name>
                  <description>8 Words</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RxFF_LEVEL_2</name>
                  <description>16 Words</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RxFF_LEVEL_3</name>
                  <description>24 Words</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RxFF_LEVEL_4</name>
                  <description>32 Words</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RxFF_LEVEL_5</name>
                  <description>48 Words</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RxFF_LEVEL_6</name>
                  <description>64 Words</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RxFF_LEVEL_7</name>
                  <description>96 Words</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HRESP_ERR_EN</name>
              <description>Hresponse Error Enable. This bit enables the hresponse error interrupt.</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HRESP_ERR_EN_0</name>
                  <description>Disable hresponse error interrupt</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HRESP_ERR_EN_1</name>
                  <description>Enable hresponse error interrupt</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>STATFF_LEVEL</name>
              <description>STATFIFO Full Level</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>STATFF_LEVEL_0</name>
                  <description>4 Words</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>STATFF_LEVEL_1</name>
                  <description>8 Words</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>STATFF_LEVEL_2</name>
                  <description>12 Words</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>STATFF_LEVEL_3</name>
                  <description>16 Words</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>STATFF_LEVEL_4</name>
                  <description>24 Words</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>STATFF_LEVEL_5</name>
                  <description>32 Words</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>STATFF_LEVEL_6</name>
                  <description>48 Words</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>STATFF_LEVEL_7</name>
                  <description>64 Words</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DMA_REQ_EN_SFF</name>
              <description>DMA Request Enable for STATFIFO</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DMA_REQ_EN_SFF_0</name>
                  <description>Disable the dma request</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DMA_REQ_EN_SFF_1</name>
                  <description>Enable the dma request</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DMA_REQ_EN_RFF</name>
              <description>DMA Request Enable for RxFIFO</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DMA_REQ_EN_RFF_0</name>
                  <description>Disable the dma request</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DMA_REQ_EN_RFF_1</name>
                  <description>Enable the dma request</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DMA_REFLASH_SFF</name>
              <description>Reflash DMA Controller for STATFIFO</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DMA_REFLASH_SFF_0</name>
                  <description>No reflashing</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DMA_REFLASH_SFF_1</name>
                  <description>Reflash the embedded DMA controller</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DMA_REFLASH_RFF</name>
              <description>Reflash DMA Controller for RxFIFO</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DMA_REFLASH_RFF_0</name>
                  <description>No reflashing</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DMA_REFLASH_RFF_1</name>
                  <description>Reflash the embedded DMA controller</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>FRMCNT_RST</name>
              <description>Frame Count Reset. Resets the Frame Counter. (Cleared automatically after reset is done)</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>FRMCNT_RST_0</name>
                  <description>Do not reset</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FRMCNT_RST_1</name>
                  <description>Reset frame counter immediately</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>FRMCNT</name>
              <description>Frame Counter</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CSISTATFIFO</name>
          <description>CSI Statistic FIFO Register</description>
          <addressOffset>0xC</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>STAT</name>
              <description>Static data from sensor</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CSIRFIFO</name>
          <description>CSI RX FIFO Register</description>
          <addressOffset>0x10</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>IMAGE</name>
              <description>Received image data</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CSIRXCNT</name>
          <description>CSI RX Count Register</description>
          <addressOffset>0x14</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x9600</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RXCNT</name>
              <description>RxFIFO Count</description>
              <bitOffset>0</bitOffset>
              <bitWidth>22</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CSISR</name>
          <description>CSI Status Register</description>
          <addressOffset>0x18</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x4000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DRDY</name>
              <description>RXFIFO Data Ready</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DRDY_0</name>
                  <description>No data (word) is ready</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DRDY_1</name>
                  <description>At least 1 datum (word) is ready in RXFIFO.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ECC_INT</name>
              <description>CCIR Error Interrupt</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ECC_INT_0</name>
                  <description>No error detected</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ECC_INT_1</name>
                  <description>Error is detected in CCIR coding</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HRESP_ERR_INT</name>
              <description>Hresponse Error Interrupt Status</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HRESP_ERR_INT_0</name>
                  <description>No hresponse error.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HRESP_ERR_INT_1</name>
                  <description>Hresponse error is detected.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>COF_INT</name>
              <description>Change Of Field Interrupt Status</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>COF_INT_0</name>
                  <description>Video field has no change.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>COF_INT_1</name>
                  <description>Change of video field is detected.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>F1_INT</name>
              <description>CCIR Field 1 Interrupt Status</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>F1_INT_0</name>
                  <description>Field 1 of video is not detected.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>F1_INT_1</name>
                  <description>Field 1 of video is about to start.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>F2_INT</name>
              <description>CCIR Field 2 Interrupt Status</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>F2_INT_0</name>
                  <description>Field 2 of video is not detected</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>F2_INT_1</name>
                  <description>Field 2 of video is about to start</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SOF_INT</name>
              <description>Start of Frame Interrupt Status. Indicates when SOF is detected. (Cleared by writing 1)</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SOF_INT_0</name>
                  <description>SOF is not detected.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SOF_INT_1</name>
                  <description>SOF is detected.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>EOF_INT</name>
              <description>End of Frame (EOF) Interrupt Status. Indicates when EOF is detected. (Cleared by writing 1)</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>EOF_INT_0</name>
                  <description>EOF is not detected.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>EOF_INT_1</name>
                  <description>EOF is detected.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RxFF_INT</name>
              <description>RXFIFO Full Interrupt Status</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RxFF_INT_0</name>
                  <description>RxFIFO is not full.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RxFF_INT_1</name>
                  <description>RxFIFO is full.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DMA_TSF_DONE_FB1</name>
              <description>DMA Transfer Done in Frame Buffer1</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DMA_TSF_DONE_FB1_0</name>
                  <description>DMA transfer is not completed.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DMA_TSF_DONE_FB1_1</name>
                  <description>DMA transfer is completed.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DMA_TSF_DONE_FB2</name>
              <description>DMA Transfer Done in Frame Buffer2</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DMA_TSF_DONE_FB2_0</name>
                  <description>DMA transfer is not completed.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DMA_TSF_DONE_FB2_1</name>
                  <description>DMA transfer is completed.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>STATFF_INT</name>
              <description>STATFIFO Full Interrupt Status</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>STATFF_INT_0</name>
                  <description>STATFIFO is not full.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>STATFF_INT_1</name>
                  <description>STATFIFO is full.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DMA_TSF_DONE_SFF</name>
              <description>DMA Transfer Done from StatFIFO</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DMA_TSF_DONE_SFF_0</name>
                  <description>DMA transfer is not completed.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DMA_TSF_DONE_SFF_1</name>
                  <description>DMA transfer is completed.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RF_OR_INT</name>
              <description>RxFIFO Overrun Interrupt Status</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RF_OR_INT_0</name>
                  <description>RXFIFO has not overflowed.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RF_OR_INT_1</name>
                  <description>RXFIFO has overflowed.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SF_OR_INT</name>
              <description>STATFIFO Overrun Interrupt Status</description>
              <bitOffset>0x19</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SF_OR_INT_0</name>
                  <description>STATFIFO has not overflowed.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SF_OR_INT_1</name>
                  <description>STATFIFO has overflowed.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DMA_FIELD1_DONE</name>
              <description>When DMA field 0 is complete, this bit will be set to 1(clear by writing 1).</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DMA_FIELD0_DONE</name>
              <description>When DMA field 0 is complete, this bit will be set to 1(clear by writing 1).</description>
              <bitOffset>0x1B</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BASEADDR_CHHANGE_ERROR</name>
              <description>When using base address switching enable, this bit will be 1 when switching occur before DMA complete</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CSIDMASA_STATFIFO</name>
          <description>CSI DMA Start Address Register - for STATFIFO</description>
          <addressOffset>0x20</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DMA_START_ADDR_SFF</name>
              <description>DMA Start Address for STATFIFO</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>30</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CSIDMATS_STATFIFO</name>
          <description>CSI DMA Transfer Size Register - for STATFIFO</description>
          <addressOffset>0x24</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DMA_TSF_SIZE_SFF</name>
              <description>DMA Transfer Size for STATFIFO</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CSIDMASA_FB1</name>
          <description>CSI DMA Start Address Register - for Frame Buffer1</description>
          <addressOffset>0x28</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DMA_START_ADDR_FB1</name>
              <description>DMA Start Address in Frame Buffer1</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>30</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CSIDMASA_FB2</name>
          <description>CSI DMA Transfer Size Register - for Frame Buffer2</description>
          <addressOffset>0x2C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DMA_START_ADDR_FB2</name>
              <description>DMA Start Address in Frame Buffer2</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>30</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CSIFBUF_PARA</name>
          <description>CSI Frame Buffer Parameter Register</description>
          <addressOffset>0x30</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>FBUF_STRIDE</name>
              <description>Frame Buffer Parameter</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DEINTERLACE_STRIDE</name>
              <description>DEINTERLACE_STRIDE is only used in the deinterlace mode</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CSIIMAG_PARA</name>
          <description>CSI Image Parameter Register</description>
          <addressOffset>0x34</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>IMAGE_HEIGHT</name>
              <description>Image Height. Indicates how many pixels in a column of the image from the sensor.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>IMAGE_WIDTH</name>
              <description>Image Width</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CSICR18</name>
          <description>CSI Control Register 18</description>
          <addressOffset>0x48</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x2D000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DEINTERLACE_EN</name>
              <description>This bit is used to select the output method When input is standard CCIR656 video.</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DEINTERLACE_EN_0</name>
                  <description>Deinterlace disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DEINTERLACE_EN_1</name>
                  <description>Deinterlace enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PARALLEL24_EN</name>
              <description>When input is parallel rgb888/yuv444 24bit, this bit can be enabled.</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BASEADDR_SWITCH_EN</name>
              <description>When this bit is enabled, CSI DMA will switch the base address according to BASEADDR_SWITCH_SEL rather than atomically by DMA completed</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BASEADDR_SWITCH_SEL</name>
              <description>CSI 2 base addresses switching method. When using this bit, BASEADDR_SWITCH_EN is 1.</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>BASEADDR_SWITCH_SEL_0</name>
                  <description>Switching base address at the edge of the vsync</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BASEADDR_SWITCH_SEL_1</name>
                  <description>Switching base address at the edge of the first data of each frame</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>FIELD0_DONE_IE</name>
              <description>In interlace mode, fileld 0 means interrupt enabled.</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>FIELD0_DONE_IE_0</name>
                  <description>Interrupt disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FIELD0_DONE_IE_1</name>
                  <description>Interrupt enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DMA_FIELD1_DONE_IE</name>
              <description>When in interlace mode, field 1 done interrupt enable.</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DMA_FIELD1_DONE_IE_0</name>
                  <description>Interrupt disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DMA_FIELD1_DONE_IE_1</name>
                  <description>Interrupt enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>LAST_DMA_REQ_SEL</name>
              <description>Choosing the last DMA request condition.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LAST_DMA_REQ_SEL_0</name>
                  <description>fifo_full_level</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LAST_DMA_REQ_SEL_1</name>
                  <description>hburst_length</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BASEADDR_CHANGE_ERROR_IE</name>
              <description>Base address change error interrupt enable signal.</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RGB888A_FORMAT_SEL</name>
              <description>Output is 32-bit format.</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RGB888A_FORMAT_SEL_0</name>
                  <description>{8'h0, data[23:0]}</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RGB888A_FORMAT_SEL_1</name>
                  <description>{data[23:0], 8'h0}</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>AHB_HPROT</name>
              <description>Hprot value in AHB bus protocol.</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CSI_LCDIF_BUFFER_LINES</name>
              <description>The number of lines are used in handshake mode with LCDIF.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CSI_LCDIF_BUFFER_LINES_0</name>
                  <description>4 lines</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CSI_LCDIF_BUFFER_LINES_1</name>
                  <description>8 lines</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CSI_LCDIF_BUFFER_LINES_2</name>
                  <description>16 lines</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CSI_LCDIF_BUFFER_LINES_3</name>
                  <description>16 lines</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>MASK_OPTION</name>
              <description>These bits used to choose the method to mask the CSI input.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>MASK_OPTION_0</name>
                  <description>Writing to memory from first completely frame, when using this option, the CSI_ENABLE should be 1.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MASK_OPTION_1</name>
                  <description>Writing to memory when CSI_ENABLE is 1.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MASK_OPTION_2</name>
                  <description>Writing to memory from second completely frame, when using this option, the CSI_ENABLE should be 1.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MASK_OPTION_3</name>
                  <description>Writing to memory when data comes in, not matter the CSI_ENABLE is 1 or 0.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CSI_ENABLE</name>
              <description>CSI global enable signal</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CSICR19</name>
          <description>CSI Control Register 19</description>
          <addressOffset>0x4C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DMA_RFIFO_HIGHEST_FIFO_LEVEL</name>
              <description>This byte stores the highest FIFO level achieved by CSI FIFO timely and will be clear by writing 8'ff to it</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
      </registers>
    </peripheral>
    <peripheral>
      <name>LCDIF</name>
      <description>eLCDIF Register Reference Index</description>
      <groupName>LCDIF</groupName>
      <prependToName>LCDIF_</prependToName>
      <baseAddress>0x21C8000</baseAddress>
      <addressBlock>
        <offset>0</offset>
        <size>0x264</size>
        <usage>registers</usage>
      </addressBlock>
      <interrupt>
        <name>LCDIF</name>
        <value>37</value>
      </interrupt>
      <registers>
        <register>
          <name>CTRL</name>
          <description>eLCDIF General Control Register</description>
          <addressOffset>0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0xC0000000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RUN</name>
              <description>When this bit is set by software, the eLCDIF will begin transferring data between the SoC and the display</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_FORMAT_24_BIT</name>
              <description>Used only when WORD_LENGTH = 3, i</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALL_24_BITS_VALID</name>
                  <description>Data input to the block is in 24 bpp format, such that all RGB 888 data is contained in 24 bits.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DROP_UPPER_2_BITS_PER_BYTE</name>
                  <description>Data input to the block is actually RGB 18 bpp, but there is 1 color per byte, hence the upper 2 bits in each byte do not contain any useful data, and should be dropped.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DATA_FORMAT_18_BIT</name>
              <description>Used only when WORD_LENGTH = 2, i.e. 18-bit.</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LOWER_18_BITS_VALID</name>
                  <description>Data input to the block is in 18 bpp format, such that lower 18 bits contain RGB 666 and upper 14 bits do not contain any useful data.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>UPPER_18_BITS_VALID</name>
                  <description>Data input to the block is in 18 bpp format, such that upper 18 bits contain RGB 666 and lower 14 bits do not contain any useful data.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DATA_FORMAT_16_BIT</name>
              <description>When this bit is 1 and WORD_LENGTH = 0, it implies that the 16-bit data is in ARGB555 format</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>MASTER</name>
              <description>Set this bit to make the eLCDIF act as a bus master.</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENABLE_PXP_HANDSHAKE</name>
              <description>If this bit is set and LCDIF_MASTER bit is set, the eLCDIF will act as bus master and the handshake mechanism between eLCDIF and PXP will be turned on</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RGB_TO_YCBCR422_CSC</name>
              <description>Set this bit to 1 to enable conversion from RGB to YCbCr colorspace</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>WORD_LENGTH</name>
              <description>Input data format.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>16_BIT</name>
                  <description>Input data is 16 bits per pixel.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>8_BIT</name>
                  <description>Input data is 8 bits wide.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>18_BIT</name>
                  <description>Input data is 18 bits per pixel.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>24_BIT</name>
                  <description>Input data is 24 bits per pixel.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>LCD_DATABUS_WIDTH</name>
              <description>LCD Data bus transfer width.</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>16_BIT</name>
                  <description>16-bit data bus mode.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>8_BIT</name>
                  <description>8-bit data bus mode.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>18_BIT</name>
                  <description>18-bit data bus mode.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>24_BIT</name>
                  <description>24-bit data bus mode.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CSC_DATA_SWIZZLE</name>
              <description>This field specifies how to swap the bytes after the data has been converted into an internal representation of 24 bits per pixel and before it is transmitted over the LCD interface bus</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NO_SWAP</name>
                  <description>No byte swapping.(Little endian)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BIG_ENDIAN_SWAP</name>
                  <description>Big Endian swap (swap bytes 0,3 and 1,2).</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HWD_SWAP</name>
                  <description>Swap half-words.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HWD_BYTE_SWAP</name>
                  <description>Swap bytes within each half-word.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>INPUT_DATA_SWIZZLE</name>
              <description>This field specifies how to swap the bytes fetched by the bus master interface</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NO_SWAP</name>
                  <description>No byte swapping.(Little endian)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BIG_ENDIAN_SWAP</name>
                  <description>Big Endian swap (swap bytes 0,3 and 1,2).</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HWD_SWAP</name>
                  <description>Swap half-words.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HWD_BYTE_SWAP</name>
                  <description>Swap bytes within each half-word.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DATA_SELECT</name>
              <description>Command Mode polarity bit. This bit should only be changed when RUN is 0.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CMD_MODE</name>
                  <description>Command Mode. LCD_RS signal is Low.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DATA_MODE</name>
                  <description>Data Mode. LCD_RS signal is High.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DOTCLK_MODE</name>
              <description>Set this bit to 1 to make the hardware go into the DOTCLK mode, i</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>VSYNC_MODE</name>
              <description>Setting this bit to 1 will make the eLCDIF hardware go into VSYNC mode</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYPASS_COUNT</name>
              <description>When this bit is 0, it means that eLCDIF will stop the block operation and turn off the RUN bit after the amount of data indicated by the LCDIF_TRANSFER_COUNT register has been transferred out</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DVI_MODE</name>
              <description>Set this bit to 1 to get into the ITU-R BT</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SHIFT_NUM_BITS</name>
              <description>The data to be transmitted is shifted left or right by this number of bits.</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_SHIFT_DIR</name>
              <description>Use this bit to determine the direction of shift of transmit data</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TXDATA_SHIFT_LEFT</name>
                  <description>Data to be transmitted is shifted LEFT by SHIFT_NUM_BITS bits.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TXDATA_SHIFT_RIGHT</name>
                  <description>Data to be transmitted is shifted RIGHT by SHIFT_NUM_BITS bits.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WAIT_FOR_VSYNC_EDGE</name>
              <description>Setting this bit to 1 will make the hardware wait for the triggering VSYNC edge before starting write transfers to the LCD</description>
              <bitOffset>0x1B</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>READ_WRITEB</name>
              <description>By default, eLCDIF is in the write mode</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>YCBCR422_INPUT</name>
              <description>Zero implies input data is in RGB color space</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CLKGATE</name>
              <description>This bit must be set to zero for normal operation</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SFTRST</name>
              <description>This bit must be set to zero to enable normal operation of the eLCDIF</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CTRL_SET</name>
          <description>eLCDIF General Control Register</description>
          <addressOffset>0x4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0xC0000000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RUN</name>
              <description>When this bit is set by software, the eLCDIF will begin transferring data between the SoC and the display</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_FORMAT_24_BIT</name>
              <description>Used only when WORD_LENGTH = 3, i</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALL_24_BITS_VALID</name>
                  <description>Data input to the block is in 24 bpp format, such that all RGB 888 data is contained in 24 bits.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DROP_UPPER_2_BITS_PER_BYTE</name>
                  <description>Data input to the block is actually RGB 18 bpp, but there is 1 color per byte, hence the upper 2 bits in each byte do not contain any useful data, and should be dropped.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DATA_FORMAT_18_BIT</name>
              <description>Used only when WORD_LENGTH = 2, i.e. 18-bit.</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LOWER_18_BITS_VALID</name>
                  <description>Data input to the block is in 18 bpp format, such that lower 18 bits contain RGB 666 and upper 14 bits do not contain any useful data.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>UPPER_18_BITS_VALID</name>
                  <description>Data input to the block is in 18 bpp format, such that upper 18 bits contain RGB 666 and lower 14 bits do not contain any useful data.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DATA_FORMAT_16_BIT</name>
              <description>When this bit is 1 and WORD_LENGTH = 0, it implies that the 16-bit data is in ARGB555 format</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>MASTER</name>
              <description>Set this bit to make the eLCDIF act as a bus master.</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENABLE_PXP_HANDSHAKE</name>
              <description>If this bit is set and LCDIF_MASTER bit is set, the eLCDIF will act as bus master and the handshake mechanism between eLCDIF and PXP will be turned on</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RGB_TO_YCBCR422_CSC</name>
              <description>Set this bit to 1 to enable conversion from RGB to YCbCr colorspace</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>WORD_LENGTH</name>
              <description>Input data format.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>16_BIT</name>
                  <description>Input data is 16 bits per pixel.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>8_BIT</name>
                  <description>Input data is 8 bits wide.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>18_BIT</name>
                  <description>Input data is 18 bits per pixel.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>24_BIT</name>
                  <description>Input data is 24 bits per pixel.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>LCD_DATABUS_WIDTH</name>
              <description>LCD Data bus transfer width.</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>16_BIT</name>
                  <description>16-bit data bus mode.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>8_BIT</name>
                  <description>8-bit data bus mode.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>18_BIT</name>
                  <description>18-bit data bus mode.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>24_BIT</name>
                  <description>24-bit data bus mode.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CSC_DATA_SWIZZLE</name>
              <description>This field specifies how to swap the bytes after the data has been converted into an internal representation of 24 bits per pixel and before it is transmitted over the LCD interface bus</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NO_SWAP</name>
                  <description>No byte swapping.(Little endian)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BIG_ENDIAN_SWAP</name>
                  <description>Big Endian swap (swap bytes 0,3 and 1,2).</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HWD_SWAP</name>
                  <description>Swap half-words.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HWD_BYTE_SWAP</name>
                  <description>Swap bytes within each half-word.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>INPUT_DATA_SWIZZLE</name>
              <description>This field specifies how to swap the bytes fetched by the bus master interface</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NO_SWAP</name>
                  <description>No byte swapping.(Little endian)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BIG_ENDIAN_SWAP</name>
                  <description>Big Endian swap (swap bytes 0,3 and 1,2).</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HWD_SWAP</name>
                  <description>Swap half-words.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HWD_BYTE_SWAP</name>
                  <description>Swap bytes within each half-word.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DATA_SELECT</name>
              <description>Command Mode polarity bit. This bit should only be changed when RUN is 0.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CMD_MODE</name>
                  <description>Command Mode. LCD_RS signal is Low.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DATA_MODE</name>
                  <description>Data Mode. LCD_RS signal is High.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DOTCLK_MODE</name>
              <description>Set this bit to 1 to make the hardware go into the DOTCLK mode, i</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>VSYNC_MODE</name>
              <description>Setting this bit to 1 will make the eLCDIF hardware go into VSYNC mode</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYPASS_COUNT</name>
              <description>When this bit is 0, it means that eLCDIF will stop the block operation and turn off the RUN bit after the amount of data indicated by the LCDIF_TRANSFER_COUNT register has been transferred out</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DVI_MODE</name>
              <description>Set this bit to 1 to get into the ITU-R BT</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SHIFT_NUM_BITS</name>
              <description>The data to be transmitted is shifted left or right by this number of bits.</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_SHIFT_DIR</name>
              <description>Use this bit to determine the direction of shift of transmit data</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TXDATA_SHIFT_LEFT</name>
                  <description>Data to be transmitted is shifted LEFT by SHIFT_NUM_BITS bits.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TXDATA_SHIFT_RIGHT</name>
                  <description>Data to be transmitted is shifted RIGHT by SHIFT_NUM_BITS bits.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WAIT_FOR_VSYNC_EDGE</name>
              <description>Setting this bit to 1 will make the hardware wait for the triggering VSYNC edge before starting write transfers to the LCD</description>
              <bitOffset>0x1B</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>READ_WRITEB</name>
              <description>By default, eLCDIF is in the write mode</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>YCBCR422_INPUT</name>
              <description>Zero implies input data is in RGB color space</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CLKGATE</name>
              <description>This bit must be set to zero for normal operation</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SFTRST</name>
              <description>This bit must be set to zero to enable normal operation of the eLCDIF</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CTRL_CLR</name>
          <description>eLCDIF General Control Register</description>
          <addressOffset>0x8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0xC0000000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RUN</name>
              <description>When this bit is set by software, the eLCDIF will begin transferring data between the SoC and the display</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_FORMAT_24_BIT</name>
              <description>Used only when WORD_LENGTH = 3, i</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALL_24_BITS_VALID</name>
                  <description>Data input to the block is in 24 bpp format, such that all RGB 888 data is contained in 24 bits.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DROP_UPPER_2_BITS_PER_BYTE</name>
                  <description>Data input to the block is actually RGB 18 bpp, but there is 1 color per byte, hence the upper 2 bits in each byte do not contain any useful data, and should be dropped.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DATA_FORMAT_18_BIT</name>
              <description>Used only when WORD_LENGTH = 2, i.e. 18-bit.</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LOWER_18_BITS_VALID</name>
                  <description>Data input to the block is in 18 bpp format, such that lower 18 bits contain RGB 666 and upper 14 bits do not contain any useful data.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>UPPER_18_BITS_VALID</name>
                  <description>Data input to the block is in 18 bpp format, such that upper 18 bits contain RGB 666 and lower 14 bits do not contain any useful data.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DATA_FORMAT_16_BIT</name>
              <description>When this bit is 1 and WORD_LENGTH = 0, it implies that the 16-bit data is in ARGB555 format</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>MASTER</name>
              <description>Set this bit to make the eLCDIF act as a bus master.</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENABLE_PXP_HANDSHAKE</name>
              <description>If this bit is set and LCDIF_MASTER bit is set, the eLCDIF will act as bus master and the handshake mechanism between eLCDIF and PXP will be turned on</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RGB_TO_YCBCR422_CSC</name>
              <description>Set this bit to 1 to enable conversion from RGB to YCbCr colorspace</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>WORD_LENGTH</name>
              <description>Input data format.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>16_BIT</name>
                  <description>Input data is 16 bits per pixel.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>8_BIT</name>
                  <description>Input data is 8 bits wide.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>18_BIT</name>
                  <description>Input data is 18 bits per pixel.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>24_BIT</name>
                  <description>Input data is 24 bits per pixel.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>LCD_DATABUS_WIDTH</name>
              <description>LCD Data bus transfer width.</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>16_BIT</name>
                  <description>16-bit data bus mode.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>8_BIT</name>
                  <description>8-bit data bus mode.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>18_BIT</name>
                  <description>18-bit data bus mode.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>24_BIT</name>
                  <description>24-bit data bus mode.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CSC_DATA_SWIZZLE</name>
              <description>This field specifies how to swap the bytes after the data has been converted into an internal representation of 24 bits per pixel and before it is transmitted over the LCD interface bus</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NO_SWAP</name>
                  <description>No byte swapping.(Little endian)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BIG_ENDIAN_SWAP</name>
                  <description>Big Endian swap (swap bytes 0,3 and 1,2).</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HWD_SWAP</name>
                  <description>Swap half-words.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HWD_BYTE_SWAP</name>
                  <description>Swap bytes within each half-word.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>INPUT_DATA_SWIZZLE</name>
              <description>This field specifies how to swap the bytes fetched by the bus master interface</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NO_SWAP</name>
                  <description>No byte swapping.(Little endian)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BIG_ENDIAN_SWAP</name>
                  <description>Big Endian swap (swap bytes 0,3 and 1,2).</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HWD_SWAP</name>
                  <description>Swap half-words.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HWD_BYTE_SWAP</name>
                  <description>Swap bytes within each half-word.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DATA_SELECT</name>
              <description>Command Mode polarity bit. This bit should only be changed when RUN is 0.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CMD_MODE</name>
                  <description>Command Mode. LCD_RS signal is Low.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DATA_MODE</name>
                  <description>Data Mode. LCD_RS signal is High.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DOTCLK_MODE</name>
              <description>Set this bit to 1 to make the hardware go into the DOTCLK mode, i</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>VSYNC_MODE</name>
              <description>Setting this bit to 1 will make the eLCDIF hardware go into VSYNC mode</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYPASS_COUNT</name>
              <description>When this bit is 0, it means that eLCDIF will stop the block operation and turn off the RUN bit after the amount of data indicated by the LCDIF_TRANSFER_COUNT register has been transferred out</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DVI_MODE</name>
              <description>Set this bit to 1 to get into the ITU-R BT</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SHIFT_NUM_BITS</name>
              <description>The data to be transmitted is shifted left or right by this number of bits.</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_SHIFT_DIR</name>
              <description>Use this bit to determine the direction of shift of transmit data</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TXDATA_SHIFT_LEFT</name>
                  <description>Data to be transmitted is shifted LEFT by SHIFT_NUM_BITS bits.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TXDATA_SHIFT_RIGHT</name>
                  <description>Data to be transmitted is shifted RIGHT by SHIFT_NUM_BITS bits.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WAIT_FOR_VSYNC_EDGE</name>
              <description>Setting this bit to 1 will make the hardware wait for the triggering VSYNC edge before starting write transfers to the LCD</description>
              <bitOffset>0x1B</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>READ_WRITEB</name>
              <description>By default, eLCDIF is in the write mode</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>YCBCR422_INPUT</name>
              <description>Zero implies input data is in RGB color space</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CLKGATE</name>
              <description>This bit must be set to zero for normal operation</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SFTRST</name>
              <description>This bit must be set to zero to enable normal operation of the eLCDIF</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CTRL_TOG</name>
          <description>eLCDIF General Control Register</description>
          <addressOffset>0xC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0xC0000000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RUN</name>
              <description>When this bit is set by software, the eLCDIF will begin transferring data between the SoC and the display</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_FORMAT_24_BIT</name>
              <description>Used only when WORD_LENGTH = 3, i</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALL_24_BITS_VALID</name>
                  <description>Data input to the block is in 24 bpp format, such that all RGB 888 data is contained in 24 bits.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DROP_UPPER_2_BITS_PER_BYTE</name>
                  <description>Data input to the block is actually RGB 18 bpp, but there is 1 color per byte, hence the upper 2 bits in each byte do not contain any useful data, and should be dropped.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DATA_FORMAT_18_BIT</name>
              <description>Used only when WORD_LENGTH = 2, i.e. 18-bit.</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LOWER_18_BITS_VALID</name>
                  <description>Data input to the block is in 18 bpp format, such that lower 18 bits contain RGB 666 and upper 14 bits do not contain any useful data.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>UPPER_18_BITS_VALID</name>
                  <description>Data input to the block is in 18 bpp format, such that upper 18 bits contain RGB 666 and lower 14 bits do not contain any useful data.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DATA_FORMAT_16_BIT</name>
              <description>When this bit is 1 and WORD_LENGTH = 0, it implies that the 16-bit data is in ARGB555 format</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>MASTER</name>
              <description>Set this bit to make the eLCDIF act as a bus master.</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENABLE_PXP_HANDSHAKE</name>
              <description>If this bit is set and LCDIF_MASTER bit is set, the eLCDIF will act as bus master and the handshake mechanism between eLCDIF and PXP will be turned on</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RGB_TO_YCBCR422_CSC</name>
              <description>Set this bit to 1 to enable conversion from RGB to YCbCr colorspace</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>WORD_LENGTH</name>
              <description>Input data format.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>16_BIT</name>
                  <description>Input data is 16 bits per pixel.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>8_BIT</name>
                  <description>Input data is 8 bits wide.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>18_BIT</name>
                  <description>Input data is 18 bits per pixel.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>24_BIT</name>
                  <description>Input data is 24 bits per pixel.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>LCD_DATABUS_WIDTH</name>
              <description>LCD Data bus transfer width.</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>16_BIT</name>
                  <description>16-bit data bus mode.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>8_BIT</name>
                  <description>8-bit data bus mode.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>18_BIT</name>
                  <description>18-bit data bus mode.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>24_BIT</name>
                  <description>24-bit data bus mode.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CSC_DATA_SWIZZLE</name>
              <description>This field specifies how to swap the bytes after the data has been converted into an internal representation of 24 bits per pixel and before it is transmitted over the LCD interface bus</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NO_SWAP</name>
                  <description>No byte swapping.(Little endian)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BIG_ENDIAN_SWAP</name>
                  <description>Big Endian swap (swap bytes 0,3 and 1,2).</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HWD_SWAP</name>
                  <description>Swap half-words.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HWD_BYTE_SWAP</name>
                  <description>Swap bytes within each half-word.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>INPUT_DATA_SWIZZLE</name>
              <description>This field specifies how to swap the bytes fetched by the bus master interface</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NO_SWAP</name>
                  <description>No byte swapping.(Little endian)</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BIG_ENDIAN_SWAP</name>
                  <description>Big Endian swap (swap bytes 0,3 and 1,2).</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HWD_SWAP</name>
                  <description>Swap half-words.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HWD_BYTE_SWAP</name>
                  <description>Swap bytes within each half-word.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DATA_SELECT</name>
              <description>Command Mode polarity bit. This bit should only be changed when RUN is 0.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CMD_MODE</name>
                  <description>Command Mode. LCD_RS signal is Low.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DATA_MODE</name>
                  <description>Data Mode. LCD_RS signal is High.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DOTCLK_MODE</name>
              <description>Set this bit to 1 to make the hardware go into the DOTCLK mode, i</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>VSYNC_MODE</name>
              <description>Setting this bit to 1 will make the eLCDIF hardware go into VSYNC mode</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYPASS_COUNT</name>
              <description>When this bit is 0, it means that eLCDIF will stop the block operation and turn off the RUN bit after the amount of data indicated by the LCDIF_TRANSFER_COUNT register has been transferred out</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DVI_MODE</name>
              <description>Set this bit to 1 to get into the ITU-R BT</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SHIFT_NUM_BITS</name>
              <description>The data to be transmitted is shifted left or right by this number of bits.</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_SHIFT_DIR</name>
              <description>Use this bit to determine the direction of shift of transmit data</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TXDATA_SHIFT_LEFT</name>
                  <description>Data to be transmitted is shifted LEFT by SHIFT_NUM_BITS bits.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TXDATA_SHIFT_RIGHT</name>
                  <description>Data to be transmitted is shifted RIGHT by SHIFT_NUM_BITS bits.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WAIT_FOR_VSYNC_EDGE</name>
              <description>Setting this bit to 1 will make the hardware wait for the triggering VSYNC edge before starting write transfers to the LCD</description>
              <bitOffset>0x1B</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>READ_WRITEB</name>
              <description>By default, eLCDIF is in the write mode</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>YCBCR422_INPUT</name>
              <description>Zero implies input data is in RGB color space</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CLKGATE</name>
              <description>This bit must be set to zero for normal operation</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SFTRST</name>
              <description>This bit must be set to zero to enable normal operation of the eLCDIF</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CTRL1</name>
          <description>eLCDIF General Control1 Register</description>
          <addressOffset>0x10</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0xF0000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RESET</name>
              <description>Reset bit for the external LCD controller</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LCDRESET_LOW</name>
                  <description>LCD_RESET output signal is low.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LCDRESET_HIGH</name>
                  <description>LCD_RESET output signal is high.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>MODE86</name>
              <description>This bit is used to select between the 8080 and 6800 series of microprocessor modes</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>8080_MODE</name>
                  <description>Pins LCD_WR_RWn and LCD_RD_E function as active low WR and active low RD signals respectively.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>6800_MODE</name>
                  <description>Pins LCD_WR_RWn and LCD_RD_E function as Read/Write and active high Enable signals respectively.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BUSY_ENABLE</name>
              <description>This bit enables the use of the interface's busy signal input</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>BUSY_DISABLED</name>
                  <description>The busy signal from the LCD controller will be ignored.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BUSY_ENABLED</name>
                  <description>Enable the use of the busy signal from the LCD controller.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>VSYNC_EDGE_IRQ</name>
              <description>This bit is set to indicate that an interrupt is requested by the eLCDIF block</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NO_REQUEST</name>
                  <description>No Interrupt Request Pending.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REQUEST</name>
                  <description>Interrupt Request Pending.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CUR_FRAME_DONE_IRQ</name>
              <description>This bit is set to indicate that an interrupt is requested by the eLCDIF block</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NO_REQUEST</name>
                  <description>No Interrupt Request Pending.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REQUEST</name>
                  <description>Interrupt Request Pending.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>UNDERFLOW_IRQ</name>
              <description>This bit is set to indicate that an interrupt is requested by the eLCDIF block</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NO_REQUEST</name>
                  <description>No Interrupt Request Pending.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REQUEST</name>
                  <description>Interrupt Request Pending.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>OVERFLOW_IRQ</name>
              <description>This bit is set to indicate that an interrupt is requested by the eLCDIF block</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NO_REQUEST</name>
                  <description>No Interrupt Request Pending.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REQUEST</name>
                  <description>Interrupt Request Pending.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>VSYNC_EDGE_IRQ_EN</name>
              <description>This bit is set to enable an interrupt every time the hardware encounters the leading VSYNC edge in the VSYNC and DOTCLK modes, or the beginning of every field in DVI mode</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CUR_FRAME_DONE_IRQ_EN</name>
              <description>This bit is set to 1 enable an interrupt every time the hardware enters in the vertical blanking state</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>UNDERFLOW_IRQ_EN</name>
              <description>This bit is set to enable an underflow interrupt in the TXFIFO in the write mode.</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>OVERFLOW_IRQ_EN</name>
              <description>This bit is set to enable an overflow interrupt in the TXFIFO in the write mode.</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYTE_PACKING_FORMAT</name>
              <description>This bitfield is used to show which data bytes in a 32-bit word are valid</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>IRQ_ON_ALTERNATE_FIELDS</name>
              <description>If this bit is set, the eLCDIF block will assert the cur_frame_done interrupt only on alternate fields, otherwise it will issue the interrupt on both odd and even field</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>FIFO_CLEAR</name>
              <description>Set this bit to clear all the data in the latency FIFO (LFIFO), TXFIFO and the RXFIFO.</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>START_INTERLACE_FROM_SECOND_FIELD</name>
              <description>The default is to grab the odd lines first and then the even lines</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>INTERLACE_FIELDS</name>
              <description>Set this bit if it is required that the eLCDIF block fetches odd lines in one field and even lines in the other field</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RECOVER_ON_UNDERFLOW</name>
              <description>Set this bit to enable the eLCDIF block to recover in the next field/frame if there was an underflow in the current field/frame</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BM_ERROR_IRQ</name>
              <description>This bit is set to indicate that an interrupt is requested by the eLCDIF block</description>
              <bitOffset>0x19</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NO_REQUEST</name>
                  <description>No Interrupt Request Pending.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REQUEST</name>
                  <description>Interrupt Request Pending.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BM_ERROR_IRQ_EN</name>
              <description>This bit is set to enable bus master error interrupt in the eLCDIF master mode.</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>COMBINE_MPU_WR_STRB</name>
              <description>If this bit is not set, the write strobe will be driven on LCD_WR_RWn pin in the 8080 mode and on the LCD_RD_E pin in the 6800 mode</description>
              <bitOffset>0x1B</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CTRL1_SET</name>
          <description>eLCDIF General Control1 Register</description>
          <addressOffset>0x14</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0xF0000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RESET</name>
              <description>Reset bit for the external LCD controller</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LCDRESET_LOW</name>
                  <description>LCD_RESET output signal is low.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LCDRESET_HIGH</name>
                  <description>LCD_RESET output signal is high.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>MODE86</name>
              <description>This bit is used to select between the 8080 and 6800 series of microprocessor modes</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>8080_MODE</name>
                  <description>Pins LCD_WR_RWn and LCD_RD_E function as active low WR and active low RD signals respectively.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>6800_MODE</name>
                  <description>Pins LCD_WR_RWn and LCD_RD_E function as Read/Write and active high Enable signals respectively.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BUSY_ENABLE</name>
              <description>This bit enables the use of the interface's busy signal input</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>BUSY_DISABLED</name>
                  <description>The busy signal from the LCD controller will be ignored.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BUSY_ENABLED</name>
                  <description>Enable the use of the busy signal from the LCD controller.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>VSYNC_EDGE_IRQ</name>
              <description>This bit is set to indicate that an interrupt is requested by the eLCDIF block</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NO_REQUEST</name>
                  <description>No Interrupt Request Pending.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REQUEST</name>
                  <description>Interrupt Request Pending.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CUR_FRAME_DONE_IRQ</name>
              <description>This bit is set to indicate that an interrupt is requested by the eLCDIF block</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NO_REQUEST</name>
                  <description>No Interrupt Request Pending.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REQUEST</name>
                  <description>Interrupt Request Pending.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>UNDERFLOW_IRQ</name>
              <description>This bit is set to indicate that an interrupt is requested by the eLCDIF block</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NO_REQUEST</name>
                  <description>No Interrupt Request Pending.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REQUEST</name>
                  <description>Interrupt Request Pending.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>OVERFLOW_IRQ</name>
              <description>This bit is set to indicate that an interrupt is requested by the eLCDIF block</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NO_REQUEST</name>
                  <description>No Interrupt Request Pending.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REQUEST</name>
                  <description>Interrupt Request Pending.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>VSYNC_EDGE_IRQ_EN</name>
              <description>This bit is set to enable an interrupt every time the hardware encounters the leading VSYNC edge in the VSYNC and DOTCLK modes, or the beginning of every field in DVI mode</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CUR_FRAME_DONE_IRQ_EN</name>
              <description>This bit is set to 1 enable an interrupt every time the hardware enters in the vertical blanking state</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>UNDERFLOW_IRQ_EN</name>
              <description>This bit is set to enable an underflow interrupt in the TXFIFO in the write mode.</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>OVERFLOW_IRQ_EN</name>
              <description>This bit is set to enable an overflow interrupt in the TXFIFO in the write mode.</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYTE_PACKING_FORMAT</name>
              <description>This bitfield is used to show which data bytes in a 32-bit word are valid</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>IRQ_ON_ALTERNATE_FIELDS</name>
              <description>If this bit is set, the eLCDIF block will assert the cur_frame_done interrupt only on alternate fields, otherwise it will issue the interrupt on both odd and even field</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>FIFO_CLEAR</name>
              <description>Set this bit to clear all the data in the latency FIFO (LFIFO), TXFIFO and the RXFIFO.</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>START_INTERLACE_FROM_SECOND_FIELD</name>
              <description>The default is to grab the odd lines first and then the even lines</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>INTERLACE_FIELDS</name>
              <description>Set this bit if it is required that the eLCDIF block fetches odd lines in one field and even lines in the other field</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RECOVER_ON_UNDERFLOW</name>
              <description>Set this bit to enable the eLCDIF block to recover in the next field/frame if there was an underflow in the current field/frame</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BM_ERROR_IRQ</name>
              <description>This bit is set to indicate that an interrupt is requested by the eLCDIF block</description>
              <bitOffset>0x19</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NO_REQUEST</name>
                  <description>No Interrupt Request Pending.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REQUEST</name>
                  <description>Interrupt Request Pending.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BM_ERROR_IRQ_EN</name>
              <description>This bit is set to enable bus master error interrupt in the eLCDIF master mode.</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>COMBINE_MPU_WR_STRB</name>
              <description>If this bit is not set, the write strobe will be driven on LCD_WR_RWn pin in the 8080 mode and on the LCD_RD_E pin in the 6800 mode</description>
              <bitOffset>0x1B</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CTRL1_CLR</name>
          <description>eLCDIF General Control1 Register</description>
          <addressOffset>0x18</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0xF0000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RESET</name>
              <description>Reset bit for the external LCD controller</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LCDRESET_LOW</name>
                  <description>LCD_RESET output signal is low.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LCDRESET_HIGH</name>
                  <description>LCD_RESET output signal is high.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>MODE86</name>
              <description>This bit is used to select between the 8080 and 6800 series of microprocessor modes</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>8080_MODE</name>
                  <description>Pins LCD_WR_RWn and LCD_RD_E function as active low WR and active low RD signals respectively.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>6800_MODE</name>
                  <description>Pins LCD_WR_RWn and LCD_RD_E function as Read/Write and active high Enable signals respectively.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BUSY_ENABLE</name>
              <description>This bit enables the use of the interface's busy signal input</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>BUSY_DISABLED</name>
                  <description>The busy signal from the LCD controller will be ignored.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BUSY_ENABLED</name>
                  <description>Enable the use of the busy signal from the LCD controller.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>VSYNC_EDGE_IRQ</name>
              <description>This bit is set to indicate that an interrupt is requested by the eLCDIF block</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NO_REQUEST</name>
                  <description>No Interrupt Request Pending.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REQUEST</name>
                  <description>Interrupt Request Pending.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CUR_FRAME_DONE_IRQ</name>
              <description>This bit is set to indicate that an interrupt is requested by the eLCDIF block</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NO_REQUEST</name>
                  <description>No Interrupt Request Pending.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REQUEST</name>
                  <description>Interrupt Request Pending.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>UNDERFLOW_IRQ</name>
              <description>This bit is set to indicate that an interrupt is requested by the eLCDIF block</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NO_REQUEST</name>
                  <description>No Interrupt Request Pending.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REQUEST</name>
                  <description>Interrupt Request Pending.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>OVERFLOW_IRQ</name>
              <description>This bit is set to indicate that an interrupt is requested by the eLCDIF block</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NO_REQUEST</name>
                  <description>No Interrupt Request Pending.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REQUEST</name>
                  <description>Interrupt Request Pending.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>VSYNC_EDGE_IRQ_EN</name>
              <description>This bit is set to enable an interrupt every time the hardware encounters the leading VSYNC edge in the VSYNC and DOTCLK modes, or the beginning of every field in DVI mode</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CUR_FRAME_DONE_IRQ_EN</name>
              <description>This bit is set to 1 enable an interrupt every time the hardware enters in the vertical blanking state</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>UNDERFLOW_IRQ_EN</name>
              <description>This bit is set to enable an underflow interrupt in the TXFIFO in the write mode.</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>OVERFLOW_IRQ_EN</name>
              <description>This bit is set to enable an overflow interrupt in the TXFIFO in the write mode.</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYTE_PACKING_FORMAT</name>
              <description>This bitfield is used to show which data bytes in a 32-bit word are valid</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>IRQ_ON_ALTERNATE_FIELDS</name>
              <description>If this bit is set, the eLCDIF block will assert the cur_frame_done interrupt only on alternate fields, otherwise it will issue the interrupt on both odd and even field</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>FIFO_CLEAR</name>
              <description>Set this bit to clear all the data in the latency FIFO (LFIFO), TXFIFO and the RXFIFO.</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>START_INTERLACE_FROM_SECOND_FIELD</name>
              <description>The default is to grab the odd lines first and then the even lines</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>INTERLACE_FIELDS</name>
              <description>Set this bit if it is required that the eLCDIF block fetches odd lines in one field and even lines in the other field</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RECOVER_ON_UNDERFLOW</name>
              <description>Set this bit to enable the eLCDIF block to recover in the next field/frame if there was an underflow in the current field/frame</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BM_ERROR_IRQ</name>
              <description>This bit is set to indicate that an interrupt is requested by the eLCDIF block</description>
              <bitOffset>0x19</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NO_REQUEST</name>
                  <description>No Interrupt Request Pending.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REQUEST</name>
                  <description>Interrupt Request Pending.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BM_ERROR_IRQ_EN</name>
              <description>This bit is set to enable bus master error interrupt in the eLCDIF master mode.</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>COMBINE_MPU_WR_STRB</name>
              <description>If this bit is not set, the write strobe will be driven on LCD_WR_RWn pin in the 8080 mode and on the LCD_RD_E pin in the 6800 mode</description>
              <bitOffset>0x1B</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CTRL1_TOG</name>
          <description>eLCDIF General Control1 Register</description>
          <addressOffset>0x1C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0xF0000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RESET</name>
              <description>Reset bit for the external LCD controller</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LCDRESET_LOW</name>
                  <description>LCD_RESET output signal is low.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LCDRESET_HIGH</name>
                  <description>LCD_RESET output signal is high.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>MODE86</name>
              <description>This bit is used to select between the 8080 and 6800 series of microprocessor modes</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>8080_MODE</name>
                  <description>Pins LCD_WR_RWn and LCD_RD_E function as active low WR and active low RD signals respectively.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>6800_MODE</name>
                  <description>Pins LCD_WR_RWn and LCD_RD_E function as Read/Write and active high Enable signals respectively.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BUSY_ENABLE</name>
              <description>This bit enables the use of the interface's busy signal input</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>BUSY_DISABLED</name>
                  <description>The busy signal from the LCD controller will be ignored.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BUSY_ENABLED</name>
                  <description>Enable the use of the busy signal from the LCD controller.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>VSYNC_EDGE_IRQ</name>
              <description>This bit is set to indicate that an interrupt is requested by the eLCDIF block</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NO_REQUEST</name>
                  <description>No Interrupt Request Pending.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REQUEST</name>
                  <description>Interrupt Request Pending.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CUR_FRAME_DONE_IRQ</name>
              <description>This bit is set to indicate that an interrupt is requested by the eLCDIF block</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NO_REQUEST</name>
                  <description>No Interrupt Request Pending.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REQUEST</name>
                  <description>Interrupt Request Pending.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>UNDERFLOW_IRQ</name>
              <description>This bit is set to indicate that an interrupt is requested by the eLCDIF block</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NO_REQUEST</name>
                  <description>No Interrupt Request Pending.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REQUEST</name>
                  <description>Interrupt Request Pending.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>OVERFLOW_IRQ</name>
              <description>This bit is set to indicate that an interrupt is requested by the eLCDIF block</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NO_REQUEST</name>
                  <description>No Interrupt Request Pending.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REQUEST</name>
                  <description>Interrupt Request Pending.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>VSYNC_EDGE_IRQ_EN</name>
              <description>This bit is set to enable an interrupt every time the hardware encounters the leading VSYNC edge in the VSYNC and DOTCLK modes, or the beginning of every field in DVI mode</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CUR_FRAME_DONE_IRQ_EN</name>
              <description>This bit is set to 1 enable an interrupt every time the hardware enters in the vertical blanking state</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>UNDERFLOW_IRQ_EN</name>
              <description>This bit is set to enable an underflow interrupt in the TXFIFO in the write mode.</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>OVERFLOW_IRQ_EN</name>
              <description>This bit is set to enable an overflow interrupt in the TXFIFO in the write mode.</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BYTE_PACKING_FORMAT</name>
              <description>This bitfield is used to show which data bytes in a 32-bit word are valid</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>IRQ_ON_ALTERNATE_FIELDS</name>
              <description>If this bit is set, the eLCDIF block will assert the cur_frame_done interrupt only on alternate fields, otherwise it will issue the interrupt on both odd and even field</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>FIFO_CLEAR</name>
              <description>Set this bit to clear all the data in the latency FIFO (LFIFO), TXFIFO and the RXFIFO.</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>START_INTERLACE_FROM_SECOND_FIELD</name>
              <description>The default is to grab the odd lines first and then the even lines</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>INTERLACE_FIELDS</name>
              <description>Set this bit if it is required that the eLCDIF block fetches odd lines in one field and even lines in the other field</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RECOVER_ON_UNDERFLOW</name>
              <description>Set this bit to enable the eLCDIF block to recover in the next field/frame if there was an underflow in the current field/frame</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BM_ERROR_IRQ</name>
              <description>This bit is set to indicate that an interrupt is requested by the eLCDIF block</description>
              <bitOffset>0x19</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NO_REQUEST</name>
                  <description>No Interrupt Request Pending.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REQUEST</name>
                  <description>Interrupt Request Pending.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BM_ERROR_IRQ_EN</name>
              <description>This bit is set to enable bus master error interrupt in the eLCDIF master mode.</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>COMBINE_MPU_WR_STRB</name>
              <description>If this bit is not set, the write strobe will be driven on LCD_WR_RWn pin in the 8080 mode and on the LCD_RD_E pin in the 6800 mode</description>
              <bitOffset>0x1B</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CTRL2</name>
          <description>eLCDIF General Control2 Register</description>
          <addressOffset>0x20</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x200000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>INITIAL_DUMMY_READ</name>
              <description>The value in this field determines the number of dummy 8/16/18/24-bit subwords that have to be read back from the LCD panel/controller</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>READ_MODE_NUM_PACKED_SUBWORDS</name>
              <description>Indicates the number of valid 8/16/18/24-bit subwords that will be packed into the 32-bit word in read mode</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>READ_MODE_6_BIT_INPUT</name>
              <description>Setting this bit to 1 indicates to eLCDIF that even though LCD_DATABUS_WIDTH is set to 8 bits, the input data is actually only 6 bits wide and exists on D5-D0</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>READ_MODE_OUTPUT_IN_RGB_FORMAT</name>
              <description>Setting this bit will enable the eLCDIF to convert the incoming data to the RGB format given by WORD_LENGTH bitfield</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>READ_PACK_DIR</name>
              <description>The default value of 0 indicates data is stored in the little endian format</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>EVEN_LINE_PATTERN</name>
              <description>This field determines the order of the RGB components of each pixel in EVEN lines (line numbers 2,4,6,</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RGB</name>
                  <description>no description available</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RBG</name>
                  <description>no description available</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>GBR</name>
                  <description>no description available</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>GRB</name>
                  <description>no description available</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BRG</name>
                  <description>no description available</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BGR</name>
                  <description>no description available</description>
                  <value>0x5</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODD_LINE_PATTERN</name>
              <description>This field determines the order of the RGB components of each pixel in ODD lines (line numbers 1,3,5,</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RGB</name>
                  <description>no description available</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RBG</name>
                  <description>no description available</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>GBR</name>
                  <description>no description available</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>GRB</name>
                  <description>no description available</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BRG</name>
                  <description>no description available</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BGR</name>
                  <description>no description available</description>
                  <value>0x5</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BURST_LEN_8</name>
              <description>By default, when the eLCDIF is in the bus master mode, it will issue AXI bursts of length 16 (except when in packed 24 bpp mode, it will issue bursts of length 15)</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>OUTSTANDING_REQS</name>
              <description>This bitfield indicates the maximum number of outstanding transactions that eLCDIF should request when it is acting as a bus master</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>REQ_1</name>
                  <description>no description available</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REQ_2</name>
                  <description>no description available</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REQ_4</name>
                  <description>no description available</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REQ_8</name>
                  <description>no description available</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REQ_16</name>
                  <description>no description available</description>
                  <value>0x4</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>CTRL2_SET</name>
          <description>eLCDIF General Control2 Register</description>
          <addressOffset>0x24</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x200000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>INITIAL_DUMMY_READ</name>
              <description>The value in this field determines the number of dummy 8/16/18/24-bit subwords that have to be read back from the LCD panel/controller</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>READ_MODE_NUM_PACKED_SUBWORDS</name>
              <description>Indicates the number of valid 8/16/18/24-bit subwords that will be packed into the 32-bit word in read mode</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>READ_MODE_6_BIT_INPUT</name>
              <description>Setting this bit to 1 indicates to eLCDIF that even though LCD_DATABUS_WIDTH is set to 8 bits, the input data is actually only 6 bits wide and exists on D5-D0</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>READ_MODE_OUTPUT_IN_RGB_FORMAT</name>
              <description>Setting this bit will enable the eLCDIF to convert the incoming data to the RGB format given by WORD_LENGTH bitfield</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>READ_PACK_DIR</name>
              <description>The default value of 0 indicates data is stored in the little endian format</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>EVEN_LINE_PATTERN</name>
              <description>This field determines the order of the RGB components of each pixel in EVEN lines (line numbers 2,4,6,</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RGB</name>
                  <description>no description available</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RBG</name>
                  <description>no description available</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>GBR</name>
                  <description>no description available</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>GRB</name>
                  <description>no description available</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BRG</name>
                  <description>no description available</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BGR</name>
                  <description>no description available</description>
                  <value>0x5</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODD_LINE_PATTERN</name>
              <description>This field determines the order of the RGB components of each pixel in ODD lines (line numbers 1,3,5,</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RGB</name>
                  <description>no description available</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RBG</name>
                  <description>no description available</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>GBR</name>
                  <description>no description available</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>GRB</name>
                  <description>no description available</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BRG</name>
                  <description>no description available</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BGR</name>
                  <description>no description available</description>
                  <value>0x5</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BURST_LEN_8</name>
              <description>By default, when the eLCDIF is in the bus master mode, it will issue AXI bursts of length 16 (except when in packed 24 bpp mode, it will issue bursts of length 15)</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>OUTSTANDING_REQS</name>
              <description>This bitfield indicates the maximum number of outstanding transactions that eLCDIF should request when it is acting as a bus master</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>REQ_1</name>
                  <description>no description available</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REQ_2</name>
                  <description>no description available</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REQ_4</name>
                  <description>no description available</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REQ_8</name>
                  <description>no description available</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REQ_16</name>
                  <description>no description available</description>
                  <value>0x4</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>CTRL2_CLR</name>
          <description>eLCDIF General Control2 Register</description>
          <addressOffset>0x28</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x200000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>INITIAL_DUMMY_READ</name>
              <description>The value in this field determines the number of dummy 8/16/18/24-bit subwords that have to be read back from the LCD panel/controller</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>READ_MODE_NUM_PACKED_SUBWORDS</name>
              <description>Indicates the number of valid 8/16/18/24-bit subwords that will be packed into the 32-bit word in read mode</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>READ_MODE_6_BIT_INPUT</name>
              <description>Setting this bit to 1 indicates to eLCDIF that even though LCD_DATABUS_WIDTH is set to 8 bits, the input data is actually only 6 bits wide and exists on D5-D0</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>READ_MODE_OUTPUT_IN_RGB_FORMAT</name>
              <description>Setting this bit will enable the eLCDIF to convert the incoming data to the RGB format given by WORD_LENGTH bitfield</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>READ_PACK_DIR</name>
              <description>The default value of 0 indicates data is stored in the little endian format</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>EVEN_LINE_PATTERN</name>
              <description>This field determines the order of the RGB components of each pixel in EVEN lines (line numbers 2,4,6,</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RGB</name>
                  <description>no description available</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RBG</name>
                  <description>no description available</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>GBR</name>
                  <description>no description available</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>GRB</name>
                  <description>no description available</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BRG</name>
                  <description>no description available</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BGR</name>
                  <description>no description available</description>
                  <value>0x5</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODD_LINE_PATTERN</name>
              <description>This field determines the order of the RGB components of each pixel in ODD lines (line numbers 1,3,5,</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RGB</name>
                  <description>no description available</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RBG</name>
                  <description>no description available</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>GBR</name>
                  <description>no description available</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>GRB</name>
                  <description>no description available</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BRG</name>
                  <description>no description available</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BGR</name>
                  <description>no description available</description>
                  <value>0x5</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BURST_LEN_8</name>
              <description>By default, when the eLCDIF is in the bus master mode, it will issue AXI bursts of length 16 (except when in packed 24 bpp mode, it will issue bursts of length 15)</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>OUTSTANDING_REQS</name>
              <description>This bitfield indicates the maximum number of outstanding transactions that eLCDIF should request when it is acting as a bus master</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>REQ_1</name>
                  <description>no description available</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REQ_2</name>
                  <description>no description available</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REQ_4</name>
                  <description>no description available</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REQ_8</name>
                  <description>no description available</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REQ_16</name>
                  <description>no description available</description>
                  <value>0x4</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>CTRL2_TOG</name>
          <description>eLCDIF General Control2 Register</description>
          <addressOffset>0x2C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x200000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>INITIAL_DUMMY_READ</name>
              <description>The value in this field determines the number of dummy 8/16/18/24-bit subwords that have to be read back from the LCD panel/controller</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>READ_MODE_NUM_PACKED_SUBWORDS</name>
              <description>Indicates the number of valid 8/16/18/24-bit subwords that will be packed into the 32-bit word in read mode</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>READ_MODE_6_BIT_INPUT</name>
              <description>Setting this bit to 1 indicates to eLCDIF that even though LCD_DATABUS_WIDTH is set to 8 bits, the input data is actually only 6 bits wide and exists on D5-D0</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>READ_MODE_OUTPUT_IN_RGB_FORMAT</name>
              <description>Setting this bit will enable the eLCDIF to convert the incoming data to the RGB format given by WORD_LENGTH bitfield</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>READ_PACK_DIR</name>
              <description>The default value of 0 indicates data is stored in the little endian format</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>EVEN_LINE_PATTERN</name>
              <description>This field determines the order of the RGB components of each pixel in EVEN lines (line numbers 2,4,6,</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RGB</name>
                  <description>no description available</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RBG</name>
                  <description>no description available</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>GBR</name>
                  <description>no description available</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>GRB</name>
                  <description>no description available</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BRG</name>
                  <description>no description available</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BGR</name>
                  <description>no description available</description>
                  <value>0x5</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODD_LINE_PATTERN</name>
              <description>This field determines the order of the RGB components of each pixel in ODD lines (line numbers 1,3,5,</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RGB</name>
                  <description>no description available</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RBG</name>
                  <description>no description available</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>GBR</name>
                  <description>no description available</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>GRB</name>
                  <description>no description available</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BRG</name>
                  <description>no description available</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BGR</name>
                  <description>no description available</description>
                  <value>0x5</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BURST_LEN_8</name>
              <description>By default, when the eLCDIF is in the bus master mode, it will issue AXI bursts of length 16 (except when in packed 24 bpp mode, it will issue bursts of length 15)</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>OUTSTANDING_REQS</name>
              <description>This bitfield indicates the maximum number of outstanding transactions that eLCDIF should request when it is acting as a bus master</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>REQ_1</name>
                  <description>no description available</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REQ_2</name>
                  <description>no description available</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REQ_4</name>
                  <description>no description available</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REQ_8</name>
                  <description>no description available</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>REQ_16</name>
                  <description>no description available</description>
                  <value>0x4</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>TRANSFER_COUNT</name>
          <description>eLCDIF Horizontal and Vertical Valid Data Count Register</description>
          <addressOffset>0x30</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>H_COUNT</name>
              <description>Total valid data (pixels) in each horizontal line</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>V_COUNT</name>
              <description>Number of horizontal lines per frame which contain valid data</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CUR_BUF</name>
          <description>LCD Interface Current Buffer Address Register</description>
          <addressOffset>0x40</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ADDR</name>
              <description>Address of the current frame being transmitted by eLCDIF.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>NEXT_BUF</name>
          <description>LCD Interface Next Buffer Address Register</description>
          <addressOffset>0x50</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ADDR</name>
              <description>Address of the next frame that will be transmitted by eLCDIF.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>TIMING</name>
          <description>LCD Interface Timing Register</description>
          <addressOffset>0x60</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_SETUP</name>
              <description>Data bus setup time in DISPLAY CLOCK (pix_clk) cycles</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_HOLD</name>
              <description>Data bus hold time in DISPLAY CLOCK (pix_clk) cycles</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CMD_SETUP</name>
              <description>Number of DISPLAY CLOCK (pix_clk) cycles that the LCD_RS signal is active before LCD_CS is asserted</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CMD_HOLD</name>
              <description>Number of DISPLAY CLOCK (pix_clk) cycles that the LCD_RS signal is active after LCD_CS is deasserted</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>VDCTRL0</name>
          <description>eLCDIF VSYNC Mode and Dotclk Mode Control Register0</description>
          <addressOffset>0x70</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>VSYNC_PULSE_WIDTH</name>
              <description>Number of units for which VSYNC signal is active</description>
              <bitOffset>0</bitOffset>
              <bitWidth>18</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>HALF_LINE_MODE</name>
              <description>When this bit is 0, the first field (VSYNC period) will end in half a horizontal line and the second field will begin with half a horizontal line</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>HALF_LINE</name>
              <description>Setting this bit to 1 will make the total VSYNC period equal to the VSYNC_PERIOD field plus half the HORIZONTAL_PERIOD field (i</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>VSYNC_PULSE_WIDTH_UNIT</name>
              <description>Default 0 for counting VSYNC_PULSE_WIDTH in terms of DISPLAY CLOCK (pix_clk) cycles</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>VSYNC_PERIOD_UNIT</name>
              <description>Default 0 for counting VSYNC_PERIOD in terms of DISPLAY CLOCK (pix_clk) cycles</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENABLE_POL</name>
              <description>Default 0 active low during valid data transfer on each horizontal line.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DOTCLK_POL</name>
              <description>Default is data launched at negative edge of DOTCLK and captured at positive edge</description>
              <bitOffset>0x19</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>HSYNC_POL</name>
              <description>Default 0 active low during HSYNC_PULSE_WIDTH time and will be high during the rest of the HSYNC period</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>VSYNC_POL</name>
              <description>Default 0 active low during VSYNC_PULSE_WIDTH time and will be high during the rest of the VSYNC period</description>
              <bitOffset>0x1B</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENABLE_PRESENT</name>
              <description>Setting this bit to 1 will make the hardware generate the ENABLE signal in the DOTCLK mode, thereby making it the true RGB interface along with the remaining three signals VSYNC, HSYNC and DOTCLK</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>VSYNC_OEB</name>
              <description>0 means the VSYNC signal is an output, 1 means it is an input</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>VSYNC_OUTPUT</name>
                  <description>The VSYNC pin is in the output mode and the VSYNC signal has to be generated by the eLCDIF block.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>VSYNC_INPUT</name>
                  <description>The VSYNC pin is in the input mode and the LCD controller sends the VSYNC signal to the block.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>VDCTRL0_SET</name>
          <description>eLCDIF VSYNC Mode and Dotclk Mode Control Register0</description>
          <addressOffset>0x74</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>VSYNC_PULSE_WIDTH</name>
              <description>Number of units for which VSYNC signal is active</description>
              <bitOffset>0</bitOffset>
              <bitWidth>18</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>HALF_LINE_MODE</name>
              <description>When this bit is 0, the first field (VSYNC period) will end in half a horizontal line and the second field will begin with half a horizontal line</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>HALF_LINE</name>
              <description>Setting this bit to 1 will make the total VSYNC period equal to the VSYNC_PERIOD field plus half the HORIZONTAL_PERIOD field (i</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>VSYNC_PULSE_WIDTH_UNIT</name>
              <description>Default 0 for counting VSYNC_PULSE_WIDTH in terms of DISPLAY CLOCK (pix_clk) cycles</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>VSYNC_PERIOD_UNIT</name>
              <description>Default 0 for counting VSYNC_PERIOD in terms of DISPLAY CLOCK (pix_clk) cycles</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENABLE_POL</name>
              <description>Default 0 active low during valid data transfer on each horizontal line.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DOTCLK_POL</name>
              <description>Default is data launched at negative edge of DOTCLK and captured at positive edge</description>
              <bitOffset>0x19</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>HSYNC_POL</name>
              <description>Default 0 active low during HSYNC_PULSE_WIDTH time and will be high during the rest of the HSYNC period</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>VSYNC_POL</name>
              <description>Default 0 active low during VSYNC_PULSE_WIDTH time and will be high during the rest of the VSYNC period</description>
              <bitOffset>0x1B</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENABLE_PRESENT</name>
              <description>Setting this bit to 1 will make the hardware generate the ENABLE signal in the DOTCLK mode, thereby making it the true RGB interface along with the remaining three signals VSYNC, HSYNC and DOTCLK</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>VSYNC_OEB</name>
              <description>0 means the VSYNC signal is an output, 1 means it is an input</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>VSYNC_OUTPUT</name>
                  <description>The VSYNC pin is in the output mode and the VSYNC signal has to be generated by the eLCDIF block.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>VSYNC_INPUT</name>
                  <description>The VSYNC pin is in the input mode and the LCD controller sends the VSYNC signal to the block.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>VDCTRL0_CLR</name>
          <description>eLCDIF VSYNC Mode and Dotclk Mode Control Register0</description>
          <addressOffset>0x78</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>VSYNC_PULSE_WIDTH</name>
              <description>Number of units for which VSYNC signal is active</description>
              <bitOffset>0</bitOffset>
              <bitWidth>18</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>HALF_LINE_MODE</name>
              <description>When this bit is 0, the first field (VSYNC period) will end in half a horizontal line and the second field will begin with half a horizontal line</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>HALF_LINE</name>
              <description>Setting this bit to 1 will make the total VSYNC period equal to the VSYNC_PERIOD field plus half the HORIZONTAL_PERIOD field (i</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>VSYNC_PULSE_WIDTH_UNIT</name>
              <description>Default 0 for counting VSYNC_PULSE_WIDTH in terms of DISPLAY CLOCK (pix_clk) cycles</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>VSYNC_PERIOD_UNIT</name>
              <description>Default 0 for counting VSYNC_PERIOD in terms of DISPLAY CLOCK (pix_clk) cycles</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENABLE_POL</name>
              <description>Default 0 active low during valid data transfer on each horizontal line.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DOTCLK_POL</name>
              <description>Default is data launched at negative edge of DOTCLK and captured at positive edge</description>
              <bitOffset>0x19</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>HSYNC_POL</name>
              <description>Default 0 active low during HSYNC_PULSE_WIDTH time and will be high during the rest of the HSYNC period</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>VSYNC_POL</name>
              <description>Default 0 active low during VSYNC_PULSE_WIDTH time and will be high during the rest of the VSYNC period</description>
              <bitOffset>0x1B</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENABLE_PRESENT</name>
              <description>Setting this bit to 1 will make the hardware generate the ENABLE signal in the DOTCLK mode, thereby making it the true RGB interface along with the remaining three signals VSYNC, HSYNC and DOTCLK</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>VSYNC_OEB</name>
              <description>0 means the VSYNC signal is an output, 1 means it is an input</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>VSYNC_OUTPUT</name>
                  <description>The VSYNC pin is in the output mode and the VSYNC signal has to be generated by the eLCDIF block.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>VSYNC_INPUT</name>
                  <description>The VSYNC pin is in the input mode and the LCD controller sends the VSYNC signal to the block.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>VDCTRL0_TOG</name>
          <description>eLCDIF VSYNC Mode and Dotclk Mode Control Register0</description>
          <addressOffset>0x7C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>VSYNC_PULSE_WIDTH</name>
              <description>Number of units for which VSYNC signal is active</description>
              <bitOffset>0</bitOffset>
              <bitWidth>18</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>HALF_LINE_MODE</name>
              <description>When this bit is 0, the first field (VSYNC period) will end in half a horizontal line and the second field will begin with half a horizontal line</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>HALF_LINE</name>
              <description>Setting this bit to 1 will make the total VSYNC period equal to the VSYNC_PERIOD field plus half the HORIZONTAL_PERIOD field (i</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>VSYNC_PULSE_WIDTH_UNIT</name>
              <description>Default 0 for counting VSYNC_PULSE_WIDTH in terms of DISPLAY CLOCK (pix_clk) cycles</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>VSYNC_PERIOD_UNIT</name>
              <description>Default 0 for counting VSYNC_PERIOD in terms of DISPLAY CLOCK (pix_clk) cycles</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENABLE_POL</name>
              <description>Default 0 active low during valid data transfer on each horizontal line.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DOTCLK_POL</name>
              <description>Default is data launched at negative edge of DOTCLK and captured at positive edge</description>
              <bitOffset>0x19</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>HSYNC_POL</name>
              <description>Default 0 active low during HSYNC_PULSE_WIDTH time and will be high during the rest of the HSYNC period</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>VSYNC_POL</name>
              <description>Default 0 active low during VSYNC_PULSE_WIDTH time and will be high during the rest of the VSYNC period</description>
              <bitOffset>0x1B</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENABLE_PRESENT</name>
              <description>Setting this bit to 1 will make the hardware generate the ENABLE signal in the DOTCLK mode, thereby making it the true RGB interface along with the remaining three signals VSYNC, HSYNC and DOTCLK</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>VSYNC_OEB</name>
              <description>0 means the VSYNC signal is an output, 1 means it is an input</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>VSYNC_OUTPUT</name>
                  <description>The VSYNC pin is in the output mode and the VSYNC signal has to be generated by the eLCDIF block.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>VSYNC_INPUT</name>
                  <description>The VSYNC pin is in the input mode and the LCD controller sends the VSYNC signal to the block.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>VDCTRL1</name>
          <description>eLCDIF VSYNC Mode and Dotclk Mode Control Register1</description>
          <addressOffset>0x80</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>VSYNC_PERIOD</name>
              <description>Total number of units between two positive or two negative edges of the VSYNC signal</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>VDCTRL2</name>
          <description>LCDIF VSYNC Mode and Dotclk Mode Control Register2</description>
          <addressOffset>0x90</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>HSYNC_PERIOD</name>
              <description>Total number of DISPLAY CLOCK (pix_clk) cycles between two positive or two negative edges of the HSYNC signal</description>
              <bitOffset>0</bitOffset>
              <bitWidth>18</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>HSYNC_PULSE_WIDTH</name>
              <description>Number of DISPLAY CLOCK (pix_clk) cycles for which HSYNC signal is active.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>14</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>VDCTRL3</name>
          <description>eLCDIF VSYNC Mode and Dotclk Mode Control Register3</description>
          <addressOffset>0xA0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>VERTICAL_WAIT_CNT</name>
              <description>In the VSYNC interface mode, wait for this number of DISPLAY CLOCK (pix_clk) cycles from the falling VSYNC edge (or rising if VSYNC_POL is 1) before starting LCD transactions and is applicable only if WAIT_FOR_VSYNC_EDGE is set</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>HORIZONTAL_WAIT_CNT</name>
              <description>In the DOTCLK mode, wait for this number of clocks from falling edge (or rising if HSYNC_POL is 1) of HSYNC signal to account for horizontal back porch plus the number of DOTCLKs before the moving picture information begins</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>12</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>VSYNC_ONLY</name>
              <description>This bit must be set to 1 in the VSYNC mode of operation, and 0 in the DOTCLK mode of operation.</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>MUX_SYNC_SIGNALS</name>
              <description>When this bit is set, the eLCDIF block will internally mux HSYNC with LCD_D14, DOTCLK with LCD_D13 and ENABLE with LCD_D12, otherwise these signals will go out on separate pins</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>VDCTRL4</name>
          <description>eLCDIF VSYNC Mode and Dotclk Mode Control Register4</description>
          <addressOffset>0xB0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DOTCLK_H_VALID_DATA_CNT</name>
              <description>Total number of DISPLAY CLOCK (pix_clk) cycles on each horizontal line that carry valid data in DOTCLK mode</description>
              <bitOffset>0</bitOffset>
              <bitWidth>18</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SYNC_SIGNALS_ON</name>
              <description>Set this field to 1 if the LCD controller requires that the VSYNC or VSYNC/HSYNC/DOTCLK control signals should be active at least one frame before the data transfers actually start and remain active at least one frame after the data transfers end</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DOTCLK_DLY_SEL</name>
              <description>This bitfield selects the amount of time by which the DOTCLK signal should be delayed before coming out of the LCD_DOTCK pin</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>DVICTRL0</name>
          <description>Digital Video Interface Control0 Register</description>
          <addressOffset>0xC0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>H_BLANKING_CNT</name>
              <description>Number of blanking samples to be inserted between EAV and SAV during horizontal blanking interval.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>12</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>H_ACTIVE_CNT</name>
              <description>Number of active video samples to be transmitted</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>12</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>DVICTRL1</name>
          <description>Digital Video Interface Control1 Register</description>
          <addressOffset>0xD0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>F2_START_LINE</name>
              <description>Vertical line number from which Field 2 begins.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>10</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>F1_END_LINE</name>
              <description>Vertical line number at which Field1 ends.</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>10</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>F1_START_LINE</name>
              <description>Vertical line number from which Field 1 begins.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>10</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>DVICTRL2</name>
          <description>Digital Video Interface Control2 Register</description>
          <addressOffset>0xE0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>V1_BLANK_END_LINE</name>
              <description>Vertical line number in the beginning part of Field2 where first Vertical Blanking interval ends.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>10</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>V1_BLANK_START_LINE</name>
              <description>Vertical line number towards the end of Field1 where first Vertical Blanking interval starts.</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>10</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>F2_END_LINE</name>
              <description>Vertical line number at which Field 2 ends.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>10</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>DVICTRL3</name>
          <description>Digital Video Interface Control3 Register</description>
          <addressOffset>0xF0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>V_LINES_CNT</name>
              <description>Total number of vertical lines per frame (generally 525 or 625)</description>
              <bitOffset>0</bitOffset>
              <bitWidth>10</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>V2_BLANK_END_LINE</name>
              <description>Vertical line number in the beginning part of Field1 where second Vertical Blanking interval ends.</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>10</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>V2_BLANK_START_LINE</name>
              <description>Vertical line number towards the end of Field2 where second Vertical Blanking interval starts.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>10</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>DVICTRL4</name>
          <description>Digital Video Interface Control4 Register</description>
          <addressOffset>0x100</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>H_FILL_CNT</name>
              <description>Number of active video samples that have to be filled with the filler data in the front and back portions of the active horizontal interval</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CR_FILL_VALUE</name>
              <description>Value of CR component of filler data.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CB_FILL_VALUE</name>
              <description>Value of CB component of filler data</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>Y_FILL_VALUE</name>
              <description>Value of Y component of filler data</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CSC_COEFF0</name>
          <description>RGB to YCbCr 4:2:2 CSC Coefficient0 Register</description>
          <addressOffset>0x110</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>CSC_SUBSAMPLE_FILTER</name>
              <description>This register describes the filtering and subsampling scheme to be performed on the chroma components in order to convert from YCbCr 4:4:4 to YCbCr 4:2:2 space</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SAMPLE_AND_HOLD</name>
                  <description>No filtering, simply keep every chroma value for samples numbered 2n and discard chroma values associated with all samples numbered 2n+1.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>INTERSTITIAL</name>
                  <description>Chroma samples numbered 2n and 2n+1 are averaged (weights 1/2, 1/2) and that chroma value replaces the two chroma values at 2n and 2n+1. This chroma now exists horizontally halfway between the two luma samples.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>COSITED</name>
                  <description>Chroma samples numbered 2n-1, 2n, and 2n+1 are averaged (weights 1/4, 1/2, 1/4) and that chroma value exists at the same site as the luma sample numbered 2n and the chroma samples at 2n+1 are discarded.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>C0</name>
              <description>Two's complement red multiplier coefficient for Y</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>10</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CSC_COEFF1</name>
          <description>RGB to YCbCr 4:2:2 CSC Coefficient1 Register</description>
          <addressOffset>0x120</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>C1</name>
              <description>Two's complement green multiplier coefficient for Y</description>
              <bitOffset>0</bitOffset>
              <bitWidth>10</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>C2</name>
              <description>Two's complement blue multiplier coefficient for Y</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>10</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CSC_COEFF2</name>
          <description>RGB to YCbCr 4:2:2 CSC Coefficent2 Register</description>
          <addressOffset>0x130</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>C3</name>
              <description>Two's complement red multiplier coefficient for Cb</description>
              <bitOffset>0</bitOffset>
              <bitWidth>10</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>C4</name>
              <description>Two's complement green multiplier coefficient for Cb</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>10</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CSC_COEFF3</name>
          <description>RGB to YCbCr 4:2:2 CSC Coefficient3 Register</description>
          <addressOffset>0x140</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>C5</name>
              <description>Two's complement blue multiplier coefficient for Cb</description>
              <bitOffset>0</bitOffset>
              <bitWidth>10</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>C6</name>
              <description>Two's complement red multiplier coefficient for Cr</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>10</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CSC_COEFF4</name>
          <description>RGB to YCbCr 4:2:2 CSC Coefficient4 Register</description>
          <addressOffset>0x150</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>C7</name>
              <description>Two's complement green multiplier coefficient for Cr</description>
              <bitOffset>0</bitOffset>
              <bitWidth>10</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>C8</name>
              <description>Two's complement blue multiplier coefficient for Cr</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>10</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CSC_OFFSET</name>
          <description>RGB to YCbCr 4:2:2 CSC Offset Register</description>
          <addressOffset>0x160</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x800010</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>Y_OFFSET</name>
              <description>Two's complement offset for the Y component</description>
              <bitOffset>0</bitOffset>
              <bitWidth>9</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CBCR_OFFSET</name>
              <description>Two's complement offset for the Cb and Cr components</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>9</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CSC_LIMIT</name>
          <description>RGB to YCbCr 4:2:2 CSC Limit Register</description>
          <addressOffset>0x170</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0xFF00FF</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>Y_MAX</name>
              <description>Upper limit of Y after RGB to 4:2:2 YCbCr conversion</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>Y_MIN</name>
              <description>Lower limit of Y after RGB to 4:2:2 YCbCr conversion</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CBCR_MAX</name>
              <description>Upper limit of Cb and Cr after RGB to 4:2:2 YCbCr conversion</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CBCR_MIN</name>
              <description>Lower limit of Cb and Cr after RGB to 4:2:2 YCbCr conversion</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>DATA</name>
          <description>LCD Interface Data Register</description>
          <addressOffset>0x180</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA_ZERO</name>
              <description>Byte 0 (least significant byte) of data written to eLCDIF.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_ONE</name>
              <description>Byte 1 of data written to eLCDIF.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_TWO</name>
              <description>Byte 2 of data written to eLCDIF.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA_THREE</name>
              <description>Byte 3 (most significant byte) of data written to LCDIF.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>BM_ERROR_STAT</name>
          <description>Bus Master Error Status Register</description>
          <addressOffset>0x190</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ADDR</name>
              <description>Virtual address at which bus master error occurred.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CRC_STAT</name>
          <description>CRC Status Register</description>
          <addressOffset>0x1A0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>CRC_VALUE</name>
              <description>Calculated CRC value.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>STAT</name>
          <description>LCD Interface Status Register</description>
          <addressOffset>0x1B0</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0x95000000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>LFIFO_COUNT</name>
              <description>Read only view of the current count in Latency buffer (LFIFO).</description>
              <bitOffset>0</bitOffset>
              <bitWidth>9</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>DVI_CURRENT_FIELD</name>
              <description>Read only view of the current field being transmitted</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>BUSY</name>
              <description>Read only view of the input busy signal from the external LCD controller.</description>
              <bitOffset>0x19</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>TXFIFO_EMPTY</name>
              <description>Read only view of the signal that indicates that LCD write dapatath FIFO is empty, will be generally used in the read mode of the LCD interface</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>TXFIFO_FULL</name>
              <description>Read only view of the signal that indicates that LCD write datapath FIFO is full, will be generally used in the write mode of the LCD interface</description>
              <bitOffset>0x1B</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>LFIFO_EMPTY</name>
              <description>Read only view of the signal that indicates that LCD read dapatath FIFO is empty, will be generally used in the read mode of the LCD interface</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>LFIFO_FULL</name>
              <description>Read only view of the signal that indicates that LCD read datapath FIFO is full, will be generally used in the write mode of the LCD interface</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>PRESENT</name>
              <description>0: eLCDIF not present on this product 1: eLCDIF is present.</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>THRES</name>
          <description>eLCDIF Threshold Register</description>
          <addressOffset>0x200</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x100000F</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>PANIC</name>
              <description>This value should be set to a value of pixels from 0 to 511</description>
              <bitOffset>0</bitOffset>
              <bitWidth>9</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>FASTCLOCK</name>
              <description>This value should be set to a value of pixels, from 0 to 511</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>9</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>AS_CTRL</name>
          <description>eLCDIF AS Buffer Control Register</description>
          <addressOffset>0x210</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>AS_ENABLE</name>
              <description>When this bit is set by software, the LCDIF will start fetching AS buffer data in bus master mode and combine it with another buffer</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ALPHA_CTRL</name>
              <description>Determines how the alpha value is constructed for this alpha surface</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENABLE_COLORKEY</name>
              <description>Indicates that colorkey functionality is enabled for this alpha surface</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>FORMAT</name>
              <description>Indicates the input buffer format for AS</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ALPHA</name>
              <description>Alpha modifier used when the ALPHA_MULTIPLY or ALPHA_OVERRIDE values are programmed in REG_AS_CTRL[ALPHA_CTRL]</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ROP</name>
              <description>Indicates a raster operation to perform when enabled</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ALPHA_INVERT</name>
              <description>Setting this bit to logic 0 will not alter the alpha value</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>INPUT_DATA_SWIZZLE</name>
              <description>This field specifies how to swap the bytes either in the HW_LCDIF_DATA register or those fetched by the AXI master part of LCDIF</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PS_DISABLE</name>
              <description>When this bit is set by software, the LCDIF will disable PS buffer data.</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RVDS1</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>CSI_SYNC_ON_IRQ</name>
              <description>this bit is set by software to decide which vsync generate mode</description>
              <bitOffset>0x1B</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CSI_SYNC_ON_IRQ_EN</name>
              <description>This bit is set to enable an interrupt when LCDIF lock with CSI vsync input.</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CSI_VSYNC_MODE</name>
              <description>this bit is set by software to decide which vsync generate mode</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CSI_VSYNC_POL</name>
              <description>Default 0 active low during VSYNC_PULSE_WIDTH time and will be high during the rest of the VSYNC period</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CSI_VSYNC_ENABLE</name>
              <description>When this bit is set by software, the LCDIF work as sync mode with CSI input.</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>AS_BUF</name>
          <description>Alpha Surface Buffer Pointer</description>
          <addressOffset>0x220</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ADDR</name>
              <description>Address pointer for the alpha surface 0 buffer.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>AS_NEXT_BUF</name>
          <description>no description available</description>
          <addressOffset>0x230</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ADDR</name>
              <description>Address of the next frame that will be transmitted by eLCDIF.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>AS_CLRKEYLOW</name>
          <description>eLCDIF Overlay Color Key Low</description>
          <addressOffset>0x240</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0xFFFFFF</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>PIXEL</name>
              <description>Low range of RGB color key applied to AS buffer</description>
              <bitOffset>0</bitOffset>
              <bitWidth>24</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>AS_CLRKEYHIGH</name>
          <description>eLCDIF Overlay Color Key High</description>
          <addressOffset>0x250</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>PIXEL</name>
              <description>High range of RGB color key applied to AS buffer</description>
              <bitOffset>0</bitOffset>
              <bitWidth>24</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>SYNC_DELAY</name>
          <description>LCD working insync mode with CSI for VSYNC delay</description>
          <addressOffset>0x260</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>H_COUNT_DELAY</name>
              <description>LCDIF VSYNC delayed counter for CSI_VSYNC.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>V_COUNT_DELAY</name>
              <description>LCDIF VSYNC delayed counter for CSI_VSYNC.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
      </registers>
    </peripheral>
    <peripheral>
      <name>PXP</name>
      <description>PXP v3.0 Register Reference Index</description>
      <groupName>PXP</groupName>
      <prependToName>PXP_</prependToName>
      <baseAddress>0x21CC000</baseAddress>
      <addressBlock>
        <offset>0</offset>
        <size>0x2D44</size>
        <usage>registers</usage>
      </addressBlock>
      <interrupt>
        <name>PXP_IRQ0</name>
        <value>40</value>
      </interrupt>
      <interrupt>
        <name>PXP_IRQ1</name>
        <value>50</value>
      </interrupt>
      <registers>
        <register>
          <name>HW_CTRL</name>
          <description>Control Register 0</description>
          <addressOffset>0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0xC7008000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ENABLE</name>
              <description>Enables PXP operation with specified parameters</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>IRQ_ENABLE</name>
              <description>Interrupt enable</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>NEXT_IRQ_ENABLE</name>
              <description>Next command interrupt enable</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>LUT_DMA_IRQ_ENABLE</name>
              <description>LUT DMA interrupt enable</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENABLE_LCD0_HANDSHAKE</name>
              <description>Enable handshake with LCD0 controller</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>HANDSHAKE_ABORT_SKIP</name>
              <description>When skip is enable, even the abort asserted, pxp will not assert the ready directly but wait for whole block line complete</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>ROTATE0</name>
              <description>Indicates the clockwise rotation to be applied at the output buffer</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ROT_0</name>
                  <description>no description available</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ROT_90</name>
                  <description>no description available</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ROT_180</name>
                  <description>no description available</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ROT_270</name>
                  <description>no description available</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HFLIP0</name>
              <description>Indicates that the output buffer should be flipped horizontally (effect applied before rotation).</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>VFLIP0</name>
              <description>Indicates that the output buffer should be flipped vertically (effect applied before rotation).</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ROTATE1</name>
              <description>Indicates the clockwise rotation to be applied at the input buffer</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ROT_0</name>
                  <description>no description available</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ROT_90</name>
                  <description>no description available</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ROT_180</name>
                  <description>no description available</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ROT_270</name>
                  <description>no description available</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HFLIP1</name>
              <description>Indicates that the input should be flipped horizontally (effect applied before rotation).</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>VFLIP1</name>
              <description>Indicates that the input should be flipped vertically (effect applied before rotation).</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENABLE_PS_AS_OUT</name>
              <description>Enable the PS engine, AS engine, OUTBUF in the PXP primary processing flow.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENABLE_DITHER</name>
              <description>Enable the Dithering engine in the PXP primary processing flow.</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENABLE_WFE_A</name>
              <description>Enable the WFE-A engine in the PXP primary processing flow.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENABLE_WFE_B</name>
              <description>Enable the WFE-B engine in the PXP primary processing flow.</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENABLE_INPUT_FETCH_STORE</name>
              <description>Enable the Input Fetch and Store engine in the PXP primary processing flow.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENABLE_ALPHA_B</name>
              <description>Enable the Alpha-B engine in the PXP primary processing flow.</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>BLOCK_SIZE</name>
              <description>Select the block size to process through the Rotate block.</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>8X8</name>
                  <description>Process 8x8 pixel blocks.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>16X16</name>
                  <description>Process 16x16 pixel blocks.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ENABLE_CSC2</name>
              <description>Enable the CSC2 engine in the PXP primary processing flow.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENABLE_LUT</name>
              <description>Enable the LUT engine in the PXP primary processing flow.</description>
              <bitOffset>0x19</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENABLE_ROTATE0</name>
              <description>Enable the ROTATE0 engine in the PXP primary processing flow.</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENABLE_ROTATE1</name>
              <description>Enable the ROTATE1 engine in the PXP primary processing flow.</description>
              <bitOffset>0x1B</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD2</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>RSVD4</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>CLKGATE</name>
              <description>This bit must be set to zero for normal operation</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SFTRST</name>
              <description>Set this bit to zero to enable normal PXP operation</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_STAT</name>
          <description>Status Register</description>
          <addressOffset>0x10</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>IRQ0</name>
              <description>Indicates current PXP interrupt status</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>AXI_WRITE_ERROR_0</name>
              <description>Indicates PXP encountered an AXI write error and processing has been terminated.</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>AXI_READ_ERROR_0</name>
              <description>Indicates PXP encountered an AXI read error and processing has been terminated.</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>NEXT_IRQ</name>
              <description>Indicates that a command issued with the &quot;Next Command&quot; functionality has been issued and that a new command may be initiated with a write to the PXP_NEXT register</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>AXI_ERROR_ID_0</name>
              <description>Indicates the AXI0 ID of the failing bus operation.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>LUT_DMA_LOAD_DONE_IRQ</name>
              <description>Indicates that the LUT DMA transfer has completed.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>AXI_WRITE_ERROR_1</name>
              <description>Indicates PXP encountered an AXI write error and processing has been terminated.</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>AXI_READ_ERROR_1</name>
              <description>Indicates PXP encountered an AXI read error and processing has been terminated.</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD2</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>AXI_ERROR_ID_1</name>
              <description>Indicates the AXI1 ID of the failing bus operation.</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>BLOCKY</name>
              <description>Indicates the X coordinate of the block currently being rendered.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>BLOCKX</name>
              <description>Indicates the X coordinate of the block currently being rendered.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_OUT_CTRL</name>
          <description>Output Buffer Control Register</description>
          <addressOffset>0x20</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>FORMAT</name>
              <description>Output framebuffer format</description>
              <bitOffset>0</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ARGB8888</name>
                  <description>32-bit pixels</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RGB888</name>
                  <description>32-bit pixels (unpacked 24-bit pixel in 32 bit DWORD.)</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RGB888P</name>
                  <description>24-bit pixels (packed 24-bit format)</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ARGB1555</name>
                  <description>16-bit pixels</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ARGB4444</name>
                  <description>16-bit pixels</description>
                  <value>0x9</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RGB555</name>
                  <description>16-bit pixels</description>
                  <value>0xC</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RGB444</name>
                  <description>16-bit pixels</description>
                  <value>0xD</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RGB565</name>
                  <description>16-bit pixels</description>
                  <value>0xE</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>YUV1P444</name>
                  <description>32-bit pixels (1-plane XYUV unpacked)</description>
                  <value>0x10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>UYVY1P422</name>
                  <description>16-bit pixels (1-plane U0,Y0,V0,Y1 interleaved bytes)</description>
                  <value>0x12</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>VYUY1P422</name>
                  <description>16-bit pixels (1-plane V0,Y0,U0,Y1 interleaved bytes)</description>
                  <value>0x13</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>Y8</name>
                  <description>8-bit monochrome pixels (1-plane Y luma output)</description>
                  <value>0x14</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>Y4</name>
                  <description>4-bit monochrome pixels (1-plane Y luma, 4 bit truncation)</description>
                  <value>0x15</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>YUV2P422</name>
                  <description>16-bit pixels (2-plane UV interleaved bytes)</description>
                  <value>0x18</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>YUV2P420</name>
                  <description>16-bit pixels (2-plane UV)</description>
                  <value>0x19</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>YVU2P422</name>
                  <description>16-bit pixels (2-plane VU interleaved bytes)</description>
                  <value>0x1A</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>YVU2P420</name>
                  <description>16-bit pixels (2-plane VU)</description>
                  <value>0x1B</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>INTERLACED_OUTPUT</name>
              <description>Determines how the PXP writes it's output data</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PROGRESSIVE</name>
                  <description>All data written in progressive format to the OUTBUF Pointer.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FIELD0</name>
                  <description>Interlaced output: only data for field 0 is written to the OUTBUF Pointer.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FIELD1</name>
                  <description>Interlaced output: only data for field 1 is written to the OUTBUF2 Pointer.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>INTERLACED</name>
                  <description>Interlaced output: data for field 0 is written to OUTBUF and data for field 1 is written to OUTBUF2.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>13</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>ALPHA_OUTPUT</name>
              <description>Indicates that alpha component in output buffer pixels should be overwritten by REG_OUT_CTRL[ALPHA] register</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ALPHA</name>
              <description>When generating an output buffer with an alpha component, the value in this field will be used when enabled to override the alpha passed through the pixel data pipeline</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_OUT_BUF</name>
          <description>Output Frame Buffer Pointer</description>
          <addressOffset>0x30</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ADDR</name>
              <description>Current address pointer for the output frame buffer</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_OUT_BUF2</name>
          <description>Output Frame Buffer Pointer #2</description>
          <addressOffset>0x40</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ADDR</name>
              <description>Current address pointer for the output frame buffer</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_OUT_PITCH</name>
          <description>Output Buffer Pitch</description>
          <addressOffset>0x50</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>PITCH</name>
              <description>Indicates the number of bytes in memory between two vertically adjacent pixels.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_OUT_LRC</name>
          <description>Output Surface Lower Right Coordinate</description>
          <addressOffset>0x60</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>Y</name>
              <description>Indicates the number of vertical PIXELS in the output surface (non-rotated)</description>
              <bitOffset>0</bitOffset>
              <bitWidth>14</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>X</name>
              <description>Indicates number of horizontal PIXELS in the output surface (non-rotated)</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>14</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_OUT_PS_ULC</name>
          <description>Processed Surface Upper Left Coordinate</description>
          <addressOffset>0x70</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>Y</name>
              <description>This field indicates the upper left Y-coordinate (in pixels) of the processed surface in the output buffer</description>
              <bitOffset>0</bitOffset>
              <bitWidth>14</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>X</name>
              <description>This field indicates the upper left X-coordinate (in pixels) of the processed surface (PS) in the output buffer</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>14</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_OUT_PS_LRC</name>
          <description>Processed Surface Lower Right Coordinate</description>
          <addressOffset>0x80</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>Y</name>
              <description>This field indicates the lower right Y-coordinate (in pixels) of the processed surface in the output frame buffer</description>
              <bitOffset>0</bitOffset>
              <bitWidth>14</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>X</name>
              <description>This field indicates the lower right X-coordinate (in pixels) of the processed surface (PS) in the output frame buffer</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>14</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_OUT_AS_ULC</name>
          <description>Alpha Surface Upper Left Coordinate</description>
          <addressOffset>0x90</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>Y</name>
              <description>This field indicates the upper left Y-coordinate (in pixels) of the alpha surface in the output frame buffer</description>
              <bitOffset>0</bitOffset>
              <bitWidth>14</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>X</name>
              <description>This field indicates the upper left X-coordinate (in pixels) of the alpha surface (AS) in the output frame buffer</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>14</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_OUT_AS_LRC</name>
          <description>Alpha Surface Lower Right Coordinate</description>
          <addressOffset>0xA0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>Y</name>
              <description>This field indicates the lower right Y-coordinate (in pixels) of the alpha surface in the output frame buffer</description>
              <bitOffset>0</bitOffset>
              <bitWidth>14</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>X</name>
              <description>This field indicates the lower right X-coordinate (in pixels) of the alpha surface (AS) in the output frame buffer</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>14</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_PS_CTRL</name>
          <description>Processed Surface (PS) Control Register</description>
          <addressOffset>0xB0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>FORMAT</name>
              <description>PS buffer format. To select between YUV and YCbCr formats, see bit 31 of the CSC1_COEF0 register.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RGB888</name>
                  <description>32-bit pixels (unpacked 24-bit format)</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RGB555</name>
                  <description>16-bit pixels</description>
                  <value>0xC</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RGB444</name>
                  <description>16-bit pixels</description>
                  <value>0xD</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RGB565</name>
                  <description>16-bit pixels</description>
                  <value>0xE</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>YUV1P444</name>
                  <description>32-bit pixels (1-plane XYUV unpacked)</description>
                  <value>0x10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>UYVY1P422</name>
                  <description>16-bit pixels (1-plane U0,Y0,V0,Y1 interleaved bytes)</description>
                  <value>0x12</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>VYUY1P422</name>
                  <description>16-bit pixels (1-plane V0,Y0,U0,Y1 interleaved bytes)</description>
                  <value>0x13</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>Y8</name>
                  <description>8-bit monochrome pixels (1-plane Y luma output)</description>
                  <value>0x14</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>Y4</name>
                  <description>4-bit monochrome pixels (1-plane Y luma, 4 bit truncation)</description>
                  <value>0x15</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>YUV2P422</name>
                  <description>16-bit pixels (2-plane UV interleaved bytes)</description>
                  <value>0x18</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>YUV2P420</name>
                  <description>16-bit pixels (2-plane UV)</description>
                  <value>0x19</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>YVU2P422</name>
                  <description>16-bit pixels (2-plane VU interleaved bytes)</description>
                  <value>0x1A</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>YVU2P420</name>
                  <description>16-bit pixels (2-plane VU)</description>
                  <value>0x1B</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>YUV422</name>
                  <description>16-bit pixels (3-plane format)</description>
                  <value>0x1E</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>YUV420</name>
                  <description>16-bit pixels (3-plane format)</description>
                  <value>0x1F</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>WB_SWAP</name>
              <description>Swap bytes in words. For each 16 bit word, the two bytes will be swapped.</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>DECY</name>
              <description>Verticle pre decimation filter control.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLE</name>
                  <description>Disable pre-decimation filter.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DECY2</name>
                  <description>Decimate PS by 2.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DECY4</name>
                  <description>Decimate PS by 4.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DECY8</name>
                  <description>Decimate PS by 8.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DECX</name>
              <description>Horizontal pre decimation filter control.</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLE</name>
                  <description>Disable pre-decimation filter.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DECX2</name>
                  <description>Decimate PS by 2.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DECX4</name>
                  <description>Decimate PS by 4.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DECX8</name>
                  <description>Decimate PS by 8.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>20</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_PS_BUF</name>
          <description>PS Input Buffer Address</description>
          <addressOffset>0xC0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ADDR</name>
              <description>Address pointer for the PS RGB or Y (luma) input buffer.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_PS_UBUF</name>
          <description>PS U/Cb or 2 Plane UV Input Buffer Address</description>
          <addressOffset>0xD0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ADDR</name>
              <description>Address pointer for the PS U/Cb or 2 plane UV Chroma input buffer.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_PS_VBUF</name>
          <description>PS V/Cr Input Buffer Address</description>
          <addressOffset>0xE0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ADDR</name>
              <description>Address pointer for the PS V/Cr Chroma input buffer.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_PS_PITCH</name>
          <description>Processed Surface Pitch</description>
          <addressOffset>0xF0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>PITCH</name>
              <description>Indicates the number of bytes in memory between two vertically adjacent pixels.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_PS_BACKGROUND_0</name>
          <description>PS Background Color</description>
          <addressOffset>0x100</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>COLOR</name>
              <description>Background color (in 24bpp format) for any pixels not within the buffer range specified by the PS ULC/LRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>24</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_PS_SCALE</name>
          <description>PS Scale Factor Register</description>
          <addressOffset>0x110</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10001000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>XSCALE</name>
              <description>This is a two bit integer and 12 bit fractional representation (##</description>
              <bitOffset>0</bitOffset>
              <bitWidth>15</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>YSCALE</name>
              <description>This is a two bit integer and 12 bit fractional representation (##</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>15</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD2</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_PS_OFFSET</name>
          <description>PS Scale Offset Register</description>
          <addressOffset>0x120</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>XOFFSET</name>
              <description>This is a 12 bit fractional representation (0</description>
              <bitOffset>0</bitOffset>
              <bitWidth>12</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>YOFFSET</name>
              <description>This is a 12 bit fractional representation (0</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>12</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD2</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_PS_CLRKEYLOW_0</name>
          <description>PS Color Key Low</description>
          <addressOffset>0x130</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0xFFFFFF</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>PIXEL</name>
              <description>Low range of color key applied to PS buffer</description>
              <bitOffset>0</bitOffset>
              <bitWidth>24</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_PS_CLRKEYHIGH_0</name>
          <description>PS Color Key High</description>
          <addressOffset>0x140</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>PIXEL</name>
              <description>High range of color key applied to PS buffer</description>
              <bitOffset>0</bitOffset>
              <bitWidth>24</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_AS_CTRL</name>
          <description>Alpha Surface Control</description>
          <addressOffset>0x150</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RSVD0</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>ALPHA_CTRL</name>
              <description>Determines how the alpha value is constructed for this alpha surface</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>Embedded</name>
                  <description>Indicates that the AS pixel alpha value will be used to blend the AS with PS. The ALPHA field is ignored.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>Override</name>
                  <description>Indicates that the value in the ALPHA field should be used instead of the alpha values present in the input pixels.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>Multiply</name>
                  <description>Indicates that the value in the ALPHA field should be used to scale all pixel alpha values. Each pixel alpha is multiplied by the value in the ALPHA field.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ROPs</name>
                  <description>Enable ROPs. The ROP field indicates an operation to be performed on the alpha surface and PS pixels.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ENABLE_COLORKEY</name>
              <description>Indicates that colorkey functionality is enabled for this alpha surface</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>FORMAT</name>
              <description>Indicates the input buffer format for AS.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ARGB8888</name>
                  <description>32-bit pixels with alpha</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RGBA8888</name>
                  <description>32-bit pixels with alpha</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RGB888</name>
                  <description>32-bit pixels without alpha (unpacked 24-bit format)</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ARGB1555</name>
                  <description>16-bit pixels with alpha</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ARGB4444</name>
                  <description>16-bit pixels with alpha</description>
                  <value>0x9</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RGB555</name>
                  <description>16-bit pixels without alpha</description>
                  <value>0xC</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RGB444</name>
                  <description>16-bit pixels without alpha</description>
                  <value>0xD</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RGB565</name>
                  <description>16-bit pixels without alpha</description>
                  <value>0xE</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ALPHA</name>
              <description>Alpha modifier used when the ALPHA_MULTIPLY or ALPHA_OVERRIDE values are programmed in REG_AS_CTRL[ALPHA_CTRL]</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ROP</name>
              <description>Indicates a raster operation to perform when enabled</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>MASKAS</name>
                  <description>AS AND PS</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MASKNOTAS</name>
                  <description>nAS AND PS</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MASKASNOT</name>
                  <description>AS AND nPS</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MERGEAS</name>
                  <description>AS OR PS</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MERGENOTAS</name>
                  <description>nAS OR PS</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MERGEASNOT</name>
                  <description>AS OR nPS</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NOTCOPYAS</name>
                  <description>nAS</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NOT</name>
                  <description>nPS</description>
                  <value>0x7</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NOTMASKAS</name>
                  <description>AS NAND PS</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NOTMERGEAS</name>
                  <description>AS NOR PS</description>
                  <value>0x9</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>XORAS</name>
                  <description>AS XOR PS</description>
                  <value>0xA</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NOTXORAS</name>
                  <description>AS XNOR PS</description>
                  <value>0xB</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ALPHA0_INVERT</name>
              <description>Setting this bit to logic 0 will not alter the alpha0 value</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ALPHA1_INVERT</name>
              <description>Setting this bit to logic 0 will not alter the alpha1 value</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>10</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_AS_BUF</name>
          <description>Alpha Surface Buffer Pointer</description>
          <addressOffset>0x160</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ADDR</name>
              <description>Address pointer for the alpha surface 0 buffer.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_AS_PITCH</name>
          <description>Alpha Surface Pitch</description>
          <addressOffset>0x170</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>PITCH</name>
              <description>Indicates the number of bytes in memory between two vertically adjacent pixels.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_AS_CLRKEYLOW_0</name>
          <description>Overlay Color Key Low</description>
          <addressOffset>0x180</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0xFFFFFF</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>PIXEL</name>
              <description>Low range of RGB color key applied to AS buffer. Each overlay has an independent colorkey enable.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>24</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_AS_CLRKEYHIGH_0</name>
          <description>Overlay Color Key High</description>
          <addressOffset>0x190</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>PIXEL</name>
              <description>High range of RGB color key applied to AS buffer. Each overlay has an independent colorkey enable.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>24</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_CSC1_COEF0</name>
          <description>Color Space Conversion Coefficient Register 0</description>
          <addressOffset>0x1A0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x4000000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>Y_OFFSET</name>
              <description>Two's compliment amplitude offset implicit in the Y data</description>
              <bitOffset>0</bitOffset>
              <bitWidth>9</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>UV_OFFSET</name>
              <description>Two's compliment phase offset implicit for CbCr data</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>9</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>C0</name>
              <description>Two's compliment Y multiplier coefficient. YUV=0x100 (1.000) YCbCr=0x12A (1.164)</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>11</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>BYPASS</name>
              <description>Bypass the CSC unit in the scaling engine</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>YCBCR_MODE</name>
              <description>Set to 1 when performing YCbCr conversion to RGB</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_CSC1_COEF1</name>
          <description>Color Space Conversion Coefficient Register 1</description>
          <addressOffset>0x1B0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x1230208</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>C4</name>
              <description>Two's compliment Blue U/Cb multiplier coefficient. YUV=0x208 (2.032) YCbCr=0x204 (2.017)</description>
              <bitOffset>0</bitOffset>
              <bitWidth>11</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>C1</name>
              <description>Two's compliment Red V/Cr multiplier coefficient. YUV=0x123 (1.140) YCbCr=0x198 (1.596)</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>11</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x1B</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_CSC1_COEF2</name>
          <description>Color Space Conversion Coefficient Register 2</description>
          <addressOffset>0x1C0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x79B076C</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>C3</name>
              <description>Two's compliment Green U/Cb multiplier coefficient. YUV=0x79C (-0.394) YCbCr=0x79C (-0.392)</description>
              <bitOffset>0</bitOffset>
              <bitWidth>11</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>C2</name>
              <description>Two's compliment Green V/Cr multiplier coefficient. YUV=0x76B (-0.581) YCbCr=0x730 (-0.813)</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>11</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x1B</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_CSC2_CTRL</name>
          <description>Color Space Conversion Control Register.</description>
          <addressOffset>0x1D0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x1</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BYPASS</name>
              <description>This bit controls whether the pixels entering the CSC2 unit get converted or not</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CSC_MODE</name>
              <description>This field controls how the CSC unit operates on pixels when the CSC is not bypassed.</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>YUV2RGB</name>
                  <description>Convert from YUV to RGB.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>YCbCr2RGB</name>
                  <description>Convert from YCbCr to RGB.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RGB2YUV</name>
                  <description>Convert from RGB to YUV.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RGB2YCbCr</name>
                  <description>Convert from RGB to YCbCr.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RSVD</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>29</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_CSC2_COEF0</name>
          <description>Color Space Conversion Coefficient Register 0</description>
          <addressOffset>0x1E0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>A1</name>
              <description>Two's compliment coefficient offset</description>
              <bitOffset>0</bitOffset>
              <bitWidth>11</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>A2</name>
              <description>Two's compliment coefficient offset</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>11</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x1B</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_CSC2_COEF1</name>
          <description>Color Space Conversion Coefficient Register 1</description>
          <addressOffset>0x1F0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>A3</name>
              <description>Two's compliment coefficient offset</description>
              <bitOffset>0</bitOffset>
              <bitWidth>11</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>B1</name>
              <description>Two's compliment coefficient offset</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>11</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x1B</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_CSC2_COEF2</name>
          <description>Color Space Conversion Coefficient Register 2</description>
          <addressOffset>0x200</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>B2</name>
              <description>Two's compliment coefficient offset</description>
              <bitOffset>0</bitOffset>
              <bitWidth>11</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>B3</name>
              <description>Two's compliment coefficient offset</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>11</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x1B</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_CSC2_COEF3</name>
          <description>Color Space Conversion Coefficient Register 3</description>
          <addressOffset>0x210</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>C1</name>
              <description>Two's compliment coefficient offset</description>
              <bitOffset>0</bitOffset>
              <bitWidth>11</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>C2</name>
              <description>Two's compliment coefficient offset</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>11</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x1B</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_CSC2_COEF4</name>
          <description>Color Space Conversion Coefficient Register 4</description>
          <addressOffset>0x220</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>C3</name>
              <description>Two's compliment coefficient offset</description>
              <bitOffset>0</bitOffset>
              <bitWidth>11</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>D1</name>
              <description>Two's compliment coefficient integer offset to be added.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>9</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x19</bitOffset>
              <bitWidth>7</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_CSC2_COEF5</name>
          <description>Color Space Conversion Coefficient Register 5</description>
          <addressOffset>0x230</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>D2</name>
              <description>Two's compliment D1 coefficient integer offset to be added.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>9</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>7</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>D3</name>
              <description>Two's compliment coefficient integer offset to be added.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>9</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x19</bitOffset>
              <bitWidth>7</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_LUT_CTRL</name>
          <description>Lookup Table Control Register.</description>
          <addressOffset>0x240</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x80010000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DMA_START</name>
              <description>Setting this bit will result in the DMA operation to load the PXP LUT memory based on REG_LUT_ADDR_NUM_BYTES, REG_LUT_ADDR_ADDR, and REG_LUT_MEM_ADDR</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>7</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>INVALID</name>
              <description>Invalidate the cache LRU and valid bits. This bit will automatically reset when set to a logic 1.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>LRU_UPD</name>
              <description>Least Recently Used Policy Update Control: 1=&gt; block LRU update for hit after miss</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SEL_8KB</name>
              <description>Selects which 8KB bank of memory to use for direct 12bpp lookup modes</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>OUT_MODE</name>
              <description>Select the output mode of operation for the LUT resource</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>Y8</name>
                  <description>R/Y byte lane 2 lookup, bytes 1,0 bypassed.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RGBW4444CFA</name>
                  <description>Byte lane 2 = CFA_Y8, byte lane 1,0 = RGBW4444.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RGB888</name>
                  <description>RGB565-&gt;RGB888 conversion for Gamma correction.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RSVD2</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>LOOKUP_MODE</name>
              <description>Configure the input address for the 16KB LUT memory</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CACHE_RGB565</name>
                  <description>LUT ADDR = R[7:3],G[7:2],B[7:3]. Use all 16KB of LUT for indirect cached 128KB lookup.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DIRECT_Y8</name>
                  <description>LUT ADDR = 16'b0,Y[7:0]. Use only the first 256 bytes of LUT. Only the Y, or third data path byte, is tranformed.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DIRECT_RGB444</name>
                  <description>LUT ADDR = R[7:4],G[7:4],B[7:4]. Use one 8KB bank of LUT selected by SEL_8KB.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DIRECT_RGB454</name>
                  <description>LUT ADDR = R[7:4],G[7:3],B[7:4]. Use all 16KB of LUT.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RSVD3</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>BYPASS</name>
              <description>Setting this bit will bypass the LUT memory resource completely</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_LUT_ADDR</name>
          <description>Lookup Table Control Register.</description>
          <addressOffset>0x250</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ADDR</name>
              <description>LUT indexed address pointer</description>
              <bitOffset>0</bitOffset>
              <bitWidth>14</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>NUM_BYTES</name>
              <description>Indicates the number of bytes to load via a DMA operation</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>15</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD2</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_LUT_DATA</name>
          <description>Lookup Table Data Register.</description>
          <addressOffset>0x260</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA</name>
              <description>Writing this field will load 4 bytes, aligned to four byte boundaries, of data indexed by the ADDR field of the REG_LUT_CTRL register</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_LUT_EXTMEM</name>
          <description>Lookup Table External Memory Address Register.</description>
          <addressOffset>0x270</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ADDR</name>
              <description>This register contains the external memory address used for LUT memory operation.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_CFA</name>
          <description>Color Filter Array Register.</description>
          <addressOffset>0x280</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA</name>
              <description>This register contains the Color Filter Array pattern for decimation of RGBW4444 16 bit pixels to individual R, G, B, W values</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_ALPHA_A_CTRL</name>
          <description>PXP Alpha Engine A Control Register.</description>
          <addressOffset>0x290</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>POTER_DUFF_ENABLE</name>
              <description>poter_duff enable</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>porter duff disable.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>porter duff enable.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>S0_S1_FACTOR_MODE</name>
              <description>s0 to s1 factor mode</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>using 1.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>using 0.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>2</name>
                  <description>using straight alpha.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>3</name>
                  <description>using inverse alpha.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>S0_GLOBAL_ALPHA_MODE</name>
              <description>s0 global alpha mode</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>using global alpha.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>using local alpha.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>2</name>
                  <description>using scaled alpha.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>3</name>
                  <description>using scaled alpha.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>S0_ALPHA_MODE</name>
              <description>s0 alpha mode</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>straight mode for s0 alpha</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>inversed mode for s0 alpha</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>S0_COLOR_MODE</name>
              <description>s0 color mode</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>straight mode for s0 color</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>multiply mode for s0 color</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>S1_S0_FACTOR_MODE</name>
              <description>s1 to s0 factor mode</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>using 1.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>using 0.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>2</name>
                  <description>using straight alpha.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>3</name>
                  <description>using inverse alpha.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>S1_GLOBAL_ALPHA_MODE</name>
              <description>s1 global alpha mode</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>using global alpha.</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>S1_ALPHA_MODE</name>
              <description>s1 alpha mode</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>straight mode for s1 alpha</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>inversed mode for s1 alpha</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>S1_COLOR_MODE</name>
              <description>s1 color mode</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>straight mode for s1 color</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>multiply mode for s1 color</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>S0_GLOBAL_ALPHA</name>
              <description>s0 global alpha</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>S1_GLOBAL_ALPHA</name>
              <description>s1 global alpha</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_ALPHA_B_CTRL</name>
          <description>PXP Alpha Engine B Control Register.</description>
          <addressOffset>0x2A0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>POTER_DUFF_ENABLE</name>
              <description>poter_duff enable</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>porter duff disable.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>porter duff enable.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>S0_S1_FACTOR_MODE</name>
              <description>s0 to s1 factor mode</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>using 1.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>using 0.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>2</name>
                  <description>using straight alpha.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>3</name>
                  <description>using inverse alpha.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>S0_GLOBAL_ALPHA_MODE</name>
              <description>s0 global alpha mode</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>using global alpha.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>using local alpha.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>2</name>
                  <description>using scaled alpha.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>3</name>
                  <description>using scaled alpha.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>S0_ALPHA_MODE</name>
              <description>s0 alpha mode</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>straight mode for s0 alpha</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>inversed mode for s0 alpha</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>S0_COLOR_MODE</name>
              <description>s0 color mode</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>straight mode for s0 color</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>multiply mode for s0 color</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>S1_S0_FACTOR_MODE</name>
              <description>s1 to s0 factor mode</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>using 1.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>using 0.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>2</name>
                  <description>using straight alpha.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>3</name>
                  <description>using inverse alpha.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>S1_GLOBAL_ALPHA_MODE</name>
              <description>s1 global alpha mode</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>using global alpha.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>using local alpha.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>2</name>
                  <description>using scaled alpha.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>3</name>
                  <description>using scaled alpha.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>S1_ALPHA_MODE</name>
              <description>s1 alpha mode</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>straight mode for s1 alpha</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>inversed mode for s1 alpha</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>S1_COLOR_MODE</name>
              <description>s1 color mode</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>straight mode for s1 color</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>multiply mode for s1 color</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>S0_GLOBAL_ALPHA</name>
              <description>s0 global alpha</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>S1_GLOBAL_ALPHA</name>
              <description>s1 global alpha</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_ALPHA_B_CTRL_1</name>
          <description>no description available</description>
          <addressOffset>0x2B0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ROP_ENABLE</name>
              <description>ROP ENABLE</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>OL_CLRKEY_ENABLE</name>
              <description>Indicates that colorkey functionality is enabled for this alpha surface</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>ROP</name>
              <description>Indicates a raster operation to perform when enabled.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>MASKAS</name>
                  <description>AS AND PS</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MASKNOTAS</name>
                  <description>nAS AND PS</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MASKASNOT</name>
                  <description>AS AND nPS</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MERGEAS</name>
                  <description>AS OR PS</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MERGENOTAS</name>
                  <description>nAS OR PS</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MERGEASNOT</name>
                  <description>AS OR nPS</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NOTCOPYAS</name>
                  <description>nAS</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NOT</name>
                  <description>nPS</description>
                  <value>0x7</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NOTMASKAS</name>
                  <description>AS NAND PS</description>
                  <value>0x8</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NOTMERGEAS</name>
                  <description>AS NOR PS</description>
                  <value>0x9</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>XORAS</name>
                  <description>AS XOR PS</description>
                  <value>0xA</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NOTXORAS</name>
                  <description>AS XNOR PS</description>
                  <value>0xB</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>24</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_PS_BACKGROUND_1</name>
          <description>PS Background Color 1</description>
          <addressOffset>0x2C0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>COLOR</name>
              <description>Background color (in 24bpp format) for any pixels not within the buffer range specified by the PS ULC/LRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>24</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_PS_CLRKEYLOW_1</name>
          <description>PS Color Key Low 1</description>
          <addressOffset>0x2D0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0xFFFFFF</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>PIXEL</name>
              <description>Low range of color key applied to PS buffer</description>
              <bitOffset>0</bitOffset>
              <bitWidth>24</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_PS_CLRKEYHIGH_1</name>
          <description>PS Color Key High 1</description>
          <addressOffset>0x2E0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>PIXEL</name>
              <description>High range of color key applied to PS buffer</description>
              <bitOffset>0</bitOffset>
              <bitWidth>24</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_AS_CLRKEYLOW_1</name>
          <description>Overlay Color Key Low</description>
          <addressOffset>0x2F0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0xFFFFFF</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>PIXEL</name>
              <description>Low range of RGB color key applied to AS buffer. Each overlay has an independent colorkey enable.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>24</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_AS_CLRKEYHIGH_1</name>
          <description>Overlay Color Key High</description>
          <addressOffset>0x300</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>PIXEL</name>
              <description>High range of RGB color key applied to AS buffer. Each overlay has an independent colorkey enable.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>24</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_CTRL2</name>
          <description>Control Register 2</description>
          <addressOffset>0x310</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ENABLE</name>
              <description>Enables PXP secondary data processing flow with specified parameters</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>7</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>ROTATE0</name>
              <description>Indicates the clockwise rotation to be applied at the output buffer</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ROT_0</name>
                  <description>no description available</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ROT_90</name>
                  <description>no description available</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ROT_180</name>
                  <description>no description available</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ROT_270</name>
                  <description>no description available</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HFLIP0</name>
              <description>Indicates that the output buffer should be flipped horizontally (effect applied before rotation).</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>VFLIP0</name>
              <description>Indicates that the output buffer should be flipped vertically (effect applied before rotation).</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ROTATE1</name>
              <description>Indicates the clockwise rotation to be applied at the input buffer</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ROT_0</name>
                  <description>no description available</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ROT_90</name>
                  <description>no description available</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ROT_180</name>
                  <description>no description available</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ROT_270</name>
                  <description>no description available</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HFLIP1</name>
              <description>Indicates that the input should be flipped horizontally (effect applied before rotation).</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>VFLIP1</name>
              <description>Indicates that the input should be flipped vertically (effect applied before rotation).</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>ENABLE_DITHER</name>
              <description>Enable the Dithering engine in the PXP secondary processing flow.</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENABLE_WFE_A</name>
              <description>Enable the WFE-A engine in the PXP secondary processing flow.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENABLE_WFE_B</name>
              <description>Enable the WFE-B engine in the PXP secondary processing flow.</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENABLE_INPUT_FETCH_STORE</name>
              <description>Enable the Input Fetch and Store engine in the PXP secondary processing flow.</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENABLE_ALPHA_B</name>
              <description>Enable the Alpha-B engine in the PXP secondary processing flow.</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD2</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>BLOCK_SIZE</name>
              <description>Select the block size to process through the Rotate block.</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>8X8</name>
                  <description>Process 8x8 pixel blocks.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>16X16</name>
                  <description>Process 16x16 pixel blocks.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ENABLE_CSC2</name>
              <description>Enable the CSC2 engine in the PXP secondary processing flow.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENABLE_LUT</name>
              <description>Enable the LUT engine in the PXP secondary processing flow.</description>
              <bitOffset>0x19</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENABLE_ROTATE0</name>
              <description>Enable the ROTATE0 engine in the PXP secondary processing flow.</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENABLE_ROTATE1</name>
              <description>Enable the ROTATE1 engine in the PXP secondary processing flow.</description>
              <bitOffset>0x1B</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD3</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_POWER_REG0</name>
          <description>PXP Power Control Register.</description>
          <addressOffset>0x320</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>LUT_LP_STATE_WAY0_BANK0</name>
              <description>Select the low power state of the LUT's WAY0-BANK0 memory.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NONE</name>
                  <description>Memory is not in low power state.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LS</name>
                  <description>Light Sleep Mode. Low leakage mode, maintain memory contents.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DS</name>
                  <description>Deep Sleep Mode. Low leakage mode, maintain memory contents.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SD</name>
                  <description>Shut Down Mode. Shut Down periphery and core, no memory retention.</description>
                  <value>0x4</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>LUT_LP_STATE_WAY0_BANKN</name>
              <description>Select the low power state of the LUT's WAY0-BANK1,2,3 memory.</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NONE</name>
                  <description>Memory is not in low power state.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LS</name>
                  <description>Light Sleep Mode. Low leakage mode, maintain memory contents.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DS</name>
                  <description>Deep Sleep Mode. Low leakage mode, maintain memory contents.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SD</name>
                  <description>Shut Down Mode. Shut Down periphery and core, no memory retention.</description>
                  <value>0x4</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>LUT_LP_STATE_WAY1_BANKN</name>
              <description>Select the low power state of the LUT's WAY0-BANK0,1,2,3 memory.</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NONE</name>
                  <description>Memory is not in low power state.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LS</name>
                  <description>Light Sleep Mode. Low leakage mode, maintain memory contents.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DS</name>
                  <description>Deep Sleep Mode. Low leakage mode, maintain memory contents.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SD</name>
                  <description>Shut Down Mode. Shut Down periphery and core, no memory retention.</description>
                  <value>0x4</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ROT0_MEM_LP_STATE</name>
              <description>Select the low power state of the ROT 0 memory.</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NONE</name>
                  <description>Memory is not in low power state.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LS</name>
                  <description>Light Sleep Mode. Low leakage mode, maintain memory contents.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DS</name>
                  <description>Deep Sleep Mode. Low leakage mode, maintain memory contents.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SD</name>
                  <description>Shut Down Mode. Shut Down periphery and core, no memory retention.</description>
                  <value>0x4</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CTRL</name>
              <description>This register contains power control for the PXP.</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>20</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_POWER_REG1</name>
          <description>PXP Power Control Register 1.</description>
          <addressOffset>0x330</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ROT1_MEM_LP_STATE</name>
              <description>Select the low power state of the ROT 1 memory.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NONE</name>
                  <description>Memory is not in low power state.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LS</name>
                  <description>Light Sleep Mode. Low leakage mode, maintain memory contents.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DS</name>
                  <description>Deep Sleep Mode. Low leakage mode, maintain memory contents.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SD</name>
                  <description>Shut Down Mode. Shut Down periphery and core, no memory retention.</description>
                  <value>0x4</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DITH0_LUT_MEM_LP_STATE</name>
              <description>Select the low power state of the dither0 LUT memory.</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NONE</name>
                  <description>Memory is not in low power state.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LS</name>
                  <description>Light Sleep Mode. Low leakage mode, maintain memory contents.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DS</name>
                  <description>Deep Sleep Mode. Low leakage mode, maintain memory contents.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SD</name>
                  <description>Shut Down Mode. Shut Down periphery and core, no memory retention.</description>
                  <value>0x4</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DITH0_ERR0_MEM_LP_STATE</name>
              <description>Select the low power state of the dither0 ERR0 memory.</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NONE</name>
                  <description>Memory is not in low power state.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LS</name>
                  <description>Light Sleep Mode. Low leakage mode, maintain memory contents.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DS</name>
                  <description>Deep Sleep Mode. Low leakage mode, maintain memory contents.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SD</name>
                  <description>Shut Down Mode. Shut Down periphery and core, no memory retention.</description>
                  <value>0x4</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DITH0_ERR1_MEM_LP_STATE</name>
              <description>Select the low power state of the dither0 ERR1 memory.</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NONE</name>
                  <description>Memory is not in low power state.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LS</name>
                  <description>Light Sleep Mode. Low leakage mode, maintain memory contents.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DS</name>
                  <description>Deep Sleep Mode. Low leakage mode, maintain memory contents.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SD</name>
                  <description>Shut Down Mode. Shut Down periphery and core, no memory retention.</description>
                  <value>0x4</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DITH1_LUT_MEM_LP_STATE</name>
              <description>Select the low power state of the dither1 LUT memory.</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NONE</name>
                  <description>Memory is not in low power state.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LS</name>
                  <description>Light Sleep Mode. Low leakage mode, maintain memory contents.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DS</name>
                  <description>Deep Sleep Mode. Low leakage mode, maintain memory contents.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SD</name>
                  <description>Shut Down Mode. Shut Down periphery and core, no memory retention.</description>
                  <value>0x4</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DITH2_LUT_MEM_LP_STATE</name>
              <description>Select the low power state of the dither2 LUT memory.</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NONE</name>
                  <description>Memory is not in low power state.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LS</name>
                  <description>Light Sleep Mode. Low leakage mode, maintain memory contents.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DS</name>
                  <description>Deep Sleep Mode. Low leakage mode, maintain memory contents.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SD</name>
                  <description>Shut Down Mode. Shut Down periphery and core, no memory retention.</description>
                  <value>0x4</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ALU_A_MEM_LP_STATE</name>
              <description>Select the low power state of the ALU A memory.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NONE</name>
                  <description>Memory is not in low power state.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LS</name>
                  <description>Light Sleep Mode. Low leakage mode, maintain memory contents.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DS</name>
                  <description>Deep Sleep Mode. Low leakage mode, maintain memory contents.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SD</name>
                  <description>Shut Down Mode. Shut Down periphery and core, no memory retention.</description>
                  <value>0x4</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ALU_B_MEM_LP_STATE</name>
              <description>Select the low power state of the ALU B memory.</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NONE</name>
                  <description>Memory is not in low power state.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LS</name>
                  <description>Light Sleep Mode. Low leakage mode, maintain memory contents.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DS</name>
                  <description>Deep Sleep Mode. Low leakage mode, maintain memory contents.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SD</name>
                  <description>Shut Down Mode. Shut Down periphery and core, no memory retention.</description>
                  <value>0x4</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RSVD0</name>
              <description>This register contains power control for the PXP.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_DATA_PATH_CTRL1</name>
          <description>no description available</description>
          <addressOffset>0x350</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX16_SEL</name>
              <description>This mux chooses the data path through MUX 16.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Output of ALU A Engine</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>histogram_pixel output from output</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>2</name>
                  <description>Output of ALU B Engine</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>3</name>
                  <description>No output</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>MUX17_SEL</name>
              <description>This field chooses the data path through MUX 17.</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Output of ALU A</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Output of ALU B</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>2</name>
                  <description>No output</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>3</name>
                  <description>No Output</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved. This field always reads 0.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>28</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_INIT_MEM_CTRL</name>
          <description>Initialize memory buffer control Register</description>
          <addressOffset>0x360</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ADDR</name>
              <description>Base address to start writing</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>11</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>SELECT</name>
              <description>Select which memory to write.</description>
              <bitOffset>0x1B</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DITHER0_LUT</name>
                  <description>Select the LUT memory for access</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DITHER0_ERR0</name>
                  <description>Select the ERR0 memory for access</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DITHER0_ERR1</name>
                  <description>Select the ERR1 memory for access</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DITHER1_LUT</name>
                  <description>Select the LUT memory for access</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DITHER2_LUT</name>
                  <description>Select the LUT memory for access</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALU_A</name>
                  <description>Select the ALU instr memory for access</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ALU_B</name>
                  <description>Select the ALU instr memory for access</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WFE_A_FETCH</name>
                  <description>Select the WFE-A fetch memory for access</description>
                  <value>0x7</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>WFE_B_FETCH</name>
                  <description>Select the WFE-B fetch memory for access</description>
                  <value>0x8</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>START</name>
              <description>Enable writing to the memory.</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_INIT_MEM_DATA</name>
          <description>Write data Register</description>
          <addressOffset>0x370</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA</name>
              <description>Data value to be written to the memory</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_INIT_MEM_DATA_HIGH</name>
          <description>Write data Register</description>
          <addressOffset>0x380</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA</name>
              <description>Data value to be written to the most significant 32 bits of the fetch memories</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_IRQ_MASK</name>
          <description>PXP IRQ Mask Register</description>
          <addressOffset>0x390</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>FIRST_CH0_PREFETCH_IRQ_EN</name>
              <description>Enable First ch0 prefetch engine interrupt detection</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>FIRST_CH1_PREFETCH_IRQ_EN</name>
              <description>Enable First ch1 prefetch engine interrupt detection</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>FIRST_CH0_STORE_IRQ_EN</name>
              <description>Enable First ch0 store engine interrupt detection</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>FIRST_CH1_STORE_IRQ_EN</name>
              <description>Enable First ch1 store engine interrupt detection</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DITHER_CH0_PREFETCH_IRQ_EN</name>
              <description>Enable Dither ch0 prefetch engine interrupt detection</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DITHER_CH1_PREFETCH_IRQ_EN</name>
              <description>Enable Dither ch1 prefetch engine interrupt detection</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DITHER_CH0_STORE_IRQ_EN</name>
              <description>Enable dither ch0 store engine interrupt detection.</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DITHER_CH1_STORE_IRQ_EN</name>
              <description>Enable dither ch1 store engine interrupt detection.</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>WFE_A_CH0_STORE_IRQ_EN</name>
              <description>Enable WFE A ch0 store engine interrupt detection.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>WFE_A_CH1_STORE_IRQ_EN</name>
              <description>Enable WFE A ch1 store engine interrupt detection.</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>WFE_B_CH0_STORE_IRQ_EN</name>
              <description>Enable WFE B ch0 store engine interrupt detection.</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>WFE_B_CH1_STORE_IRQ_EN</name>
              <description>Enable WFE B ch1 store engine interrupt detection.</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>FIRST_STORE_IRQ_EN</name>
              <description>Enable First store engine interrupt detection</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DITHER_STORE_IRQ_EN</name>
              <description>Enable dither store engine interrupt detection.</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>WFE_A_STORE_IRQ_EN</name>
              <description>Enable WFE A store engine interrupt detection.</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>WFE_B_STORE_IRQ_EN</name>
              <description>Enable WFE B store engine interrupt detection.</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>15</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>COMPRESS_DONE_IRQ_EN</name>
              <description>Enable compression done interrupt detection.</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_IRQ</name>
          <description>PXP Interrupt Register</description>
          <addressOffset>0x3A0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>FIRST_CH0_PREFETCH_IRQ</name>
              <description>Initial ch0 prefetch engine interrupt</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>FIRST_CH1_PREFETCH_IRQ</name>
              <description>Initial ch1 prefetch engine interrupt</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>FIRST_CH0_STORE_IRQ</name>
              <description>Initial ch0 store engine interrupt</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>FIRST_CH1_STORE_IRQ</name>
              <description>Initial ch1 store engine interrupt</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DITHER_CH0_PREFETCH_IRQ</name>
              <description>Dither ch0 prefetch engine interrupt</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DITHER_CH1_PREFETCH_IRQ</name>
              <description>Dither ch1 prefetch engine interrupt</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DITHER_CH0_STORE_IRQ</name>
              <description>Dither ch0 store engine Interrupt</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DITHER_CH1_STORE_IRQ</name>
              <description>Dither ch1 store engine Interrupt</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>WFE_A_CH0_STORE_IRQ</name>
              <description>WFE A ch0 store engine Interrupt.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>WFE_A_CH1_STORE_IRQ</name>
              <description>WFE A ch1 store engine Interrupt.</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>WFE_B_CH0_STORE_IRQ</name>
              <description>WFE B ch0 store engine Interrupt</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>WFE_B_CH1_STORE_IRQ</name>
              <description>WFE B ch1 store engine Interrupt</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>FIRST_STORE_IRQ</name>
              <description>Initial store engine interrupt</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DITHER_STORE_IRQ</name>
              <description>Dither store engine Interrupt</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>WFE_A_STORE_IRQ</name>
              <description>WFE A store engine Interrupt.</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>WFE_B_STORE_IRQ</name>
              <description>WFE B store engine Interrupt</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>15</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>COMPRESS_DONE_IRQ</name>
              <description>compression done Interrupt</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_NEXT</name>
          <description>Next Frame Pointer</description>
          <addressOffset>0x400</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ENABLED</name>
              <description>Indicates that the &quot;next frame&quot; functionality has been enabled</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>RSVD</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>POINTER</name>
              <description>A pointer to a data structure containing register values to be used when processing the next frame</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>30</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_INPUT_FETCH_CTRL_CH0</name>
          <description>Pre-fetch engine Control Channel 0 Register</description>
          <addressOffset>0x450</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x20000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>CH_EN</name>
              <description>Channel enable.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Prefetch function is disable</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Prefetch function is enable</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BLOCK_EN</name>
              <description>Choses the prefetch mode.</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Prefetch in scan mode</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Prefetch in block mode</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BLOCK_16</name>
              <description>Determines the block sixe.</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>8x8</name>
                  <description>Block size is 8x8</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>16x16</name>
                  <description>Block size is 16x16</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HANDSHAKE_EN</name>
              <description>Enable bit for handshake with the store engine.</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Handshake with the store engine is disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Handshake with the store engine is enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BYPASS_PIXEL_EN</name>
              <description>Selects Channel 0 pixel source</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Channel 0 is from memory</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Channel 0 is from previous process engine</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HIGH_BYTE</name>
              <description>channel 0 high byte selection</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>In 64 bit mode, the output high byte will use channel1.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>In 64 bit mode, the output high byte will use channel0</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RSVD4</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>HFLIP</name>
              <description>Enables HFLIP.</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>HFLIP disable</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>VFLIP enable</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>VFLIP</name>
              <description>Enables VFLIP</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>VFLIP disable</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>VFLIP enable</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RSVD3</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>ROTATION_ANGLE</name>
              <description>no description available</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ROT_0</name>
                  <description>Rotate image by 0 degrees.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ROT_90</name>
                  <description>Rotate image by 90 degrees.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ROT_180</name>
                  <description>Rotate image by 180 degrees.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ROT_270</name>
                  <description>Rotate image by 270 degrees.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RSVD2</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>RD_NUM_BYTES</name>
              <description>Bytes in a read burst</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>8_bytes</name>
                  <description>8 bytes.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>16_bytes</name>
                  <description>16 bytes.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>32_bytes</name>
                  <description>32 bytes.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>64_bytes</name>
                  <description>64 bytes.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>HANDSHAKE_SCAN_LINE_NUM</name>
              <description>scan handshake line number</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>1 line.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>8 lines</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>2</name>
                  <description>16 lines</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>3</name>
                  <description>16 lines</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>ARBIT_EN</name>
              <description>Enables Arbitration</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Arbitration disable. If using 2 channels, will output 2 axi bus sets.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Arbitration enable. If using 2 channel, will only output 1 axi bus sets</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_INPUT_FETCH_CTRL_CH1</name>
          <description>Pre-fetch engine Control Channel 1 Register</description>
          <addressOffset>0x460</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x20000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>CH_EN</name>
              <description>Channel enable.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>prefetch function is disable</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>prefetch function is enable</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BLOCK_EN</name>
              <description>Choses the prefetch mode.</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Prefetch in scan mode</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Prefetch in block mode</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BLOCK_16</name>
              <description>Determines the block sixe.</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>8x8</name>
                  <description>Block size is 8x8</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>16x16</name>
                  <description>Block size is 16x16</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HANDSHAKE_EN</name>
              <description>Enable bit for handshake with the store engine.</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Handshake with the store engine is disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Handshake with the store engine is enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BYPASS_PIXEL_EN</name>
              <description>Selects Channel 1 pixel source</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Channel 1 is from memory</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Channel 1 is from previous process engine</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RSVD4</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>HFLIP</name>
              <description>Enables HFLIP.</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>HFLIP disable</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>VFLIP enable</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>VFLIP</name>
              <description>Enables VFLIP</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>VFLIP disable</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>VFLIP enable</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RSVD3</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>ROTATION_ANGLE</name>
              <description>no description available</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ROT_0</name>
                  <description>Rotate image by 0 degrees.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ROT_90</name>
                  <description>Rotate image by 90 degrees.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ROT_180</name>
                  <description>Rotate image by 180 degrees.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ROT_270</name>
                  <description>Rotate image by 270 degrees.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RSVD2</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>RD_NUM_BYTES</name>
              <description>Bytes in a read burst</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>8_bytes</name>
                  <description>8 bytes.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>16_bytes</name>
                  <description>16 bytes.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>32_bytes</name>
                  <description>32 bytes.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>64_bytes</name>
                  <description>64 bytes.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>HANDSHAKE_SCAN_LINE_NUM</name>
              <description>scan handshake line number</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>1 line.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>8 lines</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>2</name>
                  <description>16 lines</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>3</name>
                  <description>16 lines</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_INPUT_FETCH_STATUS_CH0</name>
          <description>Pre-fetch engine status Channel 0 Register</description>
          <addressOffset>0x470</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>PREFETCH_BLOCK_X</name>
              <description>When in scan mode, this field is always 0</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>PREFETCH_BLOCK_Y</name>
              <description>When in scan mode, this field indicates the current Y coordinate of the frame</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_INPUT_FETCH_STATUS_CH1</name>
          <description>Store engine status Channel 1 Register</description>
          <addressOffset>0x480</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>PREFETCH_BLOCK_X</name>
              <description>When in scan mode, this field is always 0</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>PREFETCH_BLOCK_Y</name>
              <description>When in scan mode, this field indicates the current Y coordinate of the frame</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_INPUT_FETCH_ACTIVE_SIZE_ULC_CH0</name>
          <description>no description available</description>
          <addressOffset>0x490</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ACTIVE_SIZE_ULC_X</name>
              <description>This field indicates the upper left X-coordinate(in pixels) of the active surface of the total input memory</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ACTIVE_SIZE_ULC_Y</name>
              <description>This field indicates the upper left Y-coordinate(in pixels) of the active surface of the total input memory</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_INPUT_FETCH_ACTIVE_SIZE_LRC_CH0</name>
          <description>no description available</description>
          <addressOffset>0x4A0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ACTIVE_SIZE_LRC_X</name>
              <description>This field indicates the upper left X-coordinate(in pixels) of the active surface of the total input memory</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ACTIVE_SIZE_LRC_Y</name>
              <description>This field indicates the upper left Y-coordinate(in pixels) of the active surface of the total input memory</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_INPUT_FETCH_ACTIVE_SIZE_ULC_CH1</name>
          <description>no description available</description>
          <addressOffset>0x4B0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ACTIVE_SIZE_ULC_X</name>
              <description>This field indicates the upper left X-coordinate(in pixels) of the active surface of the total input memory</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ACTIVE_SIZE_ULC_Y</name>
              <description>This field indicates the upper left Y-coordinate(in pixels) of the active surface of the total input memory</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_INPUT_FETCH_ACTIVE_SIZE_LRC_CH1</name>
          <description>no description available</description>
          <addressOffset>0x4C0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ACTIVE_SIZE_LRC_X</name>
              <description>This field indicates the upper left X-coordinate(in pixels) of the active surface of the total input memory</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ACTIVE_SIZE_LRC_Y</name>
              <description>This field indicates the upper left Y-coordinate(in pixels) of the active surface of the total input memory</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_INPUT_FETCH_SIZE_CH0</name>
          <description>no description available</description>
          <addressOffset>0x4D0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>INPUT_TOTAL_WIDTH</name>
              <description>actual total width -1</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>INPUT_TOTAL_HEIGHT</name>
              <description>actual total height - 1</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_INPUT_FETCH_SIZE_CH1</name>
          <description>no description available</description>
          <addressOffset>0x4E0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>INPUT_TOTAL_WIDTH</name>
              <description>actual total width -1</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>INPUT_TOTAL_HEIGHT</name>
              <description>actual total height -1</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_INPUT_FETCH_BACKGROUND_COLOR_CH0</name>
          <description>no description available</description>
          <addressOffset>0x4F0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BACKGROUND_COLOR</name>
              <description>background color(in 32bpp format) for any pixels not within the bufffer range specified by the ULC/LRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_INPUT_FETCH_BACKGROUND_COLOR_CH1</name>
          <description>no description available</description>
          <addressOffset>0x500</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BACKGROUND_COLOR</name>
              <description>background color(in 32bpp format) for any pixels not within the bufffer range specified by the ULC/LRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_INPUT_FETCH_PITCH</name>
          <description>no description available</description>
          <addressOffset>0x510</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>CH0_INPUT_PITCH</name>
              <description>This field indicates the channel 0 input pitch</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH1_INPUT_PITCH</name>
              <description>This field indicates the channel 1 input pitch</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_INPUT_FETCH_SHIFT_CTRL_CH0</name>
          <description>no description available</description>
          <addressOffset>0x520</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x1000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>INPUT_ACTIVE_BPP</name>
              <description>no description available</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>8 bits</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>16 bits</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>2</name>
                  <description>32 bits</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>3</name>
                  <description>32 bits</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>EXPAND_FORMAT</name>
              <description>Select Pixel format</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>RGB 565</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>RGB 555</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>2</name>
                  <description>ARGB 1555</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>3</name>
                  <description>RGB 444</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>4</name>
                  <description>ARGB 4444</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>5</name>
                  <description>YUYV/YVYU</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>6</name>
                  <description>UYVY/VYUY</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>7</name>
                  <description>YUV422_2P</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>EXPAND_EN</name>
              <description>no description available</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>channel0 format expanding disable</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>channel0 format expanding enable</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SHIFT_BYPASS</name>
              <description>no description available</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>channel0 data will do shift function</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>channel0 will bypass shift function</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>19</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_INPUT_FETCH_SHIFT_CTRL_CH1</name>
          <description>no description available</description>
          <addressOffset>0x530</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x1000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>INPUT_ACTIVE_BPP</name>
              <description>no description available</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>8 bits</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>16 bits</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>2</name>
                  <description>32 bits</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>3</name>
                  <description>32 bits</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>EXPAND_FORMAT</name>
              <description>Select Pixel format</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>RGB 565</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>RGB 555</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>2</name>
                  <description>ARGB 1555</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>3</name>
                  <description>RGB 444</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>4</name>
                  <description>ARGB 4444</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>5</name>
                  <description>YUYV/YVYU</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>6</name>
                  <description>UYVY/VYUY</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>7</name>
                  <description>YUV422_2P</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>EXPAND_EN</name>
              <description>no description available</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>channel1 format expanding disable</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>channel1 format expanding enable</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SHIFT_BYPASS</name>
              <description>no description available</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>channel1 data will do shift function</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>channel1 will bypass shift function</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>19</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_INPUT_FETCH_SHIFT_OFFSET_CH0</name>
          <description>no description available</description>
          <addressOffset>0x540</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>OFFSET0</name>
              <description>Shift Offset for channel 0 componnent 0.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD3</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>OFFSET1</name>
              <description>Shift Offset for channel 0 componnent 1.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD2</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>OFFSET2</name>
              <description>Shift Offset for channel 0 componnent 2.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>OFFSET3</name>
              <description>Shift Offset for channel 0 componnent 3.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_INPUT_FETCH_SHIFT_OFFSET_CH1</name>
          <description>no description available</description>
          <addressOffset>0x550</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>OFFSET0</name>
              <description>Shift Offset for channel 1 componnent 0.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD3</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>OFFSET1</name>
              <description>Shift Offset for channel 1 componnent 1.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD2</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>OFFSET2</name>
              <description>Shift Offset for channel 1 componnent 2.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>OFFSET3</name>
              <description>Shift Offset for channel 1 componnent 3.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_INPUT_FETCH_SHIFT_WIDTH_CH0</name>
          <description>no description available</description>
          <addressOffset>0x560</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x8888</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>WIDTH0</name>
              <description>Shift Width for channel 0 componnent 0.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>WIDTH1</name>
              <description>Shift Width for channel 0 componnent 1.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>WIDTH2</name>
              <description>Shift Width for channel 0 componnent 2.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>WIDTH3</name>
              <description>Shift Width for channel 0 componnent 3.</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_INPUT_FETCH_SHIFT_WIDTH_CH1</name>
          <description>no description available</description>
          <addressOffset>0x570</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x8888</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>WIDTH0</name>
              <description>Shift Width for channel 1 componnent 0.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>WIDTH1</name>
              <description>Shift Width for channel 1 componnent 1.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>WIDTH2</name>
              <description>Shift Width for channel 1 componnent 2.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>WIDTH3</name>
              <description>Shift Width for channel 1 componnent 3.</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_INPUT_FETCH_ADDR_0_CH0</name>
          <description>no description available</description>
          <addressOffset>0x580</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>INPUT_BASE_ADDR0</name>
              <description>input base address0</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_INPUT_FETCH_ADDR_1_CH0</name>
          <description>no description available</description>
          <addressOffset>0x590</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>INPUT_BASE_ADDR1</name>
              <description>input base address1</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_INPUT_FETCH_ADDR_0_CH1</name>
          <description>no description available</description>
          <addressOffset>0x5A0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>INPUT_BASE_ADDR0</name>
              <description>input base address0</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_INPUT_FETCH_ADDR_1_CH1</name>
          <description>no description available</description>
          <addressOffset>0x5B0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>INPUT_BASE_ADDR1</name>
              <description>input base address1</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_INPUT_STORE_CTRL_CH0</name>
          <description>Store engine Control Channel 0 Register</description>
          <addressOffset>0x5C0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x20200</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>CH_EN</name>
              <description>Channel enable.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Store function is disable</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Store function is enable</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BLOCK_EN</name>
              <description>Choses the store mode.</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Store in scan mode</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Store in block mode</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BLOCK_16</name>
              <description>Determines the block sixe.</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>8x8</name>
                  <description>Block size is 8x8</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>16x16</name>
                  <description>Block size is 16x16</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HANDSHAKE_EN</name>
              <description>Enable bit for handshake with the store engine.</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Handshake with the prefetch engine is disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Handshake with the prefetch engine is enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ARRAY_EN</name>
              <description>no description available</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Array Handshake Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Array Handshake Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ARRAY_LINE_NUM</name>
              <description>Selects Array Size</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Using 1x1 Array</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Using 3x3 Array</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>2</name>
                  <description>Using 5x5 Array</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>3</name>
                  <description>Using 5x5 Array</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RSVD3</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>STORE_BYPASS_EN</name>
              <description>store bypass enable</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>store bypass mode disable.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>store bypass mode enable. Data will bypass to store output.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>STORE_MEMORY_EN</name>
              <description>store memory enable</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>store memory mode disable.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>store memory mode enable. Data will store to memory</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PACK_IN_SEL</name>
              <description>pack_in_sel</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>select 64 shift out data to pack</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>select low 32 bit shift out data to pack</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>FILL_DATA_EN</name>
              <description>fill data enable</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Fill data mode disable.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Fill data mode enable. When using fill_data mode, store_engine will store fixed data defined in fill_data register</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RSVD2</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>WR_NUM_BYTES</name>
              <description>Bytes in a write burst</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>8_bytes</name>
                  <description>8 bytes</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>16_bytes</name>
                  <description>16 bytes</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>32_bytes</name>
                  <description>32 bytes</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>64_bytes</name>
                  <description>64 bytes</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>COMBINE_2CHANNEL</name>
              <description>Combine 2 channel Enable</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>combine 2 channel disable</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>combine 2 channel enable</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x19</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>ARBIT_EN</name>
              <description>Arbitration Enable</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Arbitration disable. If using 2 channels, will output 2 axi bus sets</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Arbitration enable. If using 2 channel, will only output 1 axi bus sets</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_INPUT_STORE_CTRL_CH1</name>
          <description>Store engine Control Channel 1 Register</description>
          <addressOffset>0x5D0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x20200</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>CH_EN</name>
              <description>Channel enable.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Store function is disable</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Store function is enable</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BLOCK_EN</name>
              <description>Choses the store mode.</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Store in scan mode</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Store in block mode</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BLOCK_16</name>
              <description>Determines the block sixe.</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>8x8</name>
                  <description>Block size is 8x8</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>16x16</name>
                  <description>Block size is 16x16</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HANDSHAKE_EN</name>
              <description>Enable bit for handshake with the fetch engine.</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Handshake with the fetch engine is disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Handshake with the fetch engine is enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ARRAY_EN</name>
              <description>no description available</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Array Handshake Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Array Handshake Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ARRAY_LINE_NUM</name>
              <description>Selects Array Size</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Using 1x1 Array</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Using 3x3 Array</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>2</name>
                  <description>Using 5x5 Array</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>3</name>
                  <description>Using 5x5 Array</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RSVD3</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>STORE_BYPASS_EN</name>
              <description>enable bit for store bypass</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>store bypass mode disable.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>store bypass mode enable. Data will bypass to store output.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>STORE_MEMORY_EN</name>
              <description>store memory enable</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>store memory mode disable.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>store memory mode enable. Data will store to memory.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PACK_IN_SEL</name>
              <description>pack_in_sel</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>select 64 shift out data to pack</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>select channel 0 high 32 bit shift out data to pack</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>WR_NUM_BYTES</name>
              <description>Bytes in a write burst</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>8_bytes</name>
                  <description>8 bytes</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>16_bytes</name>
                  <description>16 bytes</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>32_bytes</name>
                  <description>32 bytes</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>64_bytes</name>
                  <description>64 bytes</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>14</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_INPUT_STORE_STATUS_CH0</name>
          <description>Store engine status Channel 0 Register</description>
          <addressOffset>0x5E0</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>STORE_BLOCK_X</name>
              <description>When in scan mode, this field is always 0</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>STORE_BLOCK_Y</name>
              <description>When in scan mode, this field indicates the current Y coordinate of the frame</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_INPUT_STORE_STATUS_CH1</name>
          <description>Store engine status Channel 1 Register</description>
          <addressOffset>0x5F0</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>STORE_BLOCK_X</name>
              <description>When in scan mode, this field is always 0</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>STORE_BLOCK_Y</name>
              <description>When in scan mode, this field indicates the current Y coordinate of the frame</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_INPUT_STORE_SIZE_CH0</name>
          <description>no description available</description>
          <addressOffset>0x600</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>OUT_WIDTH</name>
              <description>actual output width -1</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>OUT_HEIGHT</name>
              <description>actual output height -1</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_INPUT_STORE_SIZE_CH1</name>
          <description>no description available</description>
          <addressOffset>0x610</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>OUT_WIDTH</name>
              <description>actual output width -1</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>OUT_HEIGHT</name>
              <description>actual output height -1</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_INPUT_STORE_PITCH</name>
          <description>no description available</description>
          <addressOffset>0x620</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>CH0_OUT_PITCH</name>
              <description>This field indicates the channel 0 input pitch</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH1_OUT_PITCH</name>
              <description>This field indicates the channel 1 input pitch</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_INPUT_STORE_SHIFT_CTRL_CH0</name>
          <description>no description available</description>
          <addressOffset>0x630</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RSVD2</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>OUTPUT_ACTIVE_BPP</name>
              <description>no description available</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>8 bits</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>16 bits</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>2</name>
                  <description>32 bits</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>3</name>
                  <description>32 bits</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>OUT_YUV422_1P_EN</name>
              <description>Enable for YUV422 1 plane</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>YUYV422 2 plane disabled.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>YUYV422 2 plane enabled.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>OUT_YUV422_2P_EN</name>
              <description>Enable for YUV422 2 plane</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>YUYV422 2 plane disabled.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>YUYV422 2 plane enabled.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>SHIFT_BYPASS</name>
              <description>CH0 shift bypass</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>data will do shift processing.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>data will bypass shift module.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>24</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_INPUT_STORE_SHIFT_CTRL_CH1</name>
          <description>no description available</description>
          <addressOffset>0x640</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RSVD2</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>OUTPUT_ACTIVE_BPP</name>
              <description>no description available</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>8 bits</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>16 bits</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>2</name>
                  <description>32 bits</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>3</name>
                  <description>32 bits</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>OUT_YUV422_1P_EN</name>
              <description>Enable for YUV422 1 plane</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>YUYV422 2 plane disabled.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>YUYV422 2 plane enabled.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>OUT_YUV422_2P_EN</name>
              <description>Enable for YUV422 2 plane</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>YUYV422 2 plane disabled.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>YUYV422 2 plane enabled.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>26</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_INPUT_STORE_ADDR_0_CH0</name>
          <description>no description available</description>
          <addressOffset>0x690</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>OUT_BASE_ADDR0</name>
              <description>input base address0</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_INPUT_STORE_ADDR_1_CH0</name>
          <description>no description available</description>
          <addressOffset>0x6A0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>OUT_BASE_ADDR1</name>
              <description>input base address1</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_INPUT_STORE_FILL_DATA_CH0</name>
          <description>no description available</description>
          <addressOffset>0x6B0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>FILL_DATA_CH0</name>
              <description>when using fill_data mode,store engine channel0 will store the fill_data value defined here.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_INPUT_STORE_ADDR_0_CH1</name>
          <description>no description available</description>
          <addressOffset>0x6C0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>OUT_BASE_ADDR0</name>
              <description>input base address0</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_INPUT_STORE_ADDR_1_CH1</name>
          <description>no description available</description>
          <addressOffset>0x6D0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>OUT_BASE_ADDR1</name>
              <description>input base address1</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_INPUT_STORE_D_MASK0_H_CH0</name>
          <description>no description available</description>
          <addressOffset>0x6E0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>D_MASK0_H_CH0</name>
              <description>data mask0 high byte</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_INPUT_STORE_D_MASK0_L_CH0</name>
          <description>no description available</description>
          <addressOffset>0x6F0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>D_MASK0_L_CH0</name>
              <description>data mask0 low byte</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_INPUT_STORE_D_MASK1_H_CH0</name>
          <description>no description available</description>
          <addressOffset>0x700</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>D_MASK1_H_CH0</name>
              <description>data mask1 high byte</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_INPUT_STORE_D_MASK1_L_CH0</name>
          <description>no description available</description>
          <addressOffset>0x710</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>D_MASK1_L_CH0</name>
              <description>data mask1 low byte</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_INPUT_STORE_D_MASK2_H_CH0</name>
          <description>no description available</description>
          <addressOffset>0x720</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>D_MASK2_H_CH0</name>
              <description>data mask2 high byte</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_INPUT_STORE_D_MASK2_L_CH0</name>
          <description>no description available</description>
          <addressOffset>0x730</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>D_MASK2_L_CH0</name>
              <description>data mask2 low byte</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_INPUT_STORE_D_MASK3_H_CH0</name>
          <description>no description available</description>
          <addressOffset>0x740</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>D_MASK3_H_CH0</name>
              <description>data mask3 high byte</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_INPUT_STORE_D_MASK3_L_CH0</name>
          <description>no description available</description>
          <addressOffset>0x750</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>D_MASK3_L_CH0</name>
              <description>data mask3 low byte</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_INPUT_STORE_D_MASK4_H_CH0</name>
          <description>no description available</description>
          <addressOffset>0x760</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>D_MASK4_H_CH0</name>
              <description>data mask4 high byte</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_INPUT_STORE_D_MASK4_L_CH0</name>
          <description>no description available</description>
          <addressOffset>0x770</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>D_MASK4_L_CH0</name>
              <description>data mask4 low byte</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_INPUT_STORE_D_MASK5_H_CH0</name>
          <description>no description available</description>
          <addressOffset>0x780</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>D_MASK5_H_CH0</name>
              <description>data mask5 high byte</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_INPUT_STORE_D_MASK5_L_CH0</name>
          <description>no description available</description>
          <addressOffset>0x790</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>D_MASK5_L_CH0</name>
              <description>data mask5 low byte</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_INPUT_STORE_D_MASK6_H_CH0</name>
          <description>no description available</description>
          <addressOffset>0x7A0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>D_MASK6_H_CH0</name>
              <description>data mask6 high byte</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_INPUT_STORE_D_MASK6_L_CH0</name>
          <description>no description available</description>
          <addressOffset>0x7B0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>D_MASK6_L_CH0</name>
              <description>data mask6 low byte</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_INPUT_STORE_D_MASK7_H_CH0</name>
          <description>no description available</description>
          <addressOffset>0x7C0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>D_MASK7_H_CH0</name>
              <description>data mask7 high byte</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_INPUT_STORE_D_MASK7_L_CH0</name>
          <description>no description available</description>
          <addressOffset>0x7E0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>D_MASK7_L_CH0</name>
              <description>data mask7 low byte</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_INPUT_STORE_D_SHIFT_L_CH0</name>
          <description>no description available</description>
          <addressOffset>0x7F0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>D_SHIFT_WIDTH0</name>
              <description>data shift width 0</description>
              <bitOffset>0</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD3</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>D_SHIFT_FLAG0</name>
              <description>data shift flag 0</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>D_SHIFT_WIDTH1</name>
              <description>data shift width 1</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD2</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>D_SHIFT_FLAG1</name>
              <description>data shift flag 1</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>D_SHIFT_WIDTH2</name>
              <description>data shift width 2</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>D_SHIFT_FLAG2</name>
              <description>data shift flag 2</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>D_SHIFT_WIDTH3</name>
              <description>data shift width 3</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>D_SHIFT_FLAG3</name>
              <description>data shift flag 3</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_INPUT_STORE_D_SHIFT_H_CH0</name>
          <description>no description available</description>
          <addressOffset>0x800</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>D_SHIFT_WIDTH4</name>
              <description>data shift width 4</description>
              <bitOffset>0</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD3</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>D_SHIFT_FLAG4</name>
              <description>data shift flag 4</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>D_SHIFT_WIDTH5</name>
              <description>data shift width 5</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD2</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>D_SHIFT_FLAG5</name>
              <description>data shift flag 5</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>D_SHIFT_WIDTH6</name>
              <description>data shift width 6</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>D_SHIFT_FLAG6</name>
              <description>data shift flag 6</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>D_SHIFT_WIDTH7</name>
              <description>data shift width 3</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>D_SHIFT_FLAG7</name>
              <description>data shift flag 7</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_INPUT_STORE_F_SHIFT_L_CH0</name>
          <description>no description available</description>
          <addressOffset>0x810</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>F_SHIFT_WIDTH0</name>
              <description>flag shift width 0</description>
              <bitOffset>0</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>F_SHIFT_FLAG0</name>
              <description>flag shift flag0</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD3</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>F_SHIFT_WIDTH1</name>
              <description>flag shift width 1</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>F_SHIFT_FLAG1</name>
              <description>flag shift flag1</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD2</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>F_SHIFT_WIDTH2</name>
              <description>flag shift width 2</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>F_SHIFT_FLAG2</name>
              <description>flag shift flag2</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>F_SHIFT_WIDTH3</name>
              <description>flag shift width 3</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>F_SHIFT_FLAG3</name>
              <description>flag shift flag3</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_INPUT_STORE_F_SHIFT_H_CH0</name>
          <description>no description available</description>
          <addressOffset>0x820</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>F_SHIFT_WIDTH4</name>
              <description>flag shift width 4</description>
              <bitOffset>0</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>F_SHIFT_FLAG4</name>
              <description>flag shift flag4</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD3</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>F_SHIFT_WIDTH5</name>
              <description>flag shift width 5</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>F_SHIFT_FLAG5</name>
              <description>flag shift flag5</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD2</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>F_SHIFT_WIDTH6</name>
              <description>flag shift width 5</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>F_SHIFT_FLAG6</name>
              <description>flag shift flag6</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>F_SHIFT_WIDTH7</name>
              <description>flag shift width 7</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>F_SHIFT_FLAG7</name>
              <description>flag shift flag7</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_INPUT_STORE_F_MASK_L_CH0</name>
          <description>no description available</description>
          <addressOffset>0x830</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>F_MASK0</name>
              <description>flag mask0</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>F_MASK1</name>
              <description>flag mask1</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>F_MASK2</name>
              <description>flag mask2</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>F_MASK3</name>
              <description>flag mask3</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_INPUT_STORE_F_MASK_H_CH0</name>
          <description>no description available</description>
          <addressOffset>0x840</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>F_MASK4</name>
              <description>flag mask4</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>F_MASK5</name>
              <description>flag mask5</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>F_MASK6</name>
              <description>flag mask6</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>F_MASK7</name>
              <description>flag mask7</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_DITHER_FETCH_CTRL_CH0</name>
          <description>Pre-fetch engine Control Channel 0 Register</description>
          <addressOffset>0x850</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x20000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>CH_EN</name>
              <description>Channel enable.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Prefetch function is disable</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Prefetch function is enable</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BLOCK_EN</name>
              <description>Choses the prefetch mode.</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Prefetch in scan mode</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Prefetch in block mode</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BLOCK_16</name>
              <description>Determines the block sixe.</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>8x8</name>
                  <description>Block size is 8x8</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>16x16</name>
                  <description>Block size is 16x16</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HANDSHAKE_EN</name>
              <description>Enable bit for handshake with the store engine.</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Handshake with the store engine is disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Handshake with the store engine is enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BYPASS_PIXEL_EN</name>
              <description>Selects Channel 0 pixel source</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Channel 0 is from memory</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Channel 0 is from previous process engine</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HIGH_BYTE</name>
              <description>channel 0 high byte selection</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>In 64 bit mode, the output high byte will use channel1.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>In 64 bit mode, the output high byte will use channel0</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RSVD4</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>HFLIP</name>
              <description>Enables HFLIP.</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>HFLIP disable</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>VFLIP enable</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>VFLIP</name>
              <description>Enables VFLIP</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>VFLIP disable</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>VFLIP enable</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RSVD3</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>ROTATION_ANGLE</name>
              <description>no description available</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ROT_0</name>
                  <description>Rotate image by 0 degrees.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ROT_90</name>
                  <description>Rotate image by 90 degrees.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ROT_180</name>
                  <description>Rotate image by 180 degrees.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ROT_270</name>
                  <description>Rotate image by 270 degrees.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RSVD2</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>RD_NUM_BYTES</name>
              <description>Bytes in a read burst</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>8_bytes</name>
                  <description>8 bytes.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>16_bytes</name>
                  <description>16 bytes.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>32_bytes</name>
                  <description>32 bytes.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>64_bytes</name>
                  <description>64 bytes.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>HANDSHAKE_SCAN_LINE_NUM</name>
              <description>scan handshake line number</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>1 line.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>8 lines</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>2</name>
                  <description>16 lines</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>3</name>
                  <description>16 lines</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>ARBIT_EN</name>
              <description>Enables Arbitration</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Arbitration disable. If using 2 channels, will output 2 axi bus sets.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Arbitration enable. If using 2 channel, will only output 1 axi bus sets</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_DITHER_FETCH_CTRL_CH1</name>
          <description>Pre-fetch engine Control Channel 1 Register</description>
          <addressOffset>0x860</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x20000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>CH_EN</name>
              <description>Channel enable.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Prefetch function is disable</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Prefetch function is enable</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BLOCK_EN</name>
              <description>Choses the prefetch mode.</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Prefetch in scan mode</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Prefetch in block mode</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BLOCK_16</name>
              <description>Determines the block sixe.</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>8x8</name>
                  <description>Block size is 8x8</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>16x16</name>
                  <description>Block size is 16x16</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HANDSHAKE_EN</name>
              <description>Enable bit for handshake with the store engine.</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Handshake with the store engine is disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Handshake with the store engine is enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BYPASS_PIXEL_EN</name>
              <description>Selects Channel 1 pixel source</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Channel 1 is from memory</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Channel 1 is from previous process engine</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RSVD4</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>HFLIP</name>
              <description>Enables HFLIP.</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>HFLIP disable</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>VFLIP enable</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>VFLIP</name>
              <description>Enables VFLIP</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>VFLIP disable</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>VFLIP enable</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RSVD3</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>ROTATION_ANGLE</name>
              <description>no description available</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ROT_0</name>
                  <description>Rotate image by 0 degrees.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ROT_90</name>
                  <description>Rotate image by 90 degrees.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ROT_180</name>
                  <description>Rotate image by 180 degrees.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ROT_270</name>
                  <description>Rotate image by 270 degrees.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RSVD2</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>RD_NUM_BYTES</name>
              <description>Bytes in a read burst</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>8_bytes</name>
                  <description>8 bytes.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>16_bytes</name>
                  <description>16 bytes.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>32_bytes</name>
                  <description>32 bytes.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>64_bytes</name>
                  <description>64 bytes.</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>HANDSHAKE_SCAN_LINE_NUM</name>
              <description>scan handshake line number</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>1 line.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>8 lines</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>2</name>
                  <description>16 lines</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>3</name>
                  <description>16 lines</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_DITHER_FETCH_STATUS_CH0</name>
          <description>Pre-fetch engine status Channel 0 Register</description>
          <addressOffset>0x870</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>PREFETCH_BLOCK_X</name>
              <description>When in scan mode, this field is always 0</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>PREFETCH_BLOCK_Y</name>
              <description>When in scan mode, this field indicates the current Y coordinate of the frame</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_DITHER_FETCH_STATUS_CH1</name>
          <description>Store engine status Channel 1 Register</description>
          <addressOffset>0x880</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>PREFETCH_BLOCK_X</name>
              <description>When in scan mode, this field is always 0</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>PREFETCH_BLOCK_Y</name>
              <description>When in scan mode, this field indicates the current Y coordinate of the frame</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_DITHER_FETCH_ACTIVE_SIZE_ULC_CH0</name>
          <description>no description available</description>
          <addressOffset>0x890</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ACTIVE_SIZE_ULC_X</name>
              <description>This field indicates the upper left X-coordinate(in pixels) of the active surface of the total input memory</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ACTIVE_SIZE_ULC_Y</name>
              <description>This field indicates the upper left Y-coordinate(in pixels) of the active surface of the total input memory</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_DITHER_FETCH_ACTIVE_SIZE_LRC_CH0</name>
          <description>no description available</description>
          <addressOffset>0x8A0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ACTIVE_SIZE_LRC_X</name>
              <description>This field indicates the upper left X-coordinate(in pixels) of the active surface of the total input memory</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ACTIVE_SIZE_LRC_Y</name>
              <description>This field indicates the upper left Y-coordinate(in pixels) of the active surface of the total input memory</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_DITHER_FETCH_ACTIVE_SIZE_ULC_CH1</name>
          <description>no description available</description>
          <addressOffset>0x8B0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ACTIVE_SIZE_ULC_X</name>
              <description>This field indicates the upper left X-coordinate(in pixels) of the active surface of the total input memory</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ACTIVE_SIZE_ULC_Y</name>
              <description>This field indicates the upper left Y-coordinate(in pixels) of the active surface of the total input memory</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_DITHER_FETCH_ACTIVE_SIZE_LRC_CH1</name>
          <description>no description available</description>
          <addressOffset>0x8C0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ACTIVE_SIZE_LRC_X</name>
              <description>This field indicates the upper left X-coordinate(in pixels) of the active surface of the total input memory</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ACTIVE_SIZE_LRC_Y</name>
              <description>This field indicates the upper left Y-coordinate(in pixels) of the active surface of the total input memory</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_DITHER_FETCH_SIZE_CH0</name>
          <description>no description available</description>
          <addressOffset>0x8D0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>INPUT_TOTAL_WIDTH</name>
              <description>actual total widht -1</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>INPUT_TOTAL_HEIGHT</name>
              <description>actual total height -1</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_DITHER_FETCH_SIZE_CH1</name>
          <description>no description available</description>
          <addressOffset>0x8E0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>INPUT_TOTAL_WIDTH</name>
              <description>actual_total_width -1</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>INPUT_TOTAL_HEIGHT</name>
              <description>acutal total height -1</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_DITHER_FETCH_BACKGROUND_COLOR_CH0</name>
          <description>no description available</description>
          <addressOffset>0x8F0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BACKGROUND_COLOR</name>
              <description>background color(in 32bpp format) for any pixels not within the bufffer range specified by the ULC/LRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_DITHER_FETCH_BACKGROUND_COLOR_CH1</name>
          <description>no description available</description>
          <addressOffset>0x900</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BACKGROUND_COLOR</name>
              <description>background color(in 32bpp format) for any pixels not within the bufffer range specified by the ULC/LRC</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_DITHER_FETCH_PITCH</name>
          <description>no description available</description>
          <addressOffset>0x910</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>CH0_INPUT_PITCH</name>
              <description>This field indicates the channel 0 input pitch</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH1_INPUT_PITCH</name>
              <description>This field indicates the channel 1 input pitch</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_DITHER_FETCH_SHIFT_CTRL_CH0</name>
          <description>no description available</description>
          <addressOffset>0x920</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x1000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>INPUT_ACTIVE_BPP</name>
              <description>no description available</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>8 bits</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>16 bits</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>2</name>
                  <description>32 bits</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>3</name>
                  <description>32 bits</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>EXPAND_FORMAT</name>
              <description>Select Pixel format</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>RGB 565</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>RGB 555</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>2</name>
                  <description>ARGB 1555</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>3</name>
                  <description>RGB 444</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>4</name>
                  <description>ARGB 4444</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>5</name>
                  <description>YUYV/YVYU</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>6</name>
                  <description>UYVY/VYUY</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>7</name>
                  <description>YUV422_2P</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>EXPAND_EN</name>
              <description>no description available</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>channel0 format expanding disable</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>channel0 format expanding enable</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SHIFT_BYPASS</name>
              <description>no description available</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>channel0 data will do shift function</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>channel0 will bypass shift function</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>19</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_DITHER_FETCH_SHIFT_CTRL_CH1</name>
          <description>no description available</description>
          <addressOffset>0x930</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x1000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>INPUT_ACTIVE_BPP</name>
              <description>no description available</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>8 bits</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>16 bits</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>2</name>
                  <description>32 bits</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>3</name>
                  <description>32 bits</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>EXPAND_FORMAT</name>
              <description>Select Pixel format</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>RGB 565</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>RGB 555</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>2</name>
                  <description>ARGB 1555</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>3</name>
                  <description>RGB 444</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>4</name>
                  <description>ARGB 4444</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>5</name>
                  <description>YUYV/YVYU</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>6</name>
                  <description>UYVY/VYUY</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>7</name>
                  <description>YUV422_2P</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>EXPAND_EN</name>
              <description>no description available</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>channel1 format expanding disable</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>channel1 format expanding enable</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SHIFT_BYPASS</name>
              <description>no description available</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>channel1 data will do shift function</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>channel1 will bypass shift function</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>19</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_DITHER_FETCH_SHIFT_OFFSET_CH0</name>
          <description>no description available</description>
          <addressOffset>0x940</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>OFFSET0</name>
              <description>Shift Offset for channel 0 componnent 0.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD3</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>OFFSET1</name>
              <description>Shift Offset for channel 0 componnent 1.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD2</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>OFFSET2</name>
              <description>Shift Offset for channel 0 componnent 2.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>OFFSET3</name>
              <description>Shift Offset for channel 0 componnent 3.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_DITHER_FETCH_SHIFT_OFFSET_CH1</name>
          <description>no description available</description>
          <addressOffset>0x950</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>OFFSET0</name>
              <description>Shift Offset for channel 1 componnent 0.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD3</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>OFFSET1</name>
              <description>Shift Offset for channel 1 componnent 1.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD2</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>OFFSET2</name>
              <description>Shift Offset for channel 1 componnent 2.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>OFFSET3</name>
              <description>Shift Offset for channel 1 componnent 3.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_DITHER_FETCH_SHIFT_WIDTH_CH0</name>
          <description>no description available</description>
          <addressOffset>0x960</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x8888</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>WIDTH0</name>
              <description>Shift Width for channel 0 componnent 0.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>WIDTH1</name>
              <description>Shift Width for channel 0 componnent 1.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>WIDTH2</name>
              <description>Shift Width for channel 0 componnent 2.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>WIDTH3</name>
              <description>Shift Width for channel 0 componnent 3.</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_DITHER_FETCH_SHIFT_WIDTH_CH1</name>
          <description>no description available</description>
          <addressOffset>0x970</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x8888</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>WIDTH0</name>
              <description>Shift Width for channel 1 componnent 0.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>WIDTH1</name>
              <description>Shift Width for channel 1 componnent 1.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>WIDTH2</name>
              <description>Shift Width for channel 1 componnent 2.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>WIDTH3</name>
              <description>Shift Width for channel 1 componnent 3.</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_DITHER_FETCH_ADDR_0_CH0</name>
          <description>no description available</description>
          <addressOffset>0x980</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>INPUT_BASE_ADDR0</name>
              <description>input base address0</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_DITHER_FETCH_ADDR_1_CH0</name>
          <description>no description available</description>
          <addressOffset>0x990</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>INPUT_BASE_ADDR1</name>
              <description>input base address1</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_DITHER_FETCH_ADDR_0_CH1</name>
          <description>no description available</description>
          <addressOffset>0x9A0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>INPUT_BASE_ADDR0</name>
              <description>input base address0</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_DITHER_FETCH_ADDR_1_CH1</name>
          <description>no description available</description>
          <addressOffset>0x9B0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>INPUT_BASE_ADDR1</name>
              <description>input base address1</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_DITHER_STORE_CTRL_CH0</name>
          <description>Store engine Control Channel 0 Register</description>
          <addressOffset>0x9C0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x20200</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>CH_EN</name>
              <description>Channel enable.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Store function is disable</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Store function is enable</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BLOCK_EN</name>
              <description>Choses the store mode.</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Store in scan mode</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Store in block mode</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BLOCK_16</name>
              <description>Determines the block sixe.</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>8x8</name>
                  <description>Block size is 8x8</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>16x16</name>
                  <description>Block size is 16x16</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HANDSHAKE_EN</name>
              <description>Enable bit for handshake with the store engine.</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Handshake with the prefetch engine is disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Handshake with the prefetch engine is enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ARRAY_EN</name>
              <description>no description available</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Array Handshake Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Array Handshake Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ARRAY_LINE_NUM</name>
              <description>Selects Array Size</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Using 1x1 Array</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Using 3x3 Array</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>2</name>
                  <description>Using 5x5 Array</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>3</name>
                  <description>Using 5x5 Array</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RSVD3</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>STORE_BYPASS_EN</name>
              <description>enable bit for store bypass</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>store bypass mode disable.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>store bypass mode enable. Data will bypass to store output.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>STORE_MEMORY_EN</name>
              <description>store memory enable</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>store memory mode disable.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>store memory mode enable. Data will store to memory</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PACK_IN_SEL</name>
              <description>pack_in_sel</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>select 64 shift out data to pack</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>select low 32 bit shift out data to pack</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>FILL_DATA_EN</name>
              <description>enable bit for fill data</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Fill data mode disable.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Fill data mode enable. When using fill_data mode, store_engine will store fixed data defined in fill_data register</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RSVD2</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>WR_NUM_BYTES</name>
              <description>Bytes in a write burst</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>8_bytes</name>
                  <description>8 bytes</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>16_bytes</name>
                  <description>16 bytes</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>32_bytes</name>
                  <description>32 bytes</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>64_bytes</name>
                  <description>64 bytes</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>COMBINE_2CHANNEL</name>
              <description>Combine 2 channel Enable</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>combine 2 channel disable</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>combine 2 channel enable</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x19</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>ARBIT_EN</name>
              <description>Arbitration Enable</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Arbitration disable. If using 2 channels, will output 2 axi bus sets</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Arbitration enable. If using 2 channel, will only output 1 axi bus sets</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_DITHER_STORE_CTRL_CH1</name>
          <description>Store engine Control Channel 1 Register</description>
          <addressOffset>0x9D0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x20200</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>CH_EN</name>
              <description>Channel enable.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Store function is disable</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Store function is enable</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BLOCK_EN</name>
              <description>Choses the store mode.</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Store in scan mode</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Store in block mode</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>BLOCK_16</name>
              <description>Determines the block sixe.</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>8x8</name>
                  <description>Block size is 8x8</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>16x16</name>
                  <description>Block size is 16x16</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HANDSHAKE_EN</name>
              <description>Enable bit for handshake with the fetch engine.</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Handshake with the fetch engine is disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Handshake with the fetch engine is enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ARRAY_EN</name>
              <description>no description available</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Array Handshake Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Array Handshake Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ARRAY_LINE_NUM</name>
              <description>Selects Array Size</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Using 1x1 Array</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Using 3x3 Array</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>2</name>
                  <description>Using 5x5 Array</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>3</name>
                  <description>Using 5x5 Array</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RSVD3</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>STORE_BYPASS_EN</name>
              <description>enable bit for store bypass</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>store bypass mode disable.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>store bypass mode enable. Data will bypass to store output.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>STORE_MEMORY_EN</name>
              <description>store memory enable</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>store memory mode disable.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>store memory mode enable. Data will store to memory</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PACK_IN_SEL</name>
              <description>pack_in_sel</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>select 64 shift out data to pack</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>select channel 0 high 32 bit shift out data to pack</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>WR_NUM_BYTES</name>
              <description>Bytes in a write burst</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>8_bytes</name>
                  <description>8 bytes</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>16_bytes</name>
                  <description>16 bytes</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>32_bytes</name>
                  <description>32 bytes</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>64_bytes</name>
                  <description>64 bytes</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>14</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_DITHER_STORE_STATUS_CH0</name>
          <description>Store engine status Channel 0 Register</description>
          <addressOffset>0x9E0</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>STORE_BLOCK_X</name>
              <description>When in scan mode, this field is always 0</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>STORE_BLOCK_Y</name>
              <description>When in scan mode, this field indicates the current Y coordinate of the frame</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_DITHER_STORE_STATUS_CH1</name>
          <description>Store engine status Channel 1 Register</description>
          <addressOffset>0x9F0</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>STORE_BLOCK_X</name>
              <description>When in scan mode, this field is always 0</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>STORE_BLOCK_Y</name>
              <description>When in scan mode, this field indicates the current Y coordinate of the frame</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_DITHER_STORE_SIZE_CH0</name>
          <description>no description available</description>
          <addressOffset>0xA00</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>OUT_WIDTH</name>
              <description>actual output width -1</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>OUT_HEIGHT</name>
              <description>actual output height -1</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_DITHER_STORE_SIZE_CH1</name>
          <description>no description available</description>
          <addressOffset>0xA10</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>OUT_WIDTH</name>
              <description>actual output width -1</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>OUT_HEIGHT</name>
              <description>actual output height -1</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_DITHER_STORE_PITCH</name>
          <description>no description available</description>
          <addressOffset>0xA20</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>CH0_OUT_PITCH</name>
              <description>This field indicates the channel 0 input pitch</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>CH1_OUT_PITCH</name>
              <description>This field indicates the channel 1 input pitch</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_DITHER_STORE_SHIFT_CTRL_CH0</name>
          <description>no description available</description>
          <addressOffset>0xA30</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RSVD2</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>OUTPUT_ACTIVE_BPP</name>
              <description>no description available</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>8 bits</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>16 bits</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>2</name>
                  <description>32 bits</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>3</name>
                  <description>32 bits</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>OUT_YUV422_1P_EN</name>
              <description>Enable for YUV422 1 plane</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>YUYV422 2 plane disabled.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>YUYV422 2 plane enabled.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>OUT_YUV422_2P_EN</name>
              <description>Enable for YUV422 2 plane</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>YUYV422 2 plane disabled.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>YUYV422 2 plane enabled.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>SHIFT_BYPASS</name>
              <description>CH0 shift bypass</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>data will do shift processing.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>data will bypass shift module.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>24</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_DITHER_STORE_SHIFT_CTRL_CH1</name>
          <description>no description available</description>
          <addressOffset>0xA40</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RSVD2</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>OUTPUT_ACTIVE_BPP</name>
              <description>no description available</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>8 bits</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>16 bits</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>2</name>
                  <description>32 bits</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>3</name>
                  <description>32 bits</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>OUT_YUV422_1P_EN</name>
              <description>Enable for YUV422 1 plane</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>YUYV422 2 plane disabled.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>YUYV422 2 plane enabled.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>OUT_YUV422_2P_EN</name>
              <description>Enable for YUV422 2 plane</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>YUYV422 2 plane disabled.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>YUYV422 2 plane enabled.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>26</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_DITHER_STORE_ADDR_0_CH0</name>
          <description>no description available</description>
          <addressOffset>0xA90</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>OUT_BASE_ADDR0</name>
              <description>input base address0</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_DITHER_STORE_ADDR_1_CH0</name>
          <description>no description available</description>
          <addressOffset>0xAA0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>OUT_BASE_ADDR1</name>
              <description>input base address1</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_DITHER_STORE_FILL_DATA_CH0</name>
          <description>no description available</description>
          <addressOffset>0xAB0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>FILL_DATA_CH0</name>
              <description>when using fill_data mode,store engine channel0 will store the fill_data value defined here.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_DITHER_STORE_ADDR_0_CH1</name>
          <description>no description available</description>
          <addressOffset>0xAC0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>OUT_BASE_ADDR0</name>
              <description>input base address0</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_DITHER_STORE_ADDR_1_CH1</name>
          <description>no description available</description>
          <addressOffset>0xAD0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>OUT_BASE_ADDR1</name>
              <description>input base address1</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_DITHER_STORE_D_MASK0_H_CH0</name>
          <description>no description available</description>
          <addressOffset>0xAE0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>D_MASK0_H_CH0</name>
              <description>data mask0 high byte</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_DITHER_STORE_D_MASK0_L_CH0</name>
          <description>no description available</description>
          <addressOffset>0xAF0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>D_MASK0_L_CH0</name>
              <description>data mask0 low byte</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_DITHER_STORE_D_MASK1_H_CH0</name>
          <description>no description available</description>
          <addressOffset>0xB00</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>D_MASK1_H_CH0</name>
              <description>data mask1 high byte</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_DITHER_STORE_D_MASK1_L_CH0</name>
          <description>no description available</description>
          <addressOffset>0xB10</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>D_MASK1_L_CH0</name>
              <description>data mask1 low byte</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_DITHER_STORE_D_MASK2_H_CH0</name>
          <description>no description available</description>
          <addressOffset>0xB20</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>D_MASK2_H_CH0</name>
              <description>data mask2 high byte</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_DITHER_STORE_D_MASK2_L_CH0</name>
          <description>no description available</description>
          <addressOffset>0xB30</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>D_MASK2_L_CH0</name>
              <description>data mask2 low byte</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_DITHER_STORE_D_MASK3_H_CH0</name>
          <description>no description available</description>
          <addressOffset>0xB40</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>D_MASK3_H_CH0</name>
              <description>data mask3 high byte</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_DITHER_STORE_D_MASK3_L_CH0</name>
          <description>no description available</description>
          <addressOffset>0xB50</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>D_MASK3_L_CH0</name>
              <description>data mask3 low byte</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_DITHER_STORE_D_MASK4_H_CH0</name>
          <description>no description available</description>
          <addressOffset>0xB60</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>D_MASK4_H_CH0</name>
              <description>data mask4 high byte</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_DITHER_STORE_D_MASK4_L_CH0</name>
          <description>no description available</description>
          <addressOffset>0xB70</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>D_MASK4_L_CH0</name>
              <description>data mask4 low byte</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_DITHER_STORE_D_MASK5_H_CH0</name>
          <description>no description available</description>
          <addressOffset>0xB80</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>D_MASK5_H_CH0</name>
              <description>data mask5 high byte</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_DITHER_STORE_D_MASK5_L_CH0</name>
          <description>no description available</description>
          <addressOffset>0xB90</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>D_MASK5_L_CH0</name>
              <description>data mask5 low byte</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_DITHER_STORE_D_MASK6_H_CH0</name>
          <description>no description available</description>
          <addressOffset>0xBA0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>D_MASK6_H_CH0</name>
              <description>data mask6 high byte</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_DITHER_STORE_D_MASK6_L_CH0</name>
          <description>no description available</description>
          <addressOffset>0xBB0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>D_MASK6_L_CH0</name>
              <description>data mask6 low byte</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_DITHER_STORE_D_MASK7_H_CH0</name>
          <description>no description available</description>
          <addressOffset>0xBC0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>D_MASK7_H_CH0</name>
              <description>data mask7 high byte</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_DITHER_STORE_D_MASK7_L_CH0</name>
          <description>no description available</description>
          <addressOffset>0xBD0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>D_MASK7_L_CH0</name>
              <description>data mask7 low byte</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_DITHER_STORE_D_SHIFT_L_CH0</name>
          <description>no description available</description>
          <addressOffset>0xBE0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>D_SHIFT_WIDTH0</name>
              <description>data shift width 0</description>
              <bitOffset>0</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD3</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>D_SHIFT_FLAG0</name>
              <description>data shift flag 0</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>D_SHIFT_WIDTH1</name>
              <description>data shift width 1</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD2</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>D_SHIFT_FLAG1</name>
              <description>data shift flag 1</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>D_SHIFT_WIDTH2</name>
              <description>data shift width 2</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>D_SHIFT_FLAG2</name>
              <description>data shift flag 2</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>D_SHIFT_WIDTH3</name>
              <description>data shift width 3</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>D_SHIFT_FLAG3</name>
              <description>data shift flag 3</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_DITHER_STORE_D_SHIFT_H_CH0</name>
          <description>no description available</description>
          <addressOffset>0xBF0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>D_SHIFT_WIDTH4</name>
              <description>data shift width 4</description>
              <bitOffset>0</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD3</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>D_SHIFT_FLAG4</name>
              <description>data shift flag 4</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>D_SHIFT_WIDTH5</name>
              <description>data shift width 5</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD2</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>D_SHIFT_FLAG5</name>
              <description>data shift flag 5</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>D_SHIFT_WIDTH6</name>
              <description>data shift width 6</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>D_SHIFT_FLAG6</name>
              <description>data shift flag 6</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>D_SHIFT_WIDTH7</name>
              <description>data shift width 3</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>D_SHIFT_FLAG7</name>
              <description>data shift flag 7</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_DITHER_STORE_F_SHIFT_L_CH0</name>
          <description>no description available</description>
          <addressOffset>0xC00</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>F_SHIFT_WIDTH0</name>
              <description>flag shift width 0</description>
              <bitOffset>0</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>F_SHIFT_FLAG0</name>
              <description>flag shift flag0</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD3</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>F_SHIFT_WIDTH1</name>
              <description>flag shift width 1</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>F_SHIFT_FLAG1</name>
              <description>flag shift flag1</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD2</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>F_SHIFT_WIDTH2</name>
              <description>flag shift width 2</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>F_SHIFT_FLAG2</name>
              <description>flag shift flag2</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>F_SHIFT_WIDTH3</name>
              <description>flag shift width 3</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>F_SHIFT_FLAG3</name>
              <description>flag shift flag3</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_DITHER_STORE_F_SHIFT_H_CH0</name>
          <description>no description available</description>
          <addressOffset>0xC10</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>F_SHIFT_WIDTH4</name>
              <description>flag shift width 4</description>
              <bitOffset>0</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>F_SHIFT_FLAG4</name>
              <description>flag shift flag4</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD3</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>F_SHIFT_WIDTH5</name>
              <description>flag shift width 5</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>F_SHIFT_FLAG5</name>
              <description>flag shift flag5</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD2</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>F_SHIFT_WIDTH6</name>
              <description>flag shift width 5</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>F_SHIFT_FLAG6</name>
              <description>flag shift flag6</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>F_SHIFT_WIDTH7</name>
              <description>flag shift width 7</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>F_SHIFT_FLAG7</name>
              <description>flag shift flag7</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_DITHER_STORE_F_MASK_L_CH0</name>
          <description>no description available</description>
          <addressOffset>0xC20</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>F_MASK0</name>
              <description>flag mask0</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>F_MASK1</name>
              <description>flag mask1</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>F_MASK2</name>
              <description>flag mask2</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>F_MASK3</name>
              <description>flag mask3</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_DITHER_STORE_F_MASK_H_CH0</name>
          <description>no description available</description>
          <addressOffset>0xC30</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>F_MASK4</name>
              <description>flag mask4</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>F_MASK5</name>
              <description>flag mask5</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>F_MASK6</name>
              <description>flag mask6</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>F_MASK7</name>
              <description>flag mask7</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_DITHER_CTRL</name>
          <description>Dither Control Register 0</description>
          <addressOffset>0x1670</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x544000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ENABLE0</name>
              <description>Enables the dither engine 0</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>Disabled</name>
                  <description>The dither engine 0 will not process any frames.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>Enabled</name>
                  <description>The dither engine 0 is on and ready for processing</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ENABLE1</name>
              <description>Enables the dither engine 1</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>Disabled</name>
                  <description>The dither engine 1 will not process any frames.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>Enabled</name>
                  <description>The dither engine 1 is on and ready for processing</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ENABLE2</name>
              <description>Enables the dither engine 2</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>Disabled</name>
                  <description>The dither engine 2 will not process any frames.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>Enabled</name>
                  <description>The dither engine 2 is on and ready for processing</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DITHER_MODE0</name>
              <description>Dither mode.</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Pass through.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Floyd-Steinberg.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>2</name>
                  <description>Atkinson.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>3</name>
                  <description>Ordered.</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>4</name>
                  <description>No Dithering, quantization only.</description>
                  <value>0x4</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DITHER_MODE1</name>
              <description>Dither mode.</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Pass through.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>3</name>
                  <description>Ordered.</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>4</name>
                  <description>No Dithering, quantization only.</description>
                  <value>0x4</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DITHER_MODE2</name>
              <description>Dither mode.</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Pass through.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>3</name>
                  <description>Ordered.</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>4</name>
                  <description>No Dithering, quantization only.</description>
                  <value>0x4</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>NUM_QUANT_BIT</name>
              <description>Number of bits to quantize down to. From 8 to (0-7).</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>1</name>
                  <description>Quantize down to 1 bit.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>2</name>
                  <description>Quantize down to 2 bits.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>3</name>
                  <description>Quantize down to 3 bits.</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>4</name>
                  <description>Quantize down to 4 bits.</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>5</name>
                  <description>Quantize down to 5 bits.</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>6</name>
                  <description>Quantize down to 6 bits.</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>7</name>
                  <description>Quantize down to 7 bits.</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>LUT_MODE</name>
              <description>Specify to use memory lut to transform pixel</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>LUT mode off.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Use LUT at pre-diter stage.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>2</name>
                  <description>Use LUT at post-dither stage.</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>IDX_MATRIX0_SIZE</name>
              <description>For Dither Engine 0</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>4x4</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>8x8</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>2</name>
                  <description>16x16</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>3</name>
                  <description>Input value of index</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>IDX_MATRIX1_SIZE</name>
              <description>For Dither Engine 1</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>4x4</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>8x8</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>2</name>
                  <description>16x16</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>3</name>
                  <description>Input value of index</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>IDX_MATRIX2_SIZE</name>
              <description>For Dither Engine 2</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>4x4</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>8x8</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>2</name>
                  <description>16x16</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>3</name>
                  <description>Input value of index</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>FINAL_LUT_ENABLE</name>
              <description>Enables a final stage register based LUT at the last stage before output</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>Disabled</name>
                  <description>The dither engine 2 will not process any frames.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>Enabled</name>
                  <description>The dither engine 2 is on and ready for processing</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ORDERED_ROUND_MODE</name>
              <description>For test purposes</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>0</name>
                  <description>Use truncation method.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>1</name>
                  <description>Use rounding method.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x19</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>BUSY2</name>
              <description>When set indicates if the dither engine 2 is busy -- started but not finished processing all of the pixels in the current frame</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>BUSY1</name>
              <description>When set indicates if the dither engine 1 is busy -- started but not finished processing all of the pixels in the current frame</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>BUSY0</name>
              <description>When set indicates if the dither engine 0 is busy -- started but not finished processing all of the pixels in the current frame</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_DITHER_FINAL_LUT_DATA0</name>
          <description>Final stage lookup value Register</description>
          <addressOffset>0x1680</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA0</name>
              <description>Final stage LUT data value.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA1</name>
              <description>Final stage LUT data value.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA2</name>
              <description>Final stage LUT data value.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA3</name>
              <description>Final stage LUT data value.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_DITHER_FINAL_LUT_DATA1</name>
          <description>Final stage lookup value Register</description>
          <addressOffset>0x1690</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA4</name>
              <description>Final stage LUT data value.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA5</name>
              <description>Final stage LUT data value.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA6</name>
              <description>Final stage LUT data value.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA7</name>
              <description>Final stage LUT data value.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_DITHER_FINAL_LUT_DATA2</name>
          <description>Final stage lookup value Register</description>
          <addressOffset>0x16A0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA8</name>
              <description>Final stage LUT data value.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA9</name>
              <description>Final stage LUT data value.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA10</name>
              <description>Final stage LUT data value.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA11</name>
              <description>Final stage LUT data value.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_DITHER_FINAL_LUT_DATA3</name>
          <description>Final stage lookup value Register</description>
          <addressOffset>0x16B0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA12</name>
              <description>Final stage LUT data value.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA13</name>
              <description>Final stage LUT data value.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA14</name>
              <description>Final stage LUT data value.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DATA15</name>
              <description>Final stage LUT data value.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_HIST_A_CTRL</name>
          <description>Histogram Control Register.</description>
          <addressOffset>0x2A00</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5001F00</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ENABLE</name>
              <description>Enable the Histogram Engine</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>CLEAR</name>
              <description>Write 1 to clear the histogram result and will be self-clear after clear function finished</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>STATUS</name>
              <description>Indicates which histogram matched the processed bitmap</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>RSVD2</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>PIXEL_OFFSET</name>
              <description>The offset of the pixel to be used for histogram calculation</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>7</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD3</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>PIXEL_WIDTH</name>
              <description>The width of the pixel to be used for histogram calculation</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD4</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x1B</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_HIST_A_MASK</name>
          <description>Histogram Pixel Mask Register.</description>
          <addressOffset>0x2A10</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MASK_EN</name>
              <description>Enable the Pixel Mask Function in Histogram</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>MASK_MODE</name>
              <description>Operation mode of pixel mask function</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>EQUAL</name>
                  <description>Run histogram for pixels equal to value0</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NOT_EQUAL</name>
                  <description>Run histogram for pixels not equal to value0</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>INSIDE</name>
                  <description>Run histogram for pixels within the range of value0 to value1</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>OUTSIDE</name>
                  <description>Run histogram for pixels outside of the rang of value0 to value1</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>MASK_OFFSET</name>
              <description>The offset of the field to be checked against mask condition</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>7</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>MASK_WIDTH</name>
              <description>The width of the field to be checked against mask condition</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>MASK_VALUE0</name>
              <description>The value0 for mask condition checking</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>MASK_VALUE1</name>
              <description>The value1 for mask condition checking</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_HIST_A_BUF_SIZE</name>
          <description>Histogram Pixel Buffer Size Register.</description>
          <addressOffset>0x2A20</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>WIDTH</name>
              <description>This indicate the buffer width in pixels</description>
              <bitOffset>0</bitOffset>
              <bitWidth>12</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved. This field always reads 0.</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>HEIGHT</name>
              <description>This indicate the buffer height in pixels</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>12</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved. This field always reads 0.</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_HIST_A_TOTAL_PIXEL</name>
          <description>Total Number of Pixels Used by Histogram Engine.</description>
          <addressOffset>0x2A30</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TOTAL_PIXEL</name>
              <description>Total number of pixels used by histogram engine, the pixels got masked will be skipped</description>
              <bitOffset>0</bitOffset>
              <bitWidth>24</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved. This field always reads 0.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_HIST_A_ACTIVE_AREA_X</name>
          <description>The X Coordinate Offset for Active Area.</description>
          <addressOffset>0x2A40</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MIN_X_OFFSET</name>
              <description>Minimul X coordinate offset for the active area in histogram processing</description>
              <bitOffset>0</bitOffset>
              <bitWidth>12</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved. This field always reads 0.</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>MAX_X_OFFSET</name>
              <description>Maximum X coordinate offset for the active area in histogram processing</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>12</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved. This field always reads 0.</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_HIST_A_ACTIVE_AREA_Y</name>
          <description>The Y Coordinate Offset for Active Area.</description>
          <addressOffset>0x2A50</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MIN_Y_OFFSET</name>
              <description>Minimul Y coordinate offset for the active area in histogram processing</description>
              <bitOffset>0</bitOffset>
              <bitWidth>12</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved. This field always reads 0.</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>MAX_Y_OFFSET</name>
              <description>Maximum Y coordinate offset for the active area in histogram processing</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>12</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved. This field always reads 0.</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_HIST_A_RAW_STAT0</name>
          <description>Histogram Result Based on RAW Pixel Value.</description>
          <addressOffset>0x2A60</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>STAT0</name>
              <description>Lower 32-bit result fo the histogram calculation</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_HIST_A_RAW_STAT1</name>
          <description>Histogram Result Based on RAW Pixel Value.</description>
          <addressOffset>0x2A70</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>STAT1</name>
              <description>Higher 32-bit result fo the histogram calculation</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_HIST_B_CTRL</name>
          <description>Histogram Control Register.</description>
          <addressOffset>0x2A80</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5001F00</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ENABLE</name>
              <description>Enable the Histogram Engine</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>CLEAR</name>
              <description>Write 1 to clear the histogram result and will be self-clear after clear function finished</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>STATUS</name>
              <description>Indicates which histogram matched the processed bitmap</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>RSVD2</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>PIXEL_OFFSET</name>
              <description>The offset of the pixel to be used for histogram calculation</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>7</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD3</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>PIXEL_WIDTH</name>
              <description>The width of the pixel to be used for histogram calculation</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD4</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x1B</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_HIST_B_MASK</name>
          <description>Histogram Pixel Mask Register.</description>
          <addressOffset>0x2A90</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MASK_EN</name>
              <description>Enable the Pixel Mask Function in Histogram</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>MASK_MODE</name>
              <description>Operation mode of pixel mask function</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>EQUAL</name>
                  <description>Run histogram for pixels equal to value0</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NOT_EQUAL</name>
                  <description>Run histogram for pixels not equal to value0</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>INSIDE</name>
                  <description>Run histogram for pixels within the range of value0 to value1</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>OUTSIDE</name>
                  <description>Run histogram for pixels outside of the rang of value0 to value1</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>MASK_OFFSET</name>
              <description>The offset of the field to be checked against mask condition</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>7</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>MASK_WIDTH</name>
              <description>The width of the field to be checked against mask condition</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>MASK_VALUE0</name>
              <description>The value0 for mask condition checking</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>MASK_VALUE1</name>
              <description>The value1 for mask condition checking</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_HIST_B_BUF_SIZE</name>
          <description>Histogram Pixel Buffer Size Register.</description>
          <addressOffset>0x2AA0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>WIDTH</name>
              <description>This indicate the buffer width in pixels</description>
              <bitOffset>0</bitOffset>
              <bitWidth>12</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved. This field always reads 0.</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>HEIGHT</name>
              <description>This indicate the buffer height in pixels</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>12</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved. This field always reads 0.</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_HIST_B_TOTAL_PIXEL</name>
          <description>Total Number of Pixels Used by Histogram Engine.</description>
          <addressOffset>0x2AB0</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TOTAL_PIXEL</name>
              <description>Total number of pixels used by histogram engine, the pixels got masked will be skipped</description>
              <bitOffset>0</bitOffset>
              <bitWidth>24</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved. This field always reads 0.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_HIST_B_ACTIVE_AREA_X</name>
          <description>The X Coordinate Offset for Active Area.</description>
          <addressOffset>0x2AC0</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MIN_X_OFFSET</name>
              <description>Minimul X coordinate offset for the active area in histogram processing</description>
              <bitOffset>0</bitOffset>
              <bitWidth>12</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved. This field always reads 0.</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>MAX_X_OFFSET</name>
              <description>Maximum X coordinate offset for the active area in histogram processing</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>12</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved. This field always reads 0.</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_HIST_B_ACTIVE_AREA_Y</name>
          <description>The Y Coordinate Offset for Active Area.</description>
          <addressOffset>0x2AD0</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MIN_Y_OFFSET</name>
              <description>Minimul Y coordinate offset for the active area in histogram processing</description>
              <bitOffset>0</bitOffset>
              <bitWidth>12</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved. This field always reads 0.</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>MAX_Y_OFFSET</name>
              <description>Maximum Y coordinate offset for the active area in histogram processing</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>12</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved. This field always reads 0.</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_HIST_B_RAW_STAT0</name>
          <description>Histogram Result Based on RAW Pixel Value.</description>
          <addressOffset>0x2AE0</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>STAT0</name>
              <description>Lower 32-bit result fo the histogram calculation</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_HIST_B_RAW_STAT1</name>
          <description>Histogram Result Based on RAW Pixel Value.</description>
          <addressOffset>0x2AF0</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>STAT1</name>
              <description>Higher 32-bit result fo the histogram calculation</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_HIST2_PARAM</name>
          <description>2-level Histogram Parameter Register.</description>
          <addressOffset>0x2B00</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0xF00</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>VALUE0</name>
              <description>Black value for 2-level histogram</description>
              <bitOffset>0</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>VALUE1</name>
              <description>White value for 2-level histogram</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>RSVD</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_HIST4_PARAM</name>
          <description>4-level Histogram Parameter Register.</description>
          <addressOffset>0x2B10</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0xF0A0500</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>VALUE0</name>
              <description>GRAY0 (Black) value for 4-level histogram</description>
              <bitOffset>0</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>VALUE1</name>
              <description>GRAY1 value for 4-level histogram</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>VALUE2</name>
              <description>GRAY2 value for 4-level histogram</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD2</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>VALUE3</name>
              <description>GRAY3 (White) value for 4-level histogram</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD3</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_HIST8_PARAM0</name>
          <description>8-level Histogram Parameter 0 Register.</description>
          <addressOffset>0x2B20</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x6040200</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>VALUE0</name>
              <description>GRAY0 (Black) value for 8-level histogram</description>
              <bitOffset>0</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>VALUE1</name>
              <description>GRAY1 value for 8-level histogram</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>VALUE2</name>
              <description>GRAY2 value for 8-level histogram</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD2</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>VALUE3</name>
              <description>GRAY3 value for 8-level histogram</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD3</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_HIST8_PARAM1</name>
          <description>8-level Histogram Parameter 1 Register.</description>
          <addressOffset>0x2B30</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0xF0D0B09</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>VALUE4</name>
              <description>GRAY4 value for 8-level histogram</description>
              <bitOffset>0</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD4</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>VALUE5</name>
              <description>GRAY5 value for 8-level histogram</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD5</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>VALUE6</name>
              <description>GRAY6 value for 8-level histogram</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD6</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>VALUE7</name>
              <description>GRAY7 (White) value for 8-level histogram</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD7</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_HIST16_PARAM0</name>
          <description>16-level Histogram Parameter 0 Register.</description>
          <addressOffset>0x2B40</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x3020100</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>VALUE0</name>
              <description>GRAY0 (Black) value for 16-level histogram</description>
              <bitOffset>0</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>VALUE1</name>
              <description>GRAY1 value for 16-level histogram</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>VALUE2</name>
              <description>GRAY2 value for 16-level histogram</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD2</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>VALUE3</name>
              <description>GRAY3 value for 16-level histogram</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD3</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_HIST16_PARAM1</name>
          <description>16-level Histogram Parameter 1 Register.</description>
          <addressOffset>0x2B50</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x7060504</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>VALUE4</name>
              <description>GRAY4 value for 16-level histogram</description>
              <bitOffset>0</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD4</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>VALUE5</name>
              <description>GRAY5 value for 16-level histogram</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD5</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>VALUE6</name>
              <description>GRAY6 value for 16-level histogram</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD6</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>VALUE7</name>
              <description>GRAY7 value for 16-level histogram</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD7</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_HIST16_PARAM2</name>
          <description>16-level Histogram Parameter 2 Register.</description>
          <addressOffset>0x2B60</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0xB0A0908</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>VALUE8</name>
              <description>GRAY8 value for 16-level histogram</description>
              <bitOffset>0</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD8</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>VALUE9</name>
              <description>GRAY9 value for 16-level histogram</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD9</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>VALUE10</name>
              <description>GRAY10 value for 16-level histogram</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD10</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>VALUE11</name>
              <description>GRAY11 value for 16-level histogram</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD11</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_HIST16_PARAM3</name>
          <description>16-level Histogram Parameter 3 Register.</description>
          <addressOffset>0x2B70</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0xF0E0D0C</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>VALUE12</name>
              <description>GRAY12 value for 16-level histogram</description>
              <bitOffset>0</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD12</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>VALUE13</name>
              <description>GRAY13 value for 16-level histogram</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD13</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>VALUE14</name>
              <description>GRAY14 value for 16-level histogram</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD14</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>VALUE15</name>
              <description>GRAY15 (White) value for 16-level histogram</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD15</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_HIST32_PARAM0</name>
          <description>32-level Histogram Parameter 0 Register.</description>
          <addressOffset>0x2B80</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x3020100</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>VALUE0</name>
              <description>GRAY0 (Black) value for 32-level histogram</description>
              <bitOffset>0</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>VALUE1</name>
              <description>GRAY1 value for 32-level histogram</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>VALUE2</name>
              <description>GRAY2 value for 32-level histogram</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD2</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>VALUE3</name>
              <description>GRAY3 value for 32-level histogram</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD3</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_HIST32_PARAM1</name>
          <description>32-level Histogram Parameter 1 Register.</description>
          <addressOffset>0x2B90</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x7060504</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>VALUE4</name>
              <description>GRAY4 value for 32-level histogram</description>
              <bitOffset>0</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD4</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>VALUE5</name>
              <description>GRAY5 value for 32-level histogram</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD5</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>VALUE6</name>
              <description>GRAY6 value for 32-level histogram</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD6</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>VALUE7</name>
              <description>GRAY7 value for 32-level histogram</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD7</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_HIST32_PARAM2</name>
          <description>32-level Histogram Parameter 2 Register.</description>
          <addressOffset>0x2BA0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0xB0A0908</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>VALUE8</name>
              <description>GRAY8 value for 32-level histogram</description>
              <bitOffset>0</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD8</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>VALUE9</name>
              <description>GRAY9 value for 32-level histogram</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD9</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>VALUE10</name>
              <description>GRAY10 value for 32-level histogram</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD10</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>VALUE11</name>
              <description>GRAY11 value for 32-level histogram</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD11</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_HIST32_PARAM3</name>
          <description>32-level Histogram Parameter 3 Register.</description>
          <addressOffset>0x2BB0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0xF0E0D0C</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>VALUE12</name>
              <description>GRAY12 value for 32-level histogram</description>
              <bitOffset>0</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD12</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>VALUE13</name>
              <description>GRAY13 value for 32-level histogram</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD13</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>VALUE14</name>
              <description>GRAY14 value for 32-level histogram</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD14</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>VALUE15</name>
              <description>GRAY15 (White) value for 32-level histogram</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD15</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_HIST32_PARAM4</name>
          <description>32-level Histogram Parameter 0 Register.</description>
          <addressOffset>0x2BC0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x3020100</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>VALUE16</name>
              <description>GRAY16 (Black) value for 32-level histogram</description>
              <bitOffset>0</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>VALUE17</name>
              <description>GRAY17 value for 32-level histogram</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>VALUE18</name>
              <description>GRAY18 value for 32-level histogram</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD2</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>VALUE19</name>
              <description>GRAY19 value for 32-level histogram</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD3</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_HIST32_PARAM5</name>
          <description>32-level Histogram Parameter 1 Register.</description>
          <addressOffset>0x2BD0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x7060504</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>VALUE20</name>
              <description>GRAY20 value for 32-level histogram</description>
              <bitOffset>0</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD4</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>VALUE21</name>
              <description>GRAY21 value for 32-level histogram</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD5</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>VALUE22</name>
              <description>GRAY22 value for 32-level histogram</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD6</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>VALUE23</name>
              <description>GRAY23 value for 32-level histogram</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD7</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_HIST32_PARAM6</name>
          <description>32-level Histogram Parameter 2 Register.</description>
          <addressOffset>0x2BE0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0xB0A0908</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>VALUE24</name>
              <description>GRAY24 value for 32-level histogram</description>
              <bitOffset>0</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD8</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>VALUE25</name>
              <description>GRAY25 value for 32-level histogram</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD9</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>VALUE26</name>
              <description>GRAY26 value for 32-level histogram</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD10</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>VALUE27</name>
              <description>GRAY27 value for 32-level histogram</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD11</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_HIST32_PARAM7</name>
          <description>32-level Histogram Parameter 3 Register.</description>
          <addressOffset>0x2BF0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0xF0E0D0C</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>VALUE28</name>
              <description>GRAY28 value for 32-level histogram</description>
              <bitOffset>0</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD2</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>VALUE29</name>
              <description>GRAY29 value for 32-level histogram</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD13</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>VALUE30</name>
              <description>GRAY30 value for 32-level histogram</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD14</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>VALUE31</name>
              <description>GRAY31 (White) value for 32-level histogram</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD15</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_COMP_CTRL</name>
          <description>no description available</description>
          <addressOffset>0x2C00</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>START</name>
              <description>Write to 1 to start operation, self-clear</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved. This field always reads 0.</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>7</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>SW_RESET</name>
              <description>Write to 1 to do a software reset to the engine, self-clear.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved. This field always reads 0.</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>23</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_COMP_FORMAT0</name>
          <description>no description available</description>
          <addressOffset>0x2C10</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>FLAG_32B</name>
              <description>1 indicate 32-bit for one pixel, 0 for 16-bit</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD3</name>
              <description>Reserved. This field always reads 0.</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>FIELD_NUM</name>
              <description>indicate how many fields in one pixel,0 for only A;3 for ABCD</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD2</name>
              <description>Reserved. This field always reads 0.</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>MASK_INDEX</name>
              <description>which field is the mask,0 for A, 3 for D</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved. This field always reads 0.</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>PIXEL_PITCH_64B</name>
              <description>extend each line to be 64-bit aligned</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>10</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ERR_PRONE</name>
              <description>step1 write fifo full. If detected, this bit is 1, there is data error in current frame.</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>FIFOFULL</name>
              <description>step1 write fifo full</description>
              <bitOffset>0x1B</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved. This field always reads 0.</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_COMP_FORMAT1</name>
          <description>no description available</description>
          <addressOffset>0x2C20</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>A_OFFSET</name>
              <description>offset for field A, 0 means A start from bit0</description>
              <bitOffset>0</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>A_LEN</name>
              <description>length of field A, 0 for 1 byte, 7 for 8 bytes, length of the field plus the length of RLE(*_runlen) should not more than 16-bit</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>B_OFFSET</name>
              <description>offset for field B, 0 means B start from bit0</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>B_LEN</name>
              <description>length of field B, 0 for 1 byte, 7 for 8 bytes, length of the field plus the length of RLE(*_runlen) should not more than 16-bit</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>C_OFFSET</name>
              <description>offset for field C, 0 means C start from bit0</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>C_LEN</name>
              <description>length of field C, 0 for 1 byte, 7 for 8 bytes, length of the field plus the length of RLE(*_runlen) should not more than 16-bit</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>D_OFFSET</name>
              <description>offset for field D, 0 means D start from bit0</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>D_LEN</name>
              <description>length of field D, 0 for 1 byte, 7 for 8 bytes, length of the field plus the length of RLE(*_runlen) should not more than 16-bit</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_COMP_FORMAT2</name>
          <description>no description available</description>
          <addressOffset>0x2C30</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>A_RUNLEN</name>
              <description>length of the RLE for field A, 12-bit(4095) max</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>B_RUNLEN</name>
              <description>length of the RLE for field B, 12-bit(4095) max</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>C_RUNLEN</name>
              <description>length of the RLE for field C, 12-bit(4095) max</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>D_RUNLEN</name>
              <description>length of the RLE for field D, 12-bit(4095) max</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD</name>
              <description>Reserved. This field always reads 0.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_COMP_MASK0</name>
          <description>no description available</description>
          <addressOffset>0x2C40</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>VLD_MASK_LOW</name>
              <description>low 32bit of the valid mask, one of ABCD will be vld_flag,1 left shifted by vld_flag anded with vld_mask will be used to check whether this pixel is valid</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_COMP_MASK1</name>
          <description>no description available</description>
          <addressOffset>0x2C50</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>VLD_MASK_HIGH</name>
              <description>high 32bit of the valid mask</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_COMP_BUFFER_SIZE</name>
          <description>no description available</description>
          <addressOffset>0x2C60</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>PIXEL_LENGTH</name>
              <description>pixel length of the input frame, 4096 max</description>
              <bitOffset>0</bitOffset>
              <bitWidth>13</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved. This field always reads 0.</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>PIXEL_WIDTH</name>
              <description>pixel width of the input frame, 4096 max</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>13</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved. This field always reads 0.</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_COMP_SOURCE</name>
          <description>no description available</description>
          <addressOffset>0x2C70</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SOURCE_ADDR</name>
              <description>source address of the input frame that located in the memory, should be 32-byte aligned</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_COMP_TARGET</name>
          <description>no description available</description>
          <addressOffset>0x2C80</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TARGET_ADDR</name>
              <description>taget address of the output frmae that the pxp compress engine should write to the memory, should be 32-byte aligned</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_COMP_BUFFER_A</name>
          <description>no description available</description>
          <addressOffset>0x2C90</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>A_SRAM_ADDR</name>
              <description>sram address used for inter-data saving of A filed,should be 32-bit aligned, SW should make sure the SRAM addr for 4 field will not overlap</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_COMP_BUFFER_B</name>
          <description>no description available</description>
          <addressOffset>0x2CA0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>B_SRAM_ADDR</name>
              <description>sram address used for inter-data saving of B filed,should be 32-bit aligned, SW should make sure the SRAM addr for 4 field will not overlap</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_COMP_BUFFER_C</name>
          <description>no description available</description>
          <addressOffset>0x2CB0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>C_SRAM_ADDR</name>
              <description>sram address used for inter-data saving of C filed,should be 32-bit aligned, SW should make sure the SRAM addr for 4 field will not overlap</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_COMP_BUFFER_D</name>
          <description>no description available</description>
          <addressOffset>0x2CC0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>D_SRAM_ADDR</name>
              <description>sram address used for inter-data saving of D filed,should be 32-bit aligned, SW should make sure the SRAM addr for 4 field will not overlap</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_COMP_DEBUG</name>
          <description>no description available</description>
          <addressOffset>0x2CD0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DEBUG_SEL</name>
              <description>debug selection</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DEBUG_VALUE</name>
              <description>value of selected debug signal</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>24</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_BUS_MUX</name>
          <description>no description available</description>
          <addressOffset>0x2CE0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RD_SEL</name>
              <description>Subblock BUS to AXI MUX, setting 0 to axi0 and setting 1 to axi1</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>WR_SEL</name>
              <description>Subblock BUS to AXI MUX, setting 0 to axi0 and setting 1 to axi1</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_HANDSHAKE_READY_MUX0</name>
          <description>no description available</description>
          <addressOffset>0x2CF0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x76543210</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>HSK0</name>
              <description>Subblock double buffer handshake signals MUX 0: Ready signal source is from pxp_control; 1: Ready signal source is from pxp_store_wfe_B CH0; 2: Ready signal source is from pxp_store_wfe_B CH1; 3: Ready signal source is from pxp_store_pre_ditering CH0; 4: Ready signal source is from pxp_store_pre_ditering CH1; 5: Ready signal source is from pxp_store_dithering CH0; 6: Ready signal source is from pxp_store_dithering CH1; 7: Ready signal source is from pxp_store_wfe_a CH0; 8: Ready signal source is from pxp_store_wfe_a CH1; 9: Ready signal source is from cpu_fetch_sw0_ready; A: Ready signal source is from cpu_fetch_sw1_ready; B: Ready signal source is from cpu_store_sw0_ready; C: Ready signal source is from cpu_store_sw1_ready;</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>HSK1</name>
              <description>Subblock double buffer handshake signals MUX</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>HSK2</name>
              <description>Subblock double buffer handshake signals MUX</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>HSK3</name>
              <description>Subblock double buffer handshake signals MUX</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>HSK4</name>
              <description>Subblock double buffer handshake signals MUX</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>HSK5</name>
              <description>Subblock double buffer handshake signals MUX</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>HSK6</name>
              <description>Subblock double buffer handshake signals MUX</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>HSK7</name>
              <description>Subblock double buffer handshake signals MUX</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_HANDSHAKE_READY_MUX1</name>
          <description>no description available</description>
          <addressOffset>0x2D00</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0xFEDCBA98</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>HSK8</name>
              <description>Subblock double buffer handshake signals MUX</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>HSK9</name>
              <description>Subblock double buffer handshake signals MUX</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>HSK10</name>
              <description>Subblock double buffer handshake signals MUX</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>HSK11</name>
              <description>Subblock double buffer handshake signals MUX</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>HSK12</name>
              <description>Subblock double buffer handshake signals MUX</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>HSK13</name>
              <description>Subblock double buffer handshake signals MUX</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>HSK14</name>
              <description>Subblock double buffer handshake signals MUX</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>HSK15</name>
              <description>Subblock double buffer handshake signals MUX</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_HANDSHAKE_DONE_MUX0</name>
          <description>no description available</description>
          <addressOffset>0x2D10</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x76543210</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>HSK0</name>
              <description>Subblock double buffer handshake signals MUX 0: Done signal source is from LCDIF; 1: Done signal source is from pxp_fetch_input CH0; 2: Done signal source is from pxp_fetch_input CH1; 3: Done signal source is from pxp_fetch_dithering CH0; 4: Done signal source is from pxp_fetch_dithering CH1; 5: Done signal source is from pxp_fetch_wfe_a CH0; 6: Done signal source is from pxp_fetch_wfe_a CH1; 7: Done signal source is from pxp_fetch_wfe_b CH0; 8: Done signal source is from pxp_fetch_wfe_b CH1; 9: Done signal source is from cpu_fetch_sw0_done; A: Done signal source is from cpu_fetch_sw1_done; B: Done signal source is from cpu_store_sw0_done; C: Done signal source is from cpu_store_sw1_done;</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>HSK1</name>
              <description>Subblock double buffer handshake signals MUX</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>HSK2</name>
              <description>Subblock double buffer handshake signals MUX</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>HSK3</name>
              <description>Subblock double buffer handshake signals MUX</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>HSK4</name>
              <description>Subblock double buffer handshake signals MUX</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>HSK5</name>
              <description>Subblock double buffer handshake signals MUX</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>HSK6</name>
              <description>Subblock double buffer handshake signals MUX</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>HSK7</name>
              <description>Subblock double buffer handshake signals MUX</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_HANDSHAKE_DONE_MUX1</name>
          <description>no description available</description>
          <addressOffset>0x2D20</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0xFEDCBA98</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>HSK8</name>
              <description>Subblock double buffer handshake signals MUX</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>HSK9</name>
              <description>Subblock double buffer handshake signals MUX</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>HSK10</name>
              <description>Subblock double buffer handshake signals MUX</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>HSK11</name>
              <description>Subblock double buffer handshake signals MUX</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>HSK12</name>
              <description>Subblock double buffer handshake signals MUX</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>HSK13</name>
              <description>Subblock double buffer handshake signals MUX</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>HSK14</name>
              <description>Subblock double buffer handshake signals MUX</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>HSK15</name>
              <description>Subblock double buffer handshake signals MUX</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_HANDSHAKE_CPU_FETCH</name>
          <description>no description available</description>
          <addressOffset>0x2D30</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x100010</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SW0_B0_READY</name>
              <description>PXP b0 buffer ready to CPU</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>SW0_B1_READY</name>
              <description>PXP b1 buffer ready to CPU</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>SW0_B0_DONE</name>
              <description>CPU b0 buffer done to PXP</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SW0_B1_DONE</name>
              <description>CPU b1 buffer done to PXP</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SW0_BUF_LINES</name>
              <description>Buffer lines for software handshake</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LINE_4</name>
                  <description>Buffer lines is 4 lines.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LINE_8</name>
                  <description>Buffer lines is 8 lines.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LINE_16</name>
                  <description>Buffer lines is 16 lines.</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>9</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>SW0_HSK_EN</name>
              <description>Enable software handshake 0 with CPU</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SW1_B0_READY</name>
              <description>PXP b0 buffer ready to CPU</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>SW1_B1_READY</name>
              <description>PXP b1 buffer ready to CPU</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>SW1_B0_DONE</name>
              <description>CPU b0 buffer done to PXP</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SW1_B1_DONE</name>
              <description>CPU b1 buffer done to PXP</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SW1_BUF_LINES</name>
              <description>Buffer lines for software handshake</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LINE_4</name>
                  <description>Buffer lines is 4 lines.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LINE_8</name>
                  <description>Buffer lines is 8 lines.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LINE_16</name>
                  <description>Buffer lines is 16 lines.</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>9</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>SW1_HSK_EN</name>
              <description>Enable software handshake 1 with CPU</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>HW_HANDSHAKE_CPU_STORE</name>
          <description>no description available</description>
          <addressOffset>0x2D40</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x100010</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SW0_B0_READY</name>
              <description>PXP b0 buffer ready to CPU</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SW0_B1_READY</name>
              <description>PXP b1 buffer ready to CPU</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SW0_B0_DONE</name>
              <description>CPU b0 buffer done to PXP</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>SW0_B1_DONE</name>
              <description>CPU b1 buffer done to PXP</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>SW0_BUF_LINES</name>
              <description>Buffer lines for software handshake</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LINE_4</name>
                  <description>Buffer lines is 4 lines.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LINE_8</name>
                  <description>Buffer lines is 8 lines.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LINE_16</name>
                  <description>Buffer lines is 16 lines.</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RSVD0</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>9</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>SW0_HSK_EN</name>
              <description>Enable software handshake 0 with CPU</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SW1_B0_READY</name>
              <description>PXP b0 buffer ready to CPU</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SW1_B1_READY</name>
              <description>PXP b1 buffer ready to CPU</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SW1_B0_DONE</name>
              <description>CPU b0 buffer done to PXP</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>SW1_B1_DONE</name>
              <description>CPU b1 buffer done to PXP</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>SW1_BUF_LINES</name>
              <description>Buffer lines for software handshake</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LINE_4</name>
                  <description>Buffer lines is 4 lines.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LINE_8</name>
                  <description>Buffer lines is 8 lines.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LINE_16</name>
                  <description>Buffer lines is 16 lines.</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RSVD1</name>
              <description>Reserved, always set to zero.</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>9</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>SW1_HSK_EN</name>
              <description>Enable software handshake 1 with CPU</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
      </registers>
    </peripheral>
    <peripheral>
      <name>QuadSPI</name>
      <description>QuadSPI</description>
      <groupName>QUADSPI</groupName>
      <prependToName>QuadSPI_</prependToName>
      <baseAddress>0x21E0000</baseAddress>
      <addressBlock>
        <offset>0</offset>
        <size>0x410</size>
        <usage>registers</usage>
      </addressBlock>
      <interrupt>
        <name>QSPI</name>
        <value>139</value>
      </interrupt>
      <registers>
        <register>
          <name>MCR</name>
          <description>Module Configuration Register</description>
          <addressOffset>0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0xF4000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SWRSTSD</name>
              <description>Software reset for Serial Flash domainPlease keep other fields value when write to SWRSTHD and SWRSTSD These software reset don't reset register setting but only reset internal flip-flops in quadspi controller To remove the reset, need to write 0 to SWRSTHD and SWRSTSD</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SWRSTSD_0</name>
                  <description>No action</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SWRSTSD_1</name>
                  <description>Serial Flash domain flops are reset. Does not reset configuration registers. It is advisable to reset both the serial flash domain and AHB domain at the same time. Resetting only one domain might lead to side effects.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SWRSTHD</name>
              <description>Software reset for AHB domainPlease keep other fields value when write to SWRSTHD and SWRSTSD These software reset don't reset register setting but only reset internal flip-flops in quadspi controller To remove the reset, need to write 0 to SWRSTHD and SWRSTSD</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SWRSTHD_0</name>
                  <description>No action</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SWRSTHD_1</name>
                  <description>AHB domain flops are reset. Does not reset configuration registers. It is advisable to reset both the serial flash domain and AHB domain at the same time. Resetting only one domain might lead to side effects.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>END_CFG</name>
              <description>Defines the endianness of the QSPI module.For more details refer to Byte Ordering Endianess</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DQS_EN</name>
              <description>DQS enable: This field is valid for both SDR and DDR mode</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DQS_EN_0</name>
                  <description>DQS disabled.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DQS_EN_1</name>
                  <description>DQS enabled- When enabled, the incoming data is sampled on both the edges of DQS input when QSPI_MCR[DDR_EN] is set, else, on only one edge when QSPI_MCR[DDR_EN] is 0. The QSPI_SMPR[DDR_SMP] values are ignored.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DDR_EN</name>
              <description>DDR mode enable:</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DDR_EN_0</name>
                  <description>2x and 4x clocks are disabled for SDR instructions only</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DDR_EN_1</name>
                  <description>2x and 4x clocks are enabled supports both SDR and DDR instruction.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CLR_RXF</name>
              <description>Clear RX FIFO. Invalidate the RX Buffer.</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CLR_RXF_0</name>
                  <description>No action.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLR_RXF_1</name>
                  <description>Read and write pointers of the RX Buffer are reset to 0. QSPI_RBSR[RDBFL] is reset to 0.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CLR_TXF</name>
              <description>Clear TX FIFO/Buffer. Invalidate the TX Buffer content.</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CLR_TXF_0</name>
                  <description>No action.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CLR_TXF_1</name>
                  <description>Read and write pointers of the TX Buffer are reset to 0. QSPI_TBSR[TRCTR] is reset to 0.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>MDIS</name>
              <description>Module Disable</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>MDIS_0</name>
                  <description>Enable QuadSPI clocks.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MDIS_1</name>
                  <description>Allow external logic to disable QuadSPI clocks.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DQS_LOOPBACK_EN</name>
              <description>Quadspi will output serial data strobe signal which will be loopback from pad to sample input flash serial data</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DQS_PHASE_EN</name>
              <description>This bit controls internal DQS output phase</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>IPCR</name>
          <description>IP Configuration Register</description>
          <addressOffset>0x8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>IDATSZ</name>
              <description>IP data transfer size: Defines the data transfer size in bytes of the IP command.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PAR_EN</name>
              <description>When set, a transaction to two serial flash devices is triggered in parallel mode</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SEQID</name>
              <description>Points to a sequence in the Look-up-table</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>FLSHCR</name>
          <description>Flash Configuration Register</description>
          <addressOffset>0xC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x303</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TCSS</name>
              <description>Serial flash CS setup time in terms of serial flash clock cycles</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>TCSH</name>
              <description>Serial flash CS hold time in terms of serial flash clock cycles</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>BUF0CR</name>
          <description>Buffer0 Configuration Register</description>
          <addressOffset>0x10</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MSTRID</name>
              <description>Master ID: The ID of the AHB master associated with BUFFER0</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ADATSZ</name>
              <description>AHB data transfer size: Defines the data transfer size in 8 bytes of an AHB triggered access to serial flash</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>HP_EN</name>
              <description>High Priority Enable: When set, the master associated with this buffer is assigned a priority higher than the rest of the masters</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>BUF1CR</name>
          <description>Buffer1 Configuration Register</description>
          <addressOffset>0x14</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MSTRID</name>
              <description>Master ID: The ID of the AHB master associated with BUFFER1</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ADATSZ</name>
              <description>AHB data transfer size: Defines the data transfer size in 8 bytes of an AHB triggered access to serial flash</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>BUF2CR</name>
          <description>Buffer2 Configuration Register</description>
          <addressOffset>0x18</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MSTRID</name>
              <description>Master ID: The ID of the AHB master associated with BUFFER2</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ADATSZ</name>
              <description>AHB data transfer size: Defines the data transfer size in 8 Bytes of an AHB triggered access to serial flash</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>BUF3CR</name>
          <description>Buffer3 Configuration Register</description>
          <addressOffset>0x1C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x80000000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MSTRID</name>
              <description>Master ID: The ID of the AHB master associated with BUFFER3</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ADATSZ</name>
              <description>AHB data transfer size: Defines the data transfer size in 8 Bytes of an AHB triggered access to serial flash</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ALLMST</name>
              <description>All master enable: When set, buffer3 acts as an all-master buffer</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>BFGENCR</name>
          <description>Buffer Generic Configuration Register</description>
          <addressOffset>0x20</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SEQID</name>
              <description>Points to a sequence in the Look-up-table</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PAR_EN</name>
              <description>When set, a transaction to two serial flash devices is triggered in parallel mode</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>BUF0IND</name>
          <description>Buffer0 Top Index Register</description>
          <addressOffset>0x30</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TPINDX0</name>
              <description>Top index of buffer 0.</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>29</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>BUF1IND</name>
          <description>Buffer1 Top Index Register</description>
          <addressOffset>0x34</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TPINDX1</name>
              <description>Top index of buffer 1.</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>29</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>BUF2IND</name>
          <description>Buffer2 Top Index Register</description>
          <addressOffset>0x38</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TPINDX2</name>
              <description>Top index of buffer 2.</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>29</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>SFAR</name>
          <description>Serial Flash Address Register</description>
          <addressOffset>0x100</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SFADR</name>
              <description>Serial Flash Address. The register content is used as byte address for all following IP Commands.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>SMPR</name>
          <description>Sampling Register</description>
          <addressOffset>0x108</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SDRSMP</name>
              <description>SDR sampling point.</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DDRSMP</name>
              <description>DDR Sampling point</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>RBSR</name>
          <description>RX Buffer Status Register</description>
          <addressOffset>0x10C</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RDBFL</name>
              <description>RX Buffer Fill Level, indicates how many entries of 4 bytes are still available in the RX Buffer</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>RDCTR</name>
              <description>Read Counter, indicates how many entries of 4 bytes have been removed from the RX Buffer</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>RBCT</name>
          <description>RX Buffer Control Register</description>
          <addressOffset>0x110</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>WMRK</name>
              <description>RX Buffer Watermark: This field determines when the readout action of the RX Buffer is triggered</description>
              <bitOffset>0</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>RXBRD</name>
              <description>RX Buffer Readout: This bit specifies the access scheme for the RX Buffer readout.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RXBRD_0</name>
                  <description>RX Buffer content is read using the AHB Bus registers QSPI_ARDB0 to QSPI_ARDB31. For details, refer to Exclusive Access to Serial Flash for AHB Commands.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RXBRD_1</name>
                  <description>RX Buffer content is read using the IP Bus registers QSPI_RBDR0 to QSPI_RBDR31.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>TBSR</name>
          <description>TX Buffer Status Register</description>
          <addressOffset>0x150</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TRBFL</name>
              <description>TX Buffer Fill Level</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>5</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>TRCTR</name>
              <description>Transmit Counter</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>TBDR</name>
          <description>TX Buffer Data Register</description>
          <addressOffset>0x154</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TXDATA</name>
              <description>TX Data On write access the data is written into the next available entry of the TX Buffer and the QPSI_TBSR[TRBFL] field is updated accordingly</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>SR</name>
          <description>Status Register</description>
          <addressOffset>0x15C</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0x3800</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BUSY</name>
              <description>Module Busy: Asserted when module is currently busy handling a transaction to an external flash device</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>IP_ACC</name>
              <description>IP Access: Asserted when transaction currently executed was initiated by IP bus.</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>AHB_ACC</name>
              <description>AHB Access: Asserted when the transaction currently executed was initiated by AHB bus.</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>AHBGNT</name>
              <description>AHB Command priority Granted: Asserted when another module has been granted priority of AHB Commands against IP Commands</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>AHBTRN</name>
              <description>AHB Access Transaction pending: Asserted when there is a pending request on the AHB interface</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>AHB0NE</name>
              <description>AHB 0 Buffer Not Empty: Asserted when AHB 0 buffer contains data.</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>AHB1NE</name>
              <description>AHB 1 Buffer Not Empty: Asserted when AHB 1 buffer contains data.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>AHB2NE</name>
              <description>AHB 2 Buffer Not Empty: Asserted when AHB 2 buffer contains data.</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>AHB3NE</name>
              <description>AHB 3 Buffer Not Empty: Asserted when AHB 3 buffer contains data.</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>AHB0FUL</name>
              <description>AHB 0 Buffer Full: Asserted when AHB 0 buffer is full.</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>AHB1FUL</name>
              <description>AHB 1 Buffer Full: Asserted when AHB 1 buffer is full.</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>AHB2FUL</name>
              <description>AHB 2 Buffer Full: Asserted when AHB 2 buffer is full.</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>AHB3FUL</name>
              <description>AHB 3 Buffer Full: Asserted when AHB 3 buffer is full.</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>RXWE</name>
              <description>RX Buffer Watermark Exceeded: Asserted when the number of valid entries in the RX Buffer exceeds the number given in the QSPI_RBCT[WMRK] field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>RXFULL</name>
              <description>RX Buffer Full: Asserted when the RX Buffer is full, i</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>RXDMA</name>
              <description>RX Buffer DMA: Asserted when RX Buffer read out via DMA is active i.e DMA is requested or running.</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>TXEDA</name>
              <description>Tx Buffer Enough Data Available</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>TXFULL</name>
              <description>TX Buffer Full: Asserted when no more data can be stored.</description>
              <bitOffset>0x1B</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>DLPSMP</name>
              <description>Data learning is not implemented on this chip</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>FR</name>
          <description>Flag Register</description>
          <addressOffset>0x160</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x8000000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TFF</name>
              <description>IP Command Transaction Finished Flag: Set when the QuadSPI module has finished a running IP Command</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
            </field>
            <field>
              <name>IPGEF</name>
              <description>IP Command Trigger during AHB Grant Error Flag: Set when the following condition occurs: A write access occurs to the QSPI_IPCR[SEQID] field and the QSPI_SR[AHBGNT] bit is set</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
            </field>
            <field>
              <name>IPIEF</name>
              <description>IP Command Trigger could not be executed Error Flag</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
            </field>
            <field>
              <name>IPAEF</name>
              <description>IP Command Trigger during AHB Access Error Flag</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
            </field>
            <field>
              <name>IUEF</name>
              <description>IP Command Usage Error Flag: Set when in parallel flash mode the execution of an IP Command is started and the sequence pointed to by the sequence ID contains a WRITE or a WRITE_DDR command</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
            </field>
            <field>
              <name>ABOF</name>
              <description>AHB Buffer Overflow Flag: Set when the size of the AHB access exceeds the size of the AHB buffer</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
            </field>
            <field>
              <name>ABSEF</name>
              <description>AHB Sequence Error Flag: Set when the execution of an AHB Command is started with an WRITE or WRITE_DDR Command in the sequence pointed to by the QSPI_BUFxCR QSPI_BUFxCR implies anyone of QSPI_BUF0CR/QSPI_BUF1CR/QSPI_BUF2CR/QSPI_BUF3CR register Communication with the serial flash device is terminated before the execution of WRITE/WRITE_DDR command by the QuadSPI module</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
            </field>
            <field>
              <name>RBDF</name>
              <description>RX Buffer Drain Flag: Will be set if the QuadSPI_SR[RXWE] status bit is asserted</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
            </field>
            <field>
              <name>RBOF</name>
              <description>RX Buffer Overflow Flag: Set when not all the data read from the serial flash device could be pushed into the RX Buffer</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
            </field>
            <field>
              <name>ILLINE</name>
              <description>Illegal Instruction Error Flag: Set when an illegal instruction is encountered by the controller in any of the sequences</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
            </field>
            <field>
              <name>TBUF</name>
              <description>TX Buffer Underrun Flag: Set when the module tried to pull data although TX Buffer was emptyor the buffer contains less than 128bits of data</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
            </field>
            <field>
              <name>TBFF</name>
              <description>TX Buffer Fill Flag: Before writing to the TX buffer, this bit should be cleared</description>
              <bitOffset>0x1B</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
            </field>
            <field>
              <name>DLPFF</name>
              <description>Data learning is not implemented on this chip</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <modifiedWriteValues>oneToClear</modifiedWriteValues>
            </field>
          </fields>
        </register>
        <register>
          <name>RSER</name>
          <description>Interrupt and DMA Request Select and Enable Register</description>
          <addressOffset>0x164</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TFIE</name>
              <description>Transaction Finished Interrupt Enable</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TFIE_0</name>
                  <description>No TFF interrupt will be generated</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TFIE_1</name>
                  <description>TFF interrupt will be generated</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>IPGEIE</name>
              <description>IP Command Trigger during AHB Grant Error Interrupt Enable</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>IPGEIE_0</name>
                  <description>No IPGEF interrupt will be generated</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>IPGEIE_1</name>
                  <description>IPGEF interrupt will be generated</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>IPIEIE</name>
              <description>IP Command Trigger during IP Access Error Interrupt Enable</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>IPIEIE_0</name>
                  <description>No IPIEF interrupt will be generated</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>IPAEIE</name>
              <description>IP Command Trigger during AHB Access Error Interrupt Enable</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>IPAEIE_0</name>
                  <description>No IPAEF interrupt will be generated</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>IPAEIE_1</name>
                  <description>IPAEF interrupt will be generated</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>IUEIE</name>
              <description>IP Command Usage Error Interrupt Enable</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>IUEIE_0</name>
                  <description>No IUEF interrupt will be generated</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>IUEIE_1</name>
                  <description>IUEF interrupt will be generated</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ABOIE</name>
              <description>AHB Buffer Overflow Interrupt Enable</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ABOIE_0</name>
                  <description>No ABOF interrupt will be generated</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ABOIE_1</name>
                  <description>ABOF interrupt will be generated</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ABSEIE</name>
              <description>AHB Sequence Error Interrupt Enable: Triggered by ABSEF flags of QSPI_FR</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ABSEIE_0</name>
                  <description>No ABSEF interrupt will be generated</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ABSEIE_1</name>
                  <description>ABSEF interrupt will be generated</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RBDIE</name>
              <description>RX Buffer Drain Interrupt Enable: Enables generation of IRQ requests for RX Buffer Drain</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RBDIE_0</name>
                  <description>No RBDF interrupt will be generated</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RBDIE_1</name>
                  <description>RBDF Interrupt will be generated</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RBOIE</name>
              <description>RX Buffer Overflow Interrupt Enable</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RBOIE_0</name>
                  <description>No RBOF interrupt will be generated</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RBOIE_1</name>
                  <description>RBOF interrupt will be generated</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RBDDE</name>
              <description>RX Buffer Drain DMA Enable: Enables generation of DMA requests for RX Buffer Drain</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RBDDE_0</name>
                  <description>No DMA request will be generated</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RBDDE_1</name>
                  <description>DMA request will be generated</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ILLINIE</name>
              <description>Illegal Instruction Error Interrupt Enable. Triggered by ILLINE flag in QSPI_FR</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ILLINIE_0</name>
                  <description>No ILLINE interrupt will be generated</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ILLINIE_1</name>
                  <description>ILLINE interrupt will be generated</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TBUIE</name>
              <description>TX Buffer Underrun Interrupt Enable</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TBUIE_0</name>
                  <description>No TBUF interrupt will be generated</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TBUIE_1</name>
                  <description>TBUF interrupt will be generated</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TBFIE</name>
              <description>TX Buffer Fill Interrupt Enable</description>
              <bitOffset>0x1B</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TBFIE_0</name>
                  <description>No TBFF interrupt will be generated</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TBFIE_1</name>
                  <description>TBFF interrupt will be generated</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DLPFIE</name>
              <description>Data learning is not implemented on this chip</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DLPFIE_0</name>
                  <description>No DLPFF interrupt will be generated</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DLPFIE_1</name>
                  <description>DLPFF interrupt will be generated</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SPNDST</name>
          <description>Sequence Suspend Status Register</description>
          <addressOffset>0x168</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SUSPND</name>
              <description>When set, it signifies that a sequence is in suspended state</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>SPDBUF</name>
              <description>Suspended Buffer: Provides the suspended buffer number. Valid only when SUSPND is set to 1'b1</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>DATLFT</name>
              <description>Data left: Provides information about the amount of data left to be read in the suspended sequence</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>7</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>SPTRCLR</name>
          <description>Sequence Pointer Clear Register</description>
          <addressOffset>0x16C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BFPTRC</name>
              <description>Buffer Pointer Clear: 1: Clears the sequence pointer for AHB accesses as defined in QuadSPI_BFGENCR</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>IPPTRC</name>
              <description>IP Pointer Clear: 1: Clears the sequence pointer for IP accesses as defined in QuadSPI_IPCR</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>SFA1AD</name>
          <description>Serial Flash A1 Top Address</description>
          <addressOffset>0x180</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TPADA1</name>
              <description>Top address for Serial Flash A1. In effect, TPADxx is the first location of the next memory.</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>22</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>SFA2AD</name>
          <description>Serial Flash A2 Top Address</description>
          <addressOffset>0x184</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TPADA2</name>
              <description>Top address for Serial Flash A2. In effect, TPxxAD is the first location of the next memory.</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>22</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>SFB1AD</name>
          <description>Serial Flash B1Top Address</description>
          <addressOffset>0x188</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TPADB1</name>
              <description>Top address for Serial Flash B1.In effect, TPxxAD is the first location of the next memory.</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>22</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>SFB2AD</name>
          <description>Serial Flash B2Top Address</description>
          <addressOffset>0x18C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>TPADB2</name>
              <description>Top address for Serial Flash B2. In effect, TPxxAD is the first location of the next memory.</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>22</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <dim>32</dim>
          <dimIncrement>0x4</dimIncrement>
          <name>RBDR%s</name>
          <description>RX Buffer Data Register</description>
          <addressOffset>0x200</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RXDATA</name>
              <description>RX Data</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>LUTKEY</name>
          <description>LUT Key Register</description>
          <addressOffset>0x300</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x5AF05AF0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>KEY</name>
              <description>The key to lock or unlock the LUT. The KEY is 0x5AF05AF0. The read value is always 0x5AF05AF0</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>LCKCR</name>
          <description>LUT Lock Configuration Register</description>
          <addressOffset>0x304</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x2</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>LOCK</name>
              <description>Locks the LUT when the following condition is met: This register is written just after the LUTKEYLUT Key Register The LUT key register was written with 0x5AF05AF0 key</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>UNLOCK</name>
              <description>Unlocks the LUT when the following two conditions are met: 1</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>LUT0</name>
          <description>Look-up Table register</description>
          <addressOffset>0x310</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x8180403</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>OPRND0</name>
              <description>Operand for INSTR0.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PAD0</name>
              <description>Pad information for INSTR0.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PAD0_0</name>
                  <description>1 Pad</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PAD0_1</name>
                  <description>2 Pads</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PAD0_2</name>
                  <description>4 Pads</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PAD0_3</name>
                  <description>NA</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>INSTR0</name>
              <description>Instruction 0</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>OPRND1</name>
              <description>Operand for INSTR1.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PAD1</name>
              <description>Pad information for INSTR1.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PAD1_0</name>
                  <description>1 Pad</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PAD1_1</name>
                  <description>2 Pads</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PAD1_2</name>
                  <description>4 Pads</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PAD1_3</name>
                  <description>NA</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>INSTR1</name>
              <description>Instruction 1</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>LUT1</name>
          <description>Look-up Table register</description>
          <addressOffset>0x314</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x24001C08</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>OPRND0</name>
              <description>Operand for INSTR0.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PAD0</name>
              <description>Pad information for INSTR0.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PAD0_0</name>
                  <description>1 Pad</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PAD0_1</name>
                  <description>2 Pads</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PAD0_2</name>
                  <description>4 Pads</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PAD0_3</name>
                  <description>NA</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>INSTR0</name>
              <description>Instruction 0</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>OPRND1</name>
              <description>Operand for INSTR1.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PAD1</name>
              <description>Pad information for INSTR1.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PAD1_0</name>
                  <description>1 Pad</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PAD1_1</name>
                  <description>2 Pads</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PAD1_2</name>
                  <description>4 Pads</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PAD1_3</name>
                  <description>NA</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>INSTR1</name>
              <description>Instruction 1</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <dim>62</dim>
          <dimIncrement>0x4</dimIncrement>
          <dimIndex>2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63</dimIndex>
          <name>LUT%s</name>
          <description>Look-up Table register</description>
          <addressOffset>0x318</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>OPRND0</name>
              <description>Operand for INSTR0.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PAD0</name>
              <description>Pad information for INSTR0.</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PAD0_0</name>
                  <description>1 Pad</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PAD0_1</name>
                  <description>2 Pads</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PAD0_2</name>
                  <description>4 Pads</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PAD0_3</name>
                  <description>NA</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>INSTR0</name>
              <description>Instruction 0</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>OPRND1</name>
              <description>Operand for INSTR1.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PAD1</name>
              <description>Pad information for INSTR1.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PAD1_0</name>
                  <description>1 Pad</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PAD1_1</name>
                  <description>2 Pads</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PAD1_2</name>
                  <description>4 Pads</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PAD1_3</name>
                  <description>NA</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>INSTR1</name>
              <description>Instruction 1</description>
              <bitOffset>0x1A</bitOffset>
              <bitWidth>6</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
      </registers>
    </peripheral>
    <peripheral>
      <name>DCP</name>
      <description>DCP register reference index</description>
      <groupName>DCP</groupName>
      <prependToName>DCP_</prependToName>
      <baseAddress>0x2280000</baseAddress>
      <addressBlock>
        <offset>0</offset>
        <size>0x434</size>
        <usage>registers</usage>
      </addressBlock>
      <interrupt>
        <name>DCP_IRQ</name>
        <value>78</value>
      </interrupt>
      <interrupt>
        <name>DCP_VMI_IRQ</name>
        <value>79</value>
      </interrupt>
      <interrupt>
        <name>DCP_SEC_IRQ</name>
        <value>80</value>
      </interrupt>
      <registers>
        <register>
          <name>CTRL</name>
          <description>DCP control register 0</description>
          <addressOffset>0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0xF0800000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>CHANNEL_INTERRUPT_ENABLE</name>
              <description>Per-channel interrupt enable bit</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CH0</name>
                  <description>no description available</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CH1</name>
                  <description>no description available</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CH2</name>
                  <description>no description available</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CH3</name>
                  <description>no description available</description>
                  <value>0x8</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ENABLE_CONTEXT_SWITCHING</name>
              <description>Enable automatic context switching for the channels</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ENABLE_CONTEXT_CACHING</name>
              <description>The software must set this bit to enable the caching of contexts between the operations</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>GATHER_RESIDUAL_WRITES</name>
              <description>The software must set this bit to enable the ragged writes to the unaligned buffers to be gathered between multiple write operations</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>PRESENT_SHA</name>
              <description>Indicates whether the SHA1/SHA2 functions are present.</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>Absent</name>
                  <description>no description available</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>Present</name>
                  <description>no description available</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PRESENT_CRYPTO</name>
              <description>Indicates whether the crypto (cipher/hash) functions are present.</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>Absent</name>
                  <description>no description available</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>Present</name>
                  <description>no description available</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CLKGATE</name>
              <description>This bit must be set to zero for a normal operation</description>
              <bitOffset>0x1E</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>SFTRST</name>
              <description>Set this bit to zero to enable a normal DCP operation</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>STAT</name>
          <description>DCP status register</description>
          <addressOffset>0x10</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x10000000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>IRQ</name>
              <description>Indicates which channels have pending interrupt requests</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>READY_CHANNELS</name>
              <description>Indicates which channels are ready to proceed with a transfer (the active channel is also included)</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CH0</name>
                  <description>no description available</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CH1</name>
                  <description>no description available</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CH2</name>
                  <description>no description available</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CH3</name>
                  <description>no description available</description>
                  <value>0x8</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CUR_CHANNEL</name>
              <description>Current (active) channel (encoded)</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>None</name>
                  <description>no description available</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CH0</name>
                  <description>no description available</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CH1</name>
                  <description>no description available</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CH2</name>
                  <description>no description available</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CH3</name>
                  <description>no description available</description>
                  <value>0x4</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>OTP_KEY_READY</name>
              <description>When set, it indicates that the OTP key is shifted from the fuse block and is ready for use.</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CHANNELCTRL</name>
          <description>DCP channel control register</description>
          <addressOffset>0x20</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ENABLE_CHANNEL</name>
              <description>Setting a bit in this field enables the DMA channel associated with it</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CH0</name>
                  <description>no description available</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CH1</name>
                  <description>no description available</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CH2</name>
                  <description>no description available</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CH3</name>
                  <description>no description available</description>
                  <value>0x8</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HIGH_PRIORITY_CHANNEL</name>
              <description>Setting a bit in this field causes the corresponding channel to have high-priority arbitration</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CH0</name>
                  <description>no description available</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CH1</name>
                  <description>no description available</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CH2</name>
                  <description>no description available</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CH3</name>
                  <description>no description available</description>
                  <value>0x8</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CH0_IRQ_MERGED</name>
              <description>Indicates that the interrupt for channel 0 must be merged with the other interrupts on the shared dcp_irq interrupt</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CAPABILITY0</name>
          <description>DCP capability 0 register</description>
          <addressOffset>0x30</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x404</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>NUM_KEYS</name>
              <description>Encoded value indicating the number of key-storage locations implemented in the design</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>NUM_CHANNELS</name>
              <description>Encoded value indicating the number of channels implemented in the design</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>DISABLE_UNIQUE_KEY</name>
              <description>Write to a 1 to disable the per-device unique key</description>
              <bitOffset>0x1D</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>DISABLE_DECRYPT</name>
              <description>Write to 1 to disable the decryption</description>
              <bitOffset>0x1F</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CAPABILITY1</name>
          <description>DCP capability 1 register</description>
          <addressOffset>0x40</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0x70001</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>CIPHER_ALGORITHMS</name>
              <description>One-hot field indicating which cipher algorithms are available</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>AES128</name>
                  <description>no description available</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HASH_ALGORITHMS</name>
              <description>One-hot field indicating which hashing features are implemented in the hardware</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SHA1</name>
                  <description>no description available</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CRC32</name>
                  <description>no description available</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SHA256</name>
                  <description>no description available</description>
                  <value>0x4</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>CONTEXT</name>
          <description>DCP context buffer pointer</description>
          <addressOffset>0x50</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ADDR</name>
              <description>Context pointer address</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>KEY</name>
          <description>DCP key index</description>
          <addressOffset>0x60</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SUBWORD</name>
              <description>Key subword pointer</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>INDEX</name>
              <description>Key index pointer. The valid indices are 0-[number_keys].</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>KEYDATA</name>
          <description>DCP key data</description>
          <addressOffset>0x70</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA</name>
              <description>Word 0 data for the key. This is the least-significant word.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>PACKET0</name>
          <description>DCP work packet 0 status register</description>
          <addressOffset>0x80</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ADDR</name>
              <description>Next pointer register</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>PACKET1</name>
          <description>DCP work packet 1 status register</description>
          <addressOffset>0x90</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>INTERRUPT</name>
              <description>Reflects whether the channel must issue an interrupt upon the completion of the packet.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>DECR_SEMAPHORE</name>
              <description>Reflects whether the channel's semaphore must be decremented at the end of the current operation</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>CHAIN</name>
              <description>Reflects whether the next command pointer register must be loaded into the channel's current descriptor pointer</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>CHAIN_CONTIGUOUS</name>
              <description>Reflects whether the next packet's address is located following this packet's payload.</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>ENABLE_MEMCOPY</name>
              <description>Reflects whether the selected hashing function should be enabled for this operation.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>ENABLE_CIPHER</name>
              <description>Reflects whether the selected cipher function must be enabled for this operation.</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>ENABLE_HASH</name>
              <description>Reflects whether the selected hashing function must be enabled for this operation.</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>ENABLE_BLIT</name>
              <description>Reflects whether the DCP must perform a blit operation</description>
              <bitOffset>0x7</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>CIPHER_ENCRYPT</name>
              <description>When the cipher block is enabled, this bit indicates whether the operation is encryption or decryption</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DECRYPT</name>
                  <description>no description available</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENCRYPT</name>
                  <description>no description available</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CIPHER_INIT</name>
              <description>Reflects whether the cipher block must load the initialization vector from the payload for this operation</description>
              <bitOffset>0x9</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>OTP_KEY</name>
              <description>Reflects whether a hardware-based key must be used</description>
              <bitOffset>0xA</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>PAYLOAD_KEY</name>
              <description>When set, it indicates the payload contains the key</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>HASH_INIT</name>
              <description>Reflects whether the current hashing block is the initial block in the hashing operation, so the hash registers must be initialized before the operation</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>HASH_TERM</name>
              <description>Reflects whether the current hashing block is the final block in the hashing operation, so the hash padding must be applied by the hardware</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>CHECK_HASH</name>
              <description>Reflects whether the calculated hash value must be compared to the hash provided in the payload.</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>HASH_OUTPUT</name>
              <description>When the hashing is enabled, this bit controls whether the input or output data is hashed.</description>
              <bitOffset>0xF</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>INPUT</name>
                  <description>no description available</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>OUTPUT</name>
                  <description>no description available</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CONSTANT_FILL</name>
              <description>When this bit is set (MEMCOPY and BLIT modes only), the DCP simply fills the destination buffer with the value found in the source address field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>TEST_SEMA_IRQ</name>
              <description>This bit is used to test the channel semaphore transition to 0. FOR TEST USE ONLY!</description>
              <bitOffset>0x11</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>KEY_BYTESWAP</name>
              <description>Reflects whether the DCP engine swaps the key bytes (big-endian key).</description>
              <bitOffset>0x12</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>KEY_WORDSWAP</name>
              <description>Reflects whether the DCP engine swaps the key words (big-endian key).</description>
              <bitOffset>0x13</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>INPUT_BYTESWAP</name>
              <description>Reflects whether the DCP engine byteswaps the input data (big-endian data).</description>
              <bitOffset>0x14</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>INPUT_WORDSWAP</name>
              <description>Reflects whether the DCP engine wordswaps the input data (big-endian data).</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>OUTPUT_BYTESWAP</name>
              <description>Reflects whether the DCP engine byteswaps the output data (big-endian data).</description>
              <bitOffset>0x16</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>OUTPUT_WORDSWAP</name>
              <description>Reflects whether the DCP engine wordswaps the output data (big-endian data).</description>
              <bitOffset>0x17</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>TAG</name>
              <description>Packet Tag</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>PACKET2</name>
          <description>DCP work packet 2 status register</description>
          <addressOffset>0xA0</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>CIPHER_SELECT</name>
              <description>Cipher selection field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>AES128</name>
                  <description>no description available</description>
                  <value>0</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CIPHER_MODE</name>
              <description>Cipher mode selection field. Reflects the mode of operation for the cipher operations.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ECB</name>
                  <description>no description available</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CBC</name>
                  <description>no description available</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>KEY_SELECT</name>
              <description>Key selection field</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>KEY0</name>
                  <description>no description available</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>KEY1</name>
                  <description>no description available</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>KEY2</name>
                  <description>no description available</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>KEY3</name>
                  <description>no description available</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>UNIQUE_KEY</name>
                  <description>no description available</description>
                  <value>0xFE</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>OTP_KEY</name>
                  <description>no description available</description>
                  <value>0xFF</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HASH_SELECT</name>
              <description>Hash Selection Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SHA1</name>
                  <description>no description available</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CRC32</name>
                  <description>no description available</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SHA256</name>
                  <description>no description available</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CIPHER_CFG</name>
              <description>Cipher configuration bits. Optional configuration bits are required for the ciphers.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>PACKET3</name>
          <description>DCP work packet 3 status register</description>
          <addressOffset>0xB0</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ADDR</name>
              <description>Source buffer address pointer</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>PACKET4</name>
          <description>DCP work packet 4 status register</description>
          <addressOffset>0xC0</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ADDR</name>
              <description>Destination buffer address pointer</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>PACKET5</name>
          <description>DCP work packet 5 status register</description>
          <addressOffset>0xD0</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>COUNT</name>
              <description>Byte count register. This value is the working value and updates as the operation proceeds.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>PACKET6</name>
          <description>DCP work packet 6 status register</description>
          <addressOffset>0xE0</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ADDR</name>
              <description>This regiser reflects the payload pointer for the current control packet.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CH0CMDPTR</name>
          <description>DCP channel 0 command pointer address register</description>
          <addressOffset>0x100</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ADDR</name>
              <description>Pointer to the descriptor structure to be processed for channel 0.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CH0SEMA</name>
          <description>DCP channel 0 semaphore register</description>
          <addressOffset>0x110</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>INCREMENT</name>
              <description>The value written to this field is added to the semaphore count in an atomic way such that the simultaneous software adds and DCP hardware substracts happening on the same clock are protected</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>VALUE</name>
              <description>This read-only field shows the current (instantaneous) value of the semaphore counter.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CH0STAT</name>
          <description>DCP channel 0 status register</description>
          <addressOffset>0x120</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>HASH_MISMATCH</name>
              <description>This bit indicates that a hashing check operation mismatched for the control packets that enable the HASH_CHECK bit</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ERROR_SETUP</name>
              <description>This bit indicates that the hardware detected an invalid programming configuration (such as a buffer length that is not a multiple of the natural data size for the operation)</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ERROR_PACKET</name>
              <description>This bit indicates that a bus error occurred when reading the packet or payload, or when writing the status back to the packet payload</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ERROR_SRC</name>
              <description>This bit indicates that a bus error occurred when reading from the source buffer</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ERROR_DST</name>
              <description>This bit indicates that a bus error occurred when storing to the destination buffer</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ERROR_PAGEFAULT</name>
              <description>This bit indicates that a page fault occurred while converting a virtual address to a physical address</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ERROR_CODE</name>
              <description>Indicates the additional error codes for some of the error conditions</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NEXT_CHAIN_IS_0</name>
                  <description>Error signalled because the next pointer is 0x00000000</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NO_CHAIN</name>
                  <description>Error signalled because the semaphore is non-zero and neither chain bit is set</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CONTEXT_ERROR</name>
                  <description>Error signalled because an error is reported reading/writing the context buffer</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PAYLOAD_ERROR</name>
                  <description>Error signalled because an error is reported reading/writing the payload</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>INVALID_MODE</name>
                  <description>Error signalled because the control packet specifies an invalid mode select (for instance, blit + hash)</description>
                  <value>0x5</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TAG</name>
              <description>Indicates the tag from the last completed packet in the command structure</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CH0OPTS</name>
          <description>DCP channel 0 options register</description>
          <addressOffset>0x130</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RECOVERY_TIMER</name>
              <description>This field indicates the recovery time for the channel</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CH1CMDPTR</name>
          <description>DCP channel 1 command pointer address register</description>
          <addressOffset>0x140</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ADDR</name>
              <description>Pointer to the descriptor structure to be processed for channel 1.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CH1SEMA</name>
          <description>DCP channel 1 semaphore register</description>
          <addressOffset>0x150</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>INCREMENT</name>
              <description>The value written to this field is added to the semaphore count in an atomic way, such that the simultaneous software adds and the DCP hardware substracts happening on the same clock are protected</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>VALUE</name>
              <description>This read-only field shows the current (instantaneous) value of the semaphore counter.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CH1STAT</name>
          <description>DCP channel 1 status register</description>
          <addressOffset>0x160</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>HASH_MISMATCH</name>
              <description>This bit indicates that a hashing check operation is mismatched for the control packets that enable the HASH_CHECK bit</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ERROR_SETUP</name>
              <description>This bit indicates that the hardware detected an invalid programming configuration (such as a buffer length that is not a multiple of the natural data size for the operation)</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ERROR_PACKET</name>
              <description>This bit indicates that a bus error occurred when reading the packet or payload, or when writing the status back to the packet paylaod</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ERROR_SRC</name>
              <description>This bit indicates that a bus error occurred when reading from the source buffer</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ERROR_DST</name>
              <description>This bit indicates that a bus error occurred when storing to the destination buffer</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ERROR_PAGEFAULT</name>
              <description>This bit indicates that a page fault occurred while converting a virtual address to a physical address</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ERROR_CODE</name>
              <description>Indicates the additional error codes for some of the error conditions.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NEXT_CHAIN_IS_0</name>
                  <description>Error is signalled because the next pointer is 0x00000000.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NO_CHAIN</name>
                  <description>Error is signalled because the semaphore is of a non-zero value and neither of the chain bits is set.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CONTEXT_ERROR</name>
                  <description>Error is signalled because an error was reported when reading/writing the context buffer.</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PAYLOAD_ERROR</name>
                  <description>Error is signalled because an error was reported when reading/writing the payload.</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>INVALID_MODE</name>
                  <description>Error is signalled because the control packet specifies an invalid mode select (for example, blit + hash).</description>
                  <value>0x5</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TAG</name>
              <description>Indicates the tag from the last completed packet in the command structure.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CH1OPTS</name>
          <description>DCP channel 1 options register</description>
          <addressOffset>0x170</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RECOVERY_TIMER</name>
              <description>This field indicates the recovery time for the channel</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CH2CMDPTR</name>
          <description>DCP channel 2 command pointer address register</description>
          <addressOffset>0x180</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ADDR</name>
              <description>Pointer to the descriptor structure to be processed for channel 2.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CH2SEMA</name>
          <description>DCP channel 2 semaphore register</description>
          <addressOffset>0x190</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>INCREMENT</name>
              <description>The value written to this field is added to the semaphore count in an atomic way, such that the simultaneous software adds and DCP hardware substracts happening on the same clock are protected</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>VALUE</name>
              <description>This read-only field shows the current (instantaneous) value of the semaphore counter.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CH2STAT</name>
          <description>DCP channel 2 status register</description>
          <addressOffset>0x1A0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>HASH_MISMATCH</name>
              <description>This bit indicates that a hashing check operation is mismatched for the control packets that enable the HASH_CHECK bit</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ERROR_SETUP</name>
              <description>This bit indicates that the hardware detected an invalid programming configuration (such as a buffer length that is not a multiple of the natural data size for the operation)</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ERROR_PACKET</name>
              <description>This bit indicates that a bus error occurred when reading the packet or payload, or when writing the status back to the packet paylaod</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ERROR_SRC</name>
              <description>This bit indicates that a bus error occurred when reading from the source buffer</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ERROR_DST</name>
              <description>This bit indicates that a bus error occurred when storing to the destination buffer</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ERROR_PAGEFAULT</name>
              <description>This bit indicates that a page fault occurred while converting a virtual address to a physical address</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ERROR_CODE</name>
              <description>Indicates additional error codes for some of the error conditions.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NEXT_CHAIN_IS_0</name>
                  <description>Error is signalled because the next pointer is 0x00000000.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NO_CHAIN</name>
                  <description>Error is signalled because the semaphore is of a non-zero value and neither of the chain bits is set.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CONTEXT_ERROR</name>
                  <description>Error is signalled because an error was reported while reading/writing the context buffer.</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PAYLOAD_ERROR</name>
                  <description>Error is signalled because an error was reported while reading/writing the payload.</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>INVALID_MODE</name>
                  <description>Error is signalled because the control packet specifies an invalid mode select (for instance, blit + hash).</description>
                  <value>0x5</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TAG</name>
              <description>Indicates the tag from the last completed packet in the command structure.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CH2OPTS</name>
          <description>DCP channel 2 options register</description>
          <addressOffset>0x1B0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RECOVERY_TIMER</name>
              <description>This field indicates the recovery time for the channel</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CH3CMDPTR</name>
          <description>DCP channel 3 command pointer address register</description>
          <addressOffset>0x1C0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ADDR</name>
              <description>Pointer to the descriptor structure to be processed for channel 3.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CH3SEMA</name>
          <description>DCP channel 3 semaphore register</description>
          <addressOffset>0x1D0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>INCREMENT</name>
              <description>The value written to this field is added to the semaphore count in an atomic way, such that the simultaneous software adds and DCP hardware substracts happening on the same clock are protected</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>VALUE</name>
              <description>This read-only field shows the current (instantaneous) value of the semaphore counter.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CH3STAT</name>
          <description>DCP channel 3 status register</description>
          <addressOffset>0x1E0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>HASH_MISMATCH</name>
              <description>This bit indicates that a hashing check operation is mismatched for the control packets that enable the HASH_CHECK bit</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ERROR_SETUP</name>
              <description>This bit indicates that the hardware detected an invalid programming configuration (such as a buffer length that is not a multiple of the natural data size for the operation)</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ERROR_PACKET</name>
              <description>This bit indicates that a bus error occurred when reading the packet or payload or when writing the status back to the packet paylaod</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ERROR_SRC</name>
              <description>This bit indicates that a bus error occurred when reading from the source buffer</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ERROR_DST</name>
              <description>This bit indicates that a bus error occurred when storing to the destination buffer</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ERROR_PAGEFAULT</name>
              <description>This bit indicates that a page fault occurred while converting a virtual address to a physical address</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>ERROR_CODE</name>
              <description>Indicates additional error codes for some of the error conditions.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>NEXT_CHAIN_IS_0</name>
                  <description>Error is signalled because the next pointer is 0x00000000.</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>NO_CHAIN</name>
                  <description>Error is signalled because the semaphore is of a non-zero value and neither of the chain bits is set.</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CONTEXT_ERROR</name>
                  <description>Error is signalled because an error was reported while reading/writing the context buffer.</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PAYLOAD_ERROR</name>
                  <description>Error is signalled because an error was reported while reading/writing the payload.</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>INVALID_MODE</name>
                  <description>Error is signalled because the control packet specifies an invalid mode select (for example, blit + hash).</description>
                  <value>0x5</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TAG</name>
              <description>Indicates the tag from the last completed packet in the command structure.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>CH3OPTS</name>
          <description>DCP channel 3 options register</description>
          <addressOffset>0x1F0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RECOVERY_TIMER</name>
              <description>This field indicates the recovery time for the channel</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>DBGSELECT</name>
          <description>DCP debug select register</description>
          <addressOffset>0x400</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>INDEX</name>
              <description>Selects a value to read via the debug data register.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CONTROL</name>
                  <description>no description available</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>OTPKEY0</name>
                  <description>no description available</description>
                  <value>0x10</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>OTPKEY1</name>
                  <description>no description available</description>
                  <value>0x11</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>OTPKEY2</name>
                  <description>no description available</description>
                  <value>0x12</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>OTPKEY3</name>
                  <description>no description available</description>
                  <value>0x13</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>DBGDATA</name>
          <description>DCP debug data register</description>
          <addressOffset>0x410</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>DATA</name>
              <description>Debug data</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
        <register>
          <name>PAGETABLE</name>
          <description>DCP page table register</description>
          <addressOffset>0x420</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ENABLE</name>
              <description>Page table enable control</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>FLUSH</name>
              <description>Page table flush control. To flush the TLB, write this bit to 1 and then back to 0.</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
            </field>
            <field>
              <name>BASE</name>
              <description>Page table base address</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>30</bitWidth>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register>
          <name>VERSION</name>
          <description>DCP version register</description>
          <addressOffset>0x430</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0x2010000</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>STEP</name>
              <description>Fixed read-only value reflecting the stepping of the version of the design implementation.</description>
              <bitOffset>0</bitOffset>
              <bitWidth>16</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>MINOR</name>
              <description>Fixed read-only value reflecting the MINOR version of the design implementation.</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>MAJOR</name>
              <description>Fixed read-only value reflecting the MAJOR version of the design implementation.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
      </registers>
    </peripheral>
    <peripheral>
      <name>RNG</name>
      <description>Random number generator</description>
      <groupName>RNG</groupName>
      <prependToName>RNG_</prependToName>
      <baseAddress>0x2284000</baseAddress>
      <addressBlock>
        <offset>0</offset>
        <size>0x18</size>
        <usage>registers</usage>
      </addressBlock>
      <interrupt>
        <name>RNGB</name>
        <value>38</value>
      </interrupt>
      <registers>
        <register>
          <name>VER</name>
          <description>RNGB version ID register</description>
          <addressOffset>0</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0x10000280</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MINOR</name>
              <description>Minor version number</description>
              <bitOffset>0</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>MAJOR</name>
              <description>Major version number</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>TYPE</name>
              <description>Random number generator type</description>
              <bitOffset>0x1C</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>TYPE_0</name>
                  <description>RNGA</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TYPE_1</name>
                  <description>RNGB (This is the type used in this module.)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>TYPE_2</name>
                  <description>RNGC</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>CMD</name>
          <description>RNGB command register</description>
          <addressOffset>0x4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>ST</name>
              <description>Self test</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ST_0</name>
                  <description>Not in the self-test mode</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ST_1</name>
                  <description>Self-test mode</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>GS</name>
              <description>Generate the seed.</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>GS_0</name>
                  <description>Not in the seed generation mode</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>GS_1</name>
                  <description>Generate the seed mode.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CI</name>
              <description>Clear the interrupt.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>write-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CI_0</name>
                  <description>Do not clear the interrupt.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CI_1</name>
                  <description>Clear the interrupt.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>CE</name>
              <description>Clear the error.</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>write-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>CE_0</name>
                  <description>Do not clear the errors and the interrupt.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>CE_1</name>
                  <description>Clear the errors and the interrupt.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SR</name>
              <description>Software reset</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>write-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SR_0</name>
                  <description>Do not perform a software reset.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SR_1</name>
                  <description>Software reset</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>CR</name>
          <description>RNGB control register</description>
          <addressOffset>0x8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>FUFMOD</name>
              <description>FIFO underflow response mode</description>
              <bitOffset>0</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>FUFMOD_0</name>
                  <description>Return all zeros and set the RNG_ESR[FUFE].</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FUFMOD_1</name>
                  <description>Return all zeros and set the RNG_ESR[FUFE].</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FUFMOD_2</name>
                  <description>Generate the bus transfer error</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FUFMOD_3</name>
                  <description>Generate the interrupt and return all zeros (overrides the RNG_CR[MASKERR]).</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>AR</name>
              <description>Auto-reseed</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>AR_0</name>
                  <description>Do not enable the automatic reseeding.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>AR_1</name>
                  <description>Enable the automatic reseeding.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>MASKDONE</name>
              <description>Mask the interrupt done.</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>MASKDONE_0</name>
                  <description>No mask is applied.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MASKDONE_1</name>
                  <description>The mask is applied.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>MASKERR</name>
              <description>Mask the error interrupt.</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>MASKERR_0</name>
                  <description>No mask is applied.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>MASKERR_1</name>
                  <description>The mask applied to the error interrupt</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SR</name>
          <description>RNGB status register</description>
          <addressOffset>0xC</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0x500D</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>BUSY</name>
              <description>Busy.</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>BUSY_0</name>
                  <description>Not busy</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>BUSY_1</name>
                  <description>Busy</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SLP</name>
              <description>Sleep</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SLP_0</name>
                  <description>The RNGB is not in the sleep mode.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SLP_1</name>
                  <description>The RNGB is in the sleep mode.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>RS</name>
              <description>Reseed needed</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>RS_0</name>
                  <description>The RNGB does not need to be reseeded.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>RS_1</name>
                  <description>The RNGB needs to be reseeded.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>STDN</name>
              <description>Self test done</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>STDN_0</name>
                  <description>Self test not completed</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>STDN_1</name>
                  <description>Completed a self test since the last reset</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SDN</name>
              <description>Seed done</description>
              <bitOffset>0x5</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SDN_0</name>
                  <description>The seed-generation process is not complete.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SDN_1</name>
                  <description>Completed the seed generation since the last reset</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>NSDN</name>
              <description>New seed done</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>FIFO_LVL</name>
              <description>FIFO level</description>
              <bitOffset>0x8</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>FIFO_SIZE</name>
              <description>FIFO size</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-only</access>
            </field>
            <field>
              <name>ERR</name>
              <description>Error</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ERR_0</name>
                  <description>No error</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ERR_1</name>
                  <description>Error detected</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ST_PF</name>
              <description>Self-test pass fail</description>
              <bitOffset>0x15</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ST_PF_0</name>
                  <description>Pass</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ST_PF_1</name>
                  <description>Fail</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>STATPF</name>
              <description>Statistics test pass failed.</description>
              <bitOffset>0x18</bitOffset>
              <bitWidth>8</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>STATPF_0</name>
                  <description>Pass</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>STATPF_1</name>
                  <description>Fail</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>ESR</name>
          <description>RNGB error status register</description>
          <addressOffset>0x10</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>LFE</name>
              <description>Linear feedback shift register (LFSR) error</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>LFE_0</name>
                  <description>The LFSRs are working properly.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>LFE_1</name>
                  <description>The LFSR failure occurred.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>OSCE</name>
              <description>Oscillator error</description>
              <bitOffset>0x1</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>OSCE_0</name>
                  <description>The RNG oscillator is working properly.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>OSCE_1</name>
                  <description>A problem with the RNG oscillator was detected.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>STE</name>
              <description>Self-test error</description>
              <bitOffset>0x2</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>STE_0</name>
                  <description>The RNGB did not fail the self test.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>STE_1</name>
                  <description>The RNGB failed the self test.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SATE</name>
              <description>Statistical test error</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SATE_0</name>
                  <description>The RNGB did not fail the statistical tests.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SATE_1</name>
                  <description>The RNGB failed the statistical tests during the initialization.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>FUFE</name>
              <description>FIFO underflow error</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>FUFE_0</name>
                  <description>FIFO underflow did not occur.</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>FUFE_1</name>
                  <description>FIFO underflow occurred.</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>OUT</name>
          <description>RNGB Output FIFO</description>
          <addressOffset>0x14</addressOffset>
          <size>32</size>
          <access>read-only</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>RANDOUT</name>
              <description>Random output</description>
              <bitOffset>0</bitOffset>
              <bitWidth>32</bitWidth>
              <access>read-only</access>
            </field>
          </fields>
        </register>
      </registers>
    </peripheral>
    <peripheral>
      <name>IOMUXC_SNVS</name>
      <description>IOMUXC_SNVS</description>
      <groupName>IOMUXC_SNVS</groupName>
      <prependToName>IOMUXC_SNVS_</prependToName>
      <baseAddress>0x2290000</baseAddress>
      <addressBlock>
        <offset>0</offset>
        <size>0x74</size>
        <usage>registers</usage>
      </addressBlock>
      <registers>
        <register>
          <name>SW_MUX_CTL_PAD_BOOT_MODE0</name>
          <description>SW_MUX_CTL_PAD_BOOT_MODE0 SW MUX Control Register</description>
          <addressOffset>0</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO5_IO10 of instance: gpio5</description>
                  <value>0x5</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad BOOT_MODE0</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_BOOT_MODE1</name>
          <description>SW_MUX_CTL_PAD_BOOT_MODE1 SW MUX Control Register</description>
          <addressOffset>0x4</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO5_IO11 of instance: gpio5</description>
                  <value>0x5</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad BOOT_MODE1</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_SNVS_TAMPER0</name>
          <description>SW_MUX_CTL_PAD_SNVS_TAMPER0 SW MUX Control Register</description>
          <addressOffset>0x8</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO5_IO00 of instance: gpio5</description>
                  <value>0x5</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad SNVS_TAMPER0</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_SNVS_TAMPER1</name>
          <description>SW_MUX_CTL_PAD_SNVS_TAMPER1 SW MUX Control Register</description>
          <addressOffset>0xC</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>ALT5 mode is only valid when TAMPER PIN is used as GPIO</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO5_IO01 of instance: gpio5</description>
                  <value>0x5</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad SNVS_TAMPER1</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_SNVS_TAMPER2</name>
          <description>SW_MUX_CTL_PAD_SNVS_TAMPER2 SW MUX Control Register</description>
          <addressOffset>0x10</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>ALT5 mode is only valid when TAMPER PIN is used as GPIO</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO5_IO02 of instance: gpio5</description>
                  <value>0x5</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad SNVS_TAMPER2</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_SNVS_TAMPER3</name>
          <description>SW_MUX_CTL_PAD_SNVS_TAMPER3 SW MUX Control Register</description>
          <addressOffset>0x14</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>Mux Mode Select Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO5_IO03 of instance: gpio5</description>
                  <value>0x5</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad SNVS_TAMPER3</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_SNVS_TAMPER4</name>
          <description>SW_MUX_CTL_PAD_SNVS_TAMPER4 SW MUX Control Register</description>
          <addressOffset>0x18</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>ALT5 mode is only valid when TAMPER PIN is used as GPIO</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO5_IO04 of instance: gpio5</description>
                  <value>0x5</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad SNVS_TAMPER4</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_SNVS_TAMPER5</name>
          <description>SW_MUX_CTL_PAD_SNVS_TAMPER5 SW MUX Control Register</description>
          <addressOffset>0x1C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>MUX Mode Select Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO5_IO05 of instance: gpio5</description>
                  <value>0x5</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad SNVS_TAMPER5</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_SNVS_TAMPER6</name>
          <description>SW_MUX_CTL_PAD_SNVS_TAMPER6 SW MUX Control Register</description>
          <addressOffset>0x20</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>ALT5 mode is only valid when TAMPER PIN is used as GPIO</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO5_IO06 of instance: gpio5</description>
                  <value>0x5</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad SNVS_TAMPER6</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_SNVS_TAMPER7</name>
          <description>SW_MUX_CTL_PAD_SNVS_TAMPER7 SW MUX Control Register</description>
          <addressOffset>0x24</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>ALT5 mode is only valid when TAMPER PIN is used as GPIO</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO5_IO07 of instance: gpio5</description>
                  <value>0x5</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad SNVS_TAMPER7</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_SNVS_TAMPER8</name>
          <description>SW_MUX_CTL_PAD_SNVS_TAMPER8 SW MUX Control Register</description>
          <addressOffset>0x28</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>ALT5 mode is only valid when TAMPER PIN is used as GPIO</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO5_IO08 of instance: gpio5</description>
                  <value>0x5</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad SNVS_TAMPER8</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_MUX_CTL_PAD_SNVS_TAMPER9</name>
          <description>SW_MUX_CTL_PAD_SNVS_TAMPER9 SW MUX Control Register</description>
          <addressOffset>0x2C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>MUX_MODE</name>
              <description>ALT5 mode is only valid when TAMPER PIN is used as GPIO</description>
              <bitOffset>0</bitOffset>
              <bitWidth>4</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ALT5</name>
                  <description>Select mux mode: ALT5 mux port: GPIO5_IO09 of instance: gpio5</description>
                  <value>0x5</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SION</name>
              <description>Software Input On Field.</description>
              <bitOffset>0x4</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DISABLED</name>
                  <description>Input Path is determined by functionality</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ENABLED</name>
                  <description>Force input path of pad SNVS_TAMPER9</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_TEST_MODE</name>
          <description>SW_PAD_CTL_PAD_TEST_MODE SW PAD Control Register</description>
          <addressOffset>0x30</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x30A0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_POR_B</name>
          <description>SW_PAD_CTL_PAD_POR_B SW PAD Control Register</description>
          <addressOffset>0x34</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x1B0A0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_ONOFF</name>
          <description>SW_PAD_CTL_PAD_ONOFF SW PAD Control Register</description>
          <addressOffset>0x38</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x1B0A0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_SNVS_PMIC_ON_REQ</name>
          <description>SW_PAD_CTL_PAD_SNVS_PMIC_ON_REQ SW PAD Control Register</description>
          <addressOffset>0x3C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0xB8A0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_CCM_PMIC_STBY_REQ</name>
          <description>SW_PAD_CTL_PAD_CCM_PMIC_STBY_REQ SW PAD Control Register</description>
          <addressOffset>0x40</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x20A0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_BOOT_MODE0</name>
          <description>SW_PAD_CTL_PAD_BOOT_MODE0 SW PAD Control Register</description>
          <addressOffset>0x44</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x130A0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_BOOT_MODE1</name>
          <description>SW_PAD_CTL_PAD_BOOT_MODE1 SW PAD Control Register</description>
          <addressOffset>0x48</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x130A0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_SNVS_TAMPER0</name>
          <description>SW_PAD_CTL_PAD_SNVS_TAMPER0 SW PAD Control Register</description>
          <addressOffset>0x4C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x110A0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_SNVS_TAMPER1</name>
          <description>SW_PAD_CTL_PAD_SNVS_TAMPER1 SW PAD Control Register</description>
          <addressOffset>0x50</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x110A0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_SNVS_TAMPER2</name>
          <description>SW_PAD_CTL_PAD_SNVS_TAMPER2 SW PAD Control Register</description>
          <addressOffset>0x54</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x110A0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_SNVS_TAMPER3</name>
          <description>SW_PAD_CTL_PAD_SNVS_TAMPER3 SW PAD Control Register</description>
          <addressOffset>0x58</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x110A0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_SNVS_TAMPER4</name>
          <description>SW_PAD_CTL_PAD_SNVS_TAMPER4 SW PAD Control Register</description>
          <addressOffset>0x5C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x110A0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_SNVS_TAMPER5</name>
          <description>SW_PAD_CTL_PAD_SNVS_TAMPER5 SW PAD Control Register</description>
          <addressOffset>0x60</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x110A0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_SNVS_TAMPER6</name>
          <description>SW_PAD_CTL_PAD_SNVS_TAMPER6 SW PAD Control Register</description>
          <addressOffset>0x64</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x110A0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_SNVS_TAMPER7</name>
          <description>SW_PAD_CTL_PAD_SNVS_TAMPER7 SW PAD Control Register</description>
          <addressOffset>0x68</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x110A0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_SNVS_TAMPER8</name>
          <description>SW_PAD_CTL_PAD_SNVS_TAMPER8 SW PAD Control Register</description>
          <addressOffset>0x6C</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x110A0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>SW_PAD_CTL_PAD_SNVS_TAMPER9</name>
          <description>SW_PAD_CTL_PAD_SNVS_TAMPER9 SW PAD Control Register</description>
          <addressOffset>0x70</addressOffset>
          <size>32</size>
          <access>read-write</access>
          <resetValue>0x110A0</resetValue>
          <resetMask>0xFFFFFFFF</resetMask>
          <fields>
            <field>
              <name>SRE</name>
              <description>Slew Rate Field</description>
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SRE_0_Slow_Slew_Rate</name>
                  <description>Slow Slew Rate</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>SRE_1_Fast_Slew_Rate</name>
                  <description>Fast Slew Rate</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>DSE</name>
              <description>Drive Strength Field</description>
              <bitOffset>0x3</bitOffset>
              <bitWidth>3</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>DSE_0_output_driver_disabled_</name>
                  <description>output driver disabled;</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_1_R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR_</name>
                  <description>R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_2_R0_2</name>
                  <description>R0/2</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_3_R0_3</name>
                  <description>R0/3</description>
                  <value>0x3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_4_R0_4</name>
                  <description>R0/4</description>
                  <value>0x4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_5_R0_5</name>
                  <description>R0/5</description>
                  <value>0x5</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_6_R0_6</name>
                  <description>R0/6</description>
                  <value>0x6</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>DSE_7_R0_7</name>
                  <description>R0/7</description>
                  <value>0x7</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>SPEED</name>
              <description>Speed Field</description>
              <bitOffset>0x6</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-only</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>SPEED</name>
                  <description>medium(100MHz)</description>
                  <value>0x2</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>ODE</name>
              <description>Open Drain Enable Field</description>
              <bitOffset>0xB</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>ODE_0_Open_Drain_Disabled</name>
                  <description>Open Drain Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>ODE_1_Open_Drain_Enabled</name>
                  <description>Open Drain Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PKE</name>
              <description>Pull / Keep Enable Field</description>
              <bitOffset>0xC</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PKE_0_Pull_Keeper_Disabled</name>
                  <description>Pull/Keeper Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PKE_1_Pull_Keeper_Enabled</name>
                  <description>Pull/Keeper Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUE</name>
              <description>Pull / Keep Select Field</description>
              <bitOffset>0xD</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUE_0_Keeper</name>
                  <description>Keeper</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUE_1_Pull</name>
                  <description>Pull</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>PUS</name>
              <description>Pull Up / Down Config. Field</description>
              <bitOffset>0xE</bitOffset>
              <bitWidth>2</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>PUS_0_100K_Ohm_Pull_Down</name>
                  <description>100K Ohm Pull Down</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_1_47K_Ohm_Pull_Up</name>
                  <description>47K Ohm Pull Up</description>
                  <value>0x1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_2_100K_Ohm_Pull_Up</name>
                  <description>100K Ohm Pull Up</description>
                  <value>0x2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>PUS_3_22K_Ohm_Pull_Up</name>
                  <description>22K Ohm Pull Up</description>
                  <value>0x3</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>HYS</name>
              <description>Hyst. Enable Field</description>
              <bitOffset>0x10</bitOffset>
              <bitWidth>1</bitWidth>
              <access>read-write</access>
              <enumeratedValues>
                <enumeratedValue>
                  <name>HYS_0_Hysteresis_Disabled</name>
                  <description>Hysteresis Disabled</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>HYS_1_Hysteresis_Enabled</name>
                  <description>Hysteresis Enabled</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
      </registers>
    </peripheral>
  </peripherals>
</device>