drv_pin.c 6.1 KB

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  1. /*
  2. * Copyright (c) 2006-2024, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2024-08-25 RT-Thread the first version for MCXC444.
  9. */
  10. #include "drv_pin.h"
  11. #include "fsl_common.h"
  12. #include "fsl_gpio.h"
  13. #include "fsl_port.h"
  14. #ifdef RT_USING_PIN
  15. #define GET_GPIO_PORT(x) ((x) / 32)
  16. #define GET_GPIO_PIN(x) ((x) % 32)
  17. static struct rt_pin_ops mcx_pin_ops;
  18. static GPIO_Type *GPIO_TYPE_TBL[] = {GPIOA, GPIOB, GPIOC, GPIOD, GPIOE};
  19. static PORT_Type *PORT_TYPE_TBL[] = {PORTA, PORTB, PORTC, PORTD, PORTE};
  20. static void (*pin_irq_hdr_tab[32 * 5])(void *args) = {0};
  21. static void *pin_irq_arg_tab[32 * 5] = {0};
  22. #define PIN2GPIO(x) GPIO_TYPE_TBL[GET_GPIO_PORT(x)]
  23. #define PIN2PORT(x) PORT_TYPE_TBL[GET_GPIO_PORT(x)]
  24. static void mcx_pin_mode(rt_device_t dev, rt_base_t pin, rt_uint8_t mode)
  25. {
  26. gpio_pin_config_t gpio_config = {0};
  27. PORT_SetPinMux(PIN2PORT(pin), GET_GPIO_PIN(pin), kPORT_MuxAsGpio);
  28. switch (mode)
  29. {
  30. case PIN_MODE_OUTPUT:
  31. gpio_config.pinDirection = kGPIO_DigitalOutput;
  32. gpio_config.outputLogic = 0;
  33. break;
  34. case PIN_MODE_INPUT:
  35. gpio_config.pinDirection = kGPIO_DigitalInput;
  36. //PORT_SetPinPullSelect(PIN2PORT(pin), GET_GPIO_PIN(pin), kPORT_PullDisable);
  37. break;
  38. case PIN_MODE_INPUT_PULLUP:
  39. gpio_config.pinDirection = kGPIO_DigitalInput;
  40. //PORT_SetPinPullSelect(PIN2PORT(pin), GET_GPIO_PIN(pin), kPORT_PullUp);
  41. break;
  42. case PIN_MODE_INPUT_PULLDOWN:
  43. gpio_config.pinDirection = kGPIO_DigitalInput;
  44. //PORT_SetPinPullSelect(PIN2PORT(pin), GET_GPIO_PIN(pin), kPORT_PullDown);
  45. break;
  46. case PIN_MODE_OUTPUT_OD:
  47. gpio_config.pinDirection = kGPIO_DigitalOutput;
  48. gpio_config.outputLogic = 1;
  49. //PORT_SetPinOpenDrainEnable(PIN2PORT(pin), GET_GPIO_PIN(pin), true);
  50. break;
  51. }
  52. GPIO_PinInit(PIN2GPIO(pin), GET_GPIO_PIN(pin), &gpio_config);
  53. }
  54. static void mcx_pin_write(rt_device_t dev, rt_base_t pin, rt_uint8_t value)
  55. {
  56. GPIO_PinWrite(PIN2GPIO(pin), GET_GPIO_PIN(pin), value);
  57. }
  58. static rt_ssize_t mcx_pin_read(rt_device_t dev, rt_base_t pin)
  59. {
  60. return GPIO_PinRead(PIN2GPIO(pin), GET_GPIO_PIN(pin));
  61. }
  62. static rt_err_t mcx_pin_attach_irq(struct rt_device *device, rt_base_t pin, rt_uint8_t mode, void (*hdr)(void *args), void *args)
  63. {
  64. PORT_Type *port = PIN2PORT(pin);
  65. uint32_t pin_index = GET_GPIO_PIN(pin);
  66. uint32_t port_index = GET_GPIO_PORT(pin);
  67. port_interrupt_t port_int = kPORT_InterruptOrDMADisabled;
  68. switch (mode)
  69. {
  70. case PIN_IRQ_MODE_RISING:
  71. port_int = kPORT_InterruptRisingEdge;
  72. break;
  73. case PIN_IRQ_MODE_FALLING:
  74. port_int = kPORT_InterruptFallingEdge;
  75. break;
  76. case PIN_IRQ_MODE_RISING_FALLING:
  77. port_int = kPORT_InterruptEitherEdge;
  78. break;
  79. case PIN_IRQ_MODE_HIGH_LEVEL:
  80. port_int = kPORT_InterruptLogicOne;
  81. break;
  82. case PIN_IRQ_MODE_LOW_LEVEL:
  83. port_int = kPORT_InterruptLogicZero;
  84. break;
  85. default:
  86. return RT_EINVAL;
  87. }
  88. PORT_SetPinInterruptConfig(port, pin_index, kPORT_InterruptOrDMADisabled);
  89. pin_irq_hdr_tab[port_index * 32 + pin_index] = hdr;
  90. pin_irq_arg_tab[port_index * 32 + pin_index] = args;
  91. PORT_SetPinInterruptConfig(port, pin_index, port_int);
  92. return RT_EOK;
  93. }
  94. static rt_err_t mcx_pin_detach_irq(struct rt_device *device, rt_base_t pin)
  95. {
  96. PORT_Type *port = PIN2PORT(pin);
  97. uint32_t pin_index = GET_GPIO_PIN(pin);
  98. PORT_SetPinInterruptConfig(port, pin_index, kPORT_InterruptOrDMADisabled);
  99. return RT_EOK;
  100. }
  101. static rt_err_t mcx_pin_irq_enable(struct rt_device *device, rt_base_t pin, rt_uint8_t enabled)
  102. {
  103. PORT_Type *port = PIN2PORT(pin);
  104. uint32_t pin_index = GET_GPIO_PIN(pin);
  105. IRQn_Type irqn;
  106. switch ((uint32_t)port)
  107. {
  108. case PORTA_BASE:
  109. irqn = PORTA_IRQn;
  110. break;
  111. case PORTB_BASE:
  112. irqn = NotAvail_IRQn;
  113. break;
  114. case PORTC_BASE:
  115. irqn = PORTC_PORTD_IRQn;
  116. break;
  117. case PORTD_BASE:
  118. irqn = PORTC_PORTD_IRQn;
  119. break;
  120. case PORTE_BASE:
  121. irqn = NotAvail_IRQn;
  122. break;
  123. default:
  124. return RT_ERROR;
  125. }
  126. if (enabled)
  127. {
  128. PORT_SetPinInterruptConfig(port, pin_index, kPORT_InterruptRisingEdge);
  129. PORT_ClearPinsInterruptFlags(port, (1U << pin_index));
  130. NVIC_EnableIRQ(irqn);
  131. }
  132. else
  133. {
  134. PORT_SetPinInterruptConfig(port, pin_index, kPORT_InterruptOrDMADisabled);
  135. NVIC_DisableIRQ(irqn);
  136. }
  137. return RT_EOK;
  138. }
  139. static void mcx_gpio_irq_handler(PORT_Type *port)
  140. {
  141. uint32_t pin_index;
  142. uint32_t port_index = ((uint32_t)port - PORTA_BASE) / (PORTB_BASE - PORTA_BASE);
  143. for (pin_index = 0; pin_index < 32; pin_index++)
  144. {
  145. if (PORT_GetPinsInterruptFlags(port) & (1U << pin_index))
  146. {
  147. PORT_ClearPinsInterruptFlags(port, 1U << pin_index);
  148. if (pin_irq_hdr_tab[port_index * 32 + pin_index])
  149. {
  150. pin_irq_hdr_tab[port_index * 32 + pin_index](pin_irq_arg_tab[port_index * 32 + pin_index]);
  151. }
  152. }
  153. }
  154. }
  155. void PORTA_IRQHandler(void)
  156. {
  157. rt_interrupt_enter();
  158. mcx_gpio_irq_handler(PORTA);
  159. rt_interrupt_leave();
  160. }
  161. void PORTC_PORTD_IRQHandler(void)
  162. {
  163. rt_interrupt_enter();
  164. mcx_gpio_irq_handler(PORTC);
  165. rt_interrupt_leave();
  166. }
  167. int rt_hw_pin_init(void)
  168. {
  169. int ret = RT_EOK;
  170. mcx_pin_ops.pin_mode = mcx_pin_mode;
  171. mcx_pin_ops.pin_read = mcx_pin_read;
  172. mcx_pin_ops.pin_write = mcx_pin_write;
  173. mcx_pin_ops.pin_attach_irq = mcx_pin_attach_irq;
  174. mcx_pin_ops.pin_detach_irq = mcx_pin_detach_irq;
  175. mcx_pin_ops.pin_irq_enable = mcx_pin_irq_enable;
  176. mcx_pin_ops.pin_get = RT_NULL;
  177. ret = rt_device_pin_register("pin", &mcx_pin_ops, RT_NULL);
  178. return ret;
  179. }
  180. INIT_BOARD_EXPORT(rt_hw_pin_init);
  181. #endif /* RT_USING_PIN */