startup_gcc.S 2.6 KB

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  1. /*
  2. * Copyright (c) 2006-2018, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2018/10/01 Bernard The first version
  9. * 2018/12/27 Jesven Add SMP support
  10. * 2020/6/12 Xim Port to QEMU and remove SMP support
  11. */
  12. #include <encoding.h>
  13. #include <cpuport.h>
  14. .data
  15. .global boot_hartid /* global varible rt_boot_hartid in .data section */
  16. boot_hartid:
  17. .word 0xdeadbeef
  18. .global _start
  19. .section ".start", "ax"
  20. _start:
  21. j 1f
  22. .word 0xdeadbeef
  23. .align 3
  24. .global g_wake_up
  25. g_wake_up:
  26. .dword 1
  27. .dword 0
  28. 1:
  29. /* save hartid */
  30. la t0, boot_hartid /* global varible rt_boot_hartid */
  31. mv t1, a0 /* get hartid in S-mode frome a0 register */
  32. sw t1, (t0) /* store t1 register low 4 bits in memory address which is stored in t0 */
  33. /* clear Interrupt Registers */
  34. csrw sie, 0
  35. csrw sip, 0
  36. /* set Trap Vector Base Address Register */
  37. la t0, trap_entry
  38. csrw stvec, t0
  39. li x1, 0
  40. li x2, 0
  41. li x3, 0
  42. li x4, 0
  43. li x5, 0
  44. li x6, 0
  45. li x7, 0
  46. li x8, 0
  47. li x9, 0
  48. li x10,0
  49. li x11,0
  50. li x12,0
  51. li x13,0
  52. li x14,0
  53. li x15,0
  54. li x16,0
  55. li x17,0
  56. li x18,0
  57. li x19,0
  58. li x20,0
  59. li x21,0
  60. li x22,0
  61. li x23,0
  62. li x24,0
  63. li x25,0
  64. li x26,0
  65. li x27,0
  66. li x28,0
  67. li x29,0
  68. li x30,0
  69. li x31,0
  70. /* set to disable FPU */
  71. li t0, SSTATUS_FS + SSTATUS_VS
  72. csrc sstatus, t0
  73. li t0, SSTATUS_SUM
  74. csrs sstatus, t0
  75. .option push
  76. .option norelax
  77. la gp, __global_pointer$
  78. .option pop
  79. /* removed SMP support here */
  80. la sp, __stack_start__
  81. li t0, __STACKSIZE__
  82. add sp, sp, t0
  83. /**
  84. * sscratch is always zero on kernel mode
  85. */
  86. csrw sscratch, zero
  87. call init_bss
  88. #ifdef ARCH_MM_MMU
  89. call rt_hw_mem_setup_early
  90. call rt_kmem_pvoff
  91. /* a0 := pvoff */
  92. beq a0, zero, 1f
  93. /* relocate pc */
  94. la x1, _after_pc_relocation
  95. sub x1, x1, a0
  96. ret
  97. _after_pc_relocation:
  98. /* relocate gp */
  99. sub gp, gp, a0
  100. /* relocate context: sp */
  101. la sp, __stack_start__
  102. li t0, __STACKSIZE__
  103. add sp, sp, t0
  104. /* reset s0-fp */
  105. mv s0, zero
  106. /* relocate stvec */
  107. la t0, trap_entry
  108. csrw stvec, t0
  109. 1:
  110. #endif
  111. call sbi_init
  112. call primary_cpu_entry
  113. _never_return_here:
  114. j .
  115. .global _start_link_addr
  116. _start_link_addr:
  117. .dword __text_start