drv_uart.c 9.8 KB

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  1. /*
  2. * Copyright (c) 2006-2018, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2013-05-18 Bernard The first version for LPC40xx
  9. */
  10. #include <rthw.h>
  11. #include <rtthread.h>
  12. #include <rtdevice.h>
  13. #include "board.h"
  14. #include "drv_uart.h"
  15. struct lpc_uart
  16. {
  17. LPC_USARTn_Type *USART;
  18. IRQn_Type USART_IRQn;
  19. };
  20. static rt_err_t lpc_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
  21. {
  22. RT_ASSERT(serial != RT_NULL);
  23. return RT_EOK;
  24. }
  25. static rt_err_t lpc_control(struct rt_serial_device *serial, int cmd, void *arg)
  26. {
  27. struct lpc_uart *uart;
  28. RT_ASSERT(serial != RT_NULL);
  29. uart = (struct lpc_uart *)serial->parent.user_data;
  30. switch (cmd)
  31. {
  32. case RT_DEVICE_CTRL_CLR_INT:
  33. /* disable rx irq */
  34. uart->USART->IER &= ~UART_IER_RBRINT_EN;
  35. break;
  36. case RT_DEVICE_CTRL_SET_INT:
  37. /* enable rx irq */
  38. uart->USART->IER |= UART_IER_RBRINT_EN;
  39. break;
  40. }
  41. return RT_EOK;
  42. }
  43. static int lpc_putc(struct rt_serial_device *serial, char c)
  44. {
  45. struct lpc_uart *uart;
  46. uart = (struct lpc_uart *)serial->parent.user_data;
  47. while (!(uart->USART->LSR & 0x20));
  48. uart->USART->THR = c;
  49. return 1;
  50. }
  51. static int lpc_getc(struct rt_serial_device *serial)
  52. {
  53. struct lpc_uart *uart;
  54. uart = (struct lpc_uart *)serial->parent.user_data;
  55. if (uart->USART->LSR & 0x01)
  56. {
  57. return (uart->USART->RBR);
  58. }
  59. return -1;
  60. }
  61. static const struct rt_uart_ops lpc_uart_ops =
  62. {
  63. lpc_configure,
  64. lpc_control,
  65. lpc_putc,
  66. lpc_getc,
  67. };
  68. static void _do_uart_isr(struct rt_serial_device *sdev)
  69. {
  70. struct lpc_uart *uart;
  71. uint32_t intsrc;
  72. uart = sdev->parent.user_data;
  73. /* Determine the interrupt source */
  74. intsrc = uart->USART->IIR & UART_IIR_INTID_MASK;
  75. switch (intsrc)
  76. {
  77. case UART_IIR_INTID_RLS:
  78. /* Receive Line Status interrupt */
  79. /* read the line status */
  80. intsrc = uart->USART->LSR;
  81. /* Receive an error data */
  82. if (intsrc & UART_LSR_PE)
  83. {
  84. uart->USART->RBR;
  85. }
  86. break;
  87. case UART_IIR_INTID_RDA:
  88. /* Receive data */
  89. case UART_IIR_INTID_CTI:
  90. /* Receive data timeout */
  91. /* read the data to buffer */
  92. while (uart->USART->LSR & UART_LSR_RDR)
  93. {
  94. rt_hw_serial_isr(sdev, RT_SERIAL_EVENT_RX_IND);
  95. }
  96. break;
  97. default:
  98. break;
  99. }
  100. }
  101. #if defined(RT_USING_UART0)
  102. /* UART0 device driver structure */
  103. struct lpc_uart uart0 =
  104. {
  105. LPC_USART0,
  106. USART0_IRQn,
  107. };
  108. struct rt_serial_device serial0;
  109. void UART0_IRQHandler(void)
  110. {
  111. rt_interrupt_enter();
  112. _do_uart_isr(&serial0);
  113. rt_interrupt_leave();
  114. }
  115. #endif
  116. #if defined(RT_USING_UART2)
  117. struct lpc_uart uart2 =
  118. {
  119. LPC_USART2,
  120. USART2_IRQn,
  121. };
  122. struct rt_serial_device serial2;
  123. void UART2_IRQHandler(void)
  124. {
  125. rt_interrupt_enter();
  126. _do_uart_isr(&serial2);
  127. rt_interrupt_leave();
  128. }
  129. #endif
  130. #if defined(RT_USING_UART3)
  131. struct lpc_uart uart3 =
  132. {
  133. LPC_USART3,
  134. USART3_IRQn,
  135. };
  136. struct rt_serial_device serial3;
  137. void UART3_IRQHandler(void)
  138. {
  139. rt_interrupt_enter();
  140. _do_uart_isr(&serial3);
  141. rt_interrupt_leave();
  142. }
  143. #endif
  144. void rt_hw_uart_init(void)
  145. {
  146. struct lpc_uart *uart;
  147. struct serial_configure config;
  148. #ifdef RT_USING_UART0
  149. uart = &uart0;
  150. config.baud_rate = BAUD_RATE_115200;
  151. config.bit_order = BIT_ORDER_LSB;
  152. config.data_bits = DATA_BITS_8;
  153. config.parity = PARITY_NONE;
  154. config.stop_bits = STOP_BITS_1;
  155. config.invert = NRZ_NORMAL;
  156. config.bufsz = RT_SERIAL_RB_BUFSZ;
  157. serial0.ops = &lpc_uart_ops;
  158. serial0.config = config;
  159. /* Enable GPIO register interface clock */
  160. LPC_CCU1->CLK_M4_GPIO_CFG |= 0x01;
  161. while (!(LPC_CCU1->CLK_M4_GPIO_STAT & 0x01));
  162. /* Enable USART0 peripheral clock */
  163. LPC_CCU2->CLK_APB0_USART0_CFG |= 0x01;
  164. while (!(LPC_CCU2->CLK_APB0_USART0_STAT & 0x01));
  165. /* Enable USART0 register interface clock */
  166. LPC_CCU1->CLK_M4_USART0_CFG |= 0x01;
  167. while (!(LPC_CCU1->CLK_M4_USART0_STAT & 0x01));
  168. /* Init GPIO pins */
  169. LPC_SCU->SFSP2_0 = (1 << 6) | /* Input buffer enabled */
  170. (1 << 4) | /* Pull-up disabled */
  171. (1 << 0) ; /* Pin P2_0 used as U0_TXD */
  172. LPC_SCU->SFSP2_1 = (1 << 6) | /* Input buffer enabled */
  173. (1 << 4) | /* Pull-up disabled */
  174. (1 << 0) ; /* Pin P2_1 used as U0_RXD */
  175. /* Init USART0 */
  176. uart->USART->LCR = 0x83; /* 8 bits, no Parity, 1 Stop bit */
  177. uart->USART->DLL = 0x06; /* 115200 Baudrate @ 12 MHz IRC */
  178. uart->USART->DLM = 0x00;
  179. uart->USART->FDR = 0xC1;
  180. uart->USART->LCR = 0x03; /* DLAB = 0 */
  181. /* preemption = 1, sub-priority = 1 */
  182. NVIC_SetPriority(uart->USART_IRQn, ((0x01 << 3) | 0x01));
  183. /* Enable Interrupt for UART channel */
  184. NVIC_EnableIRQ(uart->USART_IRQn);
  185. /* register UART0 device */
  186. rt_hw_serial_register(&serial0, "uart0",
  187. RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
  188. uart);
  189. #endif
  190. #ifdef RT_USING_UART2
  191. uart = &uart2;
  192. config.baud_rate = BAUD_RATE_115200;
  193. config.bit_order = BIT_ORDER_LSB;
  194. config.data_bits = DATA_BITS_8;
  195. config.parity = PARITY_NONE;
  196. config.stop_bits = STOP_BITS_1;
  197. config.invert = NRZ_NORMAL;
  198. config.bufsz = RT_SERIAL_RB_BUFSZ;
  199. serial2.ops = &lpc_uart_ops;
  200. serial2.config = config;
  201. /* Enable GPIO register interface clock */
  202. LPC_CCU1->CLK_M4_GPIO_CFG |= 0x01;
  203. while (!(LPC_CCU1->CLK_M4_GPIO_STAT & 0x01));
  204. /* Enable USART2 peripheral clock */
  205. LPC_CCU2->CLK_APB2_USART2_CFG |= 0x01;
  206. while (!(LPC_CCU2->CLK_APB2_USART2_STAT & 0x01));
  207. /* Enable USART2 register interface clock */
  208. LPC_CCU1->CLK_M4_USART2_CFG |= 0x01;
  209. while (!(LPC_CCU1->CLK_M4_USART2_STAT & 0x01));
  210. /* Init GPIO pins */
  211. LPC_SCU->SFSP1_15 = (1 << 6) | /* Input buffer enabled */
  212. (1 << 4) | /* Pull-up disabled */
  213. (1 << 0) ; /* Pin P1_15 used as U2_TXD */
  214. LPC_SCU->SFSP1_16 = (1 << 6) | /* Input buffer enabled */
  215. (1 << 4) | /* Pull-up disabled */
  216. (1 << 0) ; /* Pin P1_16 used as U2_RXD */
  217. /* Init USART2 */
  218. uart->USART->LCR = 0x83; /* 8 bits, no Parity, 1 Stop bit */
  219. uart->USART->DLL = 0x06; /* 115200 Baudrate @ 12 MHz IRC */
  220. uart->USART->DLM = 0x00;
  221. uart->USART->FDR = 0xC1;
  222. uart->USART->LCR = 0x03; /* DLAB = 0 */
  223. /* preemption = 1, sub-priority = 1 */
  224. NVIC_SetPriority(uart->USART_IRQn, ((0x01 << 3) | 0x01));
  225. /* Enable Interrupt for UART channel */
  226. NVIC_EnableIRQ(uart->USART_IRQn);
  227. /* register UART2 device */
  228. rt_hw_serial_register(&serial2, "uart2",
  229. RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
  230. uart);
  231. #endif
  232. #ifdef RT_USING_UART3
  233. uart = &uart3;
  234. config.baud_rate = BAUD_RATE_115200;
  235. config.bit_order = BIT_ORDER_LSB;
  236. config.data_bits = DATA_BITS_8;
  237. config.parity = PARITY_NONE;
  238. config.stop_bits = STOP_BITS_1;
  239. config.invert = NRZ_NORMAL;
  240. config.bufsz = RT_SERIAL_RB_BUFSZ;
  241. serial3.ops = &lpc_uart_ops;
  242. serial3.config = config;
  243. /* Enable GPIO register interface clock */
  244. LPC_CCU1->CLK_M4_GPIO_CFG |= 0x01;
  245. while (!(LPC_CCU1->CLK_M4_GPIO_STAT & 0x01));
  246. /* Enable USART3 peripheral clock */
  247. LPC_CCU2->CLK_APB2_USART3_CFG |= 0x01;
  248. while (!(LPC_CCU2->CLK_APB2_USART3_STAT & 0x01));
  249. /* Enable USART3 register interface clock */
  250. LPC_CCU1->CLK_M4_USART3_CFG |= 0x01;
  251. while (!(LPC_CCU1->CLK_M4_USART3_STAT & 0x01));
  252. /* Init GPIO pins */
  253. LPC_SCU->SFSP2_3 = (1 << 6) | /* Input buffer enabled */
  254. (1 << 4) | /* Pull-up disabled */
  255. (2 << 0) ; /* Pin P1_15 used as U2_TXD */
  256. LPC_SCU->SFSP2_4 = (1 << 6) | /* Input buffer enabled */
  257. (1 << 4) | /* Pull-up disabled */
  258. (2 << 0) ; /* Pin P1_16 used as U2_RXD */
  259. /* Init USART3 */
  260. uart->USART->LCR = 0x83; /* 8 bits, no Parity, 1 Stop bit */
  261. uart->USART->DLL = 0x06; /* 115200 Baudrate @ 12 MHz IRC */
  262. uart->USART->DLM = 0x00;
  263. uart->USART->FDR = 0xC1;
  264. uart->USART->LCR = 0x03; /* DLAB = 0 */
  265. /* preemption = 1, sub-priority = 1 */
  266. NVIC_SetPriority(uart->USART_IRQn, ((0x01 << 3) | 0x01));
  267. /* Enable Interrupt for UART channel */
  268. NVIC_EnableIRQ(uart->USART_IRQn);
  269. /* register UART2 device */
  270. rt_hw_serial_register(&serial3, "uart3",
  271. RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
  272. uart);
  273. #endif
  274. }