timer_pwm.h 35 KB

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  1. /**************************************************************************//**
  2. * @file timer_pwm.h
  3. * @version V1.00
  4. * @brief M480 series Timer PWM Controller(Timer PWM) driver header file
  5. *
  6. * @copyright (C) 2017 Nuvoton Technology Corp. All rights reserved.
  7. *****************************************************************************/
  8. #ifndef __TIMER_PWM_H__
  9. #define __TIMER_PWM_H__
  10. #ifdef __cplusplus
  11. extern "C"
  12. {
  13. #endif
  14. /** @addtogroup Standard_Driver Standard Driver
  15. @{
  16. */
  17. /** @addtogroup TIMER_PWM_Driver TIMER PWM Driver
  18. @{
  19. */
  20. /** @addtogroup TIMER_PWM_EXPORTED_CONSTANTS TIMER PWM Exported Constants
  21. @{
  22. */
  23. /*---------------------------------------------------------------------------------------------------------*/
  24. /* Output Channel Constant Definitions */
  25. /*---------------------------------------------------------------------------------------------------------*/
  26. #define TPWM_CH0 (BIT0) /*!< Indicate PWMx_CH0 \hideinitializer */
  27. #define TPWM_CH1 (BIT1) /*!< Indicate PWMx_CH1 \hideinitializer */
  28. /*---------------------------------------------------------------------------------------------------------*/
  29. /* Counter Type Constant Definitions */
  30. /*---------------------------------------------------------------------------------------------------------*/
  31. #define TPWM_UP_COUNT (0UL << TIMER_PWMCTL_CNTTYPE_Pos) /*!< Up count type \hideinitializer */
  32. #define TPWM_DOWN_COUNT (1UL << TIMER_PWMCTL_CNTTYPE_Pos) /*!< Down count type \hideinitializer */
  33. #define TPWM_UP_DOWN_COUNT (2UL << TIMER_PWMCTL_CNTTYPE_Pos) /*!< Up-Down count type \hideinitializer */
  34. /*---------------------------------------------------------------------------------------------------------*/
  35. /* Counter Mode Constant Definitions */
  36. /*---------------------------------------------------------------------------------------------------------*/
  37. #define TPWM_AUTO_RELOAD_MODE (0UL) /*!< Auto-reload mode \hideinitializer */
  38. #define TPWM_ONE_SHOT_MODE (TIMER_PWMCTL_CNTMODE_Msk) /*!< One-shot mode \hideinitializer */
  39. /*---------------------------------------------------------------------------------------------------------*/
  40. /* Output Level Constant Definitions */
  41. /*---------------------------------------------------------------------------------------------------------*/
  42. #define TPWM_OUTPUT_TOGGLE (0UL) /*!< Timer PWM output toggle \hideinitializer */
  43. #define TPWM_OUTPUT_NOTHING (1UL) /*!< Timer PWM output nothing \hideinitializer */
  44. #define TPWM_OUTPUT_LOW (2UL) /*!< Timer PWM output low \hideinitializer */
  45. #define TPWM_OUTPUT_HIGH (3UL) /*!< Timer PWM output high \hideinitializer */
  46. /*---------------------------------------------------------------------------------------------------------*/
  47. /* Trigger ADC Source Select Constant Definitions */
  48. /*---------------------------------------------------------------------------------------------------------*/
  49. #define TPWM_TRIGGER_ADC_AT_ZERO_POINT (0UL << TIMER_PWMEADCTS_TRGSEL_Pos) /*!< Timer PWM trigger ADC while counter zero point event occurred \hideinitializer */
  50. #define TPWM_TRIGGER_ADC_AT_PERIOD_POINT (1UL << TIMER_PWMEADCTS_TRGSEL_Pos) /*!< Timer PWM trigger ADC while counter period point event occurred \hideinitializer */
  51. #define TPWM_TRIGGER_ADC_AT_ZERO_OR_PERIOD_POINT (2UL << TIMER_PWMEADCTS_TRGSEL_Pos) /*!< Timer PWM trigger ADC while counter zero or period point event occurred \hideinitializer */
  52. #define TPWM_TRIGGER_ADC_AT_COMPARE_UP_COUNT_POINT (3UL << TIMER_PWMEADCTS_TRGSEL_Pos) /*!< Timer PWM trigger ADC while counter up count compare point event occurred \hideinitializer */
  53. #define TPWM_TRIGGER_ADC_AT_COMPARE_DOWN_COUNT_POINT (4UL << TIMER_PWMEADCTS_TRGSEL_Pos) /*!< Timer PWM trigger ADC while counter down count compare point event occurred \hideinitializer */
  54. /*---------------------------------------------------------------------------------------------------------*/
  55. /* Brake Control Constant Definitions */
  56. /*---------------------------------------------------------------------------------------------------------*/
  57. #define TPWM_BRAKE_SOURCE_EDGE_ACMP0 (TIMER_PWMBRKCTL_CPO0EBEN_Msk) /*!< Comparator 0 as edge-detect fault brake source \hideinitializer */
  58. #define TPWM_BRAKE_SOURCE_EDGE_ACMP1 (TIMER_PWMBRKCTL_CPO1EBEN_Msk) /*!< Comparator 1 as edge-detect fault brake source \hideinitializer */
  59. #define TPWM_BRAKE_SOURCE_EDGE_BKPIN (TIMER_PWMBRKCTL_BRKPEEN_Msk) /*!< Brake pin as edge-detect fault brake source \hideinitializer */
  60. #define TPWM_BRAKE_SOURCE_EDGE_SYS_CSS (TIMER_PWMBRKCTL_SYSEBEN_Msk | (TIMER_PWMFAILBRK_CSSBRKEN_Msk << 16)) /*!< System fail condition: clock security system detection as edge-detect fault brake source \hideinitializer */
  61. #define TPWM_BRAKE_SOURCE_EDGE_SYS_BOD (TIMER_PWMBRKCTL_SYSEBEN_Msk | (TIMER_PWMFAILBRK_BODBRKEN_Msk << 16)) /*!< System fail condition: brown-out detection as edge-detect fault brake source \hideinitializer */
  62. #define TPWM_BRAKE_SOURCE_EDGE_SYS_COR (TIMER_PWMBRKCTL_SYSEBEN_Msk | (TIMER_PWMFAILBRK_CORBRKEN_Msk << 16)) /*!< System fail condition: core lockup detection as edge-detect fault brake source \hideinitializer */
  63. #define TPWM_BRAKE_SOURCE_EDGE_SYS_RAM (TIMER_PWMBRKCTL_SYSEBEN_Msk | (TIMER_PWMFAILBRK_RAMBRKEN_Msk << 16)) /*!< System fail condition: SRAM parity error detection as edge-detect fault brake source \hideinitializer */
  64. #define TPWM_BRAKE_SOURCE_LEVEL_ACMP0 (TIMER_PWMBRKCTL_CPO0LBEN_Msk) /*!< Comparator 0 as level-detect fault brake source \hideinitializer */
  65. #define TPWM_BRAKE_SOURCE_LEVEL_ACMP1 (TIMER_PWMBRKCTL_CPO1LBEN_Msk) /*!< Comparator 1 as level-detect fault brake source \hideinitializer */
  66. #define TPWM_BRAKE_SOURCE_LEVEL_BKPIN (TIMER_PWMBRKCTL_BRKPLEN_Msk) /*!< Brake pin as level-detect fault brake source \hideinitializer */
  67. #define TPWM_BRAKE_SOURCE_LEVEL_SYS_CSS (TIMER_PWMBRKCTL_SYSLBEN_Msk | (TIMER_PWMFAILBRK_CSSBRKEN_Msk << 16)) /*!< System fail condition: clock security system detection as level-detect fault brake source \hideinitializer */
  68. #define TPWM_BRAKE_SOURCE_LEVEL_SYS_BOD (TIMER_PWMBRKCTL_SYSLBEN_Msk | (TIMER_PWMFAILBRK_BODBRKEN_Msk << 16)) /*!< System fail condition: brown-out detection as level-detect fault brake source \hideinitializer */
  69. #define TPWM_BRAKE_SOURCE_LEVEL_SYS_COR (TIMER_PWMBRKCTL_SYSLBEN_Msk | (TIMER_PWMFAILBRK_CORBRKEN_Msk << 16)) /*!< System fail condition: core lockup detection as level-detect fault brake source \hideinitializer */
  70. #define TPWM_BRAKE_SOURCE_LEVEL_SYS_RAM (TIMER_PWMBRKCTL_SYSLBEN_Msk | (TIMER_PWMFAILBRK_RAMBRKEN_Msk << 16)) /*!< System fail condition: SRAM parity error detection as level-detect fault brake source \hideinitializer */
  71. #define TPWM_BRAKE_EDGE (TIMER_PWMSWBRK_BRKETRG_Msk) /*!< Edge-detect fault brake \hideinitializer */
  72. #define TPWM_BRAKE_LEVEL (TIMER_PWMSWBRK_BRKLTRG_Msk) /*!< Level-detect fault brake \hideinitializer */
  73. /*---------------------------------------------------------------------------------------------------------*/
  74. /* Load Mode Constant Definitions */
  75. /*---------------------------------------------------------------------------------------------------------*/
  76. #define TPWM_LOAD_MODE_PERIOD (0UL) /*!< Timer PWM period load mode \hideinitializer */
  77. #define TPWM_LOAD_MODE_IMMEDIATE (TIMER_PWMCTL_IMMLDEN_Msk) /*!< Timer PWM immediately load mode \hideinitializer */
  78. #define TPWM_LOAD_MODE_CENTER (TIMER_PWMCTL_CTRLD_Msk) /*!< Timer PWM center load mode \hideinitializer */
  79. /*---------------------------------------------------------------------------------------------------------*/
  80. /* Brake Pin De-bounce Clock Source Select Constant Definitions */
  81. /*---------------------------------------------------------------------------------------------------------*/
  82. #define TPWM_BKP_DBCLK_PCLK_DIV_1 (0UL) /*!< De-bounce clock is PCLK divide by 1 \hideinitializer */
  83. #define TPWM_BKP_DBCLK_PCLK_DIV_2 (1UL) /*!< De-bounce clock is PCLK divide by 2 \hideinitializer */
  84. #define TPWM_BKP_DBCLK_PCLK_DIV_4 (2UL) /*!< De-bounce clock is PCLK divide by 4 \hideinitializer */
  85. #define TPWM_BKP_DBCLK_PCLK_DIV_8 (3UL) /*!< De-bounce clock is PCLK divide by 8 \hideinitializer */
  86. #define TPWM_BKP_DBCLK_PCLK_DIV_16 (4UL) /*!< De-bounce clock is PCLK divide by 16 \hideinitializer */
  87. #define TPWM_BKP_DBCLK_PCLK_DIV_32 (5UL) /*!< De-bounce clock is PCLK divide by 32 \hideinitializer */
  88. #define TPWM_BKP_DBCLK_PCLK_DIV_64 (6UL) /*!< De-bounce clock is PCLK divide by 64 \hideinitializer */
  89. #define TPWM_BKP_DBCLK_PCLK_DIV_128 (7UL) /*!< De-bounce clock is PCLK divide by 128 \hideinitializer */
  90. /*---------------------------------------------------------------------------------------------------------*/
  91. /* Brake Pin Source Select Constant Definitions */
  92. /*---------------------------------------------------------------------------------------------------------*/
  93. #define TPWM_TM_BRAKE0 (0UL) /*!< Brake pin source comes from TM_BRAKE0 \hideinitializer */
  94. #define TPWM_TM_BRAKE1 (1UL) /*!< Brake pin source comes from TM_BRAKE1 \hideinitializer */
  95. #define TPWM_TM_BRAKE2 (2UL) /*!< Brake pin source comes from TM_BRAKE2 \hideinitializer */
  96. #define TPWM_TM_BRAKE3 (3UL) /*!< Brake pin source comes from TM_BRAKE3 \hideinitializer */
  97. /*---------------------------------------------------------------------------------------------------------*/
  98. /* Counter Clock Source Select Constant Definitions */
  99. /*---------------------------------------------------------------------------------------------------------*/
  100. #define TPWM_CNTR_CLKSRC_TMR_CLK (0UL) /*!< Timer PWM Clock source selects to TMR_CLK \hideinitializer */
  101. #define TPWM_CNTR_CLKSRC_TIMER0_INT (1UL) /*!< Timer PWM Clock source selects to TIMER0 interrupt event \hideinitializer */
  102. #define TPWM_CNTR_CLKSRC_TIMER1_INT (2UL) /*!< Timer PWM Clock source selects to TIMER1 interrupt event \hideinitializer */
  103. #define TPWM_CNTR_CLKSRC_TIMER2_INT (3UL) /*!< Timer PWM Clock source selects to TIMER2 interrupt event \hideinitializer */
  104. #define TPWM_CNTR_CLKSRC_TIMER3_INT (4UL) /*!< Timer PWM Clock source selects to TIMER3 interrupt event \hideinitializer */
  105. /*---------------------------------------------------------------------------------------------------------*/
  106. /* Counter Synchronous Mode Constant Definitions */
  107. /*---------------------------------------------------------------------------------------------------------*/
  108. #define TPWM_CNTR_SYNC_DISABLE (0UL) /*!< Disable TIMER PWM synchronous function \hideinitializer */
  109. #define TPWM_CNTR_SYNC_START_BY_TIMER0 ((0<<TIMER_PWMSCTL_SYNCSRC_Pos) | (1<<TIMER_PWMSCTL_SYNCMODE_Pos)) /*!< PWM counter synchronous start by TIMER0 PWM \hideinitializer */
  110. #define TPWM_CNTR_SYNC_CLEAR_BY_TIMER0 ((0<<TIMER_PWMSCTL_SYNCSRC_Pos) | (3<<TIMER_PWMSCTL_SYNCMODE_Pos)) /*!< PWM counter synchronous clear by TIMER0 PWM \hideinitializer */
  111. #define TPWM_CNTR_SYNC_START_BY_TIMER2 ((1<<TIMER_PWMSCTL_SYNCSRC_Pos) | (1<<TIMER_PWMSCTL_SYNCMODE_Pos)) /*!< PWM counter synchronous start by TIMER2 PWM \hideinitializer */
  112. #define TPWM_CNTR_SYNC_CLEAR_BY_TIMER2 ((1<<TIMER_PWMSCTL_SYNCSRC_Pos) | (3<<TIMER_PWMSCTL_SYNCMODE_Pos)) /*!< PWM counter synchronous clear by TIMER2 PWM \hideinitializer */
  113. /*@}*/ /* end of group TIMER_PWM_EXPORTED_CONSTANTS */
  114. /** @addtogroup TIMER_PWM_EXPORTED_FUNCTIONS TIMER PWM Exported Functions
  115. @{
  116. */
  117. /**
  118. * @brief Enable PWM Counter Mode
  119. *
  120. * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3.
  121. *
  122. * @return None
  123. *
  124. * @details This macro is used to enable specified Timer channel as PWM counter mode, then timer counter mode is invalid.
  125. * @note All registers about time counter function will be cleared to 0 and timer clock source will be changed to PCLKx automatically after executing this macro.
  126. * \hideinitializer
  127. */
  128. #define TPWM_ENABLE_PWM_MODE(timer) ((timer)->ALTCTL = (1 << TIMER_ALTCTL_FUNCSEL_Pos))
  129. /**
  130. * @brief Disable PWM Counter Mode
  131. *
  132. * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3.
  133. *
  134. * @return None
  135. *
  136. * @details This macro is used to disable specified Timer channel as PWM counter mode, then timer counter mode is available.
  137. * @note All registers about PWM counter function will be cleared to 0 after executing this macro.
  138. * \hideinitializer
  139. */
  140. #define TPWM_DISABLE_PWM_MODE(timer) ((timer)->ALTCTL = (0 << TIMER_ALTCTL_FUNCSEL_Pos))
  141. /**
  142. * @brief Enable Independent Mode
  143. *
  144. * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3.
  145. *
  146. * @return None
  147. *
  148. * @details This macro is used to enable independent mode of TIMER PWM module and complementary mode will be disabled.
  149. * \hideinitializer
  150. */
  151. #define TPWM_ENABLE_INDEPENDENT_MODE(timer) ((timer)->PWMCTL &= ~(1 << TIMER_PWMCTL_OUTMODE_Pos))
  152. /**
  153. * @brief Enable Complementary Mode
  154. *
  155. * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3.
  156. *
  157. * @return None
  158. *
  159. * @details This macro is used to enable complementary mode of Timer PWM module and independent mode will be disabled.
  160. * \hideinitializer
  161. */
  162. #define TPWM_ENABLE_COMPLEMENTARY_MODE(timer) ((timer)->PWMCTL |= (1 << TIMER_PWMCTL_OUTMODE_Pos))
  163. /**
  164. * @brief Set Counter Type
  165. *
  166. * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3.
  167. * @param[in] type Timer PWM count type, could be one of the following type
  168. * - \ref TPWM_UP_COUNT
  169. * - \ref TPWM_DOWN_COUNT
  170. * - \ref TPWM_UP_DOWN_COUNT
  171. *
  172. * @return None
  173. *
  174. * @details This macro is used to set Timer PWM counter type.
  175. * \hideinitializer
  176. */
  177. #define TPWM_SET_COUNTER_TYPE(timer, type) ((timer)->PWMCTL = ((timer)->PWMCTL & ~TIMER_PWMCTL_CNTTYPE_Msk) | (type))
  178. /**
  179. * @brief Start PWM Counter
  180. *
  181. * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3.
  182. *
  183. * @return None
  184. *
  185. * @details This macro is used to enable PWM generator and start counter counting.
  186. * \hideinitializer
  187. */
  188. #define TPWM_START_COUNTER(timer) ((timer)->PWMCTL |= TIMER_PWMCTL_CNTEN_Msk)
  189. /**
  190. * @brief Stop PWM Counter
  191. *
  192. * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3.
  193. *
  194. * @return None
  195. *
  196. * @details This macro is used to stop PWM counter after current period is completed.
  197. * \hideinitializer
  198. */
  199. #define TPWM_STOP_COUNTER(timer) ((timer)->PWMPERIOD = 0x0)
  200. /**
  201. * @brief Set Counter Clock Prescaler
  202. *
  203. * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3.
  204. *
  205. * @param[in] prescaler Clock prescaler of specified channel. Valid values are between 0x0~0xFFF.
  206. *
  207. * @return None
  208. *
  209. * @details This macro is used to set the prescaler of specified TIMER PWM.
  210. * @note If prescaler is 0, then there is no scaling in counter clock source.
  211. * \hideinitializer
  212. */
  213. #define TPWM_SET_PRESCALER(timer, prescaler) ((timer)->PWMCLKPSC = (prescaler))
  214. /**
  215. * @brief Get Counter Clock Prescaler
  216. *
  217. * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3.
  218. *
  219. * @return Target prescaler setting, CLKPSC (TIMERx_PWMCLKPSC[11:0])
  220. *
  221. * @details Get the prescaler setting, the target counter clock divider is (CLKPSC + 1).
  222. * \hideinitializer
  223. */
  224. #define TPWM_GET_PRESCALER(timer) ((timer)->PWMCLKPSC)
  225. /**
  226. * @brief Set Counter Period
  227. *
  228. * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3.
  229. *
  230. * @param[in] period Period of specified channel. Valid values are between 0x0~0xFFFF.
  231. *
  232. * @return None
  233. *
  234. * @details This macro is used to set the period of specified TIMER PWM.
  235. * \hideinitializer
  236. */
  237. #define TPWM_SET_PERIOD(timer, period) ((timer)->PWMPERIOD = (period))
  238. /**
  239. * @brief Get Counter Period
  240. *
  241. * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3.
  242. *
  243. * @return Target period setting, PERIOD (TIMERx_PWMPERIOD[15:0])
  244. *
  245. * @details This macro is used to get the period of specified TIMER PWM.
  246. * \hideinitializer
  247. */
  248. #define TPWM_GET_PERIOD(timer) ((timer)->PWMPERIOD)
  249. /**
  250. * @brief Set Comparator Value
  251. *
  252. * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3.
  253. *
  254. * @param[in] cmp Comparator of specified channel. Valid values are between 0x0~0xFFFF.
  255. *
  256. * @return None
  257. *
  258. * @details This macro is used to set the comparator value of specified TIMER PWM.
  259. * \hideinitializer
  260. */
  261. #define TPWM_SET_CMPDAT(timer, cmp) ((timer)->PWMCMPDAT = (cmp))
  262. /**
  263. * @brief Get Comparator Value
  264. *
  265. * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3.
  266. *
  267. * @return Target comparator setting, CMPDAT (TIMERx_PWMCMPDAT[15:0])
  268. *
  269. * @details This macro is used to get the comparator value of specified TIMER PWM.
  270. * \hideinitializer
  271. */
  272. #define TPWM_GET_CMPDAT(timer) ((timer)->PWMCMPDAT)
  273. /**
  274. * @brief Clear Counter
  275. *
  276. * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3.
  277. *
  278. * @return None
  279. *
  280. * @details This macro is used to clear counter of specified TIMER PWM.
  281. * \hideinitializer
  282. */
  283. #define TPWM_CLEAR_COUNTER(timer) ((timer)->PWMCNTCLR = TIMER_PWMCNTCLR_CNTCLR_Msk)
  284. /**
  285. * @brief Software Trigger Brake Event
  286. *
  287. * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3.
  288. *
  289. * @param[in] type Type of brake trigger. Valid values are:
  290. * - \ref TPWM_BRAKE_EDGE
  291. * - \ref TPWM_BRAKE_LEVEL
  292. *
  293. * @return None
  294. *
  295. * @details This macro is used to trigger brake event by writing PWMSWBRK register.
  296. * \hideinitializer
  297. */
  298. #define TPWM_SW_TRIGGER_BRAKE(timer, type) ((timer)->PWMSWBRK = (type))
  299. /**
  300. * @brief Enable Output Function
  301. *
  302. * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3.
  303. *
  304. * @param[in] ch Enable specified channel output function. Valid values are:
  305. * - \ref TPWM_CH0
  306. * - \ref TPWM_CH1
  307. *
  308. * @return None
  309. *
  310. * @details This macro is used to enable output function of specified output pins.
  311. * @note If the corresponding bit in u32ChMask parameter is 0, then output function will be disabled in this channel.
  312. * \hideinitializer
  313. */
  314. #define TPWM_ENABLE_OUTPUT(timer, ch) ((timer)->PWMPOEN = (ch))
  315. /**
  316. * @brief Set Output Inverse
  317. *
  318. * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3.
  319. *
  320. * @param[in] ch Set specified channel output is inversed or not. Valid values are:
  321. * - \ref TPWM_CH0
  322. * - \ref TPWM_CH1
  323. *
  324. * @return None
  325. *
  326. * @details This macro is used to enable output inverse of specified output pins.
  327. * @note If u32ChMask parameter is 0, then output inverse function will be disabled.
  328. * \hideinitializer
  329. */
  330. #define TPWM_SET_OUTPUT_INVERSE(timer, ch) ((timer)->PWMPOLCTL = (ch))
  331. /**
  332. * @brief Enable Output Function
  333. *
  334. * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3.
  335. *
  336. * @param[in] ch Enable specified channel output mask function. Valid values are:
  337. * - \ref TPWM_CH0
  338. * - \ref TPWM_CH1
  339. *
  340. * @param[in] level Output to high or low on specified mask channel.
  341. *
  342. * @return None
  343. *
  344. * @details This macro is used to enable output function of specified output pins.
  345. * @note If u32ChMask parameter is 0, then output mask function will be disabled.
  346. * \hideinitializer
  347. */
  348. #define TPWM_SET_MASK_OUTPUT(timer, ch, level) do {(timer)->PWMMSKEN = (ch); (timer)->PWMMSK = (level); }while(0)
  349. /**
  350. * @brief Set Counter Synchronous Mode
  351. *
  352. * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3.
  353. *
  354. * @param[in] mode Synchronous mode. Possible options are:
  355. * - \ref TPWM_CNTR_SYNC_DISABLE
  356. * - \ref TPWM_CNTR_SYNC_START_BY_TIMER0
  357. * - \ref TPWM_CNTR_SYNC_CLEAR_BY_TIMER0
  358. * - \ref TPWM_CNTR_SYNC_START_BY_TIMER2
  359. * - \ref TPWM_CNTR_SYNC_CLEAR_BY_TIMER2
  360. *
  361. * @return None
  362. *
  363. * @details This macro is used to set counter synchronous mode of specified Timer PWM module.
  364. * @note Only support all PWM counters are synchronous by TIMER0 PWM or TIMER0~1 PWM counter synchronous by TIMER0 PWM and
  365. * TIMER2~3 PWM counter synchronous by TIMER2 PWM.
  366. * \hideinitializer
  367. */
  368. #define TPWM_SET_COUNTER_SYNC_MODE(timer, mode) ((timer)->PWMSCTL = (mode))
  369. /**
  370. * @brief Trigger Counter Synchronous
  371. *
  372. * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3.
  373. *
  374. * @return None
  375. *
  376. * @details This macro is used to trigger synchronous event by specified TIMER PWM.
  377. * @note 1. This macro is only available for TIMER0 PWM and TIMER2 PWM. \n
  378. * 2. STRGEN (PWMSTRG[0]) is write only and always read as 0.
  379. * \hideinitializer
  380. */
  381. #define TPWM_TRIGGER_COUNTER_SYNC(timer) ((timer)->PWMSTRG = TIMER_PWMSTRG_STRGEN_Msk)
  382. /**
  383. * @brief Enable Zero Event Interrupt
  384. *
  385. * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3.
  386. *
  387. * @return None
  388. *
  389. * @details This macro is used to enable the zero event interrupt function.
  390. * \hideinitializer
  391. */
  392. #define TPWM_ENABLE_ZERO_INT(timer) ((timer)->PWMINTEN0 |= TIMER_PWMINTEN0_ZIEN_Msk)
  393. /**
  394. * @brief Disable Zero Event Interrupt
  395. *
  396. * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3.
  397. *
  398. * @return None
  399. *
  400. * @details This macro is used to disable the zero event interrupt function.
  401. * \hideinitializer
  402. */
  403. #define TPWM_DISABLE_ZERO_INT(timer) ((timer)->PWMINTEN0 &= ~TIMER_PWMINTEN0_ZIEN_Msk)
  404. /**
  405. * @brief Get Zero Event Interrupt Flag
  406. *
  407. * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3.
  408. *
  409. * @retval 0 Zero event interrupt did not occur
  410. * @retval 1 Zero event interrupt occurred
  411. *
  412. * @details This macro indicates zero event occurred or not.
  413. * \hideinitializer
  414. */
  415. #define TPWM_GET_ZERO_INT_FLAG(timer) (((timer)->PWMINTSTS0 & TIMER_PWMINTSTS0_ZIF_Msk)? 1 : 0)
  416. /**
  417. * @brief Clear Zero Event Interrupt Flag
  418. *
  419. * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3.
  420. *
  421. * @return None
  422. *
  423. * @details This macro clears zero event interrupt flag.
  424. * \hideinitializer
  425. */
  426. #define TPWM_CLEAR_ZERO_INT_FLAG(timer) ((timer)->PWMINTSTS0 = TIMER_PWMINTSTS0_ZIF_Msk)
  427. /**
  428. * @brief Enable Period Event Interrupt
  429. *
  430. * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3.
  431. *
  432. * @return None
  433. *
  434. * @details This macro is used to enable the period event interrupt function.
  435. * \hideinitializer
  436. */
  437. #define TPWM_ENABLE_PERIOD_INT(timer) ((timer)->PWMINTEN0 |= TIMER_PWMINTEN0_PIEN_Msk)
  438. /**
  439. * @brief Disable Period Event Interrupt
  440. *
  441. * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3.
  442. *
  443. * @return None
  444. *
  445. * @details This macro is used to disable the period event interrupt function.
  446. * \hideinitializer
  447. */
  448. #define TPWM_DISABLE_PERIOD_INT(timer) ((timer)->PWMINTEN0 &= ~TIMER_PWMINTEN0_PIEN_Msk)
  449. /**
  450. * @brief Get Period Event Interrupt Flag
  451. *
  452. * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3.
  453. *
  454. * @retval 0 Period event interrupt did not occur
  455. * @retval 1 Period event interrupt occurred
  456. *
  457. * @details This macro indicates period event occurred or not.
  458. * \hideinitializer
  459. */
  460. #define TPWM_GET_PERIOD_INT_FLAG(timer) (((timer)->PWMINTSTS0 & TIMER_PWMINTSTS0_PIF_Msk)? 1 : 0)
  461. /**
  462. * @brief Clear Period Event Interrupt Flag
  463. *
  464. * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3.
  465. *
  466. * @return None
  467. *
  468. * @details This macro clears period event interrupt flag.
  469. * \hideinitializer
  470. */
  471. #define TPWM_CLEAR_PERIOD_INT_FLAG(timer) ((timer)->PWMINTSTS0 = TIMER_PWMINTSTS0_PIF_Msk)
  472. /**
  473. * @brief Enable Compare Up Event Interrupt
  474. *
  475. * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3.
  476. *
  477. * @return None
  478. *
  479. * @details This macro is used to enable the compare up event interrupt function.
  480. * \hideinitializer
  481. */
  482. #define TPWM_ENABLE_CMP_UP_INT(timer) ((timer)->PWMINTEN0 |= TIMER_PWMINTEN0_CMPUIEN_Msk)
  483. /**
  484. * @brief Disable Compare Up Event Interrupt
  485. *
  486. * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3.
  487. *
  488. * @return None
  489. *
  490. * @details This macro is used to disable the compare up event interrupt function.
  491. * \hideinitializer
  492. */
  493. #define TPWM_DISABLE_CMP_UP_INT(timer) ((timer)->PWMINTEN0 &= ~TIMER_PWMINTEN0_CMPUIEN_Msk)
  494. /**
  495. * @brief Get Compare Up Event Interrupt Flag
  496. *
  497. * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3.
  498. *
  499. * @retval 0 Compare up event interrupt did not occur
  500. * @retval 1 Compare up event interrupt occurred
  501. *
  502. * @details This macro indicates compare up event occurred or not.
  503. * \hideinitializer
  504. */
  505. #define TPWM_GET_CMP_UP_INT_FLAG(timer) (((timer)->PWMINTSTS0 & TIMER_PWMINTSTS0_CMPUIF_Msk)? 1 : 0)
  506. /**
  507. * @brief Clear Compare Up Event Interrupt Flag
  508. *
  509. * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3.
  510. *
  511. * @return None
  512. *
  513. * @details This macro clears compare up event interrupt flag.
  514. * \hideinitializer
  515. */
  516. #define TPWM_CLEAR_CMP_UP_INT_FLAG(timer) ((timer)->PWMINTSTS0 = TIMER_PWMINTSTS0_CMPUIF_Msk)
  517. /**
  518. * @brief Enable Compare Down Event Interrupt
  519. *
  520. * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3.
  521. *
  522. * @return None
  523. *
  524. * @details This macro is used to enable the compare down event interrupt function.
  525. * \hideinitializer
  526. */
  527. #define TPWM_ENABLE_CMP_DOWN_INT(timer) ((timer)->PWMINTEN0 |= TIMER_PWMINTEN0_CMPDIEN_Msk)
  528. /**
  529. * @brief Disable Compare Down Event Interrupt
  530. *
  531. * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3.
  532. *
  533. * @return None
  534. *
  535. * @details This macro is used to disable the compare down event interrupt function.
  536. * \hideinitializer
  537. */
  538. #define TPWM_DISABLE_CMP_DOWN_INT(timer) ((timer)->PWMINTEN0 &= ~TIMER_PWMINTEN0_CMPDIEN_Msk)
  539. /**
  540. * @brief Get Compare Down Event Interrupt Flag
  541. *
  542. * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3.
  543. *
  544. * @retval 0 Compare down event interrupt did not occur
  545. * @retval 1 Compare down event interrupt occurred
  546. *
  547. * @details This macro indicates compare down event occurred or not.
  548. * \hideinitializer
  549. */
  550. #define TPWM_GET_CMP_DOWN_INT_FLAG(timer) (((timer)->PWMINTSTS0 & TIMER_PWMINTSTS0_CMPDIF_Msk)? 1 : 0)
  551. /**
  552. * @brief Clear Compare Down Event Interrupt Flag
  553. *
  554. * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3.
  555. *
  556. * @return None
  557. *
  558. * @details This macro clears compare down event interrupt flag.
  559. * \hideinitializer
  560. */
  561. #define TPWM_CLEAR_CMP_DOWN_INT_FLAG(timer) ((timer)->PWMINTSTS0 = TIMER_PWMINTSTS0_CMPDIF_Msk)
  562. /**
  563. * @brief Get Counter Reach Maximum Count Status
  564. *
  565. * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3.
  566. *
  567. * @retval 0 Timer PWM counter never counts to maximum value
  568. * @retval 1 Timer PWM counter counts to maximum value, 0xFFFF
  569. *
  570. * @details This macro indicates Timer PWM counter has count to 0xFFFF or not.
  571. * \hideinitializer
  572. */
  573. #define TPWM_GET_REACH_MAX_CNT_STATUS(timer) (((timer)->PWMSTATUS & TIMER_PWMSTATUS_CNTMAXF_Msk)? 1 : 0)
  574. /**
  575. * @brief Clear Counter Reach Maximum Count Status
  576. *
  577. * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3.
  578. *
  579. * @return None
  580. *
  581. * @details This macro clears reach maximum count status.
  582. * \hideinitializer
  583. */
  584. #define TPWM_CLEAR_REACH_MAX_CNT_STATUS(timer) ((timer)->PWMSTATUS = TIMER_PWMSTATUS_CNTMAXF_Msk)
  585. /**
  586. * @brief Get Trigger ADC Status
  587. *
  588. * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3.
  589. *
  590. * @retval 0 Trigger ADC start conversion is not occur
  591. * @retval 1 Specified counter compare event has trigger ADC start conversion
  592. *
  593. * @details This macro is used to indicate PWM counter compare event has triggered ADC start conversion.
  594. * \hideinitializer
  595. */
  596. #define TPWM_GET_TRG_ADC_STATUS(timer) (((timer)->PWMSTATUS & TIMER_PWMSTATUS_EADCTRGF_Msk)? 1 : 0)
  597. /**
  598. * @brief Clear Trigger ADC Status
  599. *
  600. * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3.
  601. *
  602. * @return None
  603. *
  604. * @details This macro is used to clear PWM counter compare event trigger ADC status.
  605. * \hideinitializer
  606. */
  607. #define TPWM_CLEAR_TRG_ADC_STATUS(timer) ((timer)->PWMSTATUS = TIMER_PWMSTATUS_EADCTRGF_Msk)
  608. /**
  609. * @brief Set Brake Event at Brake Pin High or Low-to-High
  610. *
  611. * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3.
  612. *
  613. * @return None
  614. *
  615. * @details This macro is used to set detect brake event when external brake pin at high level or transfer from low to high.
  616. * @note The default brake pin detection is high level or from low to high.
  617. * \hideinitializer
  618. */
  619. #define TPWM_SET_BRAKE_PIN_HIGH_DETECT(timer) ((timer)->PWMBNF &= ~TIMER_PWMBNF_BRKPINV_Msk)
  620. /**
  621. * @brief Set Brake Event at Brake Pin Low or High-to-Low
  622. *
  623. * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3.
  624. *
  625. * @return None
  626. *
  627. * @details This macro is used to set detect brake event when external brake pin at low level or transfer from high to low.
  628. * \hideinitializer
  629. */
  630. #define TPWM_SET_BRAKE_PIN_LOW_DETECT(timer) ((timer)->PWMBNF |= TIMER_PWMBNF_BRKPINV_Msk)
  631. /**
  632. * @brief Set External Brake Pin Source
  633. *
  634. * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3.
  635. * @param[in] pin The external brake pin source, could be one of following source
  636. * - \ref TPWM_TM_BRAKE0
  637. * - \ref TPWM_TM_BRAKE1
  638. * - \ref TPWM_TM_BRAKE2
  639. * - \ref TPWM_TM_BRAKE3
  640. *
  641. * @return None
  642. *
  643. * @details This macro is used to set detect brake event when external brake pin at high level or transfer from low to high.
  644. * \hideinitializer
  645. */
  646. #define TPWM_SET_BRAKE_PIN_SOURCE(timer, pin) ((timer)->PWMBNF = ((timer)->PWMBNF & ~TIMER_PWMBNF_BKPINSRC_Msk) | ((pin)<<TIMER_PWMBNF_BKPINSRC_Pos))
  647. void TPWM_SetCounterClockSource(TIMER_T *timer, uint32_t u32CntClkSrc);
  648. uint32_t TPWM_ConfigOutputFreqAndDuty(TIMER_T *timer, uint32_t u32Frequency, uint32_t u32DutyCycle);
  649. void TPWM_EnableDeadTime(TIMER_T *timer, uint32_t u32DTCount);
  650. void TPWM_EnableDeadTimeWithPrescale(TIMER_T *timer, uint32_t u32DTCount);
  651. void TPWM_DisableDeadTime(TIMER_T *timer);
  652. void TPWM_EnableCounter(TIMER_T *timer);
  653. void TPWM_DisableCounter(TIMER_T *timer);
  654. void TPWM_EnableTriggerADC(TIMER_T *timer, uint32_t u32Condition);
  655. void TPWM_DisableTriggerADC(TIMER_T *timer);
  656. void TPWM_EnableFaultBrake(TIMER_T *timer, uint32_t u32CH0Level, uint32_t u32CH1Level, uint32_t u32BrakeSource);
  657. void TPWM_EnableFaultBrakeInt(TIMER_T *timer, uint32_t u32IntSource);
  658. void TPWM_DisableFaultBrakeInt(TIMER_T *timer, uint32_t u32IntSource);
  659. uint32_t TPWM_GetFaultBrakeIntFlag(TIMER_T *timer, uint32_t u32IntSource);
  660. void TPWM_ClearFaultBrakeIntFlag(TIMER_T *timer, uint32_t u32IntSource);
  661. void TPWM_SetLoadMode(TIMER_T *timer, uint32_t u32LoadMode);
  662. void TPWM_EnableBrakePinDebounce(TIMER_T *timer, uint32_t u32BrakePinSrc, uint32_t u32DebounceCnt, uint32_t u32ClkSrcSel);
  663. void TPWM_DisableBrakePinDebounce(TIMER_T *timer);
  664. void TPWM_EnableBrakePinInverse(TIMER_T *timer);
  665. void TPWM_DisableBrakePinInverse(TIMER_T *timer);
  666. void TPWM_SetBrakePinSource(TIMER_T *timer, uint32_t u32BrakePinNum);
  667. /*@}*/ /* end of group TIMER_PWM_EXPORTED_FUNCTIONS */
  668. /*@}*/ /* end of group TIMER_PWM_Driver */
  669. /*@}*/ /* end of group Standard_Driver */
  670. #ifdef __cplusplus
  671. }
  672. #endif
  673. #endif /* __TIMER_PWM_H__ */