SWM320_sdram.c 2.6 KB

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  1. /******************************************************************************************************************************************
  2. * 文件名称: SWM320_sdram.c
  3. * 功能说明: SWM320单片机的SDRAM驱动程序
  4. * 技术支持: http://www.synwit.com.cn/e/tool/gbook/?bid=1
  5. * 注意事项:
  6. * 版本日期: V1.1.0 2017年10月25日
  7. * 升级记录:
  8. *
  9. *
  10. *******************************************************************************************************************************************
  11. * @attention
  12. *
  13. * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH CODING INFORMATION
  14. * REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. AS A RESULT, SYNWIT SHALL NOT BE HELD LIABLE
  15. * FOR ANY DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT
  16. * OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION CONTAINED HEREIN IN CONN-
  17. * -ECTION WITH THEIR PRODUCTS.
  18. *
  19. * COPYRIGHT 2012 Synwit Technology
  20. *******************************************************************************************************************************************/
  21. #include "SWM320.h"
  22. #include "SWM320_sdram.h"
  23. /******************************************************************************************************************************************
  24. * 函数名称: SDRAM_Init()
  25. * 功能说明: SDRAM控制器初始化
  26. * 输 入: SDRAM_InitStructure * initStruct 包含NOR Flash控制器相关设定值的结构体
  27. * 输 出: 无
  28. * 注意事项: 无
  29. ******************************************************************************************************************************************/
  30. void SDRAM_Init(SDRAM_InitStructure *initStruct)
  31. {
  32. SYS->CLKEN |= (1 << SYS_CLKEN_SDRAM_Pos);
  33. SYS->CLKDIV &= ~SYS_CLKDIV_SDRAM_Msk;
  34. SYS->CLKDIV |= (1 << SYS_CLKDIV_SDRAM_Pos); //2分频
  35. SDRAMC->CR0 = (2 << SDRAMC_CR0_BURSTLEN_Pos) | //2 Burst Length为4
  36. (2 << SDRAMC_CR0_CASDELAY_Pos);
  37. SDRAMC->CR1 = (initStruct->CellSize << SDRAMC_CR1_CELLSIZE_Pos) |
  38. ((initStruct->CellWidth == 16 ? 0 : 1) << SDRAMC_CR1_CELL32BIT_Pos) |
  39. (initStruct->CellBank << SDRAMC_CR1_BANK_Pos) |
  40. ((initStruct->DataWidth == 16 ? 0 : 1) << SDRAMC_CR1_32BIT_Pos) |
  41. (7 << SDRAMC_CR1_TMRD_Pos) |
  42. (3 << SDRAMC_CR1_TRRD_Pos) |
  43. (7 << SDRAMC_CR1_TRAS_Pos) |
  44. (8 << SDRAMC_CR1_TRC_Pos) |
  45. (3 << SDRAMC_CR1_TRCD_Pos) |
  46. (3 << SDRAMC_CR1_TRP_Pos);
  47. SDRAMC->LATCH = 0x02;
  48. SDRAMC->REFRESH = (1 << SDRAMC_REFRESH_EN_Pos) |
  49. (0x0FA << SDRAMC_REFRESH_RATE_Pos);
  50. while (SDRAMC->REFDONE == 0);
  51. }