drv_hwtimer.c 6.4 KB

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  1. /*
  2. * Copyright (c) 2006-2018, Synwit Technology Co.,Ltd.
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2018-12-10 Zohar_Lee first version
  9. */
  10. #include <rthw.h>
  11. #include <rtthread.h>
  12. #include <rtdevice.h>
  13. #include <board.h>
  14. #define SWM320_HWTIMER_DEVICE(hwtimer) (struct swm320_hwtimer_dev *)(hwtimer)
  15. struct swm320_hwtimer_dev
  16. {
  17. rt_hwtimer_t parent;
  18. TIMR_TypeDef *hwtimer_periph;
  19. };
  20. #ifdef BSP_USING_HWTIMER0
  21. static struct swm320_hwtimer_dev hwtimer0;
  22. void TIMR0_Handler(void)
  23. {
  24. TIMR_INTClr(TIMR0);
  25. rt_device_hwtimer_isr(&hwtimer0.parent);
  26. if (HWTIMER_MODE_ONESHOT == hwtimer0.parent.mode)
  27. {
  28. TIMR_Stop(hwtimer0.hwtimer_periph);
  29. }
  30. }
  31. #endif //BSP_USING_HWTIMER0
  32. #ifdef BSP_USING_HWTIMER1
  33. static struct swm320_hwtimer_dev hwtimer1;
  34. void TIMR1_Handler(void)
  35. {
  36. TIMR_INTClr(TIMR1);
  37. rt_device_hwtimer_isr(&hwtimer1.parent);
  38. if (HWTIMER_MODE_ONESHOT == hwtimer1.parent.mode)
  39. {
  40. TIMR_Stop(hwtimer1.hwtimer_periph);
  41. }
  42. }
  43. #endif //BSP_USING_HWTIMER1
  44. #ifdef BSP_USING_HWTIMER2
  45. static struct swm320_hwtimer_dev hwtimer2;
  46. void TIMR2_Handler(void)
  47. {
  48. TIMR_INTClr(TIMR2);
  49. rt_device_hwtimer_isr(&hwtimer2.parent);
  50. if (HWTIMER_MODE_ONESHOT == hwtimer2.parent.mode)
  51. {
  52. TIMR_Stop(hwtimer2.hwtimer_periph);
  53. }
  54. }
  55. #endif //BSP_USING_HWTIMER2
  56. #ifdef BSP_USING_HWTIMER3
  57. static struct swm320_hwtimer_dev hwtimer3;
  58. void TIMR3_Handler(void)
  59. {
  60. TIMR_INTClr(TIMR3);
  61. rt_device_hwtimer_isr(&hwtimer3.parent);
  62. if (HWTIMER_MODE_ONESHOT == hwtimer3.parent.mode)
  63. {
  64. TIMR_Stop(hwtimer3.hwtimer_periph);
  65. }
  66. }
  67. #endif //BSP_USING_HWTIMER3
  68. #ifdef BSP_USING_HWTIMER4
  69. static struct swm320_hwtimer_dev hwtimer4;
  70. void TIMR4_Handler(void)
  71. {
  72. TIMR_INTClr(TIMR4);
  73. rt_device_hwtimer_isr(&hwtimer4.parent);
  74. if (HWTIMER_MODE_ONESHOT == hwtimer4.parent.mode)
  75. {
  76. TIMR_Stop(hwtimer4.hwtimer_periph);
  77. }
  78. }
  79. #endif //BSP_USING_HWTIMER4
  80. #ifdef BSP_USING_HWTIMER5
  81. static struct swm320_hwtimer_dev hwtimer5;
  82. void TIMR5_Handler(void)
  83. {
  84. TIMR_INTClr(TIMR5);
  85. rt_device_hwtimer_isr(&hwtimer5.parent);
  86. if (HWTIMER_MODE_ONESHOT == hwtimer5.parent.mode)
  87. {
  88. TIMR_Stop(hwtimer5.hwtimer_periph);
  89. }
  90. }
  91. #endif //BSP_USING_HWTIMER5
  92. static struct rt_hwtimer_info swm320_hwtimer_info =
  93. {
  94. 120000000, /*时钟源为系统时钟*/
  95. 120000000,
  96. 4294967295, /*32位计数器,2的32次方*/
  97. HWTIMER_CNTMODE_DW
  98. };
  99. static void swm320_hwtimer_init(rt_hwtimer_t *timer, rt_uint32_t state)
  100. {
  101. struct swm320_hwtimer_dev *hwtimer = SWM320_HWTIMER_DEVICE(timer->parent.user_data);
  102. RT_ASSERT(hwtimer != RT_NULL);
  103. if (1 == state)
  104. {
  105. TIMR_Init(hwtimer->hwtimer_periph,
  106. TIMR_MODE_TIMER,
  107. SystemCoreClock,
  108. 1);
  109. }
  110. hwtimer->parent.freq = SystemCoreClock;
  111. swm320_hwtimer_info.maxfreq = SystemCoreClock;
  112. swm320_hwtimer_info.minfreq = SystemCoreClock;
  113. }
  114. static rt_err_t swm320_hwtimer_start(rt_hwtimer_t *timer,
  115. rt_uint32_t cnt,
  116. rt_hwtimer_mode_t mode)
  117. {
  118. struct swm320_hwtimer_dev *hwtimer = SWM320_HWTIMER_DEVICE(timer->parent.user_data);
  119. RT_ASSERT(hwtimer != RT_NULL);
  120. TIMR_SetPeriod(hwtimer->hwtimer_periph, cnt);
  121. TIMR_Start(hwtimer->hwtimer_periph);
  122. return RT_EOK;
  123. }
  124. static void swm320_hwtimer_stop(rt_hwtimer_t *timer)
  125. {
  126. struct swm320_hwtimer_dev *hwtimer = SWM320_HWTIMER_DEVICE(timer->parent.user_data);
  127. RT_ASSERT(hwtimer != RT_NULL);
  128. TIMR_Stop(hwtimer->hwtimer_periph);
  129. }
  130. static rt_uint32_t swm320_hwtimer_count_get(rt_hwtimer_t *timer)
  131. {
  132. struct swm320_hwtimer_dev *hwtimer = SWM320_HWTIMER_DEVICE(timer->parent.user_data);
  133. uint32_t hwtimer_count = 0;
  134. RT_ASSERT(hwtimer != RT_NULL);
  135. hwtimer_count = TIMR_GetCurValue(hwtimer->hwtimer_periph);
  136. return hwtimer_count;
  137. }
  138. static rt_err_t swm320_hwtimer_control(rt_hwtimer_t *timer,
  139. rt_uint32_t cmd,
  140. void *args)
  141. {
  142. rt_err_t ret = RT_EOK;
  143. rt_uint32_t freq = 0;
  144. struct swm320_hwtimer_dev *hwtimer = SWM320_HWTIMER_DEVICE(timer->parent.user_data);
  145. RT_ASSERT(hwtimer != RT_NULL);
  146. switch (cmd)
  147. {
  148. case HWTIMER_CTRL_FREQ_SET:
  149. freq = *(rt_uint32_t*)args;
  150. if (freq != SystemCoreClock)
  151. {
  152. ret = RT_EINVAL;
  153. }
  154. break;
  155. case HWTIMER_CTRL_STOP:
  156. TIMR_Stop(hwtimer->hwtimer_periph);
  157. break;
  158. default:
  159. ret = RT_EINVAL;
  160. break;
  161. }
  162. return ret;
  163. }
  164. static struct rt_hwtimer_ops swm320_hwtimer_ops =
  165. {
  166. swm320_hwtimer_init,
  167. swm320_hwtimer_start,
  168. swm320_hwtimer_stop,
  169. swm320_hwtimer_count_get,
  170. swm320_hwtimer_control
  171. };
  172. int rt_hw_hwtimer_init(void)
  173. {
  174. rt_err_t ret = RT_EOK;
  175. #ifdef BSP_USING_HWTIMER0
  176. hwtimer0.hwtimer_periph = TIMR0;
  177. hwtimer0.parent.info = &swm320_hwtimer_info;
  178. hwtimer0.parent.ops = &swm320_hwtimer_ops;
  179. ret = rt_device_hwtimer_register(&hwtimer0.parent, "timer0", &hwtimer0);
  180. #endif //BSP_USING_HWTIMER0
  181. #ifdef BSP_USING_HWTIMER1
  182. hwtimer1.hwtimer_periph = TIMR1;
  183. hwtimer1.parent.info = &swm320_hwtimer_info;
  184. hwtimer1.parent.ops = &swm320_hwtimer_ops;
  185. ret = rt_device_hwtimer_register(&hwtimer1.parent, "timer1", &hwtimer1);
  186. #endif //BSP_USING_HWTIMER1
  187. #ifdef BSP_USING_HWTIMER2
  188. hwtimer2.hwtimer_periph = TIMR2;
  189. hwtimer2.parent.info = &swm320_hwtimer_info;
  190. hwtimer2.parent.ops = &swm320_hwtimer_ops;
  191. ret = rt_device_hwtimer_register(&hwtimer2.parent, "timer2", &hwtimer2);
  192. #endif //BSP_USING_HWTIMER2
  193. #ifdef BSP_USING_HWTIMER3
  194. hwtimer3.hwtimer_periph = TIMR3;
  195. hwtimer3.parent.info = &swm320_hwtimer_info;
  196. hwtimer3.parent.ops = &swm320_hwtimer_ops;
  197. ret = rt_device_hwtimer_register(&hwtimer3.parent, "timer3", &hwtimer3);
  198. #endif //BSP_USING_HWTIMER3
  199. #ifdef BSP_USING_HWTIMER4
  200. hwtimer4.hwtimer_periph = TIMR4;
  201. hwtimer4.parent.info = &swm320_hwtimer_info;
  202. hwtimer4.parent.ops = &swm320_hwtimer_ops;
  203. ret = rt_device_hwtimer_register(&hwtimer4.parent, "timer4", &hwtimer4);
  204. #endif //BSP_USING_HWTIMER4
  205. #ifdef BSP_USING_HWTIMER5
  206. hwtimer5.hwtimer_periph = TIMR5;
  207. hwtimer5.parent.info = &swm320_hwtimer_info;
  208. hwtimer5.parent.ops = &swm320_hwtimer_ops;
  209. ret = rt_device_hwtimer_register(&hwtimer5.parent, "timer5", &hwtimer5);
  210. #endif //BSP_USING_HWTIMER5
  211. return ret;
  212. }
  213. INIT_BOARD_EXPORT(rt_hw_hwtimer_init);