drv_sram.c 1.2 KB

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  1. /*
  2. * Copyright (c) 2006-2018, Synwit Technology Co.,Ltd.
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2018-05-31 ZYH first version
  9. * 2018-12-10 Zohar_Lee format file
  10. */
  11. #include <board.h>
  12. #include <rtthread.h>
  13. #include <rtdevice.h>
  14. #include <SWM320_port.h>
  15. #include <rthw.h>
  16. int rt_hw_sram_init(void)
  17. {
  18. int i;
  19. PORT->PORTP_SEL0 = 0xAAAAAAAA; /* PP0-23 => ADDR0-23 */
  20. PORT->PORTP_SEL1 = 0xAAAA;
  21. PORT->PORTM_SEL0 = 0xAAAAAAAA; /* PM0-15 => DATA15-0 */
  22. PORT->PORTM_INEN |= 0xFFFF;
  23. PORT->PORTM_SEL1 = 0x2AA; /* PM16 => OEN、PM17 => WEN、PM18 => NORFL_CSN、PM19 => SDRAM_CSN、PM20 => SRAM_CSN、PM21 => SDRAM_CKE */
  24. /* 配置SRAM前需要刷新下SDRAM控制器 */
  25. SYS->CLKEN |= (1 << SYS_CLKEN_SDRAM_Pos);
  26. while (SDRAMC->REFDONE == 0);
  27. SDRAMC->REFRESH &= ~(1 << SDRAMC_REFRESH_EN_Pos);
  28. for (i = 0; i < 1000; i++)
  29. {
  30. }
  31. SYS->CLKEN &= ~(1 << SYS_CLKEN_SDRAM_Pos);
  32. SYS->CLKEN |= (1 << SYS_CLKEN_RAMC_Pos);
  33. SRAMC->CR = (9 << SRAMC_CR_RWTIME_Pos) |
  34. (0 << SRAMC_CR_BYTEIF_Pos) | // 16位接口
  35. (0 << SRAMC_CR_HBLBDIS_Pos); // 使能字节、半字访问
  36. return 0;
  37. }