arc_timer.c 5.1 KB

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  1. /* ------------------------------------------
  2. * Copyright (c) 2016, Synopsys, Inc. All rights reserved.
  3. * Redistribution and use in source and binary forms, with or without modification,
  4. * are permitted provided that the following conditions are met:
  5. * 1) Redistributions of source code must retain the above copyright notice, this
  6. * list of conditions and the following disclaimer.
  7. * 2) Redistributions in binary form must reproduce the above copyright notice,
  8. * this list of conditions and the following disclaimer in the documentation and/or
  9. * other materials provided with the distribution.
  10. * 3) Neither the name of the Synopsys, Inc., nor the names of its contributors may
  11. * be used to endorse or promote products derived from this software without
  12. * specific prior written permission.
  13. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
  14. * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  15. * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  16. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
  17. * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  18. * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  19. * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  20. * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  21. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  22. * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  23. *
  24. * \version 2016.05
  25. * \date 2014-07-15
  26. * \author Wayne Ren(Wei.Ren@synopsys.com)
  27. --------------------------------------------- */
  28. /**
  29. * \file
  30. * \ingroup ARC_HAL_MISC_TIMER
  31. * \brief implementation of internal timer related functions
  32. * \todo RTC support should be improved if RTC is enabled
  33. */
  34. #include "inc/arc/arc_timer.h"
  35. #include "inc/arc/arc.h"
  36. #include "inc/arc/arc_builtin.h"
  37. /**
  38. * \brief check whether the specific timer present
  39. * \param[in] no timer number
  40. * \retval 1 present
  41. * \retval 0 not present
  42. */
  43. int32_t arc_timer_present(const uint32_t no)
  44. {
  45. uint32_t bcr = _arc_aux_read(AUX_BCR_TIMERS);
  46. switch (no) {
  47. case TIMER_0:
  48. bcr = (bcr >> 8) & 1;
  49. break;
  50. case TIMER_1:
  51. bcr = (bcr >> 9) & 1;
  52. break;
  53. case TIMER_RTC:
  54. bcr = (bcr >> 10) & 1;
  55. break;
  56. default:
  57. bcr = 0;
  58. /* illegal argument so return false */
  59. break;
  60. }
  61. return (int)bcr;
  62. }
  63. /**
  64. * \brief start the specific timer
  65. * \param[in] no timer number
  66. * \param[in] mode timer mode
  67. * \param[in] val timer limit value (not for RTC)
  68. * \return 0 success, -1 failure
  69. */
  70. int32_t arc_timer_start(const uint32_t no, const uint32_t mode, const uint32_t val)
  71. {
  72. if (arc_timer_present(no) == 0) {
  73. return -1;
  74. }
  75. switch (no) {
  76. case TIMER_0:
  77. _arc_aux_write(AUX_TIMER0_CTRL, 0);
  78. _arc_aux_write(AUX_TIMER0_LIMIT, val);
  79. _arc_aux_write(AUX_TIMER0_CTRL, mode);
  80. _arc_aux_write(AUX_TIMER0_CNT, 0);
  81. break;
  82. case TIMER_1:
  83. _arc_aux_write(AUX_TIMER1_CTRL, 0);
  84. _arc_aux_write(AUX_TIMER1_LIMIT, val);
  85. _arc_aux_write(AUX_TIMER1_CTRL, mode);
  86. _arc_aux_write(AUX_TIMER1_CNT, 0);
  87. break;
  88. case TIMER_RTC:
  89. _arc_aux_write(AUX_RTC_CTRL, mode);
  90. break;
  91. default:
  92. return -1;
  93. }
  94. return 0;
  95. }
  96. /**
  97. * \brief stop and clear the specific timer
  98. *
  99. * \param[in] no timer number
  100. * \return 0 success, -1 failure
  101. */
  102. int32_t arc_timer_stop(const uint32_t no)
  103. {
  104. if (arc_timer_present(no) == 0) {
  105. return -1;
  106. }
  107. switch (no) {
  108. case TIMER_0 :
  109. _arc_aux_write(AUX_TIMER0_CTRL, 0);
  110. _arc_aux_write(AUX_TIMER0_LIMIT,0);
  111. _arc_aux_write(AUX_TIMER0_CNT, 0);
  112. break;
  113. case TIMER_1:
  114. _arc_aux_write(AUX_TIMER1_CTRL, 0);
  115. _arc_aux_write(AUX_TIMER1_LIMIT,0);
  116. _arc_aux_write(AUX_TIMER1_CNT, 0);
  117. break;
  118. case TIMER_RTC:
  119. _arc_aux_write(AUX_RTC_CTRL, TIMER_RTC_CLEAR);
  120. break;
  121. default:
  122. return -1;
  123. }
  124. return 0;
  125. }
  126. /**
  127. * \brief get timer current tick
  128. *
  129. * \param[in] no timer number
  130. * \param[out] val, timer value
  131. * \return 0 success, -1 failure
  132. */
  133. int32_t arc_timer_current(const uint32_t no, void *val)
  134. {
  135. if (arc_timer_present(no) == 0) {
  136. return -1;
  137. }
  138. switch (no) {
  139. case TIMER_0 :
  140. *((uint32_t *)val) = _arc_aux_read(AUX_TIMER0_CNT);
  141. break;
  142. case TIMER_1 :
  143. *((uint32_t *)val) = _arc_aux_read(AUX_TIMER1_CNT);
  144. break;
  145. case TIMER_RTC:
  146. *((uint64_t *)val) = _arc_aux_read(AUX_RTC_LOW);
  147. break;
  148. default :
  149. return -1;
  150. }
  151. return 0;
  152. }
  153. /**
  154. * \brief clear the interrupt pending bit of timer
  155. *
  156. * \param[in] no timer number
  157. * \return 0 success, -1 failure
  158. */
  159. int32_t arc_timer_int_clear(const uint32_t no)
  160. {
  161. uint32_t val;
  162. if (arc_timer_present(no) == 0) {
  163. return -1;
  164. }
  165. switch (no) {
  166. case TIMER_0 :
  167. val = _arc_aux_read(AUX_TIMER0_CTRL);
  168. val &= ~TIMER_CTRL_IP;
  169. _arc_aux_write(AUX_TIMER0_CTRL, val);
  170. break;
  171. case TIMER_1 :
  172. val = _arc_aux_read(AUX_TIMER1_CTRL);
  173. val &= ~TIMER_CTRL_IP;
  174. _arc_aux_write(AUX_TIMER1_CTRL, val);
  175. break;
  176. default :
  177. return -1;
  178. }
  179. return 0;
  180. }
  181. /**
  182. * \brief init internal timer
  183. */
  184. void arc_timer_init(void)
  185. {
  186. arc_timer_stop(TIMER_0);
  187. arc_timer_stop(TIMER_1);
  188. arc_timer_stop(TIMER_RTC);
  189. }