pin_mux.c 14 KB

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  1. /***********************************************************************************************************************
  2. * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
  3. * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
  4. **********************************************************************************************************************/
  5. /*
  6. * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
  7. !!GlobalInfo
  8. product: Pins v9.0
  9. processor: MIMXRT1052xxxxB
  10. package_id: MIMXRT1052DVL6B
  11. mcu_data: ksdk2_0
  12. processor_version: 9.0.0
  13. board: IMXRT1050-EVKB
  14. pin_labels:
  15. - {pin_num: G11, pin_signal: GPIO_AD_B0_03, label: BSP_BEEP}
  16. - {pin_num: L13, pin_signal: GPIO_AD_B1_10, label: BSP_RS485_RE, identifier: CSI_D7}
  17. - {pin_num: J13, pin_signal: GPIO_AD_B1_11, label: BSP_DS18B20, identifier: CSI_D6}
  18. - {pin_num: K12, pin_signal: GPIO_AD_B1_05, label: BSP_AP3216C_INT, identifier: CSI_MCLK}
  19. * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
  20. */
  21. #include "fsl_common.h"
  22. #include "fsl_xbara.h"
  23. #include "fsl_iomuxc.h"
  24. #include "fsl_gpio.h"
  25. #include "pin_mux.h"
  26. /* FUNCTION ************************************************************************************************************
  27. *
  28. * Function Name : BOARD_InitBootPins
  29. * Description : Calls initialization functions.
  30. *
  31. * END ****************************************************************************************************************/
  32. void BOARD_InitBootPins(void) {
  33. }
  34. /*
  35. * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
  36. BOARD_InitPins:
  37. - options: {callFromInitBoot: 'false', coreID: core0, enableClock: 'true'}
  38. - pin_list:
  39. - {pin_num: K14, peripheral: LPUART1, signal: TX, pin_signal: GPIO_AD_B0_12}
  40. - {pin_num: L14, peripheral: LPUART1, signal: RX, pin_signal: GPIO_AD_B0_13}
  41. - {pin_num: J1, peripheral: USDHC1, signal: 'usdhc_data, 0', pin_signal: GPIO_SD_B0_02}
  42. - {pin_num: K1, peripheral: USDHC1, signal: 'usdhc_data, 1', pin_signal: GPIO_SD_B0_03}
  43. - {pin_num: H2, peripheral: USDHC1, signal: 'usdhc_data, 2', pin_signal: GPIO_SD_B0_04}
  44. - {pin_num: J2, peripheral: USDHC1, signal: 'usdhc_data, 3', pin_signal: GPIO_SD_B0_05}
  45. - {pin_num: J3, peripheral: USDHC1, signal: usdhc_clk, pin_signal: GPIO_SD_B0_01}
  46. - {pin_num: J4, peripheral: USDHC1, signal: usdhc_cmd, pin_signal: GPIO_SD_B0_00}
  47. - {pin_num: D13, peripheral: USDHC1, signal: usdhc_cd_b, pin_signal: GPIO_B1_12}
  48. - {pin_num: M3, peripheral: PWM2, signal: 'A, 3', pin_signal: GPIO_SD_B1_02}
  49. - {pin_num: L5, peripheral: GPIO3, signal: 'gpio_io, 00', pin_signal: GPIO_SD_B1_00, direction: OUTPUT, gpio_init_state: 'true', software_input_on: Enable, open_drain: Enable}
  50. - {pin_num: M5, peripheral: GPIO3, signal: 'gpio_io, 01', pin_signal: GPIO_SD_B1_01, direction: OUTPUT, gpio_init_state: 'true', software_input_on: Enable, open_drain: Enable}
  51. - {pin_num: J14, peripheral: CSI, signal: 'csi_data, 02', pin_signal: GPIO_AD_B1_15}
  52. - {pin_num: G12, peripheral: CSI, signal: 'csi_data, 03', pin_signal: GPIO_AD_B1_14}
  53. - {pin_num: H11, peripheral: CSI, signal: 'csi_data, 04', pin_signal: GPIO_AD_B1_13}
  54. - {pin_num: H12, peripheral: CSI, signal: 'csi_data, 05', pin_signal: GPIO_AD_B1_12}
  55. - {pin_num: J13, peripheral: CSI, signal: 'csi_data, 06', pin_signal: GPIO_AD_B1_11}
  56. - {pin_num: L13, peripheral: CSI, signal: 'csi_data, 07', pin_signal: GPIO_AD_B1_10}
  57. - {pin_num: M13, peripheral: CSI, signal: 'csi_data, 08', pin_signal: GPIO_AD_B1_09}
  58. - {pin_num: H13, peripheral: CSI, signal: 'csi_data, 09', pin_signal: GPIO_AD_B1_08}
  59. - {pin_num: L12, peripheral: CSI, signal: csi_pixclk, pin_signal: GPIO_AD_B1_04}
  60. - {pin_num: K10, peripheral: CSI, signal: csi_hsync, pin_signal: GPIO_AD_B1_07}
  61. - {pin_num: J12, peripheral: CSI, signal: csi_vsync, pin_signal: GPIO_AD_B1_06}
  62. - {pin_num: H14, peripheral: ADC1, signal: 'IN, 3', pin_signal: GPIO_AD_B0_14}
  63. - {pin_num: M12, peripheral: ADC1, signal: 'IN, 8', pin_signal: GPIO_AD_B1_03}
  64. - {pin_num: L11, peripheral: ADC1, signal: 'IN, 7', pin_signal: GPIO_AD_B1_02}
  65. - {pin_num: K11, peripheral: LPI2C1, signal: SDA, pin_signal: GPIO_AD_B1_01}
  66. - {pin_num: J11, peripheral: LPI2C1, signal: SCL, pin_signal: GPIO_AD_B1_00}
  67. - {pin_num: A12, peripheral: GPIO2, signal: 'gpio_io, 24', pin_signal: GPIO_B1_08, direction: INPUT}
  68. - {pin_num: B12, peripheral: GPIO2, signal: 'gpio_io, 23', pin_signal: GPIO_B1_07, direction: INPUT}
  69. - {pin_num: A13, peripheral: GPIO2, signal: 'gpio_io, 25', pin_signal: GPIO_B1_09, direction: INPUT}
  70. - {pin_num: A8, peripheral: PWM2, signal: 'A, 0', pin_signal: GPIO_B0_06}
  71. - {pin_num: A9, peripheral: PWM2, signal: 'B, 0', pin_signal: GPIO_B0_07}
  72. - {pin_num: B9, peripheral: PWM2, signal: 'A, 1', pin_signal: GPIO_B0_08}
  73. - {pin_num: C9, peripheral: PWM2, signal: 'B, 1', pin_signal: GPIO_B0_09}
  74. - {pin_num: D9, peripheral: PWM2, signal: 'A, 2', pin_signal: GPIO_B0_10}
  75. - {pin_num: A10, peripheral: PWM2, signal: 'B, 2', pin_signal: GPIO_B0_11, identifier: ''}
  76. - {pin_num: C10, peripheral: GPIO2, signal: 'gpio_io, 12', pin_signal: GPIO_B0_12, direction: OUTPUT}
  77. - {pin_num: B13, peripheral: GPIO2, signal: 'gpio_io, 26', pin_signal: GPIO_B1_10, direction: INPUT}
  78. - {pin_num: E7, peripheral: LPSPI4, signal: SDI, pin_signal: GPIO_B0_01}
  79. - {pin_num: E8, peripheral: LPSPI4, signal: SDO, pin_signal: GPIO_B0_02}
  80. - {pin_num: D8, peripheral: LPSPI4, signal: SCK, pin_signal: GPIO_B0_03}
  81. - {pin_num: D7, peripheral: LPSPI4, signal: PCS0, pin_signal: GPIO_B0_00}
  82. - {pin_num: D11, peripheral: LPSPI4, signal: PCS1, pin_signal: GPIO_B1_03}
  83. - {pin_num: C11, peripheral: LPSPI4, signal: PCS2, pin_signal: GPIO_B1_02}
  84. - {pin_num: C13, peripheral: GPIO2, signal: 'gpio_io, 27', pin_signal: GPIO_B1_11, direction: OUTPUT}
  85. - {pin_num: C12, peripheral: GPIO2, signal: 'gpio_io, 22', pin_signal: GPIO_B1_06, direction: OUTPUT}
  86. - {pin_num: E12, peripheral: GPIO2, signal: 'gpio_io, 20', pin_signal: GPIO_B1_04, direction: OUTPUT}
  87. - {pin_num: D12, peripheral: GPIO2, signal: 'gpio_io, 21', pin_signal: GPIO_B1_05, direction: INPUT}
  88. - {pin_num: D10, peripheral: ENC1, signal: 'PHASE, A', pin_signal: GPIO_B0_13}
  89. - {pin_num: E10, peripheral: ENC1, signal: 'PHASE, B', pin_signal: GPIO_B0_14}
  90. - {pin_num: A11, peripheral: LPUART4, signal: TX, pin_signal: GPIO_B1_00}
  91. - {pin_num: B11, peripheral: LPUART4, signal: RX, pin_signal: GPIO_B1_01}
  92. * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
  93. */
  94. /* FUNCTION ************************************************************************************************************
  95. *
  96. * Function Name : BOARD_InitPins
  97. * Description : Configures pin routing and optionally pin electrical features.
  98. *
  99. * END ****************************************************************************************************************/
  100. void BOARD_InitPins(void) {
  101. CLOCK_EnableClock(kCLOCK_Iomuxc);
  102. CLOCK_EnableClock(kCLOCK_Xbar1);
  103. /* GPIO configuration of LCDIF_D8 on GPIO_B0_12 (pin C10) */
  104. gpio_pin_config_t LCDIF_D8_config = {
  105. .direction = kGPIO_DigitalOutput,
  106. .outputLogic = 0U,
  107. .interruptMode = kGPIO_NoIntmode
  108. };
  109. /* Initialize GPIO functionality on GPIO_B0_12 (pin C10) */
  110. GPIO_PinInit(GPIO2, 12U, &LCDIF_D8_config);
  111. /* GPIO configuration of ENET_RXD0 on GPIO_B1_04 (pin E12) */
  112. gpio_pin_config_t ENET_RXD0_config = {
  113. .direction = kGPIO_DigitalOutput,
  114. .outputLogic = 0U,
  115. .interruptMode = kGPIO_NoIntmode
  116. };
  117. /* Initialize GPIO functionality on GPIO_B1_04 (pin E12) */
  118. GPIO_PinInit(GPIO2, 20U, &ENET_RXD0_config);
  119. /* GPIO configuration of ENET_RXD1 on GPIO_B1_05 (pin D12) */
  120. gpio_pin_config_t ENET_RXD1_config = {
  121. .direction = kGPIO_DigitalInput,
  122. .outputLogic = 0U,
  123. .interruptMode = kGPIO_NoIntmode
  124. };
  125. /* Initialize GPIO functionality on GPIO_B1_05 (pin D12) */
  126. GPIO_PinInit(GPIO2, 21U, &ENET_RXD1_config);
  127. /* GPIO configuration of ENET_CRS_DV on GPIO_B1_06 (pin C12) */
  128. gpio_pin_config_t ENET_CRS_DV_config = {
  129. .direction = kGPIO_DigitalOutput,
  130. .outputLogic = 0U,
  131. .interruptMode = kGPIO_NoIntmode
  132. };
  133. /* Initialize GPIO functionality on GPIO_B1_06 (pin C12) */
  134. GPIO_PinInit(GPIO2, 22U, &ENET_CRS_DV_config);
  135. /* GPIO configuration of ENET_TXD0 on GPIO_B1_07 (pin B12) */
  136. gpio_pin_config_t ENET_TXD0_config = {
  137. .direction = kGPIO_DigitalInput,
  138. .outputLogic = 0U,
  139. .interruptMode = kGPIO_NoIntmode
  140. };
  141. /* Initialize GPIO functionality on GPIO_B1_07 (pin B12) */
  142. GPIO_PinInit(GPIO2, 23U, &ENET_TXD0_config);
  143. /* GPIO configuration of ENET_TXD1 on GPIO_B1_08 (pin A12) */
  144. gpio_pin_config_t ENET_TXD1_config = {
  145. .direction = kGPIO_DigitalInput,
  146. .outputLogic = 0U,
  147. .interruptMode = kGPIO_NoIntmode
  148. };
  149. /* Initialize GPIO functionality on GPIO_B1_08 (pin A12) */
  150. GPIO_PinInit(GPIO2, 24U, &ENET_TXD1_config);
  151. /* GPIO configuration of ENET_TXEN on GPIO_B1_09 (pin A13) */
  152. gpio_pin_config_t ENET_TXEN_config = {
  153. .direction = kGPIO_DigitalInput,
  154. .outputLogic = 0U,
  155. .interruptMode = kGPIO_NoIntmode
  156. };
  157. /* Initialize GPIO functionality on GPIO_B1_09 (pin A13) */
  158. GPIO_PinInit(GPIO2, 25U, &ENET_TXEN_config);
  159. /* GPIO configuration of ENET_TX_CLK on GPIO_B1_10 (pin B13) */
  160. gpio_pin_config_t ENET_TX_CLK_config = {
  161. .direction = kGPIO_DigitalInput,
  162. .outputLogic = 0U,
  163. .interruptMode = kGPIO_NoIntmode
  164. };
  165. /* Initialize GPIO functionality on GPIO_B1_10 (pin B13) */
  166. GPIO_PinInit(GPIO2, 26U, &ENET_TX_CLK_config);
  167. /* GPIO configuration of ENET_RXER on GPIO_B1_11 (pin C13) */
  168. gpio_pin_config_t ENET_RXER_config = {
  169. .direction = kGPIO_DigitalOutput,
  170. .outputLogic = 0U,
  171. .interruptMode = kGPIO_NoIntmode
  172. };
  173. /* Initialize GPIO functionality on GPIO_B1_11 (pin C13) */
  174. GPIO_PinInit(GPIO2, 27U, &ENET_RXER_config);
  175. /* GPIO configuration of FlexSPI_D3_B on GPIO_SD_B1_00 (pin L5) */
  176. gpio_pin_config_t FlexSPI_D3_B_config = {
  177. .direction = kGPIO_DigitalOutput,
  178. .outputLogic = 1U,
  179. .interruptMode = kGPIO_NoIntmode
  180. };
  181. /* Initialize GPIO functionality on GPIO_SD_B1_00 (pin L5) */
  182. GPIO_PinInit(GPIO3, 0U, &FlexSPI_D3_B_config);
  183. /* GPIO configuration of FlexSPI_D2_B on GPIO_SD_B1_01 (pin M5) */
  184. gpio_pin_config_t FlexSPI_D2_B_config = {
  185. .direction = kGPIO_DigitalOutput,
  186. .outputLogic = 1U,
  187. .interruptMode = kGPIO_NoIntmode
  188. };
  189. /* Initialize GPIO functionality on GPIO_SD_B1_01 (pin M5) */
  190. GPIO_PinInit(GPIO3, 1U, &FlexSPI_D2_B_config);
  191. IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_12_LPUART1_TX, 0U);
  192. IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_13_LPUART1_RX, 0U);
  193. IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_14_GPIO1_IO14, 0U);
  194. IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_00_LPI2C1_SCL, 0U);
  195. IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_01_LPI2C1_SDA, 0U);
  196. IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_02_GPIO1_IO18, 0U);
  197. IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_03_GPIO1_IO19, 0U);
  198. IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_04_CSI_PIXCLK, 0U);
  199. IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_06_CSI_VSYNC, 0U);
  200. IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_07_CSI_HSYNC, 0U);
  201. IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_08_CSI_DATA09, 0U);
  202. IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_09_CSI_DATA08, 0U);
  203. IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_10_CSI_DATA07, 0U);
  204. IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_11_CSI_DATA06, 0U);
  205. IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_12_CSI_DATA05, 0U);
  206. IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_13_CSI_DATA04, 0U);
  207. IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_14_CSI_DATA03, 0U);
  208. IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_15_CSI_DATA02, 0U);
  209. IOMUXC_SetPinMux(IOMUXC_GPIO_B0_00_LPSPI4_PCS0, 0U);
  210. IOMUXC_SetPinMux(IOMUXC_GPIO_B0_01_LPSPI4_SDI, 0U);
  211. IOMUXC_SetPinMux(IOMUXC_GPIO_B0_02_LPSPI4_SDO, 0U);
  212. IOMUXC_SetPinMux(IOMUXC_GPIO_B0_03_LPSPI4_SCK, 0U);
  213. IOMUXC_SetPinMux(IOMUXC_GPIO_B0_06_FLEXPWM2_PWMA00, 0U);
  214. IOMUXC_SetPinMux(IOMUXC_GPIO_B0_07_FLEXPWM2_PWMB00, 0U);
  215. IOMUXC_SetPinMux(IOMUXC_GPIO_B0_08_FLEXPWM2_PWMA01, 0U);
  216. IOMUXC_SetPinMux(IOMUXC_GPIO_B0_09_FLEXPWM2_PWMB01, 0U);
  217. IOMUXC_SetPinMux(IOMUXC_GPIO_B0_10_FLEXPWM2_PWMA02, 0U);
  218. IOMUXC_SetPinMux(IOMUXC_GPIO_B0_11_FLEXPWM2_PWMB02, 0U);
  219. IOMUXC_SetPinMux(IOMUXC_GPIO_B0_12_GPIO2_IO12, 0U);
  220. IOMUXC_SetPinMux(IOMUXC_GPIO_B0_13_XBAR1_INOUT11, 0U);
  221. IOMUXC_SetPinMux(IOMUXC_GPIO_B0_14_XBAR1_INOUT12, 0U);
  222. IOMUXC_SetPinMux(IOMUXC_GPIO_B1_00_LPUART4_TX, 0U);
  223. IOMUXC_SetPinMux(IOMUXC_GPIO_B1_01_LPUART4_RX, 0U);
  224. IOMUXC_SetPinMux(IOMUXC_GPIO_B1_02_LPSPI4_PCS2, 0U);
  225. IOMUXC_SetPinMux(IOMUXC_GPIO_B1_03_LPSPI4_PCS1, 0U);
  226. IOMUXC_SetPinMux(IOMUXC_GPIO_B1_04_GPIO2_IO20, 0U);
  227. IOMUXC_SetPinMux(IOMUXC_GPIO_B1_05_GPIO2_IO21, 0U);
  228. IOMUXC_SetPinMux(IOMUXC_GPIO_B1_06_GPIO2_IO22, 0U);
  229. IOMUXC_SetPinMux(IOMUXC_GPIO_B1_07_GPIO2_IO23, 0U);
  230. IOMUXC_SetPinMux(IOMUXC_GPIO_B1_08_GPIO2_IO24, 0U);
  231. IOMUXC_SetPinMux(IOMUXC_GPIO_B1_09_GPIO2_IO25, 0U);
  232. IOMUXC_SetPinMux(IOMUXC_GPIO_B1_10_GPIO2_IO26, 0U);
  233. IOMUXC_SetPinMux(IOMUXC_GPIO_B1_11_GPIO2_IO27, 0U);
  234. IOMUXC_SetPinMux(IOMUXC_GPIO_B1_12_USDHC1_CD_B, 0U);
  235. IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B0_00_USDHC1_CMD, 0U);
  236. IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B0_01_USDHC1_CLK, 0U);
  237. IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B0_02_USDHC1_DATA0, 0U);
  238. IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B0_03_USDHC1_DATA1, 0U);
  239. IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B0_04_USDHC1_DATA2, 0U);
  240. IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B0_05_USDHC1_DATA3, 0U);
  241. IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B1_00_GPIO3_IO00, 1U);
  242. IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B1_01_GPIO3_IO01, 1U);
  243. IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B1_02_FLEXPWM2_PWMA03, 0U);
  244. IOMUXC_GPR->GPR6 = ((IOMUXC_GPR->GPR6 &
  245. (~(IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_11_MASK | IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_12_MASK)))
  246. | IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_11(0x00U)
  247. | IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_12(0x00U)
  248. );
  249. XBARA_SetSignalsConnection(XBARA1, kXBARA1_InputIomuxXbarInout11, kXBARA1_OutputEnc1PhaseAInput);
  250. XBARA_SetSignalsConnection(XBARA1, kXBARA1_InputIomuxXbarInout12, kXBARA1_OutputEnc1PhaseBInput);
  251. IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B1_00_GPIO3_IO00, 0x18B0U);
  252. IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B1_01_GPIO3_IO01, 0x18B0U);
  253. }
  254. /***********************************************************************************************************************
  255. * EOF
  256. **********************************************************************************************************************/