drv_rtc.c 6.9 KB

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  1. /*
  2. * Copyright (c) 2006-2022, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2022-03-04 stevetong459 first version
  9. * 2022-07-15 Aligagago add apm32F4 serie MCU support
  10. * 2022-12-26 luobeihai add apm32F0 serie MCU support
  11. */
  12. #include "board.h"
  13. #include <sys/time.h>
  14. #ifdef BSP_USING_ONCHIP_RTC
  15. #define DBG_TAG "drv.rtc"
  16. #define DBG_LVL DBG_INFO
  17. #include <rtdbg.h>
  18. #ifndef LSI_VALUE
  19. #define LSI_VALUE ((uint32_t)40000)
  20. #endif
  21. #ifndef LSE_VALUE
  22. #define LSE_VALUE ((uint32_t)32768)
  23. #endif
  24. #define DRV_RTC_TIME_OUT 0xFFFFF
  25. static rt_rtc_dev_t apm32_rtc_dev;
  26. static rt_uint8_t rtc_init_flag = RESET;
  27. /**
  28. * @brief This function will initialize the rtc on chip.
  29. *
  30. * @return RT_EOK indicates successful initialize, other value indicates failed;
  31. */
  32. static rt_err_t apm32_rtc_init(void)
  33. {
  34. volatile rt_uint32_t counter = 0;
  35. /* Enable RTC Clock */
  36. #if defined(SOC_SERIES_APM32F1)
  37. RCM_EnableAPB1PeriphClock(RCM_APB1_PERIPH_PMU | RCM_APB1_PERIPH_BAKR);
  38. #elif defined(SOC_SERIES_APM32F0) || defined(SOC_SERIES_APM32F4)
  39. RCM_EnableAPB1PeriphClock(RCM_APB1_PERIPH_PMU);
  40. #endif
  41. PMU_EnableBackupAccess();
  42. /* Config RTC clock */
  43. #ifdef BSP_RTC_USING_LSI
  44. RCM_EnableLSI();
  45. while (!RCM_ReadStatusFlag(RCM_FLAG_LSIRDY))
  46. {
  47. if (++counter > DRV_RTC_TIME_OUT)
  48. {
  49. return RT_ETIMEOUT;
  50. }
  51. }
  52. RCM_ConfigRTCCLK(RCM_RTCCLK_LSI);
  53. #else
  54. RCM_DisableLSI();
  55. RCM_ConfigLSE(RCM_LSE_OPEN);
  56. while (!RCM_ReadStatusFlag(RCM_FLAG_LSERDY))
  57. {
  58. if (++counter > DRV_RTC_TIME_OUT)
  59. {
  60. return RT_ETIMEOUT;
  61. }
  62. }
  63. RCM_ConfigRTCCLK(RCM_RTCCLK_LSE);
  64. #endif /* BSP_RTC_USING_LSI */
  65. RCM_EnableRTCCLK();
  66. RTC_WaitForSynchro();
  67. #if defined(SOC_SERIES_APM32F1)
  68. counter = 0;
  69. while (!RTC_ReadStatusFlag(RTC_FLAG_OC))
  70. {
  71. if (++counter > DRV_RTC_TIME_OUT)
  72. {
  73. return RT_ETIMEOUT;
  74. }
  75. }
  76. RTC_EnableConfigMode();
  77. RTC_ClearStatusFlag(RTC_FLAG_OVR | RTC_FLAG_ALR | RTC_FLAG_SEC);
  78. #ifdef BSP_RTC_USING_LSI
  79. RTC_ConfigPrescaler(LSI_VALUE - 1);
  80. #else
  81. RTC_ConfigPrescaler(LSE_VALUE - 1);
  82. #endif /* BSP_RTC_USING_LSI */
  83. #elif defined(SOC_SERIES_APM32F4)
  84. RTC_EnableInit();
  85. RTC_Config_T rtcConfig;
  86. RTC_ConfigStructInit(&rtcConfig);
  87. RTC_Config(&rtcConfig);
  88. #elif defined(SOC_SERIES_APM32F0)
  89. RTC_EnableInit();
  90. RTC_Config_T rtcConfig;
  91. RTC_ConfigStructInit(&rtcConfig);
  92. #ifdef BSP_RTC_USING_LSI
  93. rtcConfig.AsynchPrediv = 0x63;
  94. rtcConfig.SynchPrediv = 0x18F;
  95. #else
  96. rtcConfig.AsynchPrediv = 0x7F;
  97. rtcConfig.SynchPrediv = 0x130;
  98. #endif /* BSP_RTC_USING_LSI */
  99. RTC_Config(&rtcConfig);
  100. #endif /* SOC_SERIES_APM32F1 */
  101. if (!rtc_init_flag)
  102. {
  103. rtc_init_flag = SET;
  104. }
  105. return RT_EOK;
  106. }
  107. #if defined(SOC_SERIES_APM32F1)
  108. /**
  109. * @brief This function will initialize the rtc on chip.
  110. *
  111. * @return RT_EOK indicates successful initialize, other value indicates failed;
  112. */
  113. static rt_err_t apm32_rtc_get_secs(time_t *sec)
  114. {
  115. volatile rt_uint32_t counter = 0;
  116. while (!RTC_ReadStatusFlag(RTC_FLAG_OC))
  117. {
  118. if (++counter > DRV_RTC_TIME_OUT)
  119. {
  120. return RT_ETIMEOUT;
  121. }
  122. }
  123. *(timer_t *) sec = RTC_ReadCounter();
  124. return RT_EOK;
  125. }
  126. static rt_err_t apm32_rtc_set_secs(time_t *sec)
  127. {
  128. volatile rt_uint32_t counter = 0;
  129. if (!rtc_init_flag)
  130. {
  131. apm32_rtc_init();
  132. }
  133. while (!RTC_ReadStatusFlag(RTC_FLAG_OC))
  134. {
  135. if (++counter > DRV_RTC_TIME_OUT)
  136. {
  137. return RT_ETIMEOUT;
  138. }
  139. }
  140. RTC_ConfigCounter(*(rt_uint32_t *)sec);
  141. return RT_EOK;
  142. }
  143. #elif defined(SOC_SERIES_APM32F0) || defined(SOC_SERIES_APM32F4)
  144. static rt_err_t apm32_rtc_get_timeval(struct timeval *tv)
  145. {
  146. #if defined(SOC_SERIES_APM32F0)
  147. RTC_TIME_T timeConfig;
  148. RTC_DATE_T dateConfig;
  149. #elif defined(SOC_SERIES_APM32F4)
  150. RTC_TimeConfig_T timeConfig;
  151. RTC_DateConfig_T dateConfig;
  152. #endif
  153. struct tm tm_new = {0};
  154. RTC_ReadTime(RTC_FORMAT_BIN, &timeConfig);
  155. RTC_ReadDate(RTC_FORMAT_BIN, &dateConfig);
  156. tm_new.tm_sec = timeConfig.seconds;
  157. tm_new.tm_min = timeConfig.minutes;
  158. tm_new.tm_hour = timeConfig.hours;
  159. tm_new.tm_mday = dateConfig.date;
  160. tm_new.tm_mon = dateConfig.month - 1;
  161. tm_new.tm_year = dateConfig.year + 100;
  162. tv->tv_sec = timegm(&tm_new);
  163. return RT_EOK;
  164. }
  165. static rt_err_t set_rtc_time_stamp(time_t time_stamp)
  166. {
  167. #if defined(SOC_SERIES_APM32F0)
  168. RTC_TIME_T timeConfig;
  169. RTC_DATE_T dateConfig;
  170. #elif defined(SOC_SERIES_APM32F4)
  171. RTC_TimeConfig_T timeConfig;
  172. RTC_DateConfig_T dateConfig;
  173. #endif
  174. struct tm tm = {0};
  175. if (!rtc_init_flag)
  176. {
  177. apm32_rtc_init();
  178. }
  179. gmtime_r(&time_stamp, &tm);
  180. if (tm.tm_year < 100)
  181. {
  182. return -RT_ERROR;
  183. }
  184. timeConfig.seconds = tm.tm_sec ;
  185. timeConfig.minutes = tm.tm_min ;
  186. timeConfig.hours = tm.tm_hour;
  187. dateConfig.date = tm.tm_mday;
  188. #if defined(SOC_SERIES_APM32F4)
  189. dateConfig.month = (RTC_MONTH_T)(tm.tm_mon + 1);
  190. dateConfig.weekday = (RTC_WEEKDAY_T)(tm.tm_wday + 1);
  191. #else
  192. dateConfig.month = tm.tm_mon + 1 ;
  193. dateConfig.weekday = tm.tm_wday + 1;
  194. #endif
  195. dateConfig.year = tm.tm_year - 100;
  196. RTC_ConfigTime(RTC_FORMAT_BIN, &timeConfig);
  197. RTC_ConfigDate(RTC_FORMAT_BIN, &dateConfig);
  198. /* wait for set time completed */
  199. for (int i = 0; i < 0xFFFF; i++);
  200. return RT_EOK;
  201. }
  202. /**
  203. * @brief This function will initialize the rtc on chip.
  204. *
  205. * @return RT_EOK indicates successful initialize, other value indicates failed;
  206. */
  207. static rt_err_t apm32_rtc_get_secs(time_t *sec)
  208. {
  209. struct timeval tv;
  210. apm32_rtc_get_timeval(&tv);
  211. *(time_t *) sec = tv.tv_sec;
  212. return RT_EOK;
  213. }
  214. static rt_err_t apm32_rtc_set_secs(time_t *sec)
  215. {
  216. rt_err_t result = RT_EOK;
  217. if (set_rtc_time_stamp(*sec))
  218. {
  219. result = -RT_ERROR;
  220. }
  221. return result;
  222. }
  223. #endif
  224. static const struct rt_rtc_ops apm32_rtc_ops =
  225. {
  226. apm32_rtc_init,
  227. apm32_rtc_get_secs,
  228. apm32_rtc_set_secs,
  229. RT_NULL,
  230. RT_NULL,
  231. #if defined(SOC_SERIES_APM32F0) || defined(SOC_SERIES_APM32F4)
  232. apm32_rtc_get_timeval,
  233. #else
  234. RT_NULL,
  235. #endif
  236. RT_NULL,
  237. };
  238. /**
  239. * @brief RTC initialization function.
  240. *
  241. * @return RT_EOK indicates successful initialization, other value indicates failed;
  242. */
  243. static int rt_hw_rtc_init(void)
  244. {
  245. rt_err_t result = RT_EOK;
  246. apm32_rtc_dev.ops = &apm32_rtc_ops;
  247. if (rt_hw_rtc_register(&apm32_rtc_dev, "rtc", RT_DEVICE_FLAG_RDWR, RT_NULL) != RT_EOK)
  248. {
  249. LOG_E("rtc init failed");
  250. result = RT_ERROR;
  251. }
  252. else
  253. {
  254. LOG_D("rtc init success");
  255. }
  256. return result;
  257. }
  258. INIT_DEVICE_EXPORT(rt_hw_rtc_init);
  259. #endif /* BSP_USING_ONCHIP_RTC */