board.c 12 KB

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  1. /*
  2. * File : board.c
  3. * This file is part of RT-Thread RTOS
  4. * COPYRIGHT (C) 2006 - 2009 RT-Thread Develop Team
  5. *
  6. * The license and distribution terms for this file may be
  7. * found in the file LICENSE in this distribution or at
  8. * http://openlab.rt-thread.com/license/LICENSE
  9. *
  10. * Change Logs:
  11. * Date Author Notes
  12. * 2006-08-23 Bernard first implementation
  13. */
  14. #include <rthw.h>
  15. #include <rtthread.h>
  16. #include "stm32f10x_lib.h"
  17. static void rt_hw_console_init(void);
  18. /**
  19. * @addtogroup STM32
  20. */
  21. /*@{*/
  22. /*******************************************************************************
  23. * Function Name : RCC_Configuration
  24. * Description : Configures the different system clocks.
  25. * Input : None
  26. * Output : None
  27. * Return : None
  28. *******************************************************************************/
  29. void RCC_Configuration(void)
  30. {
  31. ErrorStatus HSEStartUpStatus;
  32. /* RCC system reset(for debug purpose) */
  33. RCC_DeInit();
  34. /* Enable HSE */
  35. RCC_HSEConfig(RCC_HSE_ON);
  36. /* Wait till HSE is ready */
  37. HSEStartUpStatus = RCC_WaitForHSEStartUp();
  38. if(HSEStartUpStatus == SUCCESS)
  39. {
  40. /* HCLK = SYSCLK */
  41. RCC_HCLKConfig(RCC_SYSCLK_Div1);
  42. /* PCLK2 = HCLK */
  43. RCC_PCLK2Config(RCC_HCLK_Div1);
  44. /* PCLK1 = HCLK/2 */
  45. RCC_PCLK1Config(RCC_HCLK_Div2);
  46. /* Flash 2 wait state */
  47. FLASH_SetLatency(FLASH_Latency_2);
  48. /* Enable Prefetch Buffer */
  49. FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);
  50. /* PLLCLK = 8MHz * 9 = 72 MHz */
  51. RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_9);
  52. /* Enable PLL */
  53. RCC_PLLCmd(ENABLE);
  54. /* Wait till PLL is ready */
  55. while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET) ;
  56. /* Select PLL as system clock source */
  57. RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
  58. /* Wait till PLL is used as system clock source */
  59. while(RCC_GetSYSCLKSource() != 0x08) ;
  60. }
  61. }
  62. /*******************************************************************************
  63. * Function Name : NVIC_Configuration
  64. * Description : Configures Vector Table base location.
  65. * Input : None
  66. * Output : None
  67. * Return : None
  68. *******************************************************************************/
  69. void NVIC_Configuration(void)
  70. {
  71. #ifdef VECT_TAB_RAM
  72. /* Set the Vector Table base location at 0x20000000 */
  73. NVIC_SetVectorTable(NVIC_VectTab_RAM, 0x0);
  74. #else /* VECT_TAB_FLASH */
  75. /* Set the Vector Table base location at 0x08000000 */
  76. NVIC_SetVectorTable(NVIC_VectTab_FLASH, 0x0);
  77. #endif
  78. }
  79. /*******************************************************************************
  80. * Function Name : SysTick_Configuration
  81. * Description : Configures the SysTick for OS tick.
  82. * Input : None
  83. * Output : None
  84. * Return : None
  85. *******************************************************************************/
  86. void SysTick_Configuration(void)
  87. {
  88. RCC_ClocksTypeDef rcc_clocks;
  89. rt_uint32_t cnts;
  90. RCC_GetClocksFreq(&rcc_clocks);
  91. cnts = (rt_uint32_t)rcc_clocks.HCLK_Frequency / RT_TICK_PER_SECOND;
  92. SysTick_SetReload(cnts);
  93. SysTick_CLKSourceConfig(SysTick_CLKSource_HCLK);
  94. SysTick_CounterCmd(SysTick_Counter_Enable);
  95. SysTick_ITConfig(ENABLE);
  96. }
  97. extern void rt_hw_interrupt_thread_switch(void);
  98. /**
  99. * This is the timer interrupt service routine.
  100. *
  101. */
  102. void rt_hw_timer_handler(void)
  103. {
  104. /* enter interrupt */
  105. rt_interrupt_enter();
  106. rt_tick_increase();
  107. /* leave interrupt */
  108. rt_interrupt_leave();
  109. rt_hw_interrupt_thread_switch();
  110. }
  111. /*******************************************************************************
  112. * Function Name : LCD_CtrlLinesConfig
  113. * Description : Configures LCD Control lines (FSMC Pins) in alternate function
  114. Push-Pull mode.
  115. * Input : None
  116. * Output : None
  117. * Return : None
  118. *******************************************************************************/
  119. void LCD_CtrlLinesConfig(void)
  120. {
  121. GPIO_InitTypeDef GPIO_InitStructure;
  122. /* Enable FSMC, GPIOD, GPIOE, GPIOF, GPIOG and AFIO clocks */
  123. RCC_AHBPeriphClockCmd(RCC_AHBPeriph_FSMC, ENABLE);
  124. RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA|RCC_APB2Periph_GPIOD | RCC_APB2Periph_GPIOE |
  125. RCC_APB2Periph_GPIOF | RCC_APB2Periph_GPIOG |
  126. RCC_APB2Periph_AFIO, ENABLE);
  127. GPIO_InitStructure.GPIO_Pin = GPIO_Pin_8;
  128. GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
  129. GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
  130. // GPIO_Init(GPIOA, &GPIO_InitStructure);
  131. // GPIO_ResetBits(GPIOA, GPIO_Pin_8);
  132. GPIO_InitStructure.GPIO_Pin = GPIO_Pin_6;
  133. GPIO_Init(GPIOC, &GPIO_InitStructure);
  134. GPIO_SetBits(GPIOC, GPIO_Pin_6);
  135. /* Set PD.00(D2), PD.01(D3), PD.04(NOE), PD.05(NWE), PD.08(D13), PD.09(D14),
  136. PD.10(D15), PD.14(D0), PD.15(D1) as alternate
  137. function push pull */
  138. GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_4 | GPIO_Pin_5 |
  139. GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10 | GPIO_Pin_14 |
  140. GPIO_Pin_15;
  141. GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
  142. GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
  143. GPIO_Init(GPIOD, &GPIO_InitStructure);
  144. /* Set PE.07(D4), PE.08(D5), PE.09(D6), PE.10(D7), PE.11(D8), PE.12(D9), PE.13(D10),
  145. PE.14(D11), PE.15(D12) as alternate function push pull */
  146. GPIO_InitStructure.GPIO_Pin = GPIO_Pin_6 | GPIO_Pin_7 | GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10 |
  147. GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_14 |
  148. GPIO_Pin_15;
  149. GPIO_Init(GPIOE, &GPIO_InitStructure);
  150. // GPIO_WriteBit(GPIOE, GPIO_Pin_6, Bit_SET);
  151. /* Set PF.00(A0 (RS)) as alternate function push pull */
  152. GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0;
  153. GPIO_Init(GPIOF, &GPIO_InitStructure);
  154. /* Set PG.12(NE4 (LCD/CS)) as alternate function push pull - CE3(LCD /CS) */
  155. GPIO_InitStructure.GPIO_Pin = GPIO_Pin_12;
  156. GPIO_Init(GPIOG, &GPIO_InitStructure);
  157. }
  158. /*******************************************************************************
  159. * Function Name : LCD_FSMCConfig
  160. * Description : Configures the Parallel interface (FSMC) for LCD(Parallel mode)
  161. * Input : None
  162. * Output : None
  163. * Return : None
  164. *******************************************************************************/
  165. void LCD_FSMCConfig(void)
  166. {
  167. FSMC_NORSRAMInitTypeDef FSMC_NORSRAMInitStructure;
  168. FSMC_NORSRAMTimingInitTypeDef p;
  169. /*-- FSMC Configuration ------------------------------------------------------*/
  170. /*----------------------- SRAM Bank 4 ----------------------------------------*/
  171. /* FSMC_Bank1_NORSRAM4 configuration */
  172. p.FSMC_AddressSetupTime = 0;
  173. p.FSMC_AddressHoldTime = 0;
  174. p.FSMC_DataSetupTime = 2;
  175. p.FSMC_BusTurnAroundDuration = 0;
  176. p.FSMC_CLKDivision = 0;
  177. p.FSMC_DataLatency = 0;
  178. p.FSMC_AccessMode = FSMC_AccessMode_A;
  179. /* Color LCD configuration ------------------------------------
  180. LCD configured as follow:
  181. - Data/Address MUX = Disable
  182. - Memory Type = SRAM
  183. - Data Width = 16bit
  184. - Write Operation = Enable
  185. - Extended Mode = Enable
  186. - Asynchronous Wait = Disable */
  187. FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM4;
  188. FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable;
  189. FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_SRAM;
  190. FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b;
  191. FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable;
  192. FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low;
  193. FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable;
  194. FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState;
  195. FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable;
  196. FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable;
  197. FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable;
  198. // FSMC_NORSRAMInitStructure.FSMC_AsyncWait = FSMC_AsyncWait_Disable;
  199. FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable;
  200. FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p;
  201. FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p;
  202. FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure);
  203. /* BANK 4 (of NOR/SRAM Bank 1~4) is enabled */
  204. FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM4, ENABLE);
  205. }
  206. /*******************************************************************************
  207. * Function Name : FSMC_SRAM_Init
  208. * Description : Configures the FSMC and GPIOs to interface with the SRAM memory.
  209. * This function must be called before any write/read operation
  210. * on the SRAM.
  211. * Input : None
  212. * Output : None
  213. * Return : None
  214. *******************************************************************************/
  215. void FSMC_SRAM_Init(void)
  216. {
  217. #define REG32(x) (*(volatile unsigned long*)(x))
  218. /* enable FSMC clock */
  219. REG32(0x40021014) = 0x114;
  220. /* enable GPIOD, GPIOE, GPIOF and GPIOG clocks */
  221. REG32(0x40021018) = 0x1e0;
  222. /* SRAM Data lines, NOE and NWE configuration */
  223. REG32(0x40011400) = 0x44BB44BB;
  224. REG32(0x40011404) = 0xBBBBBBBB;
  225. REG32(0x40011800) = 0xB44444BB;
  226. REG32(0x40011804) = 0xBBBBBBBB;
  227. REG32(0x40011C00) = 0x44BBBBBB;
  228. REG32(0x40011C04) = 0xBBBB4444;
  229. REG32(0x40012000) = 0x44BBBBBB;
  230. REG32(0x40012004) = 0x44444B44;
  231. /* FSMC Configuration (enable FSMC Bank1_SRAM Bank) */
  232. REG32(0xA0000010) = 0x00001011;
  233. REG32(0xA0000014) = 0x00000200;
  234. LCD_CtrlLinesConfig();
  235. LCD_FSMCConfig();
  236. }
  237. /**
  238. * This function will initial STM32 board.
  239. */
  240. void rt_hw_board_init()
  241. {
  242. /* Configure the system clocks */
  243. RCC_Configuration();
  244. /* NVIC Configuration */
  245. NVIC_Configuration();
  246. /* SRAM init */
  247. FSMC_SRAM_Init();
  248. /* Configure the SysTick */
  249. SysTick_Configuration();
  250. rt_hw_console_init();
  251. }
  252. /* init console to support rt_kprintf */
  253. static void rt_hw_console_init()
  254. {
  255. /* Enable USART1 and GPIOA clocks */
  256. RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1 | RCC_APB2Periph_GPIOA, ENABLE);
  257. /* GPIO configuration */
  258. {
  259. GPIO_InitTypeDef GPIO_InitStructure;
  260. /* Configure USART1 Tx (PA.09) as alternate function push-pull */
  261. GPIO_InitStructure.GPIO_Pin = GPIO_Pin_9;
  262. GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
  263. GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
  264. GPIO_Init(GPIOA, &GPIO_InitStructure);
  265. /* Configure USART1 Rx (PA.10) as input floating */
  266. GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10;
  267. GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
  268. GPIO_Init(GPIOA, &GPIO_InitStructure);
  269. }
  270. /* USART configuration */
  271. {
  272. USART_InitTypeDef USART_InitStructure;
  273. /* USART1 configured as follow:
  274. - BaudRate = 115200 baud
  275. - Word Length = 8 Bits
  276. - One Stop Bit
  277. - No parity
  278. - Hardware flow control disabled (RTS and CTS signals)
  279. - Receive and transmit enabled
  280. - USART Clock disabled
  281. - USART CPOL: Clock is active low
  282. - USART CPHA: Data is captured on the middle
  283. - USART LastBit: The clock pulse of the last data bit is not output to
  284. the SCLK pin
  285. */
  286. USART_InitStructure.USART_BaudRate = 115200;
  287. USART_InitStructure.USART_WordLength = USART_WordLength_8b;
  288. USART_InitStructure.USART_StopBits = USART_StopBits_1;
  289. USART_InitStructure.USART_Parity = USART_Parity_No;
  290. USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
  291. USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
  292. USART_Init(USART1, &USART_InitStructure);
  293. /* Enable USART1 */
  294. USART_Cmd(USART1, ENABLE);
  295. }
  296. }
  297. /* write one character to serial, must not trigger interrupt */
  298. static void rt_hw_console_putc(const char c)
  299. {
  300. /*
  301. to be polite with serial console add a line feed
  302. to the carriage return character
  303. */
  304. if (c=='\n')rt_hw_console_putc('\r');
  305. while (!(USART1->SR & USART_FLAG_TXE));
  306. USART1->DR = (c & 0x1FF);
  307. }
  308. /**
  309. * This function is used by rt_kprintf to display a string on console.
  310. *
  311. * @param str the displayed string
  312. */
  313. void rt_hw_console_output(const char* str)
  314. {
  315. while (*str)
  316. {
  317. rt_hw_console_putc (*str++);
  318. }
  319. }
  320. /*@}*/