drv_lcd.h 8.1 KB

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  1. #ifndef __DRV_LCD_H__
  2. #define __DRV_LCD_H__
  3. #include <rtdevice.h>
  4. #include "stm32f4xx_hal.h"
  5. #define ILI9341_HSYNC ((uint32_t)9) /* Horizontal synchronization */
  6. #define ILI9341_HBP ((uint32_t)29) /* Horizontal back porch */
  7. #define ILI9341_HFP ((uint32_t)2) /* Horizontal front porch */
  8. #define ILI9341_VSYNC ((uint32_t)1) /* Vertical synchronization */
  9. #define ILI9341_VBP ((uint32_t)3) /* Vertical back porch */
  10. #define ILI9341_VFP ((uint32_t)2) /* Vertical front porch */
  11. /**
  12. * @brief ILI9341 Registers
  13. */
  14. /* Level 1 Commands */
  15. #define LCD_SWRESET 0x01 /* Software Reset */
  16. #define LCD_READ_DISPLAY_ID 0x04 /* Read display identification information */
  17. #define LCD_RDDST 0x09 /* Read Display Status */
  18. #define LCD_RDDPM 0x0A /* Read Display Power Mode */
  19. #define LCD_RDDMADCTL 0x0B /* Read Display MADCTL */
  20. #define LCD_RDDCOLMOD 0x0C /* Read Display Pixel Format */
  21. #define LCD_RDDIM 0x0D /* Read Display Image Format */
  22. #define LCD_RDDSM 0x0E /* Read Display Signal Mode */
  23. #define LCD_RDDSDR 0x0F /* Read Display Self-Diagnostic Result */
  24. #define LCD_SPLIN 0x10 /* Enter Sleep Mode */
  25. #define LCD_SLEEP_OUT 0x11 /* Sleep out register */
  26. #define LCD_PTLON 0x12 /* Partial Mode ON */
  27. #define LCD_NORMAL_MODE_ON 0x13 /* Normal Display Mode ON */
  28. #define LCD_DINVOFF 0x20 /* Display Inversion OFF */
  29. #define LCD_DINVON 0x21 /* Display Inversion ON */
  30. #define LCD_GAMMA 0x26 /* Gamma register */
  31. #define LCD_DISPLAY_OFF 0x28 /* Display off register */
  32. #define LCD_DISPLAY_ON 0x29 /* Display on register */
  33. #define LCD_COLUMN_ADDR 0x2A /* Colomn address register */
  34. #define LCD_PAGE_ADDR 0x2B /* Page address register */
  35. #define LCD_GRAM 0x2C /* GRAM register */
  36. #define LCD_RGBSET 0x2D /* Color SET */
  37. #define LCD_RAMRD 0x2E /* Memory Read */
  38. #define LCD_PLTAR 0x30 /* Partial Area */
  39. #define LCD_VSCRDEF 0x33 /* Vertical Scrolling Definition */
  40. #define LCD_TEOFF 0x34 /* Tearing Effect Line OFF */
  41. #define LCD_TEON 0x35 /* Tearing Effect Line ON */
  42. #define LCD_MAC 0x36 /* Memory Access Control register*/
  43. #define LCD_VSCRSADD 0x37 /* Vertical Scrolling Start Address */
  44. #define LCD_IDMOFF 0x38 /* Idle Mode OFF */
  45. #define LCD_IDMON 0x39 /* Idle Mode ON */
  46. #define LCD_PIXEL_FORMAT 0x3A /* Pixel Format register */
  47. #define LCD_WRITE_MEM_CONTINUE 0x3C /* Write Memory Continue */
  48. #define LCD_READ_MEM_CONTINUE 0x3E /* Read Memory Continue */
  49. #define LCD_SET_TEAR_SCANLINE 0x44 /* Set Tear Scanline */
  50. #define LCD_GET_SCANLINE 0x45 /* Get Scanline */
  51. #define LCD_WDB 0x51 /* Write Brightness Display register */
  52. #define LCD_RDDISBV 0x52 /* Read Display Brightness */
  53. #define LCD_WCD 0x53 /* Write Control Display register*/
  54. #define LCD_RDCTRLD 0x54 /* Read CTRL Display */
  55. #define LCD_WRCABC 0x55 /* Write Content Adaptive Brightness Control */
  56. #define LCD_RDCABC 0x56 /* Read Content Adaptive Brightness Control */
  57. #define LCD_WRITE_CABC 0x5E /* Write CABC Minimum Brightness */
  58. #define LCD_READ_CABC 0x5F /* Read CABC Minimum Brightness */
  59. #define LCD_READ_ID1 0xDA /* Read ID1 */
  60. #define LCD_READ_ID2 0xDB /* Read ID2 */
  61. #define LCD_READ_ID3 0xDC /* Read ID3 */
  62. /* Level 2 Commands */
  63. #define LCD_RGB_INTERFACE 0xB0 /* RGB Interface Signal Control */
  64. #define LCD_FRMCTR1 0xB1 /* Frame Rate Control (In Normal Mode) */
  65. #define LCD_FRMCTR2 0xB2 /* Frame Rate Control (In Idle Mode) */
  66. #define LCD_FRMCTR3 0xB3 /* Frame Rate Control (In Partial Mode) */
  67. #define LCD_INVTR 0xB4 /* Display Inversion Control */
  68. #define LCD_BPC 0xB5 /* Blanking Porch Control register */
  69. #define LCD_DFC 0xB6 /* Display Function Control register */
  70. #define LCD_ETMOD 0xB7 /* Entry Mode Set */
  71. #define LCD_BACKLIGHT1 0xB8 /* Backlight Control 1 */
  72. #define LCD_BACKLIGHT2 0xB9 /* Backlight Control 2 */
  73. #define LCD_BACKLIGHT3 0xBA /* Backlight Control 3 */
  74. #define LCD_BACKLIGHT4 0xBB /* Backlight Control 4 */
  75. #define LCD_BACKLIGHT5 0xBC /* Backlight Control 5 */
  76. #define LCD_BACKLIGHT7 0xBE /* Backlight Control 7 */
  77. #define LCD_BACKLIGHT8 0xBF /* Backlight Control 8 */
  78. #define LCD_POWER1 0xC0 /* Power Control 1 register */
  79. #define LCD_POWER2 0xC1 /* Power Control 2 register */
  80. #define LCD_VCOM1 0xC5 /* VCOM Control 1 register */
  81. #define LCD_VCOM2 0xC7 /* VCOM Control 2 register */
  82. #define LCD_NVMWR 0xD0 /* NV Memory Write */
  83. #define LCD_NVMPKEY 0xD1 /* NV Memory Protection Key */
  84. #define LCD_RDNVM 0xD2 /* NV Memory Status Read */
  85. #define LCD_READ_ID4 0xD3 /* Read ID4 */
  86. #define LCD_PGAMMA 0xE0 /* Positive Gamma Correction register */
  87. #define LCD_NGAMMA 0xE1 /* Negative Gamma Correction register */
  88. #define LCD_DGAMCTRL1 0xE2 /* Digital Gamma Control 1 */
  89. #define LCD_DGAMCTRL2 0xE3 /* Digital Gamma Control 2 */
  90. #define LCD_INTERFACE 0xF6 /* Interface control register */
  91. /* Extend register commands */
  92. #define LCD_POWERA 0xCB /* Power control A register */
  93. #define LCD_POWERB 0xCF /* Power control B register */
  94. #define LCD_DTCA 0xE8 /* Driver timing control A */
  95. #define LCD_DTCB 0xEA /* Driver timing control B */
  96. #define LCD_POWER_SEQ 0xED /* Power on sequence register */
  97. #define LCD_3GAMMA_EN 0xF2 /* 3 Gamma enable register */
  98. #define LCD_PRC 0xF7 /* Pump ratio control register */
  99. /* Size of read registers */
  100. #define LCD_READ_ID4_SIZE 3 /* Size of Read ID4 */
  101. #define ABS(X) ((X) > 0 ? (X) : -(X))
  102. #define CSX_Pin GPIO_PIN_2
  103. #define CSX_GPIO_Port GPIOC
  104. #define RDX_Pin GPIO_PIN_12
  105. #define RDX_GPIO_Port GPIOD
  106. #define WRX_DCX_Pin GPIO_PIN_13
  107. #define WRX_DCX_GPIO_Port GPIOD
  108. /* Chip Select macro definition */
  109. #define LCD_CS_LOW() HAL_GPIO_WritePin(LCD_NCS_GPIO_PORT, LCD_NCS_PIN, GPIO_PIN_RESET)
  110. #define LCD_CS_HIGH() HAL_GPIO_WritePin(LCD_NCS_GPIO_PORT, LCD_NCS_PIN, GPIO_PIN_SET)
  111. /* Set WRX High to send data */
  112. #define LCD_WRX_LOW() HAL_GPIO_WritePin(LCD_WRX_GPIO_PORT, LCD_WRX_PIN, GPIO_PIN_RESET)
  113. #define LCD_WRX_HIGH() HAL_GPIO_WritePin(LCD_WRX_GPIO_PORT, LCD_WRX_PIN, GPIO_PIN_SET)
  114. /* Set WRX High to send data */
  115. #define LCD_RDX_LOW() HAL_GPIO_WritePin(LCD_RDX_GPIO_PORT, LCD_RDX_PIN, GPIO_PIN_RESET)
  116. #define LCD_RDX_HIGH() HAL_GPIO_WritePin(LCD_RDX_GPIO_PORT, LCD_RDX_PIN, GPIO_PIN_SET)
  117. /**
  118. * @brief LCD Control pin
  119. */
  120. #define LCD_NCS_PIN GPIO_PIN_2
  121. #define LCD_NCS_GPIO_PORT GPIOC
  122. #define LCD_NCS_GPIO_CLK_ENABLE() __HAL_RCC_GPIOC_CLK_ENABLE()
  123. #define LCD_NCS_GPIO_CLK_DISABLE() __HAL_RCC_GPIOC_CLK_DISABLE()
  124. /**
  125. * @}
  126. */
  127. /**
  128. * @brief LCD Command/data pin
  129. */
  130. #define LCD_WRX_PIN GPIO_PIN_13
  131. #define LCD_WRX_GPIO_PORT GPIOD
  132. #define LCD_WRX_GPIO_CLK_ENABLE() __HAL_RCC_GPIOD_CLK_ENABLE()
  133. #define LCD_WRX_GPIO_CLK_DISABLE() __HAL_RCC_GPIOD_CLK_DISABLE()
  134. #define LCD_RDX_PIN GPIO_PIN_12
  135. #define LCD_RDX_GPIO_PORT GPIOD
  136. #define LCD_RDX_GPIO_CLK_ENABLE() __HAL_RCC_GPIOD_CLK_ENABLE()
  137. #define LCD_RDX_GPIO_CLK_DISABLE() __HAL_RCC_GPIOD_CLK_DISABLE()
  138. int rt_lcd_init(void);
  139. #endif