drv_pdm.c 8.6 KB

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  1. /*
  2. * Copyright (c) 2022 HPMicro
  3. *
  4. * SPDX-License-Identifier: BSD-3-Clause
  5. *
  6. */
  7. #include <rtthread.h>
  8. #include <rtdevice.h>
  9. #define DBG_TAG "pdm"
  10. #define DBG_LVL DBG_INFO
  11. #include <rtdbg.h>
  12. #ifdef BSP_USING_PDM
  13. #include "board.h"
  14. #include "drivers/dev_audio.h"
  15. #include "hpm_i2s_drv.h"
  16. #include "hpm_pdm_drv.h"
  17. #include "drv_pdm.h"
  18. #ifdef HPMSOC_HAS_HPMSDK_DMAV2
  19. #include "hpm_dmav2_drv.h"
  20. #else
  21. #include "hpm_dma_drv.h"
  22. #endif
  23. #include "hpm_dmamux_drv.h"
  24. #include "hpm_l1c_drv.h"
  25. #include "hpm_dma_mgr.h"
  26. /* PDM connect to I2S0 RX */
  27. #define PDM_DMA_REQ HPM_DMA_SRC_I2S0_RX
  28. #define PDM_I2S_DATA_LINE 0
  29. struct hpm_pdm
  30. {
  31. struct rt_audio_device audio;
  32. struct rt_audio_configure record_config;
  33. rt_uint8_t* rx_fifo;
  34. };
  35. struct hpm_pdm hpm_pdm_dev = { 0 };
  36. static dma_resource_t dma_resource = { 0 };
  37. static rt_err_t hpm_pdm_dma_transmit();
  38. void pdm_dma_tc_callback(DMA_Type *ptr, uint32_t channel, void *user_data)
  39. {
  40. rt_audio_rx_done(&hpm_pdm_dev.audio, hpm_pdm_dev.rx_fifo, PDM_FIFO_SIZE);
  41. hpm_pdm_dma_transmit();
  42. }
  43. static rt_err_t hpm_pdm_getcaps(struct rt_audio_device* audio, struct rt_audio_caps* caps)
  44. {
  45. rt_err_t result = RT_EOK;
  46. RT_ASSERT(audio != RT_NULL);
  47. struct hpm_pdm* hpm_audio = (struct hpm_pdm*)audio->parent.user_data;
  48. switch(caps->main_type)
  49. {
  50. case AUDIO_TYPE_INPUT:
  51. {
  52. switch(caps->sub_type)
  53. {
  54. case AUDIO_DSP_PARAM:
  55. caps->udata.config.samplerate = hpm_audio->record_config.samplerate;
  56. caps->udata.config.channels = hpm_audio->record_config.channels;
  57. caps->udata.config.samplebits = hpm_audio->record_config.samplebits;
  58. break;
  59. case AUDIO_DSP_SAMPLERATE:
  60. caps->udata.config.samplerate = hpm_audio->record_config.samplerate;
  61. break;
  62. case AUDIO_DSP_CHANNELS:
  63. caps->udata.config.channels = hpm_audio->record_config.channels;
  64. break;
  65. case AUDIO_DSP_SAMPLEBITS:
  66. caps->udata.config.samplebits = hpm_audio->record_config.samplebits;
  67. break;
  68. default:
  69. result = -RT_ERROR;
  70. break;
  71. }
  72. break;
  73. }
  74. default:
  75. result = -RT_ERROR;
  76. break;
  77. }
  78. return result;
  79. }
  80. static bool i2s_is_enabled(I2S_Type *ptr)
  81. {
  82. return ((ptr->CTRL & I2S_CTRL_I2S_EN_MASK) != 0);
  83. }
  84. static rt_err_t hpm_pdm_set_channels(uint32_t channel)
  85. {
  86. uint32_t mclk_hz;
  87. i2s_transfer_config_t transfer;
  88. mclk_hz = clock_get_frequency(clock_i2s0);
  89. i2s_get_default_transfer_config_for_pdm(&transfer);
  90. transfer.data_line = PDM_I2S_DATA_LINE;
  91. if (channel == 1) {
  92. transfer.channel_slot_mask = BOARD_PDM_SINGLE_CHANNEL_MASK;
  93. } else if(channel == 2) {
  94. transfer.channel_slot_mask = BOARD_PDM_DUAL_CHANNEL_MASK;
  95. } else {
  96. LOG_E("PDM not support channels number %d.\n", channel);
  97. return -RT_ERROR;
  98. }
  99. bool is_enabled = i2s_is_enabled(PDM_I2S);
  100. if (is_enabled) {
  101. dma_abort_channel(dma_resource.base, dma_resource.channel);
  102. }
  103. if (status_success != i2s_config_rx(PDM_I2S, mclk_hz, &transfer))
  104. {
  105. LOG_E("pdm_i2s configure transfer failed\n");
  106. return -RT_ERROR;
  107. }
  108. if (is_enabled)
  109. {
  110. i2s_enable(PDM_I2S);
  111. }
  112. return RT_EOK;
  113. }
  114. static rt_err_t hpm_pdm_configure(struct rt_audio_device* audio, struct rt_audio_caps* caps)
  115. {
  116. rt_err_t result = RT_EOK;
  117. RT_ASSERT(audio != RT_NULL);
  118. struct hpm_pdm* hpm_audio = (struct hpm_pdm*)audio->parent.user_data;
  119. switch(caps->main_type)
  120. {
  121. case AUDIO_TYPE_INPUT:
  122. {
  123. switch(caps->sub_type)
  124. {
  125. case AUDIO_DSP_CHANNELS:
  126. {
  127. hpm_audio->record_config.channels = caps->udata.config.channels;
  128. hpm_pdm_set_channels(caps->udata.config.channels);
  129. break;
  130. }
  131. default:
  132. result = -RT_ERROR;
  133. break;
  134. }
  135. }
  136. default:
  137. result = -RT_ERROR;
  138. break;
  139. }
  140. return result;
  141. }
  142. static rt_err_t hpm_pdm_init(struct rt_audio_device* audio)
  143. {
  144. RT_ASSERT(audio != RT_NULL);
  145. i2s_config_t i2s_config;
  146. i2s_transfer_config_t transfer;
  147. pdm_config_t pdm_config;
  148. init_pdm_pins();
  149. board_init_pdm_clock();
  150. i2s_get_default_config(PDM_I2S, &i2s_config);
  151. i2s_enable_rx_dma_request(PDM_I2S);
  152. i2s_init(PDM_I2S, &i2s_config);
  153. i2s_get_default_transfer_config_for_pdm(&transfer);
  154. transfer.data_line = PDM_I2S_DATA_LINE;
  155. transfer.channel_slot_mask = BOARD_PDM_SINGLE_CHANNEL_MASK;
  156. if (status_success != i2s_config_rx(PDM_I2S, clock_get_frequency(clock_i2s0), &transfer))
  157. {
  158. LOG_E("pdm_i2s configure receive failed\n");
  159. return -RT_ERROR;
  160. }
  161. /* init audio configure */
  162. hpm_pdm_dev.record_config.channels = 1U;
  163. hpm_pdm_dev.record_config.samplebits = 32U; /* the actual significant bit is 24 bits, and the low bit is 0 */
  164. hpm_pdm_dev.record_config.samplerate = PDM_SOC_SAMPLE_RATE_IN_HZ; /* fix 16KHz */
  165. pdm_get_default_config(HPM_PDM, &pdm_config);
  166. if (status_success != pdm_init(HPM_PDM, &pdm_config)) {
  167. LOG_E("pdm init failed\n");
  168. return -RT_ERROR;
  169. }
  170. return RT_EOK;
  171. }
  172. static rt_err_t hpm_pdm_start(struct rt_audio_device* audio, int stream)
  173. {
  174. RT_ASSERT(audio != RT_NULL);
  175. struct hpm_pdm* hpm_audio = (struct hpm_pdm*)audio->parent.user_data;
  176. if (stream == AUDIO_STREAM_RECORD)
  177. {
  178. i2s_disable(PDM_I2S);
  179. i2s_disable_rx_dma_request(PDM_I2S);
  180. pdm_stop(HPM_PDM);
  181. pdm_software_reset(HPM_PDM);
  182. if (dma_mgr_request_resource(&dma_resource) == status_success) {
  183. uint8_t dmamux_ch;
  184. dma_mgr_install_chn_tc_callback(&dma_resource, pdm_dma_tc_callback, NULL);
  185. dma_mgr_enable_dma_irq_with_priority(&dma_resource, 1);
  186. dmamux_ch = DMA_SOC_CHN_TO_DMAMUX_CHN(dma_resource.base, dma_resource.channel);
  187. dmamux_config(HPM_DMAMUX, dmamux_ch, PDM_DMA_REQ, true);
  188. } else {
  189. LOG_E("no dma resource available for PDM transfer.\n");
  190. return -RT_ERROR;
  191. }
  192. i2s_reset_rx(PDM_I2S);
  193. if (RT_EOK != hpm_pdm_dma_transmit()) {
  194. return -RT_ERROR;
  195. }
  196. pdm_start(HPM_PDM);
  197. i2s_enable_rx_dma_request(PDM_I2S);
  198. i2s_start(PDM_I2S);
  199. }
  200. return RT_EOK;
  201. }
  202. static rt_err_t hpm_pdm_stop(struct rt_audio_device* audio, int stream)
  203. {
  204. RT_ASSERT(audio != RT_NULL);
  205. if (stream == AUDIO_STREAM_RECORD) {
  206. pdm_stop(HPM_PDM);
  207. i2s_stop(PDM_I2S);
  208. dma_abort_channel(dma_resource.base, dma_resource.channel);
  209. dma_mgr_release_resource(&dma_resource);
  210. }
  211. return RT_EOK;
  212. }
  213. static rt_err_t hpm_pdm_dma_transmit()
  214. {
  215. dma_channel_config_t ch_config = {0};
  216. dma_default_channel_config(dma_resource.base, &ch_config);
  217. ch_config.src_addr = (uint32_t)&PDM_I2S->RXD[PDM_I2S_DATA_LINE];
  218. ch_config.dst_addr = core_local_mem_to_sys_address(HPM_CORE0, (uint32_t)hpm_pdm_dev.rx_fifo);
  219. ch_config.src_width = DMA_TRANSFER_WIDTH_WORD;
  220. ch_config.dst_width = DMA_TRANSFER_WIDTH_WORD;
  221. ch_config.src_addr_ctrl = DMA_ADDRESS_CONTROL_FIXED;
  222. ch_config.dst_addr_ctrl = DMA_ADDRESS_CONTROL_INCREMENT;
  223. ch_config.size_in_byte = PDM_FIFO_SIZE;
  224. ch_config.src_mode = DMA_HANDSHAKE_MODE_HANDSHAKE;
  225. ch_config.src_burst_size = DMA_NUM_TRANSFER_PER_BURST_1T;
  226. if (status_success != dma_setup_channel(dma_resource.base, dma_resource.channel, &ch_config, true)) {
  227. LOG_E("dma setup channel failed\n");
  228. return -RT_ERROR;
  229. }
  230. if (l1c_dc_is_enabled()) {
  231. /* cache invalidate for receive buff */
  232. l1c_dc_invalidate((uint32_t)hpm_pdm_dev.rx_fifo, PDM_FIFO_SIZE);
  233. }
  234. return RT_EOK;
  235. }
  236. static struct rt_audio_ops hpm_pdm_ops =
  237. {
  238. .getcaps = hpm_pdm_getcaps,
  239. .configure = hpm_pdm_configure,
  240. .init = hpm_pdm_init,
  241. .start = hpm_pdm_start,
  242. .stop = hpm_pdm_stop,
  243. .transmit = NULL,
  244. .buffer_info = NULL,
  245. };
  246. ATTR_ALIGN(HPM_L1C_CACHELINE_SIZE) uint8_t pdm_rx_fifo[PDM_FIFO_SIZE];
  247. int rt_hw_pdm_init(void)
  248. {
  249. hpm_pdm_dev.rx_fifo = pdm_rx_fifo;
  250. hpm_pdm_dev.audio.ops = &hpm_pdm_ops;
  251. LOG_I("audio pdm registered.\n");
  252. LOG_I("!!!Note: pdm depends on i2s0, they share clock.\n");
  253. rt_audio_register(&hpm_pdm_dev.audio, "pdm", RT_DEVICE_FLAG_RDONLY, &hpm_pdm_dev);
  254. return RT_EOK;
  255. }
  256. INIT_DEVICE_EXPORT(rt_hw_pdm_init);
  257. #endif /* BSP_USING_PDM */