hw_eqep.h 20 KB

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  1. //###########################################################################
  2. //
  3. // FILE: hw_eqep.h
  4. //
  5. // TITLE: Definitions for the C28x EQEP registers.
  6. //
  7. //###########################################################################
  8. // $TI Release: F2837xD Support Library v3.05.00.00 $
  9. // $Release Date: Tue Jun 26 03:15:23 CDT 2018 $
  10. // $Copyright:
  11. // Copyright (C) 2013-2018 Texas Instruments Incorporated - http://www.ti.com/
  12. //
  13. // Redistribution and use in source and binary forms, with or without
  14. // modification, are permitted provided that the following conditions
  15. // are met:
  16. //
  17. // Redistributions of source code must retain the above copyright
  18. // notice, this list of conditions and the following disclaimer.
  19. //
  20. // Redistributions in binary form must reproduce the above copyright
  21. // notice, this list of conditions and the following disclaimer in the
  22. // documentation and/or other materials provided with the
  23. // distribution.
  24. //
  25. // Neither the name of Texas Instruments Incorporated nor the names of
  26. // its contributors may be used to endorse or promote products derived
  27. // from this software without specific prior written permission.
  28. //
  29. // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  30. // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  31. // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  32. // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  33. // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  34. // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  35. // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  36. // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  37. // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  38. // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  39. // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  40. // $
  41. //###########################################################################
  42. #ifndef __HW_EQEP_H__
  43. #define __HW_EQEP_H__
  44. //*****************************************************************************
  45. //
  46. // The following are defines for the EQEP register offsets
  47. //
  48. //*****************************************************************************
  49. #define EQEP_O_QPOSCNT 0x0 // Position Counter
  50. #define EQEP_O_QPOSINIT 0x2 // Position Counter Init
  51. #define EQEP_O_QPOSMAX 0x4 // Maximum Position Count
  52. #define EQEP_O_QPOSCMP 0x6 // Position Compare
  53. #define EQEP_O_QPOSILAT 0x8 // Index Position Latch
  54. #define EQEP_O_QPOSSLAT 0xA // Strobe Position Latch
  55. #define EQEP_O_QPOSLAT 0xC // Position Latch
  56. #define EQEP_O_QUTMR 0xE // QEP Unit Timer
  57. #define EQEP_O_QUPRD 0x10 // QEP Unit Period
  58. #define EQEP_O_QWDTMR 0x12 // QEP Watchdog Timer
  59. #define EQEP_O_QWDPRD 0x13 // QEP Watchdog Period
  60. #define EQEP_O_QDECCTL 0x14 // Quadrature Decoder Control
  61. #define EQEP_O_QEPCTL 0x15 // QEP Control
  62. #define EQEP_O_QCAPCTL 0x16 // Qaudrature Capture Control
  63. #define EQEP_O_QPOSCTL 0x17 // Position Compare Control
  64. #define EQEP_O_QEINT 0x18 // QEP Interrupt Control
  65. #define EQEP_O_QFLG 0x19 // QEP Interrupt Flag
  66. #define EQEP_O_QCLR 0x1A // QEP Interrupt Clear
  67. #define EQEP_O_QFRC 0x1B // QEP Interrupt Force
  68. #define EQEP_O_QEPSTS 0x1C // QEP Status
  69. #define EQEP_O_QCTMR 0x1D // QEP Capture Timer
  70. #define EQEP_O_QCPRD 0x1E // QEP Capture Period
  71. #define EQEP_O_QCTMRLAT 0x1F // QEP Capture Latch
  72. #define EQEP_O_QCPRDLAT 0x20 // QEP Capture Period Latch
  73. //*****************************************************************************
  74. //
  75. // The following are defines for the bit fields in the QPOSCNT register
  76. //
  77. //*****************************************************************************
  78. #define EQEP_QPOSCNT_QPOSCNT_S 0
  79. #define EQEP_QPOSCNT_QPOSCNT_M 0xFFFFFFFF // Position Counter
  80. //*****************************************************************************
  81. //
  82. // The following are defines for the bit fields in the QPOSINIT register
  83. //
  84. //*****************************************************************************
  85. #define EQEP_QPOSINIT_QPOSINIT_S 0
  86. #define EQEP_QPOSINIT_QPOSINIT_M 0xFFFFFFFF // Position Counter Init
  87. //*****************************************************************************
  88. //
  89. // The following are defines for the bit fields in the QPOSMAX register
  90. //
  91. //*****************************************************************************
  92. #define EQEP_QPOSMAX_QPOSMAX_S 0
  93. #define EQEP_QPOSMAX_QPOSMAX_M 0xFFFFFFFF // Maximum Position Count
  94. //*****************************************************************************
  95. //
  96. // The following are defines for the bit fields in the QPOSCMP register
  97. //
  98. //*****************************************************************************
  99. #define EQEP_QPOSCMP_QPOSCMP_S 0
  100. #define EQEP_QPOSCMP_QPOSCMP_M 0xFFFFFFFF // Position Compare
  101. //*****************************************************************************
  102. //
  103. // The following are defines for the bit fields in the QPOSILAT register
  104. //
  105. //*****************************************************************************
  106. #define EQEP_QPOSILAT_QPOSILAT_S 0
  107. #define EQEP_QPOSILAT_QPOSILAT_M 0xFFFFFFFF // Index Position Latch
  108. //*****************************************************************************
  109. //
  110. // The following are defines for the bit fields in the QPOSSLAT register
  111. //
  112. //*****************************************************************************
  113. #define EQEP_QPOSSLAT_QPOSSLAT_S 0
  114. #define EQEP_QPOSSLAT_QPOSSLAT_M 0xFFFFFFFF // Strobe Position Latch
  115. //*****************************************************************************
  116. //
  117. // The following are defines for the bit fields in the QPOSLAT register
  118. //
  119. //*****************************************************************************
  120. #define EQEP_QPOSLAT_QPOSLAT_S 0
  121. #define EQEP_QPOSLAT_QPOSLAT_M 0xFFFFFFFF // Position Latch
  122. //*****************************************************************************
  123. //
  124. // The following are defines for the bit fields in the QUTMR register
  125. //
  126. //*****************************************************************************
  127. #define EQEP_QUTMR_QUTMR_S 0
  128. #define EQEP_QUTMR_QUTMR_M 0xFFFFFFFF // QEP Unit Timer
  129. //*****************************************************************************
  130. //
  131. // The following are defines for the bit fields in the QUPRD register
  132. //
  133. //*****************************************************************************
  134. #define EQEP_QUPRD_QUPRD_S 0
  135. #define EQEP_QUPRD_QUPRD_M 0xFFFFFFFF // QEP Unit Period
  136. //*****************************************************************************
  137. //
  138. // The following are defines for the bit fields in the QWDTMR register
  139. //
  140. //*****************************************************************************
  141. #define EQEP_QWDTMR_QWDTMR_S 0
  142. #define EQEP_QWDTMR_QWDTMR_M 0xFFFF // QEP Watchdog Timer
  143. //*****************************************************************************
  144. //
  145. // The following are defines for the bit fields in the QWDPRD register
  146. //
  147. //*****************************************************************************
  148. #define EQEP_QWDPRD_QWDPRD_S 0
  149. #define EQEP_QWDPRD_QWDPRD_M 0xFFFF // QEP Watchdog Period
  150. //*****************************************************************************
  151. //
  152. // The following are defines for the bit fields in the QDECCTL register
  153. //
  154. //*****************************************************************************
  155. #define EQEP_QDECCTL_QSP 0x20 // QEPS input polarity
  156. #define EQEP_QDECCTL_QIP 0x40 // QEPI input polarity
  157. #define EQEP_QDECCTL_QBP 0x80 // QEPB input polarity
  158. #define EQEP_QDECCTL_QAP 0x100 // QEPA input polarity
  159. #define EQEP_QDECCTL_IGATE 0x200 // Index pulse gating option
  160. #define EQEP_QDECCTL_SWAP 0x400 // CLK/DIR Signal Source for
  161. // Position Counter
  162. #define EQEP_QDECCTL_XCR 0x800 // External Clock Rate
  163. #define EQEP_QDECCTL_SPSEL 0x1000 // Sync output pin selection
  164. #define EQEP_QDECCTL_SOEN 0x2000 // Sync output-enable
  165. #define EQEP_QDECCTL_QSRC_S 14
  166. #define EQEP_QDECCTL_QSRC_M 0xC000 // Position-counter source
  167. // selection
  168. //*****************************************************************************
  169. //
  170. // The following are defines for the bit fields in the QEPCTL register
  171. //
  172. //*****************************************************************************
  173. #define EQEP_QEPCTL_WDE 0x1 // QEP watchdog enable
  174. #define EQEP_QEPCTL_UTE 0x2 // QEP unit timer enable
  175. #define EQEP_QEPCTL_QCLM 0x4 // QEP capture latch mode
  176. #define EQEP_QEPCTL_QPEN 0x8 // Quadrature postotion counter
  177. // enable
  178. #define EQEP_QEPCTL_IEL_S 4
  179. #define EQEP_QEPCTL_IEL_M 0x30 // Index event latch
  180. #define EQEP_QEPCTL_SEL 0x40 // Strobe event latch
  181. #define EQEP_QEPCTL_SWI 0x80 // Software init position counter
  182. #define EQEP_QEPCTL_IEI_S 8
  183. #define EQEP_QEPCTL_IEI_M 0x300 // Index event init of position
  184. // count
  185. #define EQEP_QEPCTL_SEI_S 10
  186. #define EQEP_QEPCTL_SEI_M 0xC00 // Strobe event init
  187. #define EQEP_QEPCTL_PCRM_S 12
  188. #define EQEP_QEPCTL_PCRM_M 0x3000 // Postion counter reset
  189. #define EQEP_QEPCTL_FREE_SOFT_S 14
  190. #define EQEP_QEPCTL_FREE_SOFT_M 0xC000 // Emulation mode
  191. //*****************************************************************************
  192. //
  193. // The following are defines for the bit fields in the QCAPCTL register
  194. //
  195. //*****************************************************************************
  196. #define EQEP_QCAPCTL_UPPS_S 0
  197. #define EQEP_QCAPCTL_UPPS_M 0xF // Unit position event prescaler
  198. #define EQEP_QCAPCTL_CCPS_S 4
  199. #define EQEP_QCAPCTL_CCPS_M 0x70 // eQEP capture timer clock
  200. // prescaler
  201. #define EQEP_QCAPCTL_CEN 0x8000 // Enable eQEP capture
  202. //*****************************************************************************
  203. //
  204. // The following are defines for the bit fields in the QPOSCTL register
  205. //
  206. //*****************************************************************************
  207. #define EQEP_QPOSCTL_PCSPW_S 0
  208. #define EQEP_QPOSCTL_PCSPW_M 0xFFF // Position compare sync pulse
  209. // width
  210. #define EQEP_QPOSCTL_PCE 0x1000 // Position compare enable/disable
  211. #define EQEP_QPOSCTL_PCPOL 0x2000 // Polarity of sync output
  212. #define EQEP_QPOSCTL_PCLOAD 0x4000 // Position compare of shadow load
  213. #define EQEP_QPOSCTL_PCSHDW 0x8000 // Position compare of shadow
  214. // enable
  215. //*****************************************************************************
  216. //
  217. // The following are defines for the bit fields in the QEINT register
  218. //
  219. //*****************************************************************************
  220. #define EQEP_QEINT_PCE 0x2 // Position counter error
  221. // interrupt enable
  222. #define EQEP_QEINT_QPE 0x4 // Quadrature phase error
  223. // interrupt enable
  224. #define EQEP_QEINT_QDC 0x8 // Quadrature direction change
  225. // interrupt enable
  226. #define EQEP_QEINT_WTO 0x10 // Watchdog time out interrupt
  227. // enable
  228. #define EQEP_QEINT_PCU 0x20 // Position counter underflow
  229. // interrupt enable
  230. #define EQEP_QEINT_PCO 0x40 // Position counter overflow
  231. // interrupt enable
  232. #define EQEP_QEINT_PCR 0x80 // Position-compare ready
  233. // interrupt enable
  234. #define EQEP_QEINT_PCM 0x100 // Position-compare match
  235. // interrupt enable
  236. #define EQEP_QEINT_SEL 0x200 // Strobe event latch interrupt
  237. // enable
  238. #define EQEP_QEINT_IEL 0x400 // Index event latch interrupt
  239. // enable
  240. #define EQEP_QEINT_UTO 0x800 // Unit time out interrupt enable
  241. //*****************************************************************************
  242. //
  243. // The following are defines for the bit fields in the QFLG register
  244. //
  245. //*****************************************************************************
  246. #define EQEP_QFLG_INT 0x1 // Global interrupt status flag
  247. #define EQEP_QFLG_PCE 0x2 // Position counter error
  248. // interrupt flag
  249. #define EQEP_QFLG_PHE 0x4 // Quadrature phase error
  250. // interrupt flag
  251. #define EQEP_QFLG_QDC 0x8 // Quadrature direction change
  252. // interrupt flag
  253. #define EQEP_QFLG_WTO 0x10 // Watchdog timeout interrupt flag
  254. #define EQEP_QFLG_PCU 0x20 // Position counter underflow
  255. // interrupt flag
  256. #define EQEP_QFLG_PCO 0x40 // Position counter overflow
  257. // interrupt flag
  258. #define EQEP_QFLG_PCR 0x80 // Position-compare ready
  259. // interrupt flag
  260. #define EQEP_QFLG_PCM 0x100 // eQEP compare match event
  261. // interrupt flag
  262. #define EQEP_QFLG_SEL 0x200 // Strobe event latch interrupt
  263. // flag
  264. #define EQEP_QFLG_IEL 0x400 // Index event latch interrupt
  265. // flag
  266. #define EQEP_QFLG_UTO 0x800 // Unit time out interrupt flag
  267. //*****************************************************************************
  268. //
  269. // The following are defines for the bit fields in the QCLR register
  270. //
  271. //*****************************************************************************
  272. #define EQEP_QCLR_INT 0x1 // Global interrupt clear flag
  273. #define EQEP_QCLR_PCE 0x2 // Clear position counter error
  274. // interrupt flag
  275. #define EQEP_QCLR_PHE 0x4 // Clear quadrature phase error
  276. // interrupt flag
  277. #define EQEP_QCLR_QDC 0x8 // Clear quadrature direction
  278. // change interrupt flag
  279. #define EQEP_QCLR_WTO 0x10 // Clear watchdog timeout
  280. // interrupt flag
  281. #define EQEP_QCLR_PCU 0x20 // Clear position counter
  282. // underflow interrupt flag
  283. #define EQEP_QCLR_PCO 0x40 // Clear position counter overflow
  284. // interrupt flag
  285. #define EQEP_QCLR_PCR 0x80 // Clear position-compare ready
  286. // interrupt flag
  287. #define EQEP_QCLR_PCM 0x100 // Clear eQEP compare match event
  288. // interrupt flag
  289. #define EQEP_QCLR_SEL 0x200 // Clear strobe event latch
  290. // interrupt flag
  291. #define EQEP_QCLR_IEL 0x400 // Clear index event latch
  292. // interrupt flag
  293. #define EQEP_QCLR_UTO 0x800 // Clear unit time out interrupt
  294. // flag
  295. //*****************************************************************************
  296. //
  297. // The following are defines for the bit fields in the QFRC register
  298. //
  299. //*****************************************************************************
  300. #define EQEP_QFRC_PCE 0x2 // Force position counter error
  301. // interrupt
  302. #define EQEP_QFRC_PHE 0x4 // Force quadrature phase error
  303. // interrupt
  304. #define EQEP_QFRC_QDC 0x8 // Force quadrature direction
  305. // change interrupt
  306. #define EQEP_QFRC_WTO 0x10 // Force watchdog time out
  307. // interrupt
  308. #define EQEP_QFRC_PCU 0x20 // Force position counter
  309. // underflow interrupt
  310. #define EQEP_QFRC_PCO 0x40 // Force position counter overflow
  311. // interrupt
  312. #define EQEP_QFRC_PCR 0x80 // Force position-compare ready
  313. // interrupt
  314. #define EQEP_QFRC_PCM 0x100 // Force position-compare match
  315. // interrupt
  316. #define EQEP_QFRC_SEL 0x200 // Force strobe event latch
  317. // interrupt
  318. #define EQEP_QFRC_IEL 0x400 // Force index event latch
  319. // interrupt
  320. #define EQEP_QFRC_UTO 0x800 // Force unit time out interrupt
  321. //*****************************************************************************
  322. //
  323. // The following are defines for the bit fields in the QEPSTS register
  324. //
  325. //*****************************************************************************
  326. #define EQEP_QEPSTS_PCEF 0x1 // Position counter error flag.
  327. #define EQEP_QEPSTS_FIMF 0x2 // First index marker flag
  328. #define EQEP_QEPSTS_CDEF 0x4 // Capture direction error flag
  329. #define EQEP_QEPSTS_COEF 0x8 // Capture overflow error flag
  330. #define EQEP_QEPSTS_QDLF 0x10 // eQEP direction latch flag
  331. #define EQEP_QEPSTS_QDF 0x20 // Quadrature direction flag
  332. #define EQEP_QEPSTS_FIDF 0x40 // The first index marker
  333. #define EQEP_QEPSTS_UPEVNT 0x80 // Unit position event flag
  334. //*****************************************************************************
  335. //
  336. // The following are defines for the bit fields in the QCTMR register
  337. //
  338. //*****************************************************************************
  339. #define EQEP_QCTMR_QCTMR_S 0
  340. #define EQEP_QCTMR_QCTMR_M 0xFFFF // This register provides time
  341. // base for edge capture unit.
  342. //*****************************************************************************
  343. //
  344. // The following are defines for the bit fields in the QCPRD register
  345. //
  346. //*****************************************************************************
  347. #define EQEP_QCPRD_QCPRD_S 0
  348. #define EQEP_QCPRD_QCPRD_M 0xFFFF // Period count value between
  349. // eQEP position events
  350. //*****************************************************************************
  351. //
  352. // The following are defines for the bit fields in the QCTMRLAT register
  353. //
  354. //*****************************************************************************
  355. #define EQEP_QCTMRLAT_QCTMRLAT_S 0
  356. #define EQEP_QCTMRLAT_QCTMRLAT_M 0xFFFF // The eQEP capture timer latch
  357. // value
  358. //*****************************************************************************
  359. //
  360. // The following are defines for the bit fields in the QCPRDLAT register
  361. //
  362. //*****************************************************************************
  363. #define EQEP_QCPRDLAT_QCPRDLAT_S 0
  364. #define EQEP_QCPRDLAT_QCPRDLAT_M 0xFFFF // eQEP capture period latch value
  365. #endif