drv_dac.c 5.5 KB

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  1. /*
  2. * Copyright (c) 2006-2023, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2022-03-04 stevetong459 first version
  9. * 2022-07-15 Aligagago add APM32F4 series MCU support
  10. * 2022-12-26 luobeihai add APM32F0 series MCU support
  11. * 2023-03-27 luobeihai add APM32E1 series MCU support
  12. */
  13. #include <board.h>
  14. #if defined(BSP_USING_DAC1)
  15. #define DBG_TAG "drv.dac"
  16. #define DBG_LVL DBG_LOG
  17. #include <rtdbg.h>
  18. struct apm32_dac
  19. {
  20. const char *name;
  21. DAC_T *dac;
  22. DAC_Config_T dac_conf;
  23. struct rt_dac_device dac_dev;
  24. };
  25. static struct apm32_dac dac_config[] =
  26. {
  27. #if defined (BSP_USING_DAC1)
  28. {
  29. #if defined (SOC_SERIES_APM32F0)
  30. "dac1",
  31. DAC,
  32. {
  33. DAC_TRIGGER_SOFTWARE,
  34. DAC_OUTPUTBUFF_DISABLE,
  35. DAC_WAVE_GENERATION_NONE,
  36. DAC_TRIANGLEAMPLITUDE_4095,
  37. },
  38. #elif defined (SOC_SERIES_APM32F1) || defined (SOC_SERIES_APM32E1) || defined (SOC_SERIES_APM32F4)
  39. "dac1",
  40. DAC,
  41. {
  42. DAC_TRIGGER_SOFT,
  43. DAC_OUTPUT_BUFFER_DISABLE,
  44. DAC_WAVE_GENERATION_NONE,
  45. DAC_TRIANGLE_AMPLITUDE_4095,
  46. },
  47. #endif
  48. }
  49. #endif
  50. };
  51. /**
  52. * @brief This function will enable dac.
  53. *
  54. * @param device is a pointer to dac device.
  55. *
  56. * @param channel is the dac channel.
  57. *
  58. * @return RT_EOK indicates successful enable dac, other value indicates failed.
  59. */
  60. static rt_err_t apm32_dac_enabled(struct rt_dac_device *device, rt_uint32_t channel)
  61. {
  62. GPIO_Config_T GPIO_ConfigStruct;
  63. struct apm32_dac *cfg = (struct apm32_dac *)device->parent.user_data;
  64. #if defined (SOC_SERIES_APM32F1) || defined (SOC_SERIES_APM32E1)
  65. RCM_EnableAPB2PeriphClock(RCM_APB2_PERIPH_GPIOA);
  66. GPIO_ConfigStruct.mode = GPIO_MODE_ANALOG;
  67. #elif defined (SOC_SERIES_APM32F4)
  68. RCM_EnableAHB1PeriphClock(RCM_AHB1_PERIPH_GPIOA);
  69. GPIO_ConfigStruct.mode = GPIO_MODE_AN;
  70. #elif defined (SOC_SERIES_APM32F0)
  71. RCM_EnableAHBPeriphClock(RCM_AHB_PERIPH_GPIOA);
  72. GPIO_ConfigStruct.mode = GPIO_MODE_AN;
  73. #endif
  74. if (channel == 1)
  75. {
  76. GPIO_ConfigStruct.pin = GPIO_PIN_4;
  77. GPIO_Config(GPIOA, &GPIO_ConfigStruct);
  78. DAC_Config(DAC_CHANNEL_1, &cfg->dac_conf);
  79. DAC_Enable(DAC_CHANNEL_1);
  80. }
  81. else if (channel == 2)
  82. {
  83. GPIO_ConfigStruct.pin = GPIO_PIN_5;
  84. GPIO_Config(GPIOA, &GPIO_ConfigStruct);
  85. DAC_Config(DAC_CHANNEL_2, &cfg->dac_conf);
  86. DAC_Enable(DAC_CHANNEL_2);
  87. }
  88. else
  89. {
  90. LOG_E("dac channel must be 1 or 2.");
  91. return -RT_ERROR;
  92. }
  93. return RT_EOK;
  94. }
  95. /**
  96. * @brief This function will disable dac.
  97. *
  98. * @param device is a pointer to dac device.
  99. *
  100. * @param channel is the dac channel.
  101. *
  102. * @return RT_EOK indicates successful disable dac, other value indicates failed.
  103. */
  104. static rt_err_t apm32_dac_disabled(struct rt_dac_device *device, rt_uint32_t channel)
  105. {
  106. if (channel == 1)
  107. {
  108. DAC_Disable(DAC_CHANNEL_1);
  109. }
  110. else if (channel == 2)
  111. {
  112. DAC_Disable(DAC_CHANNEL_2);
  113. }
  114. else
  115. {
  116. LOG_E("dac channel must be 1 or 2.");
  117. return -RT_ERROR;
  118. }
  119. return RT_EOK;
  120. }
  121. /**
  122. * @brief This function will set the vaule of dac.
  123. *
  124. * @param device is a pointer to dac device.
  125. *
  126. * @param channel is the dac channel.
  127. *
  128. * @param value is a pointer to dac value to be convert.
  129. *
  130. * @return RT_EOK indicates successful set dac value, other value indicates failed.
  131. */
  132. static rt_err_t apm32_dac_set_value(struct rt_dac_device *device, rt_uint32_t channel, rt_uint32_t *value)
  133. {
  134. #if defined (SOC_SERIES_APM32F0)
  135. if (channel == 1)
  136. {
  137. DAC_ConfigChannel1Data(DAC_ALIGN_12B_R, *value);
  138. DAC_EnableSoftwareTrigger(DAC_CHANNEL_1);
  139. }
  140. else if (channel == 2)
  141. {
  142. DAC_ConfigChannel2Data(DAC_ALIGN_12B_R, *value);
  143. DAC_EnableSoftwareTrigger(DAC_CHANNEL_2);
  144. }
  145. else
  146. {
  147. LOG_E("dac channel must be 1 or 2.");
  148. return -RT_ERROR;
  149. }
  150. #elif defined (SOC_SERIES_APM32F1) || defined (SOC_SERIES_APM32E1) || defined (SOC_SERIES_APM32F4)
  151. if (channel == 1)
  152. {
  153. DAC_ConfigChannel1Data(DAC_ALIGN_12BIT_R, *value);
  154. DAC_EnableSoftwareTrigger(DAC_CHANNEL_1);
  155. }
  156. else if (channel == 2)
  157. {
  158. DAC_ConfigChannel2Data(DAC_ALIGN_12BIT_R, *value);
  159. DAC_EnableSoftwareTrigger(DAC_CHANNEL_2);
  160. }
  161. else
  162. {
  163. LOG_E("dac channel must be 1 or 2.");
  164. return -RT_ERROR;
  165. }
  166. #endif
  167. return RT_EOK;
  168. }
  169. static const struct rt_dac_ops apm32_dac_ops =
  170. {
  171. .disabled = apm32_dac_disabled,
  172. .enabled = apm32_dac_enabled,
  173. .convert = apm32_dac_set_value,
  174. };
  175. /**
  176. * @brief DAC initialization function.
  177. *
  178. * @return RT_EOK indicates successful initialization, other value indicates failed;
  179. */
  180. static int rt_hw_dac_init(void)
  181. {
  182. rt_err_t result = RT_EOK;
  183. rt_size_t obj_num = sizeof(dac_config) / sizeof(struct apm32_dac);
  184. rt_uint32_t i = 0;
  185. RCM_EnableAPB1PeriphClock(RCM_APB1_PERIPH_DAC);
  186. for (i = 0; i < obj_num; i++)
  187. {
  188. /* register dac device */
  189. if (rt_hw_dac_register(&dac_config[i].dac_dev, dac_config[i].name, &apm32_dac_ops, dac_config) == RT_EOK)
  190. {
  191. LOG_D("%s init success", dac_config[i].name);
  192. }
  193. else
  194. {
  195. LOG_E("%s init failed", dac_config[i].name);
  196. result = -RT_ERROR;
  197. }
  198. }
  199. return result;
  200. }
  201. INIT_DEVICE_EXPORT(rt_hw_dac_init);
  202. #endif /* BSP_USING_DACX */