drv_iic.c 23 KB

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  1. /*
  2. * Copyright (c) 2006-2022, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2011-01-06 onelife Initial creation for EFM32
  9. * 2011-06-17 onelife Modify init function for EFM32 library v2.0.0 upgrading
  10. * 2011-07-11 onelife Add lock (semaphore) to prevent simultaneously access
  11. * 2011-08-04 onelife Change the usage of the second parameter of Read
  12. * and Write functions from (seldom used) "Offset" to "Slave address"
  13. * 2011-08-04 onelife Add a timer to prevent from forever waiting
  14. * 2011-11-29 onelife Modify init function for EFM32 library v2.2.2 upgrading
  15. * 2011-12-27 onelife Utilize "I2C_PRESENT" and "I2C_COUNT"
  16. * 2011-12-27 onelife Change IIC read format
  17. */
  18. /***************************************************************************//**
  19. * @addtogroup efm32
  20. * @{
  21. ******************************************************************************/
  22. /* Includes ------------------------------------------------------------------*/
  23. #include "board.h"
  24. #include "hdl_interrupt.h"
  25. #include "drv_iic.h"
  26. #if (defined(RT_USING_IIC0) || defined(RT_USING_IIC1))
  27. #if !defined(I2C_PRESENT)
  28. #error "IIC module is not available"
  29. #endif
  30. /* Private typedef -----------------------------------------------------------*/
  31. struct efm32_iic_block
  32. {
  33. struct rt_device device;
  34. struct rt_semaphore lock;
  35. struct rt_timer timer;
  36. };
  37. /* Private define ------------------------------------------------------------*/
  38. /* Private macro -------------------------------------------------------------*/
  39. #ifdef RT_IIC_DEBUG
  40. #define iic_debug(format,args...) rt_kprintf(format, ##args)
  41. #else
  42. #define iic_debug(format,args...)
  43. #endif
  44. /* Private variables ---------------------------------------------------------*/
  45. #ifdef RT_USING_IIC0
  46. #if (RT_USING_IIC0 > EFM32_IIC_LOCATION_COUNT)
  47. #error "Wrong location number"
  48. #endif
  49. static struct efm32_iic_block iic0;
  50. #endif
  51. #ifdef RT_USING_IIC1
  52. #if (I2C_COUNT <= 1)
  53. #error "Wrong unit number"
  54. #endif
  55. #if (RT_USING_IIC1 > EFM32_IIC_LOCATION_COUNT)
  56. #error "Wrong location number"
  57. #endif
  58. static struct efm32_iic_block iic1;
  59. #endif
  60. /* Private function prototypes -----------------------------------------------*/
  61. /* Private functions ---------------------------------------------------------*/
  62. /***************************************************************************//**
  63. * @brief
  64. * Initialize IIC device
  65. *
  66. * @details
  67. *
  68. * @note
  69. *
  70. * @param[in] dev
  71. * Pointer to device descriptor
  72. *
  73. * @return
  74. * Error code
  75. ******************************************************************************/
  76. static rt_err_t rt_iic_init (rt_device_t dev)
  77. {
  78. struct efm32_iic_device_t* iic;
  79. iic = (struct efm32_iic_device_t*)dev->user_data;
  80. if (!(dev->flag & RT_DEVICE_FLAG_ACTIVATED))
  81. {
  82. /* Enable IIC */
  83. I2C_Enable(iic->iic_device, true);
  84. iic->rx_buffer = RT_NULL;
  85. iic->state = 0;
  86. dev->flag |= RT_DEVICE_FLAG_ACTIVATED;
  87. }
  88. return RT_EOK;
  89. }
  90. /***************************************************************************//**
  91. * @brief
  92. * Open IIC device
  93. *
  94. * @details
  95. *
  96. * @note
  97. *
  98. * @param[in] dev
  99. * Pointer to device descriptor
  100. *
  101. * @param[in] oflag
  102. * Device open flag
  103. *
  104. * @return
  105. * Error code
  106. ******************************************************************************/
  107. static rt_err_t rt_iic_open(rt_device_t dev, rt_uint16_t oflag)
  108. {
  109. RT_ASSERT(dev != RT_NULL);
  110. struct efm32_iic_device_t *iic;
  111. iic = (struct efm32_iic_device_t *)(dev->user_data);
  112. iic->counter++;
  113. iic_debug("IIC: Open with flag %x\n", oflag);
  114. return RT_EOK;
  115. }
  116. /***************************************************************************//**
  117. * @brief
  118. * Close IIC device
  119. *
  120. * @details
  121. *
  122. * @note
  123. *
  124. * @param[in] dev
  125. * Pointer to device descriptor
  126. *
  127. * @return
  128. * Error code
  129. ******************************************************************************/
  130. static rt_err_t rt_iic_close(rt_device_t dev)
  131. {
  132. RT_ASSERT(dev != RT_NULL);
  133. struct efm32_iic_device_t *iic;
  134. iic = (struct efm32_iic_device_t *)(dev->user_data);
  135. if (--iic->counter == 0)
  136. {
  137. rt_free(iic->rx_buffer->data_ptr);
  138. rt_free(iic->rx_buffer);
  139. iic->rx_buffer = RT_NULL;
  140. }
  141. return RT_EOK;
  142. }
  143. /***************************************************************************//**
  144. * @brief
  145. * Read from IIC device
  146. *
  147. * @details
  148. *
  149. * @note
  150. *
  151. * @param[in] dev
  152. * Pointer to device descriptor
  153. *
  154. * @param[in] pos
  155. * Slave address
  156. *
  157. * @param[in] buffer
  158. * Poniter to the buffer
  159. *
  160. * @param[in] size
  161. * Buffer size in byte
  162. *
  163. * @return
  164. * Error code
  165. ******************************************************************************/
  166. static rt_ssize_t rt_iic_read (
  167. rt_device_t dev,
  168. rt_off_t pos,
  169. void* buffer,
  170. rt_size_t size)
  171. {
  172. rt_err_t err_code;
  173. rt_size_t read_size;
  174. struct efm32_iic_device_t* iic;
  175. I2C_TransferSeq_TypeDef seq;
  176. I2C_TransferReturn_TypeDef ret;
  177. if (!size)
  178. {
  179. return 0;
  180. }
  181. err_code = RT_EOK;
  182. read_size = 0;
  183. iic = (struct efm32_iic_device_t*)dev->user_data;
  184. /* Lock device */
  185. if (rt_hw_interrupt_check())
  186. {
  187. ret = rt_sem_take(iic->lock, RT_WAITING_NO);
  188. }
  189. else
  190. {
  191. ret = rt_sem_take(iic->lock, RT_WAITING_FOREVER);
  192. }
  193. if (ret != RT_EOK)
  194. {
  195. return ret;
  196. }
  197. if (iic->state & IIC_STATE_MASTER)
  198. {
  199. seq.addr = (rt_uint16_t)pos << 1;
  200. if (*(rt_uint8_t *)buffer == IIC_OP_READ_ONLY)
  201. {
  202. seq.flags = I2C_FLAG_READ;
  203. /* Set read buffer pointer and size */
  204. seq.buf[0].data = (rt_uint8_t *)buffer;
  205. seq.buf[0].len = size;
  206. }
  207. else
  208. {
  209. seq.flags = I2C_FLAG_WRITE_READ;
  210. /* Set register to be read */
  211. seq.buf[0].data = (rt_uint8_t *)buffer;
  212. seq.buf[0].len = 1;
  213. /* Set read buffer pointer and size */
  214. seq.buf[1].data = (rt_uint8_t *)buffer;
  215. seq.buf[1].len = size;
  216. }
  217. /* Do a polled transfer */
  218. iic->timeout = false;
  219. rt_timer_stop(iic->timer);
  220. rt_timer_start(iic->timer);
  221. ret = I2C_TransferInit(iic->iic_device, &seq);
  222. while ((ret == i2cTransferInProgress) && !iic->timeout)
  223. {
  224. ret = I2C_Transfer(iic->iic_device);
  225. }
  226. if (ret != i2cTransferDone)
  227. {
  228. iic_debug("IIC: read error %x\n", ret);
  229. iic_debug("IIC: read address %x\n", seq.addr);
  230. iic_debug("IIC: read data0 %x -> %x\n", seq.buf[0].data, *seq.buf[0].data);
  231. iic_debug("IIC: read len0 %x\n", seq.buf[0].len);
  232. iic_debug("IIC: read data1 %x -> %x\n", seq.buf[1].data, *seq.buf[1].data);
  233. iic_debug("IIC: read len1 %x\n", seq.buf[1].len);
  234. err_code = (rt_err_t)ret;
  235. }
  236. else
  237. {
  238. read_size = size;
  239. iic_debug("IIC: read size %d\n", read_size);
  240. }
  241. }
  242. else
  243. {
  244. rt_uint8_t* ptr;
  245. ptr = buffer;
  246. /* interrupt mode Rx */
  247. while (size)
  248. {
  249. rt_base_t level;
  250. struct efm32_iic_int_mode_t *int_rx;
  251. int_rx = iic->rx_buffer;
  252. /* disable interrupt */
  253. level = rt_hw_interrupt_disable();
  254. if (int_rx->read_index != int_rx->save_index)
  255. {
  256. /* read a character */
  257. *ptr++ = int_rx->data_ptr[int_rx->read_index];
  258. size--;
  259. /* move to next position */
  260. int_rx->read_index ++;
  261. if (int_rx->read_index >= IIC_RX_BUFFER_SIZE)
  262. {
  263. int_rx->read_index = 0;
  264. }
  265. }
  266. else
  267. {
  268. /* set error code */
  269. err_code = -RT_EEMPTY;
  270. /* enable interrupt */
  271. rt_hw_interrupt_enable(level);
  272. break;
  273. }
  274. /* enable interrupt */
  275. rt_hw_interrupt_enable(level);
  276. }
  277. read_size = (rt_uint32_t)ptr - (rt_uint32_t)buffer;
  278. iic_debug("IIC: slave read size %d\n", read_size);
  279. }
  280. /* Unlock device */
  281. rt_sem_release(iic->lock);
  282. /* set error code */
  283. rt_set_errno(err_code);
  284. return read_size;
  285. }
  286. /***************************************************************************//**
  287. * @brief
  288. * Write to IIC device
  289. *
  290. * @details
  291. *
  292. * @note
  293. *
  294. * @param[in] dev
  295. * Pointer to device descriptor
  296. *
  297. * @param[in] pos
  298. * Slave address
  299. *
  300. * @param[in] buffer
  301. * Poniter to the buffer
  302. *
  303. * @param[in] size
  304. * Buffer size in byte
  305. *
  306. * @return
  307. * Error code
  308. ******************************************************************************/
  309. static rt_ssize_t rt_iic_write (
  310. rt_device_t dev,
  311. rt_off_t pos,
  312. const void* buffer,
  313. rt_size_t size)
  314. {
  315. rt_err_t err_code;
  316. rt_size_t write_size;
  317. struct efm32_iic_device_t* iic;
  318. I2C_TransferSeq_TypeDef seq;
  319. I2C_TransferReturn_TypeDef ret;
  320. if (!size)
  321. {
  322. return 0;
  323. }
  324. err_code = RT_EOK;
  325. write_size = 0;
  326. iic = (struct efm32_iic_device_t*)dev->user_data;
  327. /* Lock device */
  328. if (rt_hw_interrupt_check())
  329. {
  330. ret = rt_sem_take(iic->lock, RT_WAITING_NO);
  331. }
  332. else
  333. {
  334. ret = rt_sem_take(iic->lock, RT_WAITING_FOREVER);
  335. }
  336. if (ret != RT_EOK)
  337. {
  338. return ret;
  339. }
  340. if (iic->state & IIC_STATE_MASTER)
  341. {
  342. seq.addr = (rt_uint16_t)pos << 1;
  343. seq.flags = I2C_FLAG_WRITE;
  344. /* Set write buffer pointer and size */
  345. seq.buf[0].data = (rt_uint8_t *)buffer;
  346. seq.buf[0].len = size;
  347. }
  348. else
  349. {
  350. // TODO: Slave mode TX
  351. }
  352. /* Do a polled transfer */
  353. iic->timeout = false;
  354. rt_timer_stop(iic->timer);
  355. rt_timer_start(iic->timer);
  356. ret = I2C_TransferInit(iic->iic_device, &seq);
  357. while ((ret == i2cTransferInProgress) && !iic->timeout)
  358. {
  359. ret = I2C_Transfer(iic->iic_device);
  360. }
  361. if (ret != i2cTransferDone)
  362. {
  363. err_code = (rt_err_t)ret;
  364. }
  365. else
  366. {
  367. write_size = size;
  368. }
  369. /* Unlock device */
  370. rt_sem_release(iic->lock);
  371. /* set error code */
  372. rt_set_errno(err_code);
  373. return write_size;
  374. }
  375. /***************************************************************************//**
  376. * @brief
  377. * Configure IIC device
  378. *
  379. * @details
  380. *
  381. * @note
  382. *
  383. * @param[in] dev
  384. * Pointer to device descriptor
  385. *
  386. * @param[in] cmd
  387. * IIC control command
  388. *
  389. * @param[in] args
  390. * Arguments
  391. *
  392. * @return
  393. * Error code
  394. ******************************************************************************/
  395. static rt_err_t rt_iic_control (
  396. rt_device_t dev,
  397. rt_uint8_t cmd,
  398. void *args)
  399. {
  400. RT_ASSERT(dev != RT_NULL);
  401. rt_err_t ret;
  402. struct efm32_iic_device_t *iic;
  403. iic = (struct efm32_iic_device_t*)dev->user_data;
  404. /* Lock device */
  405. if (rt_hw_interrupt_check())
  406. {
  407. ret = rt_sem_take(iic->lock, RT_WAITING_NO);
  408. }
  409. else
  410. {
  411. ret = rt_sem_take(iic->lock, RT_WAITING_FOREVER);
  412. }
  413. if (ret != RT_EOK)
  414. {
  415. return ret;
  416. }
  417. switch (cmd)
  418. {
  419. case RT_DEVICE_CTRL_SUSPEND:
  420. /* suspend device */
  421. dev->flag |= RT_DEVICE_FLAG_SUSPENDED;
  422. I2C_Enable(iic->iic_device, false);
  423. break;
  424. case RT_DEVICE_CTRL_RESUME:
  425. /* resume device */
  426. dev->flag &= ~RT_DEVICE_FLAG_SUSPENDED;
  427. I2C_Enable(iic->iic_device, true);
  428. break;
  429. case RT_DEVICE_CTRL_IIC_SETTING:
  430. {
  431. /* change device setting */
  432. struct efm32_iic_control_t *control;
  433. control = (struct efm32_iic_control_t *)args;
  434. iic->state = control->config & (IIC_STATE_MASTER | IIC_STATE_BROADCAST);
  435. iic->address = control->address << 1;
  436. if (!(iic->state & IIC_STATE_MASTER))
  437. {
  438. if (iic->rx_buffer == RT_NULL)
  439. {
  440. iic->rx_buffer = rt_malloc(sizeof(struct efm32_iic_int_mode_t));
  441. if (iic->rx_buffer == RT_NULL)
  442. {
  443. iic_debug("IIC err: no MEM for IIC RX structure\n");
  444. return -RT_ENOMEM;
  445. }
  446. /* Allocate RX buffer */
  447. if ((iic->rx_buffer->data_ptr = \
  448. rt_malloc(IIC_RX_BUFFER_SIZE)) == RT_NULL)
  449. {
  450. iic_debug("IIC err: no MEM for IIC RX buffer\n");
  451. rt_free(iic->rx_buffer);
  452. return -RT_ENOMEM;
  453. }
  454. rt_memset(iic->rx_buffer->data_ptr, 0, IIC_RX_BUFFER_SIZE);
  455. iic->rx_buffer->data_size = IIC_RX_BUFFER_SIZE;
  456. iic->rx_buffer->read_index = 0;
  457. iic->rx_buffer->save_index = 0;
  458. }
  459. /* Enable slave mode */
  460. I2C_SlaveAddressSet(iic->iic_device, iic->address);
  461. I2C_SlaveAddressMaskSet(iic->iic_device, 0xFF);
  462. iic->iic_device->CTRL |= I2C_CTRL_SLAVE | I2C_CTRL_AUTOACK | I2C_CTRL_AUTOSN;
  463. /* Enable interrupts */
  464. I2C_IntEnable(iic->iic_device, I2C_IEN_ADDR | I2C_IEN_RXDATAV | I2C_IEN_SSTOP);
  465. I2C_IntClear(iic->iic_device, _I2C_IFC_MASK);
  466. /* Enable I2Cn interrupt vector in NVIC */
  467. if (dev == &iic0.device)
  468. {
  469. NVIC_ClearPendingIRQ(I2C0_IRQn);
  470. NVIC_SetPriority(I2C0_IRQn, EFM32_IRQ_PRI_DEFAULT);
  471. NVIC_EnableIRQ(I2C0_IRQn);
  472. }
  473. #if (I2C_COUNT > 1)
  474. if (dev == &iic1.device)
  475. {
  476. NVIC_ClearPendingIRQ(I2C1_IRQn);
  477. NVIC_SetPriority(I2C1_IRQn, EFM32_IRQ_PRI_DEFAULT);
  478. NVIC_EnableIRQ(I2C1_IRQn);
  479. }
  480. #endif
  481. }
  482. }
  483. break;
  484. }
  485. /* Unlock device */
  486. rt_sem_release(iic->lock);
  487. return RT_EOK;
  488. }
  489. /***************************************************************************//**
  490. * @brief
  491. * IIC timeout interrupt handler
  492. *
  493. * @details
  494. *
  495. * @note
  496. *
  497. * @param[in] parameter
  498. * Parameter
  499. ******************************************************************************/
  500. static void rt_iic_timer(void *timeout)
  501. {
  502. *(rt_bool_t *)timeout = true;
  503. }
  504. /***************************************************************************//**
  505. * @brief
  506. * Register IIC device
  507. *
  508. * @details
  509. *
  510. * @note
  511. *
  512. * @param[in] device
  513. * Pointer to device descriptor
  514. *
  515. * @param[in] name
  516. * Device name
  517. *
  518. * @param[in] flag
  519. * Configuration flags
  520. *
  521. * @param[in] iic
  522. * Pointer to IIC device descriptor
  523. *
  524. * @return
  525. * Error code
  526. ******************************************************************************/
  527. rt_err_t rt_hw_iic_register(
  528. rt_device_t device,
  529. const char *name,
  530. rt_uint32_t flag,
  531. struct efm32_iic_device_t *iic)
  532. {
  533. RT_ASSERT(device != RT_NULL);
  534. if ((flag & RT_DEVICE_FLAG_DMA_TX) || (flag & RT_DEVICE_FLAG_DMA_RX) ||
  535. (flag & RT_DEVICE_FLAG_INT_TX))
  536. {
  537. RT_ASSERT(0);
  538. }
  539. device->type = RT_Device_Class_Unknown;
  540. device->rx_indicate = RT_NULL;
  541. device->tx_complete = RT_NULL;
  542. device->init = rt_iic_init;
  543. device->open = rt_iic_open;
  544. device->close = rt_iic_close;
  545. device->read = rt_iic_read;
  546. device->write = rt_iic_write;
  547. device->control = rt_iic_control;
  548. device->user_data = iic;
  549. /* register a character device */
  550. return rt_device_register(device, name, RT_DEVICE_FLAG_RDWR | flag);
  551. }
  552. /***************************************************************************//**
  553. * @brief
  554. * IIC slave mode RX data valid interrupt handler
  555. *
  556. * @details
  557. *
  558. * @note
  559. *
  560. * @param[in] dev
  561. * Pointer to device descriptor
  562. ******************************************************************************/
  563. static void rt_hw_iic_slave_isr(rt_device_t dev)
  564. {
  565. struct efm32_iic_device_t *iic;
  566. struct efm32_iic_int_mode_t *int_rx;
  567. rt_uint32_t status;
  568. volatile rt_uint32_t temp;
  569. /* interrupt mode receive */
  570. RT_ASSERT(dev->flag & RT_DEVICE_FLAG_INT_RX);
  571. iic = (struct efm32_iic_device_t*)dev->user_data;
  572. int_rx = iic->rx_buffer;
  573. status = iic->iic_device->IF;
  574. if (status & I2C_IF_ADDR)
  575. {
  576. /* Address Match */
  577. /* Indicating that reception is started */
  578. temp = iic->iic_device->RXDATA & 0xFFUL;
  579. if ((temp != 0x00) || (iic->state & IIC_STATE_BROADCAST))
  580. {
  581. iic->state |= IIC_STATE_RX_BUSY;
  582. }
  583. }
  584. else if (status & I2C_IF_RXDATAV)
  585. {
  586. if (iic->state & IIC_STATE_RX_BUSY)
  587. {
  588. rt_base_t level;
  589. /* disable interrupt */
  590. level = rt_hw_interrupt_disable();
  591. /* save character */
  592. int_rx->data_ptr[int_rx->save_index] = \
  593. (rt_uint8_t)(iic->iic_device->RXDATA & 0xFFUL);
  594. int_rx->save_index ++;
  595. if (int_rx->save_index >= IIC_RX_BUFFER_SIZE)
  596. int_rx->save_index = 0;
  597. /* if the next position is read index, discard this 'read char' */
  598. if (int_rx->save_index == int_rx->read_index)
  599. {
  600. int_rx->read_index ++;
  601. if (int_rx->read_index >= IIC_RX_BUFFER_SIZE)
  602. {
  603. int_rx->read_index = 0;
  604. }
  605. }
  606. /* enable interrupt */
  607. rt_hw_interrupt_enable(level);
  608. }
  609. else
  610. {
  611. temp = iic->iic_device->RXDATA;
  612. }
  613. }
  614. if(status & I2C_IF_SSTOP)
  615. {
  616. /* Stop received, reception is ended */
  617. iic->state &= ~(rt_uint8_t)IIC_STATE_RX_BUSY;
  618. }
  619. }
  620. /***************************************************************************//**
  621. * @brief
  622. * Initialize the specified IIC unit
  623. *
  624. * @details
  625. *
  626. * @note
  627. *
  628. * @param[in] unitNumber
  629. * Unit number
  630. *
  631. * @param[in] location
  632. * Pin location number
  633. ******************************************************************************/
  634. static struct efm32_iic_device_t *rt_hw_iic_unit_init(
  635. struct efm32_iic_block *block,
  636. rt_uint8_t unitNumber,
  637. rt_uint8_t location)
  638. {
  639. struct efm32_iic_device_t *iic;
  640. CMU_Clock_TypeDef iicClock;
  641. GPIO_Port_TypeDef port_scl, port_sda;
  642. rt_uint32_t pin_scl, pin_sda;
  643. I2C_Init_TypeDef init = I2C_INIT_DEFAULT;
  644. efm32_irq_hook_init_t hook;
  645. rt_uint8_t name[RT_NAME_MAX];
  646. do
  647. {
  648. /* Allocate device */
  649. iic = rt_malloc(sizeof(struct efm32_iic_device_t));
  650. if (iic == RT_NULL)
  651. {
  652. iic_debug("IIC err: no MEM for IIC%d driver\n", unitNumber);
  653. break;
  654. }
  655. iic->counter = 0;
  656. iic->timer = &block->timer;
  657. iic->timeout = false;
  658. iic->state |= IIC_STATE_MASTER;
  659. iic->address = 0x0000;
  660. iic->rx_buffer = RT_NULL;
  661. /* Initialization */
  662. if (unitNumber >= I2C_COUNT)
  663. {
  664. break;
  665. }
  666. switch (unitNumber)
  667. {
  668. case 0:
  669. iic->iic_device = I2C0;
  670. iicClock = (CMU_Clock_TypeDef)cmuClock_I2C0;
  671. port_scl = AF_I2C0_SCL_PORT(location);
  672. pin_scl = AF_I2C0_SCL_PIN(location);
  673. port_sda = AF_I2C0_SDA_PORT(location);
  674. pin_sda = AF_I2C0_SDA_PIN(location);
  675. break;
  676. #if (I2C_COUNT > 1)
  677. case 1:
  678. iic->iic_device = I2C1;
  679. iicClock = (CMU_Clock_TypeDef)cmuClock_I2C1;
  680. port_scl = AF_I2C1_SCL_PORT(location);
  681. pin_scl = AF_I2C1_SCL_PIN(location);
  682. port_sda = AF_I2C1_SDA_PORT(location);
  683. pin_sda = AF_I2C1_SDA_PIN(location);
  684. break;
  685. #endif
  686. default:
  687. break;
  688. }
  689. rt_sprintf(name, "iic%d", unitNumber);
  690. /* Enabling clock */
  691. CMU_ClockEnable(iicClock, true);
  692. /* Reset */
  693. I2C_Reset(iic->iic_device);
  694. /* Config GPIO */
  695. GPIO_PinModeSet(
  696. port_scl,
  697. pin_scl,
  698. gpioModeWiredAndPullUpFilter,
  699. 1);
  700. GPIO_PinModeSet(
  701. port_sda,
  702. pin_sda,
  703. gpioModeWiredAndPullUpFilter,
  704. 1);
  705. hook.type = efm32_irq_type_iic;
  706. hook.unit = unitNumber;
  707. hook.cbFunc = rt_hw_iic_slave_isr;
  708. hook.userPtr = (void *)&block->device;
  709. efm32_irq_hook_register(&hook);
  710. /* Enable SDZ and SCL pins and set location */
  711. iic->iic_device->ROUTE = I2C_ROUTE_SDAPEN | I2C_ROUTE_SCLPEN | \
  712. (location << _I2C_ROUTE_LOCATION_SHIFT);
  713. /* Initializing IIC */
  714. init.enable = false;
  715. I2C_Init(iic->iic_device, &init);
  716. /* Abort current TX data and clear TX buffers */
  717. iic->iic_device->CMD = I2C_CMD_ABORT | I2C_CMD_CLEARPC | I2C_CMD_CLEARTX;
  718. /* Initialize lock */
  719. iic->lock = &block->lock;
  720. if (rt_sem_init(iic->lock, name, 1, RT_IPC_FLAG_FIFO) != RT_EOK)
  721. {
  722. break;
  723. }
  724. /* Initialize timer */
  725. rt_timer_init(iic->timer, name, rt_iic_timer, &iic->timeout,
  726. IIC_TIMEOUT_PERIOD, RT_TIMER_FLAG_ONE_SHOT);
  727. return iic;
  728. } while(0);
  729. if (iic)
  730. {
  731. rt_free(iic);
  732. }
  733. iic_debug("IIC err: Unit %d init failed!\n", unitNumber);
  734. return RT_NULL;
  735. }
  736. /***************************************************************************//**
  737. * @brief
  738. * Initialize all IIC module related hardware and register IIC device to kernel
  739. *
  740. * @details
  741. *
  742. * @note
  743. ******************************************************************************/
  744. void rt_hw_iic_init(void)
  745. {
  746. struct efm32_iic_device_t *iic;
  747. rt_uint32_t flag;
  748. do
  749. {
  750. flag = RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX;
  751. /* Initialize and register iic0 */
  752. if ((iic = rt_hw_iic_unit_init(&iic0, 0, RT_USING_IIC0)) != RT_NULL)
  753. {
  754. rt_hw_iic_register(&iic0.device, RT_IIC0_NAME, flag, iic);
  755. }
  756. else
  757. {
  758. break;
  759. }
  760. #if (I2C_COUNT > 1)
  761. /* Initialize and register iic1 */
  762. if ((iic = rt_hw_iic_unit_init(&iic1, 1, RT_USING_IIC1)) != RT_NULL)
  763. {
  764. rt_hw_iic_register(&iic1.device, RT_IIC1_NAME, flag, iic);
  765. }
  766. else
  767. {
  768. break;
  769. }
  770. #endif
  771. iic_debug("IIC: H/W init OK!\n");
  772. return;
  773. } while (0);
  774. rt_kprintf("IIC: H/W init failed!\n");
  775. }
  776. #endif /* (defined(RT_USING_IIC0) || defined(RT_USING_IIC1)) */
  777. /***************************************************************************//**
  778. * @}
  779. ******************************************************************************/