board_config.c 27 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739
  1. /*
  2. * Copyright (C) 2022-2024, Xiaohua Semiconductor Co., Ltd.
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2022-04-28 CDT first version
  9. */
  10. #include <rtdevice.h>
  11. #include "board_config.h"
  12. #include "tca9539_port.h"
  13. /**
  14. * The below functions will initialize HC32 board.
  15. */
  16. #if defined RT_USING_SERIAL
  17. rt_err_t rt_hw_board_uart_init(CM_USART_TypeDef *USARTx)
  18. {
  19. rt_err_t result = RT_EOK;
  20. switch ((rt_uint32_t)USARTx)
  21. {
  22. #if defined(BSP_USING_UART1)
  23. case (rt_uint32_t)CM_USART1:
  24. /* Configure USART RX/TX pin. */
  25. GPIO_SetFunc(USART1_RX_PORT, USART1_RX_PIN, USART1_RX_FUNC);
  26. GPIO_SetFunc(USART1_TX_PORT, USART1_TX_PIN, USART1_TX_FUNC);
  27. break;
  28. #endif
  29. #if defined(BSP_USING_UART6)
  30. case (rt_uint32_t)CM_USART6:
  31. /* Configure USART RX/TX pin. */
  32. GPIO_SetFunc(USART6_RX_PORT, USART6_RX_PIN, USART6_RX_FUNC);
  33. GPIO_SetFunc(USART6_TX_PORT, USART6_TX_PIN, USART6_TX_FUNC);
  34. break;
  35. #endif
  36. default:
  37. result = -RT_ERROR;
  38. break;
  39. }
  40. return result;
  41. }
  42. #endif
  43. #if defined(RT_USING_I2C)
  44. rt_err_t rt_hw_board_i2c_init(CM_I2C_TypeDef *I2Cx)
  45. {
  46. rt_err_t result = RT_EOK;
  47. stc_gpio_init_t stcGpioInit;
  48. (void)GPIO_StructInit(&stcGpioInit);
  49. switch ((rt_uint32_t)I2Cx)
  50. {
  51. #if defined(BSP_USING_I2C1)
  52. case (rt_uint32_t)CM_I2C1:
  53. /* Configure I2C1 SDA/SCL pin. */
  54. GPIO_SetFunc(I2C1_SDA_PORT, I2C1_SDA_PIN, I2C1_SDA_FUNC);
  55. GPIO_SetFunc(I2C1_SCL_PORT, I2C1_SCL_PIN, I2C1_SCL_FUNC);
  56. break;
  57. #endif
  58. default:
  59. result = -RT_ERROR;
  60. break;
  61. }
  62. return result;
  63. }
  64. #endif
  65. #if defined(RT_USING_ADC)
  66. rt_err_t rt_hw_board_adc_init(CM_ADC_TypeDef *ADCx)
  67. {
  68. rt_err_t result = RT_EOK;
  69. stc_gpio_init_t stcGpioInit;
  70. (void)GPIO_StructInit(&stcGpioInit);
  71. stcGpioInit.u16PinAttr = PIN_ATTR_ANALOG;
  72. switch ((rt_uint32_t)ADCx)
  73. {
  74. #if defined(BSP_USING_ADC1)
  75. case (rt_uint32_t)CM_ADC1:
  76. (void)GPIO_Init(ADC1_CH_PORT, ADC1_CH_PIN, &stcGpioInit);
  77. break;
  78. #endif
  79. #if defined(BSP_USING_ADC2)
  80. case (rt_uint32_t)CM_ADC2:
  81. (void)GPIO_Init(ADC2_CH_PORT, ADC2_CH_PIN, &stcGpioInit);
  82. break;
  83. #endif
  84. #if defined(BSP_USING_ADC3)
  85. case (rt_uint32_t)CM_ADC3:
  86. (void)GPIO_Init(ADC3_CH_PORT, ADC3_CH_PIN, &stcGpioInit);
  87. break;
  88. #endif
  89. default:
  90. result = -RT_ERROR;
  91. break;
  92. }
  93. return result;
  94. }
  95. #endif
  96. #if defined(RT_USING_DAC)
  97. rt_err_t rt_hw_board_dac_init(CM_DAC_TypeDef *DACx)
  98. {
  99. rt_err_t result = RT_EOK;
  100. stc_gpio_init_t stcGpioInit;
  101. (void)GPIO_StructInit(&stcGpioInit);
  102. stcGpioInit.u16PinAttr = PIN_ATTR_ANALOG;
  103. switch ((rt_uint32_t)DACx)
  104. {
  105. #if defined(BSP_USING_DAC1)
  106. case (rt_uint32_t)CM_DAC1:
  107. (void)GPIO_Init(DAC1_CH1_PORT, DAC1_CH1_PIN, &stcGpioInit);
  108. (void)GPIO_Init(DAC1_CH2_PORT, DAC1_CH2_PIN, &stcGpioInit);
  109. break;
  110. #endif
  111. #if defined(BSP_USING_DAC2)
  112. case (rt_uint32_t)CM_DAC2:
  113. (void)GPIO_Init(DAC2_CH1_PORT, DAC2_CH1_PIN, &stcGpioInit);
  114. (void)GPIO_Init(DAC2_CH2_PORT, DAC2_CH2_PIN, &stcGpioInit);
  115. break;
  116. #endif
  117. default:
  118. result = -RT_ERROR;
  119. break;
  120. }
  121. return result;
  122. }
  123. #endif
  124. #if defined(RT_USING_CAN)
  125. void CanPhyEnable(void)
  126. {
  127. TCA9539_WritePin(CAN_STB_PORT, CAN_STB_PIN, TCA9539_PIN_RESET);
  128. TCA9539_ConfigPin(CAN_STB_PORT, CAN_STB_PIN, TCA9539_DIR_OUT);
  129. }
  130. rt_err_t rt_hw_board_can_init(CM_CAN_TypeDef *CANx)
  131. {
  132. rt_err_t result = RT_EOK;
  133. switch ((rt_uint32_t)CANx)
  134. {
  135. #if defined(BSP_USING_CAN1)
  136. case (rt_uint32_t)CM_CAN1:
  137. GPIO_SetFunc(CAN1_TX_PORT, CAN1_TX_PIN, CAN1_TX_PIN_FUNC);
  138. GPIO_SetFunc(CAN1_RX_PORT, CAN1_RX_PIN, CAN1_RX_PIN_FUNC);
  139. break;
  140. #endif
  141. #if defined(BSP_USING_CAN2)
  142. case (rt_uint32_t)CM_CAN2:
  143. GPIO_SetFunc(CAN2_TX_PORT, CAN2_TX_PIN, CAN2_TX_PIN_FUNC);
  144. GPIO_SetFunc(CAN2_RX_PORT, CAN2_RX_PIN, CAN2_RX_PIN_FUNC);
  145. break;
  146. #endif
  147. default:
  148. result = -RT_ERROR;
  149. break;
  150. }
  151. return result;
  152. }
  153. #endif
  154. #if defined (RT_USING_SPI)
  155. rt_err_t rt_hw_spi_board_init(CM_SPI_TypeDef *CM_SPIx)
  156. {
  157. rt_err_t result = RT_EOK;
  158. #if defined(BSP_USING_SPI1)
  159. stc_gpio_init_t stcGpioInit;
  160. #endif
  161. switch ((rt_uint32_t)CM_SPIx)
  162. {
  163. #if defined(BSP_USING_SPI1)
  164. case (rt_uint32_t)CM_SPI1:
  165. GPIO_StructInit(&stcGpioInit);
  166. stcGpioInit.u16PinState = PIN_STAT_SET;
  167. stcGpioInit.u16PinDir = PIN_DIR_OUT;
  168. GPIO_Init(SPI1_WP_PORT, SPI1_WP_PIN, &stcGpioInit);
  169. GPIO_Init(SPI1_HOLD_PORT, SPI1_HOLD_PIN, &stcGpioInit);
  170. (void)GPIO_StructInit(&stcGpioInit);
  171. stcGpioInit.u16PinDrv = PIN_HIGH_DRV;
  172. stcGpioInit.u16PinInputType = PIN_IN_TYPE_CMOS;
  173. (void)GPIO_Init(SPI1_SCK_PORT, SPI1_SCK_PIN, &stcGpioInit);
  174. (void)GPIO_Init(SPI1_MOSI_PORT, SPI1_MOSI_PIN, &stcGpioInit);
  175. (void)GPIO_Init(SPI1_MISO_PORT, SPI1_MISO_PIN, &stcGpioInit);
  176. GPIO_SetFunc(SPI1_SCK_PORT, SPI1_SCK_PIN, SPI1_SCK_FUNC);
  177. GPIO_SetFunc(SPI1_MOSI_PORT, SPI1_MOSI_PIN, SPI1_MOSI_FUNC);
  178. GPIO_SetFunc(SPI1_MISO_PORT, SPI1_MISO_PIN, SPI1_MISO_FUNC);
  179. break;
  180. #endif
  181. default:
  182. result = -RT_ERROR;
  183. break;
  184. }
  185. return result;
  186. }
  187. #endif
  188. #if defined(BSP_USING_ETH)
  189. /* PHY hardware reset time */
  190. #define PHY_HW_RST_DELAY (0x40U)
  191. rt_err_t rt_hw_eth_phy_reset(CM_ETH_TypeDef *CM_ETHx)
  192. {
  193. TCA9539_ConfigPin(TCA9539_IO_PORT1, EIO_ETH_RST, TCA9539_DIR_OUT);
  194. TCA9539_WritePin(TCA9539_IO_PORT1, EIO_ETH_RST, TCA9539_PIN_RESET);
  195. rt_thread_mdelay(PHY_HW_RST_DELAY);
  196. TCA9539_WritePin(TCA9539_IO_PORT1, EIO_ETH_RST, TCA9539_PIN_SET);
  197. rt_thread_mdelay(PHY_HW_RST_DELAY);
  198. return RT_EOK;
  199. }
  200. rt_err_t rt_hw_eth_board_init(CM_ETH_TypeDef *CM_ETHx)
  201. {
  202. #if defined(ETH_INTERFACE_USING_RMII)
  203. GPIO_SetFunc(ETH_SMI_MDIO_PORT, ETH_SMI_MDIO_PIN, ETH_SMI_MDIO_FUNC);
  204. GPIO_SetFunc(ETH_SMI_MDC_PORT, ETH_SMI_MDC_PIN, ETH_SMI_MDC_FUNC);
  205. GPIO_SetFunc(ETH_RMII_TX_EN_PORT, ETH_RMII_TX_EN_PIN, ETH_RMII_TX_EN_FUNC);
  206. GPIO_SetFunc(ETH_RMII_TXD0_PORT, ETH_RMII_TXD0_PIN, ETH_RMII_TXD0_FUNC);
  207. GPIO_SetFunc(ETH_RMII_TXD1_PORT, ETH_RMII_TXD1_PIN, ETH_RMII_TXD1_FUNC);
  208. GPIO_SetFunc(ETH_RMII_REF_CLK_PORT, ETH_RMII_REF_CLK_PIN, ETH_RMII_REF_CLK_FUNC);
  209. GPIO_SetFunc(ETH_RMII_CRS_DV_PORT, ETH_RMII_CRS_DV_PIN, ETH_RMII_CRS_DV_FUNC);
  210. GPIO_SetFunc(ETH_RMII_RXD0_PORT, ETH_RMII_RXD0_PIN, ETH_RMII_RXD0_FUNC);
  211. GPIO_SetFunc(ETH_RMII_RXD1_PORT, ETH_RMII_RXD1_PIN, ETH_RMII_RXD1_FUNC);
  212. #else
  213. GPIO_SetFunc(ETH_SMI_MDIO_PORT, ETH_SMI_MDIO_PIN, ETH_SMI_MDIO_FUNC);
  214. GPIO_SetFunc(ETH_SMI_MDC_PORT, ETH_SMI_MDC_PIN, ETH_SMI_MDC_FUNC);
  215. GPIO_SetFunc(ETH_MII_TX_CLK_PORT, ETH_MII_TX_CLK_PIN, ETH_MII_TX_CLK_FUNC);
  216. GPIO_SetFunc(ETH_MII_TX_EN_PORT, ETH_MII_TX_EN_PIN, ETH_MII_TX_EN_FUNC);
  217. GPIO_SetFunc(ETH_MII_TXD0_PORT, ETH_MII_TXD0_PIN, ETH_MII_TXD0_FUNC);
  218. GPIO_SetFunc(ETH_MII_TXD1_PORT, ETH_MII_TXD1_PIN, ETH_MII_TXD1_FUNC);
  219. GPIO_SetFunc(ETH_MII_TXD2_PORT, ETH_MII_TXD2_PIN, ETH_MII_TXD2_FUNC);
  220. GPIO_SetFunc(ETH_MII_TXD3_PORT, ETH_MII_TXD3_PIN, ETH_MII_TXD3_FUNC);
  221. GPIO_SetFunc(ETH_MII_RX_CLK_PORT, ETH_MII_RX_CLK_PIN, ETH_MII_RX_CLK_FUNC);
  222. GPIO_SetFunc(ETH_MII_RX_DV_PORT, ETH_MII_RX_DV_PIN, ETH_MII_RX_DV_FUNC);
  223. GPIO_SetFunc(ETH_MII_RXD0_PORT, ETH_MII_RXD0_PIN, ETH_MII_RXD0_FUNC);
  224. GPIO_SetFunc(ETH_MII_RXD1_PORT, ETH_MII_RXD1_PIN, ETH_MII_RXD1_FUNC);
  225. GPIO_SetFunc(ETH_MII_RXD2_PORT, ETH_MII_RXD2_PIN, ETH_MII_RXD2_FUNC);
  226. GPIO_SetFunc(ETH_MII_RXD3_PORT, ETH_MII_RXD3_PIN, ETH_MII_RXD3_FUNC);
  227. GPIO_SetFunc(ETH_MII_RX_ER_PORT, ETH_MII_RX_ER_PIN, ETH_MII_RX_ER_FUNC);
  228. GPIO_SetFunc(ETH_MII_CRS_PORT, ETH_MII_CRS_PIN, ETH_MII_CRS_FUNC);
  229. GPIO_SetFunc(ETH_MII_COL_PORT, ETH_MII_COL_PIN, ETH_MII_COL_FUNC);
  230. #endif
  231. return RT_EOK;
  232. }
  233. #endif
  234. #if defined (RT_USING_SDIO)
  235. rt_err_t rt_hw_board_sdio_init(CM_SDIOC_TypeDef *SDIOCx)
  236. {
  237. rt_err_t result = RT_EOK;
  238. stc_gpio_init_t stcGpioInit;
  239. switch ((rt_uint32_t)SDIOCx)
  240. {
  241. #if defined(BSP_USING_SDIO1)
  242. case (rt_uint32_t)CM_SDIOC1:
  243. /************************* Set pin drive capacity *************************/
  244. (void)GPIO_StructInit(&stcGpioInit);
  245. stcGpioInit.u16PinDrv = PIN_HIGH_DRV;
  246. (void)GPIO_Init(SDIOC1_CK_PORT, SDIOC1_CK_PIN, &stcGpioInit);
  247. (void)GPIO_Init(SDIOC1_CMD_PORT, SDIOC1_CMD_PIN, &stcGpioInit);
  248. (void)GPIO_Init(SDIOC1_D0_PORT, SDIOC1_D0_PIN, &stcGpioInit);
  249. (void)GPIO_Init(SDIOC1_D1_PORT, SDIOC1_D1_PIN, &stcGpioInit);
  250. (void)GPIO_Init(SDIOC1_D2_PORT, SDIOC1_D2_PIN, &stcGpioInit);
  251. (void)GPIO_Init(SDIOC1_D3_PORT, SDIOC1_D3_PIN, &stcGpioInit);
  252. GPIO_SetFunc(SDIOC1_CK_PORT, SDIOC1_CK_PIN, SDIOC1_CK_FUNC);
  253. GPIO_SetFunc(SDIOC1_CMD_PORT, SDIOC1_CMD_PIN, SDIOC1_CMD_FUNC);
  254. GPIO_SetFunc(SDIOC1_D0_PORT, SDIOC1_D0_PIN, SDIOC1_D0_FUNC);
  255. GPIO_SetFunc(SDIOC1_D1_PORT, SDIOC1_D1_PIN, SDIOC1_D1_FUNC);
  256. GPIO_SetFunc(SDIOC1_D2_PORT, SDIOC1_D2_PIN, SDIOC1_D2_FUNC);
  257. GPIO_SetFunc(SDIOC1_D3_PORT, SDIOC1_D3_PIN, SDIOC1_D3_FUNC);
  258. break;
  259. #endif
  260. default:
  261. result = -RT_ERROR;
  262. break;
  263. }
  264. return result;
  265. }
  266. #endif
  267. #if defined(RT_USING_PWM)
  268. #if defined(BSP_USING_PWM_TMRA)
  269. rt_err_t rt_hw_board_pwm_tmra_init(CM_TMRA_TypeDef *TMRAx)
  270. {
  271. rt_err_t result = RT_EOK;
  272. switch ((rt_uint32_t)TMRAx)
  273. {
  274. #if defined(BSP_USING_PWM_TMRA_1)
  275. case (rt_uint32_t)CM_TMRA_1:
  276. #ifdef BSP_USING_PWM_TMRA_1_CH1
  277. GPIO_SetFunc(PWM_TMRA_1_CH1_PORT, PWM_TMRA_1_CH1_PIN, PWM_TMRA_1_CH1_PIN_FUNC);
  278. #endif
  279. #ifdef BSP_USING_PWM_TMRA_1_CH2
  280. GPIO_SetFunc(PWM_TMRA_1_CH2_PORT, PWM_TMRA_1_CH2_PIN, PWM_TMRA_1_CH2_PIN_FUNC);
  281. #endif
  282. #ifdef BSP_USING_PWM_TMRA_1_CH3
  283. GPIO_SetFunc(PWM_TMRA_1_CH3_PORT, PWM_TMRA_1_CH3_PIN, PWM_TMRA_1_CH3_PIN_FUNC);
  284. #endif
  285. #ifdef BSP_USING_PWM_TMRA_1_CH4
  286. GPIO_SetFunc(PWM_TMRA_1_CH4_PORT, PWM_TMRA_1_CH4_PIN, PWM_TMRA_1_CH4_PIN_FUNC);
  287. #endif
  288. break;
  289. #endif
  290. default:
  291. result = -RT_ERROR;
  292. break;
  293. }
  294. return result;
  295. }
  296. #endif
  297. #if defined(BSP_USING_PWM_TMR4)
  298. rt_err_t rt_hw_board_pwm_tmr4_init(CM_TMR4_TypeDef *TMR4x)
  299. {
  300. rt_err_t result = RT_EOK;
  301. switch ((rt_uint32_t)TMR4x)
  302. {
  303. #if defined(BSP_USING_PWM_TMR4_1)
  304. case (rt_uint32_t)CM_TMR4_1:
  305. #ifdef BSP_USING_PWM_TMR4_1_OUH
  306. GPIO_SetFunc(PWM_TMR4_1_OUH_PORT, PWM_TMR4_1_OUH_PIN, PWM_TMR4_1_OUH_PIN_FUNC);
  307. #endif
  308. #ifdef BSP_USING_PWM_TMR4_1_OUL
  309. GPIO_SetFunc(PWM_TMR4_1_OUL_PORT, PWM_TMR4_1_OUL_PIN, PWM_TMR4_1_OUL_PIN_FUNC);
  310. #endif
  311. #ifdef BSP_USING_PWM_TMR4_1_OVH
  312. GPIO_SetFunc(PWM_TMR4_1_OVH_PORT, PWM_TMR4_1_OVH_PIN, PWM_TMR4_1_OVH_PIN_FUNC);
  313. #endif
  314. #ifdef BSP_USING_PWM_TMR4_1_OVL
  315. GPIO_SetFunc(PWM_TMR4_1_OVL_PORT, PWM_TMR4_1_OVL_PIN, PWM_TMR4_1_OVL_PIN_FUNC);
  316. #endif
  317. #ifdef BSP_USING_PWM_TMR4_1_OWH
  318. GPIO_SetFunc(PWM_TMR4_1_OWH_PORT, PWM_TMR4_1_OWH_PIN, PWM_TMR4_1_OWH_PIN_FUNC);
  319. #endif
  320. #ifdef BSP_USING_PWM_TMR4_1_OWL
  321. GPIO_SetFunc(PWM_TMR4_1_OWL_PORT, PWM_TMR4_1_OWL_PIN, PWM_TMR4_1_OWL_PIN_FUNC);
  322. #endif
  323. break;
  324. #endif
  325. default:
  326. result = -RT_ERROR;
  327. break;
  328. }
  329. return result;
  330. }
  331. #endif
  332. #if defined(BSP_USING_PWM_TMR6)
  333. rt_err_t rt_hw_board_pwm_tmr6_init(CM_TMR6_TypeDef *TMR6x)
  334. {
  335. rt_err_t result = RT_EOK;
  336. switch ((rt_uint32_t)TMR6x)
  337. {
  338. #if defined(BSP_USING_PWM_TMR6_1)
  339. case (rt_uint32_t)CM_TMR6_1:
  340. #ifdef BSP_USING_PWM_TMR6_1_A
  341. GPIO_SetFunc(PWM_TMR6_1_A_PORT, PWM_TMR6_1_A_PIN, PWM_TMR6_1_A_PIN_FUNC);
  342. #endif
  343. #ifdef BSP_USING_PWM_TMR6_1_B
  344. GPIO_SetFunc(PWM_TMR6_1_B_PORT, PWM_TMR6_1_B_PIN, PWM_TMR6_1_B_PIN_FUNC);
  345. #endif
  346. break;
  347. #endif
  348. default:
  349. result = -RT_ERROR;
  350. break;
  351. }
  352. return result;
  353. }
  354. #endif
  355. #endif
  356. #if defined (BSP_USING_INPUT_CAPTURE)
  357. rt_err_t rt_hw_board_input_capture_init(uint32_t *tmr_instance)
  358. {
  359. rt_err_t result = RT_EOK;
  360. switch ((rt_uint32_t)tmr_instance)
  361. {
  362. #if defined (BSP_USING_INPUT_CAPTURE_TMR6_1)
  363. case (rt_uint32_t)CM_TMR6_1:
  364. GPIO_SetFunc(INPUT_CAPTURE_TMR6_1_PORT, INPUT_CAPTURE_TMR6_1_PIN, INPUT_CAPTURE_TMR6_FUNC);
  365. break;
  366. #endif
  367. #if defined (BSP_USING_INPUT_CAPTURE_TMR6_2)
  368. case (rt_uint32_t)CM_TMR6_2:
  369. GPIO_SetFunc(INPUT_CAPTURE_TMR6_2_PORT, INPUT_CAPTURE_TMR6_2_PIN, INPUT_CAPTURE_TMR6_FUNC);
  370. break;
  371. #endif
  372. #if defined (BSP_USING_INPUT_CAPTURE_TMR6_3)
  373. case (rt_uint32_t)CM_TMR6_3:
  374. GPIO_SetFunc(INPUT_CAPTURE_TMR6_3_PORT, INPUT_CAPTURE_TMR6_3_PIN, INPUT_CAPTURE_TMR6_FUNC);
  375. break;
  376. #endif
  377. default:
  378. result = -RT_ERROR;
  379. break;
  380. }
  381. return result;
  382. }
  383. #endif
  384. #if defined (BSP_USING_SDRAM)
  385. rt_err_t rt_hw_board_sdram_init(void)
  386. {
  387. rt_err_t result = RT_EOK;
  388. stc_gpio_init_t stcGpioInit;
  389. /************************* Set pin drive capacity *************************/
  390. (void)GPIO_StructInit(&stcGpioInit);
  391. stcGpioInit.u16PinDrv = PIN_HIGH_DRV;
  392. /* DMC_CKE */
  393. (void)GPIO_Init(SDRAM_CKE_PORT, SDRAM_CKE_PIN, &stcGpioInit);
  394. /* DMC_CLK */
  395. (void)GPIO_Init(SDRAM_CLK_PORT, SDRAM_CLK_PIN, &stcGpioInit);
  396. /* DMC_LDQM && DMC_UDQM */
  397. (void)GPIO_Init(SDRAM_DQM0_PORT, SDRAM_DQM0_PIN, &stcGpioInit);
  398. (void)GPIO_Init(SDRAM_DQM1_PORT, SDRAM_DQM1_PIN, &stcGpioInit);
  399. /* DMC_BA[0:1] */
  400. (void)GPIO_Init(SDRAM_BA0_PORT, SDRAM_BA0_PIN, &stcGpioInit);
  401. (void)GPIO_Init(SDRAM_BA1_PORT, SDRAM_BA1_PIN, &stcGpioInit);
  402. /* DMC_CAS && DMC_RAS */
  403. (void)GPIO_Init(SDRAM_CAS_PORT, SDRAM_CAS_PIN, &stcGpioInit);
  404. (void)GPIO_Init(SDRAM_RAS_PORT, SDRAM_RAS_PIN, &stcGpioInit);
  405. /* DMC_WE */
  406. (void)GPIO_Init(SDRAM_WE_PORT, SDRAM_WE_PIN, &stcGpioInit);
  407. /* DMC_DATA[0:15] */
  408. (void)GPIO_Init(SDRAM_DATA0_PORT, SDRAM_DATA0_PIN, &stcGpioInit);
  409. (void)GPIO_Init(SDRAM_DATA1_PORT, SDRAM_DATA1_PIN, &stcGpioInit);
  410. (void)GPIO_Init(SDRAM_DATA2_PORT, SDRAM_DATA2_PIN, &stcGpioInit);
  411. (void)GPIO_Init(SDRAM_DATA3_PORT, SDRAM_DATA3_PIN, &stcGpioInit);
  412. (void)GPIO_Init(SDRAM_DATA4_PORT, SDRAM_DATA4_PIN, &stcGpioInit);
  413. (void)GPIO_Init(SDRAM_DATA5_PORT, SDRAM_DATA5_PIN, &stcGpioInit);
  414. (void)GPIO_Init(SDRAM_DATA6_PORT, SDRAM_DATA6_PIN, &stcGpioInit);
  415. (void)GPIO_Init(SDRAM_DATA7_PORT, SDRAM_DATA7_PIN, &stcGpioInit);
  416. (void)GPIO_Init(SDRAM_DATA8_PORT, SDRAM_DATA8_PIN, &stcGpioInit);
  417. (void)GPIO_Init(SDRAM_DATA9_PORT, SDRAM_DATA9_PIN, &stcGpioInit);
  418. (void)GPIO_Init(SDRAM_DATA10_PORT, SDRAM_DATA10_PIN, &stcGpioInit);
  419. (void)GPIO_Init(SDRAM_DATA11_PORT, SDRAM_DATA11_PIN, &stcGpioInit);
  420. (void)GPIO_Init(SDRAM_DATA12_PORT, SDRAM_DATA12_PIN, &stcGpioInit);
  421. (void)GPIO_Init(SDRAM_DATA13_PORT, SDRAM_DATA13_PIN, &stcGpioInit);
  422. (void)GPIO_Init(SDRAM_DATA14_PORT, SDRAM_DATA14_PIN, &stcGpioInit);
  423. (void)GPIO_Init(SDRAM_DATA15_PORT, SDRAM_DATA15_PIN, &stcGpioInit);
  424. /* DMC_ADD[0:11]*/
  425. (void)GPIO_Init(SDRAM_ADD0_PORT, SDRAM_ADD0_PIN, &stcGpioInit);
  426. (void)GPIO_Init(SDRAM_ADD1_PORT, SDRAM_ADD1_PIN, &stcGpioInit);
  427. (void)GPIO_Init(SDRAM_ADD2_PORT, SDRAM_ADD2_PIN, &stcGpioInit);
  428. (void)GPIO_Init(SDRAM_ADD3_PORT, SDRAM_ADD3_PIN, &stcGpioInit);
  429. (void)GPIO_Init(SDRAM_ADD4_PORT, SDRAM_ADD4_PIN, &stcGpioInit);
  430. (void)GPIO_Init(SDRAM_ADD5_PORT, SDRAM_ADD5_PIN, &stcGpioInit);
  431. (void)GPIO_Init(SDRAM_ADD6_PORT, SDRAM_ADD6_PIN, &stcGpioInit);
  432. (void)GPIO_Init(SDRAM_ADD7_PORT, SDRAM_ADD7_PIN, &stcGpioInit);
  433. (void)GPIO_Init(SDRAM_ADD8_PORT, SDRAM_ADD8_PIN, &stcGpioInit);
  434. (void)GPIO_Init(SDRAM_ADD9_PORT, SDRAM_ADD9_PIN, &stcGpioInit);
  435. (void)GPIO_Init(SDRAM_ADD10_PORT, SDRAM_ADD10_PIN, &stcGpioInit);
  436. (void)GPIO_Init(SDRAM_ADD11_PORT, SDRAM_ADD11_PIN, &stcGpioInit);
  437. /************************** Set EXMC pin function *************************/
  438. /* DMC_CKE */
  439. GPIO_SetFunc(SDRAM_CKE_PORT, SDRAM_CKE_PIN, SDRAM_CKE_FUNC);
  440. /* DMC_CLK */
  441. GPIO_SetFunc(SDRAM_CLK_PORT, SDRAM_CLK_PIN, SDRAM_CLK_FUNC);
  442. /* DMC_LDQM && DMC_UDQM */
  443. GPIO_SetFunc(SDRAM_DQM0_PORT, SDRAM_DQM0_PIN, SDRAM_DQM0_FUNC);
  444. GPIO_SetFunc(SDRAM_DQM1_PORT, SDRAM_DQM1_PIN, SDRAM_DQM1_FUNC);
  445. /* DMC_BA[0:1] */
  446. GPIO_SetFunc(SDRAM_BA0_PORT, SDRAM_BA0_PIN, SDRAM_BA0_FUNC);
  447. GPIO_SetFunc(SDRAM_BA1_PORT, SDRAM_BA1_PIN, SDRAM_BA1_FUNC);
  448. /* DMC_CS */
  449. GPIO_SetFunc(SDRAM_CS_PORT, SDRAM_CS_PIN, SDRAM_CS_FUNC);
  450. /* DMC_CAS && DMC_RAS */
  451. GPIO_SetFunc(SDRAM_CAS_PORT, SDRAM_CAS_PIN, SDRAM_CAS_FUNC);
  452. GPIO_SetFunc(SDRAM_RAS_PORT, SDRAM_RAS_PIN, SDRAM_RAS_FUNC);
  453. /* DMC_WE */
  454. GPIO_SetFunc(SDRAM_WE_PORT, SDRAM_WE_PIN, SDRAM_WE_FUNC);
  455. /* DMC_DATA[0:15] */
  456. GPIO_SetFunc(SDRAM_DATA0_PORT, SDRAM_DATA0_PIN, SDRAM_DATA0_FUNC);
  457. GPIO_SetFunc(SDRAM_DATA1_PORT, SDRAM_DATA1_PIN, SDRAM_DATA1_FUNC);
  458. GPIO_SetFunc(SDRAM_DATA2_PORT, SDRAM_DATA2_PIN, SDRAM_DATA2_FUNC);
  459. GPIO_SetFunc(SDRAM_DATA3_PORT, SDRAM_DATA3_PIN, SDRAM_DATA3_FUNC);
  460. GPIO_SetFunc(SDRAM_DATA4_PORT, SDRAM_DATA4_PIN, SDRAM_DATA4_FUNC);
  461. GPIO_SetFunc(SDRAM_DATA5_PORT, SDRAM_DATA5_PIN, SDRAM_DATA5_FUNC);
  462. GPIO_SetFunc(SDRAM_DATA6_PORT, SDRAM_DATA6_PIN, SDRAM_DATA6_FUNC);
  463. GPIO_SetFunc(SDRAM_DATA7_PORT, SDRAM_DATA7_PIN, SDRAM_DATA7_FUNC);
  464. GPIO_SetFunc(SDRAM_DATA8_PORT, SDRAM_DATA8_PIN, SDRAM_DATA8_FUNC);
  465. GPIO_SetFunc(SDRAM_DATA9_PORT, SDRAM_DATA9_PIN, SDRAM_DATA9_FUNC);
  466. GPIO_SetFunc(SDRAM_DATA10_PORT, SDRAM_DATA10_PIN, SDRAM_DATA10_FUNC);
  467. GPIO_SetFunc(SDRAM_DATA11_PORT, SDRAM_DATA11_PIN, SDRAM_DATA11_FUNC);
  468. GPIO_SetFunc(SDRAM_DATA12_PORT, SDRAM_DATA12_PIN, SDRAM_DATA12_FUNC);
  469. GPIO_SetFunc(SDRAM_DATA13_PORT, SDRAM_DATA13_PIN, SDRAM_DATA13_FUNC);
  470. GPIO_SetFunc(SDRAM_DATA14_PORT, SDRAM_DATA14_PIN, SDRAM_DATA14_FUNC);
  471. GPIO_SetFunc(SDRAM_DATA15_PORT, SDRAM_DATA15_PIN, SDRAM_DATA15_FUNC);
  472. /* DMC_ADD[0:11]*/
  473. GPIO_SetFunc(SDRAM_ADD0_PORT, SDRAM_ADD0_PIN, SDRAM_ADD0_FUNC);
  474. GPIO_SetFunc(SDRAM_ADD1_PORT, SDRAM_ADD1_PIN, SDRAM_ADD1_FUNC);
  475. GPIO_SetFunc(SDRAM_ADD2_PORT, SDRAM_ADD2_PIN, SDRAM_ADD2_FUNC);
  476. GPIO_SetFunc(SDRAM_ADD3_PORT, SDRAM_ADD3_PIN, SDRAM_ADD3_FUNC);
  477. GPIO_SetFunc(SDRAM_ADD4_PORT, SDRAM_ADD4_PIN, SDRAM_ADD4_FUNC);
  478. GPIO_SetFunc(SDRAM_ADD5_PORT, SDRAM_ADD5_PIN, SDRAM_ADD5_FUNC);
  479. GPIO_SetFunc(SDRAM_ADD6_PORT, SDRAM_ADD6_PIN, SDRAM_ADD6_FUNC);
  480. GPIO_SetFunc(SDRAM_ADD7_PORT, SDRAM_ADD7_PIN, SDRAM_ADD7_FUNC);
  481. GPIO_SetFunc(SDRAM_ADD8_PORT, SDRAM_ADD8_PIN, SDRAM_ADD8_FUNC);
  482. GPIO_SetFunc(SDRAM_ADD9_PORT, SDRAM_ADD9_PIN, SDRAM_ADD9_FUNC);
  483. GPIO_SetFunc(SDRAM_ADD10_PORT, SDRAM_ADD10_PIN, SDRAM_ADD10_FUNC);
  484. GPIO_SetFunc(SDRAM_ADD11_PORT, SDRAM_ADD11_PIN, SDRAM_ADD11_FUNC);
  485. return result;
  486. }
  487. #endif
  488. #ifdef RT_USING_PM
  489. void rt_hw_board_pm_sysclk_cfg(uint8_t run_mode)
  490. {
  491. switch (run_mode)
  492. {
  493. case PM_RUN_MODE_HIGH_SPEED:
  494. case PM_RUN_MODE_NORMAL_SPEED:
  495. CLK_SetSysClockSrc(CLK_SYSCLK_SRC_PLL);
  496. break;
  497. case PM_RUN_MODE_LOW_SPEED:
  498. /* Ensure that system clock less than 8M */
  499. CLK_SetSysClockSrc(CLK_SYSCLK_SRC_XTAL);
  500. default:
  501. break;
  502. }
  503. }
  504. #endif
  505. #if defined(BSP_USING_USBFS)
  506. rt_err_t rt_hw_usbfs_board_init(void)
  507. {
  508. stc_gpio_init_t stcGpioCfg;
  509. (void)GPIO_StructInit(&stcGpioCfg);
  510. stcGpioCfg.u16PinAttr = PIN_ATTR_ANALOG;
  511. (void)GPIO_Init(USBF_DM_PORT, USBF_DM_PIN, &stcGpioCfg);
  512. (void)GPIO_Init(USBF_DP_PORT, USBF_DP_PIN, &stcGpioCfg);
  513. #if defined(BSP_USING_USBD_FS)
  514. GPIO_SetFunc(USBF_VBUS_PORT, USBF_VBUS_PIN, USBF_VBUS_FUNC); /* VBUS */
  515. #endif
  516. #if defined(BSP_USING_USBH_FS)
  517. GPIO_SetFunc(USBF_DRVVBUS_PORT, USBF_DRVVBUS_PIN, USBF_DRVVBUS_FUNC); /* DRV VBUS */
  518. #endif
  519. return RT_EOK;
  520. }
  521. #endif
  522. #if defined(BSP_USING_USBHS)
  523. rt_err_t rt_hw_usbhs_board_init(void)
  524. {
  525. stc_gpio_init_t stcGpioCfg;
  526. (void)GPIO_StructInit(&stcGpioCfg);
  527. #if defined(BSP_USING_USBHS_PHY_EMBED)
  528. /* USBHS work in embedded PHY */
  529. stcGpioCfg.u16PinAttr = PIN_ATTR_ANALOG;
  530. (void)GPIO_Init(USBH_DM_PORT, USBH_DM_PIN, &stcGpioCfg);
  531. (void)GPIO_Init(USBH_DP_PORT, USBH_DP_PIN, &stcGpioCfg);
  532. #if defined(BSP_USING_USBD_HS)
  533. GPIO_SetFunc(USBH_VBUS_PORT, USBH_VBUS_PIN, USBH_VBUS_FUNC);
  534. #endif
  535. #if defined(BSP_USING_USBH_HS)
  536. GPIO_OutputCmd(USBH_DRVVBUS_PORT, USBH_DRVVBUS_PIN, ENABLE);
  537. GPIO_SetPins(USBH_DRVVBUS_PORT, USBH_DRVVBUS_PIN); /* DRV VBUS with GPIO funciton */
  538. #endif
  539. #else
  540. /* Reset 3300 */
  541. TCA9539_WritePin(TCA9539_IO_PORT1, USB_3300_RESET_PIN, TCA9539_PIN_SET);
  542. TCA9539_ConfigPin(TCA9539_IO_PORT1, USB_3300_RESET_PIN, TCA9539_DIR_OUT);
  543. (void)GPIO_StructInit(&stcGpioCfg);
  544. /* High drive capability */
  545. stcGpioCfg.u16PinDrv = PIN_HIGH_DRV;
  546. (void)GPIO_Init(USBH_ULPI_D0_PORT, USBH_ULPI_D0_PIN, &stcGpioCfg);
  547. (void)GPIO_Init(USBH_ULPI_D1_PORT, USBH_ULPI_D1_PIN, &stcGpioCfg);
  548. (void)GPIO_Init(USBH_ULPI_D2_PORT, USBH_ULPI_D2_PIN, &stcGpioCfg);
  549. (void)GPIO_Init(USBH_ULPI_D3_PORT, USBH_ULPI_D3_PIN, &stcGpioCfg);
  550. (void)GPIO_Init(USBH_ULPI_D4_PORT, USBH_ULPI_D4_PIN, &stcGpioCfg);
  551. (void)GPIO_Init(USBH_ULPI_D5_PORT, USBH_ULPI_D5_PIN, &stcGpioCfg);
  552. (void)GPIO_Init(USBH_ULPI_D6_PORT, USBH_ULPI_D6_PIN, &stcGpioCfg);
  553. (void)GPIO_Init(USBH_ULPI_D7_PORT, USBH_ULPI_D7_PIN, &stcGpioCfg);
  554. (void)GPIO_Init(USBH_ULPI_STP_PORT, USBH_ULPI_STP_PIN, &stcGpioCfg);
  555. GPIO_SetFunc(USBH_ULPI_CLK_PORT, USBH_ULPI_CLK_PIN, USBH_ULPI_CLK_FUNC);
  556. GPIO_SetFunc(USBH_ULPI_DIR_PORT, USBH_ULPI_DIR_PIN, USBH_ULPI_DIR_FUNC);
  557. GPIO_SetFunc(USBH_ULPI_NXT_PORT, USBH_ULPI_NXT_PIN, USBH_ULPI_NXT_FUNC);
  558. GPIO_SetFunc(USBH_ULPI_STP_PORT, USBH_ULPI_STP_PIN, USBH_ULPI_STP_FUNC);
  559. GPIO_SetFunc(USBH_ULPI_D0_PORT, USBH_ULPI_D0_PIN, USBH_ULPI_D0_FUNC);
  560. GPIO_SetFunc(USBH_ULPI_D1_PORT, USBH_ULPI_D1_PIN, USBH_ULPI_D1_FUNC);
  561. GPIO_SetFunc(USBH_ULPI_D2_PORT, USBH_ULPI_D2_PIN, USBH_ULPI_D2_FUNC);
  562. GPIO_SetFunc(USBH_ULPI_D3_PORT, USBH_ULPI_D3_PIN, USBH_ULPI_D3_FUNC);
  563. GPIO_SetFunc(USBH_ULPI_D4_PORT, USBH_ULPI_D4_PIN, USBH_ULPI_D4_FUNC);
  564. GPIO_SetFunc(USBH_ULPI_D5_PORT, USBH_ULPI_D5_PIN, USBH_ULPI_D5_FUNC);
  565. GPIO_SetFunc(USBH_ULPI_D6_PORT, USBH_ULPI_D6_PIN, USBH_ULPI_D6_FUNC);
  566. GPIO_SetFunc(USBH_ULPI_D7_PORT, USBH_ULPI_D7_PIN, USBH_ULPI_D7_FUNC);
  567. TCA9539_WritePin(TCA9539_IO_PORT1, USB_3300_RESET_PIN, TCA9539_PIN_RESET);
  568. #endif
  569. return RT_EOK;
  570. }
  571. #endif
  572. #if defined(BSP_USING_QSPI)
  573. rt_err_t rt_hw_qspi_board_init(void)
  574. {
  575. stc_gpio_init_t stcGpioInit;
  576. (void)GPIO_StructInit(&stcGpioInit);
  577. stcGpioInit.u16PinDrv = PIN_HIGH_DRV;
  578. #ifndef BSP_QSPI_USING_SOFT_CS
  579. (void)GPIO_Init(QSPI_FLASH_CS_PORT, QSPI_FLASH_CS_PIN, &stcGpioInit);
  580. GPIO_SetFunc(QSPI_FLASH_CS_PORT, QSPI_FLASH_CS_PIN, QSPI_FLASH_CS_FUNC);
  581. #endif
  582. (void)GPIO_Init(QSPI_FLASH_SCK_PORT, QSPI_FLASH_SCK_PIN, &stcGpioInit);
  583. (void)GPIO_Init(QSPI_FLASH_IO0_PORT, QSPI_FLASH_IO0_PIN, &stcGpioInit);
  584. (void)GPIO_Init(QSPI_FLASH_IO1_PORT, QSPI_FLASH_IO1_PIN, &stcGpioInit);
  585. (void)GPIO_Init(QSPI_FLASH_IO2_PORT, QSPI_FLASH_IO2_PIN, &stcGpioInit);
  586. (void)GPIO_Init(QSPI_FLASH_IO3_PORT, QSPI_FLASH_IO3_PIN, &stcGpioInit);
  587. GPIO_SetFunc(QSPI_FLASH_SCK_PORT, QSPI_FLASH_SCK_PIN, QSPI_FLASH_SCK_FUNC);
  588. GPIO_SetFunc(QSPI_FLASH_IO0_PORT, QSPI_FLASH_IO0_PIN, QSPI_FLASH_IO0_FUNC);
  589. GPIO_SetFunc(QSPI_FLASH_IO1_PORT, QSPI_FLASH_IO1_PIN, QSPI_FLASH_IO1_FUNC);
  590. GPIO_SetFunc(QSPI_FLASH_IO2_PORT, QSPI_FLASH_IO2_PIN, QSPI_FLASH_IO2_FUNC);
  591. GPIO_SetFunc(QSPI_FLASH_IO3_PORT, QSPI_FLASH_IO3_PIN, QSPI_FLASH_IO3_FUNC);
  592. return RT_EOK;
  593. }
  594. #endif
  595. #if defined(BSP_USING_TMRA_PULSE_ENCODER)
  596. rt_err_t rt_hw_board_pulse_encoder_tmra_init(void)
  597. {
  598. #if defined(BSP_USING_PULSE_ENCODER_TMRA_1)
  599. GPIO_SetFunc(PULSE_ENCODER_TMRA_1_A_PORT, PULSE_ENCODER_TMRA_1_A_PIN, PULSE_ENCODER_TMRA_1_A_PIN_FUNC);
  600. GPIO_SetFunc(PULSE_ENCODER_TMRA_1_B_PORT, PULSE_ENCODER_TMRA_1_B_PIN, PULSE_ENCODER_TMRA_1_B_PIN_FUNC);
  601. #endif
  602. return RT_EOK;
  603. }
  604. #endif
  605. #if defined(BSP_USING_TMR6_PULSE_ENCODER)
  606. rt_err_t rt_hw_board_pulse_encoder_tmr6_init(void)
  607. {
  608. #if defined(BSP_USING_PULSE_ENCODER_TMR6_1)
  609. GPIO_SetFunc(PULSE_ENCODER_TMR6_1_A_PORT, PULSE_ENCODER_TMR6_1_A_PIN, PULSE_ENCODER_TMR6_1_A_PIN_FUNC);
  610. GPIO_SetFunc(PULSE_ENCODER_TMR6_1_B_PORT, PULSE_ENCODER_TMR6_1_B_PIN, PULSE_ENCODER_TMR6_1_B_PIN_FUNC);
  611. #endif
  612. return RT_EOK;
  613. }
  614. #endif
  615. #if defined (BSP_USING_NAND)
  616. rt_err_t rt_hw_board_nand_init(void)
  617. {
  618. rt_err_t result = RT_EOK;
  619. stc_gpio_init_t stcGpioInit;
  620. /************************* Set pin drive capacity *************************/
  621. (void)GPIO_StructInit(&stcGpioInit);
  622. stcGpioInit.u16PinDrv = PIN_HIGH_DRV;
  623. /* NFC_CE */
  624. (void)GPIO_Init(NAND_CE_PORT, NAND_CE_PIN, &stcGpioInit);
  625. /* NFC_RE */
  626. (void)GPIO_Init(NAND_RE_PORT, NAND_RE_PIN, &stcGpioInit);
  627. /* NFC_WE */
  628. (void)GPIO_Init(NAND_WE_PORT, NAND_WE_PIN, &stcGpioInit);
  629. /* NFC_CLE */
  630. (void)GPIO_Init(NAND_CLE_PORT, NAND_CLE_PIN, &stcGpioInit);
  631. /* NFC_ALE */
  632. (void)GPIO_Init(NAND_ALE_PORT, NAND_ALE_PIN, &stcGpioInit);
  633. /* NFC_WP */
  634. (void)GPIO_Init(NAND_WP_PORT, NAND_WP_PIN, &stcGpioInit);
  635. GPIO_SetPins(NAND_WP_PORT, NAND_WP_PIN);
  636. /* NFC_DATA[0:7] */
  637. (void)GPIO_Init(NAND_DATA0_PORT, NAND_DATA0_PIN, &stcGpioInit);
  638. (void)GPIO_Init(NAND_DATA1_PORT, NAND_DATA1_PIN, &stcGpioInit);
  639. (void)GPIO_Init(NAND_DATA2_PORT, NAND_DATA2_PIN, &stcGpioInit);
  640. (void)GPIO_Init(NAND_DATA3_PORT, NAND_DATA3_PIN, &stcGpioInit);
  641. (void)GPIO_Init(NAND_DATA4_PORT, NAND_DATA4_PIN, &stcGpioInit);
  642. (void)GPIO_Init(NAND_DATA5_PORT, NAND_DATA5_PIN, &stcGpioInit);
  643. (void)GPIO_Init(NAND_DATA6_PORT, NAND_DATA6_PIN, &stcGpioInit);
  644. (void)GPIO_Init(NAND_DATA7_PORT, NAND_DATA7_PIN, &stcGpioInit);
  645. /* NFC_RB */
  646. (void)GPIO_Init(NAND_RB_PORT, NAND_RB_PIN, &stcGpioInit);
  647. /************************** Set EXMC pin function *************************/
  648. /* NFC_CE */
  649. GPIO_SetFunc(NAND_CE_PORT, NAND_CE_PIN, NAND_CE_FUNC);
  650. /* NFC_RE */
  651. GPIO_SetFunc(NAND_RE_PORT, NAND_RE_PIN, NAND_RE_FUNC);
  652. /* NFC_WE */
  653. GPIO_SetFunc(NAND_WE_PORT, NAND_WE_PIN, NAND_WE_FUNC);
  654. /* NFC_CLE */
  655. GPIO_SetFunc(NAND_CLE_PORT, NAND_CLE_PIN, NAND_CLE_FUNC);
  656. /* NFC_ALE */
  657. GPIO_SetFunc(NAND_ALE_PORT, NAND_ALE_PIN, NAND_ALE_FUNC);
  658. /* NFC_WP */
  659. GPIO_SetFunc(NAND_WP_PORT, NAND_WP_PIN, NAND_WP_FUNC);
  660. /* NFC_RB */
  661. GPIO_SetFunc(NAND_RB_PORT, NAND_RB_PIN, NAND_RB_FUNC);
  662. /* NFC_DATA[0:7] */
  663. GPIO_SetFunc(NAND_DATA0_PORT, NAND_DATA0_PIN, NAND_DATA0_FUNC);
  664. GPIO_SetFunc(NAND_DATA1_PORT, NAND_DATA1_PIN, NAND_DATA1_FUNC);
  665. GPIO_SetFunc(NAND_DATA2_PORT, NAND_DATA2_PIN, NAND_DATA2_FUNC);
  666. GPIO_SetFunc(NAND_DATA3_PORT, NAND_DATA3_PIN, NAND_DATA3_FUNC);
  667. GPIO_SetFunc(NAND_DATA4_PORT, NAND_DATA4_PIN, NAND_DATA4_FUNC);
  668. GPIO_SetFunc(NAND_DATA5_PORT, NAND_DATA5_PIN, NAND_DATA5_FUNC);
  669. GPIO_SetFunc(NAND_DATA6_PORT, NAND_DATA6_PIN, NAND_DATA6_FUNC);
  670. GPIO_SetFunc(NAND_DATA7_PORT, NAND_DATA7_PIN, NAND_DATA7_FUNC);
  671. return result;
  672. }
  673. #endif