start.S 1.5 KB

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  1. /*
  2. * Copyright (c) 2021-2023 HPMicro
  3. *
  4. * SPDX-License-Identifier: BSD-3-Clause
  5. *
  6. */
  7. #include <rtconfig.h>
  8. #include "hpm_csr_regs.h"
  9. .section .start, "ax"
  10. .global _start
  11. .type _start,@function
  12. _start:
  13. /* Initialize global pointer */
  14. .option push
  15. .option norelax
  16. la gp, __global_pointer$
  17. la tp, __thread_pointer
  18. .option pop
  19. #ifdef __riscv_flen
  20. /* Enable FPU */
  21. li t0, CSR_MSTATUS_FS_MASK
  22. csrrs t0, mstatus, t0
  23. /* Initialize FCSR */
  24. fscsr zero
  25. #endif
  26. #ifdef INIT_EXT_RAM_FOR_DATA
  27. la t0, _stack_in_dlm
  28. mv sp, t0
  29. call _init_ext_ram
  30. #endif
  31. /* Initialize stack pointer */
  32. la t0, _stack
  33. mv sp, t0
  34. #ifdef __nds_execit
  35. /* Initialize EXEC.IT table */
  36. la t0, _ITB_BASE_
  37. csrw uitb, t0
  38. #endif
  39. #ifdef __riscv_flen
  40. /* Enable FPU */
  41. li t0, CSR_MSTATUS_FS_MASK
  42. csrrs t0, mstatus, t0
  43. /* Initialize FCSR */
  44. fscsr zero
  45. #endif
  46. /* Disable Vector mode */
  47. csrci CSR_MMISC_CTL, 2
  48. /* Initialize trap_entry base */
  49. la t0, SW_handler
  50. csrw mtvec, t0
  51. /* System reset handler */
  52. call reset_handler
  53. /* Infinite loop, if returned accidently */
  54. 1: j 1b
  55. .weak nmi_handler
  56. nmi_handler:
  57. 1: j 1b
  58. .global default_irq_handler
  59. .weak default_irq_handler
  60. .align 2
  61. default_irq_handler:
  62. 1: j 1b
  63. .macro IRQ_HANDLER irq
  64. .weak default_isr_\irq
  65. .set default_isr_\irq, default_irq_handler
  66. .long default_isr_\irq
  67. .endm
  68. #include "vectors.S"