board.h 25 KB

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  1. /*
  2. * Copyright (c) 2021-2023 HPMicro
  3. *
  4. * SPDX-License-Identifier: BSD-3-Clause
  5. *
  6. */
  7. #ifndef _HPM_BOARD_H
  8. #define _HPM_BOARD_H
  9. #include <stdio.h>
  10. #include "hpm_common.h"
  11. #include "hpm_clock_drv.h"
  12. #include "hpm_soc.h"
  13. #include "hpm_soc_feature.h"
  14. #include "pinmux.h"
  15. #include "hpm_lcdc_drv.h"
  16. #include "hpm_trgm_drv.h"
  17. #ifdef CONFIG_HPM_PANEL
  18. #include "hpm_panel.h"
  19. #endif
  20. #if !defined(CONFIG_NDEBUG_CONSOLE) || !CONFIG_NDEBUG_CONSOLE
  21. #include "hpm_debug_console.h"
  22. #endif
  23. #define BOARD_NAME "hpm6750evk2"
  24. #define BOARD_UF2_SIGNATURE (0x0A4D5048UL)
  25. #define SEC_CORE_IMG_START ILM_LOCAL_BASE
  26. #ifndef BOARD_RUNNING_CORE
  27. #define BOARD_RUNNING_CORE HPM_CORE0
  28. #endif
  29. /* uart section */
  30. #ifndef BOARD_APP_UART_BASE
  31. #define BOARD_APP_UART_BASE HPM_UART13
  32. #define BOARD_APP_UART_IRQ IRQn_UART13
  33. #define BOARD_APP_UART_BAUDRATE (115200UL)
  34. #define BOARD_APP_UART_CLK_NAME clock_uart13
  35. #define BOARD_APP_UART_RX_DMA_REQ HPM_DMA_SRC_UART13_RX
  36. #define BOARD_APP_UART_TX_DMA_REQ HPM_DMA_SRC_UART13_TX
  37. #endif
  38. /* uart rx idle demo section */
  39. #define BOARD_UART_IDLE BOARD_APP_UART_BASE
  40. #define BOARD_UART_IDLE_IRQ BOARD_APP_UART_IRQ
  41. #define BOARD_UART_IDLE_CLK_NAME BOARD_APP_UART_CLK_NAME
  42. #define BOARD_UART_IDLE_TX_DMA_SRC BOARD_APP_UART_TX_DMA_REQ
  43. #define BOARD_UART_IDLE_DMA_SRC BOARD_APP_UART_RX_DMA_REQ
  44. #define BOARD_UART_IDLE_TRGM HPM_TRGM2
  45. #define BOARD_UART_IDLE_TRGM_PIN IOC_PAD_PD19
  46. #define BOARD_UART_IDLE_TRGM_INPUT_SRC HPM_TRGM2_INPUT_SRC_TRGM2_P9
  47. #define BOARD_UART_IDLE_TRGM_OUTPUT_GPTMR_IN HPM_TRGM2_OUTPUT_SRC_GPTMR4_IN2
  48. #define BOARD_UART_IDLE_TRGM_OUTPUT_GPTMR_SYNCI HPM_TRGM2_OUTPUT_SRC_GPTMR4_SYNCI
  49. #define BOARD_UART_IDLE_GPTMR HPM_GPTMR4
  50. #define BOARD_UART_IDLE_GPTMR_CLK_NAME clock_gptmr4
  51. #define BOARD_UART_IDLE_GPTMR_IRQ IRQn_GPTMR4
  52. #define BOARD_UART_IDLE_GPTMR_CMP_CH 0
  53. #define BOARD_UART_IDLE_GPTMR_CAP_CH 2
  54. /* uart microros sample section */
  55. #define BOARD_MICROROS_UART_BASE BOARD_APP_UART_BASE
  56. #define BOARD_MICROROS_UART_IRQ BOARD_APP_UART_IRQ
  57. #define BOARD_MICROROS_UART_CLK_NAME BOARD_APP_UART_CLK_NAME
  58. /* rtthread-nano finsh section */
  59. #define BOARD_RT_CONSOLE_BASE BOARD_CONSOLE_UART_BASE
  60. /* usb cdc acm uart section */
  61. #define BOARD_USB_CDC_ACM_UART BOARD_APP_UART_BASE
  62. #define BOARD_USB_CDC_ACM_UART_CLK_NAME BOARD_APP_UART_CLK_NAME
  63. #define BOARD_USB_CDC_ACM_UART_TX_DMA_SRC BOARD_APP_UART_TX_DMA_REQ
  64. #define BOARD_USB_CDC_ACM_UART_RX_DMA_SRC BOARD_APP_UART_RX_DMA_REQ
  65. /* modbus sample section */
  66. #define BOARD_MODBUS_UART_BASE BOARD_APP_UART_BASE
  67. #define BOARD_MODBUS_UART_CLK_NAME BOARD_APP_UART_CLK_NAME
  68. #define BOARD_MODBUS_UART_RX_DMA_REQ BOARD_APP_UART_RX_DMA_REQ
  69. #define BOARD_MODBUS_UART_TX_DMA_REQ BOARD_APP_UART_TX_DMA_REQ
  70. /* uart lin sample section */
  71. #define BOARD_UART_LIN BOARD_APP_UART_BASE
  72. #define BOARD_UART_LIN_IRQ BOARD_APP_UART_IRQ
  73. #define BOARD_UART_LIN_CLK_NAME BOARD_APP_UART_CLK_NAME
  74. #define BOARD_UART_LIN_TX_PORT GPIO_DI_GPIOZ
  75. #define BOARD_UART_LIN_TX_PIN (9U) /* PZ09 should align with used pin in pinmux configuration */
  76. #if !defined(CONFIG_NDEBUG_CONSOLE) || !CONFIG_NDEBUG_CONSOLE
  77. #ifndef BOARD_CONSOLE_TYPE
  78. #define BOARD_CONSOLE_TYPE CONSOLE_TYPE_UART
  79. #endif
  80. #if BOARD_CONSOLE_TYPE == CONSOLE_TYPE_UART
  81. #ifndef BOARD_CONSOLE_UART_BASE
  82. #if BOARD_RUNNING_CORE == HPM_CORE0
  83. #define BOARD_CONSOLE_UART_BASE HPM_UART0
  84. #define BOARD_CONSOLE_UART_CLK_NAME clock_uart0
  85. #define BOARD_CONSOLE_UART_IRQ IRQn_UART0
  86. #define BOARD_CONSOLE_UART_TX_DMA_REQ HPM_DMA_SRC_UART0_TX
  87. #define BOARD_CONSOLE_UART_RX_DMA_REQ HPM_DMA_SRC_UART0_RX
  88. #else
  89. #define BOARD_CONSOLE_UART_BASE HPM_UART13
  90. #define BOARD_CONSOLE_UART_CLK_NAME clock_uart13
  91. #define BOARD_CONSOLE_UART_IRQ IRQn_UART13
  92. #define BOARD_CONSOLE_UART_TX_DMA_REQ HPM_DMA_SRC_UART13_TX
  93. #define BOARD_CONSOLE_UART_RX_DMA_REQ HPM_DMA_SRC_UART13_RX
  94. #endif
  95. #endif
  96. #define BOARD_CONSOLE_UART_BAUDRATE (115200UL)
  97. #endif
  98. #endif
  99. /* sdram section */
  100. #define BOARD_SDRAM_ADDRESS (0x40000000UL)
  101. #define BOARD_SDRAM_SIZE (32 * SIZE_1MB)
  102. #define BOARD_SDRAM_CS FEMC_SDRAM_CS0
  103. #define BOARD_SDRAM_PORT_SIZE FEMC_SDRAM_PORT_SIZE_32_BITS
  104. #define BOARD_SDRAM_REFRESH_COUNT (8192UL)
  105. #define BOARD_SDRAM_REFRESH_IN_MS (64UL)
  106. #define BOARD_SDRAM_DATA_WIDTH_IN_BYTE (4UL)
  107. #define BOARD_FLASH_BASE_ADDRESS (0x80000000UL)
  108. #define BOARD_FLASH_SIZE (16 << 20)
  109. #define BOARD_FEMC_DQS_FLOATING 1
  110. /* lcd section */
  111. #define BOARD_LCD_BASE HPM_LCDC
  112. #define BOARD_LCD_IRQ IRQn_LCDC_D0
  113. #define BOARD_LCD_RESET_GPIO_BASE HPM_GPIO0
  114. #define BOARD_LCD_RESET_GPIO_INDEX GPIO_DO_GPIOB
  115. #define BOARD_LCD_RESET_GPIO_PIN 16
  116. #define BOARD_LCD_BACKLIGHT_GPIO_BASE HPM_GPIO0
  117. #define BOARD_LCD_BACKLIGHT_GPIO_INDEX GPIO_DO_GPIOB
  118. #define BOARD_LCD_BACKLIGHT_GPIO_PIN 10
  119. #define BOARD_LCD_POWER_EN_GPIO_BASE HPM_GPIO0
  120. #define BOARD_LCD_POWER_EN_GPIO_INDEX GPIO_DO_GPIOZ
  121. #define BOARD_LCD_POWER_EN_GPIO_PIN 00
  122. /* i2c section */
  123. #define BOARD_APP_I2C_BASE HPM_I2C0
  124. #define BOARD_APP_I2C_IRQ IRQn_I2C0
  125. #define BOARD_APP_I2C_CLK_NAME clock_i2c0
  126. #define BOARD_APP_I2C_DMA HPM_HDMA
  127. #define BOARD_APP_I2C_DMAMUX HPM_DMAMUX
  128. #define BOARD_APP_I2C_DMA_SRC HPM_DMA_SRC_I2C0
  129. #define BOARD_CAM_I2C_BASE HPM_I2C0
  130. #define BOARD_CAM_I2C_CLK_NAME clock_i2c0
  131. #define BOARD_SUPPORT_CAM_RESET
  132. #define BOARD_CAM_RST_GPIO_CTRL HPM_GPIO0
  133. #define BOARD_CAM_RST_GPIO_INDEX GPIO_DI_GPIOY
  134. #define BOARD_CAM_RST_GPIO_PIN 5
  135. #define BOARD_CAP_I2C_BASE (HPM_I2C0)
  136. #define BOARD_CAP_I2C_CLK_NAME clock_i2c0
  137. #define BOARD_CAP_RST_GPIO (HPM_GPIO0)
  138. #define BOARD_CAP_RST_GPIO_INDEX (GPIO_DI_GPIOB)
  139. #define BOARD_CAP_RST_GPIO_PIN (9)
  140. #define BOARD_CAP_RST_GPIO_IRQ (IRQn_GPIO0_B)
  141. #define BOARD_CAP_INTR_GPIO (HPM_GPIO0)
  142. #define BOARD_CAP_INTR_GPIO_INDEX (GPIO_DI_GPIOB)
  143. #define BOARD_CAP_INTR_GPIO_PIN (8)
  144. #define BOARD_CAP_INTR_GPIO_IRQ (IRQn_GPIO0_B)
  145. #define BOARD_CAP_I2C_SDA_GPIO_INDEX (GPIO_DI_GPIOZ)
  146. #define BOARD_CAP_I2C_SDA_GPIO_PIN (10)
  147. #define BOARD_CAP_I2C_CLK_GPIO_INDEX (GPIO_DI_GPIOZ)
  148. #define BOARD_CAP_I2C_CLK_GPIO_PIN (11)
  149. /* ACMP desction */
  150. #define BOARD_ACMP HPM_ACMP
  151. #define BOARD_ACMP_CHANNEL ACMP_CHANNEL_CHN1
  152. #define BOARD_ACMP_IRQ IRQn_ACMP_1
  153. #define BOARD_ACMP_PLUS_INPUT ACMP_INPUT_DAC_OUT /* use internal DAC */
  154. #define BOARD_ACMP_MINUS_INPUT ACMP_INPUT_ANALOG_6 /* align with used pin */
  155. /* dma section */
  156. #define BOARD_APP_XDMA HPM_XDMA
  157. #define BOARD_APP_HDMA HPM_HDMA
  158. #define BOARD_APP_XDMA_IRQ IRQn_XDMA
  159. #define BOARD_APP_HDMA_IRQ IRQn_HDMA
  160. #define BOARD_APP_DMAMUX HPM_DMAMUX
  161. /* gptmr section */
  162. #define BOARD_GPTMR HPM_GPTMR4
  163. #define BOARD_GPTMR_IRQ IRQn_GPTMR4
  164. #define BOARD_GPTMR_CHANNEL 1
  165. #define BOARD_GPTMR_DMA_SRC HPM_DMA_SRC_GPTMR4_1
  166. #define BOARD_GPTMR_CLK_NAME clock_gptmr4
  167. #define BOARD_GPTMR_PWM HPM_GPTMR5
  168. #define BOARD_GPTMR_PWM_DMA_SRC HPM_DMA_SRC_GPTMR5_2
  169. #define BOARD_GPTMR_PWM_CHANNEL 2
  170. #define BOARD_GPTMR_PWM_CLK_NAME clock_gptmr5
  171. #define BOARD_GPTMR_PWM_IRQ IRQn_GPTMR5
  172. #define BOARD_GPTMR_PWM_SYNC HPM_GPTMR5
  173. #define BOARD_GPTMR_PWM_SYNC_CHANNEL 3
  174. #define BOARD_GPTMR_PWM_SYNC_CLK_NAME clock_gptmr5
  175. /* gpio section */
  176. #define BOARD_R_GPIO_CTRL HPM_GPIO0
  177. #define BOARD_R_GPIO_INDEX GPIO_DI_GPIOB
  178. #define BOARD_R_GPIO_PIN 11
  179. #define BOARD_G_GPIO_CTRL HPM_GPIO0
  180. #define BOARD_G_GPIO_INDEX GPIO_DI_GPIOB
  181. #define BOARD_G_GPIO_PIN 12
  182. #define BOARD_B_GPIO_CTRL HPM_GPIO0
  183. #define BOARD_B_GPIO_INDEX GPIO_DI_GPIOB
  184. #define BOARD_B_GPIO_PIN 13
  185. #define BOARD_LED_GPIO_CTRL HPM_GPIO0
  186. #define BOARD_LED_GPIO_INDEX GPIO_DI_GPIOB
  187. #define BOARD_LED_GPIO_PIN 12
  188. #define BOARD_LED_OFF_LEVEL 0
  189. #define BOARD_LED_ON_LEVEL 1
  190. #define BOARD_LED_TOGGLE_RGB 1
  191. #define BOARD_APP_GPIO_INDEX GPIO_DI_GPIOZ
  192. #define BOARD_APP_GPIO_PIN 2
  193. /* pinmux section */
  194. #define USING_GPIO0_FOR_GPIOZ
  195. #ifndef USING_GPIO0_FOR_GPIOZ
  196. #define BOARD_APP_GPIO_CTRL HPM_BGPIO
  197. #define BOARD_APP_GPIO_IRQ IRQn_BGPIO
  198. #else
  199. #define BOARD_APP_GPIO_CTRL HPM_GPIO0
  200. #define BOARD_APP_GPIO_IRQ IRQn_GPIO0_Z
  201. #endif
  202. /* gpiom section */
  203. #define BOARD_APP_GPIOM_BASE HPM_GPIOM
  204. #define BOARD_APP_GPIOM_USING_CTRL HPM_FGPIO
  205. #define BOARD_APP_GPIOM_USING_CTRL_NAME gpiom_core0_fast
  206. /* spi section */
  207. #define BOARD_APP_SPI_BASE HPM_SPI2
  208. #define BOARD_APP_SPI_CLK_NAME clock_spi2
  209. #define BOARD_APP_SPI_IRQ IRQn_SPI2
  210. #define BOARD_APP_SPI_SCLK_FREQ (20000000UL)
  211. #define BOARD_APP_SPI_ADDR_LEN_IN_BYTES (1U)
  212. #define BOARD_APP_SPI_DATA_LEN_IN_BITS (8U)
  213. #define BOARD_APP_SPI_RX_DMA HPM_DMA_SRC_SPI2_RX
  214. #define BOARD_APP_SPI_TX_DMA HPM_DMA_SRC_SPI2_TX
  215. #define BOARD_SPI_CS_GPIO_CTRL HPM_GPIO0
  216. #define BOARD_SPI_CS_PIN IOC_PAD_PE31
  217. #define BOARD_SPI_CS_ACTIVE_LEVEL (0U)
  218. /* Flash section */
  219. #define BOARD_APP_XPI_NOR_XPI_BASE (HPM_XPI0)
  220. #define BOARD_APP_XPI_NOR_CFG_OPT_HDR (0xfcf90001U)
  221. #define BOARD_APP_XPI_NOR_CFG_OPT_OPT0 (0x00000005U)
  222. #define BOARD_APP_XPI_NOR_CFG_OPT_OPT1 (0x00001000U)
  223. /* lcd section */
  224. #ifndef BOARD_LCD_WIDTH
  225. #define BOARD_LCD_WIDTH PANEL_SIZE_WIDTH
  226. #endif
  227. #ifndef BOARD_LCD_HEIGHT
  228. #define BOARD_LCD_HEIGHT PANEL_SIZE_HEIGHT
  229. #endif
  230. /* pdma section */
  231. #define BOARD_PDMA_BASE HPM_PDMA
  232. /* i2s section */
  233. #define BOARD_APP_I2S_BASE HPM_I2S0
  234. #define BOARD_APP_I2S_DATA_LINE (2U)
  235. #define BOARD_APP_I2S_CLK_NAME clock_i2s0
  236. #define BOARD_APP_I2S_TX_DMA_REQ HPM_DMA_SRC_I2S0_TX
  237. #define BOARD_APP_I2S_IRQ IRQn_I2S0
  238. #define BOARD_APP_AUDIO_CLK_SRC clock_source_pll3_clk0
  239. #define BOARD_APP_AUDIO_CLK_SRC_NAME clk_pll3clk0
  240. #define BOARD_PDM_SINGLE_CHANNEL_MASK (1U)
  241. #define BOARD_PDM_DUAL_CHANNEL_MASK (0x11U)
  242. /* enet section */
  243. #define BOARD_ENET_COUNT (2U)
  244. #define BOARD_ENET_PPS HPM_ENET0
  245. #define BOARD_ENET_PPS_IDX enet_pps_0
  246. #define BOARD_ENET_PPS_PTP_CLOCK clock_ptp0
  247. #define BOARD_ENET_RGMII_PHY_ITF enet_inf_rgmii
  248. #define BOARD_ENET_RGMII_RST_GPIO HPM_GPIO0
  249. #define BOARD_ENET_RGMII_RST_GPIO_INDEX GPIO_DO_GPIOF
  250. #define BOARD_ENET_RGMII_RST_GPIO_PIN (0U)
  251. #define BOARD_ENET_RGMII HPM_ENET0
  252. #define BOARD_ENET_RGMII_TX_DLY (0U)
  253. #define BOARD_ENET_RGMII_RX_DLY (7U)
  254. #define BOARD_ENET_RGMII_PTP_CLOCK (clock_ptp0)
  255. #define BOARD_ENET_RGMII_PPS0_PINOUT (1)
  256. #define BOARD_ENET_RMII_PHY_ITF enet_inf_rmii
  257. #define BOARD_ENET_RMII_RST_GPIO HPM_GPIO0
  258. #define BOARD_ENET_RMII_RST_GPIO_INDEX GPIO_DO_GPIOE
  259. #define BOARD_ENET_RMII_RST_GPIO_PIN (26U)
  260. #define BOARD_ENET_RMII HPM_ENET1
  261. #define BOARD_ENET_RMII_INT_REF_CLK (1U)
  262. #define BOARD_ENET_RMII_PTP_CLOCK (clock_ptp1)
  263. #define BOARD_ENET_RMII_PPS0_PINOUT (0)
  264. #define BOARD_ENET0_INF (1U) /* 0: RMII, 1: RGMII */
  265. #define BOARD_ENET0_INT_REF_CLK (0U)
  266. #define BOARD_ENET0_PHY_RST_TIME (30)
  267. #if BOARD_ENET0_INF
  268. #define BOARD_ENET0_TX_DLY (0U)
  269. #define BOARD_ENET0_RX_DLY (7U)
  270. #endif
  271. #if __USE_ENET_PTP
  272. #define BOARD_ENET0_PTP_CLOCK (clock_ptp0)
  273. #endif
  274. #define BOARD_ENET1_RST_GPIO HPM_GPIO0
  275. #define BOARD_ENET1_RST_GPIO_INDEX GPIO_DO_GPIOE
  276. #define BOARD_ENET1_RST_GPIO_PIN (26U)
  277. #define BOARD_ENET1_INF (0U) /* 0: RMII, 1: RGMII */
  278. #define BOARD_ENET1_INT_REF_CLK (1U)
  279. #define BOARD_ENET1_PHY_RST_TIME (30)
  280. #if BOARD_ENET1_INF
  281. #define BOARD_ENET1_TX_DLY (0U)
  282. #define BOARD_ENET1_RX_DLY (0U)
  283. #endif
  284. #if __USE_ENET_PTP
  285. #define BOARD_ENET1_PTP_CLOCK (clock_ptp1)
  286. #endif
  287. /* ADC section */
  288. #define BOARD_APP_ADC12_NAME "ADC0"
  289. #define BOARD_APP_ADC12_BASE HPM_ADC0
  290. #define BOARD_APP_ADC12_IRQn IRQn_ADC0
  291. #define BOARD_APP_ADC12_CH_1 (11U)
  292. #define BOARD_APP_ADC12_CLK_NAME (clock_adc0)
  293. #define BOARD_APP_ADC16_NAME "ADC3"
  294. #define BOARD_APP_ADC16_BASE HPM_ADC3
  295. #define BOARD_APP_ADC16_IRQn IRQn_ADC3
  296. #define BOARD_APP_ADC16_CH_1 (2U)
  297. #define BOARD_APP_ADC16_CLK_NAME (clock_adc3)
  298. #define BOARD_APP_ADC12_HW_TRIG_SRC HPM_PWM0
  299. #define BOARD_APP_ADC12_HW_TRGM HPM_TRGM0
  300. #define BOARD_APP_ADC12_HW_TRGM_IN HPM_TRGM0_INPUT_SRC_PWM0_CH8REF
  301. #define BOARD_APP_ADC12_HW_TRGM_OUT_SEQ TRGM_TRGOCFG_ADC0_STRGI
  302. #define BOARD_APP_ADC12_HW_TRGM_OUT_PMT TRGM_TRGOCFG_ADCX_PTRGI0A
  303. #define BOARD_APP_ADC16_HW_TRIG_SRC HPM_PWM0
  304. #define BOARD_APP_ADC16_HW_TRGM HPM_TRGM0
  305. #define BOARD_APP_ADC16_HW_TRGM_IN HPM_TRGM0_INPUT_SRC_PWM0_CH8REF
  306. #define BOARD_APP_ADC16_HW_TRGM_OUT_SEQ TRGM_TRGOCFG_ADC3_STRGI
  307. #define BOARD_APP_ADC16_HW_TRGM_OUT_PMT TRGM_TRGOCFG_ADCX_PTRGI0A
  308. #define BOARD_APP_ADC12_PMT_TRIG_CH ADC12_CONFIG_TRG0A
  309. #define BOARD_APP_ADC16_PMT_TRIG_CH ADC16_CONFIG_TRG0A
  310. /* CAN section */
  311. #define BOARD_APP_CAN_BASE HPM_CAN0
  312. #define BOARD_APP_CAN_IRQn IRQn_CAN0
  313. /*
  314. * timer for board delay
  315. */
  316. #define BOARD_DELAY_TIMER (HPM_GPTMR7)
  317. #define BOARD_DELAY_TIMER_CH 0
  318. #define BOARD_DELAY_TIMER_CLK_NAME (clock_gptmr7)
  319. #define BOARD_CALLBACK_TIMER (HPM_GPTMR7)
  320. #define BOARD_CALLBACK_TIMER_CH 1
  321. #define BOARD_CALLBACK_TIMER_IRQ IRQn_GPTMR7
  322. #define BOARD_CALLBACK_TIMER_CLK_NAME (clock_gptmr7)
  323. /* SDXC section */
  324. #define BOARD_APP_SDCARD_SDXC_BASE (HPM_SDXC1)
  325. #define BOARD_APP_SDCARD_SUPPORT_3V3 (1)
  326. #define BOARD_APP_SDCARD_SUPPORT_1V8 (0)
  327. #define BOARD_APP_SDCARD_SUPPORT_4BIT (1)
  328. #define BOARD_APP_SDCARD_SUPPORT_CARD_DETECTION (1)
  329. #define BOARD_APP_SDCARD_SUPPORT_POWER_SWITCH (1)
  330. #define BOARD_APP_SDCARD_POWER_SWITCH_USING_GPIO (1)
  331. #define BOARD_APP_SDCARD_SUPPORT_VOLTAGE_SWITCH (0)
  332. #define BOARD_APP_SDCARD_SUPPORT_CARD_DETECTION (1)
  333. #define BOARD_APP_SDCARD_CARD_DETECTION_USING_GPIO (1)
  334. #if defined(BOARD_APP_SDCARD_CARD_DETECTION_USING_GPIO) && (BOARD_APP_SDCARD_CARD_DETECTION_USING_GPIO == 1)
  335. #define BOARD_APP_SDCARD_CARD_DETECTION_PIN IOC_PAD_PD15
  336. #define BOARD_APP_SDCARD_CARD_DETECTION_PIN_POL 1 /* PIN value 0 means card is inserted */
  337. #define BOARD_APP_SDCARD_CARD_DETECTION_GPIO HPM_GPIO0
  338. #define BOARD_APP_SDCARD_CARD_DETECTION_GPIO_INDEX GPIO_DI_GPIOD
  339. #define BOARD_APP_SDCARD_CARD_DETECTION_PIN_INDEX 15
  340. #endif
  341. #if defined(BOARD_APP_SDCARD_POWER_SWITCH_USING_GPIO) && (BOARD_APP_SDCARD_POWER_SWITCH_USING_GPIO == 1)
  342. #define BOARD_APP_SDCARD_POWER_EN_GPIO_BASE HPM_GPIO0
  343. #define BOARD_APP_SDCARD_POWER_EN_GPIO_INDEX GPIO_DO_GPIOC
  344. #define BOARD_APP_SDCARD_POWER_EN_GPIO_PIN 20
  345. #define BOARD_APP_SDCARD_POWER_SWITCH_PIN IOC_PAD_PC20
  346. #define BOARD_APP_SDCARD_POWER_SWITCH_PIN_POL 0 /* PIN value 1 means power is supplied */
  347. #endif
  348. #define BOARD_APP_EMMC_SDXC_BASE (HPM_SDXC1)
  349. #define BOARD_APP_EMMC_SUPPORT_3V3 (1)
  350. #define BOARD_APP_EMMC_SUPPORT_1V8 (0)
  351. #define BOARD_APP_EMMC_SUPPORT_4BIT (1)
  352. #define BOARD_APP_EMMC_SUPPORT_POWER_SWITCH (1)
  353. #define BOARD_APP_EMMC_POWER_SWITCH_USING_GPIO (1)
  354. #define BOARD_APP_EMMC_HOST_USING_IRQ (0)
  355. #if defined(BOARD_APP_EMMC_POWER_SWITCH_USING_GPIO) && (BOARD_APP_EMMC_POWER_SWITCH_USING_GPIO == 1)
  356. #define BOARD_APP_EMMC_POWER_SWITCH_PIN IOC_PAD_PC20
  357. #define BOARD_APP_EMMC_POWER_SWITCH_PIN_POL 0 /* PIN value 1 means power is supplied */
  358. #endif
  359. /* USB section */
  360. #define BOARD_USB0_ID_PORT (HPM_GPIO0)
  361. #define BOARD_USB0_ID_GPIO_INDEX (GPIO_DO_GPIOF)
  362. #define BOARD_USB0_ID_GPIO_PIN (10)
  363. #define BOARD_USB0_OC_PORT (HPM_GPIO0)
  364. #define BOARD_USB0_OC_GPIO_INDEX (GPIO_DI_GPIOF)
  365. #define BOARD_USB0_OC_GPIO_PIN (8)
  366. #define BOARD_USB1_ID_PORT (HPM_GPIO0)
  367. #define BOARD_USB1_ID_GPIO_INDEX (GPIO_DO_GPIOF)
  368. #define BOARD_USB1_ID_GPIO_PIN (7)
  369. #define BOARD_USB1_OC_PORT (HPM_GPIO0)
  370. #define BOARD_USB1_OC_GPIO_INDEX (GPIO_DI_GPIOF)
  371. #define BOARD_USB1_OC_GPIO_PIN (5)
  372. /*BLDC pwm*/
  373. /*PWM define*/
  374. #define BOARD_BLDCPWM HPM_PWM2
  375. #define BOARD_BLDC_UH_PWM_OUTPIN (0U)
  376. #define BOARD_BLDC_UL_PWM_OUTPIN (1U)
  377. #define BOARD_BLDC_VH_PWM_OUTPIN (2U)
  378. #define BOARD_BLDC_VL_PWM_OUTPIN (3U)
  379. #define BOARD_BLDC_WH_PWM_OUTPIN (4U)
  380. #define BOARD_BLDC_WL_PWM_OUTPIN (5U)
  381. #define BOARD_BLDCPWM_TRGM HPM_TRGM2
  382. #define BOARD_BLDCAPP_PWM_IRQ IRQn_PWM2
  383. #define BOARD_BLDCPWM_CMP_INDEX_0 (0U)
  384. #define BOARD_BLDCPWM_CMP_INDEX_1 (1U)
  385. #define BOARD_BLDCPWM_CMP_INDEX_2 (2U)
  386. #define BOARD_BLDCPWM_CMP_INDEX_3 (3U)
  387. #define BOARD_BLDCPWM_CMP_INDEX_4 (4U)
  388. #define BOARD_BLDCPWM_CMP_INDEX_5 (5U)
  389. #define BOARD_BLDCPWM_CMP_INDEX_6 (6U)
  390. #define BOARD_BLDCPWM_CMP_INDEX_7 (7U)
  391. #define BOARD_BLDCPWM_CMP_TRIG_CMP (20U)
  392. /*HALL define*/
  393. #define BOARD_BLDC_HALL_BASE HPM_HALL2
  394. #define BOARD_BLDC_HALL_TRGM HPM_TRGM2
  395. #define BOARD_BLDC_HALL_IRQ IRQn_HALL2
  396. #define BOARD_BLDC_HALL_TRGM_HALL_U_SRC HPM_TRGM2_INPUT_SRC_TRGM2_P6
  397. #define BOARD_BLDC_HALL_TRGM_HALL_V_SRC HPM_TRGM2_INPUT_SRC_TRGM2_P7
  398. #define BOARD_BLDC_HALL_TRGM_HALL_W_SRC HPM_TRGM2_INPUT_SRC_TRGM2_P8
  399. #define BOARD_BLDC_HALL_MOTOR_PHASE_COUNT_PER_REV (1000U)
  400. /*QEI*/
  401. #define BOARD_BLDC_QEI_BASE HPM_QEI2
  402. #define BOARD_BLDC_QEI_IRQ IRQn_QEI2
  403. #define BOARD_BLDC_QEI_TRGM HPM_TRGM2
  404. #define BOARD_BLDC_QEI_TRGM_QEI_A_SRC HPM_TRGM2_INPUT_SRC_TRGM2_P9
  405. #define BOARD_BLDC_QEI_TRGM_QEI_B_SRC HPM_TRGM2_INPUT_SRC_TRGM2_P10
  406. #define BOARD_BLDC_QEI_MOTOR_PHASE_COUNT_PER_REV (16U)
  407. #define BOARD_BLDC_QEI_CLOCK_SOURCE clock_mot2
  408. #define BOARD_BLDC_QEI_FOC_PHASE_COUNT_PER_REV (4000U)
  409. /*HFI define*/
  410. #define MOTOR0_HFI_SPD (0.5)
  411. #define MOTOR0_HFI_KP (40)
  412. /*Timer define*/
  413. #define BOARD_TMR_1MS HPM_GPTMR2
  414. #define BOARD_TMR_1MS_CH 0
  415. #define BOARD_TMR_1MS_CMP 0
  416. #define BOARD_TMR_1MS_IRQ IRQn_GPTMR2
  417. #define BOARD_TMR_1MS_RELOAD (100000U)
  418. #define BOARD_BLDC_TMR_1MS BOARD_TMR_1MS
  419. #define BOARD_BLDC_TMR_CH BOARD_TMR_1MS_CH
  420. #define BOARD_BLDC_TMR_CMP BOARD_TMR_1MS_CMP
  421. #define BOARD_BLDC_TMR_IRQ BOARD_TMR_1MS_IRQ
  422. #define BOARD_BLDC_TMR_RELOAD BOARD_TMR_1MS_RELOAD
  423. /*adc*/
  424. #define BOARD_BLDC_ADC_MODULE ADCX_MODULE_ADC12
  425. #define BOARD_BLDC_ADC_U_BASE HPM_ADC0
  426. #define BOARD_BLDC_ADC_V_BASE HPM_ADC1
  427. #define BOARD_BLDC_ADC_W_BASE HPM_ADC2
  428. #define BOARD_BLDC_ADC_TRIG_FLAG adc12_event_trig_complete
  429. #define BOARD_BLDC_ADC_CH_U (7U)
  430. #define BOARD_BLDC_ADC_CH_V (10U)
  431. #define BOARD_BLDC_ADC_CH_W (11U)
  432. #define BOARD_BLDC_ADC_IRQn IRQn_ADC0
  433. #define BOARD_BLDC_ADC_PMT_DMA_SIZE_IN_4BYTES (ADC_SOC_PMT_MAX_DMA_BUFF_LEN_IN_4BYTES)
  434. #define BOARD_BLDC_ADC_TRG ADC12_CONFIG_TRG2A
  435. #define BOARD_BLDC_ADC_PREEMPT_TRIG_LEN (1U)
  436. #define BOARD_BLDC_PWM_TRIG_CMP_INDEX (8U)
  437. #define BOARD_BLDC_TRIGMUX_IN_NUM HPM_TRGM2_INPUT_SRC_PWM2_CH8REF
  438. #define BOARD_BLDC_TRG_NUM TRGM_TRGOCFG_ADCX_PTRGI0A
  439. #define BOARD_BLDC_ADC_IRQn IRQn_ADC0
  440. /* APP PWM */
  441. #define BOARD_APP_PWM HPM_PWM2
  442. #define BOARD_APP_PWM_CLOCK_NAME clock_mot2
  443. #define BOARD_APP_PWM_OUT1 0
  444. #define BOARD_APP_PWM_OUT2 1
  445. #define BOARD_APP_TRGM HPM_TRGM2
  446. #define BOARD_APP_PWM_IRQ IRQn_PWM2
  447. #define BOARD_APP_TRGM_PWM_OUTPUT TRGM_TRGOCFG_PWM_SYNCI
  448. /* RGB LED Section */
  449. #define BOARD_RED_PWM_IRQ IRQn_PWM1
  450. #define BOARD_RED_PWM HPM_PWM1
  451. #define BOARD_RED_PWM_OUT 8
  452. #define BOARD_RED_PWM_CMP 8
  453. #define BOARD_RED_PWM_CMP_INITIAL_ZERO true
  454. #define BOARD_RED_PWM_CLOCK_NAME clock_mot1
  455. #define BOARD_GREEN_PWM_IRQ IRQn_PWM0
  456. #define BOARD_GREEN_PWM HPM_PWM0
  457. #define BOARD_GREEN_PWM_OUT 8
  458. #define BOARD_GREEN_PWM_CMP 8
  459. #define BOARD_GREEN_PWM_CMP_INITIAL_ZERO true
  460. #define BOARD_GREEN_PWM_CLOCK_NAME clock_mot0
  461. #define BOARD_BLUE_PWM_IRQ IRQn_PWM1
  462. #define BOARD_BLUE_PWM HPM_PWM1
  463. #define BOARD_BLUE_PWM_OUT 9
  464. #define BOARD_BLUE_PWM_CMP 9
  465. #define BOARD_BLUE_PWM_CMP_INITIAL_ZERO true
  466. #define BOARD_BLUE_PWM_CLOCK_NAME clock_mot1
  467. #define BOARD_RGB_RED 0
  468. #define BOARD_RGB_GREEN (BOARD_RGB_RED + 1)
  469. #define BOARD_RGB_BLUE (BOARD_RGB_RED + 2)
  470. #define BOARD_CPU_FREQ (648000000UL)
  471. #define BOARD_APP_DISPLAY_CLOCK clock_display
  472. #ifndef BOARD_SHOW_CLOCK
  473. #define BOARD_SHOW_CLOCK 1
  474. #endif
  475. #ifndef BOARD_SHOW_BANNER
  476. #define BOARD_SHOW_BANNER 1
  477. #endif
  478. /* FreeRTOS Definitions */
  479. #define BOARD_FREERTOS_TIMER HPM_GPTMR6
  480. #define BOARD_FREERTOS_TIMER_CHANNEL 1
  481. #define BOARD_FREERTOS_TIMER_IRQ IRQn_GPTMR6
  482. #define BOARD_FREERTOS_TIMER_CLK_NAME clock_gptmr6
  483. /* Threadx Definitions */
  484. #define BOARD_THREADX_TIMER HPM_GPTMR6
  485. #define BOARD_THREADX_TIMER_CHANNEL 1
  486. #define BOARD_THREADX_TIMER_IRQ IRQn_GPTMR6
  487. #define BOARD_THREADX_TIMER_CLK_NAME clock_gptmr6
  488. /* Tamper Section */
  489. #define BOARD_TAMP_ACTIVE_CH 8
  490. #define BOARD_TAMP_LOW_LEVEL_CH 10
  491. #if defined(__cplusplus)
  492. extern "C" {
  493. #endif /* __cplusplus */
  494. typedef void (*board_timer_cb)(void);
  495. void board_init(void);
  496. void board_init_console(void);
  497. void board_init_core1(void);
  498. void board_init_uart(UART_Type *ptr);
  499. void board_init_i2c(I2C_Type *ptr);
  500. void board_init_lcd(void);
  501. void board_lcd_backlight(bool is_on);
  502. void board_panel_para_to_lcdc(lcdc_config_t *config);
  503. void board_init_can(CAN_Type *ptr);
  504. uint32_t board_init_femc_clock(void);
  505. void board_init_sdram_pins(void);
  506. void board_init_gpio_pins(void);
  507. void board_init_spi_pins(SPI_Type *ptr);
  508. void board_init_spi_pins_with_gpio_as_cs(SPI_Type *ptr);
  509. void board_write_spi_cs(uint32_t pin, uint8_t state);
  510. void board_init_led_pins(void);
  511. /* cap touch */
  512. void board_init_cap_touch(void);
  513. void board_led_write(uint8_t state);
  514. void board_led_toggle(void);
  515. void board_fpga_power_enable(void);
  516. void board_init_cam_pins(void);
  517. void board_write_cam_rst(uint8_t state);
  518. /* Initialize SoC overall clocks */
  519. void board_init_clock(void);
  520. /* Initialize the UART clock */
  521. uint32_t board_init_uart_clock(UART_Type *ptr);
  522. /* Initialize the CAM(camera) dot clock */
  523. uint32_t board_init_cam_clock(CAM_Type *ptr);
  524. /* Initialize the LCD pixel clock */
  525. uint32_t board_init_lcd_clock(void);
  526. uint32_t board_init_spi_clock(SPI_Type *ptr);
  527. uint32_t board_init_adc12_clock(ADC12_Type *ptr, bool clk_src_ahb);
  528. uint32_t board_init_adc16_clock(ADC16_Type *ptr, bool clk_src_ahb);
  529. uint32_t board_init_can_clock(CAN_Type *ptr);
  530. uint32_t board_init_gptmr_clock(GPTMR_Type *ptr);
  531. hpm_stat_t board_set_audio_pll_clock(uint32_t freq);
  532. void board_init_i2s_pins(I2S_Type *ptr);
  533. uint32_t board_init_i2s_clock(I2S_Type *ptr);
  534. uint32_t board_config_i2s_clock(I2S_Type *ptr, uint32_t sample_rate);
  535. uint32_t board_init_pdm_clock(void);
  536. uint32_t board_init_dao_clock(void);
  537. uint32_t board_sd_configure_clock(SDXC_Type *ptr, uint32_t freq, bool need_inverse);
  538. void board_sd_switch_pins_to_1v8(SDXC_Type *ptr);
  539. void board_sd_power_switch(SDXC_Type *ptr, bool on_off);
  540. bool board_sd_detect_card(SDXC_Type *ptr);
  541. void board_init_dao_pins(void);
  542. void board_init_adc12_pins(void);
  543. void board_init_adc16_pins(void);
  544. void board_init_usb_pins(void);
  545. void board_usb_vbus_ctrl(uint8_t usb_index, uint8_t level);
  546. void board_init_enet_pps_pins(ENET_Type *ptr);
  547. uint8_t board_get_enet_dma_pbl(ENET_Type *ptr);
  548. hpm_stat_t board_reset_enet_phy(ENET_Type *ptr);
  549. hpm_stat_t board_init_enet_pins(ENET_Type *ptr);
  550. hpm_stat_t board_init_enet_rmii_reference_clock(ENET_Type *ptr, bool internal);
  551. hpm_stat_t board_init_enet_rgmii_clock_delay(ENET_Type *ptr);
  552. hpm_stat_t board_init_enet_ptp_clock(ENET_Type *ptr);
  553. hpm_stat_t board_enable_enet_irq(ENET_Type *ptr);
  554. hpm_stat_t board_disable_enet_irq(ENET_Type *ptr);
  555. #if defined(ENET_MULTIPLE_PORT) && ENET_MULTIPLE_PORT
  556. hpm_stat_t board_init_multiple_enet_pins(void);
  557. hpm_stat_t board_init_multiple_enet_clock(void);
  558. hpm_stat_t board_reset_multiple_enet_phy(void);
  559. hpm_stat_t board_init_enet_phy(ENET_Type *ptr);
  560. ENET_Type *board_get_enet_base(uint8_t idx);
  561. uint8_t board_get_enet_phy_itf(uint8_t idx);
  562. void board_get_enet_phy_status(uint8_t idx, void *status);
  563. #endif
  564. /*
  565. * @brief Initialize PMP and PMA for but not limited to the following purposes:
  566. * -- non-cacheable memory initialization
  567. */
  568. void board_init_pmp(void);
  569. void board_delay_ms(uint32_t ms);
  570. void board_delay_us(uint32_t us);
  571. void board_timer_create(uint32_t ms, board_timer_cb cb);
  572. void board_init_rgb_pwm_pins(void);
  573. void board_enable_output_rgb_led(uint8_t color);
  574. void board_disable_output_rgb_led(uint8_t color);
  575. /*
  576. * Keep mchtmr clock on low power mode
  577. */
  578. void board_ungate_mchtmr_at_lp_mode(void);
  579. /*
  580. * Get PWM output level of onboard LED
  581. */
  582. uint8_t board_get_led_pwm_off_level(void);
  583. /*
  584. * Get GPIO pin level of onboard LED
  585. */
  586. uint8_t board_get_led_gpio_off_level(void);
  587. #if defined(__cplusplus)
  588. }
  589. #endif /* __cplusplus */
  590. #endif /* _HPM_BOARD_H */