start.S 1.6 KB

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  1. /*
  2. * Copyright (c) 2021-2023 HPMicro
  3. *
  4. * SPDX-License-Identifier: BSD-3-Clause
  5. *
  6. */
  7. #include <rtconfig.h>
  8. #include "hpm_csr_regs.h"
  9. .section .start, "ax"
  10. .global _start
  11. .type _start,@function
  12. _start:
  13. /* Initialize global pointer */
  14. .option push
  15. .option norelax
  16. la gp, __global_pointer$
  17. la tp, __thread_pointer
  18. .option pop
  19. /* Enable LMM1 clock */
  20. la t0, 0xF4000800
  21. lw t1, 0(t0)
  22. ori t1, t1, 0x80
  23. sw t1, 0(t0)
  24. #ifdef __riscv_flen
  25. /* Enable FPU */
  26. li t0, CSR_MSTATUS_FS_MASK
  27. csrrs t0, mstatus, t0
  28. /* Initialize FCSR */
  29. fscsr zero
  30. #endif
  31. #ifdef INIT_EXT_RAM_FOR_DATA
  32. la t0, _stack_in_dlm
  33. mv sp, t0
  34. call _init_ext_ram
  35. #endif
  36. /* Initialize stack pointer */
  37. la t0, _stack
  38. mv sp, t0
  39. #ifdef __nds_execit
  40. /* Initialize EXEC.IT table */
  41. la t0, _ITB_BASE_
  42. csrw uitb, t0
  43. #endif
  44. #ifdef __riscv_flen
  45. /* Enable FPU */
  46. li t0, CSR_MSTATUS_FS_MASK
  47. csrrs t0, mstatus, t0
  48. /* Initialize FCSR */
  49. fscsr zero
  50. #endif
  51. /* Disable Vector mode */
  52. csrci CSR_MMISC_CTL, 2
  53. /* Initialize trap_entry base */
  54. la t0, SW_handler
  55. csrw mtvec, t0
  56. /* System reset handler */
  57. call reset_handler
  58. /* Infinite loop, if returned accidently */
  59. 1: j 1b
  60. .weak nmi_handler
  61. nmi_handler:
  62. 1: j 1b
  63. .global default_irq_handler
  64. .weak default_irq_handler
  65. .align 2
  66. default_irq_handler:
  67. 1: j 1b
  68. .macro IRQ_HANDLER irq
  69. .weak default_isr_\irq
  70. .set default_isr_\irq, default_irq_handler
  71. .long default_isr_\irq
  72. .endm
  73. #include "vectors.S"