board.h 16 KB

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  1. /*
  2. * Copyright (c) 2023 HPMicro
  3. *
  4. * SPDX-License-Identifier: BSD-3-Clause
  5. *
  6. */
  7. #ifndef _HPM_BOARD_H
  8. #define _HPM_BOARD_H
  9. #include <stdio.h>
  10. #include "hpm_common.h"
  11. #include "hpm_clock_drv.h"
  12. #include "hpm_lcdc_drv.h"
  13. #include "hpm_soc.h"
  14. #include "hpm_soc_feature.h"
  15. #include "pinmux.h"
  16. #ifdef CONFIG_HPM_PANEL
  17. #include "hpm_panel.h"
  18. #endif
  19. #if !defined(CONFIG_NDEBUG_CONSOLE) || !CONFIG_NDEBUG_CONSOLE
  20. #include "hpm_debug_console.h"
  21. #endif
  22. #define BOARD_NAME "hpm6800evk"
  23. #define BOARD_UF2_SIGNATURE (0x0A4D5048UL)
  24. /* dma section */
  25. #define BOARD_APP_XDMA HPM_XDMA
  26. #define BOARD_APP_HDMA HPM_HDMA
  27. #define BOARD_APP_XDMA_IRQ IRQn_XDMA
  28. #define BOARD_APP_HDMA_IRQ IRQn_HDMA
  29. #define BOARD_APP_DMAMUX HPM_DMAMUX
  30. #define TEST_DMA_CONTROLLER HPM_HDMA
  31. #define TEST_DMA_IRQ IRQn_HDMA
  32. #ifndef BOARD_RUNNING_CORE
  33. #define BOARD_RUNNING_CORE HPM_CORE0
  34. #endif
  35. /* uart section */
  36. #ifndef BOARD_APP_UART_BASE
  37. #define BOARD_APP_UART_BASE HPM_UART3
  38. #define BOARD_APP_UART_IRQ IRQn_UART3
  39. #define BOARD_APP_UART_BAUDRATE (115200UL)
  40. #define BOARD_APP_UART_CLK_NAME clock_uart3
  41. #define BOARD_APP_UART_RX_DMA_REQ HPM_DMA_SRC_UART3_RX
  42. #define BOARD_APP_UART_TX_DMA_REQ HPM_DMA_SRC_UART3_TX
  43. #endif
  44. /* uart lin sample section */
  45. #define BOARD_UART_LIN BOARD_APP_UART_BASE
  46. #define BOARD_UART_LIN_IRQ BOARD_APP_UART_IRQ
  47. #define BOARD_UART_LIN_CLK_NAME BOARD_APP_UART_CLK_NAME
  48. #define BOARD_UART_LIN_TX_PORT GPIO_DI_GPIOE
  49. #define BOARD_UART_LIN_TX_PIN (15U) /* PE15 should align with used pin in pinmux configuration */
  50. #if !defined(CONFIG_NDEBUG_CONSOLE) || !CONFIG_NDEBUG_CONSOLE
  51. #ifndef BOARD_CONSOLE_TYPE
  52. #define BOARD_CONSOLE_TYPE CONSOLE_TYPE_UART
  53. #endif
  54. #if BOARD_CONSOLE_TYPE == CONSOLE_TYPE_UART
  55. #ifndef BOARD_CONSOLE_UART_BASE
  56. #define BOARD_CONSOLE_UART_BASE HPM_UART0
  57. #define BOARD_CONSOLE_UART_CLK_NAME clock_uart0
  58. #define BOARD_CONSOLE_UART_IRQ IRQn_UART0
  59. #define BOARD_CONSOLE_UART_TX_DMA_REQ HPM_DMA_SRC_UART0_TX
  60. #define BOARD_CONSOLE_UART_RX_DMA_REQ HPM_DMA_SRC_UART0_RX
  61. #endif
  62. #define BOARD_CONSOLE_UART_BAUDRATE (115200UL)
  63. #endif
  64. #endif
  65. /* uart microros sample section */
  66. #define BOARD_MICROROS_UART_BASE BOARD_APP_UART_BASE
  67. #define BOARD_MICROROS_UART_IRQ BOARD_APP_UART_IRQ
  68. #define BOARD_MICROROS_UART_CLK_NAME BOARD_APP_UART_CLK_NAME
  69. /* rtthread-nano finsh section */
  70. #define BOARD_RT_CONSOLE_BASE BOARD_CONSOLE_UART_BASE
  71. /* usb cdc acm uart section */
  72. #define BOARD_USB_CDC_ACM_UART BOARD_APP_UART_BASE
  73. #define BOARD_USB_CDC_ACM_UART_CLK_NAME BOARD_APP_UART_CLK_NAME
  74. #define BOARD_USB_CDC_ACM_UART_TX_DMA_SRC BOARD_APP_UART_TX_DMA_REQ
  75. #define BOARD_USB_CDC_ACM_UART_RX_DMA_SRC BOARD_APP_UART_RX_DMA_REQ
  76. /* modbus sample section */
  77. #define BOARD_MODBUS_UART_BASE BOARD_APP_UART_BASE
  78. #define BOARD_MODBUS_UART_CLK_NAME BOARD_APP_UART_CLK_NAME
  79. #define BOARD_MODBUS_UART_RX_DMA_REQ BOARD_APP_UART_RX_DMA_REQ
  80. #define BOARD_MODBUS_UART_TX_DMA_REQ BOARD_APP_UART_TX_DMA_REQ
  81. /* lin section */
  82. #define BOARD_LIN HPM_LIN0
  83. #define BOARD_LIN_CLK_NAME clock_lin0
  84. #define BOARD_LIN_IRQ IRQn_LIN0
  85. #define BOARD_LIN_BAUDRATE (19200U)
  86. /* nor flash section */
  87. #define BOARD_FLASH_BASE_ADDRESS (0x80000000UL)
  88. #define BOARD_FLASH_SIZE (16 * SIZE_1MB)
  89. /* i2c section */
  90. #define BOARD_APP_I2C_BASE HPM_I2C1
  91. #define BOARD_APP_I2C_IRQ IRQn_I2C1
  92. #define BOARD_APP_I2C_CLK_NAME clock_i2c1
  93. #define BOARD_APP_I2C_DMA HPM_HDMA
  94. #define BOARD_APP_I2C_DMAMUX HPM_DMAMUX
  95. #define BOARD_APP_I2C_DMA_SRC HPM_DMA_SRC_I2C1
  96. #define BOARD_APP_I2C_DMAMUX_CH DMAMUX_MUXCFG_HDMA_MUX0
  97. /* cam */
  98. #define BOARD_CAM_I2C_BASE HPM_I2C0
  99. #define BOARD_CAM_I2C_CLK_NAME clock_i2c0
  100. #define BOARD_SUPPORT_CAM_RESET
  101. #define BOARD_SUPPORT_CAM_PWDN
  102. #define BOARD_CAM_RST_GPIO_CTRL HPM_GPIO0
  103. #define BOARD_CAM_RST_GPIO_INDEX GPIO_DI_GPIOA
  104. #define BOARD_CAM_RST_GPIO_PIN 22
  105. #define BOARD_CAM_PWDN_GPIO_CTRL HPM_GPIO0
  106. #define BOARD_CAM_PWDN_GPIO_INDEX GPIO_DI_GPIOA
  107. #define BOARD_CAM_PWDN_GPIO_PIN 21
  108. /* touch panel */
  109. #define BOARD_CAP_I2C_BASE (HPM_I2C0)
  110. #define BOARD_CAP_I2C_CLK_NAME clock_i2c0
  111. #define BOARD_CAP_RST_GPIO (HPM_GPIO0)
  112. #define BOARD_CAP_RST_GPIO_INDEX (GPIO_DI_GPIOY)
  113. #define BOARD_CAP_RST_GPIO_PIN (7)
  114. #define BOARD_CAP_RST_GPIO_IRQ (IRQn_GPIO0_Y)
  115. #define BOARD_CAP_INTR_GPIO (HPM_GPIO0)
  116. #define BOARD_CAP_INTR_GPIO_INDEX (GPIO_DI_GPIOY)
  117. #define BOARD_CAP_INTR_GPIO_PIN (6)
  118. #define BOARD_CAP_INTR_GPIO_IRQ (IRQn_GPIO0_Y)
  119. #define BOARD_CAP_I2C_GPIO HPM_GPIO0
  120. #define BOARD_CAP_I2C_SDA_GPIO_INDEX (GPIO_DI_GPIOF)
  121. #define BOARD_CAP_I2C_SDA_GPIO_PIN (9)
  122. #define BOARD_CAP_I2C_CLK_GPIO_INDEX (GPIO_DI_GPIOF)
  123. #define BOARD_CAP_I2C_CLK_GPIO_PIN (8)
  124. /* i2s section */
  125. #define BOARD_APP_I2S_BASE HPM_I2S3
  126. #define BOARD_APP_I2S_DATA_LINE (2U)
  127. #define BOARD_APP_I2S_CLK_NAME clock_i2s3
  128. #define BOARD_APP_I2S_TX_DMA_REQ HPM_DMA_SRC_I2S3_TX
  129. #define BOARD_APP_I2S_IRQ IRQn_I2S3
  130. #define BOARD_APP_AUDIO_CLK_SRC clock_source_pll3_clk0
  131. #define BOARD_APP_AUDIO_CLK_SRC_NAME clk_pll3clk0
  132. #define BOARD_PDM_SINGLE_CHANNEL_MASK (0x02U)
  133. #define BOARD_PDM_DUAL_CHANNEL_MASK (0x22U)
  134. /* i2c for i2s codec section */
  135. #define BOARD_CODEC_I2C_BASE HPM_I2C3
  136. #define BOARD_CODEC_I2C_CLK_NAME clock_i2c3
  137. /* dma section */
  138. #define BOARD_APP_XDMA HPM_XDMA
  139. #define BOARD_APP_HDMA HPM_HDMA
  140. #define BOARD_APP_XDMA_IRQ IRQn_XDMA
  141. #define BOARD_APP_HDMA_IRQ IRQn_HDMA
  142. #define BOARD_APP_DMAMUX HPM_DMAMUX
  143. /* gptmr section */
  144. #define BOARD_GPTMR HPM_GPTMR2
  145. #define BOARD_GPTMR_IRQ IRQn_GPTMR2
  146. #define BOARD_GPTMR_CHANNEL 0
  147. #define BOARD_GPTMR_DMA_SRC HPM_DMA_SRC_GPTMR2_0
  148. #define BOARD_GPTMR_CLK_NAME clock_gptmr2
  149. #define BOARD_GPTMR_PWM HPM_GPTMR2
  150. #define BOARD_GPTMR_PWM_CHANNEL 0
  151. #define BOARD_GPTMR_PWM_DMA_SRC HPM_DMA_SRC_GPTMR2_0
  152. #define BOARD_GPTMR_PWM_CLK_NAME clock_gptmr2
  153. #define BOARD_GPTMR_PWM_IRQ IRQn_GPTMR2
  154. #define BOARD_GPTMR_PWM_SYNC HPM_GPTMR2
  155. #define BOARD_GPTMR_PWM_SYNC_CHANNEL 1
  156. #define BOARD_GPTMR_PWM_SYNC_CLK_NAME clock_gptmr2
  157. /* pinmux section */
  158. #define USING_GPIO0_FOR_GPIOZ
  159. #ifndef USING_GPIO0_FOR_GPIOZ
  160. #define BOARD_APP_GPIO_CTRL HPM_BGPIO
  161. #define BOARD_APP_GPIO_IRQ IRQn_BGPIO
  162. #else
  163. #define BOARD_APP_GPIO_CTRL HPM_GPIO0
  164. #define BOARD_APP_GPIO_IRQ IRQn_GPIO0_F
  165. #endif
  166. /* gpiom section */
  167. #define BOARD_APP_GPIOM_BASE HPM_GPIOM
  168. #define BOARD_APP_GPIOM_USING_CTRL HPM_FGPIO
  169. #define BOARD_APP_GPIOM_USING_CTRL_NAME gpiom_core0_fast
  170. /*
  171. * in errata, for gpiom, setting the ASSIGN register of GPIOF is invalid.
  172. * so need to configure GPIOE to make it effective at the same time.
  173. */
  174. #define BOARD_LED_GPIOM_GPIO_INDEX GPIO_DI_GPIOE
  175. /* spi section */
  176. #define BOARD_APP_SPI_BASE HPM_SPI3
  177. #define BOARD_APP_SPI_CLK_NAME clock_spi3
  178. #define BOARD_APP_SPI_IRQ IRQn_SPI3
  179. #define BOARD_APP_SPI_SCLK_FREQ (20000000UL)
  180. #define BOARD_APP_SPI_ADDR_LEN_IN_BYTES (1U)
  181. #define BOARD_APP_SPI_DATA_LEN_IN_BITS (8U)
  182. #define BOARD_APP_SPI_RX_DMA HPM_DMA_SRC_SPI3_RX
  183. #define BOARD_APP_SPI_TX_DMA HPM_DMA_SRC_SPI3_TX
  184. #define BOARD_SPI_CS_GPIO_CTRL HPM_GPIO0
  185. #define BOARD_SPI_CS_PIN IOC_PAD_PE04
  186. #define BOARD_SPI_CS_ACTIVE_LEVEL (0U)
  187. /* Flash section */
  188. #define BOARD_APP_XPI_NOR_XPI_BASE (HPM_XPI0)
  189. #define BOARD_APP_XPI_NOR_CFG_OPT_HDR (0xfcf90001U)
  190. #define BOARD_APP_XPI_NOR_CFG_OPT_OPT0 (0x00000005U)
  191. #define BOARD_APP_XPI_NOR_CFG_OPT_OPT1 (0x00001000U)
  192. /* ADC section */
  193. #define BOARD_APP_ADC16_NAME "ADC0"
  194. #define BOARD_APP_ADC16_BASE HPM_ADC0
  195. #define BOARD_APP_ADC16_IRQn IRQn_ADC0
  196. #define BOARD_APP_ADC16_CH_1 (8U)
  197. #define BOARD_APP_ADC16_CLK_NAME (clock_adc0)
  198. #define BOARD_APP_ADC16_PMT_TRIG_CH ADC16_CONFIG_TRG0A
  199. /* CAN section */
  200. #define BOARD_APP_CAN_BASE HPM_MCAN3
  201. #define BOARD_APP_CAN_IRQn IRQn_MCAN3
  202. /*
  203. * timer for board delay
  204. */
  205. #define BOARD_DELAY_TIMER (HPM_GPTMR3)
  206. #define BOARD_DELAY_TIMER_CH 0
  207. #define BOARD_DELAY_TIMER_CLK_NAME (clock_gptmr3)
  208. #define BOARD_CALLBACK_TIMER (HPM_GPTMR3)
  209. #define BOARD_CALLBACK_TIMER_CH 1
  210. #define BOARD_CALLBACK_TIMER_IRQ IRQn_GPTMR3
  211. #define BOARD_CALLBACK_TIMER_CLK_NAME (clock_gptmr3)
  212. #define BOARD_CPU_FREQ (500000000UL)
  213. /* LED */
  214. #define BOARD_R_GPIO_CTRL HPM_GPIO0
  215. #define BOARD_R_GPIO_INDEX GPIO_DI_GPIOF
  216. #define BOARD_R_GPIO_PIN 1
  217. #define BOARD_G_GPIO_CTRL HPM_GPIO0
  218. #define BOARD_G_GPIO_INDEX GPIO_DI_GPIOF
  219. #define BOARD_G_GPIO_PIN 2
  220. #define BOARD_B_GPIO_CTRL HPM_GPIO0
  221. #define BOARD_B_GPIO_INDEX GPIO_DI_GPIOF
  222. #define BOARD_B_GPIO_PIN 5
  223. #define BOARD_RGB_RED 0
  224. #define BOARD_RGB_GREEN (BOARD_RGB_RED + 1)
  225. #define BOARD_RGB_BLUE (BOARD_RGB_RED + 2)
  226. #define BOARD_LED_GPIO_CTRL BOARD_G_GPIO_CTRL
  227. #define BOARD_LED_GPIO_INDEX BOARD_G_GPIO_INDEX
  228. #define BOARD_LED_GPIO_PIN BOARD_G_GPIO_PIN
  229. #define BOARD_LED_OFF_LEVEL 0
  230. #define BOARD_LED_ON_LEVEL !BOARD_LED_OFF_LEVEL
  231. #define BOARD_LED_TOGGLE_RGB 1
  232. /* Key */
  233. #define BOARD_APP_GPIO_INDEX GPIO_DI_GPIOF
  234. #define BOARD_APP_GPIO_PIN 6
  235. /* ACMP desction */
  236. #define BOARD_ACMP 0
  237. #define BOARD_ACMP_CHANNEL ACMP_CHANNEL_CHN1
  238. #define BOARD_ACMP_IRQ 0
  239. #define BOARD_ACMP_PLUS_INPUT ACMP_INPUT_DAC_OUT /* use internal DAC */
  240. #define BOARD_ACMP_MINUS_INPUT ACMP_INPUT_ANALOG_6 /* align with used pin */
  241. #define BOARD_GWC_BASE HPM_GWC0
  242. #define BOARD_GWC_FUNC_IRQ IRQn_GWCK0_FUNC
  243. #define BOARD_GWC_ERR_IRQ IRQn_GWCK0_ERR
  244. #define BOARD_GWC_PIXEL_WIDTH 1920
  245. #define BOARD_GWC_PIXEL_HEIGHT 1080
  246. /* lcd section */
  247. #define BOARD_LCD_BASE HPM_LCDC
  248. #define BOARD_LCD_IRQ IRQn_LCDC
  249. #define clock_display clock_lcd0
  250. #ifndef BOARD_LCD_WIDTH
  251. #define BOARD_LCD_WIDTH PANEL_SIZE_WIDTH
  252. #endif
  253. #ifndef BOARD_LCD_HEIGHT
  254. #define BOARD_LCD_HEIGHT PANEL_SIZE_HEIGHT
  255. #endif
  256. /* pdma section */
  257. #define BOARD_PDMA_BASE HPM_PDMA
  258. #ifndef IRQn_PDMA_D0
  259. #define IRQn_PDMA_D0 IRQn_PDMA
  260. #endif
  261. #ifndef BOARD_SHOW_CLOCK
  262. #define BOARD_SHOW_CLOCK 1
  263. #endif
  264. #ifndef BOARD_SHOW_BANNER
  265. #define BOARD_SHOW_BANNER 1
  266. #endif
  267. /* USB */
  268. #define BOARD_USB HPM_USB0
  269. /* FreeRTOS Definitions */
  270. #define BOARD_FREERTOS_TIMER HPM_GPTMR2
  271. #define BOARD_FREERTOS_TIMER_CHANNEL 1
  272. #define BOARD_FREERTOS_TIMER_IRQ IRQn_GPTMR2
  273. #define BOARD_FREERTOS_TIMER_CLK_NAME clock_gptmr2
  274. /* Threadx Definitions */
  275. #define BOARD_THREADX_TIMER HPM_GPTMR2
  276. #define BOARD_THREADX_TIMER_CHANNEL 1
  277. #define BOARD_THREADX_TIMER_IRQ IRQn_GPTMR2
  278. #define BOARD_THREADX_TIMER_CLK_NAME clock_gptmr2
  279. /* SDXC section */
  280. #define BOARD_APP_SDCARD_SDXC_BASE (HPM_SDXC1)
  281. #define BOARD_APP_SDCARD_SUPPORT_3V3 (1)
  282. #define BOARD_APP_SDCARD_SUPPORT_1V8 (1)
  283. #define BOARD_APP_SDCARD_SUPPORT_4BIT (1)
  284. #define BOARD_APP_SDCARD_SUPPORT_CARD_DETECTION (1)
  285. #define BOARD_APP_SDCARD_SUPPORT_POWER_SWITCH (1)
  286. #define BOARD_APP_SDCARD_SUPPORT_VOLTAGE_SWITCH (1)
  287. #define BOARD_APP_SDCARD_CARD_DETECTION_USING_GPIO (1)
  288. #define BOARD_APP_SDCARD_POWER_SWITCH_USING_GPIO (1)
  289. #define BOARD_APP_SDCARD_VOLTAGE_SWITCH_USING_GPIO (1)
  290. #if BOARD_APP_SDCARD_CARD_DETECTION_USING_GPIO
  291. #define BOARD_APP_SDCARD_CARD_DETECTION_PIN IOC_PAD_PD05
  292. #define BOARD_APP_SDCARD_CARD_DETECTION_PIN_POL (1) /* pin value 0 means card was detected*/
  293. #endif
  294. #ifdef BOARD_APP_SDCARD_POWER_SWITCH_USING_GPIO
  295. #define BOARD_APP_SDCARD_POWER_SWITCH_PIN IOC_PAD_PD07
  296. #endif
  297. #ifdef BOARD_APP_SDCARD_VOLTAGE_SWITCH_USING_GPIO
  298. #define BOARD_APP_SDCARD_VSEL_PIN IOC_PAD_PD12
  299. #endif
  300. #define BOARD_APP_EMMC_SDXC_BASE (HPM_SDXC0)
  301. #define BOARD_APP_EMMC_SUPPORT_3V3 (0)
  302. #define BOARD_APP_EMMC_SUPPORT_1V8 (1)
  303. #define BOARD_APP_EMMC_SUPPORT_4BIT (1)
  304. #define BOARD_APP_EMMC_SUPPORT_8BIT (1)
  305. #define BOARD_APP_EMMC_SUPPORT_DS (1)
  306. #define BOARD_APP_EMMC_HOST_USING_IRQ (0)
  307. /* enet section */
  308. #define BOARD_ENET_COUNT (1U)
  309. #define BOARD_ENET_PPS HPM_ENET0
  310. #define BOARD_ENET_PPS_IDX enet_pps_0
  311. #define BOARD_ENET_PPS_PTP_CLOCK clock_ptp0
  312. #define BOARD_ENET_RGMII_PHY_ITF enet_inf_rgmii
  313. #define BOARD_ENET_RGMII_RST_GPIO HPM_GPIO0
  314. #define BOARD_ENET_RGMII_RST_GPIO_INDEX GPIO_DO_GPIOD
  315. #define BOARD_ENET_RGMII_RST_GPIO_PIN (18U)
  316. #define BOARD_ENET_RGMII HPM_ENET0
  317. #define BOARD_ENET_RGMII_TX_DLY (0U)
  318. #define BOARD_ENET_RGMII_RX_DLY (0U)
  319. #define BOARD_ENET_RGMII_PTP_CLOCK clock_ptp0
  320. #define BOARD_ENET_RGMII_PPS0_PINOUT (1)
  321. #define BOARD_ENET0_INF (1U) /* 0: RMII, 1: RGMII */
  322. #define BOARD_ENET0_INT_REF_CLK (0U)
  323. #define BOARD_ENET0_PHY_RST_TIME (30)
  324. #if BOARD_ENET0_INF
  325. #define BOARD_ENET0_TX_DLY (0U)
  326. #define BOARD_ENET0_RX_DLY (0U)
  327. #endif
  328. #if __USE_ENET_PTP
  329. #define BOARD_ENET0_PTP_CLOCK (clock_ptp0)
  330. #endif
  331. /* dram section */
  332. #define DDR_TYPE_DDR2 (0U)
  333. #define DDR_TYPE_DDR3L (1U)
  334. #define BOARD_DDR_TYPE DDR_TYPE_DDR3L
  335. #define BOARD_SDRAM_ADDRESS (0x40000000UL)
  336. #if (BOARD_DDR_TYPE == DDR_TYPE_DDR2)
  337. #define BOARD_SDRAM_SIZE (256UL * 1024UL * 1024UL)
  338. #else
  339. #define BOARD_SDRAM_SIZE (512UL * 1024UL * 1024UL)
  340. #endif
  341. /* Tamper Section */
  342. #define BOARD_TAMP_ACTIVE_CH 4
  343. #define BOARD_TAMP_LOW_LEVEL_CH 6
  344. #if defined(__cplusplus)
  345. extern "C" {
  346. #endif /* __cplusplus */
  347. typedef void (*board_timer_cb)(void);
  348. void board_init(void);
  349. void board_init_console(void);
  350. void board_init_uart(UART_Type *ptr);
  351. void board_init_i2c(I2C_Type *ptr);
  352. void board_init_can(MCAN_Type *ptr);
  353. void board_init_gpio_pins(void);
  354. void board_init_spi_pins(SPI_Type *ptr);
  355. void board_init_spi_pins_with_gpio_as_cs(SPI_Type *ptr);
  356. void board_write_spi_cs(uint32_t pin, uint8_t state);
  357. uint8_t board_get_led_gpio_off_level(void);
  358. void board_init_led_pins(void);
  359. void board_disable_output_rgb_led(uint8_t color);
  360. void board_enable_output_rgb_led(uint8_t color);
  361. void board_led_write(uint8_t state);
  362. void board_led_toggle(void);
  363. /* Initialize SoC overall clocks */
  364. void board_init_clock(void);
  365. uint32_t board_init_spi_clock(SPI_Type *ptr);
  366. uint32_t board_init_can_clock(MCAN_Type *ptr);
  367. void board_init_enet_pps_pins(ENET_Type *ptr);
  368. uint8_t board_get_enet_dma_pbl(ENET_Type *ptr);
  369. hpm_stat_t board_reset_enet_phy(ENET_Type *ptr);
  370. hpm_stat_t board_init_enet_pins(ENET_Type *ptr);
  371. hpm_stat_t board_init_enet_rmii_reference_clock(ENET_Type *ptr, bool internal);
  372. hpm_stat_t board_init_enet_rgmii_clock_delay(ENET_Type *ptr);
  373. hpm_stat_t board_init_enet_ptp_clock(ENET_Type *ptr);
  374. hpm_stat_t board_enable_enet_irq(ENET_Type *ptr);
  375. hpm_stat_t board_disable_enet_irq(ENET_Type *ptr);
  376. /*
  377. * @brief Initialize PMP and PMA for but not limited to the following purposes:
  378. * -- non-cacheable memory initialization
  379. */
  380. void board_init_pmp(void);
  381. void board_delay_us(uint32_t us);
  382. void board_delay_ms(uint32_t ms);
  383. void board_timer_create(uint32_t ms, board_timer_cb cb);
  384. void board_ungate_mchtmr_at_lp_mode(void);
  385. /* Initialize the UART clock */
  386. uint32_t board_init_uart_clock(UART_Type *ptr);
  387. void board_lcd_backlight(bool is_on);
  388. void board_init_lcd(void);
  389. void board_panel_para_to_lcdc(lcdc_config_t *config);
  390. void board_init_gwc(void);
  391. void board_init_cap_touch(void);
  392. void board_init_usb_pins(void);
  393. void board_usb_vbus_ctrl(uint8_t usb_index, uint8_t level);
  394. void board_init_sd_pins(SDXC_Type *ptr);
  395. uint32_t board_sd_configure_clock(SDXC_Type *ptr, uint32_t freq, bool need_inverse);
  396. void board_sd_switch_pins_to_1v8(SDXC_Type *ptr);
  397. bool board_sd_detect_card(SDXC_Type *ptr);
  398. uint32_t board_init_dao_clock(void);
  399. uint32_t board_init_pdm_clock(void);
  400. uint32_t board_init_i2s_clock(I2S_Type *ptr);
  401. uint32_t board_config_i2s_clock(I2S_Type *ptr, uint32_t sample_rate);
  402. void board_init_adc16_pins(void);
  403. uint32_t board_init_adc16_clock(ADC16_Type *ptr, bool clk_src_ahb);
  404. void board_init_cam_pins(void);
  405. void board_write_cam_rst(uint8_t state);
  406. void board_write_cam_pwdn(uint8_t state);
  407. uint32_t board_init_cam_clock(CAM_Type *ptr);
  408. void board_init_mipi_csi_cam_pins(void);
  409. void board_write_mipi_csi_cam_rst(uint8_t state);
  410. uint32_t board_init_gptmr_clock(GPTMR_Type *ptr);
  411. void board_sd_power_switch(SDXC_Type *ptr, bool on_off);
  412. #if defined(__cplusplus)
  413. }
  414. #endif /* __cplusplus */
  415. #endif /* _HPM_BOARD_H */