flash_rtt.ld 8.0 KB

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  1. /*
  2. * Copyright 2021-2024 HPMicro
  3. * SPDX-License-Identifier: BSD-3-Clause
  4. */
  5. ENTRY(_start)
  6. STACK_SIZE = DEFINED(_stack_size) ? _stack_size : 0x4000;
  7. HEAP_SIZE = DEFINED(_heap_size) ? _heap_size : 128K;
  8. FLASH_SIZE = DEFINED(_flash_size) ? _flash_size : 16M;
  9. NONCACHEABLE_SIZE = DEFINED(_noncacheable_size) ? _noncacheable_size : 512K;
  10. MEMORY
  11. {
  12. XPI0 (rx) : ORIGIN = 0x80000000, LENGTH = FLASH_SIZE
  13. ILM (wx) : ORIGIN = 0, LENGTH = 256K
  14. DLM (w) : ORIGIN = 0x00200000, LENGTH = 256K
  15. AXI_SRAM (wx) : ORIGIN = 0x01200000, LENGTH = 512K
  16. NONCACHEABLE_RAM (wx) : ORIGIN = 0x01280000, LENGTH = NONCACHEABLE_SIZE
  17. AHB_SRAM (w): ORIGIN = 0xF0200000, LENGTH = 32k
  18. }
  19. __nor_cfg_option_load_addr__ = ORIGIN(XPI0) + 0x400;
  20. __boot_header_load_addr__ = ORIGIN(XPI0) + 0x1000;
  21. __app_load_addr__ = ORIGIN(XPI0) + 0x3000;
  22. __boot_header_length__ = __boot_header_end__ - __boot_header_start__;
  23. __app_offset__ = __app_load_addr__ - __boot_header_load_addr__;
  24. SECTIONS
  25. {
  26. .nor_cfg_option __nor_cfg_option_load_addr__ : {
  27. KEEP(*(.nor_cfg_option))
  28. } > XPI0
  29. .boot_header __boot_header_load_addr__ : {
  30. __boot_header_start__ = .;
  31. KEEP(*(.boot_header))
  32. KEEP(*(.fw_info_table))
  33. KEEP(*(.dc_info))
  34. __boot_header_end__ = .;
  35. } > XPI0
  36. .start __app_load_addr__ : {
  37. . = ALIGN(8);
  38. KEEP(*(.start))
  39. } > XPI0
  40. __vector_load_addr__ = ADDR(.start) + SIZEOF(.start);
  41. .vectors : AT(__vector_load_addr__) {
  42. . = ALIGN(8);
  43. __vector_ram_start__ = .;
  44. KEEP(*(.vector_table))
  45. KEEP(*(.isr_vector))
  46. . = ALIGN(8);
  47. __vector_ram_end__ = .;
  48. } > ILM
  49. .fast : AT(etext + __data_end__ - __tdata_start__) {
  50. . = ALIGN(8);
  51. __ramfunc_start__ = .;
  52. *(.fast)
  53. /* RT-Thread Core Start */
  54. KEEP(*context_gcc.o(.text* .rodata*))
  55. KEEP(*port*.o (.text .text* .rodata .rodata*))
  56. KEEP(*interrupt_gcc.o (.text .text* .rodata .rodata*))
  57. KEEP(*trap_common.o (.text .text* .rodata .rodata*))
  58. KEEP(*irq.o (.text .text* .rodata .rodata*))
  59. KEEP(*clock.o (.text .text* .rodata .rodata*))
  60. KEEP(*kservice.o (.text .text* .rodata .rodata*))
  61. KEEP(*scheduler.o (.text .text* .rodata .rodata*))
  62. KEEP(*trap*.o (.text .text* .rodata .rodata*))
  63. KEEP(*idle.o (.text .text* .rodata .rodata*))
  64. KEEP(*ipc.o (.text .text* .rodata .rodata*))
  65. KEEP(*thread.o (.text .text* .rodata .rodata*))
  66. KEEP(*object.o (.text .text* .rodata .rodata*))
  67. KEEP(*timer.o (.text .text* .rodata .rodata*))
  68. KEEP(*mem.o (.text .text* .rodata .rodata*))
  69. KEEP(*mempool.o (.text .text* .rodata .rodata*))
  70. /* RT-Thread Core End */
  71. /* HPMicro Driver Wrapper */
  72. KEEP(*drv_*.o (.text .text* .rodata .rodata*))
  73. . = ALIGN(8);
  74. __ramfunc_end__ = .;
  75. } > ILM
  76. .text (__vector_load_addr__ + __vector_ram_end__ - __vector_ram_start__) : {
  77. . = ALIGN(8);
  78. *(.text)
  79. *(.text*)
  80. *(.rodata)
  81. *(.rodata*)
  82. *(.srodata)
  83. *(.srodata*)
  84. *(.hash)
  85. *(.dyn*)
  86. *(.gnu*)
  87. *(.pl*)
  88. KEEP(*(.eh_frame))
  89. *(.eh_frame*)
  90. KEEP (*(.init))
  91. KEEP (*(.fini))
  92. . = ALIGN(8);
  93. /*********************************************
  94. *
  95. * RT-Thread related sections - Start
  96. *
  97. *********************************************/
  98. /* section information for utest */
  99. . = ALIGN(4);
  100. __rt_utest_tc_tab_start = .;
  101. KEEP(*(UtestTcTab))
  102. __rt_utest_tc_tab_end = .;
  103. /* section information for finsh shell */
  104. . = ALIGN(4);
  105. __fsymtab_start = .;
  106. KEEP(*(FSymTab))
  107. __fsymtab_end = .;
  108. . = ALIGN(4);
  109. __vsymtab_start = .;
  110. KEEP(*(VSymTab))
  111. __vsymtab_end = .;
  112. . = ALIGN(4);
  113. . = ALIGN(4);
  114. __rt_init_start = .;
  115. KEEP(*(SORT(.rti_fn*)))
  116. __rt_init_end = .;
  117. . = ALIGN(4);
  118. /* section information for modules */
  119. . = ALIGN(4);
  120. __rtmsymtab_start = .;
  121. KEEP(*(RTMSymTab))
  122. __rtmsymtab_end = .;
  123. /* RT-Thread related sections - end */
  124. /* section information for usbh class */
  125. . = ALIGN(8);
  126. __usbh_class_info_start__ = .;
  127. KEEP(*(.usbh_class_info))
  128. __usbh_class_info_end__ = .;
  129. } > XPI0
  130. .rel : {
  131. KEEP(*(.rel*))
  132. } > XPI0
  133. PROVIDE (__etext = .);
  134. PROVIDE (_etext = .);
  135. PROVIDE (etext = .);
  136. .fast_ram (NOLOAD) : {
  137. KEEP(*(.fast_ram))
  138. } > DLM
  139. .bss(NOLOAD) : {
  140. . = ALIGN(8);
  141. __bss_start__ = .;
  142. *(.bss)
  143. *(.bss*)
  144. *(.sbss*)
  145. *(.scommon)
  146. *(.scommon*)
  147. *(.dynsbss*)
  148. *(COMMON)
  149. . = ALIGN(8);
  150. _end = .;
  151. __bss_end__ = .;
  152. } > AXI_SRAM
  153. /* Note: the .tbss and .tdata section should be adjacent */
  154. .tbss(NOLOAD) : {
  155. . = ALIGN(8);
  156. __tbss_start__ = .;
  157. *(.tbss*)
  158. *(.tcommon*)
  159. _end = .;
  160. __tbss_end__ = .;
  161. } > AXI_SRAM
  162. .tdata : AT(etext) {
  163. . = ALIGN(8);
  164. __tdata_start__ = .;
  165. __thread_pointer = .;
  166. *(.tdata)
  167. *(.tdata*)
  168. . = ALIGN(8);
  169. __tdata_end__ = .;
  170. } > AXI_SRAM
  171. .data : AT(etext + __tdata_end__ - __tdata_start__) {
  172. . = ALIGN(8);
  173. __data_start__ = .;
  174. __global_pointer$ = . + 0x800;
  175. *(.data)
  176. *(.data*)
  177. *(.sdata)
  178. *(.sdata*)
  179. KEEP(*(.jcr))
  180. KEEP(*(.dynamic))
  181. KEEP(*(.got*))
  182. KEEP(*(.got))
  183. KEEP(*(.gcc_except_table))
  184. KEEP(*(.gcc_except_table.*))
  185. . = ALIGN(8);
  186. PROVIDE(__preinit_array_start = .);
  187. KEEP(*(.preinit_array))
  188. PROVIDE(__preinit_array_end = .);
  189. . = ALIGN(8);
  190. PROVIDE(__init_array_start = .);
  191. KEEP(*(SORT_BY_INIT_PRIORITY(.init_array.*)))
  192. KEEP(*(.init_array))
  193. PROVIDE(__init_array_end = .);
  194. . = ALIGN(8);
  195. PROVIDE(__finit_array_start = .);
  196. KEEP(*(SORT_BY_INIT_PRIORITY(.finit_array.*)))
  197. KEEP(*(.finit_array))
  198. PROVIDE(__finit_array_end = .);
  199. . = ALIGN(8);
  200. PROVIDE(__ctors_start__ = .);
  201. KEEP(*crtbegin*.o(.ctors))
  202. KEEP(*(EXCLUDE_FILE (*crtend*.o) .ctors))
  203. KEEP(*(SORT(.ctors.*)))
  204. KEEP(*(.ctors))
  205. PROVIDE(__ctors_end__ = .);
  206. . = ALIGN(8);
  207. KEEP(*crtbegin*.o(.dtors))
  208. KEEP(*(EXCLUDE_FILE (*crtend*.o) .dtors))
  209. KEEP(*(SORT(.dtors.*)))
  210. KEEP(*(.dtors))
  211. . = ALIGN(8);
  212. __data_end__ = .;
  213. PROVIDE (__edata = .);
  214. PROVIDE (_edata = .);
  215. PROVIDE (edata = .);
  216. } > AXI_SRAM
  217. __fw_size__ = __data_end__ - __tdata_start__ + etext - __app_load_addr__;
  218. .heap(NOLOAD) : {
  219. . = ALIGN(8);
  220. __heap_start__ = .;
  221. . += HEAP_SIZE;
  222. __heap_end__ = .;
  223. } > AXI_SRAM
  224. .framebuffer (NOLOAD) : {
  225. . = ALIGN(8);
  226. KEEP(*(.framebuffer))
  227. . = ALIGN(8);
  228. } > AXI_SRAM
  229. .stack(NOLOAD) : {
  230. . = ALIGN(8);
  231. __stack_base__ = .;
  232. . += STACK_SIZE;
  233. . = ALIGN(8);
  234. PROVIDE (_stack = .);
  235. PROVIDE (_stack_in_dlm = .);
  236. PROVIDE( __rt_rvstack = . );
  237. } > AXI_SRAM
  238. .noncacheable.init : AT(etext + __data_end__ - __tdata_start__ + __ramfunc_end__ - __ramfunc_start__) {
  239. . = ALIGN(8);
  240. __noncacheable_init_start__ = .;
  241. KEEP(*(.noncacheable.init))
  242. __noncacheable_init_end__ = .;
  243. . = ALIGN(8);
  244. } > NONCACHEABLE_RAM
  245. .noncacheable.bss (NOLOAD) : {
  246. . = ALIGN(8);
  247. KEEP(*(.noncacheable))
  248. __noncacheable_bss_start__ = .;
  249. KEEP(*(.noncacheable.bss))
  250. __noncacheable_bss_end__ = .;
  251. . = ALIGN(8);
  252. } > NONCACHEABLE_RAM
  253. .ahb_sram (NOLOAD) : {
  254. KEEP(*(.ahb_sram))
  255. } > AHB_SRAM
  256. __noncacheable_start__ = ORIGIN(NONCACHEABLE_RAM);
  257. __noncacheable_end__ = ORIGIN(NONCACHEABLE_RAM) + LENGTH(NONCACHEABLE_RAM);
  258. }