flash_rtt_enet.ld 9.0 KB

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  1. /*
  2. * Copyright 2021-2024 HPMicro
  3. * SPDX-License-Identifier: BSD-3-Clause
  4. */
  5. ENTRY(_start)
  6. STACK_SIZE = DEFINED(_stack_size) ? _stack_size : 0x4000;
  7. HEAP_SIZE = DEFINED(_heap_size) ? _heap_size : 128K;
  8. FLASH_SIZE = DEFINED(_flash_size) ? _flash_size : 16M;
  9. NONCACHEABLE_SIZE = DEFINED(_noncacheable_size) ? _noncacheable_size : 512K;
  10. MEMORY
  11. {
  12. XPI0 (rx) : ORIGIN = 0x80000000, LENGTH = FLASH_SIZE
  13. ILM (wx) : ORIGIN = 0, LENGTH = 256K
  14. DLM (w) : ORIGIN = 0x00200000, LENGTH = 256K
  15. AXI_SRAM (wx) : ORIGIN = 0x01200000, LENGTH = 512K
  16. NONCACHEABLE_RAM (wx) : ORIGIN = 0x01280000, LENGTH = NONCACHEABLE_SIZE
  17. AHB_SRAM (w): ORIGIN = 0xF0200000, LENGTH = 32k
  18. }
  19. __nor_cfg_option_load_addr__ = ORIGIN(XPI0) + 0x400;
  20. __boot_header_load_addr__ = ORIGIN(XPI0) + 0x1000;
  21. __app_load_addr__ = ORIGIN(XPI0) + 0x3000;
  22. __boot_header_length__ = __boot_header_end__ - __boot_header_start__;
  23. __app_offset__ = __app_load_addr__ - __boot_header_load_addr__;
  24. SECTIONS
  25. {
  26. .nor_cfg_option __nor_cfg_option_load_addr__ : {
  27. KEEP(*(.nor_cfg_option))
  28. } > XPI0
  29. .boot_header __boot_header_load_addr__ : {
  30. __boot_header_start__ = .;
  31. KEEP(*(.boot_header))
  32. KEEP(*(.fw_info_table))
  33. KEEP(*(.dc_info))
  34. __boot_header_end__ = .;
  35. } > XPI0
  36. .start __app_load_addr__ : {
  37. . = ALIGN(8);
  38. KEEP(*(.start))
  39. } > XPI0
  40. __vector_load_addr__ = ADDR(.start) + SIZEOF(.start);
  41. .vectors : AT(__vector_load_addr__) {
  42. . = ALIGN(8);
  43. __vector_ram_start__ = .;
  44. KEEP(*(.vector_table))
  45. KEEP(*(.isr_vector))
  46. . = ALIGN(8);
  47. __vector_ram_end__ = .;
  48. } > ILM
  49. .fast : AT(etext + __data_end__ - __tdata_start__) {
  50. . = ALIGN(8);
  51. __ramfunc_start__ = .;
  52. *(.fast)
  53. /* RT-Thread Core Start */
  54. KEEP(*context_gcc.o(.text* .rodata*))
  55. KEEP(*port*.o (.text .text* .rodata .rodata*))
  56. KEEP(*interrupt_gcc.o (.text .text* .rodata .rodata*))
  57. KEEP(*trap_common.o (.text .text* .rodata .rodata*))
  58. KEEP(*irq.o (.text .text* .rodata .rodata*))
  59. KEEP(*clock.o (.text .text* .rodata .rodata*))
  60. KEEP(*kservice.o (.text .text* .rodata .rodata*))
  61. KEEP(*scheduler*.o (.text .text* .rodata .rodata*))
  62. KEEP(*trap*.o (.text .text* .rodata .rodata*))
  63. KEEP(*idle.o (.text .text* .rodata .rodata*))
  64. KEEP(*ipc.o (.text .text* .rodata .rodata*))
  65. KEEP(*slab.o (.text .text* .rodata .rodata*))
  66. KEEP(*thread.o (.text .text* .rodata .rodata*))
  67. KEEP(*object.o (.text .text* .rodata .rodata*))
  68. KEEP(*timer.o (.text .text* .rodata .rodata*))
  69. KEEP(*mem.o (.text .text* .rodata .rodata*))
  70. KEEP(*memheap.o (.text .text* .rodata .rodata*))
  71. KEEP(*mempool.o (.text .text* .rodata .rodata*))
  72. /* RT-Thread Core End */
  73. /* HPMicro Driver Wrapper */
  74. KEEP(*drv_*.o (.text .text* .rodata .rodata*))
  75. KEEP(*api_lib*.o (.text .text* .rodata .rodata*))
  76. KEEP(*api_msg*.o (.text .text* .rodata .rodata*))
  77. KEEP(*if_api*.o (.text .text* .rodata .rodata*))
  78. KEEP(*netbuf*.o (.text .text* .rodata .rodata*))
  79. KEEP(*netdb*.o (.text .text* .rodata .rodata*))
  80. KEEP(*netifapi*.o (.text .text* .rodata .rodata*))
  81. KEEP(*sockets*.o (.text .text* .rodata .rodata*))
  82. KEEP(*tcpip*.o (.text .text* .rodata .rodata*))
  83. KEEP(*inet_chksum*.o (.text .text* .rodata .rodata*))
  84. KEEP(*ip*.o (.text .text* .rodata .rodata*))
  85. KEEP(*memp*.o (.text .text* .rodata .rodata*))
  86. KEEP(*netif*.o (.text .text* .rodata .rodata*))
  87. KEEP(*pbuf*.o (.text .text* .rodata .rodata*))
  88. KEEP(*tcp_in*.o (.text .text* .rodata .rodata*))
  89. KEEP(*tcp_out*.o (.text .text* .rodata .rodata*))
  90. KEEP(*tcp*.o (.text .text* .rodata .rodata*))
  91. KEEP(*ethernet*.o (.text .text* .rodata .rodata*))
  92. KEEP(*ethernetif*.o (.text .text* .rodata .rodata*))
  93. . = ALIGN(8);
  94. __ramfunc_end__ = .;
  95. } > ILM
  96. .fast_ram (NOLOAD) : {
  97. KEEP(*(.fast_ram))
  98. } > DLM
  99. .text (__vector_load_addr__ + __vector_ram_end__ - __vector_ram_start__) : {
  100. . = ALIGN(8);
  101. *(.text)
  102. *(.text*)
  103. *(.rodata)
  104. *(.rodata*)
  105. *(.srodata)
  106. *(.srodata*)
  107. *(.hash)
  108. *(.dyn*)
  109. *(.gnu*)
  110. *(.pl*)
  111. KEEP(*(.eh_frame))
  112. *(.eh_frame*)
  113. KEEP (*(.init))
  114. KEEP (*(.fini))
  115. . = ALIGN(8);
  116. /*********************************************
  117. *
  118. * RT-Thread related sections - Start
  119. *
  120. *********************************************/
  121. /* section information for finsh shell */
  122. . = ALIGN(4);
  123. __fsymtab_start = .;
  124. KEEP(*(FSymTab))
  125. __fsymtab_end = .;
  126. . = ALIGN(4);
  127. __vsymtab_start = .;
  128. KEEP(*(VSymTab))
  129. __vsymtab_end = .;
  130. . = ALIGN(4);
  131. . = ALIGN(4);
  132. __rt_init_start = .;
  133. KEEP(*(SORT(.rti_fn*)))
  134. __rt_init_end = .;
  135. . = ALIGN(4);
  136. /* section information for modules */
  137. . = ALIGN(4);
  138. __rtmsymtab_start = .;
  139. KEEP(*(RTMSymTab))
  140. __rtmsymtab_end = .;
  141. /* RT-Thread related sections - end */
  142. /* section information for usbh class */
  143. . = ALIGN(8);
  144. __usbh_class_info_start__ = .;
  145. KEEP(*(.usbh_class_info))
  146. __usbh_class_info_end__ = .;
  147. } > XPI0
  148. .rel : {
  149. KEEP(*(.rel*))
  150. } > XPI0
  151. PROVIDE (__etext = .);
  152. PROVIDE (_etext = .);
  153. PROVIDE (etext = .);
  154. .bss(NOLOAD) : {
  155. . = ALIGN(8);
  156. __bss_start__ = .;
  157. *(.bss)
  158. *(.bss*)
  159. *(.sbss*)
  160. *(.scommon)
  161. *(.scommon*)
  162. *(.dynsbss*)
  163. *(COMMON)
  164. . = ALIGN(8);
  165. _end = .;
  166. __bss_end__ = .;
  167. } > AXI_SRAM
  168. /* Note: the .tbss and .tdata section should be adjacent */
  169. .tbss(NOLOAD) : {
  170. . = ALIGN(8);
  171. __tbss_start__ = .;
  172. *(.tbss*)
  173. *(.tcommon*)
  174. _end = .;
  175. __tbss_end__ = .;
  176. } > AXI_SRAM
  177. .tdata : AT(etext) {
  178. . = ALIGN(8);
  179. __tdata_start__ = .;
  180. __thread_pointer = .;
  181. *(.tdata)
  182. *(.tdata*)
  183. . = ALIGN(8);
  184. __tdata_end__ = .;
  185. } > AXI_SRAM
  186. .data : AT(etext + __tdata_end__ - __tdata_start__) {
  187. . = ALIGN(8);
  188. __data_start__ = .;
  189. __global_pointer$ = . + 0x800;
  190. *(.data)
  191. *(.data*)
  192. *(.sdata)
  193. *(.sdata*)
  194. KEEP(*(.jcr))
  195. KEEP(*(.dynamic))
  196. KEEP(*(.got*))
  197. KEEP(*(.got))
  198. KEEP(*(.gcc_except_table))
  199. KEEP(*(.gcc_except_table.*))
  200. . = ALIGN(8);
  201. PROVIDE(__preinit_array_start = .);
  202. KEEP(*(.preinit_array))
  203. PROVIDE(__preinit_array_end = .);
  204. . = ALIGN(8);
  205. PROVIDE(__init_array_start = .);
  206. KEEP(*(SORT_BY_INIT_PRIORITY(.init_array.*)))
  207. KEEP(*(.init_array))
  208. PROVIDE(__init_array_end = .);
  209. . = ALIGN(8);
  210. PROVIDE(__finit_array_start = .);
  211. KEEP(*(SORT_BY_INIT_PRIORITY(.finit_array.*)))
  212. KEEP(*(.finit_array))
  213. PROVIDE(__finit_array_end = .);
  214. . = ALIGN(8);
  215. PROVIDE(__ctors_start__ = .);
  216. KEEP(*crtbegin*.o(.ctors))
  217. KEEP(*(EXCLUDE_FILE (*crtend*.o) .ctors))
  218. KEEP(*(SORT(.ctors.*)))
  219. KEEP(*(.ctors))
  220. PROVIDE(__ctors_end__ = .);
  221. . = ALIGN(8);
  222. KEEP(*crtbegin*.o(.dtors))
  223. KEEP(*(EXCLUDE_FILE (*crtend*.o) .dtors))
  224. KEEP(*(SORT(.dtors.*)))
  225. KEEP(*(.dtors))
  226. . = ALIGN(8);
  227. __data_end__ = .;
  228. PROVIDE (__edata = .);
  229. PROVIDE (_edata = .);
  230. PROVIDE (edata = .);
  231. } > AXI_SRAM
  232. __fw_size__ = __data_end__ - __tdata_start__ + etext - __app_load_addr__;
  233. .heap(NOLOAD) : {
  234. . = ALIGN(8);
  235. __heap_start__ = .;
  236. . += HEAP_SIZE;
  237. __heap_end__ = .;
  238. } > AXI_SRAM
  239. .framebuffer (NOLOAD) : {
  240. . = ALIGN(8);
  241. KEEP(*(.framebuffer))
  242. . = ALIGN(8);
  243. } > AXI_SRAM
  244. .stack(NOLOAD) : {
  245. . = ALIGN(8);
  246. __stack_base__ = .;
  247. . += STACK_SIZE;
  248. . = ALIGN(8);
  249. PROVIDE (_stack = .);
  250. PROVIDE (_stack_in_dlm = .);
  251. PROVIDE( __rt_rvstack = . );
  252. } > AXI_SRAM
  253. .noncacheable.init : AT(etext + __data_end__ - __tdata_start__ + __ramfunc_end__ - __ramfunc_start__) {
  254. . = ALIGN(8);
  255. __noncacheable_init_start__ = .;
  256. KEEP(*(.noncacheable.init))
  257. __noncacheable_init_end__ = .;
  258. . = ALIGN(8);
  259. } > NONCACHEABLE_RAM
  260. .noncacheable.bss (NOLOAD) : {
  261. . = ALIGN(8);
  262. KEEP(*(.noncacheable))
  263. __noncacheable_bss_start__ = .;
  264. KEEP(*(.noncacheable.bss))
  265. __noncacheable_bss_end__ = .;
  266. . = ALIGN(8);
  267. } > NONCACHEABLE_RAM
  268. .ahb_sram (NOLOAD) : {
  269. KEEP(*(.ahb_sram))
  270. } > AHB_SRAM
  271. __noncacheable_start__ = ORIGIN(NONCACHEABLE_RAM);
  272. __noncacheable_end__ = ORIGIN(NONCACHEABLE_RAM) + LENGTH(NONCACHEABLE_RAM);
  273. }