usb_glue_sifli.c 4.6 KB

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  1. /*
  2. * Copyright (c) 2025, sakumisu
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. */
  6. #include "usbd_core.h"
  7. #include "usbh_core.h"
  8. #include "usb_musb_reg.h"
  9. #undef USB_POWER_SOFTCONN
  10. #undef USB_DEVCTL_FSDEV
  11. #undef USB_DEVCTL_LSDEV
  12. #undef USB_DEVCTL_SESSION
  13. #undef USB_POWER_HSENAB
  14. #undef USB_POWER_HSMODE
  15. #undef USB_POWER_RESET
  16. #undef USB_POWER_RESUME
  17. #ifndef CONFIG_USB_MUSB_SIFLI
  18. #error must define CONFIG_USB_MUSB_SIFLI when use sunxi chips
  19. #endif
  20. #include "bf0_hal.h"
  21. uint8_t usbd_get_musb_fifo_cfg(struct musb_fifo_cfg **cfg)
  22. {
  23. *cfg = NULL; // No FIFO configuration for this implementation, readonly
  24. return 0;
  25. }
  26. uint8_t usbh_get_musb_fifo_cfg(struct musb_fifo_cfg **cfg)
  27. {
  28. *cfg = NULL; // No FIFO configuration for this implementation, readonly
  29. return 0;
  30. }
  31. uint32_t usb_get_musb_ram_size(void)
  32. {
  33. return 0xFFFF; // No specific RAM size for this implementation
  34. }
  35. void usbd_musb_delay_ms(uint8_t ms)
  36. {
  37. /* implement later */
  38. }
  39. #ifdef PKG_CHERRYUSB_DEVICE
  40. void usb_dc_low_level_init(uint8_t busid)
  41. {
  42. HAL_RCC_EnableModule(RCC_MOD_USBC);
  43. #ifdef SOC_SF32LB58X
  44. //hwp_usbc->utmicfg12 = hwp_usbc->utmicfg12 | 0x3; //set xo_clk_sel
  45. hwp_usbc->ldo25 = hwp_usbc->ldo25 | 0xa; //set psw_en and ldo25_en
  46. HAL_Delay(1);
  47. hwp_usbc->swcntl3 = 0x1; //set utmi_en for USB2.0
  48. hwp_usbc->usbcfg = hwp_usbc->usbcfg | 0x40; //enable usb PLL.
  49. #elif defined(SOC_SF32LB56X) || defined(SOC_SF32LB52X)
  50. hwp_hpsys_cfg->USBCR |= HPSYS_CFG_USBCR_DM_PD | HPSYS_CFG_USBCR_DP_EN | HPSYS_CFG_USBCR_USB_EN;
  51. #elif defined(SOC_SF32LB55X)
  52. hwp_hpsys_cfg->USBCR |= HPSYS_CFG_USBCR_DM_PD | HPSYS_CFG_USBCR_USB_EN;
  53. #endif
  54. #ifndef SOC_SF32LB55X
  55. hwp_usbc->usbcfg |= (USB_USBCFG_AVALID | USB_USBCFG_AVALID_DR);
  56. hwp_usbc->dpbrxdisl = 0xFE;
  57. hwp_usbc->dpbtxdisl = 0xFE;
  58. #endif
  59. NVIC_EnableIRQ(USBC_IRQn);
  60. __HAL_SYSCFG_Enable_USB();
  61. }
  62. void usb_dc_low_level_deinit(uint8_t busid)
  63. {
  64. NVIC_DisableIRQ(USBC_IRQn);
  65. #ifdef SOC_SF32LB58X
  66. hwp_usbc->usbcfg &= ~0x40; // Disable usb PLL.
  67. hwp_usbc->swcntl3 = 0x0;
  68. hwp_usbc->ldo25 &= ~0xa; // Disable psw_en and ldo25_en
  69. #elif defined(SOC_SF32LB56X) || defined(SOC_SF32LB52X)
  70. hwp_hpsys_cfg->USBCR &= ~(HPSYS_CFG_USBCR_DM_PD | HPSYS_CFG_USBCR_DP_EN | HPSYS_CFG_USBCR_USB_EN);
  71. #elif defined(SOC_SF32LB55X)
  72. hwp_hpsys_cfg->USBCR &= ~(HPSYS_CFG_USBCR_DM_PD | HPSYS_CFG_USBCR_USB_EN);
  73. #endif
  74. /* reset USB to make DP change to PULLDOWN state */
  75. hwp_hpsys_rcc->RSTR2 |= HPSYS_RCC_RSTR2_USBC;
  76. HAL_Delay_us(100);
  77. hwp_hpsys_rcc->RSTR2 &= ~HPSYS_RCC_RSTR2_USBC;
  78. HAL_RCC_DisableModule(RCC_MOD_USBC);
  79. }
  80. #endif
  81. #ifdef PKG_CHERRYUSB_HOST
  82. void usb_hc_low_level_init(struct usbh_bus *bus)
  83. {
  84. HAL_RCC_EnableModule(RCC_MOD_USBC);
  85. #ifdef SOC_SF32LB58X
  86. //hwp_usbc->utmicfg12 = hwp_usbc->utmicfg12 | 0x3; //set xo_clk_sel
  87. hwp_usbc->ldo25 = hwp_usbc->ldo25 | 0xa; //set psw_en and ldo25_en
  88. HAL_Delay(1);
  89. hwp_usbc->swcntl3 = 0x1; //set utmi_en for USB2.0
  90. hwp_usbc->usbcfg = hwp_usbc->usbcfg | 0x40; //enable usb PLL.
  91. #elif defined(SOC_SF32LB56X) || defined(SOC_SF32LB52X)
  92. hwp_hpsys_cfg->USBCR |= HPSYS_CFG_USBCR_DM_PD | HPSYS_CFG_USBCR_DP_EN | HPSYS_CFG_USBCR_USB_EN;
  93. #elif defined(SOC_SF32LB55X)
  94. hwp_hpsys_cfg->USBCR |= HPSYS_CFG_USBCR_DM_PD | HPSYS_CFG_USBCR_USB_EN;
  95. #endif
  96. #ifndef SOC_SF32LB55X
  97. hwp_usbc->usbcfg |= (USB_USBCFG_AVALID | USB_USBCFG_AVALID_DR);
  98. hwp_usbc->dpbrxdisl = 0xFE;
  99. hwp_usbc->dpbtxdisl = 0xFE;
  100. #endif
  101. __HAL_SYSCFG_Enable_USB();
  102. hwp_usbc->usbcfg &= 0xEF;
  103. hwp_usbc->dbgl = 0x80;
  104. NVIC_EnableIRQ(USBC_IRQn);
  105. }
  106. void usb_hc_low_level_deinit(struct usbh_bus *bus)
  107. {
  108. NVIC_DisableIRQ(USBC_IRQn);
  109. #ifdef SOC_SF32LB58X
  110. hwp_usbc->usbcfg &= ~0x40; // Disable usb PLL.
  111. hwp_usbc->swcntl3 = 0x0;
  112. hwp_usbc->ldo25 &= ~0xa; // Disable psw_en and ldo25_en
  113. #elif defined(SOC_SF32LB56X) || defined(SOC_SF32LB52X)
  114. hwp_hpsys_cfg->USBCR &= ~(HPSYS_CFG_USBCR_DM_PD | HPSYS_CFG_USBCR_DP_EN | HPSYS_CFG_USBCR_USB_EN);
  115. #elif defined(SOC_SF32LB55X)
  116. hwp_hpsys_cfg->USBCR &= ~(HPSYS_CFG_USBCR_DM_PD | HPSYS_CFG_USBCR_USB_EN);
  117. #endif
  118. /* reset USB to make DP change to PULLDOWN state */
  119. hwp_hpsys_rcc->RSTR2 |= HPSYS_RCC_RSTR2_USBC;
  120. HAL_Delay_us(100);
  121. hwp_hpsys_rcc->RSTR2 &= ~HPSYS_RCC_RSTR2_USBC;
  122. HAL_RCC_DisableModule(RCC_MOD_USBC);
  123. }
  124. void musb_reset_prev(void)
  125. {
  126. #if defined(SF32LB58X)
  127. hwp_usbc->rsvd0 = 0xc; //58
  128. #endif
  129. }
  130. void musb_reset_post(void)
  131. {
  132. #if defined(SF32LB58X)
  133. hwp_usbc->rsvd0 = 0x0; //58
  134. #endif
  135. }
  136. #endif
  137. void USBC_IRQHandler(void)
  138. {
  139. #ifdef PKG_CHERRYUSB_DEVICE
  140. USBD_IRQHandler(0);
  141. #endif
  142. #ifdef PKG_CHERRYUSB_HOST
  143. USBH_IRQHandler(0);
  144. #endif
  145. }