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cpuport.c 1.4 KB

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  1. /*
  2. * Copyright (c) 2006-2021, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2024-06-21 Zhangyan first version
  9. */
  10. #include <rthw.h>
  11. #include <rtthread.h>
  12. #include <board.h>
  13. #ifdef RT_USING_CPU_FFS
  14. /**
  15. * This function finds the first bit set (beginning with the least significant bit)
  16. * in value and return the index of that bit.
  17. *
  18. * Bits are numbered starting at 1 (the least significant bit). A return value of
  19. * zero from any of these functions means that the argument was zero.
  20. *
  21. * @return return the index of the first bit set. If value is 0, then this function
  22. * shall return 0.
  23. */
  24. int __rt_ffs(int value)
  25. {
  26. #ifdef __GNUC__
  27. return __builtin_ffs(value);
  28. #else
  29. __asm__ volatile (
  30. "rbit w1, %w0\n"
  31. "cmp %w0, 0\n"
  32. "clz w1, w1\n"
  33. "csinc %w0, wzr, w1, eq\n"
  34. : "=r"(value)
  35. : "0"(value)
  36. );
  37. return value;
  38. #endif
  39. }
  40. unsigned long __rt_ffsl(unsigned long value)
  41. {
  42. #ifdef __GNUC__
  43. return __builtin_ffsl(value);
  44. #else
  45. if (!value)
  46. {
  47. return 0;
  48. }
  49. __asm__ volatile ("rbit %0, %0" : "+r" (value));
  50. return __rt_clz(value);
  51. #endif
  52. }
  53. unsigned long __rt_clz(unsigned long value)
  54. {
  55. #ifdef __GNUC__
  56. return __builtin_clz(value);
  57. #else
  58. unsigned long val;
  59. __asm__ volatile ("clz %0, %1"
  60. :"=r"(val)
  61. :"r"(value));
  62. return val;
  63. #endif
  64. }
  65. #endif /* RT_USING_CPU_FFS */