context_gcc.h 1.9 KB

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  1. /*
  2. * Copyright (c) 2006-2024, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2024-03-25 Shell Trimming unecessary ops and
  9. * improve the performance of ctx switch
  10. */
  11. #ifndef __ARM64_CONTEXT_H__
  12. #define __ARM64_CONTEXT_H__
  13. #include "../include/context_gcc.h"
  14. #include <rtconfig.h>
  15. #include <asm-generic.h>
  16. #include <asm-fpu.h>
  17. #include <armv8.h>
  18. /* restore address space */
  19. .macro RESTORE_ADDRESS_SPACE
  20. #ifdef RT_USING_SMART
  21. bl rt_thread_self
  22. mov x19, x0
  23. bl lwp_aspace_switch
  24. mov x0, x19
  25. bl lwp_user_setting_restore
  26. #endif
  27. .endm
  28. .macro RESTORE_CONTEXT_SWITCH using_sp
  29. /* Set the SP to point to the stack of the task being restored. */
  30. mov sp, \using_sp
  31. RESTORE_ADDRESS_SPACE
  32. _RESTORE_CONTEXT_SWITCH
  33. .endm
  34. .macro RESTORE_IRQ_CONTEXT
  35. #ifdef RT_USING_SMART
  36. BL rt_thread_self
  37. MOV X19, X0
  38. BL lwp_aspace_switch
  39. MOV X0, X19
  40. BL lwp_user_setting_restore
  41. #endif
  42. LDP X2, X3, [SP], #0x10 /* SPSR and ELR. */
  43. TST X3, #0x1f
  44. MSR SPSR_EL1, X3
  45. MSR ELR_EL1, X2
  46. LDP X29, X30, [SP], #0x10
  47. MSR SP_EL0, X29
  48. LDP X28, X29, [SP], #0x10
  49. MSR FPCR, X28
  50. MSR FPSR, X29
  51. LDP X28, X29, [SP], #0x10
  52. LDP X26, X27, [SP], #0x10
  53. LDP X24, X25, [SP], #0x10
  54. LDP X22, X23, [SP], #0x10
  55. LDP X20, X21, [SP], #0x10
  56. LDP X18, X19, [SP], #0x10
  57. LDP X16, X17, [SP], #0x10
  58. LDP X14, X15, [SP], #0x10
  59. LDP X12, X13, [SP], #0x10
  60. LDP X10, X11, [SP], #0x10
  61. LDP X8, X9, [SP], #0x10
  62. LDP X6, X7, [SP], #0x10
  63. LDP X4, X5, [SP], #0x10
  64. LDP X2, X3, [SP], #0x10
  65. LDP X0, X1, [SP], #0x10
  66. RESTORE_FPU SP
  67. #ifdef RT_USING_SMART
  68. BEQ arch_ret_to_user
  69. #endif
  70. ERET
  71. .endm
  72. #endif /* __ARM64_CONTEXT_H__ */