cpuport.h 1.5 KB

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  1. /*
  2. * Copyright (c) 2006-2023, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2018-10-03 Bernard The first version
  9. * 2020/11/20 BalanceTWK Add FPU support
  10. * 2023/01/04 WangShun Adapt to CH32
  11. * 2023/08/11 HPMicro Define ARCH_RISCV_FPU if FPU is enabled
  12. */
  13. #ifndef CPUPORT_H__
  14. #define CPUPORT_H__
  15. #include <rtconfig.h>
  16. #ifndef __ASSEMBLY__
  17. #ifdef RT_USING_SMP
  18. typedef union {
  19. unsigned long slock;
  20. struct __arch_tickets {
  21. unsigned short owner;
  22. unsigned short next;
  23. } tickets;
  24. } rt_hw_spinlock_t;
  25. #endif
  26. #endif
  27. /* Preprocessor Definition */
  28. #if __riscv_flen == 32
  29. #define ARCH_RISCV_FPU
  30. #define ARCH_RISCV_FPU_S
  31. #endif
  32. #if __riscv_flen == 64
  33. #define ARCH_RISCV_FPU
  34. #define ARCH_RISCV_FPU_D
  35. #endif
  36. /* bytes of register width */
  37. #ifdef ARCH_CPU_64BIT
  38. #define STORE sd
  39. #define LOAD ld
  40. #define REGBYTES 8
  41. #else
  42. #define STORE sw
  43. #define LOAD lw
  44. #define REGBYTES 4
  45. #endif
  46. /* Preprocessor Definition */
  47. #ifdef ARCH_RISCV_FPU
  48. #ifdef ARCH_RISCV_FPU_D
  49. #define FSTORE fsd
  50. #define FLOAD fld
  51. #define FREGBYTES 8
  52. #define rv_floatreg_t rt_int64_t
  53. #endif
  54. #ifdef ARCH_RISCV_FPU_S
  55. #define FSTORE fsw
  56. #define FLOAD flw
  57. #define FREGBYTES 4
  58. #define rv_floatreg_t rt_int32_t
  59. #endif
  60. #endif
  61. #endif