drv_pin.c 4.3 KB

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  1. /*
  2. * Copyright (c) 2019 Winner Microelectronics Co., Ltd.
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2018-09-15 flyingcys 1st version
  9. */
  10. #include <rtthread.h>
  11. #include <rtdevice.h>
  12. #include <rthw.h>
  13. #include "wm_type_def.h"
  14. #include "wm_io.h"
  15. #include "wm_gpio.h"
  16. #include "pin_map.h"
  17. #include "drv_pin.h"
  18. #ifdef BSP_USING_PIN
  19. static void wm_pin_mode(struct rt_device *device, rt_base_t pin, rt_base_t mode)
  20. {
  21. rt_int16_t gpio_pin;
  22. gpio_pin = wm_get_pin(pin);
  23. if (gpio_pin < 0)
  24. {
  25. return;
  26. }
  27. if (mode == PIN_MODE_INPUT)
  28. {
  29. tls_gpio_cfg((enum tls_io_name)gpio_pin, WM_GPIO_DIR_INPUT, WM_GPIO_ATTR_FLOATING);
  30. }
  31. else if (mode == PIN_MODE_INPUT_PULLUP)
  32. {
  33. tls_gpio_cfg((enum tls_io_name)gpio_pin, WM_GPIO_DIR_INPUT, WM_GPIO_ATTR_PULLHIGH);
  34. }
  35. else if (mode == PIN_MODE_INPUT_PULLDOWN)
  36. {
  37. tls_gpio_cfg((enum tls_io_name)gpio_pin, WM_GPIO_DIR_INPUT, WM_GPIO_ATTR_PULLLOW);
  38. }
  39. else if (mode == PIN_MODE_OUTPUT)
  40. {
  41. tls_gpio_cfg((enum tls_io_name)gpio_pin, WM_GPIO_DIR_OUTPUT, WM_GPIO_ATTR_PULLHIGH);
  42. }
  43. return;
  44. }
  45. static void wm_pin_write(struct rt_device *device, rt_base_t pin, rt_base_t value)
  46. {
  47. rt_int16_t gpio_pin;
  48. gpio_pin = wm_get_pin(pin);
  49. if (gpio_pin < 0)
  50. {
  51. return;
  52. }
  53. tls_gpio_write((enum tls_io_name)gpio_pin, value);
  54. return;
  55. }
  56. static int wm_pin_read(struct rt_device *device, rt_base_t pin)
  57. {
  58. rt_int16_t gpio_pin;
  59. gpio_pin = wm_get_pin(pin);
  60. if (gpio_pin < 0)
  61. {
  62. return PIN_LOW;
  63. }
  64. return tls_gpio_read((enum tls_io_name)gpio_pin);
  65. }
  66. static rt_err_t wm_pin_attach_irq(struct rt_device *device, rt_int32_t pin,
  67. rt_uint32_t mode, void (*hdr)(void *args), void *args)
  68. {
  69. rt_int16_t gpio_pin;
  70. rt_base_t level;
  71. gpio_pin = wm_get_pin(pin);
  72. if (gpio_pin < 0)
  73. {
  74. return RT_ENOSYS;
  75. }
  76. level = rt_hw_interrupt_disable();
  77. /*irq mode set*/
  78. switch (mode)
  79. {
  80. case PIN_IRQ_MODE_RISING:
  81. tls_gpio_irq_cfg((enum tls_io_name)gpio_pin, WM_GPIO_IRQ_TRIG_RISING_EDGE);
  82. break;
  83. case PIN_IRQ_MODE_FALLING:
  84. tls_gpio_irq_cfg((enum tls_io_name)gpio_pin, WM_GPIO_IRQ_TRIG_FALLING_EDGE);
  85. break;
  86. case PIN_IRQ_MODE_RISING_FALLING:
  87. tls_gpio_irq_cfg((enum tls_io_name)gpio_pin, WM_GPIO_IRQ_TRIG_DOUBLE_EDGE);
  88. break;
  89. case PIN_IRQ_MODE_HIGH_LEVEL:
  90. tls_gpio_irq_cfg((enum tls_io_name)gpio_pin, WM_GPIO_IRQ_TRIG_HIGH_LEVEL);
  91. break;
  92. case PIN_IRQ_MODE_LOW_LEVEL:
  93. tls_gpio_irq_cfg((enum tls_io_name)gpio_pin, WM_GPIO_IRQ_TRIG_LOW_LEVEL);
  94. break;
  95. default:
  96. rt_hw_interrupt_enable(level);
  97. return RT_ENOSYS;
  98. }
  99. tls_gpio_isr_register((enum tls_io_name)gpio_pin, hdr, args);
  100. rt_hw_interrupt_enable(level);
  101. return RT_EOK;
  102. }
  103. static rt_err_t wm_pin_detach_irq(struct rt_device *device, rt_int32_t pin)
  104. {
  105. return RT_EOK;
  106. }
  107. static rt_err_t wm_pin_irq_enable(struct rt_device *device, rt_base_t pin, rt_uint32_t enabled)
  108. {
  109. rt_int16_t gpio_pin;
  110. rt_base_t level;
  111. gpio_pin = wm_get_pin(pin);
  112. if (gpio_pin < 0)
  113. {
  114. return RT_ENOSYS;
  115. }
  116. level = rt_hw_interrupt_disable();
  117. if (enabled == PIN_IRQ_ENABLE)
  118. {
  119. tls_clr_gpio_irq_status((enum tls_io_name)gpio_pin);
  120. tls_gpio_irq_enable((enum tls_io_name)gpio_pin);
  121. rt_hw_interrupt_enable(level);
  122. return RT_EOK;
  123. }
  124. else if (enabled == PIN_IRQ_DISABLE)
  125. {
  126. tls_gpio_irq_disable((enum tls_io_name)gpio_pin);
  127. rt_hw_interrupt_enable(level);
  128. return RT_EOK;
  129. }
  130. else
  131. {
  132. rt_hw_interrupt_enable(level);
  133. return RT_ENOSYS;
  134. }
  135. }
  136. struct rt_pin_ops _wm_pin_ops =
  137. {
  138. wm_pin_mode,
  139. wm_pin_write,
  140. wm_pin_read,
  141. wm_pin_attach_irq,
  142. wm_pin_detach_irq,
  143. wm_pin_irq_enable,
  144. RT_NULL,
  145. };
  146. int wm_hw_pin_init(void)
  147. {
  148. int ret = rt_device_pin_register("pin", &_wm_pin_ops, RT_NULL);
  149. return ret;
  150. }
  151. INIT_BOARD_EXPORT(wm_hw_pin_init);
  152. void WM_GPIOA_IRQHandler(void)
  153. {
  154. rt_interrupt_enter();
  155. GPIOA_IRQHandler();
  156. rt_interrupt_leave();
  157. }
  158. void WM_GPIOB_IRQHandler(void)
  159. {
  160. rt_interrupt_enter();
  161. GPIOB_IRQHandler();
  162. rt_interrupt_leave();
  163. }
  164. #endif /* BSP_USING_PIN */