board.c 1.3 KB

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  1. /*
  2. * Copyright (c) 2006-2021, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2022-03-08 shelton first version
  9. */
  10. #include "board.h"
  11. void system_clock_config(void)
  12. {
  13. /* reset crm */
  14. crm_reset();
  15. crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
  16. /* wait till hext is ready */
  17. while(crm_hext_stable_wait() == ERROR)
  18. {
  19. }
  20. /* config pll clock resource */
  21. crm_pll_config(CRM_PLL_SOURCE_HEXT_DIV, CRM_PLL_MULT_50, CRM_PLL_OUTPUT_RANGE_GT72MHZ);
  22. /* config hext division */
  23. crm_hext_clock_div_set(CRM_HEXT_DIV_2);
  24. /* enable pll */
  25. crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
  26. /* wait till pll is ready */
  27. while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
  28. {
  29. }
  30. /* config ahbclk */
  31. crm_ahb_div_set(CRM_AHB_DIV_1);
  32. /* config apb2clk */
  33. crm_apb2_div_set(CRM_APB2_DIV_2);
  34. /* config apb1clk */
  35. crm_apb1_div_set(CRM_APB1_DIV_2);
  36. /* enable auto step mode */
  37. crm_auto_step_mode_enable(TRUE);
  38. /* select pll as system clock source */
  39. crm_sysclk_switch(CRM_SCLK_PLL);
  40. /* wait till pll is used as system clock source */
  41. while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
  42. {
  43. }
  44. /* disable auto step mode */
  45. crm_auto_step_mode_enable(FALSE);
  46. /* update system_core_clock global variable */
  47. system_core_clock_update();
  48. }