bl702_flash.ld 6.0 KB

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  1. /****************************************************************************************
  2. * @file bl702_flash.ld
  3. *
  4. * @brief This file is the map file (gnuarm or armgcc).
  5. *
  6. * Copyright (C) BouffaloLab 2021
  7. *
  8. ****************************************************************************************
  9. */
  10. /* configure the CPU type */
  11. OUTPUT_ARCH( "riscv" )
  12. /* link with the standard c library */
  13. /* INPUT(-lc) */
  14. /* link with the standard GCC library */
  15. /* INPUT(-lgcc) */
  16. /* configure the entry point */
  17. ENTRY(__start)
  18. StackSize = 0x1000; /* 4KB */
  19. MEMORY
  20. {
  21. fw_header_memory (rx) : ORIGIN = 0x23000000 - 0x1000, LENGTH = 4K
  22. xip_memory (rx) : ORIGIN = 0x23000000, LENGTH = 1024K
  23. itcm_memory (rx) : ORIGIN = 0x22014000, LENGTH = 12K
  24. dtcm_memory (rx) : ORIGIN = 0x42017000, LENGTH = 4K
  25. ram_memory (!rx) : ORIGIN = 0x42018000, LENGTH = 96K
  26. hbn_memory (rx) : ORIGIN = 0x40010000, LENGTH = 0xE00 /* hbn ram 4K used 3.5K*/
  27. }
  28. SECTIONS
  29. {
  30. PROVIDE(__metal_chicken_bit = 0);
  31. .fw_header :
  32. {
  33. KEEP(*(.fw_header))
  34. } > fw_header_memory
  35. .text :
  36. {
  37. . = ALIGN(4);
  38. __text_code_start__ = .;
  39. KEEP (*(SORT_NONE(.init)))
  40. KEEP (*(SORT_NONE(.vector)))
  41. *(.text)
  42. *(.text.*)
  43. /* section information for finsh shell */
  44. . = ALIGN(4);
  45. __fsymtab_start = .;
  46. KEEP(*(FSymTab))
  47. __fsymtab_end = .;
  48. . = ALIGN(4);
  49. __vsymtab_start = .;
  50. KEEP(*(VSymTab))
  51. __vsymtab_end = .;
  52. . = ALIGN(4);
  53. /* section information for modules */
  54. . = ALIGN(4);
  55. __rtmsymtab_start = .;
  56. KEEP(*(RTMSymTab))
  57. __rtmsymtab_end = .;
  58. /* section information for initialization */
  59. . = ALIGN(4);
  60. __rt_init_start = .;
  61. KEEP(*(SORT(.rti_fn*)))
  62. __rt_init_end = .;
  63. /*put .rodata**/
  64. *(EXCLUDE_FILE( *bl702_glb*.o* \
  65. *bl702_pds*.o* \
  66. *bl702_common*.o* \
  67. *bl702_sf_cfg*.o* \
  68. *bl702_sf_cfg_ext*.o* \
  69. *bl702_sf_ctrl*.o* \
  70. *bl702_sflash*.o* \
  71. *bl702_sflash_ext*.o* \
  72. *bl702_xip_sflash*.o* \
  73. *bl702_xip_sflash_ext*.o* \
  74. *bl702_ef_ctrl*.o*) .rodata*)
  75. *(.srodata)
  76. *(.srodata.*)
  77. . = ALIGN(4);
  78. __text_code_end__ = .;
  79. } > xip_memory
  80. . = ALIGN(4);
  81. __itcm_load_addr = .;
  82. .itcm_region : AT (__itcm_load_addr)
  83. {
  84. . = ALIGN(4);
  85. __tcm_code_start__ = .;
  86. *(.tcm_code.*)
  87. *(.tcm_const.*)
  88. *(.sclock_rlt_code.*)
  89. *(.sclock_rlt_const.*)
  90. *bl702_glb*.o*(.rodata*)
  91. *bl702_pds*.o*(.rodata*)
  92. *bl702_common*.o*(.rodata*)
  93. *bl702_sf_cfg*.o*(.rodata*)
  94. *bl702_sf_cfg_ext*.o*(.rodata*)
  95. *bl702_sf_ctrl*.o*(.rodata*)
  96. *bl702_sflash*.o*(.rodata*)
  97. *bl702_sflash_ext*.o*(.rodata*)
  98. *bl702_xip_sflash*.o*(.rodata*)
  99. *bl702_xip_sflash_ext*.o*(.rodata*)
  100. *bl702_ef_ctrl*.o*(.rodata*)
  101. . = ALIGN(4);
  102. __tcm_code_end__ = .;
  103. } > itcm_memory
  104. __hbn_load_addr = __itcm_load_addr + SIZEOF(.itcm_region);
  105. .hbn_ram_region : AT (__hbn_load_addr)
  106. {
  107. . = ALIGN(4);
  108. __hbn_ram_start__ = .;
  109. *bl702_hbn_wakeup*.o*(.rodata*)
  110. *(.hbn_ram_code*)
  111. *(.hbn_ram_data)
  112. . = ALIGN(4);
  113. __hbn_ram_end__ = .;
  114. } > hbn_memory
  115. __dtcm_load_addr = __hbn_load_addr + SIZEOF(.hbn_ram_region);
  116. .dtcm_region : AT (__dtcm_load_addr)
  117. {
  118. . = ALIGN(4);
  119. __tcm_data_start__ = .;
  120. *(.tcm_data)
  121. /* *finger_print.o(.data*) */
  122. . = ALIGN(4);
  123. __tcm_data_end__ = .;
  124. } > dtcm_memory
  125. /*************************************************************************/
  126. /* .stack_dummy section doesn't contains any symbols. It is only
  127. * used for linker to calculate size of stack sections, and assign
  128. * values to stack symbols later */
  129. .stack_dummy (NOLOAD):
  130. {
  131. . = ALIGN(0x4);
  132. . = . + StackSize;
  133. . = ALIGN(0x4);
  134. } > dtcm_memory
  135. /* Set stack top to end of RAM, and stack limit move down by
  136. * size of stack_dummy section */
  137. __StackTop = ORIGIN(dtcm_memory) + LENGTH(dtcm_memory);
  138. PROVIDE( __freertos_irq_stack_top = __StackTop);
  139. PROVIDE( __rt_rvstack = . );
  140. __StackLimit = __StackTop - SIZEOF(.stack_dummy);
  141. /* Check if data + heap + stack exceeds RAM limit */
  142. ASSERT(__StackLimit >= __tcm_data_end__, "region RAM overflowed with stack")
  143. /*************************************************************************/
  144. __ram_load_addr = __dtcm_load_addr + SIZEOF(.dtcm_region);
  145. /* Data section */
  146. RAM_DATA : AT (__ram_load_addr)
  147. {
  148. . = ALIGN(4);
  149. __ram_data_start__ = .;
  150. PROVIDE( __global_pointer$ = . + 0x800 );
  151. *(.data)
  152. *(.data.*)
  153. *(.sdata)
  154. *(.sdata.*)
  155. *(.sdata2)
  156. *(.sdata2.*)
  157. *(.nocache_ram)
  158. . = ALIGN(4);
  159. __bflog_tags_start__ = .;
  160. *(.bflog_tags_array)
  161. . = ALIGN(4);
  162. __bflog_tags_end__ = .;
  163. __ram_data_end__ = .;
  164. } > ram_memory
  165. .bss (NOLOAD) :
  166. {
  167. . = ALIGN(4);
  168. __bss_start__ = .;
  169. *(.bss*)
  170. *(.sbss*)
  171. *(COMMON)
  172. . = ALIGN(4);
  173. __bss_end__ = .;
  174. } > ram_memory
  175. .noinit_data (NOLOAD) :
  176. {
  177. . = ALIGN(4);
  178. __noinit_data_start__ = .;
  179. *(.noinit_data*)
  180. *(.nocache_noinit_ram)
  181. . = ALIGN(4);
  182. __noinit_data_end__ = .;
  183. } > ram_memory
  184. .heap (NOLOAD):
  185. {
  186. . = ALIGN(4);
  187. __HeapBase = .;
  188. KEEP(*(.heap*))
  189. . = ALIGN(4);
  190. __HeapLimit = .;
  191. } > ram_memory
  192. PROVIDE (__heap_min_size = 0x400);
  193. __HeapLimit = ORIGIN(ram_memory) + LENGTH(ram_memory);
  194. ASSERT((__HeapLimit - __HeapBase ) >= __heap_min_size, "heap size is too short.")
  195. }