drv_spi.c 12 KB

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  1. /*
  2. * Copyright (C) 2018 Shanghai Eastsoft Microelectronics Co., Ltd.
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Licensed under the Apache License, Version 2.0 (the License); you may
  7. * not use this file except in compliance with the License.
  8. * You may obtain a copy of the License at
  9. *
  10. * www.apache.org/licenses/LICENSE-2.0
  11. *
  12. * Unless required by applicable law or agreed to in writing, software
  13. * distributed under the License is distributed on an AS IS BASIS, WITHOUT
  14. * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  15. * See the License for the specific language governing permissions and
  16. * limitations under the License.
  17. *
  18. * Change Logs:
  19. * Date Author Notes
  20. * 2019-11-01 wangyq update libraries
  21. * 2020-01-14 wangyq the first version
  22. * 2021-04-20 liuhy the second version
  23. */
  24. #include <rtthread.h>
  25. #include <rtdevice.h>
  26. #include <string.h>
  27. #include <rthw.h>
  28. #include "board.h"
  29. #include "drv_spi.h"
  30. #ifdef RT_USING_SPI
  31. #define SPITIMEOUT 0xFFF
  32. rt_err_t spi_configure(struct rt_spi_device *device,
  33. struct rt_spi_configuration *cfg)
  34. {
  35. ald_spi_handle_t *hspi;
  36. hspi = (ald_spi_handle_t *)device->bus->parent.user_data;
  37. hspi->init.ss_en = DISABLE;
  38. hspi->init.crc_calc = DISABLE;
  39. hspi->init.frame = ALD_SPI_FRAME_MOTOROLA;
  40. /* config spi mode */
  41. if (cfg->mode & RT_SPI_SLAVE)
  42. {
  43. hspi->init.mode = ALD_SPI_MODE_SLAVER;
  44. }
  45. else
  46. {
  47. hspi->init.mode = ALD_SPI_MODE_MASTER;
  48. }
  49. if (cfg->mode & RT_SPI_3WIRE)
  50. {
  51. hspi->init.dir = ALD_SPI_DIRECTION_1LINE;
  52. }
  53. else
  54. {
  55. hspi->init.dir = ALD_SPI_DIRECTION_2LINES;
  56. }
  57. if (cfg->data_width == 8)
  58. {
  59. hspi->init.data_size = ALD_SPI_DATA_SIZE_8;
  60. }
  61. else if (cfg->data_width == 16)
  62. {
  63. hspi->init.data_size = ALD_SPI_DATA_SIZE_16;
  64. }
  65. if (cfg->mode & RT_SPI_CPHA)
  66. {
  67. hspi->init.phase = ALD_SPI_CPHA_SECOND;
  68. }
  69. else
  70. {
  71. hspi->init.phase = ALD_SPI_CPHA_FIRST;
  72. }
  73. if (cfg->mode & RT_SPI_MSB)
  74. {
  75. hspi->init.first_bit = ALD_SPI_FIRSTBIT_MSB;
  76. }
  77. else
  78. {
  79. hspi->init.first_bit = ALD_SPI_FIRSTBIT_LSB;
  80. }
  81. if (cfg->mode & RT_SPI_CPOL)
  82. {
  83. hspi->init.polarity = ALD_SPI_CPOL_HIGH;
  84. }
  85. else
  86. {
  87. hspi->init.polarity = ALD_SPI_CPOL_LOW;
  88. }
  89. if (cfg->mode & RT_SPI_NO_CS)
  90. {
  91. hspi->init.ss_en = DISABLE;
  92. }
  93. else
  94. {
  95. hspi->init.ss_en = ENABLE;
  96. }
  97. /* config spi clock */
  98. if (cfg->max_hz >= ald_cmu_get_pclk_clock() / 2)
  99. {
  100. hspi->init.baud = ALD_SPI_BAUD_2;
  101. }
  102. else if (cfg->max_hz >= ald_cmu_get_pclk_clock() / 4)
  103. {
  104. hspi->init.baud = ALD_SPI_BAUD_4;
  105. }
  106. else if (cfg->max_hz >= ald_cmu_get_pclk_clock() / 8)
  107. {
  108. hspi->init.baud = ALD_SPI_BAUD_8;
  109. }
  110. else if (cfg->max_hz >= ald_cmu_get_pclk_clock() / 16)
  111. {
  112. hspi->init.baud = ALD_SPI_BAUD_16;
  113. }
  114. else if (cfg->max_hz >= ald_cmu_get_pclk_clock() / 32)
  115. {
  116. hspi->init.baud = ALD_SPI_BAUD_32;
  117. }
  118. else if (cfg->max_hz >= ald_cmu_get_pclk_clock() / 64)
  119. {
  120. hspi->init.baud = ALD_SPI_BAUD_64;
  121. }
  122. else if (cfg->max_hz >= ald_cmu_get_pclk_clock() / 128)
  123. {
  124. hspi->init.baud = ALD_SPI_BAUD_128;
  125. }
  126. else
  127. {
  128. hspi->init.baud = ALD_SPI_BAUD_256;
  129. }
  130. ALD_SPI_DISABLE(hspi);
  131. ald_spi_init(hspi);
  132. return RT_EOK;
  133. }
  134. static rt_uint32_t spixfer(struct rt_spi_device *device, struct rt_spi_message *message)
  135. {
  136. rt_err_t res;
  137. ald_spi_handle_t *hspi;
  138. struct es32f3_hw_spi_cs *cs;
  139. RT_ASSERT(device != RT_NULL);
  140. RT_ASSERT(device->bus != RT_NULL);
  141. RT_ASSERT(device->bus->parent.user_data != RT_NULL);
  142. hspi = (ald_spi_handle_t *)device->bus->parent.user_data;
  143. cs = device->parent.user_data;
  144. if (message->cs_take)
  145. {
  146. rt_pin_write(cs->pin, ES_SPI_CS_LEVEL);
  147. }
  148. if(message->send_buf != RT_NULL || message->recv_buf != RT_NULL)
  149. {
  150. /* send & receive */
  151. if ((message->send_buf != RT_NULL) && (message->recv_buf != RT_NULL))
  152. {
  153. res = ald_spi_send_recv(hspi, (rt_uint8_t *)message->send_buf, (rt_uint8_t *)message->recv_buf,
  154. (rt_int32_t)message->length, SPITIMEOUT);
  155. }
  156. else
  157. {
  158. /* only send data */
  159. if (message->recv_buf == RT_NULL)
  160. {
  161. res = ald_spi_send(hspi, (rt_uint8_t *)message->send_buf, (rt_int32_t)message->length, SPITIMEOUT);
  162. }
  163. /* only receive data */
  164. if (message->send_buf == RT_NULL)
  165. {
  166. res = ald_spi_recv(hspi, (rt_uint8_t *)message->recv_buf, (rt_int32_t)message->length, SPITIMEOUT);
  167. }
  168. }
  169. if (message->cs_release)
  170. {
  171. rt_pin_write(cs->pin, !ES_SPI_CS_LEVEL);
  172. }
  173. if (res != RT_EOK)
  174. return RT_ERROR;
  175. else
  176. return message->length;
  177. }
  178. else
  179. {
  180. if (message->cs_release)
  181. {
  182. rt_pin_write(cs->pin, !ES_SPI_CS_LEVEL);
  183. }
  184. return RT_EOK;
  185. }
  186. }
  187. const struct rt_spi_ops es32f3_spi_i2s_ops =
  188. {
  189. RT_NULL,
  190. RT_NULL,
  191. };
  192. const struct rt_spi_ops es32f3_spi_ops =
  193. {
  194. spi_configure,
  195. spixfer,
  196. };
  197. rt_err_t es32f3_spi_device_attach(rt_uint32_t pin, const char *bus_name, const char *device_name)
  198. {
  199. int result;
  200. /* define spi Instance */
  201. struct rt_spi_device *spi_device = (struct rt_spi_device *)rt_malloc(sizeof(struct rt_spi_device));
  202. RT_ASSERT(spi_device != RT_NULL);
  203. struct es32f3_hw_spi_cs *cs_pin = (struct es32f3_hw_spi_cs *)rt_malloc(sizeof(struct es32f3_hw_spi_cs));
  204. RT_ASSERT(cs_pin != RT_NULL);
  205. cs_pin->pin = pin;
  206. rt_pin_mode(pin, PIN_MODE_OUTPUT);
  207. rt_pin_write(pin, 1);
  208. result = rt_spi_bus_attach_device(spi_device, device_name, bus_name, (void *)cs_pin);
  209. #ifdef BSP_USING_SPI0
  210. if(!(strcmp(bus_name,ES_DEVICE_NAME_SPI0_BUS)))SPI_BUS_CONFIG(spi_device->config,0);
  211. #endif
  212. #ifdef BSP_USING_SPI1
  213. if(!(strcmp(bus_name,ES_DEVICE_NAME_SPI1_BUS)))SPI_BUS_CONFIG(spi_device->config,1);
  214. #endif
  215. #ifdef BSP_USING_SPI2
  216. if(!(strcmp(bus_name,ES_DEVICE_NAME_SPI2_BUS)))SPI_BUS_CONFIG(spi_device->config,2);
  217. #endif
  218. return result;
  219. }
  220. #ifdef BSP_USING_SPI0
  221. static struct rt_spi_bus _spi_bus0;
  222. static ald_spi_handle_t _spi0;
  223. #endif
  224. #ifdef BSP_USING_SPI1
  225. static struct rt_spi_bus _spi_bus1;
  226. static ald_spi_handle_t _spi1;
  227. #endif
  228. #ifdef BSP_USING_SPI2
  229. static struct rt_spi_bus _spi_bus2;
  230. static ald_spi_handle_t _spi2;
  231. #endif
  232. int rt_hw_spi_init(void)
  233. {
  234. int result = RT_EOK;
  235. struct rt_spi_bus *spi_bus;
  236. ald_spi_handle_t *spi;
  237. ald_gpio_init_t gpio_instruct;
  238. gpio_instruct.pupd = ALD_GPIO_PUSH_UP_DOWN;
  239. gpio_instruct.od = ALD_GPIO_PUSH_PULL;
  240. gpio_instruct.odrv = ALD_GPIO_OUT_DRIVE_NORMAL;
  241. gpio_instruct.type = ALD_GPIO_TYPE_CMOS;
  242. gpio_instruct.flt = ALD_GPIO_FILTER_DISABLE;
  243. #ifdef BSP_USING_SPI0
  244. _spi0.perh = SPI0;
  245. spi_bus = &_spi_bus0;
  246. spi = &_spi0;
  247. /* SPI0 gpio init */
  248. gpio_instruct.mode = ALD_GPIO_MODE_OUTPUT;
  249. #if defined(ES_SPI0_SCK_GPIO_FUNC)&&defined(ES_SPI0_SCK_GPIO_PORT)&&defined(ES_SPI0_SCK_GPIO_PIN)
  250. gpio_instruct.func = ES_SPI0_SCK_GPIO_FUNC;
  251. ald_gpio_init(ES_SPI0_SCK_GPIO_PORT, ES_SPI0_SCK_GPIO_PIN, &gpio_instruct);
  252. #endif
  253. #if defined(ES_SPI0_MOSI_GPIO_FUNC)&&defined(ES_SPI0_MOSI_GPIO_PORT)&&defined(ES_SPI0_MOSI_GPIO_PIN)
  254. gpio_instruct.func = ES_SPI0_MOSI_GPIO_FUNC;
  255. ald_gpio_init(ES_SPI0_MOSI_GPIO_PORT, ES_SPI0_MOSI_GPIO_PIN, &gpio_instruct);
  256. #endif
  257. #if !defined(ES_SPI0_I2S_MODE)
  258. gpio_instruct.mode = ALD_GPIO_MODE_INPUT;
  259. #endif
  260. #if defined(ES_SPI0_MISO_GPIO_FUNC)&&defined(ES_SPI0_MISO_GPIO_PORT)&&defined(ES_SPI0_MISO_GPIO_PIN)
  261. gpio_instruct.func = ES_SPI0_MISO_GPIO_FUNC;
  262. ald_gpio_init(ES_SPI0_MISO_GPIO_PORT, ES_SPI0_MISO_GPIO_PIN, &gpio_instruct);
  263. #endif
  264. #if defined(ES_SPI0_I2S_MODE)&&defined(ES_SPI0_NSS_GPIO_FUNC)&&defined(ES_SPI0_NSS_GPIO_PORT)&&defined(ES_SPI0_NSS_GPIO_PIN)
  265. gpio_instruct.func = ES_SPI0_NSS_GPIO_FUNC;
  266. ald_gpio_init(ES_SPI0_NSS_GPIO_PORT, ES_SPI0_NSS_GPIO_PIN, &gpio_instruct);
  267. #endif
  268. spi_bus->parent.user_data = spi;
  269. #if defined(ES_SPI0_I2S_MODE)
  270. result = rt_spi_bus_register(spi_bus, ES_DEVICE_NAME_SPI0_BUS, &es32f3_spi_i2s_ops);
  271. #else
  272. result = rt_spi_bus_register(spi_bus, ES_DEVICE_NAME_SPI0_BUS, &es32f3_spi_ops);
  273. if (result != RT_EOK)
  274. {
  275. return result;
  276. }
  277. result = es32f3_spi_device_attach(ES_SPI0_NSS_PIN, ES_DEVICE_NAME_SPI0_BUS, ES_DEVICE_NAME_SPI0_DEV0);
  278. if (result != RT_EOK)
  279. {
  280. return result;
  281. }
  282. #endif
  283. #endif
  284. #ifdef BSP_USING_SPI1
  285. _spi1.perh = SPI1;
  286. spi_bus = &_spi_bus1;
  287. spi = &_spi1;
  288. /* SPI1 gpio init */
  289. gpio_instruct.mode = ALD_GPIO_MODE_OUTPUT;
  290. #if defined(ES_SPI1_SCK_GPIO_FUNC)&&defined(ES_SPI1_SCK_GPIO_PORT)&&defined(ES_SPI1_SCK_GPIO_PIN)
  291. gpio_instruct.func = ES_SPI1_SCK_GPIO_FUNC;
  292. ald_gpio_init(ES_SPI1_SCK_GPIO_PORT, ES_SPI1_SCK_GPIO_PIN, &gpio_instruct);
  293. #endif
  294. #if defined(ES_SPI1_MOSI_GPIO_FUNC)&&defined(ES_SPI1_MOSI_GPIO_PORT)&&defined(ES_SPI1_MOSI_GPIO_PIN)
  295. gpio_instruct.func = ES_SPI1_MOSI_GPIO_FUNC;
  296. ald_gpio_init(ES_SPI1_MOSI_GPIO_PORT, ES_SPI1_MOSI_GPIO_PIN, &gpio_instruct);
  297. #endif
  298. #if !defined(ES_SPI1_I2S_MODE)
  299. gpio_instruct.mode = ALD_GPIO_MODE_INPUT;
  300. #endif
  301. #if defined(ES_SPI1_MISO_GPIO_FUNC)&&defined(ES_SPI1_MISO_GPIO_PORT)&&defined(ES_SPI1_MISO_GPIO_PIN)
  302. gpio_instruct.func = ES_SPI1_MISO_GPIO_FUNC;
  303. ald_gpio_init(ES_SPI1_MISO_GPIO_PORT, ES_SPI1_MISO_GPIO_PIN, &gpio_instruct);
  304. #endif
  305. #if defined(ES_SPI1_I2S_MODE)&&defined(ES_SPI1_NSS_GPIO_FUNC)&&defined(ES_SPI1_NSS_GPIO_PORT)&&defined(ES_SPI1_NSS_GPIO_PIN)
  306. gpio_instruct.func = ES_SPI1_NSS_GPIO_FUNC;
  307. ald_gpio_init(ES_SPI1_NSS_GPIO_PORT, ES_SPI1_NSS_GPIO_PIN, &gpio_instruct);
  308. #endif
  309. spi_bus->parent.user_data = spi;
  310. #if defined(ES_SPI1_I2S_MODE)
  311. result = rt_spi_bus_register(spi_bus, ES_DEVICE_NAME_SPI1_BUS, &es32f3_spi_i2s_ops);
  312. #else
  313. result = rt_spi_bus_register(spi_bus, ES_DEVICE_NAME_SPI1_BUS, &es32f3_spi_ops);
  314. if (result != RT_EOK)
  315. {
  316. return result;
  317. }
  318. result = es32f3_spi_device_attach(ES_SPI1_NSS_PIN, ES_DEVICE_NAME_SPI1_BUS, ES_DEVICE_NAME_SPI1_DEV0);
  319. if (result != RT_EOK)
  320. {
  321. return result;
  322. }
  323. #endif
  324. #endif
  325. #ifdef BSP_USING_SPI2
  326. _spi2.perh = SPI2;
  327. spi_bus = &_spi_bus2;
  328. spi = &_spi2;
  329. /* SPI2 gpio init */
  330. gpio_instruct.mode = ALD_GPIO_MODE_OUTPUT;
  331. #if defined(ES_SPI2_SCK_GPIO_FUNC)&&defined(ES_SPI2_SCK_GPIO_PORT)&&defined(ES_SPI2_SCK_GPIO_PIN)
  332. gpio_instruct.func = ES_SPI2_SCK_GPIO_FUNC;
  333. ald_gpio_init(ES_SPI2_SCK_GPIO_PORT, ES_SPI2_SCK_GPIO_PIN, &gpio_instruct);
  334. #endif
  335. #if defined(ES_SPI2_MOSI_GPIO_FUNC)&&defined(ES_SPI2_MOSI_GPIO_PORT)&&defined(ES_SPI2_MOSI_GPIO_PIN)
  336. gpio_instruct.func = ES_SPI2_MOSI_GPIO_FUNC;
  337. ald_gpio_init(ES_SPI2_MOSI_GPIO_PORT, ES_SPI2_MOSI_GPIO_PIN, &gpio_instruct);
  338. #endif
  339. #if !defined(ES_SPI2_I2S_MODE)
  340. gpio_instruct.mode = GPIO_MODE_INPUT;
  341. #endif
  342. #if defined(ES_SPI2_MISO_GPIO_FUNC)&&defined(ES_SPI2_MISO_GPIO_PORT)&&defined(ES_SPI2_MISO_GPIO_PIN)
  343. gpio_instruct.func = ES_SPI2_MISO_GPIO_FUNC;
  344. ald_gpio_init(ES_SPI2_MISO_GPIO_PORT, ES_SPI2_MISO_GPIO_PIN, &gpio_instruct);
  345. #endif
  346. #if defined(ES_SPI2_I2S_MODE)&&defined(ES_SPI2_NSS_GPIO_FUNC)&&defined(ES_SPI2_NSS_GPIO_PORT)&&defined(ES_SPI2_NSS_GPIO_PIN)
  347. gpio_instruct.func = ES_SPI2_NSS_GPIO_FUNC;
  348. ald_gpio_init(ES_SPI2_NSS_GPIO_PORT, ES_SPI2_NSS_GPIO_PIN, &gpio_instruct);
  349. #endif
  350. spi_bus->parent.user_data = spi;
  351. #if defined(ES_SPI2_I2S_MODE)
  352. result = rt_spi_bus_register(spi_bus, ES_DEVICE_NAME_SPI0_BUS, &es32f3_spi_i2s_ops);
  353. #else
  354. result = rt_spi_bus_register(spi_bus, ES_DEVICE_NAME_SPI2_BUS, &es32f3_spi_ops);
  355. if (result != RT_EOK)
  356. {
  357. return result;
  358. }
  359. result = es32f3_spi_device_attach(ES_SPI2_NSS_PIN, ES_DEVICE_NAME_SPI2_BUS, ES_DEVICE_NAME_SPI1_DEV0);
  360. if (result != RT_EOK)
  361. {
  362. return result;
  363. }
  364. #endif
  365. #endif
  366. return result;
  367. }
  368. INIT_BOARD_EXPORT(rt_hw_spi_init);
  369. #endif