r_pdl_lpc.h 4.0 KB

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  1. /*""FILE COMMENT""*******************************************************
  2. * System Name : LPC API for RX62Nxx
  3. * File Name : r_pdl_lpc.h
  4. * Version : 1.02
  5. * Contents : LPC API header
  6. * Customer :
  7. * Model :
  8. * Order :
  9. * CPU : RX
  10. * Compiler : RXC
  11. * OS : Nothing
  12. * Programmer :
  13. * Note :
  14. ************************************************************************
  15. * Copyright, 2011. Renesas Electronics Corporation
  16. * and Renesas Solutions Corporation
  17. ************************************************************************
  18. * History : 2011.04.08
  19. * : Ver 1.02
  20. * : CS-5 release.
  21. *""FILE COMMENT END""**************************************************/
  22. #ifndef R_PDL_LPC_H
  23. #define R_PDL_LPC_H
  24. #include "r_pdl_common_defs_RX62Nxx.h"
  25. /* Function prototypes */
  26. bool R_LPC_Create(
  27. uint32_t,
  28. uint32_t
  29. );
  30. bool R_LPC_Control(
  31. uint16_t
  32. );
  33. bool R_LPC_WriteBackup(
  34. uint8_t *,
  35. uint8_t
  36. );
  37. bool R_LPC_ReadBackup(
  38. uint8_t *,
  39. uint8_t
  40. );
  41. bool R_LPC_GetStatus(
  42. uint16_t *
  43. );
  44. /* Software and Deep Software Standby mode output port control */
  45. #define PDL_LPC_EXT_BUS_ON 0x00000001ul
  46. #define PDL_LPC_EXT_BUS_HI_Z 0x00000002ul
  47. /* On-chip RAM power / USB resume detection control */
  48. #define PDL_LPC_RAM_USB_DETECT_ON 0x00000004ul
  49. #define PDL_LPC_RAM_USB_DETECT_OFF 0x00000008ul
  50. /* I/O port retention control */
  51. #define PDL_LPC_IO_SAME 0x00000010ul
  52. #define PDL_LPC_IO_DELAY 0x00000020ul
  53. /* Deep software standby cancel control */
  54. #define PDL_LPC_CANCEL_IRQ0_DISABLE 0x00000040ul
  55. #define PDL_LPC_CANCEL_IRQ0_FALLING 0x00000080ul
  56. #define PDL_LPC_CANCEL_IRQ0_RISING 0x00000100ul
  57. #define PDL_LPC_CANCEL_IRQ1_DISABLE 0x00000200ul
  58. #define PDL_LPC_CANCEL_IRQ1_FALLING 0x00000400ul
  59. #define PDL_LPC_CANCEL_IRQ1_RISING 0x00000800ul
  60. #define PDL_LPC_CANCEL_IRQ2_DISABLE 0x00001000ul
  61. #define PDL_LPC_CANCEL_IRQ2_FALLING 0x00002000ul
  62. #define PDL_LPC_CANCEL_IRQ2_RISING 0x00004000ul
  63. #define PDL_LPC_CANCEL_IRQ3_DISABLE 0x00008000ul
  64. #define PDL_LPC_CANCEL_IRQ3_FALLING 0x00010000ul
  65. #define PDL_LPC_CANCEL_IRQ3_RISING 0x00020000ul
  66. #define PDL_LPC_CANCEL_NMI_DISABLE 0x00040000ul
  67. #define PDL_LPC_CANCEL_NMI_FALLING 0x00080000ul
  68. #define PDL_LPC_CANCEL_NMI_RISING 0x00100000ul
  69. #define PDL_LPC_CANCEL_LVD_DISABLE 0x00200000ul
  70. #define PDL_LPC_CANCEL_LVD_ENABLE 0x00400000ul
  71. #define PDL_LPC_CANCEL_RTC_DISABLE 0x00800000ul
  72. #define PDL_LPC_CANCEL_RTC_ENABLE 0x01000000ul
  73. #define PDL_LPC_CANCEL_USB_DISABLE 0x02000000ul
  74. #define PDL_LPC_CANCEL_USB_ENABLE 0x04000000ul
  75. /* Software Standby waiting time */
  76. #define PDL_LPC_STANDBY_64 0x00000001ul
  77. #define PDL_LPC_STANDBY_512 0x00000002ul
  78. #define PDL_LPC_STANDBY_1024 0x00000004ul
  79. #define PDL_LPC_STANDBY_2048 0x00000008ul
  80. #define PDL_LPC_STANDBY_4096 0x00000010ul
  81. #define PDL_LPC_STANDBY_16384 0x00000020ul
  82. #define PDL_LPC_STANDBY_32768 0x00000040ul
  83. #define PDL_LPC_STANDBY_65536 0x00000080ul
  84. #define PDL_LPC_STANDBY_131072 0x00000100ul
  85. #define PDL_LPC_STANDBY_262144 0x00000200ul
  86. #define PDL_LPC_STANDBY_524288 0x00000400ul
  87. /* Deep Software Standby waiting time */
  88. #define PDL_LPC_DEEP_STANDBY_64 0x00000800ul
  89. #define PDL_LPC_DEEP_STANDBY_512 0x00001000ul
  90. #define PDL_LPC_DEEP_STANDBY_1024 0x00002000ul
  91. #define PDL_LPC_DEEP_STANDBY_2048 0x00004000ul
  92. #define PDL_LPC_DEEP_STANDBY_4096 0x00008000ul
  93. #define PDL_LPC_DEEP_STANDBY_16384 0x00010000ul
  94. #define PDL_LPC_DEEP_STANDBY_32768 0x00020000ul
  95. #define PDL_LPC_DEEP_STANDBY_65536 0x00040000ul
  96. #define PDL_LPC_DEEP_STANDBY_131072 0x00080000ul
  97. #define PDL_LPC_DEEP_STANDBY_262144 0x00100000ul
  98. #define PDL_LPC_DEEP_STANDBY_524288 0x00200000ul
  99. /* Error monitoring */
  100. #define PDL_LPC_MODE_SLEEP 0x0001u
  101. #define PDL_LPC_MODE_ALL_MODULE_CLOCK_STOP 0x0002u
  102. #define PDL_LPC_MODE_SOFTWARE_STANDBY 0x0004u
  103. #define PDL_LPC_MODE_DEEP_SOFTWARE_STANDBY 0x0008u
  104. /* All-module clock stop cancellation modification */
  105. #define PDL_LPC_TMR_OFF 0x0010u
  106. #define PDL_LPC_TMR_UNIT_0 0x0020u
  107. #define PDL_LPC_TMR_UNIT_1 0x0040u
  108. #define PDL_LPC_TMR_BOTH 0x0080u
  109. /* I/O port retention cancellation */
  110. #define PDL_LPC_IO_RELEASE 0x0100u
  111. #endif
  112. /* End of file */