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usart.c 10 KB

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  1. /*
  2. * File : usart.c
  3. * This file is part of RT-Thread RTOS
  4. * COPYRIGHT (C) 2009, RT-Thread Development Team
  5. *
  6. * The license and distribution terms for this file may be
  7. * found in the file LICENSE in this distribution or at
  8. * http://www.rt-thread.org/license/LICENSE
  9. *
  10. * Change Logs:
  11. * Date Author Notes
  12. * 2009-01-05 Bernard the first version
  13. * 2010-03-29 Bernard remove interrupt Tx and DMA Rx mode
  14. * 2012-02-08 aozima update for F4.
  15. * 2012-07-28 aozima update for ART board.
  16. */
  17. #include "stm32f4xx.h"
  18. #include "usart.h"
  19. #include "board.h"
  20. #include <rtdevice.h>
  21. /* UART GPIO define. */
  22. #define UART1_GPIO_TX GPIO_Pin_6
  23. #define UART1_TX_PIN_SOURCE GPIO_PinSource6
  24. #define UART1_GPIO_RX GPIO_Pin_7
  25. #define UART1_RX_PIN_SOURCE GPIO_PinSource7
  26. #define UART1_GPIO GPIOB
  27. #define UART1_GPIO_RCC RCC_AHB1Periph_GPIOB
  28. #define RCC_APBPeriph_UART1 RCC_APB2Periph_USART1
  29. #define UART1_TX_DMA DMA1_Channel4
  30. #define UART1_RX_DMA DMA1_Channel5
  31. #define UART2_GPIO_TX GPIO_Pin_2
  32. #define UART2_TX_PIN_SOURCE GPIO_PinSource2
  33. #define UART2_GPIO_RX GPIO_Pin_3
  34. #define UART2_RX_PIN_SOURCE GPIO_PinSource3
  35. #define UART2_GPIO GPIOA
  36. #define UART2_GPIO_RCC RCC_AHB1Periph_GPIOA
  37. #define RCC_APBPeriph_UART2 RCC_APB1Periph_USART2
  38. #define UART2_TX_DMA DMA1_Channel4
  39. #define UART2_RX_DMA DMA1_Channel5
  40. #define UART3_GPIO_TX GPIO_Pin_8
  41. #define UART3_TX_PIN_SOURCE GPIO_PinSource8
  42. #define UART3_GPIO_RX GPIO_Pin_9
  43. #define UART3_RX_PIN_SOURCE GPIO_PinSource9
  44. #define UART3_GPIO GPIOD
  45. #define UART3_GPIO_RCC RCC_AHB1Periph_GPIOD
  46. #define RCC_APBPeriph_UART3 RCC_APB1Periph_USART3
  47. #define UART3_TX_DMA DMA1_Stream1
  48. #define UART3_RX_DMA DMA1_Stream3
  49. /* STM32 uart driver */
  50. struct stm32_uart
  51. {
  52. USART_TypeDef *uart_device;
  53. IRQn_Type irq;
  54. };
  55. static rt_err_t stm32_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
  56. {
  57. struct stm32_uart *uart;
  58. USART_InitTypeDef USART_InitStructure;
  59. RT_ASSERT(serial != RT_NULL);
  60. RT_ASSERT(cfg != RT_NULL);
  61. uart = (struct stm32_uart *)serial->parent.user_data;
  62. if (cfg->baud_rate == BAUD_RATE_9600)
  63. USART_InitStructure.USART_BaudRate = 9600;
  64. else if (cfg->baud_rate == BAUD_RATE_115200)
  65. USART_InitStructure.USART_BaudRate = 115200;
  66. if (cfg->data_bits == DATA_BITS_8)
  67. USART_InitStructure.USART_WordLength = USART_WordLength_8b;
  68. if (cfg->stop_bits == STOP_BITS_1)
  69. USART_InitStructure.USART_StopBits = USART_StopBits_1;
  70. else if (cfg->stop_bits == STOP_BITS_2)
  71. USART_InitStructure.USART_StopBits = USART_StopBits_2;
  72. USART_InitStructure.USART_Parity = USART_Parity_No;
  73. USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
  74. USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
  75. USART_Init(uart->uart_device, &USART_InitStructure);
  76. /* Enable USART */
  77. USART_Cmd(uart->uart_device, ENABLE);
  78. return RT_EOK;
  79. }
  80. static rt_err_t stm32_control(struct rt_serial_device *serial, int cmd, void *arg)
  81. {
  82. struct stm32_uart *uart;
  83. RT_ASSERT(serial != RT_NULL);
  84. uart = (struct stm32_uart *)serial->parent.user_data;
  85. switch (cmd)
  86. {
  87. case RT_DEVICE_CTRL_CLR_INT:
  88. /* disable rx irq */
  89. UART_DISABLE_IRQ(uart->irq);
  90. /* disable interrupt */
  91. USART_ITConfig(uart->uart_device, USART_IT_RXNE, DISABLE);
  92. break;
  93. case RT_DEVICE_CTRL_SET_INT:
  94. /* enable rx irq */
  95. UART_ENABLE_IRQ(uart->irq);
  96. /* enable interrupt */
  97. USART_ITConfig(uart->uart_device, USART_IT_RXNE, ENABLE);
  98. break;
  99. }
  100. return RT_EOK;
  101. }
  102. static int stm32_putc(struct rt_serial_device *serial, char c)
  103. {
  104. struct stm32_uart *uart;
  105. RT_ASSERT(serial != RT_NULL);
  106. uart = (struct stm32_uart *)serial->parent.user_data;
  107. while (!(uart->uart_device->SR & USART_FLAG_TXE));
  108. uart->uart_device->DR = c;
  109. return 1;
  110. }
  111. static int stm32_getc(struct rt_serial_device *serial)
  112. {
  113. int ch;
  114. struct stm32_uart *uart;
  115. RT_ASSERT(serial != RT_NULL);
  116. uart = (struct stm32_uart *)serial->parent.user_data;
  117. ch = -1;
  118. if (uart->uart_device->SR & USART_FLAG_RXNE)
  119. {
  120. ch = uart->uart_device->DR & 0xff;
  121. }
  122. return ch;
  123. }
  124. static const struct rt_uart_ops stm32_uart_ops =
  125. {
  126. stm32_configure,
  127. stm32_control,
  128. stm32_putc,
  129. stm32_getc,
  130. };
  131. #if defined(RT_USING_UART1)
  132. /* UART1 device driver structure */
  133. struct stm32_uart uart1 =
  134. {
  135. USART1,
  136. USART1_IRQn,
  137. };
  138. struct rt_serial_device serial1;
  139. void USART1_IRQHandler(void)
  140. {
  141. struct stm32_uart *uart;
  142. uart = &uart1;
  143. /* enter interrupt */
  144. rt_interrupt_enter();
  145. if (USART_GetITStatus(uart->uart_device, USART_IT_RXNE) != RESET)
  146. {
  147. rt_hw_serial_isr(&serial1, RT_SERIAL_EVENT_RX_IND);
  148. }
  149. if (USART_GetITStatus(uart->uart_device, USART_IT_TC) != RESET)
  150. {
  151. /* clear interrupt */
  152. USART_ClearITPendingBit(uart->uart_device, USART_IT_TC);
  153. }
  154. /* leave interrupt */
  155. rt_interrupt_leave();
  156. }
  157. #endif /* RT_USING_UART1 */
  158. #if defined(RT_USING_UART2)
  159. /* UART2 device driver structure */
  160. struct stm32_uart uart2 =
  161. {
  162. USART2,
  163. USART2_IRQn,
  164. };
  165. struct rt_serial_device serial2;
  166. void USART2_IRQHandler(void)
  167. {
  168. struct stm32_uart *uart;
  169. uart = &uart2;
  170. /* enter interrupt */
  171. rt_interrupt_enter();
  172. if (USART_GetITStatus(uart->uart_device, USART_IT_RXNE) != RESET)
  173. {
  174. rt_hw_serial_isr(&serial2, RT_SERIAL_EVENT_RX_IND);
  175. }
  176. if (USART_GetITStatus(uart->uart_device, USART_IT_TC) != RESET)
  177. {
  178. /* clear interrupt */
  179. USART_ClearITPendingBit(uart->uart_device, USART_IT_TC);
  180. }
  181. /* leave interrupt */
  182. rt_interrupt_leave();
  183. }
  184. #endif /* RT_USING_UART2 */
  185. #if defined(RT_USING_UART3)
  186. /* UART3 device driver structure */
  187. struct stm32_uart uart3 =
  188. {
  189. USART3,
  190. USART3_IRQn,
  191. };
  192. struct rt_serial_device serial3;
  193. void USART3_IRQHandler(void)
  194. {
  195. struct stm32_uart *uart;
  196. uart = &uart3;
  197. /* enter interrupt */
  198. rt_interrupt_enter();
  199. if (USART_GetITStatus(uart->uart_device, USART_IT_RXNE) != RESET)
  200. {
  201. rt_hw_serial_isr(&serial3, RT_SERIAL_EVENT_RX_IND);
  202. }
  203. if (USART_GetITStatus(uart->uart_device, USART_IT_TC) != RESET)
  204. {
  205. /* clear interrupt */
  206. USART_ClearITPendingBit(uart->uart_device, USART_IT_TC);
  207. }
  208. /* leave interrupt */
  209. rt_interrupt_leave();
  210. }
  211. #endif /* RT_USING_UART3 */
  212. static void RCC_Configuration(void)
  213. {
  214. #ifdef RT_USING_UART1
  215. /* Enable UART1 GPIO clocks */
  216. RCC_AHB1PeriphClockCmd(UART1_GPIO_RCC, ENABLE);
  217. /* Enable UART1 clock */
  218. RCC_APB2PeriphClockCmd(RCC_APBPeriph_UART1, ENABLE);
  219. #endif /* RT_USING_UART1 */
  220. #ifdef RT_USING_UART2
  221. /* Enable UART2 GPIO clocks */
  222. RCC_AHB1PeriphClockCmd(UART2_GPIO_RCC, ENABLE);
  223. /* Enable UART2 clock */
  224. RCC_APB1PeriphClockCmd(RCC_APBPeriph_UART2, ENABLE);
  225. #endif /* RT_USING_UART1 */
  226. #ifdef RT_USING_UART3
  227. /* Enable UART3 GPIO clocks */
  228. RCC_AHB1PeriphClockCmd(UART3_GPIO_RCC, ENABLE);
  229. /* Enable UART3 clock */
  230. RCC_APB1PeriphClockCmd(RCC_APBPeriph_UART3, ENABLE);
  231. #endif /* RT_USING_UART3 */
  232. }
  233. static void GPIO_Configuration(void)
  234. {
  235. GPIO_InitTypeDef GPIO_InitStructure;
  236. GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
  237. GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
  238. GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP;
  239. GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;
  240. #ifdef RT_USING_UART1
  241. /* Configure USART1 Rx/tx PIN */
  242. GPIO_InitStructure.GPIO_Pin = UART1_GPIO_RX | UART1_GPIO_TX;
  243. GPIO_Init(UART1_GPIO, &GPIO_InitStructure);
  244. /* Connect alternate function */
  245. GPIO_PinAFConfig(UART1_GPIO, UART1_TX_PIN_SOURCE, GPIO_AF_USART1);
  246. GPIO_PinAFConfig(UART1_GPIO, UART1_RX_PIN_SOURCE, GPIO_AF_USART1);
  247. #endif /* RT_USING_UART1 */
  248. #ifdef RT_USING_UART2
  249. /* Configure USART2 Rx/tx PIN */
  250. GPIO_InitStructure.GPIO_Pin = UART2_GPIO_RX | UART2_GPIO_TX;
  251. GPIO_Init(UART2_GPIO, &GPIO_InitStructure);
  252. /* Connect alternate function */
  253. GPIO_PinAFConfig(UART2_GPIO, UART2_TX_PIN_SOURCE, GPIO_AF_USART2);
  254. GPIO_PinAFConfig(UART2_GPIO, UART2_RX_PIN_SOURCE, GPIO_AF_USART2);
  255. #endif /* RT_USING_UART2 */
  256. #ifdef RT_USING_UART3
  257. /* Configure USART3 Rx/tx PIN */
  258. GPIO_InitStructure.GPIO_Pin = UART3_GPIO_TX | UART3_GPIO_RX;
  259. GPIO_Init(UART3_GPIO, &GPIO_InitStructure);
  260. /* Connect alternate function */
  261. GPIO_PinAFConfig(UART3_GPIO, UART3_TX_PIN_SOURCE, GPIO_AF_USART3);
  262. GPIO_PinAFConfig(UART3_GPIO, UART3_RX_PIN_SOURCE, GPIO_AF_USART3);
  263. #endif /* RT_USING_UART3 */
  264. }
  265. static void NVIC_Configuration(struct stm32_uart *uart)
  266. {
  267. NVIC_InitTypeDef NVIC_InitStructure;
  268. /* Enable the USART1 Interrupt */
  269. NVIC_InitStructure.NVIC_IRQChannel = uart->irq;
  270. NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 3;
  271. NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
  272. NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
  273. NVIC_Init(&NVIC_InitStructure);
  274. }
  275. int stm32_hw_usart_init(void)
  276. {
  277. struct stm32_uart *uart;
  278. struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
  279. RCC_Configuration();
  280. GPIO_Configuration();
  281. #ifdef RT_USING_UART1
  282. uart = &uart1;
  283. serial1.ops = &stm32_uart_ops;
  284. serial1.config = config;
  285. NVIC_Configuration(&uart1);
  286. /* register UART1 device */
  287. rt_hw_serial_register(&serial1,
  288. "uart1",
  289. RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
  290. uart);
  291. #endif /* RT_USING_UART1 */
  292. #ifdef RT_USING_UART2
  293. uart = &uart2;
  294. serial2.ops = &stm32_uart_ops;
  295. serial2.config = config;
  296. NVIC_Configuration(&uart2);
  297. /* register UART1 device */
  298. rt_hw_serial_register(&serial2,
  299. "uart2",
  300. RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
  301. uart);
  302. #endif /* RT_USING_UART2 */
  303. #ifdef RT_USING_UART3
  304. uart = &uart3;
  305. serial3.ops = &stm32_uart_ops;
  306. serial3.config = config;
  307. NVIC_Configuration(&uart3);
  308. /* register UART3 device */
  309. rt_hw_serial_register(&serial3,
  310. "uart3",
  311. RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
  312. uart);
  313. #endif /* RT_USING_UART3 */
  314. return 0;
  315. }
  316. INIT_BOARD_EXPORT(stm32_hw_usart_init);