rom.h 413 KB

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  1. //*****************************************************************************
  2. //
  3. // rom.h - Macros to facilitate calling functions in the ROM.
  4. //
  5. // Copyright (c) 2007-2014 Texas Instruments Incorporated. All rights reserved.
  6. // Software License Agreement
  7. //
  8. // Redistribution and use in source and binary forms, with or without
  9. // modification, are permitted provided that the following conditions
  10. // are met:
  11. //
  12. // Redistributions of source code must retain the above copyright
  13. // notice, this list of conditions and the following disclaimer.
  14. //
  15. // Redistributions in binary form must reproduce the above copyright
  16. // notice, this list of conditions and the following disclaimer in the
  17. // documentation and/or other materials provided with the
  18. // distribution.
  19. //
  20. // Neither the name of Texas Instruments Incorporated nor the names of
  21. // its contributors may be used to endorse or promote products derived
  22. // from this software without specific prior written permission.
  23. //
  24. // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  25. // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  26. // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  27. // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  28. // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  29. // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  30. // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  31. // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  32. // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  33. // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  34. // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  35. //
  36. // This is part of revision 2.1.0.12573 of the Tiva Peripheral Driver Library.
  37. //
  38. //*****************************************************************************
  39. #ifndef __DRIVERLIB_ROM_H__
  40. #define __DRIVERLIB_ROM_H__
  41. #ifndef DEPRECATED
  42. //*****************************************************************************
  43. //
  44. // ROM selection labels changed between TivaWare 2.0.1 and 2.1. The following
  45. // labels are intended to ensure backwards compatibility for applications
  46. // which have not yet been updated to use the replacement labels.
  47. //
  48. //*****************************************************************************
  49. #ifdef TARGET_IS_SNOWFLAKE_RA0
  50. #define TARGET_IS_TM4C129_RA0
  51. #endif
  52. #ifdef TARGET_IS_SNOWFLAKE_RA1
  53. #define TARGET_IS_TM4C129_RA1
  54. #endif
  55. #ifdef TARGET_IS_BLIZZARD_RA1
  56. #define TARGET_IS_TM4C123_RA1
  57. #endif
  58. #ifdef TARGET_IS_BLIZZARD_RA2
  59. #define TARGET_IS_TM4C123_RA2
  60. #endif
  61. #ifdef TARGET_IS_BLIZZARD_RA3
  62. #define TARGET_IS_TM4C123_RA3
  63. #endif
  64. #ifdef TARGET_IS_BLIZZARD_RB0
  65. #define TARGET_IS_TM4C123_RB0
  66. #endif
  67. #ifdef TARGET_IS_BLIZZARD_RB1
  68. #define TARGET_IS_TM4C123_RB1
  69. #endif
  70. #endif
  71. //*****************************************************************************
  72. //
  73. // Pointers to the main API tables.
  74. //
  75. //*****************************************************************************
  76. #define ROM_APITABLE ((uint32_t *)0x01000010)
  77. #define ROM_VERSION (ROM_APITABLE[0])
  78. #define ROM_UARTTABLE ((uint32_t *)(ROM_APITABLE[1]))
  79. #define ROM_SSITABLE ((uint32_t *)(ROM_APITABLE[2]))
  80. #define ROM_I2CTABLE ((uint32_t *)(ROM_APITABLE[3]))
  81. #define ROM_GPIOTABLE ((uint32_t *)(ROM_APITABLE[4]))
  82. #define ROM_ADCTABLE ((uint32_t *)(ROM_APITABLE[5]))
  83. #define ROM_COMPARATORTABLE ((uint32_t *)(ROM_APITABLE[6]))
  84. #define ROM_FLASHTABLE ((uint32_t *)(ROM_APITABLE[7]))
  85. #define ROM_PWMTABLE ((uint32_t *)(ROM_APITABLE[8]))
  86. #define ROM_QEITABLE ((uint32_t *)(ROM_APITABLE[9]))
  87. #define ROM_SYSTICKTABLE ((uint32_t *)(ROM_APITABLE[10]))
  88. #define ROM_TIMERTABLE ((uint32_t *)(ROM_APITABLE[11]))
  89. #define ROM_WATCHDOGTABLE ((uint32_t *)(ROM_APITABLE[12]))
  90. #define ROM_SYSCTLTABLE ((uint32_t *)(ROM_APITABLE[13]))
  91. #define ROM_INTERRUPTTABLE ((uint32_t *)(ROM_APITABLE[14]))
  92. #define ROM_USBTABLE ((uint32_t *)(ROM_APITABLE[16]))
  93. #define ROM_UDMATABLE ((uint32_t *)(ROM_APITABLE[17]))
  94. #define ROM_CANTABLE ((uint32_t *)(ROM_APITABLE[18]))
  95. #define ROM_HIBERNATETABLE ((uint32_t *)(ROM_APITABLE[19]))
  96. #define ROM_MPUTABLE ((uint32_t *)(ROM_APITABLE[20]))
  97. #define ROM_SOFTWARETABLE ((uint32_t *)(ROM_APITABLE[21]))
  98. #define ROM_EPITABLE ((uint32_t *)(ROM_APITABLE[23]))
  99. #define ROM_EEPROMTABLE ((uint32_t *)(ROM_APITABLE[24]))
  100. #define ROM_FPUTABLE ((uint32_t *)(ROM_APITABLE[26]))
  101. #define ROM_SMBUSTABLE ((uint32_t *)(ROM_APITABLE[29]))
  102. #define ROM_SYSEXCTABLE ((uint32_t *)(ROM_APITABLE[30]))
  103. #define ROM_ONEWIRETABLE ((uint32_t *)(ROM_APITABLE[34]))
  104. #define ROM_SPIFLASHTABLE ((uint32_t *)(ROM_APITABLE[38]))
  105. #define ROM_LCDTABLE ((uint32_t *)(ROM_APITABLE[41]))
  106. #define ROM_EMACTABLE ((uint32_t *)(ROM_APITABLE[42]))
  107. #define ROM_AESTABLE ((uint32_t *)(ROM_APITABLE[43]))
  108. #define ROM_CRCTABLE ((uint32_t *)(ROM_APITABLE[44]))
  109. #define ROM_DESTABLE ((uint32_t *)(ROM_APITABLE[45]))
  110. #define ROM_SHAMD5TABLE ((uint32_t *)(ROM_APITABLE[46]))
  111. //*****************************************************************************
  112. //
  113. // Macros for calling ROM functions in the ADC API.
  114. //
  115. //*****************************************************************************
  116. #if defined(TARGET_IS_TM4C123_RA1) || \
  117. defined(TARGET_IS_TM4C123_RA3) || \
  118. defined(TARGET_IS_TM4C123_RB1) || \
  119. defined(TARGET_IS_TM4C129_RA0) || \
  120. defined(TARGET_IS_TM4C129_RA1)
  121. #define ROM_ADCSequenceDataGet \
  122. ((int32_t (*)(uint32_t ui32Base, \
  123. uint32_t ui32SequenceNum, \
  124. uint32_t *pui32Buffer))ROM_ADCTABLE[0])
  125. #endif
  126. #if defined(TARGET_IS_TM4C123_RA1) || \
  127. defined(TARGET_IS_TM4C123_RA3) || \
  128. defined(TARGET_IS_TM4C123_RB1) || \
  129. defined(TARGET_IS_TM4C129_RA0) || \
  130. defined(TARGET_IS_TM4C129_RA1)
  131. #define ROM_ADCIntDisable \
  132. ((void (*)(uint32_t ui32Base, \
  133. uint32_t ui32SequenceNum))ROM_ADCTABLE[1])
  134. #endif
  135. #if defined(TARGET_IS_TM4C123_RA1) || \
  136. defined(TARGET_IS_TM4C123_RA3) || \
  137. defined(TARGET_IS_TM4C123_RB1) || \
  138. defined(TARGET_IS_TM4C129_RA0) || \
  139. defined(TARGET_IS_TM4C129_RA1)
  140. #define ROM_ADCIntEnable \
  141. ((void (*)(uint32_t ui32Base, \
  142. uint32_t ui32SequenceNum))ROM_ADCTABLE[2])
  143. #endif
  144. #if defined(TARGET_IS_TM4C123_RA1) || \
  145. defined(TARGET_IS_TM4C123_RA3) || \
  146. defined(TARGET_IS_TM4C123_RB1) || \
  147. defined(TARGET_IS_TM4C129_RA0) || \
  148. defined(TARGET_IS_TM4C129_RA1)
  149. #define ROM_ADCIntStatus \
  150. ((uint32_t (*)(uint32_t ui32Base, \
  151. uint32_t ui32SequenceNum, \
  152. bool bMasked))ROM_ADCTABLE[3])
  153. #endif
  154. #if defined(TARGET_IS_TM4C123_RA1) || \
  155. defined(TARGET_IS_TM4C123_RA3) || \
  156. defined(TARGET_IS_TM4C123_RB1) || \
  157. defined(TARGET_IS_TM4C129_RA0) || \
  158. defined(TARGET_IS_TM4C129_RA1)
  159. #define ROM_ADCIntClear \
  160. ((void (*)(uint32_t ui32Base, \
  161. uint32_t ui32SequenceNum))ROM_ADCTABLE[4])
  162. #endif
  163. #if defined(TARGET_IS_TM4C123_RA1) || \
  164. defined(TARGET_IS_TM4C123_RA3) || \
  165. defined(TARGET_IS_TM4C123_RB1) || \
  166. defined(TARGET_IS_TM4C129_RA0) || \
  167. defined(TARGET_IS_TM4C129_RA1)
  168. #define ROM_ADCSequenceEnable \
  169. ((void (*)(uint32_t ui32Base, \
  170. uint32_t ui32SequenceNum))ROM_ADCTABLE[5])
  171. #endif
  172. #if defined(TARGET_IS_TM4C123_RA1) || \
  173. defined(TARGET_IS_TM4C123_RA3) || \
  174. defined(TARGET_IS_TM4C123_RB1) || \
  175. defined(TARGET_IS_TM4C129_RA0) || \
  176. defined(TARGET_IS_TM4C129_RA1)
  177. #define ROM_ADCSequenceDisable \
  178. ((void (*)(uint32_t ui32Base, \
  179. uint32_t ui32SequenceNum))ROM_ADCTABLE[6])
  180. #endif
  181. #if defined(TARGET_IS_TM4C123_RA1) || \
  182. defined(TARGET_IS_TM4C123_RA3) || \
  183. defined(TARGET_IS_TM4C123_RB1) || \
  184. defined(TARGET_IS_TM4C129_RA0) || \
  185. defined(TARGET_IS_TM4C129_RA1)
  186. #define ROM_ADCSequenceConfigure \
  187. ((void (*)(uint32_t ui32Base, \
  188. uint32_t ui32SequenceNum, \
  189. uint32_t ui32Trigger, \
  190. uint32_t ui32Priority))ROM_ADCTABLE[7])
  191. #endif
  192. #if defined(TARGET_IS_TM4C123_RA1) || \
  193. defined(TARGET_IS_TM4C123_RA3) || \
  194. defined(TARGET_IS_TM4C123_RB1) || \
  195. defined(TARGET_IS_TM4C129_RA0) || \
  196. defined(TARGET_IS_TM4C129_RA1)
  197. #define ROM_ADCSequenceStepConfigure \
  198. ((void (*)(uint32_t ui32Base, \
  199. uint32_t ui32SequenceNum, \
  200. uint32_t ui32Step, \
  201. uint32_t ui32Config))ROM_ADCTABLE[8])
  202. #endif
  203. #if defined(TARGET_IS_TM4C123_RA1) || \
  204. defined(TARGET_IS_TM4C123_RA3) || \
  205. defined(TARGET_IS_TM4C123_RB1) || \
  206. defined(TARGET_IS_TM4C129_RA0) || \
  207. defined(TARGET_IS_TM4C129_RA1)
  208. #define ROM_ADCSequenceOverflow \
  209. ((int32_t (*)(uint32_t ui32Base, \
  210. uint32_t ui32SequenceNum))ROM_ADCTABLE[9])
  211. #endif
  212. #if defined(TARGET_IS_TM4C123_RA1) || \
  213. defined(TARGET_IS_TM4C123_RA3) || \
  214. defined(TARGET_IS_TM4C123_RB1) || \
  215. defined(TARGET_IS_TM4C129_RA0) || \
  216. defined(TARGET_IS_TM4C129_RA1)
  217. #define ROM_ADCSequenceOverflowClear \
  218. ((void (*)(uint32_t ui32Base, \
  219. uint32_t ui32SequenceNum))ROM_ADCTABLE[10])
  220. #endif
  221. #if defined(TARGET_IS_TM4C123_RA1) || \
  222. defined(TARGET_IS_TM4C123_RA3) || \
  223. defined(TARGET_IS_TM4C123_RB1) || \
  224. defined(TARGET_IS_TM4C129_RA0) || \
  225. defined(TARGET_IS_TM4C129_RA1)
  226. #define ROM_ADCSequenceUnderflow \
  227. ((int32_t (*)(uint32_t ui32Base, \
  228. uint32_t ui32SequenceNum))ROM_ADCTABLE[11])
  229. #endif
  230. #if defined(TARGET_IS_TM4C123_RA1) || \
  231. defined(TARGET_IS_TM4C123_RA3) || \
  232. defined(TARGET_IS_TM4C123_RB1) || \
  233. defined(TARGET_IS_TM4C129_RA0) || \
  234. defined(TARGET_IS_TM4C129_RA1)
  235. #define ROM_ADCSequenceUnderflowClear \
  236. ((void (*)(uint32_t ui32Base, \
  237. uint32_t ui32SequenceNum))ROM_ADCTABLE[12])
  238. #endif
  239. #if defined(TARGET_IS_TM4C123_RA1) || \
  240. defined(TARGET_IS_TM4C123_RA3) || \
  241. defined(TARGET_IS_TM4C123_RB1) || \
  242. defined(TARGET_IS_TM4C129_RA0) || \
  243. defined(TARGET_IS_TM4C129_RA1)
  244. #define ROM_ADCProcessorTrigger \
  245. ((void (*)(uint32_t ui32Base, \
  246. uint32_t ui32SequenceNum))ROM_ADCTABLE[13])
  247. #endif
  248. #if defined(TARGET_IS_TM4C123_RA1) || \
  249. defined(TARGET_IS_TM4C123_RA3) || \
  250. defined(TARGET_IS_TM4C123_RB1) || \
  251. defined(TARGET_IS_TM4C129_RA0) || \
  252. defined(TARGET_IS_TM4C129_RA1)
  253. #define ROM_ADCHardwareOversampleConfigure \
  254. ((void (*)(uint32_t ui32Base, \
  255. uint32_t ui32Factor))ROM_ADCTABLE[14])
  256. #endif
  257. #if defined(TARGET_IS_TM4C123_RA1) || \
  258. defined(TARGET_IS_TM4C123_RA3) || \
  259. defined(TARGET_IS_TM4C123_RB1) || \
  260. defined(TARGET_IS_TM4C129_RA0) || \
  261. defined(TARGET_IS_TM4C129_RA1)
  262. #define ROM_ADCComparatorConfigure \
  263. ((void (*)(uint32_t ui32Base, \
  264. uint32_t ui32Comp, \
  265. uint32_t ui32Config))ROM_ADCTABLE[15])
  266. #endif
  267. #if defined(TARGET_IS_TM4C123_RA1) || \
  268. defined(TARGET_IS_TM4C123_RA3) || \
  269. defined(TARGET_IS_TM4C123_RB1) || \
  270. defined(TARGET_IS_TM4C129_RA0) || \
  271. defined(TARGET_IS_TM4C129_RA1)
  272. #define ROM_ADCComparatorRegionSet \
  273. ((void (*)(uint32_t ui32Base, \
  274. uint32_t ui32Comp, \
  275. uint32_t ui32LowRef, \
  276. uint32_t ui32HighRef))ROM_ADCTABLE[16])
  277. #endif
  278. #if defined(TARGET_IS_TM4C123_RA1) || \
  279. defined(TARGET_IS_TM4C123_RA3) || \
  280. defined(TARGET_IS_TM4C123_RB1) || \
  281. defined(TARGET_IS_TM4C129_RA0) || \
  282. defined(TARGET_IS_TM4C129_RA1)
  283. #define ROM_ADCComparatorReset \
  284. ((void (*)(uint32_t ui32Base, \
  285. uint32_t ui32Comp, \
  286. bool bTrigger, \
  287. bool bInterrupt))ROM_ADCTABLE[17])
  288. #endif
  289. #if defined(TARGET_IS_TM4C123_RA1) || \
  290. defined(TARGET_IS_TM4C123_RA3) || \
  291. defined(TARGET_IS_TM4C123_RB1) || \
  292. defined(TARGET_IS_TM4C129_RA0) || \
  293. defined(TARGET_IS_TM4C129_RA1)
  294. #define ROM_ADCComparatorIntDisable \
  295. ((void (*)(uint32_t ui32Base, \
  296. uint32_t ui32SequenceNum))ROM_ADCTABLE[18])
  297. #endif
  298. #if defined(TARGET_IS_TM4C123_RA1) || \
  299. defined(TARGET_IS_TM4C123_RA3) || \
  300. defined(TARGET_IS_TM4C123_RB1) || \
  301. defined(TARGET_IS_TM4C129_RA0) || \
  302. defined(TARGET_IS_TM4C129_RA1)
  303. #define ROM_ADCComparatorIntEnable \
  304. ((void (*)(uint32_t ui32Base, \
  305. uint32_t ui32SequenceNum))ROM_ADCTABLE[19])
  306. #endif
  307. #if defined(TARGET_IS_TM4C123_RA1) || \
  308. defined(TARGET_IS_TM4C123_RA3) || \
  309. defined(TARGET_IS_TM4C123_RB1) || \
  310. defined(TARGET_IS_TM4C129_RA0) || \
  311. defined(TARGET_IS_TM4C129_RA1)
  312. #define ROM_ADCComparatorIntStatus \
  313. ((uint32_t (*)(uint32_t ui32Base))ROM_ADCTABLE[20])
  314. #endif
  315. #if defined(TARGET_IS_TM4C123_RA1) || \
  316. defined(TARGET_IS_TM4C123_RA3) || \
  317. defined(TARGET_IS_TM4C123_RB1) || \
  318. defined(TARGET_IS_TM4C129_RA0) || \
  319. defined(TARGET_IS_TM4C129_RA1)
  320. #define ROM_ADCComparatorIntClear \
  321. ((void (*)(uint32_t ui32Base, \
  322. uint32_t ui32Status))ROM_ADCTABLE[21])
  323. #endif
  324. #if defined(TARGET_IS_TM4C123_RA1) || \
  325. defined(TARGET_IS_TM4C123_RA3) || \
  326. defined(TARGET_IS_TM4C123_RB1) || \
  327. defined(TARGET_IS_TM4C129_RA0) || \
  328. defined(TARGET_IS_TM4C129_RA1)
  329. #define ROM_ADCReferenceSet \
  330. ((void (*)(uint32_t ui32Base, \
  331. uint32_t ui32Ref))ROM_ADCTABLE[22])
  332. #endif
  333. #if defined(TARGET_IS_TM4C123_RA1) || \
  334. defined(TARGET_IS_TM4C123_RA3) || \
  335. defined(TARGET_IS_TM4C123_RB1) || \
  336. defined(TARGET_IS_TM4C129_RA0) || \
  337. defined(TARGET_IS_TM4C129_RA1)
  338. #define ROM_ADCReferenceGet \
  339. ((uint32_t (*)(uint32_t ui32Base))ROM_ADCTABLE[23])
  340. #endif
  341. #if defined(TARGET_IS_TM4C123_RA1) || \
  342. defined(TARGET_IS_TM4C123_RA3) || \
  343. defined(TARGET_IS_TM4C123_RB1) || \
  344. defined(TARGET_IS_TM4C129_RA0) || \
  345. defined(TARGET_IS_TM4C129_RA1)
  346. #define ROM_ADCPhaseDelaySet \
  347. ((void (*)(uint32_t ui32Base, \
  348. uint32_t ui32Phase))ROM_ADCTABLE[24])
  349. #endif
  350. #if defined(TARGET_IS_TM4C123_RA1) || \
  351. defined(TARGET_IS_TM4C123_RA3) || \
  352. defined(TARGET_IS_TM4C123_RB1) || \
  353. defined(TARGET_IS_TM4C129_RA0) || \
  354. defined(TARGET_IS_TM4C129_RA1)
  355. #define ROM_ADCPhaseDelayGet \
  356. ((uint32_t (*)(uint32_t ui32Base))ROM_ADCTABLE[25])
  357. #endif
  358. #if defined(TARGET_IS_TM4C129_RA0) || \
  359. defined(TARGET_IS_TM4C129_RA1)
  360. #define ROM_ADCIntClearEx \
  361. ((void (*)(uint32_t ui32Base, \
  362. uint32_t ui32IntFlags))ROM_ADCTABLE[28])
  363. #endif
  364. #if defined(TARGET_IS_TM4C129_RA0) || \
  365. defined(TARGET_IS_TM4C129_RA1)
  366. #define ROM_ADCIntDisableEx \
  367. ((void (*)(uint32_t ui32Base, \
  368. uint32_t ui32IntFlags))ROM_ADCTABLE[29])
  369. #endif
  370. #if defined(TARGET_IS_TM4C129_RA0) || \
  371. defined(TARGET_IS_TM4C129_RA1)
  372. #define ROM_ADCIntEnableEx \
  373. ((void (*)(uint32_t ui32Base, \
  374. uint32_t ui32IntFlags))ROM_ADCTABLE[30])
  375. #endif
  376. #if defined(TARGET_IS_TM4C129_RA0) || \
  377. defined(TARGET_IS_TM4C129_RA1)
  378. #define ROM_ADCIntStatusEx \
  379. ((uint32_t (*)(uint32_t ui32Base, \
  380. bool bMasked))ROM_ADCTABLE[31])
  381. #endif
  382. #if defined(TARGET_IS_TM4C129_RA0) || \
  383. defined(TARGET_IS_TM4C129_RA1)
  384. #define ROM_ADCSequenceDMAEnable \
  385. ((void (*)(uint32_t ui32Base, \
  386. uint32_t ui32SequenceNum))ROM_ADCTABLE[32])
  387. #endif
  388. #if defined(TARGET_IS_TM4C129_RA0) || \
  389. defined(TARGET_IS_TM4C129_RA1)
  390. #define ROM_ADCSequenceDMADisable \
  391. ((void (*)(uint32_t ui32Base, \
  392. uint32_t ui32SequenceNum))ROM_ADCTABLE[33])
  393. #endif
  394. #if defined(TARGET_IS_TM4C129_RA0) || \
  395. defined(TARGET_IS_TM4C129_RA1)
  396. #define ROM_ADCBusy \
  397. ((bool (*)(uint32_t ui32Base))ROM_ADCTABLE[34])
  398. #endif
  399. //*****************************************************************************
  400. //
  401. // Macros for calling ROM functions in the AES API.
  402. //
  403. //*****************************************************************************
  404. #if defined(TARGET_IS_TM4C129_RA0) || \
  405. defined(TARGET_IS_TM4C129_RA1)
  406. #define ROM_AESIntStatus \
  407. ((uint32_t (*)(uint32_t ui32Base, \
  408. bool bMasked))ROM_AESTABLE[0])
  409. #endif
  410. #if defined(TARGET_IS_TM4C129_RA0) || \
  411. defined(TARGET_IS_TM4C129_RA1)
  412. #define ROM_AESAuthLengthSet \
  413. ((void (*)(uint32_t ui32Base, \
  414. uint32_t ui32Length))ROM_AESTABLE[1])
  415. #endif
  416. #if defined(TARGET_IS_TM4C129_RA0) || \
  417. defined(TARGET_IS_TM4C129_RA1)
  418. #define ROM_AESConfigSet \
  419. ((void (*)(uint32_t ui32Base, \
  420. uint32_t ui32Config))ROM_AESTABLE[2])
  421. #endif
  422. #if defined(TARGET_IS_TM4C129_RA0) || \
  423. defined(TARGET_IS_TM4C129_RA1)
  424. #define ROM_AESDataAuth \
  425. ((bool (*)(uint32_t ui32Base, \
  426. uint32_t *pui32Src, \
  427. uint32_t ui32Length, \
  428. uint32_t *pui32Tag))ROM_AESTABLE[3])
  429. #endif
  430. #if defined(TARGET_IS_TM4C129_RA0) || \
  431. defined(TARGET_IS_TM4C129_RA1)
  432. #define ROM_AESDataProcess \
  433. ((bool (*)(uint32_t ui32Base, \
  434. uint32_t *pui32Src, \
  435. uint32_t *pui32Dest, \
  436. uint32_t ui32Length))ROM_AESTABLE[4])
  437. #endif
  438. #if defined(TARGET_IS_TM4C129_RA0) || \
  439. defined(TARGET_IS_TM4C129_RA1)
  440. #define ROM_AESDataProcessAuth \
  441. ((bool (*)(uint32_t ui32Base, \
  442. uint32_t *pui32Src, \
  443. uint32_t *pui32Dest, \
  444. uint32_t ui32Length, \
  445. uint32_t *pui32AuthSrc, \
  446. uint32_t ui32AuthLength, \
  447. uint32_t *pui32Tag))ROM_AESTABLE[5])
  448. #endif
  449. #if defined(TARGET_IS_TM4C129_RA0) || \
  450. defined(TARGET_IS_TM4C129_RA1)
  451. #define ROM_AESDataRead \
  452. ((void (*)(uint32_t ui32Base, \
  453. uint32_t *pui32Dest))ROM_AESTABLE[6])
  454. #endif
  455. #if defined(TARGET_IS_TM4C129_RA0) || \
  456. defined(TARGET_IS_TM4C129_RA1)
  457. #define ROM_AESDataReadNonBlocking \
  458. ((bool (*)(uint32_t ui32Base, \
  459. uint32_t *pui32Dest))ROM_AESTABLE[7])
  460. #endif
  461. #if defined(TARGET_IS_TM4C129_RA0) || \
  462. defined(TARGET_IS_TM4C129_RA1)
  463. #define ROM_AESDataWrite \
  464. ((void (*)(uint32_t ui32Base, \
  465. uint32_t *pui32Src))ROM_AESTABLE[8])
  466. #endif
  467. #if defined(TARGET_IS_TM4C129_RA0) || \
  468. defined(TARGET_IS_TM4C129_RA1)
  469. #define ROM_AESDataWriteNonBlocking \
  470. ((bool (*)(uint32_t ui32Base, \
  471. uint32_t *pui32Src))ROM_AESTABLE[9])
  472. #endif
  473. #if defined(TARGET_IS_TM4C129_RA0) || \
  474. defined(TARGET_IS_TM4C129_RA1)
  475. #define ROM_AESDMADisable \
  476. ((void (*)(uint32_t ui32Base, \
  477. uint32_t ui32Flags))ROM_AESTABLE[10])
  478. #endif
  479. #if defined(TARGET_IS_TM4C129_RA0) || \
  480. defined(TARGET_IS_TM4C129_RA1)
  481. #define ROM_AESDMAEnable \
  482. ((void (*)(uint32_t ui32Base, \
  483. uint32_t ui32Flags))ROM_AESTABLE[11])
  484. #endif
  485. #if defined(TARGET_IS_TM4C129_RA0) || \
  486. defined(TARGET_IS_TM4C129_RA1)
  487. #define ROM_AESIntClear \
  488. ((void (*)(uint32_t ui32Base, \
  489. uint32_t ui32IntFlags))ROM_AESTABLE[12])
  490. #endif
  491. #if defined(TARGET_IS_TM4C129_RA0) || \
  492. defined(TARGET_IS_TM4C129_RA1)
  493. #define ROM_AESIntDisable \
  494. ((void (*)(uint32_t ui32Base, \
  495. uint32_t ui32IntFlags))ROM_AESTABLE[13])
  496. #endif
  497. #if defined(TARGET_IS_TM4C129_RA0) || \
  498. defined(TARGET_IS_TM4C129_RA1)
  499. #define ROM_AESIntEnable \
  500. ((void (*)(uint32_t ui32Base, \
  501. uint32_t ui32IntFlags))ROM_AESTABLE[14])
  502. #endif
  503. #if defined(TARGET_IS_TM4C129_RA0) || \
  504. defined(TARGET_IS_TM4C129_RA1)
  505. #define ROM_AESIVSet \
  506. ((void (*)(uint32_t ui32Base, \
  507. uint32_t *pui32IVdata))ROM_AESTABLE[15])
  508. #endif
  509. #if defined(TARGET_IS_TM4C129_RA0) || \
  510. defined(TARGET_IS_TM4C129_RA1)
  511. #define ROM_AESKey1Set \
  512. ((void (*)(uint32_t ui32Base, \
  513. uint32_t *pui32Key, \
  514. uint32_t ui32Keysize))ROM_AESTABLE[16])
  515. #endif
  516. #if defined(TARGET_IS_TM4C129_RA0) || \
  517. defined(TARGET_IS_TM4C129_RA1)
  518. #define ROM_AESKey2Set \
  519. ((void (*)(uint32_t ui32Base, \
  520. uint32_t *pui32Key, \
  521. uint32_t ui32Keysize))ROM_AESTABLE[17])
  522. #endif
  523. #if defined(TARGET_IS_TM4C129_RA0) || \
  524. defined(TARGET_IS_TM4C129_RA1)
  525. #define ROM_AESKey3Set \
  526. ((void (*)(uint32_t ui32Base, \
  527. uint32_t *pui32Key))ROM_AESTABLE[18])
  528. #endif
  529. #if defined(TARGET_IS_TM4C129_RA0) || \
  530. defined(TARGET_IS_TM4C129_RA1)
  531. #define ROM_AESLengthSet \
  532. ((void (*)(uint32_t ui32Base, \
  533. uint64_t ui64Length))ROM_AESTABLE[19])
  534. #endif
  535. #if defined(TARGET_IS_TM4C129_RA0) || \
  536. defined(TARGET_IS_TM4C129_RA1)
  537. #define ROM_AESReset \
  538. ((void (*)(uint32_t ui32Base))ROM_AESTABLE[20])
  539. #endif
  540. #if defined(TARGET_IS_TM4C129_RA0) || \
  541. defined(TARGET_IS_TM4C129_RA1)
  542. #define ROM_AESTagRead \
  543. ((void (*)(uint32_t ui32Base, \
  544. uint32_t *pui32TagData))ROM_AESTABLE[21])
  545. #endif
  546. #if defined(TARGET_IS_TM4C129_RA1)
  547. #define ROM_AESIVRead \
  548. ((void (*)(uint32_t ui32Base, \
  549. uint32_t *pui32IVdata))ROM_AESTABLE[22])
  550. #endif
  551. //*****************************************************************************
  552. //
  553. // Macros for calling ROM functions in the CAN API.
  554. //
  555. //*****************************************************************************
  556. #if defined(TARGET_IS_TM4C123_RA1) || \
  557. defined(TARGET_IS_TM4C123_RA3) || \
  558. defined(TARGET_IS_TM4C123_RB1) || \
  559. defined(TARGET_IS_TM4C129_RA0) || \
  560. defined(TARGET_IS_TM4C129_RA1)
  561. #define ROM_CANIntClear \
  562. ((void (*)(uint32_t ui32Base, \
  563. uint32_t ui32IntClr))ROM_CANTABLE[0])
  564. #endif
  565. #if defined(TARGET_IS_TM4C123_RA1) || \
  566. defined(TARGET_IS_TM4C123_RA3) || \
  567. defined(TARGET_IS_TM4C123_RB1) || \
  568. defined(TARGET_IS_TM4C129_RA0) || \
  569. defined(TARGET_IS_TM4C129_RA1)
  570. #define ROM_CANInit \
  571. ((void (*)(uint32_t ui32Base))ROM_CANTABLE[1])
  572. #endif
  573. #if defined(TARGET_IS_TM4C123_RA1) || \
  574. defined(TARGET_IS_TM4C123_RA3) || \
  575. defined(TARGET_IS_TM4C123_RB1) || \
  576. defined(TARGET_IS_TM4C129_RA0) || \
  577. defined(TARGET_IS_TM4C129_RA1)
  578. #define ROM_CANEnable \
  579. ((void (*)(uint32_t ui32Base))ROM_CANTABLE[2])
  580. #endif
  581. #if defined(TARGET_IS_TM4C123_RA1) || \
  582. defined(TARGET_IS_TM4C123_RA3) || \
  583. defined(TARGET_IS_TM4C123_RB1) || \
  584. defined(TARGET_IS_TM4C129_RA0) || \
  585. defined(TARGET_IS_TM4C129_RA1)
  586. #define ROM_CANDisable \
  587. ((void (*)(uint32_t ui32Base))ROM_CANTABLE[3])
  588. #endif
  589. #if defined(TARGET_IS_TM4C123_RA1) || \
  590. defined(TARGET_IS_TM4C123_RA3) || \
  591. defined(TARGET_IS_TM4C123_RB1) || \
  592. defined(TARGET_IS_TM4C129_RA0) || \
  593. defined(TARGET_IS_TM4C129_RA1)
  594. #define ROM_CANBitTimingSet \
  595. ((void (*)(uint32_t ui32Base, \
  596. tCANBitClkParms *psClkParms))ROM_CANTABLE[4])
  597. #endif
  598. #if defined(TARGET_IS_TM4C123_RA1) || \
  599. defined(TARGET_IS_TM4C123_RA3) || \
  600. defined(TARGET_IS_TM4C123_RB1) || \
  601. defined(TARGET_IS_TM4C129_RA0) || \
  602. defined(TARGET_IS_TM4C129_RA1)
  603. #define ROM_CANBitTimingGet \
  604. ((void (*)(uint32_t ui32Base, \
  605. tCANBitClkParms *psClkParms))ROM_CANTABLE[5])
  606. #endif
  607. #if defined(TARGET_IS_TM4C123_RA1) || \
  608. defined(TARGET_IS_TM4C123_RA3) || \
  609. defined(TARGET_IS_TM4C123_RB1) || \
  610. defined(TARGET_IS_TM4C129_RA0) || \
  611. defined(TARGET_IS_TM4C129_RA1)
  612. #define ROM_CANMessageSet \
  613. ((void (*)(uint32_t ui32Base, \
  614. uint32_t ui32ObjID, \
  615. tCANMsgObject *psMsgObject, \
  616. tMsgObjType eMsgType))ROM_CANTABLE[6])
  617. #endif
  618. #if defined(TARGET_IS_TM4C123_RA1) || \
  619. defined(TARGET_IS_TM4C123_RA3) || \
  620. defined(TARGET_IS_TM4C123_RB1) || \
  621. defined(TARGET_IS_TM4C129_RA0) || \
  622. defined(TARGET_IS_TM4C129_RA1)
  623. #define ROM_CANMessageGet \
  624. ((void (*)(uint32_t ui32Base, \
  625. uint32_t ui32ObjID, \
  626. tCANMsgObject *psMsgObject, \
  627. bool bClrPendingInt))ROM_CANTABLE[7])
  628. #endif
  629. #if defined(TARGET_IS_TM4C123_RA1) || \
  630. defined(TARGET_IS_TM4C123_RA3) || \
  631. defined(TARGET_IS_TM4C123_RB1) || \
  632. defined(TARGET_IS_TM4C129_RA0) || \
  633. defined(TARGET_IS_TM4C129_RA1)
  634. #define ROM_CANStatusGet \
  635. ((uint32_t (*)(uint32_t ui32Base, \
  636. tCANStsReg eStatusReg))ROM_CANTABLE[8])
  637. #endif
  638. #if defined(TARGET_IS_TM4C123_RA1) || \
  639. defined(TARGET_IS_TM4C123_RA3) || \
  640. defined(TARGET_IS_TM4C123_RB1) || \
  641. defined(TARGET_IS_TM4C129_RA0) || \
  642. defined(TARGET_IS_TM4C129_RA1)
  643. #define ROM_CANMessageClear \
  644. ((void (*)(uint32_t ui32Base, \
  645. uint32_t ui32ObjID))ROM_CANTABLE[9])
  646. #endif
  647. #if defined(TARGET_IS_TM4C123_RA1) || \
  648. defined(TARGET_IS_TM4C123_RA3) || \
  649. defined(TARGET_IS_TM4C123_RB1) || \
  650. defined(TARGET_IS_TM4C129_RA0) || \
  651. defined(TARGET_IS_TM4C129_RA1)
  652. #define ROM_CANIntEnable \
  653. ((void (*)(uint32_t ui32Base, \
  654. uint32_t ui32IntFlags))ROM_CANTABLE[10])
  655. #endif
  656. #if defined(TARGET_IS_TM4C123_RA1) || \
  657. defined(TARGET_IS_TM4C123_RA3) || \
  658. defined(TARGET_IS_TM4C123_RB1) || \
  659. defined(TARGET_IS_TM4C129_RA0) || \
  660. defined(TARGET_IS_TM4C129_RA1)
  661. #define ROM_CANIntDisable \
  662. ((void (*)(uint32_t ui32Base, \
  663. uint32_t ui32IntFlags))ROM_CANTABLE[11])
  664. #endif
  665. #if defined(TARGET_IS_TM4C123_RA1) || \
  666. defined(TARGET_IS_TM4C123_RA3) || \
  667. defined(TARGET_IS_TM4C123_RB1) || \
  668. defined(TARGET_IS_TM4C129_RA0) || \
  669. defined(TARGET_IS_TM4C129_RA1)
  670. #define ROM_CANIntStatus \
  671. ((uint32_t (*)(uint32_t ui32Base, \
  672. tCANIntStsReg eIntStsReg))ROM_CANTABLE[12])
  673. #endif
  674. #if defined(TARGET_IS_TM4C123_RA1) || \
  675. defined(TARGET_IS_TM4C123_RA3) || \
  676. defined(TARGET_IS_TM4C123_RB1) || \
  677. defined(TARGET_IS_TM4C129_RA0) || \
  678. defined(TARGET_IS_TM4C129_RA1)
  679. #define ROM_CANRetryGet \
  680. ((bool (*)(uint32_t ui32Base))ROM_CANTABLE[13])
  681. #endif
  682. #if defined(TARGET_IS_TM4C123_RA1) || \
  683. defined(TARGET_IS_TM4C123_RA3) || \
  684. defined(TARGET_IS_TM4C123_RB1) || \
  685. defined(TARGET_IS_TM4C129_RA0) || \
  686. defined(TARGET_IS_TM4C129_RA1)
  687. #define ROM_CANRetrySet \
  688. ((void (*)(uint32_t ui32Base, \
  689. bool bAutoRetry))ROM_CANTABLE[14])
  690. #endif
  691. #if defined(TARGET_IS_TM4C123_RA1) || \
  692. defined(TARGET_IS_TM4C123_RA3) || \
  693. defined(TARGET_IS_TM4C123_RB1) || \
  694. defined(TARGET_IS_TM4C129_RA0) || \
  695. defined(TARGET_IS_TM4C129_RA1)
  696. #define ROM_CANErrCntrGet \
  697. ((bool (*)(uint32_t ui32Base, \
  698. uint32_t *pui32RxCount, \
  699. uint32_t *pui32TxCount))ROM_CANTABLE[15])
  700. #endif
  701. #if defined(TARGET_IS_TM4C123_RA1) || \
  702. defined(TARGET_IS_TM4C123_RA3) || \
  703. defined(TARGET_IS_TM4C123_RB1) || \
  704. defined(TARGET_IS_TM4C129_RA0) || \
  705. defined(TARGET_IS_TM4C129_RA1)
  706. #define ROM_CANBitRateSet \
  707. ((uint32_t (*)(uint32_t ui32Base, \
  708. uint32_t ui32SourceClock, \
  709. uint32_t ui32BitRate))ROM_CANTABLE[16])
  710. #endif
  711. //*****************************************************************************
  712. //
  713. // Macros for calling ROM functions in the Comparator API.
  714. //
  715. //*****************************************************************************
  716. #if defined(TARGET_IS_TM4C123_RA1) || \
  717. defined(TARGET_IS_TM4C123_RA3) || \
  718. defined(TARGET_IS_TM4C123_RB1) || \
  719. defined(TARGET_IS_TM4C129_RA0) || \
  720. defined(TARGET_IS_TM4C129_RA1)
  721. #define ROM_ComparatorIntClear \
  722. ((void (*)(uint32_t ui32Base, \
  723. uint32_t ui32Comp))ROM_COMPARATORTABLE[0])
  724. #endif
  725. #if defined(TARGET_IS_TM4C123_RA1) || \
  726. defined(TARGET_IS_TM4C123_RA3) || \
  727. defined(TARGET_IS_TM4C123_RB1) || \
  728. defined(TARGET_IS_TM4C129_RA0) || \
  729. defined(TARGET_IS_TM4C129_RA1)
  730. #define ROM_ComparatorConfigure \
  731. ((void (*)(uint32_t ui32Base, \
  732. uint32_t ui32Comp, \
  733. uint32_t ui32Config))ROM_COMPARATORTABLE[1])
  734. #endif
  735. #if defined(TARGET_IS_TM4C123_RA1) || \
  736. defined(TARGET_IS_TM4C123_RA3) || \
  737. defined(TARGET_IS_TM4C123_RB1) || \
  738. defined(TARGET_IS_TM4C129_RA0) || \
  739. defined(TARGET_IS_TM4C129_RA1)
  740. #define ROM_ComparatorRefSet \
  741. ((void (*)(uint32_t ui32Base, \
  742. uint32_t ui32Ref))ROM_COMPARATORTABLE[2])
  743. #endif
  744. #if defined(TARGET_IS_TM4C123_RA1) || \
  745. defined(TARGET_IS_TM4C123_RA3) || \
  746. defined(TARGET_IS_TM4C123_RB1) || \
  747. defined(TARGET_IS_TM4C129_RA0) || \
  748. defined(TARGET_IS_TM4C129_RA1)
  749. #define ROM_ComparatorValueGet \
  750. ((bool (*)(uint32_t ui32Base, \
  751. uint32_t ui32Comp))ROM_COMPARATORTABLE[3])
  752. #endif
  753. #if defined(TARGET_IS_TM4C123_RA1) || \
  754. defined(TARGET_IS_TM4C123_RA3) || \
  755. defined(TARGET_IS_TM4C123_RB1) || \
  756. defined(TARGET_IS_TM4C129_RA0) || \
  757. defined(TARGET_IS_TM4C129_RA1)
  758. #define ROM_ComparatorIntEnable \
  759. ((void (*)(uint32_t ui32Base, \
  760. uint32_t ui32Comp))ROM_COMPARATORTABLE[4])
  761. #endif
  762. #if defined(TARGET_IS_TM4C123_RA1) || \
  763. defined(TARGET_IS_TM4C123_RA3) || \
  764. defined(TARGET_IS_TM4C123_RB1) || \
  765. defined(TARGET_IS_TM4C129_RA0) || \
  766. defined(TARGET_IS_TM4C129_RA1)
  767. #define ROM_ComparatorIntDisable \
  768. ((void (*)(uint32_t ui32Base, \
  769. uint32_t ui32Comp))ROM_COMPARATORTABLE[5])
  770. #endif
  771. #if defined(TARGET_IS_TM4C123_RA1) || \
  772. defined(TARGET_IS_TM4C123_RA3) || \
  773. defined(TARGET_IS_TM4C123_RB1) || \
  774. defined(TARGET_IS_TM4C129_RA0) || \
  775. defined(TARGET_IS_TM4C129_RA1)
  776. #define ROM_ComparatorIntStatus \
  777. ((bool (*)(uint32_t ui32Base, \
  778. uint32_t ui32Comp, \
  779. bool bMasked))ROM_COMPARATORTABLE[6])
  780. #endif
  781. //*****************************************************************************
  782. //
  783. // Macros for calling ROM functions in the CRC API.
  784. //
  785. //*****************************************************************************
  786. #if defined(TARGET_IS_TM4C129_RA0) || \
  787. defined(TARGET_IS_TM4C129_RA1)
  788. #define ROM_CRCConfigSet \
  789. ((void (*)(uint32_t ui32Base, \
  790. uint32_t ui32CRCConfig))ROM_CRCTABLE[0])
  791. #endif
  792. #if defined(TARGET_IS_TM4C129_RA0) || \
  793. defined(TARGET_IS_TM4C129_RA1)
  794. #define ROM_CRCDataProcess \
  795. ((uint32_t (*)(uint32_t ui32Base, \
  796. uint32_t *pui32DataIn, \
  797. uint32_t ui32DataLength, \
  798. bool bPPResult))ROM_CRCTABLE[1])
  799. #endif
  800. #if defined(TARGET_IS_TM4C129_RA0) || \
  801. defined(TARGET_IS_TM4C129_RA1)
  802. #define ROM_CRCDataWrite \
  803. ((void (*)(uint32_t ui32Base, \
  804. uint32_t ui32Data))ROM_CRCTABLE[2])
  805. #endif
  806. #if defined(TARGET_IS_TM4C129_RA0) || \
  807. defined(TARGET_IS_TM4C129_RA1)
  808. #define ROM_CRCResultRead \
  809. ((uint32_t (*)(uint32_t ui32Base, \
  810. bool bPPResult))ROM_CRCTABLE[3])
  811. #endif
  812. #if defined(TARGET_IS_TM4C129_RA0) || \
  813. defined(TARGET_IS_TM4C129_RA1)
  814. #define ROM_CRCSeedSet \
  815. ((void (*)(uint32_t ui32Base, \
  816. uint32_t ui32Seed))ROM_CRCTABLE[4])
  817. #endif
  818. //*****************************************************************************
  819. //
  820. // Macros for calling ROM functions in the DES API.
  821. //
  822. //*****************************************************************************
  823. #if defined(TARGET_IS_TM4C129_RA0) || \
  824. defined(TARGET_IS_TM4C129_RA1)
  825. #define ROM_DESIntStatus \
  826. ((uint32_t (*)(uint32_t ui32Base, \
  827. bool bMasked))ROM_DESTABLE[0])
  828. #endif
  829. #if defined(TARGET_IS_TM4C129_RA0) || \
  830. defined(TARGET_IS_TM4C129_RA1)
  831. #define ROM_DESConfigSet \
  832. ((void (*)(uint32_t ui32Base, \
  833. uint32_t ui32Config))ROM_DESTABLE[1])
  834. #endif
  835. #if defined(TARGET_IS_TM4C129_RA0) || \
  836. defined(TARGET_IS_TM4C129_RA1)
  837. #define ROM_DESDataRead \
  838. ((void (*)(uint32_t ui32Base, \
  839. uint32_t *pui32Dest))ROM_DESTABLE[2])
  840. #endif
  841. #if defined(TARGET_IS_TM4C129_RA0) || \
  842. defined(TARGET_IS_TM4C129_RA1)
  843. #define ROM_DESDataReadNonBlocking \
  844. ((bool (*)(uint32_t ui32Base, \
  845. uint32_t *pui32Dest))ROM_DESTABLE[3])
  846. #endif
  847. #if defined(TARGET_IS_TM4C129_RA0) || \
  848. defined(TARGET_IS_TM4C129_RA1)
  849. #define ROM_DESDataProcess \
  850. ((bool (*)(uint32_t ui32Base, \
  851. uint32_t *pui32Src, \
  852. uint32_t *pui32Dest, \
  853. uint32_t ui32Length))ROM_DESTABLE[4])
  854. #endif
  855. #if defined(TARGET_IS_TM4C129_RA0) || \
  856. defined(TARGET_IS_TM4C129_RA1)
  857. #define ROM_DESDataWrite \
  858. ((void (*)(uint32_t ui32Base, \
  859. uint32_t *pui32Src))ROM_DESTABLE[5])
  860. #endif
  861. #if defined(TARGET_IS_TM4C129_RA0) || \
  862. defined(TARGET_IS_TM4C129_RA1)
  863. #define ROM_DESDataWriteNonBlocking \
  864. ((bool (*)(uint32_t ui32Base, \
  865. uint32_t *pui32Src))ROM_DESTABLE[6])
  866. #endif
  867. #if defined(TARGET_IS_TM4C129_RA0) || \
  868. defined(TARGET_IS_TM4C129_RA1)
  869. #define ROM_DESDMADisable \
  870. ((void (*)(uint32_t ui32Base, \
  871. uint32_t ui32Flags))ROM_DESTABLE[7])
  872. #endif
  873. #if defined(TARGET_IS_TM4C129_RA0) || \
  874. defined(TARGET_IS_TM4C129_RA1)
  875. #define ROM_DESDMAEnable \
  876. ((void (*)(uint32_t ui32Base, \
  877. uint32_t ui32Flags))ROM_DESTABLE[8])
  878. #endif
  879. #if defined(TARGET_IS_TM4C129_RA0) || \
  880. defined(TARGET_IS_TM4C129_RA1)
  881. #define ROM_DESIntClear \
  882. ((void (*)(uint32_t ui32Base, \
  883. uint32_t ui32IntFlags))ROM_DESTABLE[9])
  884. #endif
  885. #if defined(TARGET_IS_TM4C129_RA0) || \
  886. defined(TARGET_IS_TM4C129_RA1)
  887. #define ROM_DESIntDisable \
  888. ((void (*)(uint32_t ui32Base, \
  889. uint32_t ui32IntFlags))ROM_DESTABLE[10])
  890. #endif
  891. #if defined(TARGET_IS_TM4C129_RA0) || \
  892. defined(TARGET_IS_TM4C129_RA1)
  893. #define ROM_DESIntEnable \
  894. ((void (*)(uint32_t ui32Base, \
  895. uint32_t ui32IntFlags))ROM_DESTABLE[11])
  896. #endif
  897. #if defined(TARGET_IS_TM4C129_RA0) || \
  898. defined(TARGET_IS_TM4C129_RA1)
  899. #define ROM_DESIVSet \
  900. ((bool (*)(uint32_t ui32Base, \
  901. uint32_t *pui32IVdata))ROM_DESTABLE[12])
  902. #endif
  903. #if defined(TARGET_IS_TM4C129_RA0) || \
  904. defined(TARGET_IS_TM4C129_RA1)
  905. #define ROM_DESKeySet \
  906. ((void (*)(uint32_t ui32Base, \
  907. uint32_t *pui32Key))ROM_DESTABLE[13])
  908. #endif
  909. #if defined(TARGET_IS_TM4C129_RA0) || \
  910. defined(TARGET_IS_TM4C129_RA1)
  911. #define ROM_DESLengthSet \
  912. ((void (*)(uint32_t ui32Base, \
  913. uint32_t ui32Length))ROM_DESTABLE[14])
  914. #endif
  915. #if defined(TARGET_IS_TM4C129_RA0) || \
  916. defined(TARGET_IS_TM4C129_RA1)
  917. #define ROM_DESReset \
  918. ((void (*)(uint32_t ui32Base))ROM_DESTABLE[15])
  919. #endif
  920. //*****************************************************************************
  921. //
  922. // Macros for calling ROM functions in the EEPROM API.
  923. //
  924. //*****************************************************************************
  925. #if defined(TARGET_IS_TM4C123_RA3) || \
  926. defined(TARGET_IS_TM4C123_RB1) || \
  927. defined(TARGET_IS_TM4C129_RA0) || \
  928. defined(TARGET_IS_TM4C129_RA1)
  929. #define ROM_EEPROMRead \
  930. ((void (*)(uint32_t *pui32Data, \
  931. uint32_t ui32Address, \
  932. uint32_t ui32Count))ROM_EEPROMTABLE[0])
  933. #endif
  934. #if defined(TARGET_IS_TM4C123_RA3) || \
  935. defined(TARGET_IS_TM4C123_RB1) || \
  936. defined(TARGET_IS_TM4C129_RA0) || \
  937. defined(TARGET_IS_TM4C129_RA1)
  938. #define ROM_EEPROMBlockCountGet \
  939. ((uint32_t (*)(void))ROM_EEPROMTABLE[1])
  940. #endif
  941. #if defined(TARGET_IS_TM4C123_RA3) || \
  942. defined(TARGET_IS_TM4C123_RB1) || \
  943. defined(TARGET_IS_TM4C129_RA0) || \
  944. defined(TARGET_IS_TM4C129_RA1)
  945. #define ROM_EEPROMBlockHide \
  946. ((void (*)(uint32_t ui32Block))ROM_EEPROMTABLE[2])
  947. #endif
  948. #if defined(TARGET_IS_TM4C123_RA3) || \
  949. defined(TARGET_IS_TM4C123_RB1) || \
  950. defined(TARGET_IS_TM4C129_RA0) || \
  951. defined(TARGET_IS_TM4C129_RA1)
  952. #define ROM_EEPROMBlockLock \
  953. ((uint32_t (*)(uint32_t ui32Block))ROM_EEPROMTABLE[3])
  954. #endif
  955. #if defined(TARGET_IS_TM4C123_RA3) || \
  956. defined(TARGET_IS_TM4C123_RB1) || \
  957. defined(TARGET_IS_TM4C129_RA0) || \
  958. defined(TARGET_IS_TM4C129_RA1)
  959. #define ROM_EEPROMBlockPasswordSet \
  960. ((uint32_t (*)(uint32_t ui32Block, \
  961. uint32_t *pui32Password, \
  962. uint32_t ui32Count))ROM_EEPROMTABLE[4])
  963. #endif
  964. #if defined(TARGET_IS_TM4C123_RA3) || \
  965. defined(TARGET_IS_TM4C123_RB1) || \
  966. defined(TARGET_IS_TM4C129_RA0) || \
  967. defined(TARGET_IS_TM4C129_RA1)
  968. #define ROM_EEPROMBlockProtectGet \
  969. ((uint32_t (*)(uint32_t ui32Block))ROM_EEPROMTABLE[5])
  970. #endif
  971. #if defined(TARGET_IS_TM4C123_RA3) || \
  972. defined(TARGET_IS_TM4C123_RB1) || \
  973. defined(TARGET_IS_TM4C129_RA0) || \
  974. defined(TARGET_IS_TM4C129_RA1)
  975. #define ROM_EEPROMBlockProtectSet \
  976. ((uint32_t (*)(uint32_t ui32Block, \
  977. uint32_t ui32Protect))ROM_EEPROMTABLE[6])
  978. #endif
  979. #if defined(TARGET_IS_TM4C123_RA3) || \
  980. defined(TARGET_IS_TM4C123_RB1) || \
  981. defined(TARGET_IS_TM4C129_RA0) || \
  982. defined(TARGET_IS_TM4C129_RA1)
  983. #define ROM_EEPROMBlockUnlock \
  984. ((uint32_t (*)(uint32_t ui32Block, \
  985. uint32_t *pui32Password, \
  986. uint32_t ui32Count))ROM_EEPROMTABLE[7])
  987. #endif
  988. #if defined(TARGET_IS_TM4C123_RA3) || \
  989. defined(TARGET_IS_TM4C123_RB1) || \
  990. defined(TARGET_IS_TM4C129_RA0) || \
  991. defined(TARGET_IS_TM4C129_RA1)
  992. #define ROM_EEPROMIntClear \
  993. ((void (*)(uint32_t ui32IntFlags))ROM_EEPROMTABLE[8])
  994. #endif
  995. #if defined(TARGET_IS_TM4C123_RA3) || \
  996. defined(TARGET_IS_TM4C123_RB1) || \
  997. defined(TARGET_IS_TM4C129_RA0) || \
  998. defined(TARGET_IS_TM4C129_RA1)
  999. #define ROM_EEPROMIntDisable \
  1000. ((void (*)(uint32_t ui32IntFlags))ROM_EEPROMTABLE[9])
  1001. #endif
  1002. #if defined(TARGET_IS_TM4C123_RA3) || \
  1003. defined(TARGET_IS_TM4C123_RB1) || \
  1004. defined(TARGET_IS_TM4C129_RA0) || \
  1005. defined(TARGET_IS_TM4C129_RA1)
  1006. #define ROM_EEPROMIntEnable \
  1007. ((void (*)(uint32_t ui32IntFlags))ROM_EEPROMTABLE[10])
  1008. #endif
  1009. #if defined(TARGET_IS_TM4C123_RA3) || \
  1010. defined(TARGET_IS_TM4C123_RB1) || \
  1011. defined(TARGET_IS_TM4C129_RA0) || \
  1012. defined(TARGET_IS_TM4C129_RA1)
  1013. #define ROM_EEPROMIntStatus \
  1014. ((uint32_t (*)(bool bMasked))ROM_EEPROMTABLE[11])
  1015. #endif
  1016. #if defined(TARGET_IS_TM4C123_RA3) || \
  1017. defined(TARGET_IS_TM4C123_RB1)
  1018. #define ROM_EEPROMMassErase \
  1019. ((uint32_t (*)(void))ROM_EEPROMTABLE[12])
  1020. #endif
  1021. #if defined(TARGET_IS_TM4C123_RA3) || \
  1022. defined(TARGET_IS_TM4C123_RB1) || \
  1023. defined(TARGET_IS_TM4C129_RA0) || \
  1024. defined(TARGET_IS_TM4C129_RA1)
  1025. #define ROM_EEPROMProgram \
  1026. ((uint32_t (*)(uint32_t *pui32Data, \
  1027. uint32_t ui32Address, \
  1028. uint32_t ui32Count))ROM_EEPROMTABLE[13])
  1029. #endif
  1030. #if defined(TARGET_IS_TM4C123_RA3) || \
  1031. defined(TARGET_IS_TM4C123_RB1) || \
  1032. defined(TARGET_IS_TM4C129_RA0) || \
  1033. defined(TARGET_IS_TM4C129_RA1)
  1034. #define ROM_EEPROMProgramNonBlocking \
  1035. ((uint32_t (*)(uint32_t ui32Data, \
  1036. uint32_t ui32Address))ROM_EEPROMTABLE[14])
  1037. #endif
  1038. #if defined(TARGET_IS_TM4C123_RA3) || \
  1039. defined(TARGET_IS_TM4C123_RB1) || \
  1040. defined(TARGET_IS_TM4C129_RA0) || \
  1041. defined(TARGET_IS_TM4C129_RA1)
  1042. #define ROM_EEPROMSizeGet \
  1043. ((uint32_t (*)(void))ROM_EEPROMTABLE[15])
  1044. #endif
  1045. #if defined(TARGET_IS_TM4C123_RA3) || \
  1046. defined(TARGET_IS_TM4C123_RB1) || \
  1047. defined(TARGET_IS_TM4C129_RA0) || \
  1048. defined(TARGET_IS_TM4C129_RA1)
  1049. #define ROM_EEPROMStatusGet \
  1050. ((uint32_t (*)(void))ROM_EEPROMTABLE[16])
  1051. #endif
  1052. #if defined(TARGET_IS_TM4C123_RA3) || \
  1053. defined(TARGET_IS_TM4C123_RB1) || \
  1054. defined(TARGET_IS_TM4C129_RA0) || \
  1055. defined(TARGET_IS_TM4C129_RA1)
  1056. #define ROM_EEPROMInit \
  1057. ((uint32_t (*)(void))ROM_EEPROMTABLE[17])
  1058. #endif
  1059. //*****************************************************************************
  1060. //
  1061. // Macros for calling ROM functions in the EPI API.
  1062. //
  1063. //*****************************************************************************
  1064. #if defined(TARGET_IS_TM4C129_RA0) || \
  1065. defined(TARGET_IS_TM4C129_RA1)
  1066. #define ROM_EPIIntStatus \
  1067. ((uint32_t (*)(uint32_t ui32Base, \
  1068. bool bMasked))ROM_EPITABLE[0])
  1069. #endif
  1070. #if defined(TARGET_IS_TM4C129_RA0) || \
  1071. defined(TARGET_IS_TM4C129_RA1)
  1072. #define ROM_EPIModeSet \
  1073. ((void (*)(uint32_t ui32Base, \
  1074. uint32_t ui32Mode))ROM_EPITABLE[1])
  1075. #endif
  1076. #if defined(TARGET_IS_TM4C129_RA0) || \
  1077. defined(TARGET_IS_TM4C129_RA1)
  1078. #define ROM_EPIDividerSet \
  1079. ((void (*)(uint32_t ui32Base, \
  1080. uint32_t ui32Divider))ROM_EPITABLE[2])
  1081. #endif
  1082. #if defined(TARGET_IS_TM4C129_RA0) || \
  1083. defined(TARGET_IS_TM4C129_RA1)
  1084. #define ROM_EPIConfigSDRAMSet \
  1085. ((void (*)(uint32_t ui32Base, \
  1086. uint32_t ui32Config, \
  1087. uint32_t ui32Refresh))ROM_EPITABLE[3])
  1088. #endif
  1089. #if defined(TARGET_IS_TM4C129_RA0) || \
  1090. defined(TARGET_IS_TM4C129_RA1)
  1091. #define ROM_EPIConfigGPModeSet \
  1092. ((void (*)(uint32_t ui32Base, \
  1093. uint32_t ui32Config, \
  1094. uint32_t ui32FrameCount, \
  1095. uint32_t ui32MaxWait))ROM_EPITABLE[4])
  1096. #endif
  1097. #if defined(TARGET_IS_TM4C129_RA0) || \
  1098. defined(TARGET_IS_TM4C129_RA1)
  1099. #define ROM_EPIConfigHB8Set \
  1100. ((void (*)(uint32_t ui32Base, \
  1101. uint32_t ui32Config, \
  1102. uint32_t ui32MaxWait))ROM_EPITABLE[5])
  1103. #endif
  1104. #if defined(TARGET_IS_TM4C129_RA0) || \
  1105. defined(TARGET_IS_TM4C129_RA1)
  1106. #define ROM_EPIConfigHB16Set \
  1107. ((void (*)(uint32_t ui32Base, \
  1108. uint32_t ui32Config, \
  1109. uint32_t ui32MaxWait))ROM_EPITABLE[6])
  1110. #endif
  1111. #if defined(TARGET_IS_TM4C129_RA0) || \
  1112. defined(TARGET_IS_TM4C129_RA1)
  1113. #define ROM_EPIAddressMapSet \
  1114. ((void (*)(uint32_t ui32Base, \
  1115. uint32_t ui32Map))ROM_EPITABLE[7])
  1116. #endif
  1117. #if defined(TARGET_IS_TM4C129_RA0) || \
  1118. defined(TARGET_IS_TM4C129_RA1)
  1119. #define ROM_EPINonBlockingReadConfigure \
  1120. ((void (*)(uint32_t ui32Base, \
  1121. uint32_t ui32Channel, \
  1122. uint32_t ui32DataSize, \
  1123. uint32_t ui32Address))ROM_EPITABLE[8])
  1124. #endif
  1125. #if defined(TARGET_IS_TM4C129_RA0) || \
  1126. defined(TARGET_IS_TM4C129_RA1)
  1127. #define ROM_EPINonBlockingReadStart \
  1128. ((void (*)(uint32_t ui32Base, \
  1129. uint32_t ui32Channel, \
  1130. uint32_t ui32Count))ROM_EPITABLE[9])
  1131. #endif
  1132. #if defined(TARGET_IS_TM4C129_RA0) || \
  1133. defined(TARGET_IS_TM4C129_RA1)
  1134. #define ROM_EPINonBlockingReadStop \
  1135. ((void (*)(uint32_t ui32Base, \
  1136. uint32_t ui32Channel))ROM_EPITABLE[10])
  1137. #endif
  1138. #if defined(TARGET_IS_TM4C129_RA0) || \
  1139. defined(TARGET_IS_TM4C129_RA1)
  1140. #define ROM_EPINonBlockingReadCount \
  1141. ((uint32_t (*)(uint32_t ui32Base, \
  1142. uint32_t ui32Channel))ROM_EPITABLE[11])
  1143. #endif
  1144. #if defined(TARGET_IS_TM4C129_RA0) || \
  1145. defined(TARGET_IS_TM4C129_RA1)
  1146. #define ROM_EPINonBlockingReadAvail \
  1147. ((uint32_t (*)(uint32_t ui32Base))ROM_EPITABLE[12])
  1148. #endif
  1149. #if defined(TARGET_IS_TM4C129_RA0) || \
  1150. defined(TARGET_IS_TM4C129_RA1)
  1151. #define ROM_EPINonBlockingReadGet32 \
  1152. ((uint32_t (*)(uint32_t ui32Base, \
  1153. uint32_t ui32Count, \
  1154. uint32_t *pui32Buf))ROM_EPITABLE[13])
  1155. #endif
  1156. #if defined(TARGET_IS_TM4C129_RA0) || \
  1157. defined(TARGET_IS_TM4C129_RA1)
  1158. #define ROM_EPINonBlockingReadGet16 \
  1159. ((uint32_t (*)(uint32_t ui32Base, \
  1160. uint32_t ui32Count, \
  1161. uint16_t *pui16Buf))ROM_EPITABLE[14])
  1162. #endif
  1163. #if defined(TARGET_IS_TM4C129_RA0) || \
  1164. defined(TARGET_IS_TM4C129_RA1)
  1165. #define ROM_EPINonBlockingReadGet8 \
  1166. ((uint32_t (*)(uint32_t ui32Base, \
  1167. uint32_t ui32Count, \
  1168. uint8_t *pui8Buf))ROM_EPITABLE[15])
  1169. #endif
  1170. #if defined(TARGET_IS_TM4C129_RA0) || \
  1171. defined(TARGET_IS_TM4C129_RA1)
  1172. #define ROM_EPIFIFOConfig \
  1173. ((void (*)(uint32_t ui32Base, \
  1174. uint32_t ui32Config))ROM_EPITABLE[16])
  1175. #endif
  1176. #if defined(TARGET_IS_TM4C129_RA0) || \
  1177. defined(TARGET_IS_TM4C129_RA1)
  1178. #define ROM_EPIWriteFIFOCountGet \
  1179. ((uint32_t (*)(uint32_t ui32Base))ROM_EPITABLE[17])
  1180. #endif
  1181. #if defined(TARGET_IS_TM4C129_RA0) || \
  1182. defined(TARGET_IS_TM4C129_RA1)
  1183. #define ROM_EPIIntEnable \
  1184. ((void (*)(uint32_t ui32Base, \
  1185. uint32_t ui32IntFlags))ROM_EPITABLE[18])
  1186. #endif
  1187. #if defined(TARGET_IS_TM4C129_RA0) || \
  1188. defined(TARGET_IS_TM4C129_RA1)
  1189. #define ROM_EPIIntDisable \
  1190. ((void (*)(uint32_t ui32Base, \
  1191. uint32_t ui32IntFlags))ROM_EPITABLE[19])
  1192. #endif
  1193. #if defined(TARGET_IS_TM4C129_RA0) || \
  1194. defined(TARGET_IS_TM4C129_RA1)
  1195. #define ROM_EPIIntErrorStatus \
  1196. ((uint32_t (*)(uint32_t ui32Base))ROM_EPITABLE[20])
  1197. #endif
  1198. #if defined(TARGET_IS_TM4C129_RA0) || \
  1199. defined(TARGET_IS_TM4C129_RA1)
  1200. #define ROM_EPIIntErrorClear \
  1201. ((void (*)(uint32_t ui32Base, \
  1202. uint32_t ui32ErrFlags))ROM_EPITABLE[21])
  1203. #endif
  1204. #if defined(TARGET_IS_TM4C129_RA0) || \
  1205. defined(TARGET_IS_TM4C129_RA1)
  1206. #define ROM_EPIDividerCSSet \
  1207. ((void (*)(uint32_t ui32Base, \
  1208. uint32_t ui32CS, \
  1209. uint32_t ui32Divider))ROM_EPITABLE[22])
  1210. #endif
  1211. #if defined(TARGET_IS_TM4C129_RA0) || \
  1212. defined(TARGET_IS_TM4C129_RA1)
  1213. #define ROM_EPIDMATxCount \
  1214. ((void (*)(uint32_t ui32Base, \
  1215. uint32_t ui32Count))ROM_EPITABLE[23])
  1216. #endif
  1217. #if defined(TARGET_IS_TM4C129_RA0) || \
  1218. defined(TARGET_IS_TM4C129_RA1)
  1219. #define ROM_EPIConfigHB8CSSet \
  1220. ((void (*)(uint32_t ui32Base, \
  1221. uint32_t ui32CS, \
  1222. uint32_t ui32Config))ROM_EPITABLE[24])
  1223. #endif
  1224. #if defined(TARGET_IS_TM4C129_RA0) || \
  1225. defined(TARGET_IS_TM4C129_RA1)
  1226. #define ROM_EPIConfigHB16CSSet \
  1227. ((void (*)(uint32_t ui32Base, \
  1228. uint32_t ui32CS, \
  1229. uint32_t ui32Config))ROM_EPITABLE[25])
  1230. #endif
  1231. #if defined(TARGET_IS_TM4C129_RA0) || \
  1232. defined(TARGET_IS_TM4C129_RA1)
  1233. #define ROM_EPIConfigHB8TimingSet \
  1234. ((void (*)(uint32_t ui32Base, \
  1235. uint32_t ui32CS, \
  1236. uint32_t ui32Config))ROM_EPITABLE[26])
  1237. #endif
  1238. #if defined(TARGET_IS_TM4C129_RA0) || \
  1239. defined(TARGET_IS_TM4C129_RA1)
  1240. #define ROM_EPIConfigHB16TimingSet \
  1241. ((void (*)(uint32_t ui32Base, \
  1242. uint32_t ui32CS, \
  1243. uint32_t ui32Config))ROM_EPITABLE[27])
  1244. #endif
  1245. #if defined(TARGET_IS_TM4C129_RA0) || \
  1246. defined(TARGET_IS_TM4C129_RA1)
  1247. #define ROM_EPIPSRAMConfigRegSet \
  1248. ((void (*)(uint32_t ui32Base, \
  1249. uint32_t ui32CS, \
  1250. uint32_t ui32CR))ROM_EPITABLE[28])
  1251. #endif
  1252. #if defined(TARGET_IS_TM4C129_RA0) || \
  1253. defined(TARGET_IS_TM4C129_RA1)
  1254. #define ROM_EPIPSRAMConfigRegRead \
  1255. ((void (*)(uint32_t ui32Base, \
  1256. uint32_t ui32CS))ROM_EPITABLE[29])
  1257. #endif
  1258. #if defined(TARGET_IS_TM4C129_RA0) || \
  1259. defined(TARGET_IS_TM4C129_RA1)
  1260. #define ROM_EPIPSRAMConfigRegGetNonBlocking \
  1261. ((bool (*)(uint32_t ui32Base, \
  1262. uint32_t ui32CS, \
  1263. uint32_t *pui32CR))ROM_EPITABLE[30])
  1264. #endif
  1265. #if defined(TARGET_IS_TM4C129_RA0) || \
  1266. defined(TARGET_IS_TM4C129_RA1)
  1267. #define ROM_EPIPSRAMConfigRegGet \
  1268. ((uint32_t (*)(uint32_t ui32Base, \
  1269. uint32_t ui32CS))ROM_EPITABLE[31])
  1270. #endif
  1271. //*****************************************************************************
  1272. //
  1273. // Macros for calling ROM functions in the EMAC API.
  1274. //
  1275. //*****************************************************************************
  1276. #if defined(TARGET_IS_TM4C129_RA0) || \
  1277. defined(TARGET_IS_TM4C129_RA1)
  1278. #define ROM_EMACIntStatus \
  1279. ((uint32_t (*)(uint32_t ui32Base, \
  1280. bool bMasked))ROM_EMACTABLE[0])
  1281. #endif
  1282. #if defined(TARGET_IS_TM4C129_RA0) || \
  1283. defined(TARGET_IS_TM4C129_RA1)
  1284. #define ROM_EMACAddrGet \
  1285. ((void (*)(uint32_t ui32Base, \
  1286. uint32_t ui32Index, \
  1287. uint8_t *pui8MACAddr))ROM_EMACTABLE[1])
  1288. #endif
  1289. #if defined(TARGET_IS_TM4C129_RA0) || \
  1290. defined(TARGET_IS_TM4C129_RA1)
  1291. #define ROM_EMACAddrSet \
  1292. ((void (*)(uint32_t ui32Base, \
  1293. uint32_t ui32Index, \
  1294. const uint8_t *pui8MACAddr))ROM_EMACTABLE[2])
  1295. #endif
  1296. #if defined(TARGET_IS_TM4C129_RA0) || \
  1297. defined(TARGET_IS_TM4C129_RA1)
  1298. #define ROM_EMACConfigGet \
  1299. ((void (*)(uint32_t ui32Base, \
  1300. uint32_t *pui32Config, \
  1301. uint32_t *pui32Mode, \
  1302. uint32_t *pui32RxMaxFrameSize))ROM_EMACTABLE[3])
  1303. #endif
  1304. #if defined(TARGET_IS_TM4C129_RA0) || \
  1305. defined(TARGET_IS_TM4C129_RA1)
  1306. #define ROM_EMACConfigSet \
  1307. ((void (*)(uint32_t ui32Base, \
  1308. uint32_t ui32Config, \
  1309. uint32_t ui32ModeFlags, \
  1310. uint32_t ui32RxMaxFrameSize))ROM_EMACTABLE[4])
  1311. #endif
  1312. #if defined(TARGET_IS_TM4C129_RA0) || \
  1313. defined(TARGET_IS_TM4C129_RA1)
  1314. #define ROM_EMACDMAStateGet \
  1315. ((uint32_t (*)(uint32_t ui32Base))ROM_EMACTABLE[5])
  1316. #endif
  1317. #if defined(TARGET_IS_TM4C129_RA0) || \
  1318. defined(TARGET_IS_TM4C129_RA1)
  1319. #define ROM_EMACFrameFilterGet \
  1320. ((uint32_t (*)(uint32_t ui32Base))ROM_EMACTABLE[6])
  1321. #endif
  1322. #if defined(TARGET_IS_TM4C129_RA0) || \
  1323. defined(TARGET_IS_TM4C129_RA1)
  1324. #define ROM_EMACFrameFilterSet \
  1325. ((void (*)(uint32_t ui32Base, \
  1326. uint32_t ui32FilterOpts))ROM_EMACTABLE[7])
  1327. #endif
  1328. #if defined(TARGET_IS_TM4C129_RA0) || \
  1329. defined(TARGET_IS_TM4C129_RA1)
  1330. #define ROM_EMACInit \
  1331. ((void (*)(uint32_t ui32Base, \
  1332. uint32_t ui32SysClk, \
  1333. uint32_t ui32BusConfig, \
  1334. uint32_t ui32RxBurst, \
  1335. uint32_t ui32TxBurst, \
  1336. uint32_t ui32DescSkipSize))ROM_EMACTABLE[8])
  1337. #endif
  1338. #if defined(TARGET_IS_TM4C129_RA0) || \
  1339. defined(TARGET_IS_TM4C129_RA1)
  1340. #define ROM_EMACIntClear \
  1341. ((void (*)(uint32_t ui32Base, \
  1342. uint32_t ui32IntFlags))ROM_EMACTABLE[9])
  1343. #endif
  1344. #if defined(TARGET_IS_TM4C129_RA0) || \
  1345. defined(TARGET_IS_TM4C129_RA1)
  1346. #define ROM_EMACIntDisable \
  1347. ((void (*)(uint32_t ui32Base, \
  1348. uint32_t ui32IntFlags))ROM_EMACTABLE[10])
  1349. #endif
  1350. #if defined(TARGET_IS_TM4C129_RA0) || \
  1351. defined(TARGET_IS_TM4C129_RA1)
  1352. #define ROM_EMACIntEnable \
  1353. ((void (*)(uint32_t ui32Base, \
  1354. uint32_t ui32IntFlags))ROM_EMACTABLE[11])
  1355. #endif
  1356. #if defined(TARGET_IS_TM4C129_RA1)
  1357. #define ROM_EMACPHYConfigSet \
  1358. ((void (*)(uint32_t ui32Base, \
  1359. uint32_t ui32Config))ROM_EMACTABLE[12])
  1360. #endif
  1361. #if defined(TARGET_IS_TM4C129_RA0) || \
  1362. defined(TARGET_IS_TM4C129_RA1)
  1363. #define ROM_EMACPHYPowerOff \
  1364. ((void (*)(uint32_t ui32Base, \
  1365. uint8_t ui8PhyAddr))ROM_EMACTABLE[13])
  1366. #endif
  1367. #if defined(TARGET_IS_TM4C129_RA0) || \
  1368. defined(TARGET_IS_TM4C129_RA1)
  1369. #define ROM_EMACPHYPowerOn \
  1370. ((void (*)(uint32_t ui32Base, \
  1371. uint8_t ui8PhyAddr))ROM_EMACTABLE[14])
  1372. #endif
  1373. #if defined(TARGET_IS_TM4C129_RA0) || \
  1374. defined(TARGET_IS_TM4C129_RA1)
  1375. #define ROM_EMACPHYRead \
  1376. ((uint16_t (*)(uint32_t ui32Base, \
  1377. uint8_t ui8PhyAddr, \
  1378. uint8_t ui8RegAddr))ROM_EMACTABLE[15])
  1379. #endif
  1380. #if defined(TARGET_IS_TM4C129_RA0) || \
  1381. defined(TARGET_IS_TM4C129_RA1)
  1382. #define ROM_EMACPHYWrite \
  1383. ((void (*)(uint32_t ui32Base, \
  1384. uint8_t ui8PhyAddr, \
  1385. uint8_t ui8RegAddr, \
  1386. uint16_t ui16Data))ROM_EMACTABLE[16])
  1387. #endif
  1388. #if defined(TARGET_IS_TM4C129_RA0) || \
  1389. defined(TARGET_IS_TM4C129_RA1)
  1390. #define ROM_EMACReset \
  1391. ((void (*)(uint32_t ui32Base))ROM_EMACTABLE[17])
  1392. #endif
  1393. #if defined(TARGET_IS_TM4C129_RA0) || \
  1394. defined(TARGET_IS_TM4C129_RA1)
  1395. #define ROM_EMACRxDisable \
  1396. ((void (*)(uint32_t ui32Base))ROM_EMACTABLE[18])
  1397. #endif
  1398. #if defined(TARGET_IS_TM4C129_RA0) || \
  1399. defined(TARGET_IS_TM4C129_RA1)
  1400. #define ROM_EMACRxDMACurrentBufferGet \
  1401. ((uint8_t * (*)(uint32_t ui32Base))ROM_EMACTABLE[19])
  1402. #endif
  1403. #if defined(TARGET_IS_TM4C129_RA0) || \
  1404. defined(TARGET_IS_TM4C129_RA1)
  1405. #define ROM_EMACRxDMACurrentDescriptorGet \
  1406. ((tEMACDMADescriptor * (*)(uint32_t ui32Base))ROM_EMACTABLE[20])
  1407. #endif
  1408. #if defined(TARGET_IS_TM4C129_RA0) || \
  1409. defined(TARGET_IS_TM4C129_RA1)
  1410. #define ROM_EMACRxDMADescriptorListGet \
  1411. ((tEMACDMADescriptor * (*)(uint32_t ui32Base))ROM_EMACTABLE[21])
  1412. #endif
  1413. #if defined(TARGET_IS_TM4C129_RA0) || \
  1414. defined(TARGET_IS_TM4C129_RA1)
  1415. #define ROM_EMACRxDMADescriptorListSet \
  1416. ((void (*)(uint32_t ui32Base, \
  1417. tEMACDMADescriptor *pDescriptor))ROM_EMACTABLE[22])
  1418. #endif
  1419. #if defined(TARGET_IS_TM4C129_RA0) || \
  1420. defined(TARGET_IS_TM4C129_RA1)
  1421. #define ROM_EMACRxDMAPollDemand \
  1422. ((void (*)(uint32_t ui32Base))ROM_EMACTABLE[23])
  1423. #endif
  1424. #if defined(TARGET_IS_TM4C129_RA0) || \
  1425. defined(TARGET_IS_TM4C129_RA1)
  1426. #define ROM_EMACRxEnable \
  1427. ((void (*)(uint32_t ui32Base))ROM_EMACTABLE[24])
  1428. #endif
  1429. #if defined(TARGET_IS_TM4C129_RA0) || \
  1430. defined(TARGET_IS_TM4C129_RA1)
  1431. #define ROM_EMACRxWatchdogTimerSet \
  1432. ((void (*)(uint32_t ui32Base, \
  1433. uint8_t ui8Timeout))ROM_EMACTABLE[25])
  1434. #endif
  1435. #if defined(TARGET_IS_TM4C129_RA0) || \
  1436. defined(TARGET_IS_TM4C129_RA1)
  1437. #define ROM_EMACStatusGet \
  1438. ((uint32_t (*)(uint32_t ui32Base))ROM_EMACTABLE[26])
  1439. #endif
  1440. #if defined(TARGET_IS_TM4C129_RA0) || \
  1441. defined(TARGET_IS_TM4C129_RA1)
  1442. #define ROM_EMACTxDisable \
  1443. ((void (*)(uint32_t ui32Base))ROM_EMACTABLE[27])
  1444. #endif
  1445. #if defined(TARGET_IS_TM4C129_RA0) || \
  1446. defined(TARGET_IS_TM4C129_RA1)
  1447. #define ROM_EMACTxDMACurrentBufferGet \
  1448. ((uint8_t * (*)(uint32_t ui32Base))ROM_EMACTABLE[28])
  1449. #endif
  1450. #if defined(TARGET_IS_TM4C129_RA0) || \
  1451. defined(TARGET_IS_TM4C129_RA1)
  1452. #define ROM_EMACTxDMACurrentDescriptorGet \
  1453. ((tEMACDMADescriptor * (*)(uint32_t ui32Base))ROM_EMACTABLE[29])
  1454. #endif
  1455. #if defined(TARGET_IS_TM4C129_RA0) || \
  1456. defined(TARGET_IS_TM4C129_RA1)
  1457. #define ROM_EMACTxDMADescriptorListGet \
  1458. ((tEMACDMADescriptor * (*)(uint32_t ui32Base))ROM_EMACTABLE[30])
  1459. #endif
  1460. #if defined(TARGET_IS_TM4C129_RA0) || \
  1461. defined(TARGET_IS_TM4C129_RA1)
  1462. #define ROM_EMACTxDMADescriptorListSet \
  1463. ((void (*)(uint32_t ui32Base, \
  1464. tEMACDMADescriptor *pDescriptor))ROM_EMACTABLE[31])
  1465. #endif
  1466. #if defined(TARGET_IS_TM4C129_RA0) || \
  1467. defined(TARGET_IS_TM4C129_RA1)
  1468. #define ROM_EMACTxDMAPollDemand \
  1469. ((void (*)(uint32_t ui32Base))ROM_EMACTABLE[32])
  1470. #endif
  1471. #if defined(TARGET_IS_TM4C129_RA0) || \
  1472. defined(TARGET_IS_TM4C129_RA1)
  1473. #define ROM_EMACTxEnable \
  1474. ((void (*)(uint32_t ui32Base))ROM_EMACTABLE[33])
  1475. #endif
  1476. #if defined(TARGET_IS_TM4C129_RA0) || \
  1477. defined(TARGET_IS_TM4C129_RA1)
  1478. #define ROM_EMACTxFlush \
  1479. ((void (*)(uint32_t ui32Base))ROM_EMACTABLE[34])
  1480. #endif
  1481. #if defined(TARGET_IS_TM4C129_RA1)
  1482. #define ROM_EMACAddrFilterGet \
  1483. ((uint32_t (*)(uint32_t ui32Base, \
  1484. uint32_t ui32Index))ROM_EMACTABLE[35])
  1485. #endif
  1486. #if defined(TARGET_IS_TM4C129_RA1)
  1487. #define ROM_EMACAddrFilterSet \
  1488. ((void (*)(uint32_t ui32Base, \
  1489. uint32_t ui32Index, \
  1490. uint32_t ui32Config))ROM_EMACTABLE[36])
  1491. #endif
  1492. #if defined(TARGET_IS_TM4C129_RA1)
  1493. #define ROM_EMACHashFilterBitCalculate \
  1494. ((uint32_t (*)(uint8_t *pui8MACAddr))ROM_EMACTABLE[37])
  1495. #endif
  1496. #if defined(TARGET_IS_TM4C129_RA1)
  1497. #define ROM_EMACHashFilterGet \
  1498. ((void (*)(uint32_t ui32Base, \
  1499. uint32_t *pui32HashHi, \
  1500. uint32_t *pui32HashLo))ROM_EMACTABLE[38])
  1501. #endif
  1502. #if defined(TARGET_IS_TM4C129_RA0) || \
  1503. defined(TARGET_IS_TM4C129_RA1)
  1504. #define ROM_EMACHashFilterSet \
  1505. ((void (*)(uint32_t ui32Base, \
  1506. uint32_t ui32HashHi, \
  1507. uint32_t ui32HashLo))ROM_EMACTABLE[39])
  1508. #endif
  1509. #if defined(TARGET_IS_TM4C129_RA1)
  1510. #define ROM_EMACNumAddrGet \
  1511. ((uint32_t (*)(uint32_t ui32Base))ROM_EMACTABLE[40])
  1512. #endif
  1513. #if defined(TARGET_IS_TM4C129_RA1)
  1514. #define ROM_EMACPHYExtendedRead \
  1515. ((uint16_t (*)(uint32_t ui32Base, \
  1516. uint8_t ui8PhyAddr, \
  1517. uint16_t ui16RegAddr))ROM_EMACTABLE[41])
  1518. #endif
  1519. #if defined(TARGET_IS_TM4C129_RA1)
  1520. #define ROM_EMACPHYExtendedWrite \
  1521. ((void (*)(uint32_t ui32Base, \
  1522. uint8_t ui8PhyAddr, \
  1523. uint16_t ui16RegAddr, \
  1524. uint16_t ui16Data))ROM_EMACTABLE[42])
  1525. #endif
  1526. #if defined(TARGET_IS_TM4C129_RA1)
  1527. #define ROM_EMACPowerManagementControlGet \
  1528. ((uint32_t (*)(uint32_t ui32Base))ROM_EMACTABLE[43])
  1529. #endif
  1530. #if defined(TARGET_IS_TM4C129_RA1)
  1531. #define ROM_EMACPowerManagementControlSet \
  1532. ((void (*)(uint32_t ui32Base, \
  1533. uint32_t ui32Flags))ROM_EMACTABLE[44])
  1534. #endif
  1535. #if defined(TARGET_IS_TM4C129_RA1)
  1536. #define ROM_EMACPowerManagementStatusGet \
  1537. ((uint32_t (*)(uint32_t ui32Base))ROM_EMACTABLE[45])
  1538. #endif
  1539. #if defined(TARGET_IS_TM4C129_RA1)
  1540. #define ROM_EMACRemoteWakeUpFrameFilterGet \
  1541. ((void (*)(uint32_t ui32Base, \
  1542. tEMACWakeUpFrameFilter *pFilter))ROM_EMACTABLE[46])
  1543. #endif
  1544. #if defined(TARGET_IS_TM4C129_RA1)
  1545. #define ROM_EMACRemoteWakeUpFrameFilterSet \
  1546. ((void (*)(uint32_t ui32Base, \
  1547. const tEMACWakeUpFrameFilter *pFilter))ROM_EMACTABLE[47])
  1548. #endif
  1549. #if defined(TARGET_IS_TM4C129_RA1)
  1550. #define ROM_EMACTimestampAddendSet \
  1551. ((void (*)(uint32_t ui32Base, \
  1552. uint32_t ui32Seconds))ROM_EMACTABLE[48])
  1553. #endif
  1554. #if defined(TARGET_IS_TM4C129_RA1)
  1555. #define ROM_EMACTimestampConfigGet \
  1556. ((uint32_t (*)(uint32_t ui32Base, \
  1557. uint32_t *pui32SubSecondInc))ROM_EMACTABLE[49])
  1558. #endif
  1559. #if defined(TARGET_IS_TM4C129_RA1)
  1560. #define ROM_EMACTimestampConfigSet \
  1561. ((void (*)(uint32_t ui32Base, \
  1562. uint32_t ui32Config, \
  1563. uint32_t ui32SubSecondInc))ROM_EMACTABLE[50])
  1564. #endif
  1565. #if defined(TARGET_IS_TM4C129_RA1)
  1566. #define ROM_EMACTimestampDisable \
  1567. ((void (*)(uint32_t ui32Base))ROM_EMACTABLE[51])
  1568. #endif
  1569. #if defined(TARGET_IS_TM4C129_RA1)
  1570. #define ROM_EMACTimestampEnable \
  1571. ((void (*)(uint32_t ui32Base))ROM_EMACTABLE[52])
  1572. #endif
  1573. #if defined(TARGET_IS_TM4C129_RA1)
  1574. #define ROM_EMACTimestampIntStatus \
  1575. ((uint32_t (*)(uint32_t ui32Base))ROM_EMACTABLE[53])
  1576. #endif
  1577. #if defined(TARGET_IS_TM4C129_RA1)
  1578. #define ROM_EMACTimestampPPSCommand \
  1579. ((void (*)(uint32_t ui32Base, \
  1580. uint8_t ui8Cmd))ROM_EMACTABLE[54])
  1581. #endif
  1582. #if defined(TARGET_IS_TM4C129_RA1)
  1583. #define ROM_EMACTimestampPPSCommandModeSet \
  1584. ((void (*)(uint32_t ui32Base, \
  1585. uint32_t ui32Config))ROM_EMACTABLE[55])
  1586. #endif
  1587. #if defined(TARGET_IS_TM4C129_RA1)
  1588. #define ROM_EMACTimestampPPSPeriodSet \
  1589. ((void (*)(uint32_t ui32Base, \
  1590. uint32_t ui32Period, \
  1591. uint32_t ui32Width))ROM_EMACTABLE[56])
  1592. #endif
  1593. #if defined(TARGET_IS_TM4C129_RA1)
  1594. #define ROM_EMACTimestampPPSSimpleModeSet \
  1595. ((void (*)(uint32_t ui32Base, \
  1596. uint32_t ui32FreqConfig))ROM_EMACTABLE[57])
  1597. #endif
  1598. #if defined(TARGET_IS_TM4C129_RA1)
  1599. #define ROM_EMACTimestampSysTimeGet \
  1600. ((void (*)(uint32_t ui32Base, \
  1601. uint32_t *pui32Seconds, \
  1602. uint32_t *pui32SubSeconds))ROM_EMACTABLE[58])
  1603. #endif
  1604. #if defined(TARGET_IS_TM4C129_RA1)
  1605. #define ROM_EMACTimestampSysTimeSet \
  1606. ((void (*)(uint32_t ui32Base, \
  1607. uint32_t ui32Seconds, \
  1608. uint32_t ui32SubSeconds))ROM_EMACTABLE[59])
  1609. #endif
  1610. #if defined(TARGET_IS_TM4C129_RA1)
  1611. #define ROM_EMACTimestampSysTimeUpdate \
  1612. ((void (*)(uint32_t ui32Base, \
  1613. uint32_t ui32Seconds, \
  1614. uint32_t ui32SubSeconds, \
  1615. bool bInc))ROM_EMACTABLE[60])
  1616. #endif
  1617. #if defined(TARGET_IS_TM4C129_RA1)
  1618. #define ROM_EMACTimestampTargetIntDisable \
  1619. ((void (*)(uint32_t ui32Base))ROM_EMACTABLE[61])
  1620. #endif
  1621. #if defined(TARGET_IS_TM4C129_RA1)
  1622. #define ROM_EMACTimestampTargetIntEnable \
  1623. ((void (*)(uint32_t ui32Base))ROM_EMACTABLE[62])
  1624. #endif
  1625. #if defined(TARGET_IS_TM4C129_RA1)
  1626. #define ROM_EMACTimestampTargetSet \
  1627. ((void (*)(uint32_t ui32Base, \
  1628. uint32_t ui32Seconds, \
  1629. uint32_t ui32Nanoseconds))ROM_EMACTABLE[63])
  1630. #endif
  1631. #if defined(TARGET_IS_TM4C129_RA1)
  1632. #define ROM_EMACVLANHashFilterBitCalculate \
  1633. ((uint32_t (*)(uint16_t ui16Tag))ROM_EMACTABLE[64])
  1634. #endif
  1635. #if defined(TARGET_IS_TM4C129_RA1)
  1636. #define ROM_EMACVLANHashFilterGet \
  1637. ((uint32_t (*)(uint32_t ui32Base))ROM_EMACTABLE[65])
  1638. #endif
  1639. #if defined(TARGET_IS_TM4C129_RA1)
  1640. #define ROM_EMACVLANHashFilterSet \
  1641. ((void (*)(uint32_t ui32Base, \
  1642. uint32_t ui32Hash))ROM_EMACTABLE[66])
  1643. #endif
  1644. #if defined(TARGET_IS_TM4C129_RA1)
  1645. #define ROM_EMACVLANRxConfigGet \
  1646. ((uint32_t (*)(uint32_t ui32Base, \
  1647. uint16_t *pui16Tag))ROM_EMACTABLE[67])
  1648. #endif
  1649. #if defined(TARGET_IS_TM4C129_RA1)
  1650. #define ROM_EMACVLANRxConfigSet \
  1651. ((void (*)(uint32_t ui32Base, \
  1652. uint16_t ui16Tag, \
  1653. uint32_t ui32Config))ROM_EMACTABLE[68])
  1654. #endif
  1655. #if defined(TARGET_IS_TM4C129_RA1)
  1656. #define ROM_EMACVLANTxConfigGet \
  1657. ((uint32_t (*)(uint32_t ui32Base, \
  1658. uint16_t *pui16Tag))ROM_EMACTABLE[69])
  1659. #endif
  1660. #if defined(TARGET_IS_TM4C129_RA1)
  1661. #define ROM_EMACVLANTxConfigSet \
  1662. ((void (*)(uint32_t ui32Base, \
  1663. uint16_t ui16Tag, \
  1664. uint32_t ui32Config))ROM_EMACTABLE[70])
  1665. #endif
  1666. #if defined(TARGET_IS_TM4C129_RA1)
  1667. #define ROM_UpdateEMAC \
  1668. ((void (*)(uint32_t ui32Clock))ROM_EMACTABLE[71])
  1669. #endif
  1670. //*****************************************************************************
  1671. //
  1672. // Macros for calling ROM functions in the Flash API.
  1673. //
  1674. //*****************************************************************************
  1675. #if defined(TARGET_IS_TM4C123_RA1) || \
  1676. defined(TARGET_IS_TM4C123_RA3) || \
  1677. defined(TARGET_IS_TM4C123_RB1) || \
  1678. defined(TARGET_IS_TM4C129_RA0) || \
  1679. defined(TARGET_IS_TM4C129_RA1)
  1680. #define ROM_FlashProgram \
  1681. ((int32_t (*)(uint32_t *pui32Data, \
  1682. uint32_t ui32Address, \
  1683. uint32_t ui32Count))ROM_FLASHTABLE[0])
  1684. #endif
  1685. #if defined(TARGET_IS_TM4C123_RA1) || \
  1686. defined(TARGET_IS_TM4C123_RA3) || \
  1687. defined(TARGET_IS_TM4C123_RB1) || \
  1688. defined(TARGET_IS_TM4C129_RA0) || \
  1689. defined(TARGET_IS_TM4C129_RA1)
  1690. #define ROM_FlashErase \
  1691. ((int32_t (*)(uint32_t ui32Address))ROM_FLASHTABLE[3])
  1692. #endif
  1693. #if defined(TARGET_IS_TM4C123_RA1) || \
  1694. defined(TARGET_IS_TM4C123_RA3) || \
  1695. defined(TARGET_IS_TM4C123_RB1) || \
  1696. defined(TARGET_IS_TM4C129_RA0) || \
  1697. defined(TARGET_IS_TM4C129_RA1)
  1698. #define ROM_FlashProtectGet \
  1699. ((tFlashProtection (*)(uint32_t ui32Address))ROM_FLASHTABLE[4])
  1700. #endif
  1701. #if defined(TARGET_IS_TM4C123_RA1) || \
  1702. defined(TARGET_IS_TM4C123_RA3) || \
  1703. defined(TARGET_IS_TM4C123_RB1) || \
  1704. defined(TARGET_IS_TM4C129_RA0) || \
  1705. defined(TARGET_IS_TM4C129_RA1)
  1706. #define ROM_FlashProtectSet \
  1707. ((int32_t (*)(uint32_t ui32Address, \
  1708. tFlashProtection eProtect))ROM_FLASHTABLE[5])
  1709. #endif
  1710. #if defined(TARGET_IS_TM4C123_RA1) || \
  1711. defined(TARGET_IS_TM4C123_RA3) || \
  1712. defined(TARGET_IS_TM4C123_RB1) || \
  1713. defined(TARGET_IS_TM4C129_RA0) || \
  1714. defined(TARGET_IS_TM4C129_RA1)
  1715. #define ROM_FlashProtectSave \
  1716. ((int32_t (*)(void))ROM_FLASHTABLE[6])
  1717. #endif
  1718. #if defined(TARGET_IS_TM4C123_RA1) || \
  1719. defined(TARGET_IS_TM4C123_RA3) || \
  1720. defined(TARGET_IS_TM4C123_RB1) || \
  1721. defined(TARGET_IS_TM4C129_RA0) || \
  1722. defined(TARGET_IS_TM4C129_RA1)
  1723. #define ROM_FlashUserGet \
  1724. ((int32_t (*)(uint32_t *pui32User0, \
  1725. uint32_t *pui32User1))ROM_FLASHTABLE[7])
  1726. #endif
  1727. #if defined(TARGET_IS_TM4C123_RA1) || \
  1728. defined(TARGET_IS_TM4C123_RA3) || \
  1729. defined(TARGET_IS_TM4C123_RB1) || \
  1730. defined(TARGET_IS_TM4C129_RA0) || \
  1731. defined(TARGET_IS_TM4C129_RA1)
  1732. #define ROM_FlashUserSet \
  1733. ((int32_t (*)(uint32_t ui32User0, \
  1734. uint32_t ui32User1))ROM_FLASHTABLE[8])
  1735. #endif
  1736. #if defined(TARGET_IS_TM4C123_RA1) || \
  1737. defined(TARGET_IS_TM4C123_RA3) || \
  1738. defined(TARGET_IS_TM4C123_RB1) || \
  1739. defined(TARGET_IS_TM4C129_RA0) || \
  1740. defined(TARGET_IS_TM4C129_RA1)
  1741. #define ROM_FlashUserSave \
  1742. ((int32_t (*)(void))ROM_FLASHTABLE[9])
  1743. #endif
  1744. #if defined(TARGET_IS_TM4C123_RA1) || \
  1745. defined(TARGET_IS_TM4C123_RA3) || \
  1746. defined(TARGET_IS_TM4C123_RB1) || \
  1747. defined(TARGET_IS_TM4C129_RA0) || \
  1748. defined(TARGET_IS_TM4C129_RA1)
  1749. #define ROM_FlashIntEnable \
  1750. ((void (*)(uint32_t ui32IntFlags))ROM_FLASHTABLE[10])
  1751. #endif
  1752. #if defined(TARGET_IS_TM4C123_RA1) || \
  1753. defined(TARGET_IS_TM4C123_RA3) || \
  1754. defined(TARGET_IS_TM4C123_RB1) || \
  1755. defined(TARGET_IS_TM4C129_RA0) || \
  1756. defined(TARGET_IS_TM4C129_RA1)
  1757. #define ROM_FlashIntDisable \
  1758. ((void (*)(uint32_t ui32IntFlags))ROM_FLASHTABLE[11])
  1759. #endif
  1760. #if defined(TARGET_IS_TM4C123_RA1) || \
  1761. defined(TARGET_IS_TM4C123_RA3) || \
  1762. defined(TARGET_IS_TM4C123_RB1) || \
  1763. defined(TARGET_IS_TM4C129_RA0) || \
  1764. defined(TARGET_IS_TM4C129_RA1)
  1765. #define ROM_FlashIntStatus \
  1766. ((uint32_t (*)(bool bMasked))ROM_FLASHTABLE[12])
  1767. #endif
  1768. #if defined(TARGET_IS_TM4C123_RA1) || \
  1769. defined(TARGET_IS_TM4C123_RA3) || \
  1770. defined(TARGET_IS_TM4C123_RB1) || \
  1771. defined(TARGET_IS_TM4C129_RA0) || \
  1772. defined(TARGET_IS_TM4C129_RA1)
  1773. #define ROM_FlashIntClear \
  1774. ((void (*)(uint32_t ui32IntFlags))ROM_FLASHTABLE[13])
  1775. #endif
  1776. //*****************************************************************************
  1777. //
  1778. // Macros for calling ROM functions in the FPU API.
  1779. //
  1780. //*****************************************************************************
  1781. #if defined(TARGET_IS_TM4C123_RA1) || \
  1782. defined(TARGET_IS_TM4C123_RA3) || \
  1783. defined(TARGET_IS_TM4C123_RB1) || \
  1784. defined(TARGET_IS_TM4C129_RA0) || \
  1785. defined(TARGET_IS_TM4C129_RA1)
  1786. #define ROM_FPUEnable \
  1787. ((void (*)(void))ROM_FPUTABLE[0])
  1788. #endif
  1789. #if defined(TARGET_IS_TM4C123_RA1) || \
  1790. defined(TARGET_IS_TM4C123_RA3) || \
  1791. defined(TARGET_IS_TM4C123_RB1) || \
  1792. defined(TARGET_IS_TM4C129_RA0) || \
  1793. defined(TARGET_IS_TM4C129_RA1)
  1794. #define ROM_FPUDisable \
  1795. ((void (*)(void))ROM_FPUTABLE[1])
  1796. #endif
  1797. #if defined(TARGET_IS_TM4C123_RA1) || \
  1798. defined(TARGET_IS_TM4C123_RA3) || \
  1799. defined(TARGET_IS_TM4C123_RB1) || \
  1800. defined(TARGET_IS_TM4C129_RA0) || \
  1801. defined(TARGET_IS_TM4C129_RA1)
  1802. #define ROM_FPUFlushToZeroModeSet \
  1803. ((void (*)(uint32_t ui32Mode))ROM_FPUTABLE[2])
  1804. #endif
  1805. #if defined(TARGET_IS_TM4C123_RA1) || \
  1806. defined(TARGET_IS_TM4C123_RA3) || \
  1807. defined(TARGET_IS_TM4C123_RB1) || \
  1808. defined(TARGET_IS_TM4C129_RA0) || \
  1809. defined(TARGET_IS_TM4C129_RA1)
  1810. #define ROM_FPUHalfPrecisionModeSet \
  1811. ((void (*)(uint32_t ui32Mode))ROM_FPUTABLE[3])
  1812. #endif
  1813. #if defined(TARGET_IS_TM4C123_RA1) || \
  1814. defined(TARGET_IS_TM4C123_RA3) || \
  1815. defined(TARGET_IS_TM4C123_RB1) || \
  1816. defined(TARGET_IS_TM4C129_RA0) || \
  1817. defined(TARGET_IS_TM4C129_RA1)
  1818. #define ROM_FPULazyStackingEnable \
  1819. ((void (*)(void))ROM_FPUTABLE[4])
  1820. #endif
  1821. #if defined(TARGET_IS_TM4C123_RA1) || \
  1822. defined(TARGET_IS_TM4C123_RA3) || \
  1823. defined(TARGET_IS_TM4C123_RB1) || \
  1824. defined(TARGET_IS_TM4C129_RA0) || \
  1825. defined(TARGET_IS_TM4C129_RA1)
  1826. #define ROM_FPUNaNModeSet \
  1827. ((void (*)(uint32_t ui32Mode))ROM_FPUTABLE[5])
  1828. #endif
  1829. #if defined(TARGET_IS_TM4C123_RA1) || \
  1830. defined(TARGET_IS_TM4C123_RA3) || \
  1831. defined(TARGET_IS_TM4C123_RB1) || \
  1832. defined(TARGET_IS_TM4C129_RA0) || \
  1833. defined(TARGET_IS_TM4C129_RA1)
  1834. #define ROM_FPURoundingModeSet \
  1835. ((void (*)(uint32_t ui32Mode))ROM_FPUTABLE[6])
  1836. #endif
  1837. #if defined(TARGET_IS_TM4C123_RA1) || \
  1838. defined(TARGET_IS_TM4C123_RA3) || \
  1839. defined(TARGET_IS_TM4C123_RB1) || \
  1840. defined(TARGET_IS_TM4C129_RA0) || \
  1841. defined(TARGET_IS_TM4C129_RA1)
  1842. #define ROM_FPUStackingDisable \
  1843. ((void (*)(void))ROM_FPUTABLE[7])
  1844. #endif
  1845. #if defined(TARGET_IS_TM4C123_RA1) || \
  1846. defined(TARGET_IS_TM4C123_RA3) || \
  1847. defined(TARGET_IS_TM4C123_RB1) || \
  1848. defined(TARGET_IS_TM4C129_RA0) || \
  1849. defined(TARGET_IS_TM4C129_RA1)
  1850. #define ROM_FPUStackingEnable \
  1851. ((void (*)(void))ROM_FPUTABLE[8])
  1852. #endif
  1853. //*****************************************************************************
  1854. //
  1855. // Macros for calling ROM functions in the GPIO API.
  1856. //
  1857. //*****************************************************************************
  1858. #if defined(TARGET_IS_TM4C123_RA1) || \
  1859. defined(TARGET_IS_TM4C123_RA3) || \
  1860. defined(TARGET_IS_TM4C123_RB1) || \
  1861. defined(TARGET_IS_TM4C129_RA0) || \
  1862. defined(TARGET_IS_TM4C129_RA1)
  1863. #define ROM_GPIOPinWrite \
  1864. ((void (*)(uint32_t ui32Port, \
  1865. uint8_t ui8Pins, \
  1866. uint8_t ui8Val))ROM_GPIOTABLE[0])
  1867. #endif
  1868. #if defined(TARGET_IS_TM4C123_RA1) || \
  1869. defined(TARGET_IS_TM4C123_RA3) || \
  1870. defined(TARGET_IS_TM4C123_RB1) || \
  1871. defined(TARGET_IS_TM4C129_RA0) || \
  1872. defined(TARGET_IS_TM4C129_RA1)
  1873. #define ROM_GPIODirModeSet \
  1874. ((void (*)(uint32_t ui32Port, \
  1875. uint8_t ui8Pins, \
  1876. uint32_t ui32PinIO))ROM_GPIOTABLE[1])
  1877. #endif
  1878. #if defined(TARGET_IS_TM4C123_RA1) || \
  1879. defined(TARGET_IS_TM4C123_RA3) || \
  1880. defined(TARGET_IS_TM4C123_RB1) || \
  1881. defined(TARGET_IS_TM4C129_RA0) || \
  1882. defined(TARGET_IS_TM4C129_RA1)
  1883. #define ROM_GPIODirModeGet \
  1884. ((uint32_t (*)(uint32_t ui32Port, \
  1885. uint8_t ui8Pin))ROM_GPIOTABLE[2])
  1886. #endif
  1887. #if defined(TARGET_IS_TM4C123_RA1) || \
  1888. defined(TARGET_IS_TM4C123_RA3) || \
  1889. defined(TARGET_IS_TM4C123_RB1) || \
  1890. defined(TARGET_IS_TM4C129_RA0) || \
  1891. defined(TARGET_IS_TM4C129_RA1)
  1892. #define ROM_GPIOIntTypeSet \
  1893. ((void (*)(uint32_t ui32Port, \
  1894. uint8_t ui8Pins, \
  1895. uint32_t ui32IntType))ROM_GPIOTABLE[3])
  1896. #endif
  1897. #if defined(TARGET_IS_TM4C123_RA1) || \
  1898. defined(TARGET_IS_TM4C123_RA3) || \
  1899. defined(TARGET_IS_TM4C123_RB1) || \
  1900. defined(TARGET_IS_TM4C129_RA0) || \
  1901. defined(TARGET_IS_TM4C129_RA1)
  1902. #define ROM_GPIOIntTypeGet \
  1903. ((uint32_t (*)(uint32_t ui32Port, \
  1904. uint8_t ui8Pin))ROM_GPIOTABLE[4])
  1905. #endif
  1906. #if defined(TARGET_IS_TM4C123_RA1) || \
  1907. defined(TARGET_IS_TM4C123_RA3) || \
  1908. defined(TARGET_IS_TM4C123_RB1)
  1909. #define ROM_GPIOPadConfigSet \
  1910. ((void (*)(uint32_t ui32Port, \
  1911. uint8_t ui8Pins, \
  1912. uint32_t ui32Strength, \
  1913. uint32_t ui32PadType))ROM_GPIOTABLE[5])
  1914. #endif
  1915. #if defined(TARGET_IS_TM4C123_RA1) || \
  1916. defined(TARGET_IS_TM4C123_RA3) || \
  1917. defined(TARGET_IS_TM4C123_RB1) || \
  1918. defined(TARGET_IS_TM4C129_RA0) || \
  1919. defined(TARGET_IS_TM4C129_RA1)
  1920. #define ROM_GPIOPadConfigGet \
  1921. ((void (*)(uint32_t ui32Port, \
  1922. uint8_t ui8Pin, \
  1923. uint32_t *pui32Strength, \
  1924. uint32_t *pui32PadType))ROM_GPIOTABLE[6])
  1925. #endif
  1926. #if defined(TARGET_IS_TM4C123_RA1) || \
  1927. defined(TARGET_IS_TM4C123_RA3) || \
  1928. defined(TARGET_IS_TM4C123_RB1) || \
  1929. defined(TARGET_IS_TM4C129_RA0) || \
  1930. defined(TARGET_IS_TM4C129_RA1)
  1931. #define ROM_GPIOPinRead \
  1932. ((int32_t (*)(uint32_t ui32Port, \
  1933. uint8_t ui8Pins))ROM_GPIOTABLE[11])
  1934. #endif
  1935. #if defined(TARGET_IS_TM4C123_RA1) || \
  1936. defined(TARGET_IS_TM4C123_RA3) || \
  1937. defined(TARGET_IS_TM4C123_RB1)
  1938. #define ROM_GPIOPinTypeCAN \
  1939. ((void (*)(uint32_t ui32Port, \
  1940. uint8_t ui8Pins))ROM_GPIOTABLE[12])
  1941. #endif
  1942. #if defined(TARGET_IS_TM4C123_RA1) || \
  1943. defined(TARGET_IS_TM4C123_RA3) || \
  1944. defined(TARGET_IS_TM4C123_RB1) || \
  1945. defined(TARGET_IS_TM4C129_RA0) || \
  1946. defined(TARGET_IS_TM4C129_RA1)
  1947. #define ROM_GPIOPinTypeComparator \
  1948. ((void (*)(uint32_t ui32Port, \
  1949. uint8_t ui8Pins))ROM_GPIOTABLE[13])
  1950. #endif
  1951. #if defined(TARGET_IS_TM4C123_RA1) || \
  1952. defined(TARGET_IS_TM4C123_RA3) || \
  1953. defined(TARGET_IS_TM4C123_RB1) || \
  1954. defined(TARGET_IS_TM4C129_RA0) || \
  1955. defined(TARGET_IS_TM4C129_RA1)
  1956. #define ROM_GPIOPinTypeGPIOInput \
  1957. ((void (*)(uint32_t ui32Port, \
  1958. uint8_t ui8Pins))ROM_GPIOTABLE[14])
  1959. #endif
  1960. #if defined(TARGET_IS_TM4C123_RA1) || \
  1961. defined(TARGET_IS_TM4C123_RA3) || \
  1962. defined(TARGET_IS_TM4C123_RB1) || \
  1963. defined(TARGET_IS_TM4C129_RA0) || \
  1964. defined(TARGET_IS_TM4C129_RA1)
  1965. #define ROM_GPIOPinTypeGPIOOutput \
  1966. ((void (*)(uint32_t ui32Port, \
  1967. uint8_t ui8Pins))ROM_GPIOTABLE[15])
  1968. #endif
  1969. #if defined(TARGET_IS_TM4C123_RA1) || \
  1970. defined(TARGET_IS_TM4C123_RA3) || \
  1971. defined(TARGET_IS_TM4C123_RB1) || \
  1972. defined(TARGET_IS_TM4C129_RA0) || \
  1973. defined(TARGET_IS_TM4C129_RA1)
  1974. #define ROM_GPIOPinTypeI2C \
  1975. ((void (*)(uint32_t ui32Port, \
  1976. uint8_t ui8Pins))ROM_GPIOTABLE[16])
  1977. #endif
  1978. #if defined(TARGET_IS_TM4C123_RA1) || \
  1979. defined(TARGET_IS_TM4C123_RA3) || \
  1980. defined(TARGET_IS_TM4C123_RB1) || \
  1981. defined(TARGET_IS_TM4C129_RA0) || \
  1982. defined(TARGET_IS_TM4C129_RA1)
  1983. #define ROM_GPIOPinTypePWM \
  1984. ((void (*)(uint32_t ui32Port, \
  1985. uint8_t ui8Pins))ROM_GPIOTABLE[17])
  1986. #endif
  1987. #if defined(TARGET_IS_TM4C123_RA1) || \
  1988. defined(TARGET_IS_TM4C123_RA3) || \
  1989. defined(TARGET_IS_TM4C123_RB1) || \
  1990. defined(TARGET_IS_TM4C129_RA0) || \
  1991. defined(TARGET_IS_TM4C129_RA1)
  1992. #define ROM_GPIOPinTypeQEI \
  1993. ((void (*)(uint32_t ui32Port, \
  1994. uint8_t ui8Pins))ROM_GPIOTABLE[18])
  1995. #endif
  1996. #if defined(TARGET_IS_TM4C123_RA1) || \
  1997. defined(TARGET_IS_TM4C123_RA3) || \
  1998. defined(TARGET_IS_TM4C123_RB1) || \
  1999. defined(TARGET_IS_TM4C129_RA0) || \
  2000. defined(TARGET_IS_TM4C129_RA1)
  2001. #define ROM_GPIOPinTypeSSI \
  2002. ((void (*)(uint32_t ui32Port, \
  2003. uint8_t ui8Pins))ROM_GPIOTABLE[19])
  2004. #endif
  2005. #if defined(TARGET_IS_TM4C123_RA1) || \
  2006. defined(TARGET_IS_TM4C123_RA3) || \
  2007. defined(TARGET_IS_TM4C123_RB1) || \
  2008. defined(TARGET_IS_TM4C129_RA0) || \
  2009. defined(TARGET_IS_TM4C129_RA1)
  2010. #define ROM_GPIOPinTypeTimer \
  2011. ((void (*)(uint32_t ui32Port, \
  2012. uint8_t ui8Pins))ROM_GPIOTABLE[20])
  2013. #endif
  2014. #if defined(TARGET_IS_TM4C123_RA1) || \
  2015. defined(TARGET_IS_TM4C123_RA3) || \
  2016. defined(TARGET_IS_TM4C123_RB1) || \
  2017. defined(TARGET_IS_TM4C129_RA0) || \
  2018. defined(TARGET_IS_TM4C129_RA1)
  2019. #define ROM_GPIOPinTypeUART \
  2020. ((void (*)(uint32_t ui32Port, \
  2021. uint8_t ui8Pins))ROM_GPIOTABLE[21])
  2022. #endif
  2023. #if defined(TARGET_IS_TM4C123_RA1) || \
  2024. defined(TARGET_IS_TM4C123_RA3) || \
  2025. defined(TARGET_IS_TM4C123_RB1) || \
  2026. defined(TARGET_IS_TM4C129_RA0) || \
  2027. defined(TARGET_IS_TM4C129_RA1)
  2028. #define ROM_GPIOPinTypeGPIOOutputOD \
  2029. ((void (*)(uint32_t ui32Port, \
  2030. uint8_t ui8Pins))ROM_GPIOTABLE[22])
  2031. #endif
  2032. #if defined(TARGET_IS_TM4C123_RA1) || \
  2033. defined(TARGET_IS_TM4C123_RA3) || \
  2034. defined(TARGET_IS_TM4C123_RB1) || \
  2035. defined(TARGET_IS_TM4C129_RA0) || \
  2036. defined(TARGET_IS_TM4C129_RA1)
  2037. #define ROM_GPIOPinTypeADC \
  2038. ((void (*)(uint32_t ui32Port, \
  2039. uint8_t ui8Pins))ROM_GPIOTABLE[23])
  2040. #endif
  2041. #if defined(TARGET_IS_TM4C123_RA1) || \
  2042. defined(TARGET_IS_TM4C123_RA3) || \
  2043. defined(TARGET_IS_TM4C123_RB1) || \
  2044. defined(TARGET_IS_TM4C129_RA0) || \
  2045. defined(TARGET_IS_TM4C129_RA1)
  2046. #define ROM_GPIOPinTypeUSBDigital \
  2047. ((void (*)(uint32_t ui32Port, \
  2048. uint8_t ui8Pins))ROM_GPIOTABLE[24])
  2049. #endif
  2050. #if defined(TARGET_IS_TM4C123_RA1) || \
  2051. defined(TARGET_IS_TM4C123_RA3) || \
  2052. defined(TARGET_IS_TM4C123_RB1) || \
  2053. defined(TARGET_IS_TM4C129_RA0) || \
  2054. defined(TARGET_IS_TM4C129_RA1)
  2055. #define ROM_GPIOPinConfigure \
  2056. ((void (*)(uint32_t ui32PinConfig))ROM_GPIOTABLE[26])
  2057. #endif
  2058. #if defined(TARGET_IS_TM4C123_RA1) || \
  2059. defined(TARGET_IS_TM4C123_RA3) || \
  2060. defined(TARGET_IS_TM4C123_RB1) || \
  2061. defined(TARGET_IS_TM4C129_RA0) || \
  2062. defined(TARGET_IS_TM4C129_RA1)
  2063. #define ROM_GPIOPinTypeUSBAnalog \
  2064. ((void (*)(uint32_t ui32Port, \
  2065. uint8_t ui8Pins))ROM_GPIOTABLE[28])
  2066. #endif
  2067. #if defined(TARGET_IS_TM4C123_RA1) || \
  2068. defined(TARGET_IS_TM4C123_RA3) || \
  2069. defined(TARGET_IS_TM4C123_RB1) || \
  2070. defined(TARGET_IS_TM4C129_RA0) || \
  2071. defined(TARGET_IS_TM4C129_RA1)
  2072. #define ROM_GPIODMATriggerEnable \
  2073. ((void (*)(uint32_t ui32Port, \
  2074. uint8_t ui8Pins))ROM_GPIOTABLE[31])
  2075. #endif
  2076. #if defined(TARGET_IS_TM4C123_RA1) || \
  2077. defined(TARGET_IS_TM4C123_RA3) || \
  2078. defined(TARGET_IS_TM4C123_RB1) || \
  2079. defined(TARGET_IS_TM4C129_RA0) || \
  2080. defined(TARGET_IS_TM4C129_RA1)
  2081. #define ROM_GPIODMATriggerDisable \
  2082. ((void (*)(uint32_t ui32Port, \
  2083. uint8_t ui8Pins))ROM_GPIOTABLE[32])
  2084. #endif
  2085. #if defined(TARGET_IS_TM4C123_RA1) || \
  2086. defined(TARGET_IS_TM4C123_RA3) || \
  2087. defined(TARGET_IS_TM4C123_RB1) || \
  2088. defined(TARGET_IS_TM4C129_RA0) || \
  2089. defined(TARGET_IS_TM4C129_RA1)
  2090. #define ROM_GPIOADCTriggerEnable \
  2091. ((void (*)(uint32_t ui32Port, \
  2092. uint8_t ui8Pins))ROM_GPIOTABLE[33])
  2093. #endif
  2094. #if defined(TARGET_IS_TM4C123_RA1) || \
  2095. defined(TARGET_IS_TM4C123_RA3) || \
  2096. defined(TARGET_IS_TM4C123_RB1) || \
  2097. defined(TARGET_IS_TM4C129_RA0) || \
  2098. defined(TARGET_IS_TM4C129_RA1)
  2099. #define ROM_GPIOADCTriggerDisable \
  2100. ((void (*)(uint32_t ui32Port, \
  2101. uint8_t ui8Pins))ROM_GPIOTABLE[34])
  2102. #endif
  2103. #if defined(TARGET_IS_TM4C123_RA3) || \
  2104. defined(TARGET_IS_TM4C123_RB1) || \
  2105. defined(TARGET_IS_TM4C129_RA0) || \
  2106. defined(TARGET_IS_TM4C129_RA1)
  2107. #define ROM_GPIOPinTypeI2CSCL \
  2108. ((void (*)(uint32_t ui32Port, \
  2109. uint8_t ui8Pins))ROM_GPIOTABLE[39])
  2110. #endif
  2111. #if defined(TARGET_IS_TM4C129_RA0) || \
  2112. defined(TARGET_IS_TM4C129_RA1)
  2113. #define ROM_GPIOPinTypeOneWire \
  2114. ((void (*)(uint32_t ui32Port, \
  2115. uint8_t ui8Pins))ROM_GPIOTABLE[44])
  2116. #endif
  2117. #if defined(TARGET_IS_TM4C129_RA0) || \
  2118. defined(TARGET_IS_TM4C129_RA1)
  2119. #define ROM_GPIOPinTypeWakeHigh \
  2120. ((void (*)(uint32_t ui32Port, \
  2121. uint8_t ui8Pins))ROM_GPIOTABLE[48])
  2122. #endif
  2123. #if defined(TARGET_IS_TM4C129_RA0) || \
  2124. defined(TARGET_IS_TM4C129_RA1)
  2125. #define ROM_GPIOPinTypeWakeLow \
  2126. ((void (*)(uint32_t ui32Port, \
  2127. uint8_t ui8Pins))ROM_GPIOTABLE[49])
  2128. #endif
  2129. #if defined(TARGET_IS_TM4C129_RA0) || \
  2130. defined(TARGET_IS_TM4C129_RA1)
  2131. #define ROM_GPIOIntClear \
  2132. ((void (*)(uint32_t ui32Port, \
  2133. uint32_t ui32IntFlags))ROM_GPIOTABLE[51])
  2134. #endif
  2135. #if defined(TARGET_IS_TM4C129_RA0) || \
  2136. defined(TARGET_IS_TM4C129_RA1)
  2137. #define ROM_GPIOIntDisable \
  2138. ((void (*)(uint32_t ui32Port, \
  2139. uint32_t ui32IntFlags))ROM_GPIOTABLE[52])
  2140. #endif
  2141. #if defined(TARGET_IS_TM4C129_RA0) || \
  2142. defined(TARGET_IS_TM4C129_RA1)
  2143. #define ROM_GPIOIntEnable \
  2144. ((void (*)(uint32_t ui32Port, \
  2145. uint32_t ui32IntFlags))ROM_GPIOTABLE[53])
  2146. #endif
  2147. #if defined(TARGET_IS_TM4C129_RA0) || \
  2148. defined(TARGET_IS_TM4C129_RA1)
  2149. #define ROM_GPIOIntStatus \
  2150. ((uint32_t (*)(uint32_t ui32Port, \
  2151. bool bMasked))ROM_GPIOTABLE[54])
  2152. #endif
  2153. #if defined(TARGET_IS_TM4C129_RA0) || \
  2154. defined(TARGET_IS_TM4C129_RA1)
  2155. #define ROM_GPIOPinWakeStatus \
  2156. ((uint32_t (*)(uint32_t ui32Port))ROM_GPIOTABLE[55])
  2157. #endif
  2158. //*****************************************************************************
  2159. //
  2160. // Macros for calling ROM functions in the Hibernate API.
  2161. //
  2162. //*****************************************************************************
  2163. #if defined(TARGET_IS_TM4C123_RA1) || \
  2164. defined(TARGET_IS_TM4C123_RA3) || \
  2165. defined(TARGET_IS_TM4C123_RB1) || \
  2166. defined(TARGET_IS_TM4C129_RA0) || \
  2167. defined(TARGET_IS_TM4C129_RA1)
  2168. #define ROM_HibernateIntClear \
  2169. ((void (*)(uint32_t ui32IntFlags))ROM_HIBERNATETABLE[0])
  2170. #endif
  2171. #if defined(TARGET_IS_TM4C123_RA1) || \
  2172. defined(TARGET_IS_TM4C123_RA3) || \
  2173. defined(TARGET_IS_TM4C123_RB1) || \
  2174. defined(TARGET_IS_TM4C129_RA0) || \
  2175. defined(TARGET_IS_TM4C129_RA1)
  2176. #define ROM_HibernateEnableExpClk \
  2177. ((void (*)(uint32_t ui32HibClk))ROM_HIBERNATETABLE[1])
  2178. #endif
  2179. #if defined(TARGET_IS_TM4C123_RA1) || \
  2180. defined(TARGET_IS_TM4C123_RA3) || \
  2181. defined(TARGET_IS_TM4C123_RB1) || \
  2182. defined(TARGET_IS_TM4C129_RA0) || \
  2183. defined(TARGET_IS_TM4C129_RA1)
  2184. #define ROM_HibernateDisable \
  2185. ((void (*)(void))ROM_HIBERNATETABLE[2])
  2186. #endif
  2187. #if defined(TARGET_IS_TM4C123_RA1) || \
  2188. defined(TARGET_IS_TM4C123_RA3) || \
  2189. defined(TARGET_IS_TM4C123_RB1) || \
  2190. defined(TARGET_IS_TM4C129_RA0) || \
  2191. defined(TARGET_IS_TM4C129_RA1)
  2192. #define ROM_HibernateRTCEnable \
  2193. ((void (*)(void))ROM_HIBERNATETABLE[4])
  2194. #endif
  2195. #if defined(TARGET_IS_TM4C123_RA1) || \
  2196. defined(TARGET_IS_TM4C123_RA3) || \
  2197. defined(TARGET_IS_TM4C123_RB1) || \
  2198. defined(TARGET_IS_TM4C129_RA0) || \
  2199. defined(TARGET_IS_TM4C129_RA1)
  2200. #define ROM_HibernateRTCDisable \
  2201. ((void (*)(void))ROM_HIBERNATETABLE[5])
  2202. #endif
  2203. #if defined(TARGET_IS_TM4C123_RA1) || \
  2204. defined(TARGET_IS_TM4C123_RA3) || \
  2205. defined(TARGET_IS_TM4C123_RB1) || \
  2206. defined(TARGET_IS_TM4C129_RA0) || \
  2207. defined(TARGET_IS_TM4C129_RA1)
  2208. #define ROM_HibernateWakeSet \
  2209. ((void (*)(uint32_t ui32WakeFlags))ROM_HIBERNATETABLE[6])
  2210. #endif
  2211. #if defined(TARGET_IS_TM4C123_RA1) || \
  2212. defined(TARGET_IS_TM4C123_RA3) || \
  2213. defined(TARGET_IS_TM4C123_RB1) || \
  2214. defined(TARGET_IS_TM4C129_RA0) || \
  2215. defined(TARGET_IS_TM4C129_RA1)
  2216. #define ROM_HibernateWakeGet \
  2217. ((uint32_t (*)(void))ROM_HIBERNATETABLE[7])
  2218. #endif
  2219. #if defined(TARGET_IS_TM4C123_RA1) || \
  2220. defined(TARGET_IS_TM4C123_RA3) || \
  2221. defined(TARGET_IS_TM4C123_RB1) || \
  2222. defined(TARGET_IS_TM4C129_RA0) || \
  2223. defined(TARGET_IS_TM4C129_RA1)
  2224. #define ROM_HibernateLowBatSet \
  2225. ((void (*)(uint32_t ui32LowBatFlags))ROM_HIBERNATETABLE[8])
  2226. #endif
  2227. #if defined(TARGET_IS_TM4C123_RA1) || \
  2228. defined(TARGET_IS_TM4C123_RA3) || \
  2229. defined(TARGET_IS_TM4C123_RB1) || \
  2230. defined(TARGET_IS_TM4C129_RA0) || \
  2231. defined(TARGET_IS_TM4C129_RA1)
  2232. #define ROM_HibernateLowBatGet \
  2233. ((uint32_t (*)(void))ROM_HIBERNATETABLE[9])
  2234. #endif
  2235. #if defined(TARGET_IS_TM4C123_RA1) || \
  2236. defined(TARGET_IS_TM4C123_RA3) || \
  2237. defined(TARGET_IS_TM4C123_RB1) || \
  2238. defined(TARGET_IS_TM4C129_RA0) || \
  2239. defined(TARGET_IS_TM4C129_RA1)
  2240. #define ROM_HibernateRTCSet \
  2241. ((void (*)(uint32_t ui32RTCValue))ROM_HIBERNATETABLE[10])
  2242. #endif
  2243. #if defined(TARGET_IS_TM4C123_RA1) || \
  2244. defined(TARGET_IS_TM4C123_RA3) || \
  2245. defined(TARGET_IS_TM4C123_RB1) || \
  2246. defined(TARGET_IS_TM4C129_RA0) || \
  2247. defined(TARGET_IS_TM4C129_RA1)
  2248. #define ROM_HibernateRTCGet \
  2249. ((uint32_t (*)(void))ROM_HIBERNATETABLE[11])
  2250. #endif
  2251. #if defined(TARGET_IS_TM4C123_RA1) || \
  2252. defined(TARGET_IS_TM4C123_RA3) || \
  2253. defined(TARGET_IS_TM4C123_RB1) || \
  2254. defined(TARGET_IS_TM4C129_RA0) || \
  2255. defined(TARGET_IS_TM4C129_RA1)
  2256. #define ROM_HibernateRTCTrimSet \
  2257. ((void (*)(uint32_t ui32Trim))ROM_HIBERNATETABLE[16])
  2258. #endif
  2259. #if defined(TARGET_IS_TM4C123_RA1) || \
  2260. defined(TARGET_IS_TM4C123_RA3) || \
  2261. defined(TARGET_IS_TM4C123_RB1) || \
  2262. defined(TARGET_IS_TM4C129_RA0) || \
  2263. defined(TARGET_IS_TM4C129_RA1)
  2264. #define ROM_HibernateRTCTrimGet \
  2265. ((uint32_t (*)(void))ROM_HIBERNATETABLE[17])
  2266. #endif
  2267. #if defined(TARGET_IS_TM4C123_RA1) || \
  2268. defined(TARGET_IS_TM4C123_RA3) || \
  2269. defined(TARGET_IS_TM4C123_RB1) || \
  2270. defined(TARGET_IS_TM4C129_RA0) || \
  2271. defined(TARGET_IS_TM4C129_RA1)
  2272. #define ROM_HibernateDataSet \
  2273. ((void (*)(uint32_t *pui32Data, \
  2274. uint32_t ui32Count))ROM_HIBERNATETABLE[18])
  2275. #endif
  2276. #if defined(TARGET_IS_TM4C123_RA1) || \
  2277. defined(TARGET_IS_TM4C123_RA3) || \
  2278. defined(TARGET_IS_TM4C123_RB1) || \
  2279. defined(TARGET_IS_TM4C129_RA0) || \
  2280. defined(TARGET_IS_TM4C129_RA1)
  2281. #define ROM_HibernateDataGet \
  2282. ((void (*)(uint32_t *pui32Data, \
  2283. uint32_t ui32Count))ROM_HIBERNATETABLE[19])
  2284. #endif
  2285. #if defined(TARGET_IS_TM4C123_RA1) || \
  2286. defined(TARGET_IS_TM4C123_RA3) || \
  2287. defined(TARGET_IS_TM4C123_RB1) || \
  2288. defined(TARGET_IS_TM4C129_RA0) || \
  2289. defined(TARGET_IS_TM4C129_RA1)
  2290. #define ROM_HibernateRequest \
  2291. ((void (*)(void))ROM_HIBERNATETABLE[20])
  2292. #endif
  2293. #if defined(TARGET_IS_TM4C123_RA1) || \
  2294. defined(TARGET_IS_TM4C123_RA3) || \
  2295. defined(TARGET_IS_TM4C123_RB1) || \
  2296. defined(TARGET_IS_TM4C129_RA0) || \
  2297. defined(TARGET_IS_TM4C129_RA1)
  2298. #define ROM_HibernateIntEnable \
  2299. ((void (*)(uint32_t ui32IntFlags))ROM_HIBERNATETABLE[21])
  2300. #endif
  2301. #if defined(TARGET_IS_TM4C123_RA1) || \
  2302. defined(TARGET_IS_TM4C123_RA3) || \
  2303. defined(TARGET_IS_TM4C123_RB1) || \
  2304. defined(TARGET_IS_TM4C129_RA0) || \
  2305. defined(TARGET_IS_TM4C129_RA1)
  2306. #define ROM_HibernateIntDisable \
  2307. ((void (*)(uint32_t ui32IntFlags))ROM_HIBERNATETABLE[22])
  2308. #endif
  2309. #if defined(TARGET_IS_TM4C123_RA1) || \
  2310. defined(TARGET_IS_TM4C123_RA3) || \
  2311. defined(TARGET_IS_TM4C123_RB1) || \
  2312. defined(TARGET_IS_TM4C129_RA0) || \
  2313. defined(TARGET_IS_TM4C129_RA1)
  2314. #define ROM_HibernateIntStatus \
  2315. ((uint32_t (*)(bool bMasked))ROM_HIBERNATETABLE[23])
  2316. #endif
  2317. #if defined(TARGET_IS_TM4C123_RA1) || \
  2318. defined(TARGET_IS_TM4C123_RA3) || \
  2319. defined(TARGET_IS_TM4C123_RB1) || \
  2320. defined(TARGET_IS_TM4C129_RA0) || \
  2321. defined(TARGET_IS_TM4C129_RA1)
  2322. #define ROM_HibernateIsActive \
  2323. ((uint32_t (*)(void))ROM_HIBERNATETABLE[24])
  2324. #endif
  2325. #if defined(TARGET_IS_TM4C123_RA1) || \
  2326. defined(TARGET_IS_TM4C123_RA3) || \
  2327. defined(TARGET_IS_TM4C123_RB1) || \
  2328. defined(TARGET_IS_TM4C129_RA0) || \
  2329. defined(TARGET_IS_TM4C129_RA1)
  2330. #define ROM_HibernateRTCSSGet \
  2331. ((uint32_t (*)(void))ROM_HIBERNATETABLE[27])
  2332. #endif
  2333. #if defined(TARGET_IS_TM4C123_RA1) || \
  2334. defined(TARGET_IS_TM4C123_RA3) || \
  2335. defined(TARGET_IS_TM4C123_RB1) || \
  2336. defined(TARGET_IS_TM4C129_RA0) || \
  2337. defined(TARGET_IS_TM4C129_RA1)
  2338. #define ROM_HibernateClockConfig \
  2339. ((void (*)(uint32_t ui32Config))ROM_HIBERNATETABLE[28])
  2340. #endif
  2341. #if defined(TARGET_IS_TM4C123_RA1) || \
  2342. defined(TARGET_IS_TM4C123_RA3) || \
  2343. defined(TARGET_IS_TM4C123_RB1) || \
  2344. defined(TARGET_IS_TM4C129_RA0) || \
  2345. defined(TARGET_IS_TM4C129_RA1)
  2346. #define ROM_HibernateBatCheckStart \
  2347. ((void (*)(void))ROM_HIBERNATETABLE[29])
  2348. #endif
  2349. #if defined(TARGET_IS_TM4C123_RA1) || \
  2350. defined(TARGET_IS_TM4C123_RA3) || \
  2351. defined(TARGET_IS_TM4C123_RB1) || \
  2352. defined(TARGET_IS_TM4C129_RA0) || \
  2353. defined(TARGET_IS_TM4C129_RA1)
  2354. #define ROM_HibernateBatCheckDone \
  2355. ((uint32_t (*)(void))ROM_HIBERNATETABLE[30])
  2356. #endif
  2357. #if defined(TARGET_IS_TM4C129_RA0) || \
  2358. defined(TARGET_IS_TM4C129_RA1)
  2359. #define ROM_HibernateGPIORetentionEnable \
  2360. ((void (*)(void))ROM_HIBERNATETABLE[31])
  2361. #endif
  2362. #if defined(TARGET_IS_TM4C129_RA0) || \
  2363. defined(TARGET_IS_TM4C129_RA1)
  2364. #define ROM_HibernateGPIORetentionDisable \
  2365. ((void (*)(void))ROM_HIBERNATETABLE[32])
  2366. #endif
  2367. #if defined(TARGET_IS_TM4C129_RA0) || \
  2368. defined(TARGET_IS_TM4C129_RA1)
  2369. #define ROM_HibernateGPIORetentionGet \
  2370. ((bool (*)(void))ROM_HIBERNATETABLE[33])
  2371. #endif
  2372. #if defined(TARGET_IS_TM4C129_RA0) || \
  2373. defined(TARGET_IS_TM4C129_RA1)
  2374. #define ROM_HibernateCounterMode \
  2375. ((void (*)(uint32_t ui32Config))ROM_HIBERNATETABLE[34])
  2376. #endif
  2377. #if defined(TARGET_IS_TM4C123_RB1) || \
  2378. defined(TARGET_IS_TM4C129_RA0) || \
  2379. defined(TARGET_IS_TM4C129_RA1)
  2380. #define ROM_HibernateCalendarSet \
  2381. ((void (*)(struct tm *psTime))ROM_HIBERNATETABLE[35])
  2382. #endif
  2383. #if defined(TARGET_IS_TM4C129_RA0) || \
  2384. defined(TARGET_IS_TM4C129_RA1)
  2385. #define ROM_HibernateCalendarGet \
  2386. ((int (*)(struct tm *psTime))ROM_HIBERNATETABLE[36])
  2387. #endif
  2388. #if defined(TARGET_IS_TM4C129_RA0) || \
  2389. defined(TARGET_IS_TM4C129_RA1)
  2390. #define ROM_HibernateCalendarMatchSet \
  2391. ((void (*)(uint32_t ui32Index, \
  2392. struct tm *psTime))ROM_HIBERNATETABLE[37])
  2393. #endif
  2394. #if defined(TARGET_IS_TM4C129_RA0) || \
  2395. defined(TARGET_IS_TM4C129_RA1)
  2396. #define ROM_HibernateCalendarMatchGet \
  2397. ((void (*)(uint32_t ui32Index, \
  2398. struct tm *psTime))ROM_HIBERNATETABLE[38])
  2399. #endif
  2400. #if defined(TARGET_IS_TM4C129_RA0) || \
  2401. defined(TARGET_IS_TM4C129_RA1)
  2402. #define ROM_HibernateTamperDisable \
  2403. ((void (*)(void))ROM_HIBERNATETABLE[39])
  2404. #endif
  2405. #if defined(TARGET_IS_TM4C129_RA0) || \
  2406. defined(TARGET_IS_TM4C129_RA1)
  2407. #define ROM_HibernateTamperEnable \
  2408. ((void (*)(void))ROM_HIBERNATETABLE[40])
  2409. #endif
  2410. #if defined(TARGET_IS_TM4C129_RA0) || \
  2411. defined(TARGET_IS_TM4C129_RA1)
  2412. #define ROM_HibernateTamperEventsClear \
  2413. ((void (*)(void))ROM_HIBERNATETABLE[41])
  2414. #endif
  2415. #if defined(TARGET_IS_TM4C129_RA0) || \
  2416. defined(TARGET_IS_TM4C129_RA1)
  2417. #define ROM_HibernateTamperEventsConfig \
  2418. ((void (*)(uint32_t ui32Config))ROM_HIBERNATETABLE[42])
  2419. #endif
  2420. #if defined(TARGET_IS_TM4C129_RA0) || \
  2421. defined(TARGET_IS_TM4C129_RA1)
  2422. #define ROM_HibernateTamperEventsGet \
  2423. ((bool (*)(uint32_t ui32Index, \
  2424. uint32_t *pui32RTC, \
  2425. uint32_t *pui32Event))ROM_HIBERNATETABLE[43])
  2426. #endif
  2427. #if defined(TARGET_IS_TM4C129_RA0) || \
  2428. defined(TARGET_IS_TM4C129_RA1)
  2429. #define ROM_HibernateTamperExtOscValid \
  2430. ((bool (*)(void))ROM_HIBERNATETABLE[44])
  2431. #endif
  2432. #if defined(TARGET_IS_TM4C129_RA0) || \
  2433. defined(TARGET_IS_TM4C129_RA1)
  2434. #define ROM_HibernateTamperExtOscRecover \
  2435. ((void (*)(void))ROM_HIBERNATETABLE[45])
  2436. #endif
  2437. #if defined(TARGET_IS_TM4C129_RA0) || \
  2438. defined(TARGET_IS_TM4C129_RA1)
  2439. #define ROM_HibernateTamperIODisable \
  2440. ((void (*)(uint32_t ui32Input))ROM_HIBERNATETABLE[46])
  2441. #endif
  2442. #if defined(TARGET_IS_TM4C129_RA0) || \
  2443. defined(TARGET_IS_TM4C129_RA1)
  2444. #define ROM_HibernateTamperIOEnable \
  2445. ((void (*)(uint32_t ui32Input, \
  2446. uint32_t ui32Config))ROM_HIBERNATETABLE[47])
  2447. #endif
  2448. #if defined(TARGET_IS_TM4C129_RA0) || \
  2449. defined(TARGET_IS_TM4C129_RA1)
  2450. #define ROM_HibernateTamperStatusGet \
  2451. ((uint32_t (*)(void))ROM_HIBERNATETABLE[48])
  2452. #endif
  2453. #if defined(TARGET_IS_TM4C129_RA1)
  2454. #define ROM_HibernateRTCMatchGet \
  2455. ((uint32_t (*)(uint32_t ui32Match))ROM_HIBERNATETABLE[49])
  2456. #endif
  2457. #if defined(TARGET_IS_TM4C129_RA1)
  2458. #define ROM_HibernateRTCMatchSet \
  2459. ((void (*)(uint32_t ui32Match, \
  2460. uint32_t ui32Value))ROM_HIBERNATETABLE[50])
  2461. #endif
  2462. #if defined(TARGET_IS_TM4C129_RA0) || \
  2463. defined(TARGET_IS_TM4C129_RA1)
  2464. #define ROM_HibernateRTCSSMatchGet \
  2465. ((uint32_t (*)(uint32_t ui32Match))ROM_HIBERNATETABLE[51])
  2466. #endif
  2467. #if defined(TARGET_IS_TM4C129_RA1)
  2468. #define ROM_HibernateRTCSSMatchSet \
  2469. ((void (*)(uint32_t ui32Match, \
  2470. uint32_t ui32Value))ROM_HIBERNATETABLE[52])
  2471. #endif
  2472. //*****************************************************************************
  2473. //
  2474. // Macros for calling ROM functions in the I2C API.
  2475. //
  2476. //*****************************************************************************
  2477. #if defined(TARGET_IS_TM4C123_RA1) || \
  2478. defined(TARGET_IS_TM4C123_RA3) || \
  2479. defined(TARGET_IS_TM4C123_RB1) || \
  2480. defined(TARGET_IS_TM4C129_RA0) || \
  2481. defined(TARGET_IS_TM4C129_RA1)
  2482. #define ROM_I2CMasterDataPut \
  2483. ((void (*)(uint32_t ui32Base, \
  2484. uint8_t ui8Data))ROM_I2CTABLE[0])
  2485. #endif
  2486. #if defined(TARGET_IS_TM4C123_RA1) || \
  2487. defined(TARGET_IS_TM4C123_RA3) || \
  2488. defined(TARGET_IS_TM4C123_RB1) || \
  2489. defined(TARGET_IS_TM4C129_RA0) || \
  2490. defined(TARGET_IS_TM4C129_RA1)
  2491. #define ROM_I2CMasterInitExpClk \
  2492. ((void (*)(uint32_t ui32Base, \
  2493. uint32_t ui32I2CClk, \
  2494. bool bFast))ROM_I2CTABLE[1])
  2495. #endif
  2496. #if defined(TARGET_IS_TM4C129_RA1)
  2497. #define ROM_I2CSlaveInit \
  2498. ((void (*)(uint32_t ui32Base, \
  2499. uint8_t ui8SlaveAddr))ROM_I2CTABLE[2])
  2500. #endif
  2501. #if defined(TARGET_IS_TM4C123_RA1) || \
  2502. defined(TARGET_IS_TM4C123_RA3) || \
  2503. defined(TARGET_IS_TM4C123_RB1) || \
  2504. defined(TARGET_IS_TM4C129_RA0) || \
  2505. defined(TARGET_IS_TM4C129_RA1)
  2506. #define ROM_I2CMasterEnable \
  2507. ((void (*)(uint32_t ui32Base))ROM_I2CTABLE[3])
  2508. #endif
  2509. #if defined(TARGET_IS_TM4C129_RA1)
  2510. #define ROM_I2CSlaveEnable \
  2511. ((void (*)(uint32_t ui32Base))ROM_I2CTABLE[4])
  2512. #endif
  2513. #if defined(TARGET_IS_TM4C123_RA1) || \
  2514. defined(TARGET_IS_TM4C123_RA3) || \
  2515. defined(TARGET_IS_TM4C123_RB1) || \
  2516. defined(TARGET_IS_TM4C129_RA0) || \
  2517. defined(TARGET_IS_TM4C129_RA1)
  2518. #define ROM_I2CMasterDisable \
  2519. ((void (*)(uint32_t ui32Base))ROM_I2CTABLE[5])
  2520. #endif
  2521. #if defined(TARGET_IS_TM4C129_RA1)
  2522. #define ROM_I2CSlaveDisable \
  2523. ((void (*)(uint32_t ui32Base))ROM_I2CTABLE[6])
  2524. #endif
  2525. #if defined(TARGET_IS_TM4C123_RA1) || \
  2526. defined(TARGET_IS_TM4C123_RA3) || \
  2527. defined(TARGET_IS_TM4C123_RB1) || \
  2528. defined(TARGET_IS_TM4C129_RA0) || \
  2529. defined(TARGET_IS_TM4C129_RA1)
  2530. #define ROM_I2CMasterIntEnable \
  2531. ((void (*)(uint32_t ui32Base))ROM_I2CTABLE[7])
  2532. #endif
  2533. #if defined(TARGET_IS_TM4C129_RA1)
  2534. #define ROM_I2CSlaveIntEnable \
  2535. ((void (*)(uint32_t ui32Base))ROM_I2CTABLE[8])
  2536. #endif
  2537. #if defined(TARGET_IS_TM4C123_RA1) || \
  2538. defined(TARGET_IS_TM4C123_RA3) || \
  2539. defined(TARGET_IS_TM4C123_RB1) || \
  2540. defined(TARGET_IS_TM4C129_RA0) || \
  2541. defined(TARGET_IS_TM4C129_RA1)
  2542. #define ROM_I2CMasterIntDisable \
  2543. ((void (*)(uint32_t ui32Base))ROM_I2CTABLE[9])
  2544. #endif
  2545. #if defined(TARGET_IS_TM4C129_RA1)
  2546. #define ROM_I2CSlaveIntDisable \
  2547. ((void (*)(uint32_t ui32Base))ROM_I2CTABLE[10])
  2548. #endif
  2549. #if defined(TARGET_IS_TM4C123_RA1) || \
  2550. defined(TARGET_IS_TM4C123_RA3) || \
  2551. defined(TARGET_IS_TM4C123_RB1) || \
  2552. defined(TARGET_IS_TM4C129_RA0) || \
  2553. defined(TARGET_IS_TM4C129_RA1)
  2554. #define ROM_I2CMasterIntStatus \
  2555. ((bool (*)(uint32_t ui32Base, \
  2556. bool bMasked))ROM_I2CTABLE[11])
  2557. #endif
  2558. #if defined(TARGET_IS_TM4C129_RA1)
  2559. #define ROM_I2CSlaveIntStatus \
  2560. ((bool (*)(uint32_t ui32Base, \
  2561. bool bMasked))ROM_I2CTABLE[12])
  2562. #endif
  2563. #if defined(TARGET_IS_TM4C123_RA1) || \
  2564. defined(TARGET_IS_TM4C123_RA3) || \
  2565. defined(TARGET_IS_TM4C123_RB1) || \
  2566. defined(TARGET_IS_TM4C129_RA0) || \
  2567. defined(TARGET_IS_TM4C129_RA1)
  2568. #define ROM_I2CMasterIntClear \
  2569. ((void (*)(uint32_t ui32Base))ROM_I2CTABLE[13])
  2570. #endif
  2571. #if defined(TARGET_IS_TM4C129_RA1)
  2572. #define ROM_I2CSlaveIntClear \
  2573. ((void (*)(uint32_t ui32Base))ROM_I2CTABLE[14])
  2574. #endif
  2575. #if defined(TARGET_IS_TM4C123_RA1) || \
  2576. defined(TARGET_IS_TM4C123_RA3) || \
  2577. defined(TARGET_IS_TM4C123_RB1) || \
  2578. defined(TARGET_IS_TM4C129_RA0) || \
  2579. defined(TARGET_IS_TM4C129_RA1)
  2580. #define ROM_I2CMasterSlaveAddrSet \
  2581. ((void (*)(uint32_t ui32Base, \
  2582. uint8_t ui8SlaveAddr, \
  2583. bool bReceive))ROM_I2CTABLE[15])
  2584. #endif
  2585. #if defined(TARGET_IS_TM4C123_RA1) || \
  2586. defined(TARGET_IS_TM4C123_RA3) || \
  2587. defined(TARGET_IS_TM4C123_RB1) || \
  2588. defined(TARGET_IS_TM4C129_RA0) || \
  2589. defined(TARGET_IS_TM4C129_RA1)
  2590. #define ROM_I2CMasterBusy \
  2591. ((bool (*)(uint32_t ui32Base))ROM_I2CTABLE[16])
  2592. #endif
  2593. #if defined(TARGET_IS_TM4C123_RA1) || \
  2594. defined(TARGET_IS_TM4C123_RA3) || \
  2595. defined(TARGET_IS_TM4C123_RB1) || \
  2596. defined(TARGET_IS_TM4C129_RA0) || \
  2597. defined(TARGET_IS_TM4C129_RA1)
  2598. #define ROM_I2CMasterBusBusy \
  2599. ((bool (*)(uint32_t ui32Base))ROM_I2CTABLE[17])
  2600. #endif
  2601. #if defined(TARGET_IS_TM4C123_RA1) || \
  2602. defined(TARGET_IS_TM4C123_RA3) || \
  2603. defined(TARGET_IS_TM4C123_RB1) || \
  2604. defined(TARGET_IS_TM4C129_RA0) || \
  2605. defined(TARGET_IS_TM4C129_RA1)
  2606. #define ROM_I2CMasterControl \
  2607. ((void (*)(uint32_t ui32Base, \
  2608. uint32_t ui32Cmd))ROM_I2CTABLE[18])
  2609. #endif
  2610. #if defined(TARGET_IS_TM4C123_RA1) || \
  2611. defined(TARGET_IS_TM4C123_RA3) || \
  2612. defined(TARGET_IS_TM4C123_RB1) || \
  2613. defined(TARGET_IS_TM4C129_RA0) || \
  2614. defined(TARGET_IS_TM4C129_RA1)
  2615. #define ROM_I2CMasterErr \
  2616. ((uint32_t (*)(uint32_t ui32Base))ROM_I2CTABLE[19])
  2617. #endif
  2618. #if defined(TARGET_IS_TM4C123_RA1) || \
  2619. defined(TARGET_IS_TM4C123_RA3) || \
  2620. defined(TARGET_IS_TM4C123_RB1) || \
  2621. defined(TARGET_IS_TM4C129_RA0) || \
  2622. defined(TARGET_IS_TM4C129_RA1)
  2623. #define ROM_I2CMasterDataGet \
  2624. ((uint32_t (*)(uint32_t ui32Base))ROM_I2CTABLE[20])
  2625. #endif
  2626. #if defined(TARGET_IS_TM4C129_RA1)
  2627. #define ROM_I2CSlaveStatus \
  2628. ((uint32_t (*)(uint32_t ui32Base))ROM_I2CTABLE[21])
  2629. #endif
  2630. #if defined(TARGET_IS_TM4C129_RA1)
  2631. #define ROM_I2CSlaveDataPut \
  2632. ((void (*)(uint32_t ui32Base, \
  2633. uint8_t ui8Data))ROM_I2CTABLE[22])
  2634. #endif
  2635. #if defined(TARGET_IS_TM4C129_RA1)
  2636. #define ROM_I2CSlaveDataGet \
  2637. ((uint32_t (*)(uint32_t ui32Base))ROM_I2CTABLE[23])
  2638. #endif
  2639. #if defined(TARGET_IS_TM4C123_RA1) || \
  2640. defined(TARGET_IS_TM4C123_RA3) || \
  2641. defined(TARGET_IS_TM4C123_RB1) || \
  2642. defined(TARGET_IS_TM4C129_RA0) || \
  2643. defined(TARGET_IS_TM4C129_RA1)
  2644. #define ROM_UpdateI2C \
  2645. ((void (*)(void))ROM_I2CTABLE[24])
  2646. #endif
  2647. #if defined(TARGET_IS_TM4C129_RA1)
  2648. #define ROM_I2CSlaveIntEnableEx \
  2649. ((void (*)(uint32_t ui32Base, \
  2650. uint32_t ui32IntFlags))ROM_I2CTABLE[25])
  2651. #endif
  2652. #if defined(TARGET_IS_TM4C129_RA1)
  2653. #define ROM_I2CSlaveIntDisableEx \
  2654. ((void (*)(uint32_t ui32Base, \
  2655. uint32_t ui32IntFlags))ROM_I2CTABLE[26])
  2656. #endif
  2657. #if defined(TARGET_IS_TM4C129_RA1)
  2658. #define ROM_I2CSlaveIntStatusEx \
  2659. ((uint32_t (*)(uint32_t ui32Base, \
  2660. bool bMasked))ROM_I2CTABLE[27])
  2661. #endif
  2662. #if defined(TARGET_IS_TM4C129_RA1)
  2663. #define ROM_I2CSlaveIntClearEx \
  2664. ((void (*)(uint32_t ui32Base, \
  2665. uint32_t ui32IntFlags))ROM_I2CTABLE[28])
  2666. #endif
  2667. #if defined(TARGET_IS_TM4C123_RA1) || \
  2668. defined(TARGET_IS_TM4C123_RA3) || \
  2669. defined(TARGET_IS_TM4C123_RB1) || \
  2670. defined(TARGET_IS_TM4C129_RA0) || \
  2671. defined(TARGET_IS_TM4C129_RA1)
  2672. #define ROM_I2CMasterIntEnableEx \
  2673. ((void (*)(uint32_t ui32Base, \
  2674. uint32_t ui32IntFlags))ROM_I2CTABLE[29])
  2675. #endif
  2676. #if defined(TARGET_IS_TM4C123_RA1) || \
  2677. defined(TARGET_IS_TM4C123_RA3) || \
  2678. defined(TARGET_IS_TM4C123_RB1) || \
  2679. defined(TARGET_IS_TM4C129_RA0) || \
  2680. defined(TARGET_IS_TM4C129_RA1)
  2681. #define ROM_I2CMasterIntDisableEx \
  2682. ((void (*)(uint32_t ui32Base, \
  2683. uint32_t ui32IntFlags))ROM_I2CTABLE[30])
  2684. #endif
  2685. #if defined(TARGET_IS_TM4C123_RA1) || \
  2686. defined(TARGET_IS_TM4C123_RA3) || \
  2687. defined(TARGET_IS_TM4C123_RB1) || \
  2688. defined(TARGET_IS_TM4C129_RA0) || \
  2689. defined(TARGET_IS_TM4C129_RA1)
  2690. #define ROM_I2CMasterIntStatusEx \
  2691. ((uint32_t (*)(uint32_t ui32Base, \
  2692. bool bMasked))ROM_I2CTABLE[31])
  2693. #endif
  2694. #if defined(TARGET_IS_TM4C123_RA1) || \
  2695. defined(TARGET_IS_TM4C123_RA3) || \
  2696. defined(TARGET_IS_TM4C123_RB1) || \
  2697. defined(TARGET_IS_TM4C129_RA0) || \
  2698. defined(TARGET_IS_TM4C129_RA1)
  2699. #define ROM_I2CMasterIntClearEx \
  2700. ((void (*)(uint32_t ui32Base, \
  2701. uint32_t ui32IntFlags))ROM_I2CTABLE[32])
  2702. #endif
  2703. #if defined(TARGET_IS_TM4C123_RA1) || \
  2704. defined(TARGET_IS_TM4C123_RA3) || \
  2705. defined(TARGET_IS_TM4C123_RB1) || \
  2706. defined(TARGET_IS_TM4C129_RA0) || \
  2707. defined(TARGET_IS_TM4C129_RA1)
  2708. #define ROM_I2CMasterTimeoutSet \
  2709. ((void (*)(uint32_t ui32Base, \
  2710. uint32_t ui32Value))ROM_I2CTABLE[33])
  2711. #endif
  2712. #if defined(TARGET_IS_TM4C129_RA1)
  2713. #define ROM_I2CSlaveACKOverride \
  2714. ((void (*)(uint32_t ui32Base, \
  2715. bool bEnable))ROM_I2CTABLE[34])
  2716. #endif
  2717. #if defined(TARGET_IS_TM4C129_RA1)
  2718. #define ROM_I2CSlaveACKValueSet \
  2719. ((void (*)(uint32_t ui32Base, \
  2720. bool bACK))ROM_I2CTABLE[35])
  2721. #endif
  2722. #if defined(TARGET_IS_TM4C129_RA1)
  2723. #define ROM_I2CSlaveAddressSet \
  2724. ((void (*)(uint32_t ui32Base, \
  2725. uint8_t ui8AddrNum, \
  2726. uint8_t ui8SlaveAddr))ROM_I2CTABLE[37])
  2727. #endif
  2728. #if defined(TARGET_IS_TM4C123_RA1) || \
  2729. defined(TARGET_IS_TM4C123_RA3) || \
  2730. defined(TARGET_IS_TM4C123_RB1) || \
  2731. defined(TARGET_IS_TM4C129_RA0) || \
  2732. defined(TARGET_IS_TM4C129_RA1)
  2733. #define ROM_I2CMasterLineStateGet \
  2734. ((uint32_t (*)(uint32_t ui32Base))ROM_I2CTABLE[38])
  2735. #endif
  2736. #if defined(TARGET_IS_TM4C129_RA0) || \
  2737. defined(TARGET_IS_TM4C129_RA1)
  2738. #define ROM_I2CTxFIFOConfigSet \
  2739. ((void (*)(uint32_t ui32Base, \
  2740. uint32_t ui32Config))ROM_I2CTABLE[39])
  2741. #endif
  2742. #if defined(TARGET_IS_TM4C129_RA0) || \
  2743. defined(TARGET_IS_TM4C129_RA1)
  2744. #define ROM_I2CTxFIFOFlush \
  2745. ((void (*)(uint32_t ui32Base))ROM_I2CTABLE[40])
  2746. #endif
  2747. #if defined(TARGET_IS_TM4C129_RA0) || \
  2748. defined(TARGET_IS_TM4C129_RA1)
  2749. #define ROM_I2CRxFIFOConfigSet \
  2750. ((void (*)(uint32_t ui32Base, \
  2751. uint32_t ui32Config))ROM_I2CTABLE[41])
  2752. #endif
  2753. #if defined(TARGET_IS_TM4C129_RA0) || \
  2754. defined(TARGET_IS_TM4C129_RA1)
  2755. #define ROM_I2CRxFIFOFlush \
  2756. ((void (*)(uint32_t ui32Base))ROM_I2CTABLE[42])
  2757. #endif
  2758. #if defined(TARGET_IS_TM4C129_RA0) || \
  2759. defined(TARGET_IS_TM4C129_RA1)
  2760. #define ROM_I2CFIFOStatus \
  2761. ((uint32_t (*)(uint32_t ui32Base))ROM_I2CTABLE[43])
  2762. #endif
  2763. #if defined(TARGET_IS_TM4C129_RA0) || \
  2764. defined(TARGET_IS_TM4C129_RA1)
  2765. #define ROM_I2CFIFODataPut \
  2766. ((void (*)(uint32_t ui32Base, \
  2767. uint8_t ui8Data))ROM_I2CTABLE[44])
  2768. #endif
  2769. #if defined(TARGET_IS_TM4C129_RA0) || \
  2770. defined(TARGET_IS_TM4C129_RA1)
  2771. #define ROM_I2CFIFODataPutNonBlocking \
  2772. ((uint32_t (*)(uint32_t ui32Base, \
  2773. uint8_t ui8Data))ROM_I2CTABLE[45])
  2774. #endif
  2775. #if defined(TARGET_IS_TM4C129_RA0) || \
  2776. defined(TARGET_IS_TM4C129_RA1)
  2777. #define ROM_I2CFIFODataGet \
  2778. ((uint32_t (*)(uint32_t ui32Base))ROM_I2CTABLE[46])
  2779. #endif
  2780. #if defined(TARGET_IS_TM4C129_RA0) || \
  2781. defined(TARGET_IS_TM4C129_RA1)
  2782. #define ROM_I2CFIFODataGetNonBlocking \
  2783. ((uint32_t (*)(uint32_t ui32Base, \
  2784. uint8_t *pui8Data))ROM_I2CTABLE[47])
  2785. #endif
  2786. #if defined(TARGET_IS_TM4C129_RA0) || \
  2787. defined(TARGET_IS_TM4C129_RA1)
  2788. #define ROM_I2CMasterBurstLengthSet \
  2789. ((void (*)(uint32_t ui32Base, \
  2790. uint8_t ui8Length))ROM_I2CTABLE[48])
  2791. #endif
  2792. #if defined(TARGET_IS_TM4C129_RA0) || \
  2793. defined(TARGET_IS_TM4C129_RA1)
  2794. #define ROM_I2CMasterBurstCountGet \
  2795. ((uint32_t (*)(uint32_t ui32Base))ROM_I2CTABLE[49])
  2796. #endif
  2797. #if defined(TARGET_IS_TM4C129_RA1)
  2798. #define ROM_I2CSlaveFIFODisable \
  2799. ((void (*)(uint32_t ui32Base))ROM_I2CTABLE[50])
  2800. #endif
  2801. #if defined(TARGET_IS_TM4C129_RA1)
  2802. #define ROM_I2CSlaveFIFOEnable \
  2803. ((void (*)(uint32_t ui32Base, \
  2804. uint32_t ui32Config))ROM_I2CTABLE[51])
  2805. #endif
  2806. #if defined(TARGET_IS_TM4C129_RA0) || \
  2807. defined(TARGET_IS_TM4C129_RA1)
  2808. #define ROM_I2CMasterGlitchFilterConfigSet \
  2809. ((void (*)(uint32_t ui32Base, \
  2810. uint32_t ui32Config))ROM_I2CTABLE[54])
  2811. #endif
  2812. //*****************************************************************************
  2813. //
  2814. // Macros for calling ROM functions in the Interrupt API.
  2815. //
  2816. //*****************************************************************************
  2817. #if defined(TARGET_IS_TM4C123_RA1) || \
  2818. defined(TARGET_IS_TM4C123_RA3) || \
  2819. defined(TARGET_IS_TM4C123_RB1) || \
  2820. defined(TARGET_IS_TM4C129_RA0) || \
  2821. defined(TARGET_IS_TM4C129_RA1)
  2822. #define ROM_IntEnable \
  2823. ((void (*)(uint32_t ui32Interrupt))ROM_INTERRUPTTABLE[0])
  2824. #endif
  2825. #if defined(TARGET_IS_TM4C123_RA1) || \
  2826. defined(TARGET_IS_TM4C123_RA3) || \
  2827. defined(TARGET_IS_TM4C123_RB1) || \
  2828. defined(TARGET_IS_TM4C129_RA0) || \
  2829. defined(TARGET_IS_TM4C129_RA1)
  2830. #define ROM_IntMasterEnable \
  2831. ((bool (*)(void))ROM_INTERRUPTTABLE[1])
  2832. #endif
  2833. #if defined(TARGET_IS_TM4C123_RA1) || \
  2834. defined(TARGET_IS_TM4C123_RA3) || \
  2835. defined(TARGET_IS_TM4C123_RB1) || \
  2836. defined(TARGET_IS_TM4C129_RA0) || \
  2837. defined(TARGET_IS_TM4C129_RA1)
  2838. #define ROM_IntMasterDisable \
  2839. ((bool (*)(void))ROM_INTERRUPTTABLE[2])
  2840. #endif
  2841. #if defined(TARGET_IS_TM4C123_RA1) || \
  2842. defined(TARGET_IS_TM4C123_RA3) || \
  2843. defined(TARGET_IS_TM4C123_RB1) || \
  2844. defined(TARGET_IS_TM4C129_RA0) || \
  2845. defined(TARGET_IS_TM4C129_RA1)
  2846. #define ROM_IntDisable \
  2847. ((void (*)(uint32_t ui32Interrupt))ROM_INTERRUPTTABLE[3])
  2848. #endif
  2849. #if defined(TARGET_IS_TM4C123_RA1) || \
  2850. defined(TARGET_IS_TM4C123_RA3) || \
  2851. defined(TARGET_IS_TM4C123_RB1) || \
  2852. defined(TARGET_IS_TM4C129_RA0) || \
  2853. defined(TARGET_IS_TM4C129_RA1)
  2854. #define ROM_IntPriorityGroupingSet \
  2855. ((void (*)(uint32_t ui32Bits))ROM_INTERRUPTTABLE[4])
  2856. #endif
  2857. #if defined(TARGET_IS_TM4C123_RA1) || \
  2858. defined(TARGET_IS_TM4C123_RA3) || \
  2859. defined(TARGET_IS_TM4C123_RB1) || \
  2860. defined(TARGET_IS_TM4C129_RA0) || \
  2861. defined(TARGET_IS_TM4C129_RA1)
  2862. #define ROM_IntPriorityGroupingGet \
  2863. ((uint32_t (*)(void))ROM_INTERRUPTTABLE[5])
  2864. #endif
  2865. #if defined(TARGET_IS_TM4C123_RA1) || \
  2866. defined(TARGET_IS_TM4C123_RA3) || \
  2867. defined(TARGET_IS_TM4C123_RB1) || \
  2868. defined(TARGET_IS_TM4C129_RA0) || \
  2869. defined(TARGET_IS_TM4C129_RA1)
  2870. #define ROM_IntPrioritySet \
  2871. ((void (*)(uint32_t ui32Interrupt, \
  2872. uint8_t ui8Priority))ROM_INTERRUPTTABLE[6])
  2873. #endif
  2874. #if defined(TARGET_IS_TM4C123_RA1) || \
  2875. defined(TARGET_IS_TM4C123_RA3) || \
  2876. defined(TARGET_IS_TM4C123_RB1) || \
  2877. defined(TARGET_IS_TM4C129_RA0) || \
  2878. defined(TARGET_IS_TM4C129_RA1)
  2879. #define ROM_IntPriorityGet \
  2880. ((int32_t (*)(uint32_t ui32Interrupt))ROM_INTERRUPTTABLE[7])
  2881. #endif
  2882. #if defined(TARGET_IS_TM4C123_RA1) || \
  2883. defined(TARGET_IS_TM4C123_RA3) || \
  2884. defined(TARGET_IS_TM4C123_RB1) || \
  2885. defined(TARGET_IS_TM4C129_RA0) || \
  2886. defined(TARGET_IS_TM4C129_RA1)
  2887. #define ROM_IntPendSet \
  2888. ((void (*)(uint32_t ui32Interrupt))ROM_INTERRUPTTABLE[8])
  2889. #endif
  2890. #if defined(TARGET_IS_TM4C123_RA1) || \
  2891. defined(TARGET_IS_TM4C123_RA3) || \
  2892. defined(TARGET_IS_TM4C123_RB1) || \
  2893. defined(TARGET_IS_TM4C129_RA0) || \
  2894. defined(TARGET_IS_TM4C129_RA1)
  2895. #define ROM_IntPendClear \
  2896. ((void (*)(uint32_t ui32Interrupt))ROM_INTERRUPTTABLE[9])
  2897. #endif
  2898. #if defined(TARGET_IS_TM4C123_RA1) || \
  2899. defined(TARGET_IS_TM4C123_RA3) || \
  2900. defined(TARGET_IS_TM4C123_RB1) || \
  2901. defined(TARGET_IS_TM4C129_RA0) || \
  2902. defined(TARGET_IS_TM4C129_RA1)
  2903. #define ROM_IntPriorityMaskSet \
  2904. ((void (*)(uint32_t ui32PriorityMask))ROM_INTERRUPTTABLE[10])
  2905. #endif
  2906. #if defined(TARGET_IS_TM4C123_RA1) || \
  2907. defined(TARGET_IS_TM4C123_RA3) || \
  2908. defined(TARGET_IS_TM4C123_RB1) || \
  2909. defined(TARGET_IS_TM4C129_RA0) || \
  2910. defined(TARGET_IS_TM4C129_RA1)
  2911. #define ROM_IntPriorityMaskGet \
  2912. ((uint32_t (*)(void))ROM_INTERRUPTTABLE[11])
  2913. #endif
  2914. #if defined(TARGET_IS_TM4C123_RB1) || \
  2915. defined(TARGET_IS_TM4C129_RA0) || \
  2916. defined(TARGET_IS_TM4C129_RA1)
  2917. #define ROM_IntIsEnabled \
  2918. ((uint32_t (*)(uint32_t ui32Interrupt))ROM_INTERRUPTTABLE[12])
  2919. #endif
  2920. #if defined(TARGET_IS_TM4C129_RA1)
  2921. #define ROM_IntTrigger \
  2922. ((void (*)(uint32_t ui32Interrupt))ROM_INTERRUPTTABLE[13])
  2923. #endif
  2924. //*****************************************************************************
  2925. //
  2926. // Macros for calling ROM functions in the LCD API.
  2927. //
  2928. //*****************************************************************************
  2929. #if defined(TARGET_IS_TM4C129_RA0) || \
  2930. defined(TARGET_IS_TM4C129_RA1)
  2931. #define ROM_LCDIntStatus \
  2932. ((uint32_t (*)(uint32_t ui32Base, \
  2933. bool bMasked))ROM_LCDTABLE[0])
  2934. #endif
  2935. #if defined(TARGET_IS_TM4C129_RA0) || \
  2936. defined(TARGET_IS_TM4C129_RA1)
  2937. #define ROM_LCDClockReset \
  2938. ((void (*)(uint32_t ui32Base, \
  2939. uint32_t ui32Clocks))ROM_LCDTABLE[1])
  2940. #endif
  2941. #if defined(TARGET_IS_TM4C129_RA0) || \
  2942. defined(TARGET_IS_TM4C129_RA1)
  2943. #define ROM_LCDDMAConfigSet \
  2944. ((void (*)(uint32_t ui32Base, \
  2945. uint32_t ui32Config))ROM_LCDTABLE[2])
  2946. #endif
  2947. #if defined(TARGET_IS_TM4C129_RA0) || \
  2948. defined(TARGET_IS_TM4C129_RA1)
  2949. #define ROM_LCDIDDCommandWrite \
  2950. ((void (*)(uint32_t ui32Base, \
  2951. uint32_t ui32CS, \
  2952. uint16_t ui16Cmd))ROM_LCDTABLE[3])
  2953. #endif
  2954. #if defined(TARGET_IS_TM4C129_RA0) || \
  2955. defined(TARGET_IS_TM4C129_RA1)
  2956. #define ROM_LCDIDDConfigSet \
  2957. ((void (*)(uint32_t ui32Base, \
  2958. uint32_t ui32Config))ROM_LCDTABLE[4])
  2959. #endif
  2960. #if defined(TARGET_IS_TM4C129_RA0) || \
  2961. defined(TARGET_IS_TM4C129_RA1)
  2962. #define ROM_LCDIDDDataRead \
  2963. ((uint16_t (*)(uint32_t ui32Base, \
  2964. uint32_t ui32CS))ROM_LCDTABLE[5])
  2965. #endif
  2966. #if defined(TARGET_IS_TM4C129_RA0) || \
  2967. defined(TARGET_IS_TM4C129_RA1)
  2968. #define ROM_LCDIDDDataWrite \
  2969. ((void (*)(uint32_t ui32Base, \
  2970. uint32_t ui32CS, \
  2971. uint16_t ui16Data))ROM_LCDTABLE[6])
  2972. #endif
  2973. #if defined(TARGET_IS_TM4C129_RA0) || \
  2974. defined(TARGET_IS_TM4C129_RA1)
  2975. #define ROM_LCDIDDDMADisable \
  2976. ((void (*)(uint32_t ui32Base))ROM_LCDTABLE[7])
  2977. #endif
  2978. #if defined(TARGET_IS_TM4C129_RA0) || \
  2979. defined(TARGET_IS_TM4C129_RA1)
  2980. #define ROM_LCDIDDDMAWrite \
  2981. ((void (*)(uint32_t ui32Base, \
  2982. uint32_t ui32CS, \
  2983. const uint32_t *pui32Data, \
  2984. uint32_t ui32Count))ROM_LCDTABLE[8])
  2985. #endif
  2986. #if defined(TARGET_IS_TM4C129_RA0) || \
  2987. defined(TARGET_IS_TM4C129_RA1)
  2988. #define ROM_LCDIDDIndexedRead \
  2989. ((uint16_t (*)(uint32_t ui32Base, \
  2990. uint32_t ui32CS, \
  2991. uint16_t ui16Addr))ROM_LCDTABLE[9])
  2992. #endif
  2993. #if defined(TARGET_IS_TM4C129_RA0) || \
  2994. defined(TARGET_IS_TM4C129_RA1)
  2995. #define ROM_LCDIDDIndexedWrite \
  2996. ((void (*)(uint32_t ui32Base, \
  2997. uint32_t ui32CS, \
  2998. uint16_t ui16Addr, \
  2999. uint16_t ui16Data))ROM_LCDTABLE[10])
  3000. #endif
  3001. #if defined(TARGET_IS_TM4C129_RA0) || \
  3002. defined(TARGET_IS_TM4C129_RA1)
  3003. #define ROM_LCDIDDStatusRead \
  3004. ((uint16_t (*)(uint32_t ui32Base, \
  3005. uint32_t ui32CS))ROM_LCDTABLE[11])
  3006. #endif
  3007. #if defined(TARGET_IS_TM4C129_RA0) || \
  3008. defined(TARGET_IS_TM4C129_RA1)
  3009. #define ROM_LCDIDDTimingSet \
  3010. ((void (*)(uint32_t ui32Base, \
  3011. uint32_t ui32CS, \
  3012. const tLCDIDDTiming *pTiming))ROM_LCDTABLE[12])
  3013. #endif
  3014. #if defined(TARGET_IS_TM4C129_RA0) || \
  3015. defined(TARGET_IS_TM4C129_RA1)
  3016. #define ROM_LCDIntClear \
  3017. ((void (*)(uint32_t ui32Base, \
  3018. uint32_t ui32IntFlags))ROM_LCDTABLE[13])
  3019. #endif
  3020. #if defined(TARGET_IS_TM4C129_RA0) || \
  3021. defined(TARGET_IS_TM4C129_RA1)
  3022. #define ROM_LCDIntDisable \
  3023. ((void (*)(uint32_t ui32Base, \
  3024. uint32_t ui32IntFlags))ROM_LCDTABLE[14])
  3025. #endif
  3026. #if defined(TARGET_IS_TM4C129_RA0) || \
  3027. defined(TARGET_IS_TM4C129_RA1)
  3028. #define ROM_LCDIntEnable \
  3029. ((void (*)(uint32_t ui32Base, \
  3030. uint32_t ui32IntFlags))ROM_LCDTABLE[15])
  3031. #endif
  3032. #if defined(TARGET_IS_TM4C129_RA0) || \
  3033. defined(TARGET_IS_TM4C129_RA1)
  3034. #define ROM_LCDModeSet \
  3035. ((uint32_t (*)(uint32_t ui32Base, \
  3036. uint8_t ui8Mode, \
  3037. uint32_t ui32PixClk, \
  3038. uint32_t ui32SysClk))ROM_LCDTABLE[16])
  3039. #endif
  3040. #if defined(TARGET_IS_TM4C129_RA0) || \
  3041. defined(TARGET_IS_TM4C129_RA1)
  3042. #define ROM_LCDRasterACBiasIntCountSet \
  3043. ((void (*)(uint32_t ui32Base, \
  3044. uint8_t ui8Count))ROM_LCDTABLE[17])
  3045. #endif
  3046. #if defined(TARGET_IS_TM4C129_RA0) || \
  3047. defined(TARGET_IS_TM4C129_RA1)
  3048. #define ROM_LCDRasterConfigSet \
  3049. ((void (*)(uint32_t ui32Base, \
  3050. uint32_t ui32Config, \
  3051. uint8_t ui8PalLoadDelay))ROM_LCDTABLE[18])
  3052. #endif
  3053. #if defined(TARGET_IS_TM4C129_RA0) || \
  3054. defined(TARGET_IS_TM4C129_RA1)
  3055. #define ROM_LCDRasterDisable \
  3056. ((void (*)(uint32_t ui32Base))ROM_LCDTABLE[19])
  3057. #endif
  3058. #if defined(TARGET_IS_TM4C129_RA0) || \
  3059. defined(TARGET_IS_TM4C129_RA1)
  3060. #define ROM_LCDRasterEnable \
  3061. ((void (*)(uint32_t ui32Base))ROM_LCDTABLE[20])
  3062. #endif
  3063. #if defined(TARGET_IS_TM4C129_RA0) || \
  3064. defined(TARGET_IS_TM4C129_RA1)
  3065. #define ROM_LCDRasterFrameBufferSet \
  3066. ((void (*)(uint32_t ui32Base, \
  3067. uint8_t ui8Buffer, \
  3068. uint32_t *pui32Addr, \
  3069. uint32_t ui32NumBytes))ROM_LCDTABLE[21])
  3070. #endif
  3071. #if defined(TARGET_IS_TM4C129_RA0) || \
  3072. defined(TARGET_IS_TM4C129_RA1)
  3073. #define ROM_LCDRasterPaletteSet \
  3074. ((void (*)(uint32_t ui32Base, \
  3075. uint32_t ui32Type, \
  3076. uint32_t *pui32PalAddr, \
  3077. const uint32_t *pui32SrcColors, \
  3078. uint32_t ui32Start, \
  3079. uint32_t ui32Count))ROM_LCDTABLE[22])
  3080. #endif
  3081. #if defined(TARGET_IS_TM4C129_RA0) || \
  3082. defined(TARGET_IS_TM4C129_RA1)
  3083. #define ROM_LCDRasterSubPanelConfigSet \
  3084. ((void (*)(uint32_t ui32Base, \
  3085. uint32_t ui32Flags, \
  3086. uint32_t ui32BottomLines, \
  3087. uint32_t ui32DefaultPixel))ROM_LCDTABLE[23])
  3088. #endif
  3089. #if defined(TARGET_IS_TM4C129_RA0) || \
  3090. defined(TARGET_IS_TM4C129_RA1)
  3091. #define ROM_LCDRasterSubPanelDisable \
  3092. ((void (*)(uint32_t ui32Base))ROM_LCDTABLE[24])
  3093. #endif
  3094. #if defined(TARGET_IS_TM4C129_RA0) || \
  3095. defined(TARGET_IS_TM4C129_RA1)
  3096. #define ROM_LCDRasterSubPanelEnable \
  3097. ((void (*)(uint32_t ui32Base))ROM_LCDTABLE[25])
  3098. #endif
  3099. #if defined(TARGET_IS_TM4C129_RA0) || \
  3100. defined(TARGET_IS_TM4C129_RA1)
  3101. #define ROM_LCDRasterTimingSet \
  3102. ((void (*)(uint32_t ui32Base, \
  3103. const tLCDRasterTiming *pTiming))ROM_LCDTABLE[26])
  3104. #endif
  3105. #if defined(TARGET_IS_TM4C129_RA1)
  3106. #define ROM_LCDRasterEnabled \
  3107. ((bool (*)(uint32_t ui32Base))ROM_LCDTABLE[27])
  3108. #endif
  3109. //*****************************************************************************
  3110. //
  3111. // Macros for calling ROM functions in the MPU API.
  3112. //
  3113. //*****************************************************************************
  3114. #if defined(TARGET_IS_TM4C123_RA1) || \
  3115. defined(TARGET_IS_TM4C123_RA3) || \
  3116. defined(TARGET_IS_TM4C123_RB1) || \
  3117. defined(TARGET_IS_TM4C129_RA0) || \
  3118. defined(TARGET_IS_TM4C129_RA1)
  3119. #define ROM_MPUEnable \
  3120. ((void (*)(uint32_t ui32MPUConfig))ROM_MPUTABLE[0])
  3121. #endif
  3122. #if defined(TARGET_IS_TM4C123_RA1) || \
  3123. defined(TARGET_IS_TM4C123_RA3) || \
  3124. defined(TARGET_IS_TM4C123_RB1) || \
  3125. defined(TARGET_IS_TM4C129_RA0) || \
  3126. defined(TARGET_IS_TM4C129_RA1)
  3127. #define ROM_MPUDisable \
  3128. ((void (*)(void))ROM_MPUTABLE[1])
  3129. #endif
  3130. #if defined(TARGET_IS_TM4C123_RA1) || \
  3131. defined(TARGET_IS_TM4C123_RA3) || \
  3132. defined(TARGET_IS_TM4C123_RB1) || \
  3133. defined(TARGET_IS_TM4C129_RA0) || \
  3134. defined(TARGET_IS_TM4C129_RA1)
  3135. #define ROM_MPURegionCountGet \
  3136. ((uint32_t (*)(void))ROM_MPUTABLE[2])
  3137. #endif
  3138. #if defined(TARGET_IS_TM4C123_RA1) || \
  3139. defined(TARGET_IS_TM4C123_RA3) || \
  3140. defined(TARGET_IS_TM4C123_RB1) || \
  3141. defined(TARGET_IS_TM4C129_RA0) || \
  3142. defined(TARGET_IS_TM4C129_RA1)
  3143. #define ROM_MPURegionEnable \
  3144. ((void (*)(uint32_t ui32Region))ROM_MPUTABLE[3])
  3145. #endif
  3146. #if defined(TARGET_IS_TM4C123_RA1) || \
  3147. defined(TARGET_IS_TM4C123_RA3) || \
  3148. defined(TARGET_IS_TM4C123_RB1) || \
  3149. defined(TARGET_IS_TM4C129_RA0) || \
  3150. defined(TARGET_IS_TM4C129_RA1)
  3151. #define ROM_MPURegionDisable \
  3152. ((void (*)(uint32_t ui32Region))ROM_MPUTABLE[4])
  3153. #endif
  3154. #if defined(TARGET_IS_TM4C123_RA1) || \
  3155. defined(TARGET_IS_TM4C123_RA3) || \
  3156. defined(TARGET_IS_TM4C123_RB1) || \
  3157. defined(TARGET_IS_TM4C129_RA0) || \
  3158. defined(TARGET_IS_TM4C129_RA1)
  3159. #define ROM_MPURegionSet \
  3160. ((void (*)(uint32_t ui32Region, \
  3161. uint32_t ui32Addr, \
  3162. uint32_t ui32Flags))ROM_MPUTABLE[5])
  3163. #endif
  3164. #if defined(TARGET_IS_TM4C123_RA1) || \
  3165. defined(TARGET_IS_TM4C123_RA3) || \
  3166. defined(TARGET_IS_TM4C123_RB1) || \
  3167. defined(TARGET_IS_TM4C129_RA0) || \
  3168. defined(TARGET_IS_TM4C129_RA1)
  3169. #define ROM_MPURegionGet \
  3170. ((void (*)(uint32_t ui32Region, \
  3171. uint32_t *pui32Addr, \
  3172. uint32_t *pui32Flags))ROM_MPUTABLE[6])
  3173. #endif
  3174. //*****************************************************************************
  3175. //
  3176. // Macros for calling ROM functions in the OneWire API.
  3177. //
  3178. //*****************************************************************************
  3179. #if defined(TARGET_IS_TM4C129_RA0) || \
  3180. defined(TARGET_IS_TM4C129_RA1)
  3181. #define ROM_OneWireIntStatus \
  3182. ((uint32_t (*)(uint32_t ui32Base, \
  3183. bool bMasked))ROM_ONEWIRETABLE[0])
  3184. #endif
  3185. #if defined(TARGET_IS_TM4C129_RA0) || \
  3186. defined(TARGET_IS_TM4C129_RA1)
  3187. #define ROM_OneWireBusReset \
  3188. ((void (*)(uint32_t ui32Base))ROM_ONEWIRETABLE[1])
  3189. #endif
  3190. #if defined(TARGET_IS_TM4C129_RA0) || \
  3191. defined(TARGET_IS_TM4C129_RA1)
  3192. #define ROM_OneWireBusStatus \
  3193. ((uint32_t (*)(uint32_t ui32Base))ROM_ONEWIRETABLE[2])
  3194. #endif
  3195. #if defined(TARGET_IS_TM4C129_RA0) || \
  3196. defined(TARGET_IS_TM4C129_RA1)
  3197. #define ROM_OneWireDataGet \
  3198. ((void (*)(uint32_t u3i2Base, \
  3199. uint32_t *pui32Data))ROM_ONEWIRETABLE[3])
  3200. #endif
  3201. #if defined(TARGET_IS_TM4C129_RA0) || \
  3202. defined(TARGET_IS_TM4C129_RA1)
  3203. #define ROM_OneWireDataGetNonBlocking \
  3204. ((bool (*)(uint32_t ui32Base, \
  3205. uint32_t *pui32Data))ROM_ONEWIRETABLE[4])
  3206. #endif
  3207. #if defined(TARGET_IS_TM4C129_RA0) || \
  3208. defined(TARGET_IS_TM4C129_RA1)
  3209. #define ROM_OneWireInit \
  3210. ((void (*)(uint32_t ui32Base, \
  3211. uint32_t ui32InitFlags))ROM_ONEWIRETABLE[5])
  3212. #endif
  3213. #if defined(TARGET_IS_TM4C129_RA0) || \
  3214. defined(TARGET_IS_TM4C129_RA1)
  3215. #define ROM_OneWireIntClear \
  3216. ((void (*)(uint32_t ui32Base, \
  3217. uint32_t ui32IntFlags))ROM_ONEWIRETABLE[6])
  3218. #endif
  3219. #if defined(TARGET_IS_TM4C129_RA0) || \
  3220. defined(TARGET_IS_TM4C129_RA1)
  3221. #define ROM_OneWireIntDisable \
  3222. ((void (*)(uint32_t ui32Base, \
  3223. uint32_t ui32IntFlags))ROM_ONEWIRETABLE[7])
  3224. #endif
  3225. #if defined(TARGET_IS_TM4C129_RA0) || \
  3226. defined(TARGET_IS_TM4C129_RA1)
  3227. #define ROM_OneWireIntEnable \
  3228. ((void (*)(uint32_t ui32Base, \
  3229. uint32_t ui32IntFlags))ROM_ONEWIRETABLE[8])
  3230. #endif
  3231. #if defined(TARGET_IS_TM4C129_RA0) || \
  3232. defined(TARGET_IS_TM4C129_RA1)
  3233. #define ROM_OneWireTransaction \
  3234. ((void (*)(uint32_t ui32Base, \
  3235. uint32_t ui32OpFlags, \
  3236. uint32_t ui32Data, \
  3237. uint32_t ui32BitCnt))ROM_ONEWIRETABLE[9])
  3238. #endif
  3239. #if defined(TARGET_IS_TM4C129_RA0) || \
  3240. defined(TARGET_IS_TM4C129_RA1)
  3241. #define ROM_OneWireDMADisable \
  3242. ((void (*)(uint32_t ui32Base, \
  3243. uint32_t ui32DMAFlags))ROM_ONEWIRETABLE[10])
  3244. #endif
  3245. #if defined(TARGET_IS_TM4C129_RA0) || \
  3246. defined(TARGET_IS_TM4C129_RA1)
  3247. #define ROM_OneWireDMAEnable \
  3248. ((void (*)(uint32_t ui32Base, \
  3249. uint32_t ui32DMAFlags))ROM_ONEWIRETABLE[11])
  3250. #endif
  3251. //*****************************************************************************
  3252. //
  3253. // Macros for calling ROM functions in the PWM API.
  3254. //
  3255. //*****************************************************************************
  3256. #if defined(TARGET_IS_TM4C123_RA1) || \
  3257. defined(TARGET_IS_TM4C123_RA3) || \
  3258. defined(TARGET_IS_TM4C123_RB1) || \
  3259. defined(TARGET_IS_TM4C129_RA0) || \
  3260. defined(TARGET_IS_TM4C129_RA1)
  3261. #define ROM_PWMPulseWidthSet \
  3262. ((void (*)(uint32_t ui32Base, \
  3263. uint32_t ui32PWMOut, \
  3264. uint32_t ui32Width))ROM_PWMTABLE[0])
  3265. #endif
  3266. #if defined(TARGET_IS_TM4C123_RA1) || \
  3267. defined(TARGET_IS_TM4C123_RA3) || \
  3268. defined(TARGET_IS_TM4C123_RB1) || \
  3269. defined(TARGET_IS_TM4C129_RA0) || \
  3270. defined(TARGET_IS_TM4C129_RA1)
  3271. #define ROM_PWMGenConfigure \
  3272. ((void (*)(uint32_t ui32Base, \
  3273. uint32_t ui32Gen, \
  3274. uint32_t ui32Config))ROM_PWMTABLE[1])
  3275. #endif
  3276. #if defined(TARGET_IS_TM4C123_RA1) || \
  3277. defined(TARGET_IS_TM4C123_RA3) || \
  3278. defined(TARGET_IS_TM4C123_RB1) || \
  3279. defined(TARGET_IS_TM4C129_RA0) || \
  3280. defined(TARGET_IS_TM4C129_RA1)
  3281. #define ROM_PWMGenPeriodSet \
  3282. ((void (*)(uint32_t ui32Base, \
  3283. uint32_t ui32Gen, \
  3284. uint32_t ui32Period))ROM_PWMTABLE[2])
  3285. #endif
  3286. #if defined(TARGET_IS_TM4C123_RA1) || \
  3287. defined(TARGET_IS_TM4C123_RA3) || \
  3288. defined(TARGET_IS_TM4C123_RB1) || \
  3289. defined(TARGET_IS_TM4C129_RA0) || \
  3290. defined(TARGET_IS_TM4C129_RA1)
  3291. #define ROM_PWMGenPeriodGet \
  3292. ((uint32_t (*)(uint32_t ui32Base, \
  3293. uint32_t ui32Gen))ROM_PWMTABLE[3])
  3294. #endif
  3295. #if defined(TARGET_IS_TM4C123_RA1) || \
  3296. defined(TARGET_IS_TM4C123_RA3) || \
  3297. defined(TARGET_IS_TM4C123_RB1) || \
  3298. defined(TARGET_IS_TM4C129_RA0) || \
  3299. defined(TARGET_IS_TM4C129_RA1)
  3300. #define ROM_PWMGenEnable \
  3301. ((void (*)(uint32_t ui32Base, \
  3302. uint32_t ui32Gen))ROM_PWMTABLE[4])
  3303. #endif
  3304. #if defined(TARGET_IS_TM4C123_RA1) || \
  3305. defined(TARGET_IS_TM4C123_RA3) || \
  3306. defined(TARGET_IS_TM4C123_RB1) || \
  3307. defined(TARGET_IS_TM4C129_RA0) || \
  3308. defined(TARGET_IS_TM4C129_RA1)
  3309. #define ROM_PWMGenDisable \
  3310. ((void (*)(uint32_t ui32Base, \
  3311. uint32_t ui32Gen))ROM_PWMTABLE[5])
  3312. #endif
  3313. #if defined(TARGET_IS_TM4C123_RA1) || \
  3314. defined(TARGET_IS_TM4C123_RA3) || \
  3315. defined(TARGET_IS_TM4C123_RB1) || \
  3316. defined(TARGET_IS_TM4C129_RA0) || \
  3317. defined(TARGET_IS_TM4C129_RA1)
  3318. #define ROM_PWMPulseWidthGet \
  3319. ((uint32_t (*)(uint32_t ui32Base, \
  3320. uint32_t ui32PWMOut))ROM_PWMTABLE[6])
  3321. #endif
  3322. #if defined(TARGET_IS_TM4C123_RA1) || \
  3323. defined(TARGET_IS_TM4C123_RA3) || \
  3324. defined(TARGET_IS_TM4C123_RB1) || \
  3325. defined(TARGET_IS_TM4C129_RA0) || \
  3326. defined(TARGET_IS_TM4C129_RA1)
  3327. #define ROM_PWMDeadBandEnable \
  3328. ((void (*)(uint32_t ui32Base, \
  3329. uint32_t ui32Gen, \
  3330. uint16_t ui16Rise, \
  3331. uint16_t ui16Fall))ROM_PWMTABLE[7])
  3332. #endif
  3333. #if defined(TARGET_IS_TM4C123_RA1) || \
  3334. defined(TARGET_IS_TM4C123_RA3) || \
  3335. defined(TARGET_IS_TM4C123_RB1) || \
  3336. defined(TARGET_IS_TM4C129_RA0) || \
  3337. defined(TARGET_IS_TM4C129_RA1)
  3338. #define ROM_PWMDeadBandDisable \
  3339. ((void (*)(uint32_t ui32Base, \
  3340. uint32_t ui32Gen))ROM_PWMTABLE[8])
  3341. #endif
  3342. #if defined(TARGET_IS_TM4C123_RA1) || \
  3343. defined(TARGET_IS_TM4C123_RA3) || \
  3344. defined(TARGET_IS_TM4C123_RB1) || \
  3345. defined(TARGET_IS_TM4C129_RA0) || \
  3346. defined(TARGET_IS_TM4C129_RA1)
  3347. #define ROM_PWMSyncUpdate \
  3348. ((void (*)(uint32_t ui32Base, \
  3349. uint32_t ui32GenBits))ROM_PWMTABLE[9])
  3350. #endif
  3351. #if defined(TARGET_IS_TM4C123_RA1) || \
  3352. defined(TARGET_IS_TM4C123_RA3) || \
  3353. defined(TARGET_IS_TM4C123_RB1) || \
  3354. defined(TARGET_IS_TM4C129_RA0) || \
  3355. defined(TARGET_IS_TM4C129_RA1)
  3356. #define ROM_PWMSyncTimeBase \
  3357. ((void (*)(uint32_t ui32Base, \
  3358. uint32_t ui32GenBits))ROM_PWMTABLE[10])
  3359. #endif
  3360. #if defined(TARGET_IS_TM4C123_RA1) || \
  3361. defined(TARGET_IS_TM4C123_RA3) || \
  3362. defined(TARGET_IS_TM4C123_RB1) || \
  3363. defined(TARGET_IS_TM4C129_RA0) || \
  3364. defined(TARGET_IS_TM4C129_RA1)
  3365. #define ROM_PWMOutputState \
  3366. ((void (*)(uint32_t ui32Base, \
  3367. uint32_t ui32PWMOutBits, \
  3368. bool bEnable))ROM_PWMTABLE[11])
  3369. #endif
  3370. #if defined(TARGET_IS_TM4C123_RA1) || \
  3371. defined(TARGET_IS_TM4C123_RA3) || \
  3372. defined(TARGET_IS_TM4C123_RB1) || \
  3373. defined(TARGET_IS_TM4C129_RA0) || \
  3374. defined(TARGET_IS_TM4C129_RA1)
  3375. #define ROM_PWMOutputInvert \
  3376. ((void (*)(uint32_t ui32Base, \
  3377. uint32_t ui32PWMOutBits, \
  3378. bool bInvert))ROM_PWMTABLE[12])
  3379. #endif
  3380. #if defined(TARGET_IS_TM4C123_RA1) || \
  3381. defined(TARGET_IS_TM4C123_RA3) || \
  3382. defined(TARGET_IS_TM4C123_RB1) || \
  3383. defined(TARGET_IS_TM4C129_RA0) || \
  3384. defined(TARGET_IS_TM4C129_RA1)
  3385. #define ROM_PWMOutputFault \
  3386. ((void (*)(uint32_t ui32Base, \
  3387. uint32_t ui32PWMOutBits, \
  3388. bool bFaultSuppress))ROM_PWMTABLE[13])
  3389. #endif
  3390. #if defined(TARGET_IS_TM4C123_RA1) || \
  3391. defined(TARGET_IS_TM4C123_RA3) || \
  3392. defined(TARGET_IS_TM4C123_RB1) || \
  3393. defined(TARGET_IS_TM4C129_RA0) || \
  3394. defined(TARGET_IS_TM4C129_RA1)
  3395. #define ROM_PWMGenIntTrigEnable \
  3396. ((void (*)(uint32_t ui32Base, \
  3397. uint32_t ui32Gen, \
  3398. uint32_t ui32IntTrig))ROM_PWMTABLE[14])
  3399. #endif
  3400. #if defined(TARGET_IS_TM4C123_RA1) || \
  3401. defined(TARGET_IS_TM4C123_RA3) || \
  3402. defined(TARGET_IS_TM4C123_RB1) || \
  3403. defined(TARGET_IS_TM4C129_RA0) || \
  3404. defined(TARGET_IS_TM4C129_RA1)
  3405. #define ROM_PWMGenIntTrigDisable \
  3406. ((void (*)(uint32_t ui32Base, \
  3407. uint32_t ui32Gen, \
  3408. uint32_t ui32IntTrig))ROM_PWMTABLE[15])
  3409. #endif
  3410. #if defined(TARGET_IS_TM4C123_RA1) || \
  3411. defined(TARGET_IS_TM4C123_RA3) || \
  3412. defined(TARGET_IS_TM4C123_RB1) || \
  3413. defined(TARGET_IS_TM4C129_RA0) || \
  3414. defined(TARGET_IS_TM4C129_RA1)
  3415. #define ROM_PWMGenIntStatus \
  3416. ((uint32_t (*)(uint32_t ui32Base, \
  3417. uint32_t ui32Gen, \
  3418. bool bMasked))ROM_PWMTABLE[16])
  3419. #endif
  3420. #if defined(TARGET_IS_TM4C123_RA1) || \
  3421. defined(TARGET_IS_TM4C123_RA3) || \
  3422. defined(TARGET_IS_TM4C123_RB1) || \
  3423. defined(TARGET_IS_TM4C129_RA0) || \
  3424. defined(TARGET_IS_TM4C129_RA1)
  3425. #define ROM_PWMGenIntClear \
  3426. ((void (*)(uint32_t ui32Base, \
  3427. uint32_t ui32Gen, \
  3428. uint32_t ui32Ints))ROM_PWMTABLE[17])
  3429. #endif
  3430. #if defined(TARGET_IS_TM4C123_RA1) || \
  3431. defined(TARGET_IS_TM4C123_RA3) || \
  3432. defined(TARGET_IS_TM4C123_RB1) || \
  3433. defined(TARGET_IS_TM4C129_RA0) || \
  3434. defined(TARGET_IS_TM4C129_RA1)
  3435. #define ROM_PWMIntEnable \
  3436. ((void (*)(uint32_t ui32Base, \
  3437. uint32_t ui32GenFault))ROM_PWMTABLE[18])
  3438. #endif
  3439. #if defined(TARGET_IS_TM4C123_RA1) || \
  3440. defined(TARGET_IS_TM4C123_RA3) || \
  3441. defined(TARGET_IS_TM4C123_RB1) || \
  3442. defined(TARGET_IS_TM4C129_RA0) || \
  3443. defined(TARGET_IS_TM4C129_RA1)
  3444. #define ROM_PWMIntDisable \
  3445. ((void (*)(uint32_t ui32Base, \
  3446. uint32_t ui32GenFault))ROM_PWMTABLE[19])
  3447. #endif
  3448. #if defined(TARGET_IS_TM4C123_RA1) || \
  3449. defined(TARGET_IS_TM4C123_RA3) || \
  3450. defined(TARGET_IS_TM4C123_RB1) || \
  3451. defined(TARGET_IS_TM4C129_RA0) || \
  3452. defined(TARGET_IS_TM4C129_RA1)
  3453. #define ROM_PWMFaultIntClear \
  3454. ((void (*)(uint32_t ui32Base))ROM_PWMTABLE[20])
  3455. #endif
  3456. #if defined(TARGET_IS_TM4C123_RA1) || \
  3457. defined(TARGET_IS_TM4C123_RA3) || \
  3458. defined(TARGET_IS_TM4C123_RB1) || \
  3459. defined(TARGET_IS_TM4C129_RA0) || \
  3460. defined(TARGET_IS_TM4C129_RA1)
  3461. #define ROM_PWMIntStatus \
  3462. ((uint32_t (*)(uint32_t ui32Base, \
  3463. bool bMasked))ROM_PWMTABLE[21])
  3464. #endif
  3465. #if defined(TARGET_IS_TM4C123_RA1) || \
  3466. defined(TARGET_IS_TM4C123_RA3) || \
  3467. defined(TARGET_IS_TM4C123_RB1) || \
  3468. defined(TARGET_IS_TM4C129_RA0) || \
  3469. defined(TARGET_IS_TM4C129_RA1)
  3470. #define ROM_PWMOutputFaultLevel \
  3471. ((void (*)(uint32_t ui32Base, \
  3472. uint32_t ui32PWMOutBits, \
  3473. bool bDriveHigh))ROM_PWMTABLE[22])
  3474. #endif
  3475. #if defined(TARGET_IS_TM4C123_RA1) || \
  3476. defined(TARGET_IS_TM4C123_RA3) || \
  3477. defined(TARGET_IS_TM4C123_RB1) || \
  3478. defined(TARGET_IS_TM4C129_RA0) || \
  3479. defined(TARGET_IS_TM4C129_RA1)
  3480. #define ROM_PWMFaultIntClearExt \
  3481. ((void (*)(uint32_t ui32Base, \
  3482. uint32_t ui32FaultInts))ROM_PWMTABLE[23])
  3483. #endif
  3484. #if defined(TARGET_IS_TM4C123_RA1) || \
  3485. defined(TARGET_IS_TM4C123_RA3) || \
  3486. defined(TARGET_IS_TM4C123_RB1) || \
  3487. defined(TARGET_IS_TM4C129_RA0) || \
  3488. defined(TARGET_IS_TM4C129_RA1)
  3489. #define ROM_PWMGenFaultConfigure \
  3490. ((void (*)(uint32_t ui32Base, \
  3491. uint32_t ui32Gen, \
  3492. uint32_t ui32MinFaultPeriod, \
  3493. uint32_t ui32FaultSenses))ROM_PWMTABLE[24])
  3494. #endif
  3495. #if defined(TARGET_IS_TM4C123_RA1) || \
  3496. defined(TARGET_IS_TM4C123_RA3) || \
  3497. defined(TARGET_IS_TM4C123_RB1) || \
  3498. defined(TARGET_IS_TM4C129_RA0) || \
  3499. defined(TARGET_IS_TM4C129_RA1)
  3500. #define ROM_PWMGenFaultTriggerSet \
  3501. ((void (*)(uint32_t ui32Base, \
  3502. uint32_t ui32Gen, \
  3503. uint32_t ui32Group, \
  3504. uint32_t ui32FaultTriggers))ROM_PWMTABLE[25])
  3505. #endif
  3506. #if defined(TARGET_IS_TM4C123_RA1) || \
  3507. defined(TARGET_IS_TM4C123_RA3) || \
  3508. defined(TARGET_IS_TM4C123_RB1) || \
  3509. defined(TARGET_IS_TM4C129_RA0) || \
  3510. defined(TARGET_IS_TM4C129_RA1)
  3511. #define ROM_PWMGenFaultTriggerGet \
  3512. ((uint32_t (*)(uint32_t ui32Base, \
  3513. uint32_t ui32Gen, \
  3514. uint32_t ui32Group))ROM_PWMTABLE[26])
  3515. #endif
  3516. #if defined(TARGET_IS_TM4C123_RA1) || \
  3517. defined(TARGET_IS_TM4C123_RA3) || \
  3518. defined(TARGET_IS_TM4C123_RB1) || \
  3519. defined(TARGET_IS_TM4C129_RA0) || \
  3520. defined(TARGET_IS_TM4C129_RA1)
  3521. #define ROM_PWMGenFaultStatus \
  3522. ((uint32_t (*)(uint32_t ui32Base, \
  3523. uint32_t ui32Gen, \
  3524. uint32_t ui32Group))ROM_PWMTABLE[27])
  3525. #endif
  3526. #if defined(TARGET_IS_TM4C123_RA1) || \
  3527. defined(TARGET_IS_TM4C123_RA3) || \
  3528. defined(TARGET_IS_TM4C123_RB1) || \
  3529. defined(TARGET_IS_TM4C129_RA0) || \
  3530. defined(TARGET_IS_TM4C129_RA1)
  3531. #define ROM_PWMGenFaultClear \
  3532. ((void (*)(uint32_t ui32Base, \
  3533. uint32_t ui32Gen, \
  3534. uint32_t ui32Group, \
  3535. uint32_t ui32FaultTriggers))ROM_PWMTABLE[28])
  3536. #endif
  3537. #if defined(TARGET_IS_TM4C129_RA0) || \
  3538. defined(TARGET_IS_TM4C129_RA1)
  3539. #define ROM_PWMClockSet \
  3540. ((void (*)(uint32_t ui32Base, \
  3541. uint32_t ui32Config))ROM_PWMTABLE[29])
  3542. #endif
  3543. #if defined(TARGET_IS_TM4C129_RA0) || \
  3544. defined(TARGET_IS_TM4C129_RA1)
  3545. #define ROM_PWMClockGet \
  3546. ((uint32_t (*)(uint32_t ui32Base))ROM_PWMTABLE[30])
  3547. #endif
  3548. #if defined(TARGET_IS_TM4C123_RB1) || \
  3549. defined(TARGET_IS_TM4C129_RA0) || \
  3550. defined(TARGET_IS_TM4C129_RA1)
  3551. #define ROM_PWMOutputUpdateMode \
  3552. ((void (*)(uint32_t ui32Base, \
  3553. uint32_t ui32PWMOutBits, \
  3554. uint32_t ui32Mode))ROM_PWMTABLE[31])
  3555. #endif
  3556. //*****************************************************************************
  3557. //
  3558. // Macros for calling ROM functions in the QEI API.
  3559. //
  3560. //*****************************************************************************
  3561. #if defined(TARGET_IS_TM4C123_RA1) || \
  3562. defined(TARGET_IS_TM4C123_RA3) || \
  3563. defined(TARGET_IS_TM4C123_RB1) || \
  3564. defined(TARGET_IS_TM4C129_RA0) || \
  3565. defined(TARGET_IS_TM4C129_RA1)
  3566. #define ROM_QEIPositionGet \
  3567. ((uint32_t (*)(uint32_t ui32Base))ROM_QEITABLE[0])
  3568. #endif
  3569. #if defined(TARGET_IS_TM4C123_RA1) || \
  3570. defined(TARGET_IS_TM4C123_RA3) || \
  3571. defined(TARGET_IS_TM4C123_RB1) || \
  3572. defined(TARGET_IS_TM4C129_RA0) || \
  3573. defined(TARGET_IS_TM4C129_RA1)
  3574. #define ROM_QEIEnable \
  3575. ((void (*)(uint32_t ui32Base))ROM_QEITABLE[1])
  3576. #endif
  3577. #if defined(TARGET_IS_TM4C123_RA1) || \
  3578. defined(TARGET_IS_TM4C123_RA3) || \
  3579. defined(TARGET_IS_TM4C123_RB1) || \
  3580. defined(TARGET_IS_TM4C129_RA0) || \
  3581. defined(TARGET_IS_TM4C129_RA1)
  3582. #define ROM_QEIDisable \
  3583. ((void (*)(uint32_t ui32Base))ROM_QEITABLE[2])
  3584. #endif
  3585. #if defined(TARGET_IS_TM4C123_RA1) || \
  3586. defined(TARGET_IS_TM4C123_RA3) || \
  3587. defined(TARGET_IS_TM4C123_RB1) || \
  3588. defined(TARGET_IS_TM4C129_RA0) || \
  3589. defined(TARGET_IS_TM4C129_RA1)
  3590. #define ROM_QEIConfigure \
  3591. ((void (*)(uint32_t ui32Base, \
  3592. uint32_t ui32Config, \
  3593. uint32_t ui32MaxPosition))ROM_QEITABLE[3])
  3594. #endif
  3595. #if defined(TARGET_IS_TM4C123_RA1) || \
  3596. defined(TARGET_IS_TM4C123_RA3) || \
  3597. defined(TARGET_IS_TM4C123_RB1) || \
  3598. defined(TARGET_IS_TM4C129_RA0) || \
  3599. defined(TARGET_IS_TM4C129_RA1)
  3600. #define ROM_QEIPositionSet \
  3601. ((void (*)(uint32_t ui32Base, \
  3602. uint32_t ui32Position))ROM_QEITABLE[4])
  3603. #endif
  3604. #if defined(TARGET_IS_TM4C123_RA1) || \
  3605. defined(TARGET_IS_TM4C123_RA3) || \
  3606. defined(TARGET_IS_TM4C123_RB1) || \
  3607. defined(TARGET_IS_TM4C129_RA0) || \
  3608. defined(TARGET_IS_TM4C129_RA1)
  3609. #define ROM_QEIDirectionGet \
  3610. ((int32_t (*)(uint32_t ui32Base))ROM_QEITABLE[5])
  3611. #endif
  3612. #if defined(TARGET_IS_TM4C123_RA1) || \
  3613. defined(TARGET_IS_TM4C123_RA3) || \
  3614. defined(TARGET_IS_TM4C123_RB1) || \
  3615. defined(TARGET_IS_TM4C129_RA0) || \
  3616. defined(TARGET_IS_TM4C129_RA1)
  3617. #define ROM_QEIErrorGet \
  3618. ((bool (*)(uint32_t ui32Base))ROM_QEITABLE[6])
  3619. #endif
  3620. #if defined(TARGET_IS_TM4C123_RA1) || \
  3621. defined(TARGET_IS_TM4C123_RA3) || \
  3622. defined(TARGET_IS_TM4C123_RB1) || \
  3623. defined(TARGET_IS_TM4C129_RA0) || \
  3624. defined(TARGET_IS_TM4C129_RA1)
  3625. #define ROM_QEIVelocityEnable \
  3626. ((void (*)(uint32_t ui32Base))ROM_QEITABLE[7])
  3627. #endif
  3628. #if defined(TARGET_IS_TM4C123_RA1) || \
  3629. defined(TARGET_IS_TM4C123_RA3) || \
  3630. defined(TARGET_IS_TM4C123_RB1) || \
  3631. defined(TARGET_IS_TM4C129_RA0) || \
  3632. defined(TARGET_IS_TM4C129_RA1)
  3633. #define ROM_QEIVelocityDisable \
  3634. ((void (*)(uint32_t ui32Base))ROM_QEITABLE[8])
  3635. #endif
  3636. #if defined(TARGET_IS_TM4C123_RA1) || \
  3637. defined(TARGET_IS_TM4C123_RA3) || \
  3638. defined(TARGET_IS_TM4C123_RB1) || \
  3639. defined(TARGET_IS_TM4C129_RA0) || \
  3640. defined(TARGET_IS_TM4C129_RA1)
  3641. #define ROM_QEIVelocityConfigure \
  3642. ((void (*)(uint32_t ui32Base, \
  3643. uint32_t ui32PreDiv, \
  3644. uint32_t ui32Period))ROM_QEITABLE[9])
  3645. #endif
  3646. #if defined(TARGET_IS_TM4C123_RA1) || \
  3647. defined(TARGET_IS_TM4C123_RA3) || \
  3648. defined(TARGET_IS_TM4C123_RB1) || \
  3649. defined(TARGET_IS_TM4C129_RA0) || \
  3650. defined(TARGET_IS_TM4C129_RA1)
  3651. #define ROM_QEIVelocityGet \
  3652. ((uint32_t (*)(uint32_t ui32Base))ROM_QEITABLE[10])
  3653. #endif
  3654. #if defined(TARGET_IS_TM4C123_RA1) || \
  3655. defined(TARGET_IS_TM4C123_RA3) || \
  3656. defined(TARGET_IS_TM4C123_RB1) || \
  3657. defined(TARGET_IS_TM4C129_RA0) || \
  3658. defined(TARGET_IS_TM4C129_RA1)
  3659. #define ROM_QEIIntEnable \
  3660. ((void (*)(uint32_t ui32Base, \
  3661. uint32_t ui32IntFlags))ROM_QEITABLE[11])
  3662. #endif
  3663. #if defined(TARGET_IS_TM4C123_RA1) || \
  3664. defined(TARGET_IS_TM4C123_RA3) || \
  3665. defined(TARGET_IS_TM4C123_RB1) || \
  3666. defined(TARGET_IS_TM4C129_RA0) || \
  3667. defined(TARGET_IS_TM4C129_RA1)
  3668. #define ROM_QEIIntDisable \
  3669. ((void (*)(uint32_t ui32Base, \
  3670. uint32_t ui32IntFlags))ROM_QEITABLE[12])
  3671. #endif
  3672. #if defined(TARGET_IS_TM4C123_RA1) || \
  3673. defined(TARGET_IS_TM4C123_RA3) || \
  3674. defined(TARGET_IS_TM4C123_RB1) || \
  3675. defined(TARGET_IS_TM4C129_RA0) || \
  3676. defined(TARGET_IS_TM4C129_RA1)
  3677. #define ROM_QEIIntStatus \
  3678. ((uint32_t (*)(uint32_t ui32Base, \
  3679. bool bMasked))ROM_QEITABLE[13])
  3680. #endif
  3681. #if defined(TARGET_IS_TM4C123_RA1) || \
  3682. defined(TARGET_IS_TM4C123_RA3) || \
  3683. defined(TARGET_IS_TM4C123_RB1) || \
  3684. defined(TARGET_IS_TM4C129_RA0) || \
  3685. defined(TARGET_IS_TM4C129_RA1)
  3686. #define ROM_QEIIntClear \
  3687. ((void (*)(uint32_t ui32Base, \
  3688. uint32_t ui32IntFlags))ROM_QEITABLE[14])
  3689. #endif
  3690. //*****************************************************************************
  3691. //
  3692. // Macros for calling ROM functions in the SHAMD5 API.
  3693. //
  3694. //*****************************************************************************
  3695. #if defined(TARGET_IS_TM4C129_RA0) || \
  3696. defined(TARGET_IS_TM4C129_RA1)
  3697. #define ROM_SHAMD5IntStatus \
  3698. ((uint32_t (*)(uint32_t ui32Base, \
  3699. bool bMasked))ROM_SHAMD5TABLE[0])
  3700. #endif
  3701. #if defined(TARGET_IS_TM4C129_RA0) || \
  3702. defined(TARGET_IS_TM4C129_RA1)
  3703. #define ROM_SHAMD5ConfigSet \
  3704. ((void (*)(uint32_t ui32Base, \
  3705. uint32_t ui32Mode))ROM_SHAMD5TABLE[1])
  3706. #endif
  3707. #if defined(TARGET_IS_TM4C129_RA0) || \
  3708. defined(TARGET_IS_TM4C129_RA1)
  3709. #define ROM_SHAMD5DataProcess \
  3710. ((void (*)(uint32_t ui32Base, \
  3711. uint32_t *pui32DataSrc, \
  3712. uint32_t ui32DataLength, \
  3713. uint32_t *pui32HashResult))ROM_SHAMD5TABLE[2])
  3714. #endif
  3715. #if defined(TARGET_IS_TM4C129_RA0) || \
  3716. defined(TARGET_IS_TM4C129_RA1)
  3717. #define ROM_SHAMD5DataWrite \
  3718. ((void (*)(uint32_t ui32Base, \
  3719. uint32_t *pui32Src))ROM_SHAMD5TABLE[3])
  3720. #endif
  3721. #if defined(TARGET_IS_TM4C129_RA0) || \
  3722. defined(TARGET_IS_TM4C129_RA1)
  3723. #define ROM_SHAMD5DataWriteNonBlocking \
  3724. ((bool (*)(uint32_t ui32Base, \
  3725. uint32_t *pui32Src))ROM_SHAMD5TABLE[4])
  3726. #endif
  3727. #if defined(TARGET_IS_TM4C129_RA0) || \
  3728. defined(TARGET_IS_TM4C129_RA1)
  3729. #define ROM_SHAMD5DMADisable \
  3730. ((void (*)(uint32_t ui32Base))ROM_SHAMD5TABLE[5])
  3731. #endif
  3732. #if defined(TARGET_IS_TM4C129_RA0) || \
  3733. defined(TARGET_IS_TM4C129_RA1)
  3734. #define ROM_SHAMD5DMAEnable \
  3735. ((void (*)(uint32_t ui32Base))ROM_SHAMD5TABLE[6])
  3736. #endif
  3737. #if defined(TARGET_IS_TM4C129_RA0) || \
  3738. defined(TARGET_IS_TM4C129_RA1)
  3739. #define ROM_SHAMD5HashLengthSet \
  3740. ((void (*)(uint32_t ui32Base, \
  3741. uint32_t ui32Length))ROM_SHAMD5TABLE[7])
  3742. #endif
  3743. #if defined(TARGET_IS_TM4C129_RA0) || \
  3744. defined(TARGET_IS_TM4C129_RA1)
  3745. #define ROM_SHAMD5HMACKeySet \
  3746. ((void (*)(uint32_t ui32Base, \
  3747. uint32_t *pui32Src))ROM_SHAMD5TABLE[8])
  3748. #endif
  3749. #if defined(TARGET_IS_TM4C129_RA0) || \
  3750. defined(TARGET_IS_TM4C129_RA1)
  3751. #define ROM_SHAMD5HMACPPKeyGenerate \
  3752. ((void (*)(uint32_t ui32Base, \
  3753. uint32_t *pui32Key, \
  3754. uint32_t *pui32PPKey))ROM_SHAMD5TABLE[9])
  3755. #endif
  3756. #if defined(TARGET_IS_TM4C129_RA0) || \
  3757. defined(TARGET_IS_TM4C129_RA1)
  3758. #define ROM_SHAMD5HMACPPKeySet \
  3759. ((void (*)(uint32_t ui32Base, \
  3760. uint32_t *pui32Src))ROM_SHAMD5TABLE[10])
  3761. #endif
  3762. #if defined(TARGET_IS_TM4C129_RA0) || \
  3763. defined(TARGET_IS_TM4C129_RA1)
  3764. #define ROM_SHAMD5HMACProcess \
  3765. ((void (*)(uint32_t ui32Base, \
  3766. uint32_t *pui32DataSrc, \
  3767. uint32_t ui32DataLength, \
  3768. uint32_t *pui32HashResult))ROM_SHAMD5TABLE[11])
  3769. #endif
  3770. #if defined(TARGET_IS_TM4C129_RA0) || \
  3771. defined(TARGET_IS_TM4C129_RA1)
  3772. #define ROM_SHAMD5IntClear \
  3773. ((void (*)(uint32_t ui32Base, \
  3774. uint32_t ui32IntFlags))ROM_SHAMD5TABLE[12])
  3775. #endif
  3776. #if defined(TARGET_IS_TM4C129_RA0) || \
  3777. defined(TARGET_IS_TM4C129_RA1)
  3778. #define ROM_SHAMD5IntDisable \
  3779. ((void (*)(uint32_t ui32Base, \
  3780. uint32_t ui32IntFlags))ROM_SHAMD5TABLE[13])
  3781. #endif
  3782. #if defined(TARGET_IS_TM4C129_RA0) || \
  3783. defined(TARGET_IS_TM4C129_RA1)
  3784. #define ROM_SHAMD5IntEnable \
  3785. ((void (*)(uint32_t ui32Base, \
  3786. uint32_t ui32IntFlags))ROM_SHAMD5TABLE[14])
  3787. #endif
  3788. #if defined(TARGET_IS_TM4C129_RA0) || \
  3789. defined(TARGET_IS_TM4C129_RA1)
  3790. #define ROM_SHAMD5Reset \
  3791. ((void (*)(uint32_t ui32Base))ROM_SHAMD5TABLE[15])
  3792. #endif
  3793. #if defined(TARGET_IS_TM4C129_RA0) || \
  3794. defined(TARGET_IS_TM4C129_RA1)
  3795. #define ROM_SHAMD5ResultRead \
  3796. ((void (*)(uint32_t ui32Base, \
  3797. uint32_t *pui32Dest))ROM_SHAMD5TABLE[16])
  3798. #endif
  3799. //*****************************************************************************
  3800. //
  3801. // Macros for calling ROM functions in the SMBus API.
  3802. //
  3803. //*****************************************************************************
  3804. #if defined(TARGET_IS_TM4C123_RA1) || \
  3805. defined(TARGET_IS_TM4C123_RA3) || \
  3806. defined(TARGET_IS_TM4C123_RB1) || \
  3807. defined(TARGET_IS_TM4C129_RA0) || \
  3808. defined(TARGET_IS_TM4C129_RA1)
  3809. #define ROM_SMBusMasterIntProcess \
  3810. ((tSMBusStatus (*)(tSMBus *psSMBus))ROM_SMBUSTABLE[0])
  3811. #endif
  3812. #if defined(TARGET_IS_TM4C123_RA1) || \
  3813. defined(TARGET_IS_TM4C123_RA3) || \
  3814. defined(TARGET_IS_TM4C123_RB1) || \
  3815. defined(TARGET_IS_TM4C129_RA0) || \
  3816. defined(TARGET_IS_TM4C129_RA1)
  3817. #define ROM_SMBusARPDisable \
  3818. ((void (*)(tSMBus *psSMBus))ROM_SMBUSTABLE[1])
  3819. #endif
  3820. #if defined(TARGET_IS_TM4C123_RA1) || \
  3821. defined(TARGET_IS_TM4C123_RA3) || \
  3822. defined(TARGET_IS_TM4C123_RB1) || \
  3823. defined(TARGET_IS_TM4C129_RA0) || \
  3824. defined(TARGET_IS_TM4C129_RA1)
  3825. #define ROM_SMBusARPEnable \
  3826. ((void (*)(tSMBus *psSMBus))ROM_SMBUSTABLE[2])
  3827. #endif
  3828. #if defined(TARGET_IS_TM4C123_RA1) || \
  3829. defined(TARGET_IS_TM4C123_RA3) || \
  3830. defined(TARGET_IS_TM4C123_RB1) || \
  3831. defined(TARGET_IS_TM4C129_RA0) || \
  3832. defined(TARGET_IS_TM4C129_RA1)
  3833. #define ROM_SMBusARPUDIDPacketDecode \
  3834. ((void (*)(tSMBusUDID *pUDID, \
  3835. uint8_t *pui8Address, \
  3836. uint8_t *pui8Data))ROM_SMBUSTABLE[3])
  3837. #endif
  3838. #if defined(TARGET_IS_TM4C123_RA1) || \
  3839. defined(TARGET_IS_TM4C123_RA3) || \
  3840. defined(TARGET_IS_TM4C123_RB1) || \
  3841. defined(TARGET_IS_TM4C129_RA0) || \
  3842. defined(TARGET_IS_TM4C129_RA1)
  3843. #define ROM_SMBusARPUDIDPacketEncode \
  3844. ((void (*)(tSMBusUDID *pUDID, \
  3845. uint8_t ui8Address, \
  3846. uint8_t *pui8Data))ROM_SMBUSTABLE[4])
  3847. #endif
  3848. #if defined(TARGET_IS_TM4C123_RA1) || \
  3849. defined(TARGET_IS_TM4C123_RA3) || \
  3850. defined(TARGET_IS_TM4C123_RB1) || \
  3851. defined(TARGET_IS_TM4C129_RA0) || \
  3852. defined(TARGET_IS_TM4C129_RA1)
  3853. #define ROM_SMBusMasterARPAssignAddress \
  3854. ((tSMBusStatus (*)(tSMBus *psSMBus, \
  3855. uint8_t *pui8Data))ROM_SMBUSTABLE[5])
  3856. #endif
  3857. #if defined(TARGET_IS_TM4C123_RA1) || \
  3858. defined(TARGET_IS_TM4C123_RA3) || \
  3859. defined(TARGET_IS_TM4C123_RB1) || \
  3860. defined(TARGET_IS_TM4C129_RA0) || \
  3861. defined(TARGET_IS_TM4C129_RA1)
  3862. #define ROM_SMBusMasterARPGetUDIDDir \
  3863. ((tSMBusStatus (*)(tSMBus *psSMBus, \
  3864. uint8_t ui8TargetAddress, \
  3865. uint8_t *pui8Data))ROM_SMBUSTABLE[6])
  3866. #endif
  3867. #if defined(TARGET_IS_TM4C123_RA1) || \
  3868. defined(TARGET_IS_TM4C123_RA3) || \
  3869. defined(TARGET_IS_TM4C123_RB1) || \
  3870. defined(TARGET_IS_TM4C129_RA0) || \
  3871. defined(TARGET_IS_TM4C129_RA1)
  3872. #define ROM_SMBusMasterARPGetUDIDGen \
  3873. ((tSMBusStatus (*)(tSMBus *psSMBus, \
  3874. uint8_t *pui8Data))ROM_SMBUSTABLE[7])
  3875. #endif
  3876. #if defined(TARGET_IS_TM4C123_RA1) || \
  3877. defined(TARGET_IS_TM4C123_RA3) || \
  3878. defined(TARGET_IS_TM4C123_RB1) || \
  3879. defined(TARGET_IS_TM4C129_RA0) || \
  3880. defined(TARGET_IS_TM4C129_RA1)
  3881. #define ROM_SMBusMasterARPNotifyMaster \
  3882. ((tSMBusStatus (*)(tSMBus *psSMBus, \
  3883. uint8_t *pui8Data))ROM_SMBUSTABLE[8])
  3884. #endif
  3885. #if defined(TARGET_IS_TM4C123_RA1) || \
  3886. defined(TARGET_IS_TM4C123_RA3) || \
  3887. defined(TARGET_IS_TM4C123_RB1) || \
  3888. defined(TARGET_IS_TM4C129_RA0) || \
  3889. defined(TARGET_IS_TM4C129_RA1)
  3890. #define ROM_SMBusMasterARPPrepareToARP \
  3891. ((tSMBusStatus (*)(tSMBus *psSMBus))ROM_SMBUSTABLE[9])
  3892. #endif
  3893. #if defined(TARGET_IS_TM4C123_RA1) || \
  3894. defined(TARGET_IS_TM4C123_RA3) || \
  3895. defined(TARGET_IS_TM4C123_RB1) || \
  3896. defined(TARGET_IS_TM4C129_RA0) || \
  3897. defined(TARGET_IS_TM4C129_RA1)
  3898. #define ROM_SMBusMasterARPResetDeviceDir \
  3899. ((tSMBusStatus (*)(tSMBus *psSMBus, \
  3900. uint8_t ui8TargetAddress))ROM_SMBUSTABLE[10])
  3901. #endif
  3902. #if defined(TARGET_IS_TM4C123_RA1) || \
  3903. defined(TARGET_IS_TM4C123_RA3) || \
  3904. defined(TARGET_IS_TM4C123_RB1) || \
  3905. defined(TARGET_IS_TM4C129_RA0) || \
  3906. defined(TARGET_IS_TM4C129_RA1)
  3907. #define ROM_SMBusMasterARPResetDeviceGen \
  3908. ((tSMBusStatus (*)(tSMBus *psSMBus))ROM_SMBUSTABLE[11])
  3909. #endif
  3910. #if defined(TARGET_IS_TM4C123_RA1) || \
  3911. defined(TARGET_IS_TM4C123_RA3) || \
  3912. defined(TARGET_IS_TM4C123_RB1) || \
  3913. defined(TARGET_IS_TM4C129_RA0) || \
  3914. defined(TARGET_IS_TM4C129_RA1)
  3915. #define ROM_SMBusMasterBlockProcessCall \
  3916. ((tSMBusStatus (*)(tSMBus *psSMBus, \
  3917. uint8_t ui8TargetAddress, \
  3918. uint8_t ui8Command, \
  3919. uint8_t *pui8TxData, \
  3920. uint8_t ui8TxSize, \
  3921. uint8_t *pui8RxData))ROM_SMBUSTABLE[12])
  3922. #endif
  3923. #if defined(TARGET_IS_TM4C123_RA3) || \
  3924. defined(TARGET_IS_TM4C123_RB1) || \
  3925. defined(TARGET_IS_TM4C129_RA0) || \
  3926. defined(TARGET_IS_TM4C129_RA1)
  3927. #define ROM_SMBusMasterBlockRead \
  3928. ((tSMBusStatus (*)(tSMBus *psSMBus, \
  3929. uint8_t ui8TargetAddress, \
  3930. uint8_t ui8Command, \
  3931. uint8_t *pui8Data))ROM_SMBUSTABLE[13])
  3932. #endif
  3933. #if defined(TARGET_IS_TM4C123_RA1) || \
  3934. defined(TARGET_IS_TM4C123_RA3) || \
  3935. defined(TARGET_IS_TM4C123_RB1) || \
  3936. defined(TARGET_IS_TM4C129_RA0) || \
  3937. defined(TARGET_IS_TM4C129_RA1)
  3938. #define ROM_SMBusMasterBlockWrite \
  3939. ((tSMBusStatus (*)(tSMBus *psSMBus, \
  3940. uint8_t ui8TargetAddress, \
  3941. uint8_t ui8Command, \
  3942. uint8_t *pui8Data, \
  3943. uint8_t ui8Size))ROM_SMBUSTABLE[14])
  3944. #endif
  3945. #if defined(TARGET_IS_TM4C123_RA1) || \
  3946. defined(TARGET_IS_TM4C123_RA3) || \
  3947. defined(TARGET_IS_TM4C123_RB1) || \
  3948. defined(TARGET_IS_TM4C129_RA0) || \
  3949. defined(TARGET_IS_TM4C129_RA1)
  3950. #define ROM_SMBusMasterByteReceive \
  3951. ((tSMBusStatus (*)(tSMBus *psSMBus, \
  3952. uint8_t ui8TargetAddress, \
  3953. uint8_t *pui8Data))ROM_SMBUSTABLE[15])
  3954. #endif
  3955. #if defined(TARGET_IS_TM4C123_RA1) || \
  3956. defined(TARGET_IS_TM4C123_RA3) || \
  3957. defined(TARGET_IS_TM4C123_RB1) || \
  3958. defined(TARGET_IS_TM4C129_RA0) || \
  3959. defined(TARGET_IS_TM4C129_RA1)
  3960. #define ROM_SMBusMasterByteSend \
  3961. ((tSMBusStatus (*)(tSMBus *psSMBus, \
  3962. uint8_t ui8TargetAddress, \
  3963. uint8_t ui8Data))ROM_SMBUSTABLE[16])
  3964. #endif
  3965. #if defined(TARGET_IS_TM4C123_RA1) || \
  3966. defined(TARGET_IS_TM4C123_RA3) || \
  3967. defined(TARGET_IS_TM4C123_RB1) || \
  3968. defined(TARGET_IS_TM4C129_RA0) || \
  3969. defined(TARGET_IS_TM4C129_RA1)
  3970. #define ROM_SMBusMasterByteWordRead \
  3971. ((tSMBusStatus (*)(tSMBus *psSMBus, \
  3972. uint8_t ui8TargetAddress, \
  3973. uint8_t ui8Command, \
  3974. uint8_t *pui8Data, \
  3975. uint8_t ui8Size))ROM_SMBUSTABLE[17])
  3976. #endif
  3977. #if defined(TARGET_IS_TM4C123_RA1) || \
  3978. defined(TARGET_IS_TM4C123_RA3) || \
  3979. defined(TARGET_IS_TM4C123_RB1) || \
  3980. defined(TARGET_IS_TM4C129_RA0) || \
  3981. defined(TARGET_IS_TM4C129_RA1)
  3982. #define ROM_SMBusMasterByteWordWrite \
  3983. ((tSMBusStatus (*)(tSMBus *psSMBus, \
  3984. uint8_t ui8TargetAddress, \
  3985. uint8_t ui8Command, \
  3986. uint8_t *pui8Data, \
  3987. uint8_t ui8Size))ROM_SMBUSTABLE[18])
  3988. #endif
  3989. #if defined(TARGET_IS_TM4C123_RA1) || \
  3990. defined(TARGET_IS_TM4C123_RA3) || \
  3991. defined(TARGET_IS_TM4C123_RB1) || \
  3992. defined(TARGET_IS_TM4C129_RA0) || \
  3993. defined(TARGET_IS_TM4C129_RA1)
  3994. #define ROM_SMBusMasterHostNotify \
  3995. ((tSMBusStatus (*)(tSMBus *psSMBus, \
  3996. uint8_t ui8OwnSlaveAddress, \
  3997. uint8_t *pui8Data))ROM_SMBUSTABLE[19])
  3998. #endif
  3999. #if defined(TARGET_IS_TM4C123_RA1) || \
  4000. defined(TARGET_IS_TM4C123_RA3) || \
  4001. defined(TARGET_IS_TM4C123_RB1) || \
  4002. defined(TARGET_IS_TM4C129_RA0) || \
  4003. defined(TARGET_IS_TM4C129_RA1)
  4004. #define ROM_SMBusMasterI2CRead \
  4005. ((tSMBusStatus (*)(tSMBus *psSMBus, \
  4006. uint8_t ui8TargetAddress, \
  4007. uint8_t *pui8Data, \
  4008. uint8_t ui8Size))ROM_SMBUSTABLE[20])
  4009. #endif
  4010. #if defined(TARGET_IS_TM4C123_RA1) || \
  4011. defined(TARGET_IS_TM4C123_RA3) || \
  4012. defined(TARGET_IS_TM4C123_RB1) || \
  4013. defined(TARGET_IS_TM4C129_RA0) || \
  4014. defined(TARGET_IS_TM4C129_RA1)
  4015. #define ROM_SMBusMasterI2CWrite \
  4016. ((tSMBusStatus (*)(tSMBus *psSMBus, \
  4017. uint8_t ui8TargetAddress, \
  4018. uint8_t *pui8Data, \
  4019. uint8_t ui8Size))ROM_SMBUSTABLE[21])
  4020. #endif
  4021. #if defined(TARGET_IS_TM4C123_RA1) || \
  4022. defined(TARGET_IS_TM4C123_RA3) || \
  4023. defined(TARGET_IS_TM4C123_RB1) || \
  4024. defined(TARGET_IS_TM4C129_RA0) || \
  4025. defined(TARGET_IS_TM4C129_RA1)
  4026. #define ROM_SMBusMasterI2CWriteRead \
  4027. ((tSMBusStatus (*)(tSMBus *psSMBus, \
  4028. uint8_t ui8TargetAddress, \
  4029. uint8_t *pui8TxData, \
  4030. uint8_t ui8TxSize, \
  4031. uint8_t *pui8RxData, \
  4032. uint8_t ui8RxSize))ROM_SMBUSTABLE[22])
  4033. #endif
  4034. #if defined(TARGET_IS_TM4C123_RA1) || \
  4035. defined(TARGET_IS_TM4C123_RA3) || \
  4036. defined(TARGET_IS_TM4C123_RB1) || \
  4037. defined(TARGET_IS_TM4C129_RA0) || \
  4038. defined(TARGET_IS_TM4C129_RA1)
  4039. #define ROM_SMBusMasterInit \
  4040. ((void (*)(tSMBus *psSMBus, \
  4041. uint32_t ui32I2CBase, \
  4042. uint32_t ui32SMBusClock))ROM_SMBUSTABLE[23])
  4043. #endif
  4044. #if defined(TARGET_IS_TM4C123_RA1) || \
  4045. defined(TARGET_IS_TM4C123_RA3) || \
  4046. defined(TARGET_IS_TM4C123_RB1) || \
  4047. defined(TARGET_IS_TM4C129_RA0) || \
  4048. defined(TARGET_IS_TM4C129_RA1)
  4049. #define ROM_SMBusMasterIntEnable \
  4050. ((void (*)(tSMBus *psSMBus))ROM_SMBUSTABLE[24])
  4051. #endif
  4052. #if defined(TARGET_IS_TM4C123_RA1) || \
  4053. defined(TARGET_IS_TM4C123_RA3) || \
  4054. defined(TARGET_IS_TM4C123_RB1) || \
  4055. defined(TARGET_IS_TM4C129_RA0) || \
  4056. defined(TARGET_IS_TM4C129_RA1)
  4057. #define ROM_SMBusMasterProcessCall \
  4058. ((tSMBusStatus (*)(tSMBus *psSMBus, \
  4059. uint8_t ui8TargetAddress, \
  4060. uint8_t ui8Command, \
  4061. uint8_t *pui8TxData, \
  4062. uint8_t *pui8RxData))ROM_SMBUSTABLE[25])
  4063. #endif
  4064. #if defined(TARGET_IS_TM4C123_RA1) || \
  4065. defined(TARGET_IS_TM4C123_RA3) || \
  4066. defined(TARGET_IS_TM4C123_RB1) || \
  4067. defined(TARGET_IS_TM4C129_RA0) || \
  4068. defined(TARGET_IS_TM4C129_RA1)
  4069. #define ROM_SMBusMasterQuickCommand \
  4070. ((tSMBusStatus (*)(tSMBus *psSMBus, \
  4071. uint8_t ui8TargetAddress, \
  4072. bool bData))ROM_SMBUSTABLE[26])
  4073. #endif
  4074. #if defined(TARGET_IS_TM4C123_RA1) || \
  4075. defined(TARGET_IS_TM4C123_RA3) || \
  4076. defined(TARGET_IS_TM4C123_RB1) || \
  4077. defined(TARGET_IS_TM4C129_RA0) || \
  4078. defined(TARGET_IS_TM4C129_RA1)
  4079. #define ROM_SMBusPECDisable \
  4080. ((void (*)(tSMBus *psSMBus))ROM_SMBUSTABLE[27])
  4081. #endif
  4082. #if defined(TARGET_IS_TM4C123_RA1) || \
  4083. defined(TARGET_IS_TM4C123_RA3) || \
  4084. defined(TARGET_IS_TM4C123_RB1) || \
  4085. defined(TARGET_IS_TM4C129_RA0) || \
  4086. defined(TARGET_IS_TM4C129_RA1)
  4087. #define ROM_SMBusPECEnable \
  4088. ((void (*)(tSMBus *psSMBus))ROM_SMBUSTABLE[28])
  4089. #endif
  4090. #if defined(TARGET_IS_TM4C123_RA1) || \
  4091. defined(TARGET_IS_TM4C123_RA3) || \
  4092. defined(TARGET_IS_TM4C123_RB1) || \
  4093. defined(TARGET_IS_TM4C129_RA0) || \
  4094. defined(TARGET_IS_TM4C129_RA1)
  4095. #define ROM_SMBusRxPacketSizeGet \
  4096. ((uint8_t (*)(tSMBus *psSMBus))ROM_SMBUSTABLE[29])
  4097. #endif
  4098. #if defined(TARGET_IS_TM4C123_RA1) || \
  4099. defined(TARGET_IS_TM4C123_RA3) || \
  4100. defined(TARGET_IS_TM4C123_RB1) || \
  4101. defined(TARGET_IS_TM4C129_RA0) || \
  4102. defined(TARGET_IS_TM4C129_RA1)
  4103. #define ROM_SMBusSlaveACKSend \
  4104. ((void (*)(tSMBus *psSMBus, \
  4105. bool bACK))ROM_SMBUSTABLE[30])
  4106. #endif
  4107. #if defined(TARGET_IS_TM4C123_RA1) || \
  4108. defined(TARGET_IS_TM4C123_RA3) || \
  4109. defined(TARGET_IS_TM4C123_RB1) || \
  4110. defined(TARGET_IS_TM4C129_RA0) || \
  4111. defined(TARGET_IS_TM4C129_RA1)
  4112. #define ROM_SMBusSlaveAddressSet \
  4113. ((void (*)(tSMBus *psSMBus, \
  4114. uint8_t ui8AddressNum, \
  4115. uint8_t ui8SlaveAddress))ROM_SMBUSTABLE[31])
  4116. #endif
  4117. #if defined(TARGET_IS_TM4C123_RA1) || \
  4118. defined(TARGET_IS_TM4C123_RA3) || \
  4119. defined(TARGET_IS_TM4C123_RB1) || \
  4120. defined(TARGET_IS_TM4C129_RA0) || \
  4121. defined(TARGET_IS_TM4C129_RA1)
  4122. #define ROM_SMBusSlaveARPFlagARGet \
  4123. ((bool (*)(tSMBus *psSMBus))ROM_SMBUSTABLE[32])
  4124. #endif
  4125. #if defined(TARGET_IS_TM4C123_RA1) || \
  4126. defined(TARGET_IS_TM4C123_RA3) || \
  4127. defined(TARGET_IS_TM4C123_RB1) || \
  4128. defined(TARGET_IS_TM4C129_RA0) || \
  4129. defined(TARGET_IS_TM4C129_RA1)
  4130. #define ROM_SMBusSlaveARPFlagARSet \
  4131. ((void (*)(tSMBus *psSMBus, \
  4132. bool bValue))ROM_SMBUSTABLE[33])
  4133. #endif
  4134. #if defined(TARGET_IS_TM4C123_RA1) || \
  4135. defined(TARGET_IS_TM4C123_RA3) || \
  4136. defined(TARGET_IS_TM4C123_RB1) || \
  4137. defined(TARGET_IS_TM4C129_RA0) || \
  4138. defined(TARGET_IS_TM4C129_RA1)
  4139. #define ROM_SMBusSlaveARPFlagAVGet \
  4140. ((bool (*)(tSMBus *psSMBus))ROM_SMBUSTABLE[34])
  4141. #endif
  4142. #if defined(TARGET_IS_TM4C123_RA1) || \
  4143. defined(TARGET_IS_TM4C123_RA3) || \
  4144. defined(TARGET_IS_TM4C123_RB1) || \
  4145. defined(TARGET_IS_TM4C129_RA0) || \
  4146. defined(TARGET_IS_TM4C129_RA1)
  4147. #define ROM_SMBusSlaveARPFlagAVSet \
  4148. ((void (*)(tSMBus *psSMBus, \
  4149. bool bValue))ROM_SMBUSTABLE[35])
  4150. #endif
  4151. #if defined(TARGET_IS_TM4C123_RA1) || \
  4152. defined(TARGET_IS_TM4C123_RA3) || \
  4153. defined(TARGET_IS_TM4C123_RB1) || \
  4154. defined(TARGET_IS_TM4C129_RA0) || \
  4155. defined(TARGET_IS_TM4C129_RA1)
  4156. #define ROM_SMBusSlaveBlockTransferDisable \
  4157. ((void (*)(tSMBus *psSMBus))ROM_SMBUSTABLE[36])
  4158. #endif
  4159. #if defined(TARGET_IS_TM4C123_RA1) || \
  4160. defined(TARGET_IS_TM4C123_RA3) || \
  4161. defined(TARGET_IS_TM4C123_RB1) || \
  4162. defined(TARGET_IS_TM4C129_RA0) || \
  4163. defined(TARGET_IS_TM4C129_RA1)
  4164. #define ROM_SMBusSlaveBlockTransferEnable \
  4165. ((void (*)(tSMBus *psSMBus))ROM_SMBUSTABLE[37])
  4166. #endif
  4167. #if defined(TARGET_IS_TM4C123_RA1) || \
  4168. defined(TARGET_IS_TM4C123_RA3) || \
  4169. defined(TARGET_IS_TM4C123_RB1) || \
  4170. defined(TARGET_IS_TM4C129_RA0) || \
  4171. defined(TARGET_IS_TM4C129_RA1)
  4172. #define ROM_SMBusSlaveCommandGet \
  4173. ((uint8_t (*)(tSMBus *psSMBus))ROM_SMBUSTABLE[38])
  4174. #endif
  4175. #if defined(TARGET_IS_TM4C123_RA1) || \
  4176. defined(TARGET_IS_TM4C123_RA3) || \
  4177. defined(TARGET_IS_TM4C123_RB1) || \
  4178. defined(TARGET_IS_TM4C129_RA0) || \
  4179. defined(TARGET_IS_TM4C129_RA1)
  4180. #define ROM_SMBusSlaveI2CDisable \
  4181. ((void (*)(tSMBus *psSMBus))ROM_SMBUSTABLE[39])
  4182. #endif
  4183. #if defined(TARGET_IS_TM4C123_RA1) || \
  4184. defined(TARGET_IS_TM4C123_RA3) || \
  4185. defined(TARGET_IS_TM4C123_RB1) || \
  4186. defined(TARGET_IS_TM4C129_RA0) || \
  4187. defined(TARGET_IS_TM4C129_RA1)
  4188. #define ROM_SMBusSlaveI2CEnable \
  4189. ((void (*)(tSMBus *psSMBus))ROM_SMBUSTABLE[40])
  4190. #endif
  4191. #if defined(TARGET_IS_TM4C123_RA1) || \
  4192. defined(TARGET_IS_TM4C123_RA3) || \
  4193. defined(TARGET_IS_TM4C123_RB1) || \
  4194. defined(TARGET_IS_TM4C129_RA0) || \
  4195. defined(TARGET_IS_TM4C129_RA1)
  4196. #define ROM_SMBusSlaveInit \
  4197. ((void (*)(tSMBus *psSMBus, \
  4198. uint32_t ui32I2CBase))ROM_SMBUSTABLE[41])
  4199. #endif
  4200. #if defined(TARGET_IS_TM4C123_RA1) || \
  4201. defined(TARGET_IS_TM4C123_RA3) || \
  4202. defined(TARGET_IS_TM4C123_RB1) || \
  4203. defined(TARGET_IS_TM4C129_RA0) || \
  4204. defined(TARGET_IS_TM4C129_RA1)
  4205. #define ROM_SMBusSlaveIntAddressGet \
  4206. ((tSMBusStatus (*)(tSMBus *psSMBus))ROM_SMBUSTABLE[42])
  4207. #endif
  4208. #if defined(TARGET_IS_TM4C123_RA1) || \
  4209. defined(TARGET_IS_TM4C123_RA3) || \
  4210. defined(TARGET_IS_TM4C123_RB1) || \
  4211. defined(TARGET_IS_TM4C129_RA0) || \
  4212. defined(TARGET_IS_TM4C129_RA1)
  4213. #define ROM_SMBusSlaveIntEnable \
  4214. ((void (*)(tSMBus *psSMBus))ROM_SMBUSTABLE[43])
  4215. #endif
  4216. #if defined(TARGET_IS_TM4C123_RA1) || \
  4217. defined(TARGET_IS_TM4C123_RA3) || \
  4218. defined(TARGET_IS_TM4C123_RB1) || \
  4219. defined(TARGET_IS_TM4C129_RA0) || \
  4220. defined(TARGET_IS_TM4C129_RA1)
  4221. #define ROM_SMBusSlaveIntProcess \
  4222. ((tSMBusStatus (*)(tSMBus *psSMBus))ROM_SMBUSTABLE[44])
  4223. #endif
  4224. #if defined(TARGET_IS_TM4C123_RA1) || \
  4225. defined(TARGET_IS_TM4C123_RA3) || \
  4226. defined(TARGET_IS_TM4C123_RB1) || \
  4227. defined(TARGET_IS_TM4C129_RA0) || \
  4228. defined(TARGET_IS_TM4C129_RA1)
  4229. #define ROM_SMBusSlaveManualACKDisable \
  4230. ((void (*)(tSMBus *psSMBus))ROM_SMBUSTABLE[45])
  4231. #endif
  4232. #if defined(TARGET_IS_TM4C123_RA1) || \
  4233. defined(TARGET_IS_TM4C123_RA3) || \
  4234. defined(TARGET_IS_TM4C123_RB1) || \
  4235. defined(TARGET_IS_TM4C129_RA0) || \
  4236. defined(TARGET_IS_TM4C129_RA1)
  4237. #define ROM_SMBusSlaveManualACKEnable \
  4238. ((void (*)(tSMBus *psSMBus))ROM_SMBUSTABLE[46])
  4239. #endif
  4240. #if defined(TARGET_IS_TM4C123_RA1) || \
  4241. defined(TARGET_IS_TM4C123_RA3) || \
  4242. defined(TARGET_IS_TM4C123_RB1) || \
  4243. defined(TARGET_IS_TM4C129_RA0) || \
  4244. defined(TARGET_IS_TM4C129_RA1)
  4245. #define ROM_SMBusSlaveManualACKStatusGet \
  4246. ((bool (*)(tSMBus *psSMBus))ROM_SMBUSTABLE[47])
  4247. #endif
  4248. #if defined(TARGET_IS_TM4C123_RA1) || \
  4249. defined(TARGET_IS_TM4C123_RA3) || \
  4250. defined(TARGET_IS_TM4C123_RB1) || \
  4251. defined(TARGET_IS_TM4C129_RA0) || \
  4252. defined(TARGET_IS_TM4C129_RA1)
  4253. #define ROM_SMBusSlaveProcessCallDisable \
  4254. ((void (*)(tSMBus *psSMBus))ROM_SMBUSTABLE[48])
  4255. #endif
  4256. #if defined(TARGET_IS_TM4C123_RA1) || \
  4257. defined(TARGET_IS_TM4C123_RA3) || \
  4258. defined(TARGET_IS_TM4C123_RB1) || \
  4259. defined(TARGET_IS_TM4C129_RA0) || \
  4260. defined(TARGET_IS_TM4C129_RA1)
  4261. #define ROM_SMBusSlaveProcessCallEnable \
  4262. ((void (*)(tSMBus *psSMBus))ROM_SMBUSTABLE[49])
  4263. #endif
  4264. #if defined(TARGET_IS_TM4C123_RA1) || \
  4265. defined(TARGET_IS_TM4C123_RA3) || \
  4266. defined(TARGET_IS_TM4C123_RB1) || \
  4267. defined(TARGET_IS_TM4C129_RA0) || \
  4268. defined(TARGET_IS_TM4C129_RA1)
  4269. #define ROM_SMBusSlaveRxBufferSet \
  4270. ((void (*)(tSMBus *psSMBus, \
  4271. uint8_t *pui8Data, \
  4272. uint8_t ui8Size))ROM_SMBUSTABLE[50])
  4273. #endif
  4274. #if defined(TARGET_IS_TM4C123_RA1) || \
  4275. defined(TARGET_IS_TM4C123_RA3) || \
  4276. defined(TARGET_IS_TM4C123_RB1) || \
  4277. defined(TARGET_IS_TM4C129_RA0) || \
  4278. defined(TARGET_IS_TM4C129_RA1)
  4279. #define ROM_SMBusSlaveTransferInit \
  4280. ((void (*)(tSMBus *psSMBus))ROM_SMBUSTABLE[51])
  4281. #endif
  4282. #if defined(TARGET_IS_TM4C123_RA1) || \
  4283. defined(TARGET_IS_TM4C123_RA3) || \
  4284. defined(TARGET_IS_TM4C123_RB1) || \
  4285. defined(TARGET_IS_TM4C129_RA0) || \
  4286. defined(TARGET_IS_TM4C129_RA1)
  4287. #define ROM_SMBusSlaveTxBufferSet \
  4288. ((void (*)(tSMBus *psSMBus, \
  4289. uint8_t *pui8Data, \
  4290. uint8_t ui8Size))ROM_SMBUSTABLE[52])
  4291. #endif
  4292. #if defined(TARGET_IS_TM4C123_RA1) || \
  4293. defined(TARGET_IS_TM4C123_RA3) || \
  4294. defined(TARGET_IS_TM4C123_RB1) || \
  4295. defined(TARGET_IS_TM4C129_RA0) || \
  4296. defined(TARGET_IS_TM4C129_RA1)
  4297. #define ROM_SMBusSlaveUDIDSet \
  4298. ((void (*)(tSMBus *psSMBus, \
  4299. tSMBusUDID *pUDID))ROM_SMBUSTABLE[53])
  4300. #endif
  4301. #if defined(TARGET_IS_TM4C123_RA1) || \
  4302. defined(TARGET_IS_TM4C123_RA3) || \
  4303. defined(TARGET_IS_TM4C123_RB1) || \
  4304. defined(TARGET_IS_TM4C129_RA0) || \
  4305. defined(TARGET_IS_TM4C129_RA1)
  4306. #define ROM_SMBusStatusGet \
  4307. ((tSMBusStatus (*)(tSMBus *psSMBus))ROM_SMBUSTABLE[54])
  4308. #endif
  4309. #if defined(TARGET_IS_TM4C123_RA3) || \
  4310. defined(TARGET_IS_TM4C123_RB1) || \
  4311. defined(TARGET_IS_TM4C129_RA0) || \
  4312. defined(TARGET_IS_TM4C129_RA1)
  4313. #define ROM_SMBusSlaveDataSend \
  4314. ((tSMBusStatus (*)(tSMBus *psSMBus))ROM_SMBUSTABLE[55])
  4315. #endif
  4316. #if defined(TARGET_IS_TM4C129_RA0) || \
  4317. defined(TARGET_IS_TM4C129_RA1)
  4318. #define ROM_SMBusFIFOEnable \
  4319. ((void (*)(tSMBus *psSMBus))ROM_SMBUSTABLE[56])
  4320. #endif
  4321. #if defined(TARGET_IS_TM4C129_RA0) || \
  4322. defined(TARGET_IS_TM4C129_RA1)
  4323. #define ROM_SMBusFIFODisable \
  4324. ((void (*)(tSMBus *psSMBus))ROM_SMBUSTABLE[57])
  4325. #endif
  4326. #if defined(TARGET_IS_TM4C129_RA0) || \
  4327. defined(TARGET_IS_TM4C129_RA1)
  4328. #define ROM_SMBusDMAEnable \
  4329. ((void (*)(tSMBus *psSMBus, \
  4330. uint8_t ui8TxChannel, \
  4331. uint8_t ui8RxChannel))ROM_SMBUSTABLE[58])
  4332. #endif
  4333. #if defined(TARGET_IS_TM4C129_RA0) || \
  4334. defined(TARGET_IS_TM4C129_RA1)
  4335. #define ROM_SMBusDMADisable \
  4336. ((void (*)(tSMBus *psSMBus))ROM_SMBUSTABLE[59])
  4337. #endif
  4338. //*****************************************************************************
  4339. //
  4340. // Macros for calling ROM functions in the SPIFlash API.
  4341. //
  4342. //*****************************************************************************
  4343. #if defined(TARGET_IS_TM4C129_RA0) || \
  4344. defined(TARGET_IS_TM4C129_RA1)
  4345. #define ROM_SPIFlashIntHandler \
  4346. ((uint32_t (*)(tSPIFlashState *pState))ROM_SPIFLASHTABLE[0])
  4347. #endif
  4348. #if defined(TARGET_IS_TM4C129_RA0) || \
  4349. defined(TARGET_IS_TM4C129_RA1)
  4350. #define ROM_SPIFlashInit \
  4351. ((void (*)(uint32_t ui32Base, \
  4352. uint32_t ui32Clock, \
  4353. uint32_t ui32BitRate))ROM_SPIFLASHTABLE[1])
  4354. #endif
  4355. #if defined(TARGET_IS_TM4C129_RA0) || \
  4356. defined(TARGET_IS_TM4C129_RA1)
  4357. #define ROM_SPIFlashWriteStatus \
  4358. ((void (*)(uint32_t ui32Base, \
  4359. uint8_t ui8Status))ROM_SPIFLASHTABLE[2])
  4360. #endif
  4361. #if defined(TARGET_IS_TM4C129_RA0) || \
  4362. defined(TARGET_IS_TM4C129_RA1)
  4363. #define ROM_SPIFlashPageProgram \
  4364. ((void (*)(uint32_t ui32Base, \
  4365. uint32_t ui32Addr, \
  4366. const uint8_t *pui8Data, \
  4367. uint32_t ui32Count))ROM_SPIFLASHTABLE[3])
  4368. #endif
  4369. #if defined(TARGET_IS_TM4C129_RA0) || \
  4370. defined(TARGET_IS_TM4C129_RA1)
  4371. #define ROM_SPIFlashPageProgramNonBlocking \
  4372. ((void (*)(tSPIFlashState *pState, \
  4373. uint32_t ui32Base, \
  4374. uint32_t ui32Addr, \
  4375. const uint8_t *pui8Data, \
  4376. uint32_t ui32Count, \
  4377. bool bUseDMA, \
  4378. uint32_t ui32TxChannel))ROM_SPIFLASHTABLE[4])
  4379. #endif
  4380. #if defined(TARGET_IS_TM4C129_RA0) || \
  4381. defined(TARGET_IS_TM4C129_RA1)
  4382. #define ROM_SPIFlashRead \
  4383. ((void (*)(uint32_t ui32Base, \
  4384. uint32_t ui32Addr, \
  4385. uint8_t *pui8Data, \
  4386. uint32_t ui32Count))ROM_SPIFLASHTABLE[5])
  4387. #endif
  4388. #if defined(TARGET_IS_TM4C129_RA0) || \
  4389. defined(TARGET_IS_TM4C129_RA1)
  4390. #define ROM_SPIFlashReadNonBlocking \
  4391. ((void (*)(tSPIFlashState *pState, \
  4392. uint32_t ui32Base, \
  4393. uint32_t ui32Addr, \
  4394. uint8_t *pui8Data, \
  4395. uint32_t ui32Count, \
  4396. bool bUseDMA, \
  4397. uint32_t ui32TxChannel, \
  4398. uint32_t ui32RxChannel))ROM_SPIFLASHTABLE[6])
  4399. #endif
  4400. #if defined(TARGET_IS_TM4C129_RA0) || \
  4401. defined(TARGET_IS_TM4C129_RA1)
  4402. #define ROM_SPIFlashWriteDisable \
  4403. ((void (*)(uint32_t ui32Base))ROM_SPIFLASHTABLE[7])
  4404. #endif
  4405. #if defined(TARGET_IS_TM4C129_RA0) || \
  4406. defined(TARGET_IS_TM4C129_RA1)
  4407. #define ROM_SPIFlashReadStatus \
  4408. ((uint8_t (*)(uint32_t ui32Base))ROM_SPIFLASHTABLE[8])
  4409. #endif
  4410. #if defined(TARGET_IS_TM4C129_RA0) || \
  4411. defined(TARGET_IS_TM4C129_RA1)
  4412. #define ROM_SPIFlashWriteEnable \
  4413. ((void (*)(uint32_t ui32Base))ROM_SPIFLASHTABLE[9])
  4414. #endif
  4415. #if defined(TARGET_IS_TM4C129_RA0) || \
  4416. defined(TARGET_IS_TM4C129_RA1)
  4417. #define ROM_SPIFlashFastRead \
  4418. ((void (*)(uint32_t ui32Base, \
  4419. uint32_t ui32Addr, \
  4420. uint8_t *pui8Data, \
  4421. uint32_t ui32Count))ROM_SPIFLASHTABLE[10])
  4422. #endif
  4423. #if defined(TARGET_IS_TM4C129_RA0) || \
  4424. defined(TARGET_IS_TM4C129_RA1)
  4425. #define ROM_SPIFlashFastReadNonBlocking \
  4426. ((void (*)(tSPIFlashState *pState, \
  4427. uint32_t ui32Base, \
  4428. uint32_t ui32Addr, \
  4429. uint8_t *pui8Data, \
  4430. uint32_t ui32Count, \
  4431. bool bUseDMA, \
  4432. uint32_t ui32TxChannel, \
  4433. uint32_t ui32RxChannel))ROM_SPIFLASHTABLE[11])
  4434. #endif
  4435. #if defined(TARGET_IS_TM4C129_RA0) || \
  4436. defined(TARGET_IS_TM4C129_RA1)
  4437. #define ROM_SPIFlashSectorErase \
  4438. ((void (*)(uint32_t ui32Base, \
  4439. uint32_t ui32Addr))ROM_SPIFLASHTABLE[12])
  4440. #endif
  4441. #if defined(TARGET_IS_TM4C129_RA0) || \
  4442. defined(TARGET_IS_TM4C129_RA1)
  4443. #define ROM_SPIFlashDualRead \
  4444. ((void (*)(uint32_t ui32Base, \
  4445. uint32_t ui32Addr, \
  4446. uint8_t *pui8Data, \
  4447. uint32_t ui32Count))ROM_SPIFLASHTABLE[13])
  4448. #endif
  4449. #if defined(TARGET_IS_TM4C129_RA0) || \
  4450. defined(TARGET_IS_TM4C129_RA1)
  4451. #define ROM_SPIFlashDualReadNonBlocking \
  4452. ((void (*)(tSPIFlashState *pState, \
  4453. uint32_t ui32Base, \
  4454. uint32_t ui32Addr, \
  4455. uint8_t *pui8Data, \
  4456. uint32_t ui32Count, \
  4457. bool bUseDMA, \
  4458. uint32_t ui32TxChannel, \
  4459. uint32_t ui32RxChannel))ROM_SPIFLASHTABLE[14])
  4460. #endif
  4461. #if defined(TARGET_IS_TM4C129_RA0) || \
  4462. defined(TARGET_IS_TM4C129_RA1)
  4463. #define ROM_SPIFlashBlockErase32 \
  4464. ((void (*)(uint32_t ui32Base, \
  4465. uint32_t ui32Addr))ROM_SPIFLASHTABLE[15])
  4466. #endif
  4467. #if defined(TARGET_IS_TM4C129_RA0) || \
  4468. defined(TARGET_IS_TM4C129_RA1)
  4469. #define ROM_SPIFlashQuadRead \
  4470. ((void (*)(uint32_t ui32Base, \
  4471. uint32_t ui32Addr, \
  4472. uint8_t *pui8Data, \
  4473. uint32_t ui32Count))ROM_SPIFLASHTABLE[16])
  4474. #endif
  4475. #if defined(TARGET_IS_TM4C129_RA0) || \
  4476. defined(TARGET_IS_TM4C129_RA1)
  4477. #define ROM_SPIFlashQuadReadNonBlocking \
  4478. ((void (*)(tSPIFlashState *pState, \
  4479. uint32_t ui32Base, \
  4480. uint32_t ui32Addr, \
  4481. uint8_t *pui8Data, \
  4482. uint32_t ui32Count, \
  4483. bool bUseDMA, \
  4484. uint32_t ui32TxChannel, \
  4485. uint32_t ui32RxChannel))ROM_SPIFLASHTABLE[17])
  4486. #endif
  4487. #if defined(TARGET_IS_TM4C129_RA0) || \
  4488. defined(TARGET_IS_TM4C129_RA1)
  4489. #define ROM_SPIFlashReadID \
  4490. ((void (*)(uint32_t ui32Base, \
  4491. uint8_t *pui8ManufacturerID, \
  4492. uint16_t *pui16DeviceID))ROM_SPIFLASHTABLE[18])
  4493. #endif
  4494. #if defined(TARGET_IS_TM4C129_RA0) || \
  4495. defined(TARGET_IS_TM4C129_RA1)
  4496. #define ROM_SPIFlashChipErase \
  4497. ((void (*)(uint32_t ui32Base))ROM_SPIFLASHTABLE[19])
  4498. #endif
  4499. #if defined(TARGET_IS_TM4C129_RA0) || \
  4500. defined(TARGET_IS_TM4C129_RA1)
  4501. #define ROM_SPIFlashBlockErase64 \
  4502. ((void (*)(uint32_t ui32Base, \
  4503. uint32_t ui32Addr))ROM_SPIFLASHTABLE[20])
  4504. #endif
  4505. //*****************************************************************************
  4506. //
  4507. // Macros for calling ROM functions in the SSI API.
  4508. //
  4509. //*****************************************************************************
  4510. #if defined(TARGET_IS_TM4C123_RA1) || \
  4511. defined(TARGET_IS_TM4C123_RA3) || \
  4512. defined(TARGET_IS_TM4C123_RB1) || \
  4513. defined(TARGET_IS_TM4C129_RA0) || \
  4514. defined(TARGET_IS_TM4C129_RA1)
  4515. #define ROM_SSIDataPut \
  4516. ((void (*)(uint32_t ui32Base, \
  4517. uint32_t ui32Data))ROM_SSITABLE[0])
  4518. #endif
  4519. #if defined(TARGET_IS_TM4C123_RA1) || \
  4520. defined(TARGET_IS_TM4C123_RA3) || \
  4521. defined(TARGET_IS_TM4C123_RB1) || \
  4522. defined(TARGET_IS_TM4C129_RA0) || \
  4523. defined(TARGET_IS_TM4C129_RA1)
  4524. #define ROM_SSIConfigSetExpClk \
  4525. ((void (*)(uint32_t ui32Base, \
  4526. uint32_t ui32SSIClk, \
  4527. uint32_t ui32Protocol, \
  4528. uint32_t ui32Mode, \
  4529. uint32_t ui32BitRate, \
  4530. uint32_t ui32DataWidth))ROM_SSITABLE[1])
  4531. #endif
  4532. #if defined(TARGET_IS_TM4C123_RA1) || \
  4533. defined(TARGET_IS_TM4C123_RA3) || \
  4534. defined(TARGET_IS_TM4C123_RB1) || \
  4535. defined(TARGET_IS_TM4C129_RA0) || \
  4536. defined(TARGET_IS_TM4C129_RA1)
  4537. #define ROM_SSIEnable \
  4538. ((void (*)(uint32_t ui32Base))ROM_SSITABLE[2])
  4539. #endif
  4540. #if defined(TARGET_IS_TM4C123_RA1) || \
  4541. defined(TARGET_IS_TM4C123_RA3) || \
  4542. defined(TARGET_IS_TM4C123_RB1) || \
  4543. defined(TARGET_IS_TM4C129_RA0) || \
  4544. defined(TARGET_IS_TM4C129_RA1)
  4545. #define ROM_SSIDisable \
  4546. ((void (*)(uint32_t ui32Base))ROM_SSITABLE[3])
  4547. #endif
  4548. #if defined(TARGET_IS_TM4C123_RA1) || \
  4549. defined(TARGET_IS_TM4C123_RA3) || \
  4550. defined(TARGET_IS_TM4C123_RB1) || \
  4551. defined(TARGET_IS_TM4C129_RA0) || \
  4552. defined(TARGET_IS_TM4C129_RA1)
  4553. #define ROM_SSIIntEnable \
  4554. ((void (*)(uint32_t ui32Base, \
  4555. uint32_t ui32IntFlags))ROM_SSITABLE[4])
  4556. #endif
  4557. #if defined(TARGET_IS_TM4C123_RA1) || \
  4558. defined(TARGET_IS_TM4C123_RA3) || \
  4559. defined(TARGET_IS_TM4C123_RB1) || \
  4560. defined(TARGET_IS_TM4C129_RA0) || \
  4561. defined(TARGET_IS_TM4C129_RA1)
  4562. #define ROM_SSIIntDisable \
  4563. ((void (*)(uint32_t ui32Base, \
  4564. uint32_t ui32IntFlags))ROM_SSITABLE[5])
  4565. #endif
  4566. #if defined(TARGET_IS_TM4C123_RA1) || \
  4567. defined(TARGET_IS_TM4C123_RA3) || \
  4568. defined(TARGET_IS_TM4C123_RB1) || \
  4569. defined(TARGET_IS_TM4C129_RA0) || \
  4570. defined(TARGET_IS_TM4C129_RA1)
  4571. #define ROM_SSIIntStatus \
  4572. ((uint32_t (*)(uint32_t ui32Base, \
  4573. bool bMasked))ROM_SSITABLE[6])
  4574. #endif
  4575. #if defined(TARGET_IS_TM4C123_RA1) || \
  4576. defined(TARGET_IS_TM4C123_RA3) || \
  4577. defined(TARGET_IS_TM4C123_RB1) || \
  4578. defined(TARGET_IS_TM4C129_RA0) || \
  4579. defined(TARGET_IS_TM4C129_RA1)
  4580. #define ROM_SSIIntClear \
  4581. ((void (*)(uint32_t ui32Base, \
  4582. uint32_t ui32IntFlags))ROM_SSITABLE[7])
  4583. #endif
  4584. #if defined(TARGET_IS_TM4C123_RA1) || \
  4585. defined(TARGET_IS_TM4C123_RA3) || \
  4586. defined(TARGET_IS_TM4C123_RB1) || \
  4587. defined(TARGET_IS_TM4C129_RA0) || \
  4588. defined(TARGET_IS_TM4C129_RA1)
  4589. #define ROM_SSIDataPutNonBlocking \
  4590. ((int32_t (*)(uint32_t ui32Base, \
  4591. uint32_t ui32Data))ROM_SSITABLE[8])
  4592. #endif
  4593. #if defined(TARGET_IS_TM4C123_RA1) || \
  4594. defined(TARGET_IS_TM4C123_RA3) || \
  4595. defined(TARGET_IS_TM4C123_RB1) || \
  4596. defined(TARGET_IS_TM4C129_RA0) || \
  4597. defined(TARGET_IS_TM4C129_RA1)
  4598. #define ROM_SSIDataGet \
  4599. ((void (*)(uint32_t ui32Base, \
  4600. uint32_t *pui32Data))ROM_SSITABLE[9])
  4601. #endif
  4602. #if defined(TARGET_IS_TM4C123_RA1) || \
  4603. defined(TARGET_IS_TM4C123_RA3) || \
  4604. defined(TARGET_IS_TM4C123_RB1) || \
  4605. defined(TARGET_IS_TM4C129_RA0) || \
  4606. defined(TARGET_IS_TM4C129_RA1)
  4607. #define ROM_SSIDataGetNonBlocking \
  4608. ((int32_t (*)(uint32_t ui32Base, \
  4609. uint32_t *pui32Data))ROM_SSITABLE[10])
  4610. #endif
  4611. #if defined(TARGET_IS_TM4C123_RA1) || \
  4612. defined(TARGET_IS_TM4C123_RA3) || \
  4613. defined(TARGET_IS_TM4C123_RB1) || \
  4614. defined(TARGET_IS_TM4C129_RA0) || \
  4615. defined(TARGET_IS_TM4C129_RA1)
  4616. #define ROM_UpdateSSI \
  4617. ((void (*)(void))ROM_SSITABLE[11])
  4618. #endif
  4619. #if defined(TARGET_IS_TM4C123_RA1) || \
  4620. defined(TARGET_IS_TM4C123_RA3) || \
  4621. defined(TARGET_IS_TM4C123_RB1) || \
  4622. defined(TARGET_IS_TM4C129_RA0) || \
  4623. defined(TARGET_IS_TM4C129_RA1)
  4624. #define ROM_SSIDMAEnable \
  4625. ((void (*)(uint32_t ui32Base, \
  4626. uint32_t ui32DMAFlags))ROM_SSITABLE[12])
  4627. #endif
  4628. #if defined(TARGET_IS_TM4C123_RA1) || \
  4629. defined(TARGET_IS_TM4C123_RA3) || \
  4630. defined(TARGET_IS_TM4C123_RB1) || \
  4631. defined(TARGET_IS_TM4C129_RA0) || \
  4632. defined(TARGET_IS_TM4C129_RA1)
  4633. #define ROM_SSIDMADisable \
  4634. ((void (*)(uint32_t ui32Base, \
  4635. uint32_t ui32DMAFlags))ROM_SSITABLE[13])
  4636. #endif
  4637. #if defined(TARGET_IS_TM4C123_RA1) || \
  4638. defined(TARGET_IS_TM4C123_RA3) || \
  4639. defined(TARGET_IS_TM4C123_RB1) || \
  4640. defined(TARGET_IS_TM4C129_RA0) || \
  4641. defined(TARGET_IS_TM4C129_RA1)
  4642. #define ROM_SSIBusy \
  4643. ((bool (*)(uint32_t ui32Base))ROM_SSITABLE[14])
  4644. #endif
  4645. #if defined(TARGET_IS_TM4C123_RA1) || \
  4646. defined(TARGET_IS_TM4C123_RA3) || \
  4647. defined(TARGET_IS_TM4C123_RB1) || \
  4648. defined(TARGET_IS_TM4C129_RA0) || \
  4649. defined(TARGET_IS_TM4C129_RA1)
  4650. #define ROM_SSIClockSourceGet \
  4651. ((uint32_t (*)(uint32_t ui32Base))ROM_SSITABLE[15])
  4652. #endif
  4653. #if defined(TARGET_IS_TM4C123_RA1) || \
  4654. defined(TARGET_IS_TM4C123_RA3) || \
  4655. defined(TARGET_IS_TM4C123_RB1) || \
  4656. defined(TARGET_IS_TM4C129_RA0) || \
  4657. defined(TARGET_IS_TM4C129_RA1)
  4658. #define ROM_SSIClockSourceSet \
  4659. ((void (*)(uint32_t ui32Base, \
  4660. uint32_t ui32Source))ROM_SSITABLE[16])
  4661. #endif
  4662. #if defined(TARGET_IS_TM4C129_RA0) || \
  4663. defined(TARGET_IS_TM4C129_RA1)
  4664. #define ROM_SSIAdvModeSet \
  4665. ((void (*)(uint32_t ui32Base, \
  4666. uint32_t ui32Mode))ROM_SSITABLE[17])
  4667. #endif
  4668. #if defined(TARGET_IS_TM4C129_RA0) || \
  4669. defined(TARGET_IS_TM4C129_RA1)
  4670. #define ROM_SSIAdvDataPutFrameEnd \
  4671. ((void (*)(uint32_t ui32Base, \
  4672. uint32_t ui32Data))ROM_SSITABLE[18])
  4673. #endif
  4674. #if defined(TARGET_IS_TM4C129_RA0) || \
  4675. defined(TARGET_IS_TM4C129_RA1)
  4676. #define ROM_SSIAdvDataPutFrameEndNonBlocking \
  4677. ((int32_t (*)(uint32_t ui32Base, \
  4678. uint32_t ui32Data))ROM_SSITABLE[19])
  4679. #endif
  4680. #if defined(TARGET_IS_TM4C129_RA0) || \
  4681. defined(TARGET_IS_TM4C129_RA1)
  4682. #define ROM_SSIAdvFrameHoldEnable \
  4683. ((void (*)(uint32_t ui32Base))ROM_SSITABLE[20])
  4684. #endif
  4685. #if defined(TARGET_IS_TM4C129_RA0) || \
  4686. defined(TARGET_IS_TM4C129_RA1)
  4687. #define ROM_SSIAdvFrameHoldDisable \
  4688. ((void (*)(uint32_t ui32Base))ROM_SSITABLE[21])
  4689. #endif
  4690. //*****************************************************************************
  4691. //
  4692. // Macros for calling ROM functions in the SysCtl API.
  4693. //
  4694. //*****************************************************************************
  4695. #if defined(TARGET_IS_TM4C123_RA1) || \
  4696. defined(TARGET_IS_TM4C123_RA3) || \
  4697. defined(TARGET_IS_TM4C123_RB1) || \
  4698. defined(TARGET_IS_TM4C129_RA0) || \
  4699. defined(TARGET_IS_TM4C129_RA1)
  4700. #define ROM_SysCtlSleep \
  4701. ((void (*)(void))ROM_SYSCTLTABLE[0])
  4702. #endif
  4703. #if defined(TARGET_IS_TM4C123_RA1) || \
  4704. defined(TARGET_IS_TM4C123_RA3) || \
  4705. defined(TARGET_IS_TM4C123_RB1) || \
  4706. defined(TARGET_IS_TM4C129_RA0) || \
  4707. defined(TARGET_IS_TM4C129_RA1)
  4708. #define ROM_SysCtlSRAMSizeGet \
  4709. ((uint32_t (*)(void))ROM_SYSCTLTABLE[1])
  4710. #endif
  4711. #if defined(TARGET_IS_TM4C123_RA1) || \
  4712. defined(TARGET_IS_TM4C123_RA3) || \
  4713. defined(TARGET_IS_TM4C123_RB1) || \
  4714. defined(TARGET_IS_TM4C129_RA0) || \
  4715. defined(TARGET_IS_TM4C129_RA1)
  4716. #define ROM_SysCtlFlashSizeGet \
  4717. ((uint32_t (*)(void))ROM_SYSCTLTABLE[2])
  4718. #endif
  4719. #if defined(TARGET_IS_TM4C123_RA1) || \
  4720. defined(TARGET_IS_TM4C123_RA3) || \
  4721. defined(TARGET_IS_TM4C123_RB1) || \
  4722. defined(TARGET_IS_TM4C129_RA0) || \
  4723. defined(TARGET_IS_TM4C129_RA1)
  4724. #define ROM_SysCtlPeripheralPresent \
  4725. ((bool (*)(uint32_t ui32Peripheral))ROM_SYSCTLTABLE[4])
  4726. #endif
  4727. #if defined(TARGET_IS_TM4C123_RA1) || \
  4728. defined(TARGET_IS_TM4C123_RA3) || \
  4729. defined(TARGET_IS_TM4C123_RB1) || \
  4730. defined(TARGET_IS_TM4C129_RA0) || \
  4731. defined(TARGET_IS_TM4C129_RA1)
  4732. #define ROM_SysCtlPeripheralReset \
  4733. ((void (*)(uint32_t ui32Peripheral))ROM_SYSCTLTABLE[5])
  4734. #endif
  4735. #if defined(TARGET_IS_TM4C123_RA1) || \
  4736. defined(TARGET_IS_TM4C123_RA3) || \
  4737. defined(TARGET_IS_TM4C123_RB1) || \
  4738. defined(TARGET_IS_TM4C129_RA0) || \
  4739. defined(TARGET_IS_TM4C129_RA1)
  4740. #define ROM_SysCtlPeripheralEnable \
  4741. ((void (*)(uint32_t ui32Peripheral))ROM_SYSCTLTABLE[6])
  4742. #endif
  4743. #if defined(TARGET_IS_TM4C123_RA1) || \
  4744. defined(TARGET_IS_TM4C123_RA3) || \
  4745. defined(TARGET_IS_TM4C123_RB1) || \
  4746. defined(TARGET_IS_TM4C129_RA0) || \
  4747. defined(TARGET_IS_TM4C129_RA1)
  4748. #define ROM_SysCtlPeripheralDisable \
  4749. ((void (*)(uint32_t ui32Peripheral))ROM_SYSCTLTABLE[7])
  4750. #endif
  4751. #if defined(TARGET_IS_TM4C123_RA1) || \
  4752. defined(TARGET_IS_TM4C123_RA3) || \
  4753. defined(TARGET_IS_TM4C123_RB1) || \
  4754. defined(TARGET_IS_TM4C129_RA0) || \
  4755. defined(TARGET_IS_TM4C129_RA1)
  4756. #define ROM_SysCtlPeripheralSleepEnable \
  4757. ((void (*)(uint32_t ui32Peripheral))ROM_SYSCTLTABLE[8])
  4758. #endif
  4759. #if defined(TARGET_IS_TM4C123_RA1) || \
  4760. defined(TARGET_IS_TM4C123_RA3) || \
  4761. defined(TARGET_IS_TM4C123_RB1) || \
  4762. defined(TARGET_IS_TM4C129_RA0) || \
  4763. defined(TARGET_IS_TM4C129_RA1)
  4764. #define ROM_SysCtlPeripheralSleepDisable \
  4765. ((void (*)(uint32_t ui32Peripheral))ROM_SYSCTLTABLE[9])
  4766. #endif
  4767. #if defined(TARGET_IS_TM4C123_RA1) || \
  4768. defined(TARGET_IS_TM4C123_RA3) || \
  4769. defined(TARGET_IS_TM4C123_RB1) || \
  4770. defined(TARGET_IS_TM4C129_RA0) || \
  4771. defined(TARGET_IS_TM4C129_RA1)
  4772. #define ROM_SysCtlPeripheralDeepSleepEnable \
  4773. ((void (*)(uint32_t ui32Peripheral))ROM_SYSCTLTABLE[10])
  4774. #endif
  4775. #if defined(TARGET_IS_TM4C123_RA1) || \
  4776. defined(TARGET_IS_TM4C123_RA3) || \
  4777. defined(TARGET_IS_TM4C123_RB1) || \
  4778. defined(TARGET_IS_TM4C129_RA0) || \
  4779. defined(TARGET_IS_TM4C129_RA1)
  4780. #define ROM_SysCtlPeripheralDeepSleepDisable \
  4781. ((void (*)(uint32_t ui32Peripheral))ROM_SYSCTLTABLE[11])
  4782. #endif
  4783. #if defined(TARGET_IS_TM4C123_RA1) || \
  4784. defined(TARGET_IS_TM4C123_RA3) || \
  4785. defined(TARGET_IS_TM4C123_RB1) || \
  4786. defined(TARGET_IS_TM4C129_RA0) || \
  4787. defined(TARGET_IS_TM4C129_RA1)
  4788. #define ROM_SysCtlPeripheralClockGating \
  4789. ((void (*)(bool bEnable))ROM_SYSCTLTABLE[12])
  4790. #endif
  4791. #if defined(TARGET_IS_TM4C123_RA1) || \
  4792. defined(TARGET_IS_TM4C123_RA3) || \
  4793. defined(TARGET_IS_TM4C123_RB1) || \
  4794. defined(TARGET_IS_TM4C129_RA0) || \
  4795. defined(TARGET_IS_TM4C129_RA1)
  4796. #define ROM_SysCtlIntEnable \
  4797. ((void (*)(uint32_t ui32Ints))ROM_SYSCTLTABLE[13])
  4798. #endif
  4799. #if defined(TARGET_IS_TM4C123_RA1) || \
  4800. defined(TARGET_IS_TM4C123_RA3) || \
  4801. defined(TARGET_IS_TM4C123_RB1) || \
  4802. defined(TARGET_IS_TM4C129_RA0) || \
  4803. defined(TARGET_IS_TM4C129_RA1)
  4804. #define ROM_SysCtlIntDisable \
  4805. ((void (*)(uint32_t ui32Ints))ROM_SYSCTLTABLE[14])
  4806. #endif
  4807. #if defined(TARGET_IS_TM4C123_RA1) || \
  4808. defined(TARGET_IS_TM4C123_RA3) || \
  4809. defined(TARGET_IS_TM4C123_RB1) || \
  4810. defined(TARGET_IS_TM4C129_RA0) || \
  4811. defined(TARGET_IS_TM4C129_RA1)
  4812. #define ROM_SysCtlIntClear \
  4813. ((void (*)(uint32_t ui32Ints))ROM_SYSCTLTABLE[15])
  4814. #endif
  4815. #if defined(TARGET_IS_TM4C123_RA1) || \
  4816. defined(TARGET_IS_TM4C123_RA3) || \
  4817. defined(TARGET_IS_TM4C123_RB1) || \
  4818. defined(TARGET_IS_TM4C129_RA0) || \
  4819. defined(TARGET_IS_TM4C129_RA1)
  4820. #define ROM_SysCtlIntStatus \
  4821. ((uint32_t (*)(bool bMasked))ROM_SYSCTLTABLE[16])
  4822. #endif
  4823. #if defined(TARGET_IS_TM4C123_RA1) || \
  4824. defined(TARGET_IS_TM4C123_RA3) || \
  4825. defined(TARGET_IS_TM4C123_RB1) || \
  4826. defined(TARGET_IS_TM4C129_RA0) || \
  4827. defined(TARGET_IS_TM4C129_RA1)
  4828. #define ROM_SysCtlReset \
  4829. ((void (*)(void))ROM_SYSCTLTABLE[19])
  4830. #endif
  4831. #if defined(TARGET_IS_TM4C123_RA1) || \
  4832. defined(TARGET_IS_TM4C123_RA3) || \
  4833. defined(TARGET_IS_TM4C123_RB1) || \
  4834. defined(TARGET_IS_TM4C129_RA0) || \
  4835. defined(TARGET_IS_TM4C129_RA1)
  4836. #define ROM_SysCtlDeepSleep \
  4837. ((void (*)(void))ROM_SYSCTLTABLE[20])
  4838. #endif
  4839. #if defined(TARGET_IS_TM4C123_RA1) || \
  4840. defined(TARGET_IS_TM4C123_RA3) || \
  4841. defined(TARGET_IS_TM4C123_RB1) || \
  4842. defined(TARGET_IS_TM4C129_RA0) || \
  4843. defined(TARGET_IS_TM4C129_RA1)
  4844. #define ROM_SysCtlResetCauseGet \
  4845. ((uint32_t (*)(void))ROM_SYSCTLTABLE[21])
  4846. #endif
  4847. #if defined(TARGET_IS_TM4C123_RA1) || \
  4848. defined(TARGET_IS_TM4C123_RA3) || \
  4849. defined(TARGET_IS_TM4C123_RB1) || \
  4850. defined(TARGET_IS_TM4C129_RA0) || \
  4851. defined(TARGET_IS_TM4C129_RA1)
  4852. #define ROM_SysCtlResetCauseClear \
  4853. ((void (*)(uint32_t ui32Causes))ROM_SYSCTLTABLE[22])
  4854. #endif
  4855. #if defined(TARGET_IS_TM4C123_RA1) || \
  4856. defined(TARGET_IS_TM4C123_RA3) || \
  4857. defined(TARGET_IS_TM4C123_RB1)
  4858. #define ROM_SysCtlClockSet \
  4859. ((void (*)(uint32_t ui32Config))ROM_SYSCTLTABLE[23])
  4860. #endif
  4861. #if defined(TARGET_IS_TM4C123_RA1) || \
  4862. defined(TARGET_IS_TM4C123_RA3) || \
  4863. defined(TARGET_IS_TM4C123_RB1)
  4864. #define ROM_SysCtlClockGet \
  4865. ((uint32_t (*)(void))ROM_SYSCTLTABLE[24])
  4866. #endif
  4867. #if defined(TARGET_IS_TM4C123_RA1) || \
  4868. defined(TARGET_IS_TM4C123_RA3) || \
  4869. defined(TARGET_IS_TM4C123_RB1)
  4870. #define ROM_SysCtlPWMClockSet \
  4871. ((void (*)(uint32_t ui32Config))ROM_SYSCTLTABLE[25])
  4872. #endif
  4873. #if defined(TARGET_IS_TM4C123_RA1) || \
  4874. defined(TARGET_IS_TM4C123_RA3) || \
  4875. defined(TARGET_IS_TM4C123_RB1)
  4876. #define ROM_SysCtlPWMClockGet \
  4877. ((uint32_t (*)(void))ROM_SYSCTLTABLE[26])
  4878. #endif
  4879. #if defined(TARGET_IS_TM4C123_RA1) || \
  4880. defined(TARGET_IS_TM4C123_RA3) || \
  4881. defined(TARGET_IS_TM4C123_RB1)
  4882. #define ROM_SysCtlUSBPLLEnable \
  4883. ((void (*)(void))ROM_SYSCTLTABLE[31])
  4884. #endif
  4885. #if defined(TARGET_IS_TM4C123_RA1) || \
  4886. defined(TARGET_IS_TM4C123_RA3) || \
  4887. defined(TARGET_IS_TM4C123_RB1)
  4888. #define ROM_SysCtlUSBPLLDisable \
  4889. ((void (*)(void))ROM_SYSCTLTABLE[32])
  4890. #endif
  4891. #if defined(TARGET_IS_TM4C123_RA1) || \
  4892. defined(TARGET_IS_TM4C123_RA3) || \
  4893. defined(TARGET_IS_TM4C123_RB1) || \
  4894. defined(TARGET_IS_TM4C129_RA0) || \
  4895. defined(TARGET_IS_TM4C129_RA1)
  4896. #define ROM_SysCtlDelay \
  4897. ((void (*)(uint32_t ui32Count))ROM_SYSCTLTABLE[34])
  4898. #endif
  4899. #if defined(TARGET_IS_TM4C123_RA1) || \
  4900. defined(TARGET_IS_TM4C123_RA3) || \
  4901. defined(TARGET_IS_TM4C123_RB1) || \
  4902. defined(TARGET_IS_TM4C129_RA0) || \
  4903. defined(TARGET_IS_TM4C129_RA1)
  4904. #define ROM_SysCtlPeripheralReady \
  4905. ((bool (*)(uint32_t ui32Peripheral))ROM_SYSCTLTABLE[35])
  4906. #endif
  4907. #if defined(TARGET_IS_TM4C123_RA1) || \
  4908. defined(TARGET_IS_TM4C123_RA3) || \
  4909. defined(TARGET_IS_TM4C123_RB1) || \
  4910. defined(TARGET_IS_TM4C129_RA0) || \
  4911. defined(TARGET_IS_TM4C129_RA1)
  4912. #define ROM_SysCtlPeripheralPowerOn \
  4913. ((void (*)(uint32_t ui32Peripheral))ROM_SYSCTLTABLE[36])
  4914. #endif
  4915. #if defined(TARGET_IS_TM4C123_RA1) || \
  4916. defined(TARGET_IS_TM4C123_RA3) || \
  4917. defined(TARGET_IS_TM4C123_RB1) || \
  4918. defined(TARGET_IS_TM4C129_RA0) || \
  4919. defined(TARGET_IS_TM4C129_RA1)
  4920. #define ROM_SysCtlPeripheralPowerOff \
  4921. ((void (*)(uint32_t ui32Peripheral))ROM_SYSCTLTABLE[37])
  4922. #endif
  4923. #if defined(TARGET_IS_TM4C123_RA1) || \
  4924. defined(TARGET_IS_TM4C123_RA3) || \
  4925. defined(TARGET_IS_TM4C123_RB1) || \
  4926. defined(TARGET_IS_TM4C129_RA0) || \
  4927. defined(TARGET_IS_TM4C129_RA1)
  4928. #define ROM_SysCtlMOSCConfigSet \
  4929. ((void (*)(uint32_t ui32Config))ROM_SYSCTLTABLE[44])
  4930. #endif
  4931. #if defined(TARGET_IS_TM4C123_RA1) || \
  4932. defined(TARGET_IS_TM4C123_RA3) || \
  4933. defined(TARGET_IS_TM4C123_RB1) || \
  4934. defined(TARGET_IS_TM4C129_RA0) || \
  4935. defined(TARGET_IS_TM4C129_RA1)
  4936. #define ROM_SysCtlPIOSCCalibrate \
  4937. ((uint32_t (*)(uint32_t ui32Type))ROM_SYSCTLTABLE[45])
  4938. #endif
  4939. #if defined(TARGET_IS_TM4C123_RA1) || \
  4940. defined(TARGET_IS_TM4C123_RA3) || \
  4941. defined(TARGET_IS_TM4C123_RB1)
  4942. #define ROM_SysCtlDeepSleepClockSet \
  4943. ((void (*)(uint32_t ui32Config))ROM_SYSCTLTABLE[46])
  4944. #endif
  4945. #if defined(TARGET_IS_TM4C129_RA0) || \
  4946. defined(TARGET_IS_TM4C129_RA1)
  4947. #define ROM_SysCtlDeepSleepClockConfigSet \
  4948. ((void (*)(uint32_t ui32Div, \
  4949. uint32_t ui32Config))ROM_SYSCTLTABLE[47])
  4950. #endif
  4951. #if defined(TARGET_IS_TM4C129_RA1)
  4952. #define ROM_SysCtlClockFreqSet \
  4953. ((uint32_t (*)(uint32_t ui32Config, \
  4954. uint32_t ui32SysClock))ROM_SYSCTLTABLE[48])
  4955. #endif
  4956. #if defined(TARGET_IS_TM4C129_RA0) || \
  4957. defined(TARGET_IS_TM4C129_RA1)
  4958. #define ROM_SysCtlResetBehaviorSet \
  4959. ((void (*)(uint32_t ui32Behavior))ROM_SYSCTLTABLE[51])
  4960. #endif
  4961. #if defined(TARGET_IS_TM4C129_RA0) || \
  4962. defined(TARGET_IS_TM4C129_RA1)
  4963. #define ROM_SysCtlResetBehaviorGet \
  4964. ((uint32_t (*)(void))ROM_SYSCTLTABLE[52])
  4965. #endif
  4966. #if defined(TARGET_IS_TM4C129_RA0) || \
  4967. defined(TARGET_IS_TM4C129_RA1)
  4968. #define ROM_SysCtlFlashSectorSizeGet \
  4969. ((uint32_t (*)(void))ROM_SYSCTLTABLE[54])
  4970. #endif
  4971. #if defined(TARGET_IS_TM4C123_RB1) || \
  4972. defined(TARGET_IS_TM4C129_RA0) || \
  4973. defined(TARGET_IS_TM4C129_RA1)
  4974. #define ROM_SysCtlVoltageEventConfig \
  4975. ((void (*)(uint32_t ui32Config))ROM_SYSCTLTABLE[55])
  4976. #endif
  4977. #if defined(TARGET_IS_TM4C129_RA0) || \
  4978. defined(TARGET_IS_TM4C129_RA1)
  4979. #define ROM_SysCtlVoltageEventStatus \
  4980. ((uint32_t (*)(void))ROM_SYSCTLTABLE[56])
  4981. #endif
  4982. #if defined(TARGET_IS_TM4C129_RA0) || \
  4983. defined(TARGET_IS_TM4C129_RA1)
  4984. #define ROM_SysCtlVoltageEventClear \
  4985. ((void (*)(uint32_t ui32Status))ROM_SYSCTLTABLE[57])
  4986. #endif
  4987. #if defined(TARGET_IS_TM4C129_RA0) || \
  4988. defined(TARGET_IS_TM4C129_RA1)
  4989. #define ROM_SysCtlNMIStatus \
  4990. ((uint32_t (*)(void))ROM_SYSCTLTABLE[58])
  4991. #endif
  4992. #if defined(TARGET_IS_TM4C129_RA0) || \
  4993. defined(TARGET_IS_TM4C129_RA1)
  4994. #define ROM_SysCtlNMIClear \
  4995. ((void (*)(uint32_t ui32Status))ROM_SYSCTLTABLE[59])
  4996. #endif
  4997. #if defined(TARGET_IS_TM4C129_RA0) || \
  4998. defined(TARGET_IS_TM4C129_RA1)
  4999. #define ROM_SysCtlClockOutConfig \
  5000. ((void (*)(uint32_t ui32Config, \
  5001. uint32_t ui32Div))ROM_SYSCTLTABLE[60])
  5002. #endif
  5003. #if defined(TARGET_IS_TM4C129_RA0) || \
  5004. defined(TARGET_IS_TM4C129_RA1)
  5005. #define ROM_SysCtlAltClkConfig \
  5006. ((void (*)(uint32_t ui32Config))ROM_SYSCTLTABLE[61])
  5007. #endif
  5008. //*****************************************************************************
  5009. //
  5010. // Macros for calling ROM functions in the SysExc API.
  5011. //
  5012. //*****************************************************************************
  5013. #if defined(TARGET_IS_TM4C123_RA1) || \
  5014. defined(TARGET_IS_TM4C123_RA3) || \
  5015. defined(TARGET_IS_TM4C123_RB1) || \
  5016. defined(TARGET_IS_TM4C129_RA0) || \
  5017. defined(TARGET_IS_TM4C129_RA1)
  5018. #define ROM_SysExcIntStatus \
  5019. ((uint32_t (*)(bool bMasked))ROM_SYSEXCTABLE[0])
  5020. #endif
  5021. #if defined(TARGET_IS_TM4C123_RA1) || \
  5022. defined(TARGET_IS_TM4C123_RA3) || \
  5023. defined(TARGET_IS_TM4C123_RB1) || \
  5024. defined(TARGET_IS_TM4C129_RA0) || \
  5025. defined(TARGET_IS_TM4C129_RA1)
  5026. #define ROM_SysExcIntClear \
  5027. ((void (*)(uint32_t ui32IntFlags))ROM_SYSEXCTABLE[1])
  5028. #endif
  5029. #if defined(TARGET_IS_TM4C123_RA1) || \
  5030. defined(TARGET_IS_TM4C123_RA3) || \
  5031. defined(TARGET_IS_TM4C123_RB1) || \
  5032. defined(TARGET_IS_TM4C129_RA0) || \
  5033. defined(TARGET_IS_TM4C129_RA1)
  5034. #define ROM_SysExcIntDisable \
  5035. ((void (*)(uint32_t ui32IntFlags))ROM_SYSEXCTABLE[2])
  5036. #endif
  5037. #if defined(TARGET_IS_TM4C123_RA1) || \
  5038. defined(TARGET_IS_TM4C123_RA3) || \
  5039. defined(TARGET_IS_TM4C123_RB1) || \
  5040. defined(TARGET_IS_TM4C129_RA0) || \
  5041. defined(TARGET_IS_TM4C129_RA1)
  5042. #define ROM_SysExcIntEnable \
  5043. ((void (*)(uint32_t ui32IntFlags))ROM_SYSEXCTABLE[3])
  5044. #endif
  5045. //*****************************************************************************
  5046. //
  5047. // Macros for calling ROM functions in the SysTick API.
  5048. //
  5049. //*****************************************************************************
  5050. #if defined(TARGET_IS_TM4C123_RA1) || \
  5051. defined(TARGET_IS_TM4C123_RA3) || \
  5052. defined(TARGET_IS_TM4C123_RB1) || \
  5053. defined(TARGET_IS_TM4C129_RA0) || \
  5054. defined(TARGET_IS_TM4C129_RA1)
  5055. #define ROM_SysTickValueGet \
  5056. ((uint32_t (*)(void))ROM_SYSTICKTABLE[0])
  5057. #endif
  5058. #if defined(TARGET_IS_TM4C123_RA1) || \
  5059. defined(TARGET_IS_TM4C123_RA3) || \
  5060. defined(TARGET_IS_TM4C123_RB1) || \
  5061. defined(TARGET_IS_TM4C129_RA0) || \
  5062. defined(TARGET_IS_TM4C129_RA1)
  5063. #define ROM_SysTickEnable \
  5064. ((void (*)(void))ROM_SYSTICKTABLE[1])
  5065. #endif
  5066. #if defined(TARGET_IS_TM4C123_RA1) || \
  5067. defined(TARGET_IS_TM4C123_RA3) || \
  5068. defined(TARGET_IS_TM4C123_RB1) || \
  5069. defined(TARGET_IS_TM4C129_RA0) || \
  5070. defined(TARGET_IS_TM4C129_RA1)
  5071. #define ROM_SysTickDisable \
  5072. ((void (*)(void))ROM_SYSTICKTABLE[2])
  5073. #endif
  5074. #if defined(TARGET_IS_TM4C123_RA1) || \
  5075. defined(TARGET_IS_TM4C123_RA3) || \
  5076. defined(TARGET_IS_TM4C123_RB1) || \
  5077. defined(TARGET_IS_TM4C129_RA0) || \
  5078. defined(TARGET_IS_TM4C129_RA1)
  5079. #define ROM_SysTickIntEnable \
  5080. ((void (*)(void))ROM_SYSTICKTABLE[3])
  5081. #endif
  5082. #if defined(TARGET_IS_TM4C123_RA1) || \
  5083. defined(TARGET_IS_TM4C123_RA3) || \
  5084. defined(TARGET_IS_TM4C123_RB1) || \
  5085. defined(TARGET_IS_TM4C129_RA0) || \
  5086. defined(TARGET_IS_TM4C129_RA1)
  5087. #define ROM_SysTickIntDisable \
  5088. ((void (*)(void))ROM_SYSTICKTABLE[4])
  5089. #endif
  5090. #if defined(TARGET_IS_TM4C123_RA1) || \
  5091. defined(TARGET_IS_TM4C123_RA3) || \
  5092. defined(TARGET_IS_TM4C123_RB1) || \
  5093. defined(TARGET_IS_TM4C129_RA0) || \
  5094. defined(TARGET_IS_TM4C129_RA1)
  5095. #define ROM_SysTickPeriodSet \
  5096. ((void (*)(uint32_t ui32Period))ROM_SYSTICKTABLE[5])
  5097. #endif
  5098. #if defined(TARGET_IS_TM4C123_RA1) || \
  5099. defined(TARGET_IS_TM4C123_RA3) || \
  5100. defined(TARGET_IS_TM4C123_RB1) || \
  5101. defined(TARGET_IS_TM4C129_RA0) || \
  5102. defined(TARGET_IS_TM4C129_RA1)
  5103. #define ROM_SysTickPeriodGet \
  5104. ((uint32_t (*)(void))ROM_SYSTICKTABLE[6])
  5105. #endif
  5106. //*****************************************************************************
  5107. //
  5108. // Macros for calling ROM functions in the Timer API.
  5109. //
  5110. //*****************************************************************************
  5111. #if defined(TARGET_IS_TM4C123_RA1) || \
  5112. defined(TARGET_IS_TM4C123_RA3) || \
  5113. defined(TARGET_IS_TM4C123_RB1) || \
  5114. defined(TARGET_IS_TM4C129_RA0) || \
  5115. defined(TARGET_IS_TM4C129_RA1)
  5116. #define ROM_TimerIntClear \
  5117. ((void (*)(uint32_t ui32Base, \
  5118. uint32_t ui32IntFlags))ROM_TIMERTABLE[0])
  5119. #endif
  5120. #if defined(TARGET_IS_TM4C123_RA1) || \
  5121. defined(TARGET_IS_TM4C123_RA3) || \
  5122. defined(TARGET_IS_TM4C123_RB1) || \
  5123. defined(TARGET_IS_TM4C129_RA0) || \
  5124. defined(TARGET_IS_TM4C129_RA1)
  5125. #define ROM_TimerEnable \
  5126. ((void (*)(uint32_t ui32Base, \
  5127. uint32_t ui32Timer))ROM_TIMERTABLE[1])
  5128. #endif
  5129. #if defined(TARGET_IS_TM4C123_RA1) || \
  5130. defined(TARGET_IS_TM4C123_RA3) || \
  5131. defined(TARGET_IS_TM4C123_RB1) || \
  5132. defined(TARGET_IS_TM4C129_RA0) || \
  5133. defined(TARGET_IS_TM4C129_RA1)
  5134. #define ROM_TimerDisable \
  5135. ((void (*)(uint32_t ui32Base, \
  5136. uint32_t ui32Timer))ROM_TIMERTABLE[2])
  5137. #endif
  5138. #if defined(TARGET_IS_TM4C123_RA1) || \
  5139. defined(TARGET_IS_TM4C123_RA3) || \
  5140. defined(TARGET_IS_TM4C123_RB1) || \
  5141. defined(TARGET_IS_TM4C129_RA0) || \
  5142. defined(TARGET_IS_TM4C129_RA1)
  5143. #define ROM_TimerConfigure \
  5144. ((void (*)(uint32_t ui32Base, \
  5145. uint32_t ui32Config))ROM_TIMERTABLE[3])
  5146. #endif
  5147. #if defined(TARGET_IS_TM4C123_RA1) || \
  5148. defined(TARGET_IS_TM4C123_RA3) || \
  5149. defined(TARGET_IS_TM4C123_RB1) || \
  5150. defined(TARGET_IS_TM4C129_RA0) || \
  5151. defined(TARGET_IS_TM4C129_RA1)
  5152. #define ROM_TimerControlLevel \
  5153. ((void (*)(uint32_t ui32Base, \
  5154. uint32_t ui32Timer, \
  5155. bool bInvert))ROM_TIMERTABLE[4])
  5156. #endif
  5157. #if defined(TARGET_IS_TM4C123_RA1) || \
  5158. defined(TARGET_IS_TM4C123_RA3) || \
  5159. defined(TARGET_IS_TM4C123_RB1) || \
  5160. defined(TARGET_IS_TM4C129_RA1)
  5161. #define ROM_TimerControlTrigger \
  5162. ((void (*)(uint32_t ui32Base, \
  5163. uint32_t ui32Timer, \
  5164. bool bEnable))ROM_TIMERTABLE[5])
  5165. #endif
  5166. #if defined(TARGET_IS_TM4C123_RA1) || \
  5167. defined(TARGET_IS_TM4C123_RA3) || \
  5168. defined(TARGET_IS_TM4C123_RB1) || \
  5169. defined(TARGET_IS_TM4C129_RA0) || \
  5170. defined(TARGET_IS_TM4C129_RA1)
  5171. #define ROM_TimerControlEvent \
  5172. ((void (*)(uint32_t ui32Base, \
  5173. uint32_t ui32Timer, \
  5174. uint32_t ui32Event))ROM_TIMERTABLE[6])
  5175. #endif
  5176. #if defined(TARGET_IS_TM4C123_RA1) || \
  5177. defined(TARGET_IS_TM4C123_RA3) || \
  5178. defined(TARGET_IS_TM4C123_RB1) || \
  5179. defined(TARGET_IS_TM4C129_RA0) || \
  5180. defined(TARGET_IS_TM4C129_RA1)
  5181. #define ROM_TimerControlStall \
  5182. ((void (*)(uint32_t ui32Base, \
  5183. uint32_t ui32Timer, \
  5184. bool bStall))ROM_TIMERTABLE[7])
  5185. #endif
  5186. #if defined(TARGET_IS_TM4C123_RA1) || \
  5187. defined(TARGET_IS_TM4C123_RA3) || \
  5188. defined(TARGET_IS_TM4C123_RB1) || \
  5189. defined(TARGET_IS_TM4C129_RA0) || \
  5190. defined(TARGET_IS_TM4C129_RA1)
  5191. #define ROM_TimerRTCEnable \
  5192. ((void (*)(uint32_t ui32Base))ROM_TIMERTABLE[8])
  5193. #endif
  5194. #if defined(TARGET_IS_TM4C123_RA1) || \
  5195. defined(TARGET_IS_TM4C123_RA3) || \
  5196. defined(TARGET_IS_TM4C123_RB1) || \
  5197. defined(TARGET_IS_TM4C129_RA0) || \
  5198. defined(TARGET_IS_TM4C129_RA1)
  5199. #define ROM_TimerRTCDisable \
  5200. ((void (*)(uint32_t ui32Base))ROM_TIMERTABLE[9])
  5201. #endif
  5202. #if defined(TARGET_IS_TM4C123_RA1) || \
  5203. defined(TARGET_IS_TM4C123_RA3) || \
  5204. defined(TARGET_IS_TM4C123_RB1) || \
  5205. defined(TARGET_IS_TM4C129_RA0) || \
  5206. defined(TARGET_IS_TM4C129_RA1)
  5207. #define ROM_TimerPrescaleSet \
  5208. ((void (*)(uint32_t ui32Base, \
  5209. uint32_t ui32Timer, \
  5210. uint32_t ui32Value))ROM_TIMERTABLE[10])
  5211. #endif
  5212. #if defined(TARGET_IS_TM4C123_RA1) || \
  5213. defined(TARGET_IS_TM4C123_RA3) || \
  5214. defined(TARGET_IS_TM4C123_RB1) || \
  5215. defined(TARGET_IS_TM4C129_RA0) || \
  5216. defined(TARGET_IS_TM4C129_RA1)
  5217. #define ROM_TimerPrescaleGet \
  5218. ((uint32_t (*)(uint32_t ui32Base, \
  5219. uint32_t ui32Timer))ROM_TIMERTABLE[11])
  5220. #endif
  5221. #if defined(TARGET_IS_TM4C123_RA1) || \
  5222. defined(TARGET_IS_TM4C123_RA3) || \
  5223. defined(TARGET_IS_TM4C123_RB1) || \
  5224. defined(TARGET_IS_TM4C129_RA0) || \
  5225. defined(TARGET_IS_TM4C129_RA1)
  5226. #define ROM_TimerPrescaleMatchSet \
  5227. ((void (*)(uint32_t ui32Base, \
  5228. uint32_t ui32Timer, \
  5229. uint32_t ui32Value))ROM_TIMERTABLE[12])
  5230. #endif
  5231. #if defined(TARGET_IS_TM4C123_RA1) || \
  5232. defined(TARGET_IS_TM4C123_RA3) || \
  5233. defined(TARGET_IS_TM4C123_RB1) || \
  5234. defined(TARGET_IS_TM4C129_RA0) || \
  5235. defined(TARGET_IS_TM4C129_RA1)
  5236. #define ROM_TimerPrescaleMatchGet \
  5237. ((uint32_t (*)(uint32_t ui32Base, \
  5238. uint32_t ui32Timer))ROM_TIMERTABLE[13])
  5239. #endif
  5240. #if defined(TARGET_IS_TM4C123_RA1) || \
  5241. defined(TARGET_IS_TM4C123_RA3) || \
  5242. defined(TARGET_IS_TM4C123_RB1) || \
  5243. defined(TARGET_IS_TM4C129_RA0) || \
  5244. defined(TARGET_IS_TM4C129_RA1)
  5245. #define ROM_TimerLoadSet \
  5246. ((void (*)(uint32_t ui32Base, \
  5247. uint32_t ui32Timer, \
  5248. uint32_t ui32Value))ROM_TIMERTABLE[14])
  5249. #endif
  5250. #if defined(TARGET_IS_TM4C123_RA1) || \
  5251. defined(TARGET_IS_TM4C123_RA3) || \
  5252. defined(TARGET_IS_TM4C123_RB1) || \
  5253. defined(TARGET_IS_TM4C129_RA0) || \
  5254. defined(TARGET_IS_TM4C129_RA1)
  5255. #define ROM_TimerLoadGet \
  5256. ((uint32_t (*)(uint32_t ui32Base, \
  5257. uint32_t ui32Timer))ROM_TIMERTABLE[15])
  5258. #endif
  5259. #if defined(TARGET_IS_TM4C123_RA1) || \
  5260. defined(TARGET_IS_TM4C123_RA3) || \
  5261. defined(TARGET_IS_TM4C123_RB1) || \
  5262. defined(TARGET_IS_TM4C129_RA0) || \
  5263. defined(TARGET_IS_TM4C129_RA1)
  5264. #define ROM_TimerValueGet \
  5265. ((uint32_t (*)(uint32_t ui32Base, \
  5266. uint32_t ui32Timer))ROM_TIMERTABLE[16])
  5267. #endif
  5268. #if defined(TARGET_IS_TM4C123_RA1) || \
  5269. defined(TARGET_IS_TM4C123_RA3) || \
  5270. defined(TARGET_IS_TM4C123_RB1) || \
  5271. defined(TARGET_IS_TM4C129_RA0) || \
  5272. defined(TARGET_IS_TM4C129_RA1)
  5273. #define ROM_TimerMatchSet \
  5274. ((void (*)(uint32_t ui32Base, \
  5275. uint32_t ui32Timer, \
  5276. uint32_t ui32Value))ROM_TIMERTABLE[17])
  5277. #endif
  5278. #if defined(TARGET_IS_TM4C123_RA1) || \
  5279. defined(TARGET_IS_TM4C123_RA3) || \
  5280. defined(TARGET_IS_TM4C123_RB1) || \
  5281. defined(TARGET_IS_TM4C129_RA0) || \
  5282. defined(TARGET_IS_TM4C129_RA1)
  5283. #define ROM_TimerMatchGet \
  5284. ((uint32_t (*)(uint32_t ui32Base, \
  5285. uint32_t ui32Timer))ROM_TIMERTABLE[18])
  5286. #endif
  5287. #if defined(TARGET_IS_TM4C123_RA1) || \
  5288. defined(TARGET_IS_TM4C123_RA3) || \
  5289. defined(TARGET_IS_TM4C123_RB1) || \
  5290. defined(TARGET_IS_TM4C129_RA0) || \
  5291. defined(TARGET_IS_TM4C129_RA1)
  5292. #define ROM_TimerIntEnable \
  5293. ((void (*)(uint32_t ui32Base, \
  5294. uint32_t ui32IntFlags))ROM_TIMERTABLE[19])
  5295. #endif
  5296. #if defined(TARGET_IS_TM4C123_RA1) || \
  5297. defined(TARGET_IS_TM4C123_RA3) || \
  5298. defined(TARGET_IS_TM4C123_RB1) || \
  5299. defined(TARGET_IS_TM4C129_RA0) || \
  5300. defined(TARGET_IS_TM4C129_RA1)
  5301. #define ROM_TimerIntDisable \
  5302. ((void (*)(uint32_t ui32Base, \
  5303. uint32_t ui32IntFlags))ROM_TIMERTABLE[20])
  5304. #endif
  5305. #if defined(TARGET_IS_TM4C123_RA1) || \
  5306. defined(TARGET_IS_TM4C123_RA3) || \
  5307. defined(TARGET_IS_TM4C123_RB1) || \
  5308. defined(TARGET_IS_TM4C129_RA0) || \
  5309. defined(TARGET_IS_TM4C129_RA1)
  5310. #define ROM_TimerIntStatus \
  5311. ((uint32_t (*)(uint32_t ui32Base, \
  5312. bool bMasked))ROM_TIMERTABLE[21])
  5313. #endif
  5314. #if defined(TARGET_IS_TM4C123_RA1) || \
  5315. defined(TARGET_IS_TM4C123_RA3) || \
  5316. defined(TARGET_IS_TM4C123_RB1) || \
  5317. defined(TARGET_IS_TM4C129_RA0) || \
  5318. defined(TARGET_IS_TM4C129_RA1)
  5319. #define ROM_TimerControlWaitOnTrigger \
  5320. ((void (*)(uint32_t ui32Base, \
  5321. uint32_t ui32Timer, \
  5322. bool bWait))ROM_TIMERTABLE[22])
  5323. #endif
  5324. #if defined(TARGET_IS_TM4C123_RA1) || \
  5325. defined(TARGET_IS_TM4C123_RA3) || \
  5326. defined(TARGET_IS_TM4C123_RB1)
  5327. #define ROM_TimerLoadSet64 \
  5328. ((void (*)(uint32_t ui32Base, \
  5329. uint64_t ui64Value))ROM_TIMERTABLE[23])
  5330. #endif
  5331. #if defined(TARGET_IS_TM4C123_RA1) || \
  5332. defined(TARGET_IS_TM4C123_RA3) || \
  5333. defined(TARGET_IS_TM4C123_RB1)
  5334. #define ROM_TimerLoadGet64 \
  5335. ((uint64_t (*)(uint32_t ui32Base))ROM_TIMERTABLE[24])
  5336. #endif
  5337. #if defined(TARGET_IS_TM4C123_RA1) || \
  5338. defined(TARGET_IS_TM4C123_RA3) || \
  5339. defined(TARGET_IS_TM4C123_RB1)
  5340. #define ROM_TimerValueGet64 \
  5341. ((uint64_t (*)(uint32_t ui32Base))ROM_TIMERTABLE[25])
  5342. #endif
  5343. #if defined(TARGET_IS_TM4C123_RA1) || \
  5344. defined(TARGET_IS_TM4C123_RA3) || \
  5345. defined(TARGET_IS_TM4C123_RB1)
  5346. #define ROM_TimerMatchSet64 \
  5347. ((void (*)(uint32_t ui32Base, \
  5348. uint64_t ui64Value))ROM_TIMERTABLE[26])
  5349. #endif
  5350. #if defined(TARGET_IS_TM4C123_RA1) || \
  5351. defined(TARGET_IS_TM4C123_RA3) || \
  5352. defined(TARGET_IS_TM4C123_RB1)
  5353. #define ROM_TimerMatchGet64 \
  5354. ((uint64_t (*)(uint32_t ui32Base))ROM_TIMERTABLE[27])
  5355. #endif
  5356. #if defined(TARGET_IS_TM4C129_RA0) || \
  5357. defined(TARGET_IS_TM4C129_RA1)
  5358. #define ROM_TimerClockSourceGet \
  5359. ((uint32_t (*)(uint32_t ui32Base))ROM_TIMERTABLE[28])
  5360. #endif
  5361. #if defined(TARGET_IS_TM4C129_RA0) || \
  5362. defined(TARGET_IS_TM4C129_RA1)
  5363. #define ROM_TimerClockSourceSet \
  5364. ((void (*)(uint32_t ui32Base, \
  5365. uint32_t ui32Source))ROM_TIMERTABLE[29])
  5366. #endif
  5367. #if defined(TARGET_IS_TM4C129_RA0) || \
  5368. defined(TARGET_IS_TM4C129_RA1)
  5369. #define ROM_TimerADCEventGet \
  5370. ((uint32_t (*)(uint32_t ui32Base))ROM_TIMERTABLE[30])
  5371. #endif
  5372. #if defined(TARGET_IS_TM4C129_RA0) || \
  5373. defined(TARGET_IS_TM4C129_RA1)
  5374. #define ROM_TimerADCEventSet \
  5375. ((void (*)(uint32_t ui32Base, \
  5376. uint32_t ui32ADCEvent))ROM_TIMERTABLE[31])
  5377. #endif
  5378. #if defined(TARGET_IS_TM4C129_RA0) || \
  5379. defined(TARGET_IS_TM4C129_RA1)
  5380. #define ROM_TimerDMAEventGet \
  5381. ((uint32_t (*)(uint32_t ui32Base))ROM_TIMERTABLE[32])
  5382. #endif
  5383. #if defined(TARGET_IS_TM4C129_RA0) || \
  5384. defined(TARGET_IS_TM4C129_RA1)
  5385. #define ROM_TimerDMAEventSet \
  5386. ((void (*)(uint32_t ui32Base, \
  5387. uint32_t ui32DMAEvent))ROM_TIMERTABLE[33])
  5388. #endif
  5389. #if defined(TARGET_IS_TM4C129_RA0) || \
  5390. defined(TARGET_IS_TM4C129_RA1)
  5391. #define ROM_TimerSynchronize \
  5392. ((void (*)(uint32_t ui32Base, \
  5393. uint32_t ui32Timers))ROM_TIMERTABLE[34])
  5394. #endif
  5395. //*****************************************************************************
  5396. //
  5397. // Macros for calling ROM functions in the UART API.
  5398. //
  5399. //*****************************************************************************
  5400. #if defined(TARGET_IS_TM4C123_RA1) || \
  5401. defined(TARGET_IS_TM4C123_RA3) || \
  5402. defined(TARGET_IS_TM4C123_RB1) || \
  5403. defined(TARGET_IS_TM4C129_RA0) || \
  5404. defined(TARGET_IS_TM4C129_RA1)
  5405. #define ROM_UARTCharPut \
  5406. ((void (*)(uint32_t ui32Base, \
  5407. unsigned char ucData))ROM_UARTTABLE[0])
  5408. #endif
  5409. #if defined(TARGET_IS_TM4C123_RA1) || \
  5410. defined(TARGET_IS_TM4C123_RA3) || \
  5411. defined(TARGET_IS_TM4C123_RB1) || \
  5412. defined(TARGET_IS_TM4C129_RA0) || \
  5413. defined(TARGET_IS_TM4C129_RA1)
  5414. #define ROM_UARTParityModeSet \
  5415. ((void (*)(uint32_t ui32Base, \
  5416. uint32_t ui32Parity))ROM_UARTTABLE[1])
  5417. #endif
  5418. #if defined(TARGET_IS_TM4C123_RA1) || \
  5419. defined(TARGET_IS_TM4C123_RA3) || \
  5420. defined(TARGET_IS_TM4C123_RB1) || \
  5421. defined(TARGET_IS_TM4C129_RA0) || \
  5422. defined(TARGET_IS_TM4C129_RA1)
  5423. #define ROM_UARTParityModeGet \
  5424. ((uint32_t (*)(uint32_t ui32Base))ROM_UARTTABLE[2])
  5425. #endif
  5426. #if defined(TARGET_IS_TM4C123_RA1) || \
  5427. defined(TARGET_IS_TM4C123_RA3) || \
  5428. defined(TARGET_IS_TM4C123_RB1) || \
  5429. defined(TARGET_IS_TM4C129_RA0) || \
  5430. defined(TARGET_IS_TM4C129_RA1)
  5431. #define ROM_UARTFIFOLevelSet \
  5432. ((void (*)(uint32_t ui32Base, \
  5433. uint32_t ui32TxLevel, \
  5434. uint32_t ui32RxLevel))ROM_UARTTABLE[3])
  5435. #endif
  5436. #if defined(TARGET_IS_TM4C123_RA1) || \
  5437. defined(TARGET_IS_TM4C123_RA3) || \
  5438. defined(TARGET_IS_TM4C123_RB1) || \
  5439. defined(TARGET_IS_TM4C129_RA0) || \
  5440. defined(TARGET_IS_TM4C129_RA1)
  5441. #define ROM_UARTFIFOLevelGet \
  5442. ((void (*)(uint32_t ui32Base, \
  5443. uint32_t *pui32TxLevel, \
  5444. uint32_t *pui32RxLevel))ROM_UARTTABLE[4])
  5445. #endif
  5446. #if defined(TARGET_IS_TM4C123_RA1) || \
  5447. defined(TARGET_IS_TM4C123_RA3) || \
  5448. defined(TARGET_IS_TM4C123_RB1) || \
  5449. defined(TARGET_IS_TM4C129_RA0) || \
  5450. defined(TARGET_IS_TM4C129_RA1)
  5451. #define ROM_UARTConfigSetExpClk \
  5452. ((void (*)(uint32_t ui32Base, \
  5453. uint32_t ui32UARTClk, \
  5454. uint32_t ui32Baud, \
  5455. uint32_t ui32Config))ROM_UARTTABLE[5])
  5456. #endif
  5457. #if defined(TARGET_IS_TM4C123_RA1) || \
  5458. defined(TARGET_IS_TM4C123_RA3) || \
  5459. defined(TARGET_IS_TM4C123_RB1) || \
  5460. defined(TARGET_IS_TM4C129_RA0) || \
  5461. defined(TARGET_IS_TM4C129_RA1)
  5462. #define ROM_UARTConfigGetExpClk \
  5463. ((void (*)(uint32_t ui32Base, \
  5464. uint32_t ui32UARTClk, \
  5465. uint32_t *pui32Baud, \
  5466. uint32_t *pui32Config))ROM_UARTTABLE[6])
  5467. #endif
  5468. #if defined(TARGET_IS_TM4C123_RA1) || \
  5469. defined(TARGET_IS_TM4C123_RA3) || \
  5470. defined(TARGET_IS_TM4C123_RB1) || \
  5471. defined(TARGET_IS_TM4C129_RA0) || \
  5472. defined(TARGET_IS_TM4C129_RA1)
  5473. #define ROM_UARTEnable \
  5474. ((void (*)(uint32_t ui32Base))ROM_UARTTABLE[7])
  5475. #endif
  5476. #if defined(TARGET_IS_TM4C123_RA1) || \
  5477. defined(TARGET_IS_TM4C123_RA3) || \
  5478. defined(TARGET_IS_TM4C123_RB1) || \
  5479. defined(TARGET_IS_TM4C129_RA0) || \
  5480. defined(TARGET_IS_TM4C129_RA1)
  5481. #define ROM_UARTDisable \
  5482. ((void (*)(uint32_t ui32Base))ROM_UARTTABLE[8])
  5483. #endif
  5484. #if defined(TARGET_IS_TM4C123_RA1) || \
  5485. defined(TARGET_IS_TM4C123_RA3) || \
  5486. defined(TARGET_IS_TM4C123_RB1) || \
  5487. defined(TARGET_IS_TM4C129_RA0) || \
  5488. defined(TARGET_IS_TM4C129_RA1)
  5489. #define ROM_UARTEnableSIR \
  5490. ((void (*)(uint32_t ui32Base, \
  5491. bool bLowPower))ROM_UARTTABLE[9])
  5492. #endif
  5493. #if defined(TARGET_IS_TM4C123_RA1) || \
  5494. defined(TARGET_IS_TM4C123_RA3) || \
  5495. defined(TARGET_IS_TM4C123_RB1) || \
  5496. defined(TARGET_IS_TM4C129_RA0) || \
  5497. defined(TARGET_IS_TM4C129_RA1)
  5498. #define ROM_UARTDisableSIR \
  5499. ((void (*)(uint32_t ui32Base))ROM_UARTTABLE[10])
  5500. #endif
  5501. #if defined(TARGET_IS_TM4C123_RA1) || \
  5502. defined(TARGET_IS_TM4C123_RA3) || \
  5503. defined(TARGET_IS_TM4C123_RB1) || \
  5504. defined(TARGET_IS_TM4C129_RA0) || \
  5505. defined(TARGET_IS_TM4C129_RA1)
  5506. #define ROM_UARTCharsAvail \
  5507. ((bool (*)(uint32_t ui32Base))ROM_UARTTABLE[11])
  5508. #endif
  5509. #if defined(TARGET_IS_TM4C123_RA1) || \
  5510. defined(TARGET_IS_TM4C123_RA3) || \
  5511. defined(TARGET_IS_TM4C123_RB1) || \
  5512. defined(TARGET_IS_TM4C129_RA0) || \
  5513. defined(TARGET_IS_TM4C129_RA1)
  5514. #define ROM_UARTSpaceAvail \
  5515. ((bool (*)(uint32_t ui32Base))ROM_UARTTABLE[12])
  5516. #endif
  5517. #if defined(TARGET_IS_TM4C123_RA1) || \
  5518. defined(TARGET_IS_TM4C123_RA3) || \
  5519. defined(TARGET_IS_TM4C123_RB1) || \
  5520. defined(TARGET_IS_TM4C129_RA0) || \
  5521. defined(TARGET_IS_TM4C129_RA1)
  5522. #define ROM_UARTCharGetNonBlocking \
  5523. ((int32_t (*)(uint32_t ui32Base))ROM_UARTTABLE[13])
  5524. #endif
  5525. #if defined(TARGET_IS_TM4C123_RA1) || \
  5526. defined(TARGET_IS_TM4C123_RA3) || \
  5527. defined(TARGET_IS_TM4C123_RB1) || \
  5528. defined(TARGET_IS_TM4C129_RA0) || \
  5529. defined(TARGET_IS_TM4C129_RA1)
  5530. #define ROM_UARTCharGet \
  5531. ((int32_t (*)(uint32_t ui32Base))ROM_UARTTABLE[14])
  5532. #endif
  5533. #if defined(TARGET_IS_TM4C123_RA1) || \
  5534. defined(TARGET_IS_TM4C123_RA3) || \
  5535. defined(TARGET_IS_TM4C123_RB1) || \
  5536. defined(TARGET_IS_TM4C129_RA0) || \
  5537. defined(TARGET_IS_TM4C129_RA1)
  5538. #define ROM_UARTCharPutNonBlocking \
  5539. ((bool (*)(uint32_t ui32Base, \
  5540. unsigned char ucData))ROM_UARTTABLE[15])
  5541. #endif
  5542. #if defined(TARGET_IS_TM4C123_RA1) || \
  5543. defined(TARGET_IS_TM4C123_RA3) || \
  5544. defined(TARGET_IS_TM4C123_RB1) || \
  5545. defined(TARGET_IS_TM4C129_RA0) || \
  5546. defined(TARGET_IS_TM4C129_RA1)
  5547. #define ROM_UARTBreakCtl \
  5548. ((void (*)(uint32_t ui32Base, \
  5549. bool bBreakState))ROM_UARTTABLE[16])
  5550. #endif
  5551. #if defined(TARGET_IS_TM4C123_RA1) || \
  5552. defined(TARGET_IS_TM4C123_RA3) || \
  5553. defined(TARGET_IS_TM4C123_RB1) || \
  5554. defined(TARGET_IS_TM4C129_RA0) || \
  5555. defined(TARGET_IS_TM4C129_RA1)
  5556. #define ROM_UARTIntEnable \
  5557. ((void (*)(uint32_t ui32Base, \
  5558. uint32_t ui32IntFlags))ROM_UARTTABLE[17])
  5559. #endif
  5560. #if defined(TARGET_IS_TM4C123_RA1) || \
  5561. defined(TARGET_IS_TM4C123_RA3) || \
  5562. defined(TARGET_IS_TM4C123_RB1) || \
  5563. defined(TARGET_IS_TM4C129_RA0) || \
  5564. defined(TARGET_IS_TM4C129_RA1)
  5565. #define ROM_UARTIntDisable \
  5566. ((void (*)(uint32_t ui32Base, \
  5567. uint32_t ui32IntFlags))ROM_UARTTABLE[18])
  5568. #endif
  5569. #if defined(TARGET_IS_TM4C123_RA1) || \
  5570. defined(TARGET_IS_TM4C123_RA3) || \
  5571. defined(TARGET_IS_TM4C123_RB1) || \
  5572. defined(TARGET_IS_TM4C129_RA0) || \
  5573. defined(TARGET_IS_TM4C129_RA1)
  5574. #define ROM_UARTIntStatus \
  5575. ((uint32_t (*)(uint32_t ui32Base, \
  5576. bool bMasked))ROM_UARTTABLE[19])
  5577. #endif
  5578. #if defined(TARGET_IS_TM4C123_RA1) || \
  5579. defined(TARGET_IS_TM4C123_RA3) || \
  5580. defined(TARGET_IS_TM4C123_RB1) || \
  5581. defined(TARGET_IS_TM4C129_RA0) || \
  5582. defined(TARGET_IS_TM4C129_RA1)
  5583. #define ROM_UARTIntClear \
  5584. ((void (*)(uint32_t ui32Base, \
  5585. uint32_t ui32IntFlags))ROM_UARTTABLE[20])
  5586. #endif
  5587. #if defined(TARGET_IS_TM4C123_RA1) || \
  5588. defined(TARGET_IS_TM4C123_RA3) || \
  5589. defined(TARGET_IS_TM4C123_RB1) || \
  5590. defined(TARGET_IS_TM4C129_RA0) || \
  5591. defined(TARGET_IS_TM4C129_RA1)
  5592. #define ROM_UpdateUART \
  5593. ((void (*)(void))ROM_UARTTABLE[21])
  5594. #endif
  5595. #if defined(TARGET_IS_TM4C123_RA1) || \
  5596. defined(TARGET_IS_TM4C123_RA3) || \
  5597. defined(TARGET_IS_TM4C123_RB1) || \
  5598. defined(TARGET_IS_TM4C129_RA0) || \
  5599. defined(TARGET_IS_TM4C129_RA1)
  5600. #define ROM_UARTDMAEnable \
  5601. ((void (*)(uint32_t ui32Base, \
  5602. uint32_t ui32DMAFlags))ROM_UARTTABLE[22])
  5603. #endif
  5604. #if defined(TARGET_IS_TM4C123_RA1) || \
  5605. defined(TARGET_IS_TM4C123_RA3) || \
  5606. defined(TARGET_IS_TM4C123_RB1) || \
  5607. defined(TARGET_IS_TM4C129_RA0) || \
  5608. defined(TARGET_IS_TM4C129_RA1)
  5609. #define ROM_UARTDMADisable \
  5610. ((void (*)(uint32_t ui32Base, \
  5611. uint32_t ui32DMAFlags))ROM_UARTTABLE[23])
  5612. #endif
  5613. #if defined(TARGET_IS_TM4C123_RA1) || \
  5614. defined(TARGET_IS_TM4C123_RA3) || \
  5615. defined(TARGET_IS_TM4C123_RB1) || \
  5616. defined(TARGET_IS_TM4C129_RA0) || \
  5617. defined(TARGET_IS_TM4C129_RA1)
  5618. #define ROM_UARTFIFOEnable \
  5619. ((void (*)(uint32_t ui32Base))ROM_UARTTABLE[24])
  5620. #endif
  5621. #if defined(TARGET_IS_TM4C123_RA1) || \
  5622. defined(TARGET_IS_TM4C123_RA3) || \
  5623. defined(TARGET_IS_TM4C123_RB1) || \
  5624. defined(TARGET_IS_TM4C129_RA0) || \
  5625. defined(TARGET_IS_TM4C129_RA1)
  5626. #define ROM_UARTFIFODisable \
  5627. ((void (*)(uint32_t ui32Base))ROM_UARTTABLE[25])
  5628. #endif
  5629. #if defined(TARGET_IS_TM4C123_RA1) || \
  5630. defined(TARGET_IS_TM4C123_RA3) || \
  5631. defined(TARGET_IS_TM4C123_RB1) || \
  5632. defined(TARGET_IS_TM4C129_RA0) || \
  5633. defined(TARGET_IS_TM4C129_RA1)
  5634. #define ROM_UARTBusy \
  5635. ((bool (*)(uint32_t ui32Base))ROM_UARTTABLE[26])
  5636. #endif
  5637. #if defined(TARGET_IS_TM4C123_RA1) || \
  5638. defined(TARGET_IS_TM4C123_RA3) || \
  5639. defined(TARGET_IS_TM4C123_RB1) || \
  5640. defined(TARGET_IS_TM4C129_RA0) || \
  5641. defined(TARGET_IS_TM4C129_RA1)
  5642. #define ROM_UARTTxIntModeSet \
  5643. ((void (*)(uint32_t ui32Base, \
  5644. uint32_t ui32Mode))ROM_UARTTABLE[27])
  5645. #endif
  5646. #if defined(TARGET_IS_TM4C123_RA1) || \
  5647. defined(TARGET_IS_TM4C123_RA3) || \
  5648. defined(TARGET_IS_TM4C123_RB1) || \
  5649. defined(TARGET_IS_TM4C129_RA0) || \
  5650. defined(TARGET_IS_TM4C129_RA1)
  5651. #define ROM_UARTTxIntModeGet \
  5652. ((uint32_t (*)(uint32_t ui32Base))ROM_UARTTABLE[28])
  5653. #endif
  5654. #if defined(TARGET_IS_TM4C123_RA1) || \
  5655. defined(TARGET_IS_TM4C123_RA3) || \
  5656. defined(TARGET_IS_TM4C123_RB1) || \
  5657. defined(TARGET_IS_TM4C129_RA0) || \
  5658. defined(TARGET_IS_TM4C129_RA1)
  5659. #define ROM_UARTRxErrorGet \
  5660. ((uint32_t (*)(uint32_t ui32Base))ROM_UARTTABLE[29])
  5661. #endif
  5662. #if defined(TARGET_IS_TM4C123_RA1) || \
  5663. defined(TARGET_IS_TM4C123_RA3) || \
  5664. defined(TARGET_IS_TM4C123_RB1) || \
  5665. defined(TARGET_IS_TM4C129_RA0) || \
  5666. defined(TARGET_IS_TM4C129_RA1)
  5667. #define ROM_UARTRxErrorClear \
  5668. ((void (*)(uint32_t ui32Base))ROM_UARTTABLE[30])
  5669. #endif
  5670. #if defined(TARGET_IS_TM4C123_RA1) || \
  5671. defined(TARGET_IS_TM4C123_RA3) || \
  5672. defined(TARGET_IS_TM4C123_RB1) || \
  5673. defined(TARGET_IS_TM4C129_RA0) || \
  5674. defined(TARGET_IS_TM4C129_RA1)
  5675. #define ROM_UARTClockSourceSet \
  5676. ((void (*)(uint32_t ui32Base, \
  5677. uint32_t ui32Source))ROM_UARTTABLE[31])
  5678. #endif
  5679. #if defined(TARGET_IS_TM4C123_RA1) || \
  5680. defined(TARGET_IS_TM4C123_RA3) || \
  5681. defined(TARGET_IS_TM4C123_RB1) || \
  5682. defined(TARGET_IS_TM4C129_RA0) || \
  5683. defined(TARGET_IS_TM4C129_RA1)
  5684. #define ROM_UARTClockSourceGet \
  5685. ((uint32_t (*)(uint32_t ui32Base))ROM_UARTTABLE[32])
  5686. #endif
  5687. #if defined(TARGET_IS_TM4C123_RA1) || \
  5688. defined(TARGET_IS_TM4C123_RA3) || \
  5689. defined(TARGET_IS_TM4C123_RB1) || \
  5690. defined(TARGET_IS_TM4C129_RA0) || \
  5691. defined(TARGET_IS_TM4C129_RA1)
  5692. #define ROM_UART9BitEnable \
  5693. ((void (*)(uint32_t ui32Base))ROM_UARTTABLE[33])
  5694. #endif
  5695. #if defined(TARGET_IS_TM4C123_RA1) || \
  5696. defined(TARGET_IS_TM4C123_RA3) || \
  5697. defined(TARGET_IS_TM4C123_RB1) || \
  5698. defined(TARGET_IS_TM4C129_RA0) || \
  5699. defined(TARGET_IS_TM4C129_RA1)
  5700. #define ROM_UART9BitDisable \
  5701. ((void (*)(uint32_t ui32Base))ROM_UARTTABLE[34])
  5702. #endif
  5703. #if defined(TARGET_IS_TM4C123_RA1) || \
  5704. defined(TARGET_IS_TM4C123_RA3) || \
  5705. defined(TARGET_IS_TM4C123_RB1) || \
  5706. defined(TARGET_IS_TM4C129_RA0) || \
  5707. defined(TARGET_IS_TM4C129_RA1)
  5708. #define ROM_UART9BitAddrSet \
  5709. ((void (*)(uint32_t ui32Base, \
  5710. uint8_t ui8Addr, \
  5711. uint8_t ui8Mask))ROM_UARTTABLE[35])
  5712. #endif
  5713. #if defined(TARGET_IS_TM4C123_RA1) || \
  5714. defined(TARGET_IS_TM4C123_RA3) || \
  5715. defined(TARGET_IS_TM4C123_RB1) || \
  5716. defined(TARGET_IS_TM4C129_RA0) || \
  5717. defined(TARGET_IS_TM4C129_RA1)
  5718. #define ROM_UART9BitAddrSend \
  5719. ((void (*)(uint32_t ui32Base, \
  5720. uint8_t ui8Addr))ROM_UARTTABLE[36])
  5721. #endif
  5722. #if defined(TARGET_IS_TM4C129_RA0) || \
  5723. defined(TARGET_IS_TM4C129_RA1)
  5724. #define ROM_UARTSmartCardDisable \
  5725. ((void (*)(uint32_t ui32Base))ROM_UARTTABLE[37])
  5726. #endif
  5727. #if defined(TARGET_IS_TM4C129_RA0) || \
  5728. defined(TARGET_IS_TM4C129_RA1)
  5729. #define ROM_UARTSmartCardEnable \
  5730. ((void (*)(uint32_t ui32Base))ROM_UARTTABLE[38])
  5731. #endif
  5732. #if defined(TARGET_IS_TM4C123_RB1) || \
  5733. defined(TARGET_IS_TM4C129_RA0) || \
  5734. defined(TARGET_IS_TM4C129_RA1)
  5735. #define ROM_UARTModemControlClear \
  5736. ((void (*)(uint32_t ui32Base, \
  5737. uint32_t ui32Control))ROM_UARTTABLE[39])
  5738. #endif
  5739. #if defined(TARGET_IS_TM4C129_RA0) || \
  5740. defined(TARGET_IS_TM4C129_RA1)
  5741. #define ROM_UARTModemControlGet \
  5742. ((uint32_t (*)(uint32_t ui32Base))ROM_UARTTABLE[40])
  5743. #endif
  5744. #if defined(TARGET_IS_TM4C129_RA0) || \
  5745. defined(TARGET_IS_TM4C129_RA1)
  5746. #define ROM_UARTModemControlSet \
  5747. ((void (*)(uint32_t ui32Base, \
  5748. uint32_t ui32Control))ROM_UARTTABLE[41])
  5749. #endif
  5750. #if defined(TARGET_IS_TM4C129_RA0) || \
  5751. defined(TARGET_IS_TM4C129_RA1)
  5752. #define ROM_UARTModemStatusGet \
  5753. ((uint32_t (*)(uint32_t ui32Base))ROM_UARTTABLE[42])
  5754. #endif
  5755. #if defined(TARGET_IS_TM4C129_RA0) || \
  5756. defined(TARGET_IS_TM4C129_RA1)
  5757. #define ROM_UARTFlowControlGet \
  5758. ((uint32_t (*)(uint32_t ui32Base))ROM_UARTTABLE[43])
  5759. #endif
  5760. #if defined(TARGET_IS_TM4C129_RA0) || \
  5761. defined(TARGET_IS_TM4C129_RA1)
  5762. #define ROM_UARTFlowControlSet \
  5763. ((void (*)(uint32_t ui32Base, \
  5764. uint32_t ui32Mode))ROM_UARTTABLE[44])
  5765. #endif
  5766. //*****************************************************************************
  5767. //
  5768. // Macros for calling ROM functions in the uDMA API.
  5769. //
  5770. //*****************************************************************************
  5771. #if defined(TARGET_IS_TM4C123_RA1) || \
  5772. defined(TARGET_IS_TM4C123_RA3) || \
  5773. defined(TARGET_IS_TM4C123_RB1) || \
  5774. defined(TARGET_IS_TM4C129_RA0) || \
  5775. defined(TARGET_IS_TM4C129_RA1)
  5776. #define ROM_uDMAChannelTransferSet \
  5777. ((void (*)(uint32_t ui32ChannelStructIndex, \
  5778. uint32_t ui32Mode, \
  5779. void *pvSrcAddr, \
  5780. void *pvDstAddr, \
  5781. uint32_t ui32TransferSize))ROM_UDMATABLE[0])
  5782. #endif
  5783. #if defined(TARGET_IS_TM4C123_RA1) || \
  5784. defined(TARGET_IS_TM4C123_RA3) || \
  5785. defined(TARGET_IS_TM4C123_RB1) || \
  5786. defined(TARGET_IS_TM4C129_RA0) || \
  5787. defined(TARGET_IS_TM4C129_RA1)
  5788. #define ROM_uDMAEnable \
  5789. ((void (*)(void))ROM_UDMATABLE[1])
  5790. #endif
  5791. #if defined(TARGET_IS_TM4C123_RA1) || \
  5792. defined(TARGET_IS_TM4C123_RA3) || \
  5793. defined(TARGET_IS_TM4C123_RB1) || \
  5794. defined(TARGET_IS_TM4C129_RA0) || \
  5795. defined(TARGET_IS_TM4C129_RA1)
  5796. #define ROM_uDMADisable \
  5797. ((void (*)(void))ROM_UDMATABLE[2])
  5798. #endif
  5799. #if defined(TARGET_IS_TM4C123_RA1) || \
  5800. defined(TARGET_IS_TM4C123_RA3) || \
  5801. defined(TARGET_IS_TM4C123_RB1) || \
  5802. defined(TARGET_IS_TM4C129_RA0) || \
  5803. defined(TARGET_IS_TM4C129_RA1)
  5804. #define ROM_uDMAErrorStatusGet \
  5805. ((uint32_t (*)(void))ROM_UDMATABLE[3])
  5806. #endif
  5807. #if defined(TARGET_IS_TM4C123_RA1) || \
  5808. defined(TARGET_IS_TM4C123_RA3) || \
  5809. defined(TARGET_IS_TM4C123_RB1) || \
  5810. defined(TARGET_IS_TM4C129_RA0) || \
  5811. defined(TARGET_IS_TM4C129_RA1)
  5812. #define ROM_uDMAErrorStatusClear \
  5813. ((void (*)(void))ROM_UDMATABLE[4])
  5814. #endif
  5815. #if defined(TARGET_IS_TM4C123_RA1) || \
  5816. defined(TARGET_IS_TM4C123_RA3) || \
  5817. defined(TARGET_IS_TM4C123_RB1) || \
  5818. defined(TARGET_IS_TM4C129_RA0) || \
  5819. defined(TARGET_IS_TM4C129_RA1)
  5820. #define ROM_uDMAChannelEnable \
  5821. ((void (*)(uint32_t ui32ChannelNum))ROM_UDMATABLE[5])
  5822. #endif
  5823. #if defined(TARGET_IS_TM4C123_RA1) || \
  5824. defined(TARGET_IS_TM4C123_RA3) || \
  5825. defined(TARGET_IS_TM4C123_RB1) || \
  5826. defined(TARGET_IS_TM4C129_RA0) || \
  5827. defined(TARGET_IS_TM4C129_RA1)
  5828. #define ROM_uDMAChannelDisable \
  5829. ((void (*)(uint32_t ui32ChannelNum))ROM_UDMATABLE[6])
  5830. #endif
  5831. #if defined(TARGET_IS_TM4C123_RA1) || \
  5832. defined(TARGET_IS_TM4C123_RA3) || \
  5833. defined(TARGET_IS_TM4C123_RB1) || \
  5834. defined(TARGET_IS_TM4C129_RA0) || \
  5835. defined(TARGET_IS_TM4C129_RA1)
  5836. #define ROM_uDMAChannelIsEnabled \
  5837. ((bool (*)(uint32_t ui32ChannelNum))ROM_UDMATABLE[7])
  5838. #endif
  5839. #if defined(TARGET_IS_TM4C123_RA1) || \
  5840. defined(TARGET_IS_TM4C123_RA3) || \
  5841. defined(TARGET_IS_TM4C123_RB1) || \
  5842. defined(TARGET_IS_TM4C129_RA0) || \
  5843. defined(TARGET_IS_TM4C129_RA1)
  5844. #define ROM_uDMAControlBaseSet \
  5845. ((void (*)(void *pControlTable))ROM_UDMATABLE[8])
  5846. #endif
  5847. #if defined(TARGET_IS_TM4C123_RA1) || \
  5848. defined(TARGET_IS_TM4C123_RA3) || \
  5849. defined(TARGET_IS_TM4C123_RB1) || \
  5850. defined(TARGET_IS_TM4C129_RA0) || \
  5851. defined(TARGET_IS_TM4C129_RA1)
  5852. #define ROM_uDMAControlBaseGet \
  5853. ((void * (*)(void))ROM_UDMATABLE[9])
  5854. #endif
  5855. #if defined(TARGET_IS_TM4C123_RA1) || \
  5856. defined(TARGET_IS_TM4C123_RA3) || \
  5857. defined(TARGET_IS_TM4C123_RB1) || \
  5858. defined(TARGET_IS_TM4C129_RA0) || \
  5859. defined(TARGET_IS_TM4C129_RA1)
  5860. #define ROM_uDMAChannelRequest \
  5861. ((void (*)(uint32_t ui32ChannelNum))ROM_UDMATABLE[10])
  5862. #endif
  5863. #if defined(TARGET_IS_TM4C123_RA1) || \
  5864. defined(TARGET_IS_TM4C123_RA3) || \
  5865. defined(TARGET_IS_TM4C123_RB1) || \
  5866. defined(TARGET_IS_TM4C129_RA0) || \
  5867. defined(TARGET_IS_TM4C129_RA1)
  5868. #define ROM_uDMAChannelAttributeEnable \
  5869. ((void (*)(uint32_t ui32ChannelNum, \
  5870. uint32_t ui32Attr))ROM_UDMATABLE[11])
  5871. #endif
  5872. #if defined(TARGET_IS_TM4C123_RA1) || \
  5873. defined(TARGET_IS_TM4C123_RA3) || \
  5874. defined(TARGET_IS_TM4C123_RB1) || \
  5875. defined(TARGET_IS_TM4C129_RA0) || \
  5876. defined(TARGET_IS_TM4C129_RA1)
  5877. #define ROM_uDMAChannelAttributeDisable \
  5878. ((void (*)(uint32_t ui32ChannelNum, \
  5879. uint32_t ui32Attr))ROM_UDMATABLE[12])
  5880. #endif
  5881. #if defined(TARGET_IS_TM4C123_RA1) || \
  5882. defined(TARGET_IS_TM4C123_RA3) || \
  5883. defined(TARGET_IS_TM4C123_RB1) || \
  5884. defined(TARGET_IS_TM4C129_RA0) || \
  5885. defined(TARGET_IS_TM4C129_RA1)
  5886. #define ROM_uDMAChannelAttributeGet \
  5887. ((uint32_t (*)(uint32_t ui32ChannelNum))ROM_UDMATABLE[13])
  5888. #endif
  5889. #if defined(TARGET_IS_TM4C123_RA1) || \
  5890. defined(TARGET_IS_TM4C123_RA3) || \
  5891. defined(TARGET_IS_TM4C123_RB1) || \
  5892. defined(TARGET_IS_TM4C129_RA0) || \
  5893. defined(TARGET_IS_TM4C129_RA1)
  5894. #define ROM_uDMAChannelControlSet \
  5895. ((void (*)(uint32_t ui32ChannelStructIndex, \
  5896. uint32_t ui32Control))ROM_UDMATABLE[14])
  5897. #endif
  5898. #if defined(TARGET_IS_TM4C123_RA1) || \
  5899. defined(TARGET_IS_TM4C123_RA3) || \
  5900. defined(TARGET_IS_TM4C123_RB1) || \
  5901. defined(TARGET_IS_TM4C129_RA0) || \
  5902. defined(TARGET_IS_TM4C129_RA1)
  5903. #define ROM_uDMAChannelSizeGet \
  5904. ((uint32_t (*)(uint32_t ui32ChannelStructIndex))ROM_UDMATABLE[15])
  5905. #endif
  5906. #if defined(TARGET_IS_TM4C123_RA1) || \
  5907. defined(TARGET_IS_TM4C123_RA3) || \
  5908. defined(TARGET_IS_TM4C123_RB1) || \
  5909. defined(TARGET_IS_TM4C129_RA0) || \
  5910. defined(TARGET_IS_TM4C129_RA1)
  5911. #define ROM_uDMAChannelModeGet \
  5912. ((uint32_t (*)(uint32_t ui32ChannelStructIndex))ROM_UDMATABLE[16])
  5913. #endif
  5914. #if defined(TARGET_IS_TM4C123_RA1) || \
  5915. defined(TARGET_IS_TM4C123_RA3) || \
  5916. defined(TARGET_IS_TM4C123_RB1) || \
  5917. defined(TARGET_IS_TM4C129_RA0) || \
  5918. defined(TARGET_IS_TM4C129_RA1)
  5919. #define ROM_uDMAChannelSelectSecondary \
  5920. ((void (*)(uint32_t ui32SecPeriphs))ROM_UDMATABLE[17])
  5921. #endif
  5922. #if defined(TARGET_IS_TM4C123_RA1) || \
  5923. defined(TARGET_IS_TM4C123_RA3) || \
  5924. defined(TARGET_IS_TM4C123_RB1) || \
  5925. defined(TARGET_IS_TM4C129_RA0) || \
  5926. defined(TARGET_IS_TM4C129_RA1)
  5927. #define ROM_uDMAChannelSelectDefault \
  5928. ((void (*)(uint32_t ui32DefPeriphs))ROM_UDMATABLE[18])
  5929. #endif
  5930. #if defined(TARGET_IS_TM4C123_RA1) || \
  5931. defined(TARGET_IS_TM4C123_RA3) || \
  5932. defined(TARGET_IS_TM4C123_RB1) || \
  5933. defined(TARGET_IS_TM4C129_RA0) || \
  5934. defined(TARGET_IS_TM4C129_RA1)
  5935. #define ROM_uDMAIntStatus \
  5936. ((uint32_t (*)(void))ROM_UDMATABLE[19])
  5937. #endif
  5938. #if defined(TARGET_IS_TM4C123_RA1) || \
  5939. defined(TARGET_IS_TM4C123_RA3) || \
  5940. defined(TARGET_IS_TM4C123_RB1) || \
  5941. defined(TARGET_IS_TM4C129_RA0) || \
  5942. defined(TARGET_IS_TM4C129_RA1)
  5943. #define ROM_uDMAIntClear \
  5944. ((void (*)(uint32_t ui32ChanMask))ROM_UDMATABLE[20])
  5945. #endif
  5946. #if defined(TARGET_IS_TM4C123_RA1) || \
  5947. defined(TARGET_IS_TM4C123_RA3) || \
  5948. defined(TARGET_IS_TM4C123_RB1) || \
  5949. defined(TARGET_IS_TM4C129_RA0) || \
  5950. defined(TARGET_IS_TM4C129_RA1)
  5951. #define ROM_uDMAControlAlternateBaseGet \
  5952. ((void * (*)(void))ROM_UDMATABLE[21])
  5953. #endif
  5954. #if defined(TARGET_IS_TM4C123_RA1) || \
  5955. defined(TARGET_IS_TM4C123_RA3) || \
  5956. defined(TARGET_IS_TM4C123_RB1) || \
  5957. defined(TARGET_IS_TM4C129_RA0) || \
  5958. defined(TARGET_IS_TM4C129_RA1)
  5959. #define ROM_uDMAChannelScatterGatherSet \
  5960. ((void (*)(uint32_t ui32ChannelNum, \
  5961. uint32_t ui32TaskCount, \
  5962. void *pvTaskList, \
  5963. uint32_t ui32IsPeriphSG))ROM_UDMATABLE[22])
  5964. #endif
  5965. #if defined(TARGET_IS_TM4C123_RA1) || \
  5966. defined(TARGET_IS_TM4C123_RA3) || \
  5967. defined(TARGET_IS_TM4C123_RB1) || \
  5968. defined(TARGET_IS_TM4C129_RA0) || \
  5969. defined(TARGET_IS_TM4C129_RA1)
  5970. #define ROM_uDMAChannelAssign \
  5971. ((void (*)(uint32_t ui32Mapping))ROM_UDMATABLE[23])
  5972. #endif
  5973. //*****************************************************************************
  5974. //
  5975. // Macros for calling ROM functions in the USB API.
  5976. //
  5977. //*****************************************************************************
  5978. #if defined(TARGET_IS_TM4C123_RA1) || \
  5979. defined(TARGET_IS_TM4C123_RA3) || \
  5980. defined(TARGET_IS_TM4C123_RB1) || \
  5981. defined(TARGET_IS_TM4C129_RA0) || \
  5982. defined(TARGET_IS_TM4C129_RA1)
  5983. #define ROM_USBDevAddrGet \
  5984. ((uint32_t (*)(uint32_t ui32Base))ROM_USBTABLE[1])
  5985. #endif
  5986. #if defined(TARGET_IS_TM4C123_RA1) || \
  5987. defined(TARGET_IS_TM4C123_RA3) || \
  5988. defined(TARGET_IS_TM4C123_RB1) || \
  5989. defined(TARGET_IS_TM4C129_RA0) || \
  5990. defined(TARGET_IS_TM4C129_RA1)
  5991. #define ROM_USBDevAddrSet \
  5992. ((void (*)(uint32_t ui32Base, \
  5993. uint32_t ui32Address))ROM_USBTABLE[2])
  5994. #endif
  5995. #if defined(TARGET_IS_TM4C123_RA1) || \
  5996. defined(TARGET_IS_TM4C123_RA3) || \
  5997. defined(TARGET_IS_TM4C123_RB1) || \
  5998. defined(TARGET_IS_TM4C129_RA0) || \
  5999. defined(TARGET_IS_TM4C129_RA1)
  6000. #define ROM_USBDevConnect \
  6001. ((void (*)(uint32_t ui32Base))ROM_USBTABLE[3])
  6002. #endif
  6003. #if defined(TARGET_IS_TM4C123_RA1) || \
  6004. defined(TARGET_IS_TM4C123_RA3) || \
  6005. defined(TARGET_IS_TM4C123_RB1) || \
  6006. defined(TARGET_IS_TM4C129_RA0) || \
  6007. defined(TARGET_IS_TM4C129_RA1)
  6008. #define ROM_USBDevDisconnect \
  6009. ((void (*)(uint32_t ui32Base))ROM_USBTABLE[4])
  6010. #endif
  6011. #if defined(TARGET_IS_TM4C123_RA1) || \
  6012. defined(TARGET_IS_TM4C123_RA3) || \
  6013. defined(TARGET_IS_TM4C123_RB1) || \
  6014. defined(TARGET_IS_TM4C129_RA0) || \
  6015. defined(TARGET_IS_TM4C129_RA1)
  6016. #define ROM_USBDevEndpointConfigSet \
  6017. ((void (*)(uint32_t ui32Base, \
  6018. uint32_t ui32Endpoint, \
  6019. uint32_t ui32MaxPacketSize, \
  6020. uint32_t ui32Flags))ROM_USBTABLE[5])
  6021. #endif
  6022. #if defined(TARGET_IS_TM4C123_RA1) || \
  6023. defined(TARGET_IS_TM4C123_RA3) || \
  6024. defined(TARGET_IS_TM4C123_RB1) || \
  6025. defined(TARGET_IS_TM4C129_RA0) || \
  6026. defined(TARGET_IS_TM4C129_RA1)
  6027. #define ROM_USBDevEndpointDataAck \
  6028. ((void (*)(uint32_t ui32Base, \
  6029. uint32_t ui32Endpoint, \
  6030. bool bIsLastPacket))ROM_USBTABLE[6])
  6031. #endif
  6032. #if defined(TARGET_IS_TM4C123_RA1) || \
  6033. defined(TARGET_IS_TM4C123_RA3) || \
  6034. defined(TARGET_IS_TM4C123_RB1) || \
  6035. defined(TARGET_IS_TM4C129_RA0) || \
  6036. defined(TARGET_IS_TM4C129_RA1)
  6037. #define ROM_USBDevEndpointStall \
  6038. ((void (*)(uint32_t ui32Base, \
  6039. uint32_t ui32Endpoint, \
  6040. uint32_t ui32Flags))ROM_USBTABLE[7])
  6041. #endif
  6042. #if defined(TARGET_IS_TM4C123_RA1) || \
  6043. defined(TARGET_IS_TM4C123_RA3) || \
  6044. defined(TARGET_IS_TM4C123_RB1) || \
  6045. defined(TARGET_IS_TM4C129_RA0) || \
  6046. defined(TARGET_IS_TM4C129_RA1)
  6047. #define ROM_USBDevEndpointStallClear \
  6048. ((void (*)(uint32_t ui32Base, \
  6049. uint32_t ui32Endpoint, \
  6050. uint32_t ui32Flags))ROM_USBTABLE[8])
  6051. #endif
  6052. #if defined(TARGET_IS_TM4C123_RA1) || \
  6053. defined(TARGET_IS_TM4C123_RA3) || \
  6054. defined(TARGET_IS_TM4C123_RB1) || \
  6055. defined(TARGET_IS_TM4C129_RA0) || \
  6056. defined(TARGET_IS_TM4C129_RA1)
  6057. #define ROM_USBDevEndpointStatusClear \
  6058. ((void (*)(uint32_t ui32Base, \
  6059. uint32_t ui32Endpoint, \
  6060. uint32_t ui32Flags))ROM_USBTABLE[9])
  6061. #endif
  6062. #if defined(TARGET_IS_TM4C123_RA1) || \
  6063. defined(TARGET_IS_TM4C123_RA3) || \
  6064. defined(TARGET_IS_TM4C123_RB1) || \
  6065. defined(TARGET_IS_TM4C129_RA0) || \
  6066. defined(TARGET_IS_TM4C129_RA1)
  6067. #define ROM_USBEndpointDataGet \
  6068. ((int32_t (*)(uint32_t ui32Base, \
  6069. uint32_t ui32Endpoint, \
  6070. uint8_t *pui8Data, \
  6071. uint32_t *pui32Size))ROM_USBTABLE[10])
  6072. #endif
  6073. #if defined(TARGET_IS_TM4C123_RA1) || \
  6074. defined(TARGET_IS_TM4C123_RA3) || \
  6075. defined(TARGET_IS_TM4C123_RB1) || \
  6076. defined(TARGET_IS_TM4C129_RA0) || \
  6077. defined(TARGET_IS_TM4C129_RA1)
  6078. #define ROM_USBEndpointDataPut \
  6079. ((int32_t (*)(uint32_t ui32Base, \
  6080. uint32_t ui32Endpoint, \
  6081. uint8_t *pui8Data, \
  6082. uint32_t ui32Size))ROM_USBTABLE[11])
  6083. #endif
  6084. #if defined(TARGET_IS_TM4C123_RA1) || \
  6085. defined(TARGET_IS_TM4C123_RA3) || \
  6086. defined(TARGET_IS_TM4C123_RB1) || \
  6087. defined(TARGET_IS_TM4C129_RA0) || \
  6088. defined(TARGET_IS_TM4C129_RA1)
  6089. #define ROM_USBEndpointDataSend \
  6090. ((int32_t (*)(uint32_t ui32Base, \
  6091. uint32_t ui32Endpoint, \
  6092. uint32_t ui32TransType))ROM_USBTABLE[12])
  6093. #endif
  6094. #if defined(TARGET_IS_TM4C123_RA1) || \
  6095. defined(TARGET_IS_TM4C123_RA3) || \
  6096. defined(TARGET_IS_TM4C123_RB1) || \
  6097. defined(TARGET_IS_TM4C129_RA0) || \
  6098. defined(TARGET_IS_TM4C129_RA1)
  6099. #define ROM_USBEndpointDataToggleClear \
  6100. ((void (*)(uint32_t ui32Base, \
  6101. uint32_t ui32Endpoint, \
  6102. uint32_t ui32Flags))ROM_USBTABLE[13])
  6103. #endif
  6104. #if defined(TARGET_IS_TM4C123_RA1) || \
  6105. defined(TARGET_IS_TM4C123_RA3) || \
  6106. defined(TARGET_IS_TM4C123_RB1) || \
  6107. defined(TARGET_IS_TM4C129_RA0) || \
  6108. defined(TARGET_IS_TM4C129_RA1)
  6109. #define ROM_USBEndpointStatus \
  6110. ((uint32_t (*)(uint32_t ui32Base, \
  6111. uint32_t ui32Endpoint))ROM_USBTABLE[14])
  6112. #endif
  6113. #if defined(TARGET_IS_TM4C123_RA1) || \
  6114. defined(TARGET_IS_TM4C123_RA3) || \
  6115. defined(TARGET_IS_TM4C123_RB1) || \
  6116. defined(TARGET_IS_TM4C129_RA0) || \
  6117. defined(TARGET_IS_TM4C129_RA1)
  6118. #define ROM_USBFIFOAddrGet \
  6119. ((uint32_t (*)(uint32_t ui32Base, \
  6120. uint32_t ui32Endpoint))ROM_USBTABLE[15])
  6121. #endif
  6122. #if defined(TARGET_IS_TM4C123_RA1) || \
  6123. defined(TARGET_IS_TM4C123_RA3) || \
  6124. defined(TARGET_IS_TM4C123_RB1) || \
  6125. defined(TARGET_IS_TM4C129_RA0) || \
  6126. defined(TARGET_IS_TM4C129_RA1)
  6127. #define ROM_USBFIFOConfigGet \
  6128. ((void (*)(uint32_t ui32Base, \
  6129. uint32_t ui32Endpoint, \
  6130. uint32_t *pui32FIFOAddress, \
  6131. uint32_t *pui32FIFOSize, \
  6132. uint32_t ui32Flags))ROM_USBTABLE[16])
  6133. #endif
  6134. #if defined(TARGET_IS_TM4C123_RA1) || \
  6135. defined(TARGET_IS_TM4C123_RA3) || \
  6136. defined(TARGET_IS_TM4C123_RB1) || \
  6137. defined(TARGET_IS_TM4C129_RA0) || \
  6138. defined(TARGET_IS_TM4C129_RA1)
  6139. #define ROM_USBFIFOConfigSet \
  6140. ((void (*)(uint32_t ui32Base, \
  6141. uint32_t ui32Endpoint, \
  6142. uint32_t ui32FIFOAddress, \
  6143. uint32_t ui32FIFOSize, \
  6144. uint32_t ui32Flags))ROM_USBTABLE[17])
  6145. #endif
  6146. #if defined(TARGET_IS_TM4C123_RA1) || \
  6147. defined(TARGET_IS_TM4C123_RA3) || \
  6148. defined(TARGET_IS_TM4C123_RB1) || \
  6149. defined(TARGET_IS_TM4C129_RA0) || \
  6150. defined(TARGET_IS_TM4C129_RA1)
  6151. #define ROM_USBFIFOFlush \
  6152. ((void (*)(uint32_t ui32Base, \
  6153. uint32_t ui32Endpoint, \
  6154. uint32_t ui32Flags))ROM_USBTABLE[18])
  6155. #endif
  6156. #if defined(TARGET_IS_TM4C123_RA1) || \
  6157. defined(TARGET_IS_TM4C123_RA3) || \
  6158. defined(TARGET_IS_TM4C123_RB1) || \
  6159. defined(TARGET_IS_TM4C129_RA0) || \
  6160. defined(TARGET_IS_TM4C129_RA1)
  6161. #define ROM_USBFrameNumberGet \
  6162. ((uint32_t (*)(uint32_t ui32Base))ROM_USBTABLE[19])
  6163. #endif
  6164. #if defined(TARGET_IS_TM4C123_RA1) || \
  6165. defined(TARGET_IS_TM4C123_RA3) || \
  6166. defined(TARGET_IS_TM4C123_RB1) || \
  6167. defined(TARGET_IS_TM4C129_RA0) || \
  6168. defined(TARGET_IS_TM4C129_RA1)
  6169. #define ROM_USBHostAddrGet \
  6170. ((uint32_t (*)(uint32_t ui32Base, \
  6171. uint32_t ui32Endpoint, \
  6172. uint32_t ui32Flags))ROM_USBTABLE[20])
  6173. #endif
  6174. #if defined(TARGET_IS_TM4C123_RA1) || \
  6175. defined(TARGET_IS_TM4C123_RA3) || \
  6176. defined(TARGET_IS_TM4C123_RB1) || \
  6177. defined(TARGET_IS_TM4C129_RA0) || \
  6178. defined(TARGET_IS_TM4C129_RA1)
  6179. #define ROM_USBHostAddrSet \
  6180. ((void (*)(uint32_t ui32Base, \
  6181. uint32_t ui32Endpoint, \
  6182. uint32_t ui32Addr, \
  6183. uint32_t ui32Flags))ROM_USBTABLE[21])
  6184. #endif
  6185. #if defined(TARGET_IS_TM4C123_RA3) || \
  6186. defined(TARGET_IS_TM4C123_RB1) || \
  6187. defined(TARGET_IS_TM4C129_RA0) || \
  6188. defined(TARGET_IS_TM4C129_RA1)
  6189. #define ROM_USBHostEndpointConfig \
  6190. ((void (*)(uint32_t ui32Base, \
  6191. uint32_t ui32Endpoint, \
  6192. uint32_t ui32MaxPacketSize, \
  6193. uint32_t ui32NAKPollInterval, \
  6194. uint32_t ui32TargetEndpoint, \
  6195. uint32_t ui32Flags))ROM_USBTABLE[22])
  6196. #endif
  6197. #if defined(TARGET_IS_TM4C123_RA1) || \
  6198. defined(TARGET_IS_TM4C123_RA3) || \
  6199. defined(TARGET_IS_TM4C123_RB1) || \
  6200. defined(TARGET_IS_TM4C129_RA0) || \
  6201. defined(TARGET_IS_TM4C129_RA1)
  6202. #define ROM_USBHostEndpointDataAck \
  6203. ((void (*)(uint32_t ui32Base, \
  6204. uint32_t ui32Endpoint))ROM_USBTABLE[23])
  6205. #endif
  6206. #if defined(TARGET_IS_TM4C123_RA1) || \
  6207. defined(TARGET_IS_TM4C123_RA3) || \
  6208. defined(TARGET_IS_TM4C123_RB1) || \
  6209. defined(TARGET_IS_TM4C129_RA0) || \
  6210. defined(TARGET_IS_TM4C129_RA1)
  6211. #define ROM_USBHostEndpointDataToggle \
  6212. ((void (*)(uint32_t ui32Base, \
  6213. uint32_t ui32Endpoint, \
  6214. bool bDataToggle, \
  6215. uint32_t ui32Flags))ROM_USBTABLE[24])
  6216. #endif
  6217. #if defined(TARGET_IS_TM4C123_RA1) || \
  6218. defined(TARGET_IS_TM4C123_RA3) || \
  6219. defined(TARGET_IS_TM4C123_RB1) || \
  6220. defined(TARGET_IS_TM4C129_RA0) || \
  6221. defined(TARGET_IS_TM4C129_RA1)
  6222. #define ROM_USBHostEndpointStatusClear \
  6223. ((void (*)(uint32_t ui32Base, \
  6224. uint32_t ui32Endpoint, \
  6225. uint32_t ui32Flags))ROM_USBTABLE[25])
  6226. #endif
  6227. #if defined(TARGET_IS_TM4C123_RA1) || \
  6228. defined(TARGET_IS_TM4C123_RA3) || \
  6229. defined(TARGET_IS_TM4C123_RB1) || \
  6230. defined(TARGET_IS_TM4C129_RA0) || \
  6231. defined(TARGET_IS_TM4C129_RA1)
  6232. #define ROM_USBHostHubAddrGet \
  6233. ((uint32_t (*)(uint32_t ui32Base, \
  6234. uint32_t ui32Endpoint, \
  6235. uint32_t ui32Flags))ROM_USBTABLE[26])
  6236. #endif
  6237. #if defined(TARGET_IS_TM4C123_RA1) || \
  6238. defined(TARGET_IS_TM4C123_RA3) || \
  6239. defined(TARGET_IS_TM4C123_RB1) || \
  6240. defined(TARGET_IS_TM4C129_RA0) || \
  6241. defined(TARGET_IS_TM4C129_RA1)
  6242. #define ROM_USBHostHubAddrSet \
  6243. ((void (*)(uint32_t ui32Base, \
  6244. uint32_t ui32Endpoint, \
  6245. uint32_t ui32Addr, \
  6246. uint32_t ui32Flags))ROM_USBTABLE[27])
  6247. #endif
  6248. #if defined(TARGET_IS_TM4C123_RA1) || \
  6249. defined(TARGET_IS_TM4C123_RA3) || \
  6250. defined(TARGET_IS_TM4C123_RB1) || \
  6251. defined(TARGET_IS_TM4C129_RA0) || \
  6252. defined(TARGET_IS_TM4C129_RA1)
  6253. #define ROM_USBHostPwrDisable \
  6254. ((void (*)(uint32_t ui32Base))ROM_USBTABLE[28])
  6255. #endif
  6256. #if defined(TARGET_IS_TM4C123_RA1) || \
  6257. defined(TARGET_IS_TM4C123_RA3) || \
  6258. defined(TARGET_IS_TM4C123_RB1) || \
  6259. defined(TARGET_IS_TM4C129_RA0) || \
  6260. defined(TARGET_IS_TM4C129_RA1)
  6261. #define ROM_USBHostPwrEnable \
  6262. ((void (*)(uint32_t ui32Base))ROM_USBTABLE[29])
  6263. #endif
  6264. #if defined(TARGET_IS_TM4C123_RA1) || \
  6265. defined(TARGET_IS_TM4C123_RA3) || \
  6266. defined(TARGET_IS_TM4C123_RB1) || \
  6267. defined(TARGET_IS_TM4C129_RA0) || \
  6268. defined(TARGET_IS_TM4C129_RA1)
  6269. #define ROM_USBHostPwrConfig \
  6270. ((void (*)(uint32_t ui32Base, \
  6271. uint32_t ui32Flags))ROM_USBTABLE[30])
  6272. #endif
  6273. #if defined(TARGET_IS_TM4C123_RA1) || \
  6274. defined(TARGET_IS_TM4C123_RA3) || \
  6275. defined(TARGET_IS_TM4C123_RB1) || \
  6276. defined(TARGET_IS_TM4C129_RA0) || \
  6277. defined(TARGET_IS_TM4C129_RA1)
  6278. #define ROM_USBHostPwrFaultDisable \
  6279. ((void (*)(uint32_t ui32Base))ROM_USBTABLE[31])
  6280. #endif
  6281. #if defined(TARGET_IS_TM4C123_RA1) || \
  6282. defined(TARGET_IS_TM4C123_RA3) || \
  6283. defined(TARGET_IS_TM4C123_RB1) || \
  6284. defined(TARGET_IS_TM4C129_RA0) || \
  6285. defined(TARGET_IS_TM4C129_RA1)
  6286. #define ROM_USBHostPwrFaultEnable \
  6287. ((void (*)(uint32_t ui32Base))ROM_USBTABLE[32])
  6288. #endif
  6289. #if defined(TARGET_IS_TM4C123_RA1) || \
  6290. defined(TARGET_IS_TM4C123_RA3) || \
  6291. defined(TARGET_IS_TM4C123_RB1) || \
  6292. defined(TARGET_IS_TM4C129_RA0) || \
  6293. defined(TARGET_IS_TM4C129_RA1)
  6294. #define ROM_USBHostRequestIN \
  6295. ((void (*)(uint32_t ui32Base, \
  6296. uint32_t ui32Endpoint))ROM_USBTABLE[33])
  6297. #endif
  6298. #if defined(TARGET_IS_TM4C123_RA1) || \
  6299. defined(TARGET_IS_TM4C123_RA3) || \
  6300. defined(TARGET_IS_TM4C123_RB1) || \
  6301. defined(TARGET_IS_TM4C129_RA0) || \
  6302. defined(TARGET_IS_TM4C129_RA1)
  6303. #define ROM_USBHostRequestStatus \
  6304. ((void (*)(uint32_t ui32Base))ROM_USBTABLE[34])
  6305. #endif
  6306. #if defined(TARGET_IS_TM4C123_RA1) || \
  6307. defined(TARGET_IS_TM4C123_RA3) || \
  6308. defined(TARGET_IS_TM4C123_RB1) || \
  6309. defined(TARGET_IS_TM4C129_RA0) || \
  6310. defined(TARGET_IS_TM4C129_RA1)
  6311. #define ROM_USBHostReset \
  6312. ((void (*)(uint32_t ui32Base, \
  6313. bool bStart))ROM_USBTABLE[35])
  6314. #endif
  6315. #if defined(TARGET_IS_TM4C123_RA1) || \
  6316. defined(TARGET_IS_TM4C123_RA3) || \
  6317. defined(TARGET_IS_TM4C123_RB1) || \
  6318. defined(TARGET_IS_TM4C129_RA0) || \
  6319. defined(TARGET_IS_TM4C129_RA1)
  6320. #define ROM_USBHostResume \
  6321. ((void (*)(uint32_t ui32Base, \
  6322. bool bStart))ROM_USBTABLE[36])
  6323. #endif
  6324. #if defined(TARGET_IS_TM4C123_RA1) || \
  6325. defined(TARGET_IS_TM4C123_RA3) || \
  6326. defined(TARGET_IS_TM4C123_RB1) || \
  6327. defined(TARGET_IS_TM4C129_RA0) || \
  6328. defined(TARGET_IS_TM4C129_RA1)
  6329. #define ROM_USBHostSpeedGet \
  6330. ((uint32_t (*)(uint32_t ui32Base))ROM_USBTABLE[37])
  6331. #endif
  6332. #if defined(TARGET_IS_TM4C123_RA1) || \
  6333. defined(TARGET_IS_TM4C123_RA3) || \
  6334. defined(TARGET_IS_TM4C123_RB1) || \
  6335. defined(TARGET_IS_TM4C129_RA0) || \
  6336. defined(TARGET_IS_TM4C129_RA1)
  6337. #define ROM_USBHostSuspend \
  6338. ((void (*)(uint32_t ui32Base))ROM_USBTABLE[38])
  6339. #endif
  6340. #if defined(TARGET_IS_TM4C123_RA1) || \
  6341. defined(TARGET_IS_TM4C123_RA3) || \
  6342. defined(TARGET_IS_TM4C123_RB1) || \
  6343. defined(TARGET_IS_TM4C129_RA0) || \
  6344. defined(TARGET_IS_TM4C129_RA1)
  6345. #define ROM_USBDevEndpointConfigGet \
  6346. ((void (*)(uint32_t ui32Base, \
  6347. uint32_t ui32Endpoint, \
  6348. uint32_t *pui32MaxPacketSize, \
  6349. uint32_t *pui32Flags))ROM_USBTABLE[41])
  6350. #endif
  6351. #if defined(TARGET_IS_TM4C123_RA1) || \
  6352. defined(TARGET_IS_TM4C123_RA3) || \
  6353. defined(TARGET_IS_TM4C123_RB1) || \
  6354. defined(TARGET_IS_TM4C129_RA0) || \
  6355. defined(TARGET_IS_TM4C129_RA1)
  6356. #define ROM_USBEndpointDMAEnable \
  6357. ((void (*)(uint32_t ui32Base, \
  6358. uint32_t ui32Endpoint, \
  6359. uint32_t ui32Flags))ROM_USBTABLE[42])
  6360. #endif
  6361. #if defined(TARGET_IS_TM4C123_RA1) || \
  6362. defined(TARGET_IS_TM4C123_RA3) || \
  6363. defined(TARGET_IS_TM4C123_RB1) || \
  6364. defined(TARGET_IS_TM4C129_RA0) || \
  6365. defined(TARGET_IS_TM4C129_RA1)
  6366. #define ROM_USBEndpointDMADisable \
  6367. ((void (*)(uint32_t ui32Base, \
  6368. uint32_t ui32Endpoint, \
  6369. uint32_t ui32Flags))ROM_USBTABLE[43])
  6370. #endif
  6371. #if defined(TARGET_IS_TM4C123_RA1) || \
  6372. defined(TARGET_IS_TM4C123_RA3) || \
  6373. defined(TARGET_IS_TM4C123_RB1) || \
  6374. defined(TARGET_IS_TM4C129_RA0) || \
  6375. defined(TARGET_IS_TM4C129_RA1)
  6376. #define ROM_USBEndpointDataAvail \
  6377. ((uint32_t (*)(uint32_t ui32Base, \
  6378. uint32_t ui32Endpoint))ROM_USBTABLE[44])
  6379. #endif
  6380. #if defined(TARGET_IS_TM4C129_RA1)
  6381. #define ROM_USBOTGHostRequest \
  6382. ((void (*)(uint32_t ui32Base, \
  6383. bool bHNP))ROM_USBTABLE[45])
  6384. #endif
  6385. #if defined(TARGET_IS_TM4C123_RA1) || \
  6386. defined(TARGET_IS_TM4C123_RA3) || \
  6387. defined(TARGET_IS_TM4C123_RB1) || \
  6388. defined(TARGET_IS_TM4C129_RA0) || \
  6389. defined(TARGET_IS_TM4C129_RA1)
  6390. #define ROM_USBModeGet \
  6391. ((uint32_t (*)(uint32_t ui32Base))ROM_USBTABLE[46])
  6392. #endif
  6393. #if defined(TARGET_IS_TM4C123_RA1) || \
  6394. defined(TARGET_IS_TM4C123_RA3) || \
  6395. defined(TARGET_IS_TM4C123_RB1) || \
  6396. defined(TARGET_IS_TM4C129_RA0) || \
  6397. defined(TARGET_IS_TM4C129_RA1)
  6398. #define ROM_USBEndpointDMAChannel \
  6399. ((void (*)(uint32_t ui32Base, \
  6400. uint32_t ui32Endpoint, \
  6401. uint32_t ui32Channel))ROM_USBTABLE[47])
  6402. #endif
  6403. #if defined(TARGET_IS_TM4C123_RA1) || \
  6404. defined(TARGET_IS_TM4C123_RA3) || \
  6405. defined(TARGET_IS_TM4C123_RB1) || \
  6406. defined(TARGET_IS_TM4C129_RA0) || \
  6407. defined(TARGET_IS_TM4C129_RA1)
  6408. #define ROM_USBIntDisableControl \
  6409. ((void (*)(uint32_t ui32Base, \
  6410. uint32_t ui32IntFlags))ROM_USBTABLE[48])
  6411. #endif
  6412. #if defined(TARGET_IS_TM4C123_RA1) || \
  6413. defined(TARGET_IS_TM4C123_RA3) || \
  6414. defined(TARGET_IS_TM4C123_RB1) || \
  6415. defined(TARGET_IS_TM4C129_RA0) || \
  6416. defined(TARGET_IS_TM4C129_RA1)
  6417. #define ROM_USBIntEnableControl \
  6418. ((void (*)(uint32_t ui32Base, \
  6419. uint32_t ui32IntFlags))ROM_USBTABLE[49])
  6420. #endif
  6421. #if defined(TARGET_IS_TM4C123_RA1) || \
  6422. defined(TARGET_IS_TM4C123_RA3) || \
  6423. defined(TARGET_IS_TM4C123_RB1) || \
  6424. defined(TARGET_IS_TM4C129_RA0) || \
  6425. defined(TARGET_IS_TM4C129_RA1)
  6426. #define ROM_USBIntStatusControl \
  6427. ((uint32_t (*)(uint32_t ui32Base))ROM_USBTABLE[50])
  6428. #endif
  6429. #if defined(TARGET_IS_TM4C123_RA1) || \
  6430. defined(TARGET_IS_TM4C123_RA3) || \
  6431. defined(TARGET_IS_TM4C123_RB1) || \
  6432. defined(TARGET_IS_TM4C129_RA0) || \
  6433. defined(TARGET_IS_TM4C129_RA1)
  6434. #define ROM_USBIntDisableEndpoint \
  6435. ((void (*)(uint32_t ui32Base, \
  6436. uint32_t ui32IntFlags))ROM_USBTABLE[51])
  6437. #endif
  6438. #if defined(TARGET_IS_TM4C123_RA1) || \
  6439. defined(TARGET_IS_TM4C123_RA3) || \
  6440. defined(TARGET_IS_TM4C123_RB1) || \
  6441. defined(TARGET_IS_TM4C129_RA0) || \
  6442. defined(TARGET_IS_TM4C129_RA1)
  6443. #define ROM_USBIntEnableEndpoint \
  6444. ((void (*)(uint32_t ui32Base, \
  6445. uint32_t ui32IntFlags))ROM_USBTABLE[52])
  6446. #endif
  6447. #if defined(TARGET_IS_TM4C123_RA1) || \
  6448. defined(TARGET_IS_TM4C123_RA3) || \
  6449. defined(TARGET_IS_TM4C123_RB1) || \
  6450. defined(TARGET_IS_TM4C129_RA0) || \
  6451. defined(TARGET_IS_TM4C129_RA1)
  6452. #define ROM_USBIntStatusEndpoint \
  6453. ((uint32_t (*)(uint32_t ui32Base))ROM_USBTABLE[53])
  6454. #endif
  6455. #if defined(TARGET_IS_TM4C123_RA1) || \
  6456. defined(TARGET_IS_TM4C123_RA3) || \
  6457. defined(TARGET_IS_TM4C123_RB1) || \
  6458. defined(TARGET_IS_TM4C129_RA0) || \
  6459. defined(TARGET_IS_TM4C129_RA1)
  6460. #define ROM_USBHostMode \
  6461. ((void (*)(uint32_t ui32Base))ROM_USBTABLE[54])
  6462. #endif
  6463. #if defined(TARGET_IS_TM4C123_RA1) || \
  6464. defined(TARGET_IS_TM4C123_RA3) || \
  6465. defined(TARGET_IS_TM4C123_RB1) || \
  6466. defined(TARGET_IS_TM4C129_RA0) || \
  6467. defined(TARGET_IS_TM4C129_RA1)
  6468. #define ROM_USBDevMode \
  6469. ((void (*)(uint32_t ui32Base))ROM_USBTABLE[55])
  6470. #endif
  6471. #if defined(TARGET_IS_TM4C123_RA1) || \
  6472. defined(TARGET_IS_TM4C123_RA3) || \
  6473. defined(TARGET_IS_TM4C123_RB1) || \
  6474. defined(TARGET_IS_TM4C129_RA0) || \
  6475. defined(TARGET_IS_TM4C129_RA1)
  6476. #define ROM_USBPHYPowerOff \
  6477. ((void (*)(uint32_t ui32Base))ROM_USBTABLE[56])
  6478. #endif
  6479. #if defined(TARGET_IS_TM4C123_RA1) || \
  6480. defined(TARGET_IS_TM4C123_RA3) || \
  6481. defined(TARGET_IS_TM4C123_RB1) || \
  6482. defined(TARGET_IS_TM4C129_RA0) || \
  6483. defined(TARGET_IS_TM4C129_RA1)
  6484. #define ROM_USBPHYPowerOn \
  6485. ((void (*)(uint32_t ui32Base))ROM_USBTABLE[57])
  6486. #endif
  6487. #if defined(TARGET_IS_TM4C123_RA3) || \
  6488. defined(TARGET_IS_TM4C123_RB1) || \
  6489. defined(TARGET_IS_TM4C129_RA0) || \
  6490. defined(TARGET_IS_TM4C129_RA1)
  6491. #define ROM_UpdateUSB \
  6492. ((void (*)(uint8_t *pui8DescriptorInfo))ROM_USBTABLE[58])
  6493. #endif
  6494. #if defined(TARGET_IS_TM4C123_RA1) || \
  6495. defined(TARGET_IS_TM4C123_RA3) || \
  6496. defined(TARGET_IS_TM4C123_RB1) || \
  6497. defined(TARGET_IS_TM4C129_RA0) || \
  6498. defined(TARGET_IS_TM4C129_RA1)
  6499. #define ROM_USBOTGMode \
  6500. ((void (*)(uint32_t ui32Base))ROM_USBTABLE[59])
  6501. #endif
  6502. #if defined(TARGET_IS_TM4C123_RB1) || \
  6503. defined(TARGET_IS_TM4C129_RA0) || \
  6504. defined(TARGET_IS_TM4C129_RA1)
  6505. #define ROM_USBHostRequestINClear \
  6506. ((void (*)(uint32_t ui32Base, \
  6507. uint32_t ui32Endpoint))ROM_USBTABLE[60])
  6508. #endif
  6509. #if defined(TARGET_IS_TM4C123_RB1) || \
  6510. defined(TARGET_IS_TM4C129_RA0) || \
  6511. defined(TARGET_IS_TM4C129_RA1)
  6512. #define ROM_USBNumEndpointsGet \
  6513. ((uint32_t (*)(uint32_t ui32Base))ROM_USBTABLE[61])
  6514. #endif
  6515. #if defined(TARGET_IS_TM4C129_RA0) || \
  6516. defined(TARGET_IS_TM4C129_RA1)
  6517. #define ROM_USBClockDisable \
  6518. ((void (*)(uint32_t ui32Base))ROM_USBTABLE[62])
  6519. #endif
  6520. #if defined(TARGET_IS_TM4C129_RA0) || \
  6521. defined(TARGET_IS_TM4C129_RA1)
  6522. #define ROM_USBClockEnable \
  6523. ((void (*)(uint32_t ui32Base, \
  6524. uint32_t ui32Div, \
  6525. uint32_t ui32Flags))ROM_USBTABLE[63])
  6526. #endif
  6527. #if defined(TARGET_IS_TM4C129_RA0) || \
  6528. defined(TARGET_IS_TM4C129_RA1)
  6529. #define ROM_USBControllerVersion \
  6530. ((uint32_t (*)(uint32_t ui32Base))ROM_USBTABLE[64])
  6531. #endif
  6532. #if defined(TARGET_IS_TM4C129_RA0) || \
  6533. defined(TARGET_IS_TM4C129_RA1)
  6534. #define ROM_USBDevLPMConfig \
  6535. ((void (*)(uint32_t ui32Base, \
  6536. uint32_t ui32Config))ROM_USBTABLE[65])
  6537. #endif
  6538. #if defined(TARGET_IS_TM4C129_RA0) || \
  6539. defined(TARGET_IS_TM4C129_RA1)
  6540. #define ROM_USBDevLPMDisable \
  6541. ((void (*)(uint32_t ui32Base))ROM_USBTABLE[66])
  6542. #endif
  6543. #if defined(TARGET_IS_TM4C123_RB1) || \
  6544. defined(TARGET_IS_TM4C129_RA0) || \
  6545. defined(TARGET_IS_TM4C129_RA1)
  6546. #define ROM_USBDevLPMEnable \
  6547. ((void (*)(uint32_t ui32Base))ROM_USBTABLE[67])
  6548. #endif
  6549. #if defined(TARGET_IS_TM4C129_RA0) || \
  6550. defined(TARGET_IS_TM4C129_RA1)
  6551. #define ROM_USBDevLPMRemoteWake \
  6552. ((void (*)(uint32_t ui32Base))ROM_USBTABLE[68])
  6553. #endif
  6554. #if defined(TARGET_IS_TM4C129_RA0) || \
  6555. defined(TARGET_IS_TM4C129_RA1)
  6556. #define ROM_USBDevSpeedGet \
  6557. ((uint32_t (*)(uint32_t ui32Base))ROM_USBTABLE[69])
  6558. #endif
  6559. #if defined(TARGET_IS_TM4C129_RA0) || \
  6560. defined(TARGET_IS_TM4C129_RA1)
  6561. #define ROM_USBDMAChannelAddressGet \
  6562. ((void * (*)(uint32_t ui32Base, \
  6563. uint32_t ui32Channel))ROM_USBTABLE[70])
  6564. #endif
  6565. #if defined(TARGET_IS_TM4C129_RA0) || \
  6566. defined(TARGET_IS_TM4C129_RA1)
  6567. #define ROM_USBDMAChannelAddressSet \
  6568. ((void (*)(uint32_t ui32Base, \
  6569. uint32_t ui32Channel, \
  6570. void *pvAddress))ROM_USBTABLE[71])
  6571. #endif
  6572. #if defined(TARGET_IS_TM4C129_RA0) || \
  6573. defined(TARGET_IS_TM4C129_RA1)
  6574. #define ROM_USBDMAChannelConfigSet \
  6575. ((void (*)(uint32_t ui32Base, \
  6576. uint32_t ui32Channel, \
  6577. uint32_t ui32Endpoint, \
  6578. uint32_t ui32Config))ROM_USBTABLE[72])
  6579. #endif
  6580. #if defined(TARGET_IS_TM4C129_RA0) || \
  6581. defined(TARGET_IS_TM4C129_RA1)
  6582. #define ROM_USBDMAChannelDisable \
  6583. ((void (*)(uint32_t ui32Base, \
  6584. uint32_t ui32Channel))ROM_USBTABLE[73])
  6585. #endif
  6586. #if defined(TARGET_IS_TM4C129_RA0) || \
  6587. defined(TARGET_IS_TM4C129_RA1)
  6588. #define ROM_USBDMAChannelEnable \
  6589. ((void (*)(uint32_t ui32Base, \
  6590. uint32_t ui32Channel))ROM_USBTABLE[74])
  6591. #endif
  6592. #if defined(TARGET_IS_TM4C129_RA0) || \
  6593. defined(TARGET_IS_TM4C129_RA1)
  6594. #define ROM_USBDMAChannelIntDisable \
  6595. ((void (*)(uint32_t ui32Base, \
  6596. uint32_t ui32Channel))ROM_USBTABLE[75])
  6597. #endif
  6598. #if defined(TARGET_IS_TM4C129_RA0) || \
  6599. defined(TARGET_IS_TM4C129_RA1)
  6600. #define ROM_USBDMAChannelIntEnable \
  6601. ((void (*)(uint32_t ui32Base, \
  6602. uint32_t ui32Channel))ROM_USBTABLE[76])
  6603. #endif
  6604. #if defined(TARGET_IS_TM4C129_RA0) || \
  6605. defined(TARGET_IS_TM4C129_RA1)
  6606. #define ROM_USBDMAChannelCountGet \
  6607. ((uint32_t (*)(uint32_t ui32Base, \
  6608. uint32_t ui32Channel))ROM_USBTABLE[77])
  6609. #endif
  6610. #if defined(TARGET_IS_TM4C129_RA0) || \
  6611. defined(TARGET_IS_TM4C129_RA1)
  6612. #define ROM_USBDMAChannelCountSet \
  6613. ((void (*)(uint32_t ui32Base, \
  6614. uint32_t ui32Count, \
  6615. uint32_t ui32Channel))ROM_USBTABLE[78])
  6616. #endif
  6617. #if defined(TARGET_IS_TM4C129_RA0) || \
  6618. defined(TARGET_IS_TM4C129_RA1)
  6619. #define ROM_USBDMAChannelIntStatus \
  6620. ((uint32_t (*)(uint32_t ui32Base))ROM_USBTABLE[79])
  6621. #endif
  6622. #if defined(TARGET_IS_TM4C129_RA0) || \
  6623. defined(TARGET_IS_TM4C129_RA1)
  6624. #define ROM_USBDMAChannelStatus \
  6625. ((uint32_t (*)(uint32_t ui32Base, \
  6626. uint32_t ui32Channel))ROM_USBTABLE[80])
  6627. #endif
  6628. #if defined(TARGET_IS_TM4C129_RA0) || \
  6629. defined(TARGET_IS_TM4C129_RA1)
  6630. #define ROM_USBDMAChannelStatusClear \
  6631. ((void (*)(uint32_t ui32Base, \
  6632. uint32_t ui32Channel, \
  6633. uint32_t ui32Status))ROM_USBTABLE[81])
  6634. #endif
  6635. #if defined(TARGET_IS_TM4C129_RA0) || \
  6636. defined(TARGET_IS_TM4C129_RA1)
  6637. #define ROM_USBHighSpeed \
  6638. ((void (*)(uint32_t ui32Base, \
  6639. bool bEnable))ROM_USBTABLE[82])
  6640. #endif
  6641. #if defined(TARGET_IS_TM4C129_RA0) || \
  6642. defined(TARGET_IS_TM4C129_RA1)
  6643. #define ROM_USBHostEndpointPing \
  6644. ((void (*)(uint32_t ui32Base, \
  6645. uint32_t ui32Endpoint, \
  6646. bool bEnable))ROM_USBTABLE[83])
  6647. #endif
  6648. #if defined(TARGET_IS_TM4C129_RA0) || \
  6649. defined(TARGET_IS_TM4C129_RA1)
  6650. #define ROM_USBHostEndpointSpeed \
  6651. ((void (*)(uint32_t ui32Base, \
  6652. uint32_t ui32Endpoint, \
  6653. uint32_t ui32Flags))ROM_USBTABLE[84])
  6654. #endif
  6655. #if defined(TARGET_IS_TM4C129_RA0) || \
  6656. defined(TARGET_IS_TM4C129_RA1)
  6657. #define ROM_USBHostLPMConfig \
  6658. ((void (*)(uint32_t ui32Base, \
  6659. uint32_t ui32ResumeTime, \
  6660. uint32_t ui32Config))ROM_USBTABLE[85])
  6661. #endif
  6662. #if defined(TARGET_IS_TM4C129_RA0) || \
  6663. defined(TARGET_IS_TM4C129_RA1)
  6664. #define ROM_USBHostLPMResume \
  6665. ((void (*)(uint32_t ui32Base))ROM_USBTABLE[86])
  6666. #endif
  6667. #if defined(TARGET_IS_TM4C129_RA0) || \
  6668. defined(TARGET_IS_TM4C129_RA1)
  6669. #define ROM_USBHostLPMSend \
  6670. ((void (*)(uint32_t ui32Base, \
  6671. uint32_t ui32Address, \
  6672. uint32_t uiEndpoint))ROM_USBTABLE[87])
  6673. #endif
  6674. #if defined(TARGET_IS_TM4C129_RA0) || \
  6675. defined(TARGET_IS_TM4C129_RA1)
  6676. #define ROM_USBLPMIntDisable \
  6677. ((void (*)(uint32_t ui32Base, \
  6678. uint32_t ui32Ints))ROM_USBTABLE[88])
  6679. #endif
  6680. #if defined(TARGET_IS_TM4C129_RA0) || \
  6681. defined(TARGET_IS_TM4C129_RA1)
  6682. #define ROM_USBLPMIntEnable \
  6683. ((void (*)(uint32_t ui32Base, \
  6684. uint32_t ui32Ints))ROM_USBTABLE[89])
  6685. #endif
  6686. #if defined(TARGET_IS_TM4C129_RA0) || \
  6687. defined(TARGET_IS_TM4C129_RA1)
  6688. #define ROM_USBLPMIntStatus \
  6689. ((uint32_t (*)(uint32_t ui32Base))ROM_USBTABLE[90])
  6690. #endif
  6691. #if defined(TARGET_IS_TM4C129_RA0) || \
  6692. defined(TARGET_IS_TM4C129_RA1)
  6693. #define ROM_USBLPMLinkStateGet \
  6694. ((uint32_t (*)(uint32_t ui32Base))ROM_USBTABLE[91])
  6695. #endif
  6696. #if defined(TARGET_IS_TM4C129_RA0) || \
  6697. defined(TARGET_IS_TM4C129_RA1)
  6698. #define ROM_USBEndpointPacketCountSet \
  6699. ((void (*)(uint32_t ui32Base, \
  6700. uint32_t ui32Endpoint, \
  6701. uint32_t ui32Count))ROM_USBTABLE[92])
  6702. #endif
  6703. #if defined(TARGET_IS_TM4C129_RA0) || \
  6704. defined(TARGET_IS_TM4C129_RA1)
  6705. #define ROM_USBULPIConfig \
  6706. ((void (*)(uint32_t ui32Base, \
  6707. uint32_t ui32Config))ROM_USBTABLE[93])
  6708. #endif
  6709. #if defined(TARGET_IS_TM4C129_RA0) || \
  6710. defined(TARGET_IS_TM4C129_RA1)
  6711. #define ROM_USBULPIDisable \
  6712. ((void (*)(uint32_t ui32Base))ROM_USBTABLE[94])
  6713. #endif
  6714. #if defined(TARGET_IS_TM4C129_RA0) || \
  6715. defined(TARGET_IS_TM4C129_RA1)
  6716. #define ROM_USBULPIEnable \
  6717. ((void (*)(uint32_t ui32Base))ROM_USBTABLE[95])
  6718. #endif
  6719. #if defined(TARGET_IS_TM4C129_RA0) || \
  6720. defined(TARGET_IS_TM4C129_RA1)
  6721. #define ROM_USBULPIRegRead \
  6722. ((uint8_t (*)(uint32_t ui32Base, \
  6723. uint8_t ui8Reg))ROM_USBTABLE[96])
  6724. #endif
  6725. #if defined(TARGET_IS_TM4C129_RA0) || \
  6726. defined(TARGET_IS_TM4C129_RA1)
  6727. #define ROM_USBULPIRegWrite \
  6728. ((void (*)(uint32_t ui32Base, \
  6729. uint8_t ui8Reg, \
  6730. uint8_t ui8Data))ROM_USBTABLE[97])
  6731. #endif
  6732. #if defined(TARGET_IS_TM4C129_RA0) || \
  6733. defined(TARGET_IS_TM4C129_RA1)
  6734. #define ROM_USBOTGSessionRequest \
  6735. ((void (*)(uint32_t ui32Base, \
  6736. bool bStart))ROM_USBTABLE[98])
  6737. #endif
  6738. #if defined(TARGET_IS_TM4C129_RA1)
  6739. #define ROM_USBDMANumChannels \
  6740. ((uint32_t (*)(uint32_t ui32Base))ROM_USBTABLE[99])
  6741. #endif
  6742. #if defined(TARGET_IS_TM4C129_RA1)
  6743. #define ROM_USBEndpointDMAConfigSet \
  6744. ((void (*)(uint32_t ui32Base, \
  6745. uint32_t ui32Endpoint, \
  6746. uint32_t ui32Config))ROM_USBTABLE[100])
  6747. #endif
  6748. #if defined(TARGET_IS_TM4C129_RA1)
  6749. #define ROM_USBLPMRemoteWakeEnabled \
  6750. ((bool (*)(uint32_t ui32Base))ROM_USBTABLE[102])
  6751. #endif
  6752. #if defined(TARGET_IS_TM4C129_RA0) || \
  6753. defined(TARGET_IS_TM4C129_RA1)
  6754. #define ROM_USBModeConfig \
  6755. ((void (*)(uint32_t ui32Base, \
  6756. uint32_t ui32Mode))ROM_USBTABLE[103])
  6757. #endif
  6758. //*****************************************************************************
  6759. //
  6760. // Macros for calling ROM functions in the Watchdog API.
  6761. //
  6762. //*****************************************************************************
  6763. #if defined(TARGET_IS_TM4C123_RA1) || \
  6764. defined(TARGET_IS_TM4C123_RA3) || \
  6765. defined(TARGET_IS_TM4C123_RB1) || \
  6766. defined(TARGET_IS_TM4C129_RA0) || \
  6767. defined(TARGET_IS_TM4C129_RA1)
  6768. #define ROM_WatchdogIntClear \
  6769. ((void (*)(uint32_t ui32Base))ROM_WATCHDOGTABLE[0])
  6770. #endif
  6771. #if defined(TARGET_IS_TM4C123_RA1) || \
  6772. defined(TARGET_IS_TM4C123_RA3) || \
  6773. defined(TARGET_IS_TM4C123_RB1) || \
  6774. defined(TARGET_IS_TM4C129_RA0) || \
  6775. defined(TARGET_IS_TM4C129_RA1)
  6776. #define ROM_WatchdogRunning \
  6777. ((bool (*)(uint32_t ui32Base))ROM_WATCHDOGTABLE[1])
  6778. #endif
  6779. #if defined(TARGET_IS_TM4C123_RA1) || \
  6780. defined(TARGET_IS_TM4C123_RA3) || \
  6781. defined(TARGET_IS_TM4C123_RB1) || \
  6782. defined(TARGET_IS_TM4C129_RA0) || \
  6783. defined(TARGET_IS_TM4C129_RA1)
  6784. #define ROM_WatchdogEnable \
  6785. ((void (*)(uint32_t ui32Base))ROM_WATCHDOGTABLE[2])
  6786. #endif
  6787. #if defined(TARGET_IS_TM4C123_RA1) || \
  6788. defined(TARGET_IS_TM4C123_RA3) || \
  6789. defined(TARGET_IS_TM4C123_RB1) || \
  6790. defined(TARGET_IS_TM4C129_RA0) || \
  6791. defined(TARGET_IS_TM4C129_RA1)
  6792. #define ROM_WatchdogResetEnable \
  6793. ((void (*)(uint32_t ui32Base))ROM_WATCHDOGTABLE[3])
  6794. #endif
  6795. #if defined(TARGET_IS_TM4C123_RA1) || \
  6796. defined(TARGET_IS_TM4C123_RA3) || \
  6797. defined(TARGET_IS_TM4C123_RB1) || \
  6798. defined(TARGET_IS_TM4C129_RA0) || \
  6799. defined(TARGET_IS_TM4C129_RA1)
  6800. #define ROM_WatchdogResetDisable \
  6801. ((void (*)(uint32_t ui32Base))ROM_WATCHDOGTABLE[4])
  6802. #endif
  6803. #if defined(TARGET_IS_TM4C123_RA1) || \
  6804. defined(TARGET_IS_TM4C123_RA3) || \
  6805. defined(TARGET_IS_TM4C123_RB1) || \
  6806. defined(TARGET_IS_TM4C129_RA0) || \
  6807. defined(TARGET_IS_TM4C129_RA1)
  6808. #define ROM_WatchdogLock \
  6809. ((void (*)(uint32_t ui32Base))ROM_WATCHDOGTABLE[5])
  6810. #endif
  6811. #if defined(TARGET_IS_TM4C123_RA1) || \
  6812. defined(TARGET_IS_TM4C123_RA3) || \
  6813. defined(TARGET_IS_TM4C123_RB1) || \
  6814. defined(TARGET_IS_TM4C129_RA0) || \
  6815. defined(TARGET_IS_TM4C129_RA1)
  6816. #define ROM_WatchdogUnlock \
  6817. ((void (*)(uint32_t ui32Base))ROM_WATCHDOGTABLE[6])
  6818. #endif
  6819. #if defined(TARGET_IS_TM4C123_RA1) || \
  6820. defined(TARGET_IS_TM4C123_RA3) || \
  6821. defined(TARGET_IS_TM4C123_RB1) || \
  6822. defined(TARGET_IS_TM4C129_RA0) || \
  6823. defined(TARGET_IS_TM4C129_RA1)
  6824. #define ROM_WatchdogLockState \
  6825. ((bool (*)(uint32_t ui32Base))ROM_WATCHDOGTABLE[7])
  6826. #endif
  6827. #if defined(TARGET_IS_TM4C123_RA1) || \
  6828. defined(TARGET_IS_TM4C123_RA3) || \
  6829. defined(TARGET_IS_TM4C123_RB1) || \
  6830. defined(TARGET_IS_TM4C129_RA0) || \
  6831. defined(TARGET_IS_TM4C129_RA1)
  6832. #define ROM_WatchdogReloadSet \
  6833. ((void (*)(uint32_t ui32Base, \
  6834. uint32_t ui32LoadVal))ROM_WATCHDOGTABLE[8])
  6835. #endif
  6836. #if defined(TARGET_IS_TM4C123_RA1) || \
  6837. defined(TARGET_IS_TM4C123_RA3) || \
  6838. defined(TARGET_IS_TM4C123_RB1) || \
  6839. defined(TARGET_IS_TM4C129_RA0) || \
  6840. defined(TARGET_IS_TM4C129_RA1)
  6841. #define ROM_WatchdogReloadGet \
  6842. ((uint32_t (*)(uint32_t ui32Base))ROM_WATCHDOGTABLE[9])
  6843. #endif
  6844. #if defined(TARGET_IS_TM4C123_RA1) || \
  6845. defined(TARGET_IS_TM4C123_RA3) || \
  6846. defined(TARGET_IS_TM4C123_RB1) || \
  6847. defined(TARGET_IS_TM4C129_RA0) || \
  6848. defined(TARGET_IS_TM4C129_RA1)
  6849. #define ROM_WatchdogValueGet \
  6850. ((uint32_t (*)(uint32_t ui32Base))ROM_WATCHDOGTABLE[10])
  6851. #endif
  6852. #if defined(TARGET_IS_TM4C123_RA1) || \
  6853. defined(TARGET_IS_TM4C123_RA3) || \
  6854. defined(TARGET_IS_TM4C123_RB1) || \
  6855. defined(TARGET_IS_TM4C129_RA0) || \
  6856. defined(TARGET_IS_TM4C129_RA1)
  6857. #define ROM_WatchdogIntEnable \
  6858. ((void (*)(uint32_t ui32Base))ROM_WATCHDOGTABLE[11])
  6859. #endif
  6860. #if defined(TARGET_IS_TM4C123_RA1) || \
  6861. defined(TARGET_IS_TM4C123_RA3) || \
  6862. defined(TARGET_IS_TM4C123_RB1) || \
  6863. defined(TARGET_IS_TM4C129_RA0) || \
  6864. defined(TARGET_IS_TM4C129_RA1)
  6865. #define ROM_WatchdogIntStatus \
  6866. ((uint32_t (*)(uint32_t ui32Base, \
  6867. bool bMasked))ROM_WATCHDOGTABLE[12])
  6868. #endif
  6869. #if defined(TARGET_IS_TM4C123_RA1) || \
  6870. defined(TARGET_IS_TM4C123_RA3) || \
  6871. defined(TARGET_IS_TM4C123_RB1) || \
  6872. defined(TARGET_IS_TM4C129_RA0) || \
  6873. defined(TARGET_IS_TM4C129_RA1)
  6874. #define ROM_WatchdogStallEnable \
  6875. ((void (*)(uint32_t ui32Base))ROM_WATCHDOGTABLE[13])
  6876. #endif
  6877. #if defined(TARGET_IS_TM4C123_RA1) || \
  6878. defined(TARGET_IS_TM4C123_RA3) || \
  6879. defined(TARGET_IS_TM4C123_RB1) || \
  6880. defined(TARGET_IS_TM4C129_RA0) || \
  6881. defined(TARGET_IS_TM4C129_RA1)
  6882. #define ROM_WatchdogStallDisable \
  6883. ((void (*)(uint32_t ui32Base))ROM_WATCHDOGTABLE[14])
  6884. #endif
  6885. #if defined(TARGET_IS_TM4C123_RA1) || \
  6886. defined(TARGET_IS_TM4C123_RA3) || \
  6887. defined(TARGET_IS_TM4C123_RB1) || \
  6888. defined(TARGET_IS_TM4C129_RA0) || \
  6889. defined(TARGET_IS_TM4C129_RA1)
  6890. #define ROM_WatchdogIntTypeSet \
  6891. ((void (*)(uint32_t ui32Base, \
  6892. uint32_t ui32Type))ROM_WATCHDOGTABLE[15])
  6893. #endif
  6894. //*****************************************************************************
  6895. //
  6896. // Macros for calling ROM functions in the Software API.
  6897. //
  6898. //*****************************************************************************
  6899. #if defined(TARGET_IS_TM4C123_RA1) || \
  6900. defined(TARGET_IS_TM4C123_RA3) || \
  6901. defined(TARGET_IS_TM4C123_RB1) || \
  6902. defined(TARGET_IS_TM4C129_RA0) || \
  6903. defined(TARGET_IS_TM4C129_RA1)
  6904. #define ROM_Crc16Array \
  6905. ((uint16_t (*)(uint32_t ui32WordLen, \
  6906. const uint32_t *pui32Data))ROM_SOFTWARETABLE[1])
  6907. #endif
  6908. #if defined(TARGET_IS_TM4C123_RA1) || \
  6909. defined(TARGET_IS_TM4C123_RA3) || \
  6910. defined(TARGET_IS_TM4C123_RB1) || \
  6911. defined(TARGET_IS_TM4C129_RA0) || \
  6912. defined(TARGET_IS_TM4C129_RA1)
  6913. #define ROM_Crc16Array3 \
  6914. ((void (*)(uint32_t ui32WordLen, \
  6915. const uint32_t *pui32Data, \
  6916. uint16_t *pui16Crc3))ROM_SOFTWARETABLE[2])
  6917. #endif
  6918. #if defined(TARGET_IS_TM4C123_RA1) || \
  6919. defined(TARGET_IS_TM4C123_RA3) || \
  6920. defined(TARGET_IS_TM4C123_RB1) || \
  6921. defined(TARGET_IS_TM4C129_RA0) || \
  6922. defined(TARGET_IS_TM4C129_RA1)
  6923. #define ROM_Crc16 \
  6924. ((uint16_t (*)(uint16_t ui16Crc, \
  6925. const uint8_t *pui8Data, \
  6926. uint32_t ui32Count))ROM_SOFTWARETABLE[3])
  6927. #endif
  6928. #if defined(TARGET_IS_TM4C123_RA1) || \
  6929. defined(TARGET_IS_TM4C123_RA3) || \
  6930. defined(TARGET_IS_TM4C123_RB1) || \
  6931. defined(TARGET_IS_TM4C129_RA0) || \
  6932. defined(TARGET_IS_TM4C129_RA1)
  6933. #define ROM_Crc8CCITT \
  6934. ((uint8_t (*)(uint8_t ui8Crc, \
  6935. const uint8_t *pui8Data, \
  6936. uint32_t ui32Count))ROM_SOFTWARETABLE[4])
  6937. #endif
  6938. #if defined(TARGET_IS_TM4C129_RA0) || \
  6939. defined(TARGET_IS_TM4C129_RA1)
  6940. #define ROM_Crc32 \
  6941. ((uint32_t (*)(uint32_t ui32Crc, \
  6942. const uint8_t *pui8Data, \
  6943. uint32_t ui32Count))ROM_SOFTWARETABLE[5])
  6944. #endif
  6945. #if defined(TARGET_IS_TM4C123_RA1) || \
  6946. defined(TARGET_IS_TM4C123_RA3) || \
  6947. defined(TARGET_IS_TM4C123_RB1) || \
  6948. defined(TARGET_IS_TM4C129_RA0) || \
  6949. defined(TARGET_IS_TM4C129_RA1)
  6950. #define ROM_pvAESTable \
  6951. ((void *)&(ROM_SOFTWARETABLE[7]))
  6952. #endif
  6953. #endif // __DRIVERLIB_ROM_H__