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context_rvds.S 2.6 KB

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  1. ;/*
  2. ; * File : context_rvds.S
  3. ; * This file is part of RT-Thread RTOS
  4. ; * COPYRIGHT (C) 2006, RT-Thread Development Team
  5. ; *
  6. ; * The license and distribution terms for this file may be
  7. ; * found in the file LICENSE in this distribution or at
  8. ; * http://www.rt-thread.org/license/LICENSE
  9. ; *
  10. ; * Change Logs:
  11. ; * Date Author Notes
  12. ; * 2009-01-20 Bernard first version
  13. ; * 2011-07-22 Bernard added thumb mode porting
  14. ; */
  15. NOINT EQU 0xc0 ; disable interrupt in psr
  16. AREA |.text|, CODE, READONLY, ALIGN=2
  17. ARM
  18. REQUIRE8
  19. PRESERVE8
  20. ;/*
  21. ; * rt_base_t rt_hw_interrupt_disable();
  22. ; */
  23. rt_hw_interrupt_disable PROC
  24. EXPORT rt_hw_interrupt_disable
  25. MRS r0, cpsr
  26. ORR r1, r0, #NOINT
  27. MSR cpsr_c, r1
  28. BX lr
  29. ENDP
  30. ;/*
  31. ; * void rt_hw_interrupt_enable(rt_base_t level);
  32. ; */
  33. rt_hw_interrupt_enable PROC
  34. EXPORT rt_hw_interrupt_enable
  35. MSR cpsr_c, r0
  36. BX lr
  37. ENDP
  38. ;/*
  39. ; * void rt_hw_context_switch(rt_uint32 from, rt_uint32 to);
  40. ; * r0 --> from
  41. ; * r1 --> to
  42. ; */
  43. rt_hw_context_switch PROC
  44. EXPORT rt_hw_context_switch
  45. STMFD sp!, {lr} ; push pc (lr should be pushed in place of PC)
  46. STMFD sp!, {r0-r12, lr} ; push lr & register file
  47. MRS r4, cpsr
  48. TST lr, #0x01
  49. BEQ _ARM_MODE
  50. ORR r4, r4, #0x20 ; it's thumb code
  51. _ARM_MODE
  52. STMFD sp!, {r4} ; push cpsr
  53. STR sp, [r0] ; store sp in preempted tasks TCB
  54. LDR sp, [r1] ; get new task stack pointer
  55. LDMFD sp!, {r4} ; pop new task cpsr to spsr
  56. MSR spsr_cxsf, r4
  57. BIC r4, r4, #0x20 ; must be ARM mode
  58. MSR cpsr_cxsf, r4
  59. LDMFD sp!, {r0-r12, lr, pc}^ ; pop new task r0-r12, lr & pc, copy spsr to cpsr
  60. ENDP
  61. ;/*
  62. ; * void rt_hw_context_switch_to(rt_uint32 to);
  63. ; * r0 --> to
  64. ; */
  65. rt_hw_context_switch_to PROC
  66. EXPORT rt_hw_context_switch_to
  67. LDR sp, [r0] ; get new task stack pointer
  68. LDMFD sp!, {r4} ; pop new task cpsr to spsr
  69. MSR spsr_cxsf, r4
  70. BIC r4, r4, #0x20 ; must be ARM mode
  71. MSR cpsr_cxsf, r4
  72. LDMFD sp!, {r0-r12, lr, pc}^ ; pop new task r0-r12, lr & pc, copy spsr to cpsr
  73. ENDP
  74. ;/*
  75. ; * void rt_hw_context_switch_interrupt(rt_uint32 from, rt_uint32 to);
  76. ; */
  77. IMPORT rt_thread_switch_interrupt_flag
  78. IMPORT rt_interrupt_from_thread
  79. IMPORT rt_interrupt_to_thread
  80. rt_hw_context_switch_interrupt PROC
  81. EXPORT rt_hw_context_switch_interrupt
  82. LDR r2, =rt_thread_switch_interrupt_flag
  83. LDR r3, [r2]
  84. CMP r3, #1
  85. BEQ _reswitch
  86. MOV r3, #1 ; set rt_thread_switch_interrupt_flag to 1
  87. STR r3, [r2]
  88. LDR r2, =rt_interrupt_from_thread ; set rt_interrupt_from_thread
  89. STR r0, [r2]
  90. _reswitch
  91. LDR r2, =rt_interrupt_to_thread ; set rt_interrupt_to_thread
  92. STR r1, [r2]
  93. BX lr
  94. ENDP
  95. END