start_gcc.S 10 KB

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  1. /*
  2. * File : start_gcc.S
  3. * This file is part of RT-Thread RTOS
  4. * COPYRIGHT (C) 2013-2014, RT-Thread Development Team
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License along
  17. * with this program; if not, write to the Free Software Foundation, Inc.,
  18. * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  19. *
  20. * Change Logs:
  21. * Date Author Notes
  22. * 2013-07-05 Bernard the first version
  23. */
  24. #include <rtconfig.h>
  25. #ifdef RT_USING_VMM
  26. #include <vmm.h>
  27. .equ orig_irq_isr, LINUX_VECTOR_POS+0x18
  28. #else
  29. #undef RT_VMM_USING_DOMAIN
  30. #endif
  31. .equ Mode_USR, 0x10
  32. .equ Mode_FIQ, 0x11
  33. .equ Mode_IRQ, 0x12
  34. .equ Mode_SVC, 0x13
  35. .equ Mode_ABT, 0x17
  36. .equ Mode_UND, 0x1B
  37. .equ Mode_SYS, 0x1F
  38. .equ I_Bit, 0x80 @ when I bit is set, IRQ is disabled
  39. .equ F_Bit, 0x40 @ when F bit is set, FIQ is disabled
  40. #ifndef RT_USING_VMM
  41. .equ UND_Stack_Size, 0x00000000
  42. .equ SVC_Stack_Size, 0x00000100
  43. .equ ABT_Stack_Size, 0x00000000
  44. .equ RT_FIQ_STACK_PGSZ, 0x00000000
  45. .equ RT_IRQ_STACK_PGSZ, 0x00000100
  46. .equ USR_Stack_Size, 0x00000100
  47. #define ISR_Stack_Size (UND_Stack_Size + SVC_Stack_Size + ABT_Stack_Size + \
  48. RT_FIQ_STACK_PGSZ + RT_IRQ_STACK_PGSZ)
  49. #else
  50. #define ISR_Stack_Size (RT_FIQ_STACK_PGSZ + RT_IRQ_STACK_PGSZ)
  51. #endif
  52. .section .data.share.isr
  53. /* stack */
  54. .globl stack_start
  55. .globl stack_top
  56. stack_start:
  57. .rept ISR_Stack_Size
  58. .byte 0
  59. .endr
  60. stack_top:
  61. .text
  62. /* reset entry */
  63. .globl _reset
  64. _reset:
  65. #ifdef RT_USING_VMM
  66. /* save all the parameter and variable registers */
  67. stmfd sp!, {r0-r12, lr}
  68. #endif
  69. /* set the cpu to SVC32 mode and disable interrupt */
  70. mrs r0, cpsr
  71. bic r0, r0, #0x1f
  72. orr r0, r0, #0x13
  73. msr cpsr_c, r0
  74. /* setup stack */
  75. bl stack_setup
  76. /* clear .bss */
  77. mov r0,#0 /* get a zero */
  78. ldr r1,=__bss_start /* bss start */
  79. ldr r2,=__bss_end /* bss end */
  80. bss_loop:
  81. cmp r1,r2 /* check if data to clear */
  82. strlo r0,[r1],#4 /* clear 4 bytes */
  83. blo bss_loop /* loop until done */
  84. #ifdef RT_USING_VMM
  85. /* clear .bss.share */
  86. mov r0,#0 /* get a zero */
  87. ldr r1,=__bss_share_start /* bss start */
  88. ldr r2,=__bss_share_end /* bss end */
  89. bss_share_loop:
  90. cmp r1,r2 /* check if data to clear */
  91. strlo r0,[r1],#4 /* clear 4 bytes */
  92. blo bss_share_loop /* loop until done */
  93. #endif
  94. /* call C++ constructors of global objects */
  95. ldr r0, =__ctors_start__
  96. ldr r1, =__ctors_end__
  97. ctor_loop:
  98. cmp r0, r1
  99. beq ctor_end
  100. ldr r2, [r0], #4
  101. stmfd sp!, {r0-r1}
  102. mov lr, pc
  103. bx r2
  104. ldmfd sp!, {r0-r1}
  105. b ctor_loop
  106. ctor_end:
  107. /* start RT-Thread Kernel */
  108. #ifdef RT_USING_VMM
  109. /* restore the parameter */
  110. ldmfd sp!, {r0-r3}
  111. bl vmm_entry
  112. ldmfd sp!, {r4-r12, pc}
  113. #else
  114. ldr pc, _rtthread_startup
  115. _rtthread_startup:
  116. .word rtthread_startup
  117. #endif
  118. stack_setup:
  119. ldr r0, =stack_top
  120. #ifdef RT_USING_VMM
  121. @ Linux use stmia to save r0, lr and spsr. To align to 8 byte boundary,
  122. @ just allocate 16 bytes for it.
  123. sub r0, r0, #16
  124. #endif
  125. #ifndef RT_USING_VMM
  126. @ Set the startup stack for svc
  127. mov sp, r0
  128. #endif
  129. #ifndef RT_USING_VMM
  130. @ Enter Undefined Instruction Mode and set its Stack Pointer
  131. msr cpsr_c, #Mode_UND|I_Bit|F_Bit
  132. mov sp, r0
  133. sub r0, r0, #UND_Stack_Size
  134. @ Enter Abort Mode and set its Stack Pointer
  135. msr cpsr_c, #Mode_ABT|I_Bit|F_Bit
  136. mov sp, r0
  137. sub r0, r0, #ABT_Stack_Size
  138. #endif
  139. @ Enter FIQ Mode and set its Stack Pointer
  140. msr cpsr_c, #Mode_FIQ|I_Bit|F_Bit
  141. mov sp, r0
  142. sub r0, r0, #RT_FIQ_STACK_PGSZ
  143. @ Enter IRQ Mode and set its Stack Pointer
  144. msr cpsr_c, #Mode_IRQ|I_Bit|F_Bit
  145. mov sp, r0
  146. sub r0, r0, #RT_IRQ_STACK_PGSZ
  147. /* come back to SVC mode */
  148. msr cpsr_c, #Mode_SVC|I_Bit|F_Bit
  149. bx lr
  150. /* exception handlers: undef, swi, padt, dabt, resv, irq, fiq */
  151. .section .text.isr, "ax"
  152. .align 5
  153. .globl vector_fiq
  154. vector_fiq:
  155. stmfd sp!,{r0-r7,lr}
  156. bl rt_hw_trap_fiq
  157. ldmfd sp!,{r0-r7,lr}
  158. subs pc, lr, #4
  159. .globl rt_interrupt_enter
  160. .globl rt_interrupt_leave
  161. .globl rt_thread_switch_interrupt_flag
  162. .globl rt_interrupt_from_thread
  163. .globl rt_interrupt_to_thread
  164. .globl rt_current_thread
  165. .globl vmm_thread
  166. .globl vmm_virq_check
  167. .align 5
  168. .globl vector_irq
  169. vector_irq:
  170. stmfd sp!, {r0-r12,lr}
  171. #ifdef RT_VMM_USING_DOMAIN
  172. @ save the last domain
  173. mrc p15, 0, r5, c3, c0
  174. @ switch to vmm domain as we are going to call vmm codes
  175. ldr r1, =vmm_domain_val
  176. ldr r4, [r1]
  177. mcr p15, 0, r4, c3, c0
  178. #endif
  179. bl rt_interrupt_enter
  180. bl rt_hw_trap_irq
  181. bl rt_interrupt_leave
  182. #ifdef RT_VMM_USING_DOMAIN
  183. @ restore the last domain. It do some redundant work but simplify the
  184. @ logic. It might be the guest domain so rt_thread_switch_interrupt_flag
  185. @ should lay in .bss.share
  186. mcr p15, 0, r5, c3, c0
  187. #endif
  188. @ if rt_thread_switch_interrupt_flag set, jump to
  189. @ rt_hw_context_switch_interrupt_do and don't return
  190. ldr r0, =rt_thread_switch_interrupt_flag
  191. ldr r1, [r0]
  192. cmp r1, #1
  193. beq rt_hw_context_switch_interrupt_do
  194. #ifndef RT_USING_VMM
  195. ldmfd sp!, {r0-r12,lr}
  196. subs pc, lr, #4
  197. #else
  198. #ifdef RT_VMM_USING_DOMAIN
  199. @ r4 is vmm_domain_val
  200. @ back to vmm domain as we need access rt_current_thread
  201. mcr p15, 0, r4, c3, c0
  202. #endif
  203. /* check whether we need to do IRQ routing
  204. * ensure the int is disabled. Or there will be an infinite loop. */
  205. ldr r0, =rt_current_thread
  206. ldr r0, [r0]
  207. ldr r1, =vmm_thread
  208. cmp r0, r1
  209. beq switch_to_guest
  210. #ifdef RT_VMM_USING_DOMAIN
  211. @ r5 is domain of interrupted context
  212. @ it might be super_domain_val or vmm_domain_val so we need to restore it.
  213. mcr p15, 0, r5, c3, c0
  214. #endif
  215. @ switch back if the interrupted thread is not vmm
  216. ldmfd sp!, {r0-r12,lr}
  217. subs pc, lr, #4
  218. switch_to_guest:
  219. #ifdef RT_VMM_USING_DOMAIN
  220. @ We are going to execute rt-thread code but accessing the content of the
  221. @ guest. So switch to super domain.
  222. ldr r1, =super_domain_val
  223. ldr r0, [r1]
  224. mcr p15, 0, r0, c3, c0
  225. #endif
  226. /* check whether there is a pending interrupt for Guest OS */
  227. bl vmm_virq_check
  228. #ifdef RT_VMM_USING_DOMAIN
  229. @ All done, restore the guest domain.
  230. mcr p15, 0, r5, c3, c0
  231. #endif
  232. cmp r0, #0x0
  233. beq route_irq_to_guest
  234. ldmfd sp!, {r0-r12,lr}
  235. subs pc, lr, #4
  236. route_irq_to_guest:
  237. ldmfd sp!, {r0-r12,lr}
  238. b orig_irq_isr
  239. #endif /* RT_USING_VMM */
  240. rt_hw_context_switch_interrupt_do:
  241. mov r1, #0 @ clear flag
  242. str r1, [r0]
  243. mov r1, sp @ r1 point to {r0-r3} in stack
  244. add sp, sp, #4*4
  245. ldmfd sp!, {r4-r12,lr}@ reload saved registers
  246. mrs r0, spsr @ get cpsr of interrupt thread
  247. sub r2, lr, #4 @ save old task's pc to r2
  248. @ Switch to SVC mode with no interrupt. If the usr mode guest is
  249. @ interrupted, this will just switch to the stack of kernel space.
  250. @ save the registers in kernel space won't trigger data abort.
  251. msr cpsr_c, #I_Bit|F_Bit|Mode_SVC
  252. stmfd sp!, {r2} @ push old task's pc
  253. stmfd sp!, {r4-r12,lr}@ push old task's lr,r12-r4
  254. ldmfd r1, {r1-r4} @ restore r0-r3 of the interrupt thread
  255. stmfd sp!, {r1-r4} @ push old task's r0-r3
  256. stmfd sp!, {r0} @ push old task's cpsr
  257. ldr r4, =rt_interrupt_from_thread
  258. ldr r5, [r4]
  259. str sp, [r5] @ store sp in preempted tasks's TCB
  260. #ifdef RT_VMM_USING_DOMAIN
  261. @ If a thread is wake up by interrupt, it should be RTT thread.
  262. @ Make sure the domain is correct.
  263. ldr r1, =vmm_domain_val
  264. ldr r2, [r1]
  265. mcr p15, 0, r2, c3, c0
  266. #endif
  267. ldr r6, =rt_interrupt_to_thread
  268. ldr r6, [r6]
  269. ldr sp, [r6] @ get new task's stack pointer
  270. ldmfd sp!, {r4} @ pop new task's cpsr to spsr
  271. msr spsr_cxsf, r4
  272. ldmfd sp!, {r0-r12,lr,pc}^ @ pop new task's r0-r12,lr & pc, copy spsr to cpsr
  273. .macro push_svc_reg
  274. sub sp, sp, #17 * 4 @/* Sizeof(struct rt_hw_exp_stack) */
  275. stmia sp, {r0 - r12} @/* Calling r0-r12 */
  276. mov r0, sp
  277. mrs r6, spsr @/* Save CPSR */
  278. str lr, [r0, #15*4] @/* Push PC */
  279. str r6, [r0, #16*4] @/* Push CPSR */
  280. cps #Mode_SVC
  281. str sp, [r0, #13*4] @/* Save calling SP */
  282. str lr, [r0, #14*4] @/* Save calling PC */
  283. .endm
  284. .align 5
  285. .globl vector_swi
  286. vector_swi:
  287. push_svc_reg
  288. bl rt_hw_trap_swi
  289. b .
  290. .align 5
  291. .globl vector_undef
  292. vector_undef:
  293. push_svc_reg
  294. bl rt_hw_trap_undef
  295. b .
  296. .align 5
  297. .globl vector_pabt
  298. vector_pabt:
  299. push_svc_reg
  300. bl rt_hw_trap_pabt
  301. b .
  302. .align 5
  303. .globl vector_dabt
  304. vector_dabt:
  305. push_svc_reg
  306. bl rt_hw_trap_dabt
  307. b .
  308. .align 5
  309. .globl vector_resv
  310. vector_resv:
  311. push_svc_reg
  312. bl rt_hw_trap_resv
  313. b .