interrupt.c 2.6 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118
  1. /*
  2. * File : interrupt.c
  3. * This file is part of RT-Thread RTOS
  4. * COPYRIGHT (C) 2006, RT-Thread Development Team
  5. *
  6. * The license and distribution terms for this file may be
  7. * found in the file LICENSE in this distribution or at
  8. * http://openlab.rt-thread.com/license/LICENSE
  9. *
  10. * Change Logs:
  11. * Date Author Notes
  12. */
  13. #include <rtthread.h>
  14. #include <rthw.h>
  15. #include <bsp.h>
  16. extern rt_uint32_t rt_interrupt_nest;
  17. extern void rt_hw_idt_init(void);
  18. rt_uint32_t rt_interrupt_from_thread, rt_interrupt_to_thread;
  19. rt_uint32_t rt_thread_switch_interrupt_flag;
  20. /* exception and interrupt handler table */
  21. rt_isr_handler_t isr_table[MAX_HANDLERS];
  22. rt_uint16_t irq_mask_8259A = 0xFFFF;
  23. /**
  24. * @addtogroup I386
  25. */
  26. /*@{*/
  27. /**
  28. * This function initializes 8259 interrupt controller
  29. */
  30. void rt_hw_pic_init()
  31. {
  32. outb(IO_PIC1, 0x11);
  33. outb(IO_PIC1+1, IRQ_OFFSET);
  34. outb(IO_PIC1+1, 1<<IRQ_SLAVE);
  35. outb(IO_PIC1+1, 0x3);
  36. outb(IO_PIC1+1, 0xff);
  37. outb(IO_PIC1, 0x68);
  38. outb(IO_PIC1, 0x0a);
  39. outb(IO_PIC2, 0x11);
  40. outb(IO_PIC2+1, IRQ_OFFSET + 8);
  41. outb(IO_PIC2+1, IRQ_SLAVE);
  42. outb(IO_PIC2+1, 0x3);
  43. outb(IO_PIC2+1, 0xff);
  44. outb(IO_PIC2, 0x68);
  45. outb(IO_PIC2, 0x0a);
  46. if (irq_mask_8259A != 0xFFFF)
  47. {
  48. outb(IO_PIC1+1, (char)irq_mask_8259A);
  49. outb(IO_PIC2+1, (char)(irq_mask_8259A >> 8));
  50. }
  51. /* init interrupt nest, and context */
  52. rt_interrupt_nest = 0;
  53. rt_interrupt_from_thread = 0;
  54. rt_interrupt_to_thread = 0;
  55. rt_thread_switch_interrupt_flag = 0;
  56. }
  57. void rt_hw_interrupt_handle(int vector)
  58. {
  59. rt_kprintf("Unhandled interrupt %d occured!!!\n", vector);
  60. }
  61. /**
  62. * This function initializes interrupt descript table and 8259 interrupt controller
  63. *
  64. */
  65. void rt_hw_interrupt_init(void)
  66. {
  67. rt_hw_idt_init();
  68. rt_hw_pic_init();
  69. }
  70. void rt_hw_interrupt_umask(int vector)
  71. {
  72. irq_mask_8259A = irq_mask_8259A&~(1<<vector);
  73. outb(IO_PIC1+1, (char)irq_mask_8259A);
  74. outb(IO_PIC2+1, (char)(irq_mask_8259A >> 8));
  75. }
  76. void rt_hw_interrupt_mask(int vector)
  77. {
  78. irq_mask_8259A = irq_mask_8259A | (1<<vector);
  79. outb(IO_PIC1+1, (char)irq_mask_8259A);
  80. outb(IO_PIC2+1, (char)(irq_mask_8259A >> 8));
  81. }
  82. void rt_hw_interrupt_install(int vector, rt_isr_handler_t new_handler, rt_isr_handler_t *old_handler)
  83. {
  84. if(vector < MAX_HANDLERS)
  85. {
  86. if (*old_handler != RT_NULL) *old_handler = isr_table[vector];
  87. if (new_handler != RT_NULL) isr_table[vector] = new_handler;
  88. }
  89. }
  90. rt_base_t rt_hw_interrupt_disable(void)
  91. {
  92. rt_base_t level;
  93. __asm__ __volatile__("pushfl ; popl %0 ; cli":"=g" (level): :"memory");
  94. return level;
  95. }
  96. void rt_hw_interrupt_enable(rt_base_t level)
  97. {
  98. __asm__ __volatile__("pushl %0 ; popfl": :"g" (level):"memory", "cc");
  99. }
  100. /*@}*/