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interrupt.h 4.0 KB

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  1. /*
  2. * File : interrupt.h
  3. * This file is part of RT-Thread RTOS
  4. * COPYRIGHT (C) 2006 - 2015, RT-Thread Development Team
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License along
  17. * with this program; if not, write to the Free Software Foundation, Inc.,
  18. * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  19. *
  20. * Change Logs:
  21. * Date Author Notes
  22. * 2015-04-14 ArdaFu first version
  23. */
  24. #ifndef __INTERRUPT_H__
  25. #define __INTERRUPT_H__
  26. #define INT_IRQ 0x00
  27. #define INT_FIQ 0x01
  28. // IRQ Source
  29. #define INT_ARM_COMMRX 0
  30. #define INT_ARM_COMMTX 1
  31. #define INT_RTC 2
  32. #define INT_GPIO0 3
  33. #define INT_GPIO1 4
  34. #define INT_GPIO2 5
  35. #define INT_GPIO3 6
  36. #define INT_GPIO4_IIS1 7
  37. #define INT_USB0 8
  38. #define INT_USB1 9
  39. #define INT_USB0_DMA 10
  40. #define INT_USB1_DMA 11
  41. #define INT_MAC 12
  42. #define INT_MAC_PMT 13
  43. #define INT_NAND 14
  44. #define INT_UART0 15
  45. #define INT_UART1 16
  46. #define INT_UART2 17
  47. #define INT_UART3 18
  48. #define INT_UART4 19
  49. #define INT_UART5 20
  50. #define INT_UART6 21
  51. #define INT_UART7 22
  52. #define INT_UART8 23
  53. #define INT_UART9 24
  54. #define INT_I2S0 25
  55. #define INT_I2C0 26
  56. #define INT_I2C1 27
  57. #define INT_CAMIF 28
  58. #define INT_TIMER0 29
  59. #define INT_TIMER1 30
  60. #define INT_TIMER2 31
  61. #define INT_TIMER3 32
  62. #define INT_ADC0 33
  63. #define INT_DAC0 34
  64. #define INT_USB0_RESUME_HOSTDISCONNECT 35
  65. #define INT_USB0_VBUSVALID 36
  66. #define INT_USB1_RESUME_HOSTDISCONNECT 37
  67. #define INT_USB1_VBUSVALID 38
  68. #define INT_DMA0_CH0 39
  69. #define INT_DMA0_CH1 40
  70. #define INT_DMA0_CH2 41
  71. #define INT_DMA0_CH3 42
  72. #define INT_DMA0_CH4 43
  73. #define INT_DMA0_CH5 44
  74. #define INT_DMA0_CH6 45
  75. #define INT_DMA0_CH7 46
  76. #define INT_DMA1_CH0 47
  77. #define INT_DMA1_CH1 48
  78. #define INT_DMA1_CH2 49
  79. #define INT_DMA1_CH3 50
  80. #define INT_DMA1_CH4 51
  81. #define INT_DMA1_CH5 52
  82. #define INT_DMA1_CH6 53
  83. #define INT_DMA1_CH7 54
  84. #define INT_WATCHDOG 55
  85. #define INT_CAN0 56
  86. #define INT_CAN1 57
  87. #define INT_QEI 58
  88. #define INT_MCPWM 59
  89. #define INT_SPI0 60
  90. #define INT_SPI1 61
  91. #define INT_QUADSPI0 62
  92. #define INT_SSP0 63
  93. #endif