Home Explore Help
Register Sign In
lqb
/
rt-thread
mirror of https://gitee.com/rtthread/rt-thread.git
1
0
Fork 0
Files Issues 0 Wiki
Branch: stable-v3.0.x
Branches Tags
rt-thread
/
bsp
/
gd32303e-eval
/
Libraries
/
GD32F30x_standard_peripheral
/
Include
/
gd32f30x_dac.h

gd32f30x_dac.h 12 KB
Permalink History Raw

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220 
  1. /*!
    2. 

  2.     \file  gd32f30x_dac.h
    3. 

  3.     \brief definitions for the DAC
    4. 

  4. */
    5. 

  5. 

  6. /*
    7. 

  7.     Copyright (C) 2017 GigaDevice
    8. 

  8. 

  9.     2017-02-10, V1.0.1, firmware for GD32F30x
    10. 

  10. */
    11. 

  11. 

  12. #ifndef GD32F30X_DAC_H
    13. 

  13. #define GD32F30X_DAC_H
    14. 

  14. 

  15. #include "gd32f30x.h"
    16. 

  16. 

  17. /* DACx(x=0,1) definitions */
    18. 

  18. #define DAC                     DAC_BASE
    19. 

  19. #define DAC0                    0U
    20. 

  20. #define DAC1                    1U
    21. 

  21. 

  22. /* registers definitions */
    23. 

  23. #define DAC_CTL                 REG32(DAC + 0x00U)   /*!< DAC control register */
    24. 

  24. #define DAC_SWT                 REG32(DAC + 0x04U)   /*!< DAC software trigger register */
    25. 

  25. #define DAC0_R12DH              REG32(DAC + 0x08U)   /*!< DAC0 12-bit right-aligned data holding register */
    26. 

  26. #define DAC0_L12DH              REG32(DAC + 0x0CU)   /*!< DAC0 12-bit left-aligned data holding register */
    27. 

  27. #define DAC0_R8DH               REG32(DAC + 0x10U)   /*!< DAC0 8-bit right-aligned data holding register */
    28. 

  28. #define DAC1_R12DH              REG32(DAC + 0x14U)   /*!< DAC1 12-bit right-aligned data holding register */
    29. 

  29. #define DAC1_L12DH              REG32(DAC + 0x18U)   /*!< DAC1 12-bit left-aligned data holding register */
    30. 

  30. #define DAC1_R8DH               REG32(DAC + 0x1CU)   /*!< DAC1 8-bit right-aligned data holding register */
    31. 

  31. #define DACC_R12DH              REG32(DAC + 0x20U)   /*!< DAC concurrent mode 12-bit right-aligned data holding register */
    32. 

  32. #define DACC_L12DH              REG32(DAC + 0x24U)   /*!< DAC concurrent mode 12-bit left-aligned data holding register */
    33. 

  33. #define DACC_R8DH               REG32(DAC + 0x28U)   /*!< DAC concurrent mode 8-bit right-aligned data holding register */
    34. 

  34. #define DAC0_DO                 REG32(DAC + 0x2CU)   /*!< DAC0 data output register */
    35. 

  35. #define DAC1_DO                 REG32(DAC + 0x30U)   /*!< DAC1 data output register */
    36. 

  36. 

  37. /* bits definitions */
    38. 

  38. /* DAC_CTL */
    39. 

  39. #define DAC_CTL_DEN0            BIT(0)               /*!< DAC0 enable/disable bit */
    40. 

  40. #define DAC_CTL_DBOFF0          BIT(1)               /*!< DAC0 output buffer turn on/turn off bit */
    41. 

  41. #define DAC_CTL_DTEN0           BIT(2)               /*!< DAC0 trigger enable/disable bit */
    42. 

  42. #define DAC_CTL_DTSEL0          BITS(3,5)            /*!< DAC0 trigger source selection enable/disable bits */
    43. 

  43. #define DAC_CTL_DWM0            BITS(6,7)            /*!< DAC0 noise wave mode */
    44. 

  44. #define DAC_CTL_DWBW0           BITS(8,11)           /*!< DAC0 noise wave bit width */
    45. 

  45. #define DAC_CTL_DDMAEN0         BIT(12)              /*!< DAC0 DMA enable/disable bit */
    46. 

  46. #define DAC_CTL_DEN1            BIT(16)              /*!< DAC1 enable/disable bit */ 
    47. 

  47. #define DAC_CTL_DBOFF1          BIT(17)              /*!< DAC1 output buffer turn on/turn off bit */
    48. 

  48. #define DAC_CTL_DTEN1           BIT(18)              /*!< DAC1 trigger enable/disable bit */
    49. 

  49. #define DAC_CTL_DTSEL1          BITS(19,21)          /*!< DAC1 trigger source selection enable/disable bits */
    50. 

  50. #define DAC_CTL_DWM1            BITS(22,23)          /*!< DAC1 noise wave mode */
    51. 

  51. #define DAC_CTL_DWBW1           BITS(24,27)          /*!< DAC1 noise wave bit width */
    52. 

  52. #define DAC_CTL_DDMAEN1         BIT(28)              /*!< DAC1 DMA enable/disable bit */
    53. 

  53. 

  54. /* DAC_SWT */
    55. 

  55. #define DAC_SWT_SWTR0           BIT(0)               /*!< DAC0 software trigger bit, cleared by hardware */
    56. 

  56. #define DAC_SWT_SWTR1           BIT(1)               /*!< DAC1 software trigger bit, cleared by hardware */
    57. 

  57. 

  58. /* DAC0_R12DH */
    59. 

  59. #define DAC0_R12DH_DAC0_DH      BITS(0,11)           /*!< DAC0 12-bit right-aligned data bits */
    60. 

  60. 

  61. /* DAC0_L12DH */
    62. 

  62. #define DAC0_L12DH_DAC0_DH      BITS(4,15)           /*!< DAC0 12-bit left-aligned data bits */
    63. 

  63. 

  64. /* DAC0_R8DH */
    65. 

  65. #define DAC0_R8DH_DAC0_DH       BITS(0,7)            /*!< DAC0 8-bit right-aligned data bits */
    66. 

  66. 

  67. /* DAC1_R12DH */
    68. 

  68. #define DAC1_R12DH_DAC1_DH      BITS(0,11)           /*!< DAC1 12-bit right-aligned data bits */
    69. 

  69. 

  70. /* DAC1_L12DH */
    71. 

  71. #define DAC1_L12DH_DAC1_DH      BITS(4,15)           /*!< DAC1 12-bit left-aligned data bits */
    72. 

  72. 

  73. /* DAC1_R8DH */
    74. 

  74. #define DAC1_R8DH_DAC1_DH       BITS(0,7)            /*!< DAC1 8-bit right-aligned data bits */
    75. 

  75. 

  76. /* DACC_R12DH */
    77. 

  77. #define DACC_R12DH_DAC0_DH      BITS(0,11)           /*!< DAC concurrent mode DAC0 12-bit right-aligned data bits */
    78. 

  78. #define DACC_R12DH_DAC1_DH      BITS(16,27)          /*!< DAC concurrent mode DAC1 12-bit right-aligned data bits */
    79. 

  79. 

  80. /* DACC_L12DH */
    81. 

  81. #define DACC_L12DH_DAC0_DH      BITS(4,15)           /*!< DAC concurrent mode DAC0 12-bit left-aligned data bits */
    82. 

  82. #define DACC_L12DH_DAC1_DH      BITS(20,31)          /*!< DAC concurrent mode DAC1 12-bit left-aligned data bits */
    83. 

  83. 

  84. /* DACC_R8DH */
    85. 

  85. #define DACC_R8DH_DAC0_DH       BITS(0,7)            /*!< DAC concurrent mode DAC0 8-bit right-aligned data bits */
    86. 

  86. #define DACC_R8DH_DAC1_DH       BITS(8,15)           /*!< DAC concurrent mode DAC1 8-bit right-aligned data bits */
    87. 

  87. 

  88. /* DAC0_DO */
    89. 

  89. #define DAC0_DO_DAC0_DO         BITS(0,11)           /*!< DAC0 12-bit output data bits */
    90. 

  90. 

  91. /* DAC1_DO */
    92. 

  92. #define DAC1_DO_DAC1_DO         BITS(0,11)           /*!< DAC1 12-bit output data bits */
    93. 

  93. 

  94. /* constants definitions */
    95. 

  95. /* DAC trigger source */
    96. 

  96. #define CTL_DTSEL(regval)       (BITS(3,5) & ((uint32_t)(regval) << 3))
    97. 

  97. #define DAC_TRIGGER_T5_TRGO     CTL_DTSEL(0)         /*!< TIMER5 TRGO */
    98. 

  98. #if (defined(GD32F30X_HD) || defined(GD32F30X_XD))
    99. 

  99. #define DAC_TRIGGER_T7_TRGO     CTL_DTSEL(1)         /*!< TIMER7 TRGO */
    100. 

  100. #elif defined(GD32F30X_CL)
    101. 

  101. #define DAC_TRIGGER_T2_TRGO     CTL_DTSEL(1)         /*!< TIMER2 TRGO */
    102. 

  102. #endif /* GD32F30X_HD and GD32F30X_XD */
    103. 

  103. #define DAC_TRIGGER_T6_TRGO     CTL_DTSEL(2)         /*!< TIMER6 TRGO */
    104. 

  104. #define DAC_TRIGGER_T4_TRGO     CTL_DTSEL(3)         /*!< TIMER4 TRGO */
    105. 

  105. #define DAC_TRIGGER_T1_TRGO     CTL_DTSEL(4)         /*!< TIMER1 TRGO */
    106. 

  106. #define DAC_TRIGGER_T3_TRGO     CTL_DTSEL(5)         /*!< TIMER3 TRGO */
    107. 

  107. #define DAC_TRIGGER_EXTI_9      CTL_DTSEL(6)         /*!< EXTI interrupt line9 event */
    108. 

  108. #define DAC_TRIGGER_SOFTWARE    CTL_DTSEL(7)         /*!< software trigger */
    109. 

  109. 

  110. /* DAC noise wave mode */
    111. 

  111. #define CTL_DWM(regval)         (BITS(6,7) & ((uint32_t)(regval) << 6))
    112. 

  112. #define DAC_WAVE_DISABLE        CTL_DWM(0)           /*!< wave disable */
    113. 

  113. #define DAC_WAVE_MODE_LFSR      CTL_DWM(1)           /*!< LFSR noise mode */
    114. 

  114. #define DAC_WAVE_MODE_TRIANGLE  CTL_DWM(2)           /*!< triangle noise mode */
    115. 

  115. 

  116. /* DAC noise wave bit width */
    117. 

  117. #define DWBW(regval)            (BITS(8,11) & ((uint32_t)(regval) << 8))
    118. 

  118. #define DAC_WAVE_BIT_WIDTH_1    DWBW(0)              /*!< bit width of the wave signal is 1 */
    119. 

  119. #define DAC_WAVE_BIT_WIDTH_2    DWBW(1)              /*!< bit width of the wave signal is 2 */
    120. 

  120. #define DAC_WAVE_BIT_WIDTH_3    DWBW(2)              /*!< bit width of the wave signal is 3 */
    121. 

  121. #define DAC_WAVE_BIT_WIDTH_4    DWBW(3)              /*!< bit width of the wave signal is 4 */
    122. 

  122. #define DAC_WAVE_BIT_WIDTH_5    DWBW(4)              /*!< bit width of the wave signal is 5 */
    123. 

  123. #define DAC_WAVE_BIT_WIDTH_6    DWBW(5)              /*!< bit width of the wave signal is 6 */
    124. 

  124. #define DAC_WAVE_BIT_WIDTH_7    DWBW(6)              /*!< bit width of the wave signal is 7 */
    125. 

  125. #define DAC_WAVE_BIT_WIDTH_8    DWBW(7)              /*!< bit width of the wave signal is 8 */
    126. 

  126. #define DAC_WAVE_BIT_WIDTH_9    DWBW(8)              /*!< bit width of the wave signal is 9 */
    127. 

  127. #define DAC_WAVE_BIT_WIDTH_10   DWBW(9)              /*!< bit width of the wave signal is 10 */
    128. 

  128. #define DAC_WAVE_BIT_WIDTH_11   DWBW(10)             /*!< bit width of the wave signal is 11 */
    129. 

  129. #define DAC_WAVE_BIT_WIDTH_12   DWBW(11)             /*!< bit width of the wave signal is 12 */
    130. 

  130. 

  131. /* unmask LFSR bits in DAC LFSR noise mode */
    132. 

  132. #define DAC_LFSR_BIT0           DAC_WAVE_BIT_WIDTH_1  /*!< unmask the LFSR bit0 */
    133. 

  133. #define DAC_LFSR_BITS1_0        DAC_WAVE_BIT_WIDTH_2  /*!< unmask the LFSR bits[1:0] */
    134. 

  134. #define DAC_LFSR_BITS2_0        DAC_WAVE_BIT_WIDTH_3  /*!< unmask the LFSR bits[2:0] */
    135. 

  135. #define DAC_LFSR_BITS3_0        DAC_WAVE_BIT_WIDTH_4  /*!< unmask the LFSR bits[3:0] */
    136. 

  136. #define DAC_LFSR_BITS4_0        DAC_WAVE_BIT_WIDTH_5  /*!< unmask the LFSR bits[4:0] */
    137. 

  137. #define DAC_LFSR_BITS5_0        DAC_WAVE_BIT_WIDTH_6  /*!< unmask the LFSR bits[5:0] */
    138. 

  138. #define DAC_LFSR_BITS6_0        DAC_WAVE_BIT_WIDTH_7  /*!< unmask the LFSR bits[6:0] */
    139. 

  139. #define DAC_LFSR_BITS7_0        DAC_WAVE_BIT_WIDTH_8  /*!< unmask the LFSR bits[7:0] */
    140. 

  140. #define DAC_LFSR_BITS8_0        DAC_WAVE_BIT_WIDTH_9  /*!< unmask the LFSR bits[8:0] */
    141. 

  141. #define DAC_LFSR_BITS9_0        DAC_WAVE_BIT_WIDTH_10 /*!< unmask the LFSR bits[9:0] */
    142. 

  142. #define DAC_LFSR_BITS10_0       DAC_WAVE_BIT_WIDTH_11 /*!< unmask the LFSR bits[10:0] */
    143. 

  143. #define DAC_LFSR_BITS11_0       DAC_WAVE_BIT_WIDTH_12 /*!< unmask the LFSR bits[11:0] */
    144. 

  144. 

  145. /* triangle amplitude in DAC triangle noise mode */
    146. 

  146. #define DAC_TRIANGLE_AMPLITUDE_1    DAC_WAVE_BIT_WIDTH_1  /*!< triangle amplitude is 1 */
    147. 

  147. #define DAC_TRIANGLE_AMPLITUDE_3    DAC_WAVE_BIT_WIDTH_2  /*!< triangle amplitude is 3 */
    148. 

  148. #define DAC_TRIANGLE_AMPLITUDE_7    DAC_WAVE_BIT_WIDTH_3  /*!< triangle amplitude is 7 */
    149. 

  149. #define DAC_TRIANGLE_AMPLITUDE_15   DAC_WAVE_BIT_WIDTH_4  /*!< triangle amplitude is 15 */
    150. 

  150. #define DAC_TRIANGLE_AMPLITUDE_31   DAC_WAVE_BIT_WIDTH_5  /*!< triangle amplitude is 31 */
    151. 

  151. #define DAC_TRIANGLE_AMPLITUDE_63   DAC_WAVE_BIT_WIDTH_6  /*!< triangle amplitude is 63 */
    152. 

  152. #define DAC_TRIANGLE_AMPLITUDE_127  DAC_WAVE_BIT_WIDTH_7  /*!< triangle amplitude is 127 */
    153. 

  153. #define DAC_TRIANGLE_AMPLITUDE_255  DAC_WAVE_BIT_WIDTH_8  /*!< triangle amplitude is 255 */
    154. 

  154. #define DAC_TRIANGLE_AMPLITUDE_511  DAC_WAVE_BIT_WIDTH_9  /*!< triangle amplitude is 511 */
    155. 

  155. #define DAC_TRIANGLE_AMPLITUDE_1023 DAC_WAVE_BIT_WIDTH_10 /*!< triangle amplitude is 1023 */
    156. 

  156. #define DAC_TRIANGLE_AMPLITUDE_2047 DAC_WAVE_BIT_WIDTH_11 /*!< triangle amplitude is 2047 */
    157. 

  157. #define DAC_TRIANGLE_AMPLITUDE_4095 DAC_WAVE_BIT_WIDTH_12 /*!< triangle amplitude is 4095 */
    158. 

  158. 

  159. /* DAC data alignment */
    160. 

  160. #define DATA_ALIGN(regval)      (BITS(0,1) & ((uint32_t)(regval) << 0))
    161. 

  161. #define DAC_ALIGN_12B_R         DATA_ALIGN(0)        /*!< data right 12b alignment */
    162. 

  162. #define DAC_ALIGN_12B_L         DATA_ALIGN(1)        /*!< data left  12b alignment */
    163. 

  163. #define DAC_ALIGN_8B_R          DATA_ALIGN(2)        /*!< data right  8b alignment */
    164. 

  164. 

  165. /* function declarations */
    166. 

  166. /* deinitialize DAC */
    167. 

  167. void dac_deinit(void);
    168. 

  168. /* enable DAC */
    169. 

  169. void dac_enable(uint32_t dac_periph);
    170. 

  170. /* disable DAC */
    171. 

  171. void dac_disable(uint32_t dac_periph);
    172. 

  172. /* enable DAC DMA */
    173. 

  173. void dac_dma_enable(uint32_t dac_periph);
    174. 

  174. /* disable DAC DMA */
    175. 

  175. void dac_dma_disable(uint32_t dac_periph); 
    176. 

  176. /* enable DAC output buffer */
    177. 

  177. void dac_output_buffer_enable(uint32_t dac_periph);
    178. 

  178. /* disable DAC output buffer */
    179. 

  179. void dac_output_buffer_disable(uint32_t dac_periph);
    180. 

  180. /* enable DAC trigger */
    181. 

  181. void dac_trigger_enable(uint32_t dac_periph);
    182. 

  182. /* disable DAC trigger */
    183. 

  183. void dac_trigger_disable(uint32_t dac_periph);
    184. 

  184. /* enable DAC software trigger */
    185. 

  185. void dac_software_trigger_enable(uint32_t dac_periph);
    186. 

  186. /* disable DAC software trigger */
    187. 

  187. void dac_software_trigger_disable(uint32_t dac_periph);
    188. 

  188. 

  189. /* configure DAC trigger source */
    190. 

  190. void dac_trigger_source_config(uint32_t dac_periph, uint32_t triggersource);
    191. 

  191. /* configure DAC wave mode */
    192. 

  192. void dac_wave_mode_config(uint32_t dac_periph, uint32_t wave_mode);
    193. 

  193. /* configure DAC wave bit width */
    194. 

  194. void dac_wave_bit_width_config(uint32_t dac_periph, uint32_t bit_width);
    195. 

  195. /* configure DAC LFSR noise mode */
    196. 

  196. void dac_lfsr_noise_config(uint32_t dac_periph, uint32_t unmask_bits);
    197. 

  197. /* configure DAC triangle noise mode */
    198. 

  198. void dac_triangle_noise_config(uint32_t dac_periph, uint32_t amplitude);
    199. 

  199. /* get the last data output value */
    200. 

  200. uint16_t dac_output_value_get(uint32_t dac_periph);
    201. 

  201. 

  202. /* set DAC data holding register value */
    203. 

  203. void dac_data_set(uint32_t dac_periph, uint32_t dac_align, uint16_t data);
    204. 

  204. /* set DAC concurrent mode data holding register value */
    205. 

  205. void dac_concurrent_data_set(uint32_t dac_align, uint16_t data0, uint16_t data1); 
    206. 

  206. 

  207. /* enable DAC concurrent mode */
    208. 

  208. void dac_concurrent_enable(void);
    209. 

  209. /* disable DAC concurrent mode */
    210. 

  210. void dac_concurrent_disable(void);
    211. 

  211. /* enable DAC concurrent software trigger */
    212. 

  212. void dac_concurrent_software_trigger_enable(void);
    213. 

  213. /* disable DAC concurrent software trigger */
    214. 

  214. void dac_concurrent_software_trigger_disable(void);
    215. 

  215. /* enable DAC concurrent buffer function */
    216. 

  216. void dac_concurrent_output_buffer_enable(void);
    217. 

  217. /* disable DAC concurrent buffer function */
    218. 

  218. void dac_concurrent_output_buffer_disable(void);
    219. 

  219. 

  220. #endif /* GD32F30X_DAC_H */
    221.