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GD32F30x_standard_peripheral
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gd32f30x_gpio.h

gd32f30x_gpio.h 36 KB
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  1. /*!
    2. 

  2.     \file  gd32f30x_gpio.h
    3. 

  3.     \brief definitions for the GPIO
    4. 

  4. */
    5. 

  5. 

  6. /*
    7. 

  7.     Copyright (C) 2017 GigaDevice
    8. 

  8. 

  9.     2017-02-10, V1.0.1, firmware for GD32F30x
    10. 

  10. */
    11. 

  11. 

  12. #ifndef GD32F30X_GPIO_H
    13. 

  13. #define GD32F30X_GPIO_H
    14. 

  14. 

  15. #include "gd32f30x.h"
    16. 

  16. 

  17. /* GPIOx(x=A,B,C,D,E,F,G) definitions */
    18. 

  18. #define GPIOA                      (GPIO_BASE + 0x00000000U)
    19. 

  19. #define GPIOB                      (GPIO_BASE + 0x00000400U)
    20. 

  20. #define GPIOC                      (GPIO_BASE + 0x00000800U)
    21. 

  21. #define GPIOD                      (GPIO_BASE + 0x00000C00U)
    22. 

  22. #define GPIOE                      (GPIO_BASE + 0x00001000U)
    23. 

  23. #define GPIOF                      (GPIO_BASE + 0x00001400U)
    24. 

  24. #define GPIOG                      (GPIO_BASE + 0x00001800U)
    25. 

  25. 

  26. /* AFIO definitions */
    27. 

  27. #define AFIO                       AFIO_BASE
    28. 

  28. 

  29. /* registers definitions */
    30. 

  30. /* GPIO registers definitions */
    31. 

  31. #define GPIO_CTL0(gpiox)           REG32((gpiox) + 0x00U)    /*!< GPIO port control register 0 */
    32. 

  32. #define GPIO_CTL1(gpiox)           REG32((gpiox) + 0x04U)    /*!< GPIO port control register 1 */
    33. 

  33. #define GPIO_ISTAT(gpiox)          REG32((gpiox) + 0x08U)    /*!< GPIO port input status register */
    34. 

  34. #define GPIO_OCTL(gpiox)           REG32((gpiox) + 0x0CU)    /*!< GPIO port output control register */
    35. 

  35. #define GPIO_BOP(gpiox)            REG32((gpiox) + 0x10U)    /*!< GPIO port bit operation register */
    36. 

  36. #define GPIO_BC(gpiox)             REG32((gpiox) + 0x14U)    /*!< GPIO bit clear register */
    37. 

  37. #define GPIO_LOCK(gpiox)           REG32((gpiox) + 0x18U)    /*!< GPIO port configuration lock register */
    38. 

  38. #define GPIOx_SPD(gpiox)           REG32((gpiox) + 0x3CU)    /*!< GPIO port bit speed register */
    39. 

  39. 

  40. /* AFIO registers definitions */
    41. 

  41. #define AFIO_EC                    REG32(AFIO + 0x00U)       /*!< AFIO event control register */
    42. 

  42. #define AFIO_PCF0                  REG32(AFIO + 0x04U)       /*!< AFIO port configuration register 0 */
    43. 

  43. #define AFIO_EXTISS0               REG32(AFIO + 0x08U)       /*!< AFIO port EXTI sources selection register 0 */
    44. 

  44. #define AFIO_EXTISS1               REG32(AFIO + 0x0CU)       /*!< AFIO port EXTI sources selection register 1 */
    45. 

  45. #define AFIO_EXTISS2               REG32(AFIO + 0x10U)       /*!< AFIO port EXTI sources selection register 2 */
    46. 

  46. #define AFIO_EXTISS3               REG32(AFIO + 0x14U)       /*!< AFIO port EXTI sources selection register 3 */
    47. 

  47. #define AFIO_PCF1                  REG32(AFIO + 0x1CU)       /*!< AFIO port configuration register 1 */
    48. 

  48. #define AFIO_CPSCTL                REG32(AFIO + 0x20U)       /*!< IO compensation control register */
    49. 

  49. 

  50. /* bits definitions */
    51. 

  51. /* GPIO_CTL0 */
    52. 

  52. #define GPIO_CTL0_MD0              BITS(0,1)                 /*!< port 0 mode bits */ 
    53. 

  53. #define GPIO_CTL0_CTL0             BITS(2,3)                 /*!< pin 0 configuration bits */
    54. 

  54. #define GPIO_CTL0_MD1              BITS(4,5)                 /*!< port 1 mode bits */
    55. 

  55. #define GPIO_CTL0_CTL1             BITS(6,7)                 /*!< pin 1 configuration bits */
    56. 

  56. #define GPIO_CTL0_MD2              BITS(8,9)                 /*!< port 2 mode bits */
    57. 

  57. #define GPIO_CTL0_CTL2             BITS(10,11)               /*!< pin 2 configuration bits */
    58. 

  58. #define GPIO_CTL0_MD3              BITS(12,13)               /*!< port 3 mode bits */
    59. 

  59. #define GPIO_CTL0_CTL3             BITS(14,15)               /*!< pin 3 configuration bits */
    60. 

  60. #define GPIO_CTL0_MD4              BITS(16,17)               /*!< port 4 mode bits */
    61. 

  61. #define GPIO_CTL0_CTL4             BITS(18,19)               /*!< pin 4 configuration bits */
    62. 

  62. #define GPIO_CTL0_MD5              BITS(20,21)               /*!< port 5 mode bits */
    63. 

  63. #define GPIO_CTL0_CTL5             BITS(22,23)               /*!< pin 5 configuration bits */
    64. 

  64. #define GPIO_CTL0_MD6              BITS(24,25)               /*!< port 6 mode bits */
    65. 

  65. #define GPIO_CTL0_CTL6             BITS(26,27)               /*!< pin 6 configuration bits */
    66. 

  66. #define GPIO_CTL0_MD7              BITS(28,29)               /*!< port 7 mode bits */
    67. 

  67. #define GPIO_CTL0_CTL7             BITS(30,31)               /*!< pin 7 configuration bits */
    68. 

  68. 

  69. /* GPIO_CTL1 */
    70. 

  70. #define GPIO_CTL1_MD8              BITS(0,1)                 /*!< port 8 mode bits */ 
    71. 

  71. #define GPIO_CTL1_CTL8             BITS(2,3)                 /*!< pin 8 configuration bits */
    72. 

  72. #define GPIO_CTL1_MD9              BITS(4,5)                 /*!< port 9 mode bits */
    73. 

  73. #define GPIO_CTL1_CTL9             BITS(6,7)                 /*!< pin 9 configuration bits */
    74. 

  74. #define GPIO_CTL1_MD10             BITS(8,9)                 /*!< port 10 mode bits */
    75. 

  75. #define GPIO_CTL1_CTL10            BITS(10,11)               /*!< pin 10 configuration bits */
    76. 

  76. #define GPIO_CTL1_MD11             BITS(12,13)               /*!< port 11 mode bits */
    77. 

  77. #define GPIO_CTL1_CTL11            BITS(14,15)               /*!< pin 11 configuration bits */
    78. 

  78. #define GPIO_CTL1_MD12             BITS(16,17)               /*!< port 12 mode bits */
    79. 

  79. #define GPIO_CTL1_CTL12            BITS(18,19)               /*!< pin 12 configuration bits */
    80. 

  80. #define GPIO_CTL1_MD13             BITS(20,21)               /*!< port 13 mode bits */
    81. 

  81. #define GPIO_CTL1_CTL13            BITS(22,23)               /*!< pin 13 configuration bits */
    82. 

  82. #define GPIO_CTL1_MD14             BITS(24,25)               /*!< port 14 mode bits */
    83. 

  83. #define GPIO_CTL1_CTL14            BITS(26,27)               /*!< pin 14 configuration bits */
    84. 

  84. #define GPIO_CTL1_MD15             BITS(28,29)               /*!< port 15 mode bits */
    85. 

  85. #define GPIO_CTL1_CTL15            BITS(30,31)               /*!< pin 15 configuration bits */
    86. 

  86. 

  87. /* GPIO_ISTAT */
    88. 

  88. #define GPIO_ISTAT_ISTAT0          BIT(0)                    /*!< pin 0 input status */
    89. 

  89. #define GPIO_ISTAT_ISTAT1          BIT(1)                    /*!< pin 1 input status */
    90. 

  90. #define GPIO_ISTAT_ISTAT2          BIT(2)                    /*!< pin 2 input status */
    91. 

  91. #define GPIO_ISTAT_ISTAT3          BIT(3)                    /*!< pin 3 input status */
    92. 

  92. #define GPIO_ISTAT_ISTAT4          BIT(4)                    /*!< pin 4 input status */
    93. 

  93. #define GPIO_ISTAT_ISTAT5          BIT(5)                    /*!< pin 5 input status */
    94. 

  94. #define GPIO_ISTAT_ISTAT6          BIT(6)                    /*!< pin 6 input status */
    95. 

  95. #define GPIO_ISTAT_ISTAT7          BIT(7)                    /*!< pin 7 input status */
    96. 

  96. #define GPIO_ISTAT_ISTAT8          BIT(8)                    /*!< pin 8 input status */
    97. 

  97. #define GPIO_ISTAT_ISTAT9          BIT(9)                    /*!< pin 9 input status */
    98. 

  98. #define GPIO_ISTAT_ISTAT10         BIT(10)                   /*!< pin 10 input status */
    99. 

  99. #define GPIO_ISTAT_ISTAT11         BIT(11)                   /*!< pin 11 input status */
    100. 

  100. #define GPIO_ISTAT_ISTAT12         BIT(12)                   /*!< pin 12 input status */
    101. 

  101. #define GPIO_ISTAT_ISTAT13         BIT(13)                   /*!< pin 13 input status */
    102. 

  102. #define GPIO_ISTAT_ISTAT14         BIT(14)                   /*!< pin 14 input status */
    103. 

  103. #define GPIO_ISTAT_ISTAT15         BIT(15)                   /*!< pin 15 input status */
    104. 

  104. 

  105. /* GPIO_OCTL */
    106. 

  106. #define GPIO_OCTL_OCTL0            BIT(0)                    /*!< pin 0 output bit */
    107. 

  107. #define GPIO_OCTL_OCTL1            BIT(1)                    /*!< pin 1 output bit */
    108. 

  108. #define GPIO_OCTL_OCTL2            BIT(2)                    /*!< pin 2 output bit */
    109. 

  109. #define GPIO_OCTL_OCTL3            BIT(3)                    /*!< pin 3 output bit */
    110. 

  110. #define GPIO_OCTL_OCTL4            BIT(4)                    /*!< pin 4 output bit */
    111. 

  111. #define GPIO_OCTL_OCTL5            BIT(5)                    /*!< pin 5 output bit */
    112. 

  112. #define GPIO_OCTL_OCTL6            BIT(6)                    /*!< pin 6 output bit */
    113. 

  113. #define GPIO_OCTL_OCTL7            BIT(7)                    /*!< pin 7 output bit */
    114. 

  114. #define GPIO_OCTL_OCTL8            BIT(8)                    /*!< pin 8 output bit */
    115. 

  115. #define GPIO_OCTL_OCTL9            BIT(9)                    /*!< pin 9 output bit */
    116. 

  116. #define GPIO_OCTL_OCTL10           BIT(10)                   /*!< pin 10 output bit */
    117. 

  117. #define GPIO_OCTL_OCTL11           BIT(11)                   /*!< pin 11 output bit */
    118. 

  118. #define GPIO_OCTL_OCTL12           BIT(12)                   /*!< pin 12 output bit */
    119. 

  119. #define GPIO_OCTL_OCTL13           BIT(13)                   /*!< pin 13 output bit */
    120. 

  120. #define GPIO_OCTL_OCTL14           BIT(14)                   /*!< pin 14 output bit */
    121. 

  121. #define GPIO_OCTL_OCTL15           BIT(15)                   /*!< pin 15 output bit */
    122. 

  122. 

  123. /* GPIO_BOP */
    124. 

  124. #define GPIO_BOP_BOP0              BIT(0)                    /*!< pin 0 set bit */
    125. 

  125. #define GPIO_BOP_BOP1              BIT(1)                    /*!< pin 1 set bit */
    126. 

  126. #define GPIO_BOP_BOP2              BIT(2)                    /*!< pin 2 set bit */
    127. 

  127. #define GPIO_BOP_BOP3              BIT(3)                    /*!< pin 3 set bit */
    128. 

  128. #define GPIO_BOP_BOP4              BIT(4)                    /*!< pin 4 set bit */
    129. 

  129. #define GPIO_BOP_BOP5              BIT(5)                    /*!< pin 5 set bit */
    130. 

  130. #define GPIO_BOP_BOP6              BIT(6)                    /*!< pin 6 set bit */
    131. 

  131. #define GPIO_BOP_BOP7              BIT(7)                    /*!< pin 7 set bit */
    132. 

  132. #define GPIO_BOP_BOP8              BIT(8)                    /*!< pin 8 set bit */
    133. 

  133. #define GPIO_BOP_BOP9              BIT(9)                    /*!< pin 9 set bit */
    134. 

  134. #define GPIO_BOP_BOP10             BIT(10)                   /*!< pin 10 set bit */
    135. 

  135. #define GPIO_BOP_BOP11             BIT(11)                   /*!< pin 11 set bit */
    136. 

  136. #define GPIO_BOP_BOP12             BIT(12)                   /*!< pin 12 set bit */
    137. 

  137. #define GPIO_BOP_BOP13             BIT(13)                   /*!< pin 13 set bit */
    138. 

  138. #define GPIO_BOP_BOP14             BIT(14)                   /*!< pin 14 set bit */
    139. 

  139. #define GPIO_BOP_BOP15             BIT(15)                   /*!< pin 15 set bit */
    140. 

  140. #define GPIO_BOP_CR0               BIT(16)                   /*!< pin 0 clear bit */
    141. 

  141. #define GPIO_BOP_CR1               BIT(17)                   /*!< pin 1 clear bit */
    142. 

  142. #define GPIO_BOP_CR2               BIT(18)                   /*!< pin 2 clear bit */
    143. 

  143. #define GPIO_BOP_CR3               BIT(19)                   /*!< pin 3 clear bit */
    144. 

  144. #define GPIO_BOP_CR4               BIT(20)                   /*!< pin 4 clear bit */
    145. 

  145. #define GPIO_BOP_CR5               BIT(21)                   /*!< pin 5 clear bit */
    146. 

  146. #define GPIO_BOP_CR6               BIT(22)                   /*!< pin 6 clear bit */
    147. 

  147. #define GPIO_BOP_CR7               BIT(23)                   /*!< pin 7 clear bit */
    148. 

  148. #define GPIO_BOP_CR8               BIT(24)                   /*!< pin 8 clear bit */
    149. 

  149. #define GPIO_BOP_CR9               BIT(25)                   /*!< pin 9 clear bit */
    150. 

  150. #define GPIO_BOP_CR10              BIT(26)                   /*!< pin 10 clear bit */
    151. 

  151. #define GPIO_BOP_CR11              BIT(27)                   /*!< pin 11 clear bit */
    152. 

  152. #define GPIO_BOP_CR12              BIT(28)                   /*!< pin 12 clear bit */
    153. 

  153. #define GPIO_BOP_CR13              BIT(29)                   /*!< pin 13 clear bit */
    154. 

  154. #define GPIO_BOP_CR14              BIT(30)                   /*!< pin 14 clear bit */
    155. 

  155. #define GPIO_BOP_CR15              BIT(31)                   /*!< pin 15 clear bit */
    156. 

  156. 

  157. /* GPIO_BC */
    158. 

  158. #define GPIO_BC_CR0                BIT(0)                    /*!< pin 0 clear bit */
    159. 

  159. #define GPIO_BC_CR1                BIT(1)                    /*!< pin 1 clear bit */
    160. 

  160. #define GPIO_BC_CR2                BIT(2)                    /*!< pin 2 clear bit */
    161. 

  161. #define GPIO_BC_CR3                BIT(3)                    /*!< pin 3 clear bit */
    162. 

  162. #define GPIO_BC_CR4                BIT(4)                    /*!< pin 4 clear bit */
    163. 

  163. #define GPIO_BC_CR5                BIT(5)                    /*!< pin 5 clear bit */
    164. 

  164. #define GPIO_BC_CR6                BIT(6)                    /*!< pin 6 clear bit */
    165. 

  165. #define GPIO_BC_CR7                BIT(7)                    /*!< pin 7 clear bit */
    166. 

  166. #define GPIO_BC_CR8                BIT(8)                    /*!< pin 8 clear bit */
    167. 

  167. #define GPIO_BC_CR9                BIT(9)                    /*!< pin 9 clear bit */
    168. 

  168. #define GPIO_BC_CR10               BIT(10)                   /*!< pin 10 clear bit */
    169. 

  169. #define GPIO_BC_CR11               BIT(11)                   /*!< pin 11 clear bit */
    170. 

  170. #define GPIO_BC_CR12               BIT(12)                   /*!< pin 12 clear bit */
    171. 

  171. #define GPIO_BC_CR13               BIT(13)                   /*!< pin 13 clear bit */
    172. 

  172. #define GPIO_BC_CR14               BIT(14)                   /*!< pin 14 clear bit */
    173. 

  173. #define GPIO_BC_CR15               BIT(15)                   /*!< pin 15 clear bit */
    174. 

  174. 

  175. /* GPIO_LOCK */
    176. 

  176. #define GPIO_LOCK_LK0              BIT(0)                    /*!< pin 0 lock bit */
    177. 

  177. #define GPIO_LOCK_LK1              BIT(1)                    /*!< pin 1 lock bit */
    178. 

  178. #define GPIO_LOCK_LK2              BIT(2)                    /*!< pin 2 lock bit */
    179. 

  179. #define GPIO_LOCK_LK3              BIT(3)                    /*!< pin 3 lock bit */
    180. 

  180. #define GPIO_LOCK_LK4              BIT(4)                    /*!< pin 4 lock bit */
    181. 

  181. #define GPIO_LOCK_LK5              BIT(5)                    /*!< pin 5 lock bit */
    182. 

  182. #define GPIO_LOCK_LK6              BIT(6)                    /*!< pin 6 lock bit */
    183. 

  183. #define GPIO_LOCK_LK7              BIT(7)                    /*!< pin 7 lock bit */
    184. 

  184. #define GPIO_LOCK_LK8              BIT(8)                    /*!< pin 8 lock bit */
    185. 

  185. #define GPIO_LOCK_LK9              BIT(9)                    /*!< pin 9 lock bit */
    186. 

  186. #define GPIO_LOCK_LK10             BIT(10)                   /*!< pin 10 lock bit */
    187. 

  187. #define GPIO_LOCK_LK11             BIT(11)                   /*!< pin 11 lock bit */
    188. 

  188. #define GPIO_LOCK_LK12             BIT(12)                   /*!< pin 12 lock bit */
    189. 

  189. #define GPIO_LOCK_LK13             BIT(13)                   /*!< pin 13 lock bit */
    190. 

  190. #define GPIO_LOCK_LK14             BIT(14)                   /*!< pin 14 lock bit */
    191. 

  191. #define GPIO_LOCK_LK15             BIT(15)                   /*!< pin 15 lock bit */
    192. 

  192. #define GPIO_LOCK_LKK              BIT(16)                   /*!< pin sequence lock key */
    193. 

  193. 

  194. /* GPIO_SPD */
    195. 

  195. #define GPIO_SPD_SPD0              BIT(0)                    /*!< pin 0 set very high output speed when MDx is 0b11 */
    196. 

  196. #define GPIO_SPD_SPD1              BIT(1)                    /*!< pin 1 set very high output speed when MDx is 0b11 */
    197. 

  197. #define GPIO_SPD_SPD2              BIT(2)                    /*!< pin 2 set very high output speed when MDx is 0b11 */
    198. 

  198. #define GPIO_SPD_SPD3              BIT(3)                    /*!< pin 3 set very high output speed when MDx is 0b11 */
    199. 

  199. #define GPIO_SPD_SPD4              BIT(4)                    /*!< pin 4 set very high output speed when MDx is 0b11 */
    200. 

  200. #define GPIO_SPD_SPD5              BIT(5)                    /*!< pin 5 set very high output speed when MDx is 0b11 */
    201. 

  201. #define GPIO_SPD_SPD6              BIT(6)                    /*!< pin 6 set very high output speed when MDx is 0b11 */
    202. 

  202. #define GPIO_SPD_SPD7              BIT(7)                    /*!< pin 7 set very high output speed when MDx is 0b11 */
    203. 

  203. #define GPIO_SPD_SPD8              BIT(8)                    /*!< pin 8 set very high output speed when MDx is 0b11 */
    204. 

  204. #define GPIO_SPD_SPD9              BIT(9)                    /*!< pin 9 set very high output speed when MDx is 0b11 */
    205. 

  205. #define GPIO_SPD_SPD10             BIT(10)                   /*!< pin 10 set very high output speed when MDx is 0b11 */
    206. 

  206. #define GPIO_SPD_SPD11             BIT(11)                   /*!< pin 11 set very high output speed when MDx is 0b11 */
    207. 

  207. #define GPIO_SPD_SPD12             BIT(12)                   /*!< pin 12 set very high output speed when MDx is 0b11 */
    208. 

  208. #define GPIO_SPD_SPD13             BIT(13)                   /*!< pin 13 set very high output speed when MDx is 0b11 */
    209. 

  209. #define GPIO_SPD_SPD14             BIT(14)                   /*!< pin 14 set very high output speed when MDx is 0b11 */
    210. 

  210. #define GPIO_SPD_SPD15             BIT(15)                   /*!< pin 15 set very high output speed when MDx is 0b11 */
    211. 

  211. 

  212. /* AFIO_EC */
    213. 

  213. #define AFIO_EC_PIN                BITS(0,3)                 /*!< event output pin selection */
    214. 

  214. #define AFIO_EC_PORT               BITS(4,6)                 /*!< event output port selection */
    215. 

  215. #define AFIO_EC_EOE                BIT(7)                    /*!< event output enable */
    216. 

  216. 

  217. /* AFIO_PCF0 */
    218. 

  218. #ifdef GD32F30X_CL
    219. 

  219. /* memory map and bit definitions for GD32F30X_CL devices */
    220. 

  220. #define AFIO_PCF0_SPI0_REMAP             BIT(0)              /*!< SPI0 remapping */
    221. 

  221. #define AFIO_PCF0_I2C0_REMAP             BIT(1)              /*!< I2C0 remapping */
    222. 

  222. #define AFIO_PCF0_USART0_REMAP           BIT(2)              /*!< USART0 remapping */
    223. 

  223. #define AFIO_PCF0_USART1_REMAP           BIT(3)              /*!< USART1 remapping */
    224. 

  224. #define AFIO_PCF0_USART2_REMAP           BITS(4,5)           /*!< USART2 remapping */
    225. 

  225. #define AFIO_PCF0_TIMER0_REMAP           BITS(6,7)           /*!< TIMER0 remapping */
    226. 

  226. #define AFIO_PCF0_TIMER1_REMAP           BITS(8,9)           /*!< TIMER1 remapping */
    227. 

  227. #define AFIO_PCF0_TIMER2_REMAP           BITS(10,11)         /*!< TIMER2 remapping */
    228. 

  228. #define AFIO_PCF0_TIMER3_REMAP           BIT(12)             /*!< TIMER3 remapping */
    229. 

  229. #define AFIO_PCF0_CAN0_REMAP             BITS(13,14)         /*!< CAN0 remapping */
    230. 

  230. #define AFIO_PCF0_PD01_REMAP             BIT(15)             /*!< port D0/port D1 mapping on OSC_IN/OSC_OUT */
    231. 

  231. #define AFIO_PCF0_TIMER4CH3_IREMAP       BIT(16)             /*!< TIMER4 channel3 internal remapping */
    232. 

  232. #define AFIO_PCF0_ENET_REMAP             BIT(21)             /*!< ethernet MAC I/O remapping */
    233. 

  233. #define AFIO_PCF0_CAN1_REMAP             BIT(22)             /*!< CAN1 remapping */
    234. 

  234. #define AFIO_PCF0_ENET_PHY_SEL           BIT(23)             /*!< ethernet MII or RMII PHY selection */
    235. 

  235. #define AFIO_PCF0_SWJ_CFG                BITS(24,26)         /*!< serial wire JTAG configuration */
    236. 

  236. #define AFIO_PCF0_SPI2_REMAP             BIT(28)             /*!< SPI2/I2S2 remapping */
    237. 

  237. #define AFIO_PCF0_TIMER1ITR0_REMAP       BIT(29)             /*!< TIMER1 internal trigger 0 remapping */
    238. 

  238. #define AFIO_PCF0_PTP_PPS_REMAP          BIT(30)             /*!< ethernet PTP PPS remapping */
    239. 

  239. 

  240. #else 
    241. 

  241. /* memory map and bit definitions for GD32F30X_HD devices and GD32F30X_XD devices */
    242. 

  242. #define AFIO_PCF0_SPI0_REMAP             BIT(0)              /*!< SPI0 remapping */
    243. 

  243. #define AFIO_PCF0_I2C0_REMAP             BIT(1)              /*!< I2C0 remapping */
    244. 

  244. #define AFIO_PCF0_USART0_REMAP           BIT(2)              /*!< USART0 remapping */
    245. 

  245. #define AFIO_PCF0_USART1_REMAP           BIT(3)              /*!< USART1 remapping */
    246. 

  246. #define AFIO_PCF0_USART2_REMAP           BITS(4,5)           /*!< USART2 remapping */
    247. 

  247. #define AFIO_PCF0_TIMER0_REMAP           BITS(6,7)           /*!< TIMER0 remapping */
    248. 

  248. #define AFIO_PCF0_TIMER1_REMAP           BITS(8,9)           /*!< TIMER1 remapping */
    249. 

  249. #define AFIO_PCF0_TIMER2_REMAP           BITS(10,11)         /*!< TIMER2 remapping */
    250. 

  250. #define AFIO_PCF0_TIMER3_REMAP           BIT(12)             /*!< TIMER3 remapping */
    251. 

  251. #define AFIO_PCF0_CAN_REMAP              BITS(13,14)         /*!< CAN remapping */
    252. 

  252. #define AFIO_PCF0_PD01_REMAP             BIT(15)             /*!< port D0/port D1 mapping on OSC_IN/OSC_OUT */
    253. 

  253. #define AFIO_PCF0_TIMER4CH3_REMAP        BIT(16)             /*!< TIMER4 channel3 internal remapping */
    254. 

  254. #define AFIO_PCF0_ADC0_ETRGINS_REMAP     BIT(17)             /*!< ADC 0 external trigger inserted conversion remapping */
    255. 

  255. #define AFIO_PCF0_ADC0_ETRGREG_REMAP     BIT(18)             /*!< ADC 0 external trigger regular conversion remapping */
    256. 

  256. #define AFIO_PCF0_ADC1_ETRGINS_REMAP     BIT(19)             /*!< ADC 1 external trigger inserted conversion remapping */
    257. 

  257. #define AFIO_PCF0_ADC1_ETRGREG_REMAP     BIT(20)             /*!< ADC 1 external trigger regular conversion remapping */
    258. 

  258. #define AFIO_PCF0_SWJ_CFG                BITS(24,26)         /*!< serial wire JTAG configuration */
    259. 

  259. #endif /* GD32F30X_CL */
    260. 

  260. 

  261. /* AFIO_EXTISS0 */
    262. 

  262. #define AFIO_EXTI0_SS                    BITS(0,3)           /*!< EXTI 0 sources selection */
    263. 

  263. #define AFIO_EXTI1_SS                    BITS(4,7)           /*!< EXTI 1 sources selection */
    264. 

  264. #define AFIO_EXTI2_SS                    BITS(8,11)          /*!< EXTI 2 sources selection */
    265. 

  265. #define AFIO_EXTI3_SS                    BITS(12,15)         /*!< EXTI 3 sources selection */
    266. 

  266. 

  267. /* AFIO_EXTISS1 */
    268. 

  268. #define AFIO_EXTI4_SS                    BITS(0,3)           /*!< EXTI 4 sources selection */
    269. 

  269. #define AFIO_EXTI5_SS                    BITS(4,7)           /*!< EXTI 5 sources selection */
    270. 

  270. #define AFIO_EXTI6_SS                    BITS(8,11)          /*!< EXTI 6 sources selection */
    271. 

  271. #define AFIO_EXTI7_SS                    BITS(12,15)         /*!< EXTI 7 sources selection */
    272. 

  272. 

  273. /* AFIO_EXTISS2 */
    274. 

  274. #define AFIO_EXTI8_SS                    BITS(0,3)           /*!< EXTI 8 sources selection */
    275. 

  275. #define AFIO_EXTI9_SS                    BITS(4,7)           /*!< EXTI 9 sources selection */
    276. 

  276. #define AFIO_EXTI10_SS                   BITS(8,11)          /*!< EXTI 10 sources selection */
    277. 

  277. #define AFIO_EXTI11_SS                   BITS(12,15)         /*!< EXTI 11 sources selection */
    278. 

  278. 

  279. /* AFIO_EXTISS3 */
    280. 

  280. #define AFIO_EXTI12_SS                   BITS(0,3)           /*!< EXTI 12 sources selection */
    281. 

  281. #define AFIO_EXTI13_SS                   BITS(4,7)           /*!< EXTI 13 sources selection */
    282. 

  282. #define AFIO_EXTI14_SS                   BITS(8,11)          /*!< EXTI 14 sources selection */
    283. 

  283. #define AFIO_EXTI15_SS                   BITS(12,15)         /*!< EXTI 15 sources selection */
    284. 

  284. 

  285. /* AFIO_PCF1 */
    286. 

  286. #define AFIO_PCF1_TIMER8_REMAP           BIT(5)              /*!< TIMER8 remapping */
    287. 

  287. #define AFIO_PCF1_TIMER9_REMAP           BIT(6)              /*!< TIMER9 remapping */
    288. 

  288. #define AFIO_PCF1_TIMER10_REMAP          BIT(7)              /*!< TIMER10 remapping */
    289. 

  289. #define AFIO_PCF1_TIMER12_REMAP          BIT(8)              /*!< TIMER12 remapping */
    290. 

  290. #define AFIO_PCF1_TIMER13_REMAP          BIT(9)              /*!< TIMER13 remapping */
    291. 

  291. #define AFIO_PCF1_EXMC_NADV              BIT(10)             /*!< EXMC_NADV connect/disconnect */
    292. 

  292. #define AFIO_PCF1_CTC_REMAP              BITS(11,12)         /*!< CTC remapping */
    293. 

  293. 

  294. /* AFIO_CPSCTL */
    295. 

  295. #define AFIO_CPSCTL_CPS_EN               BIT(0)              /*!< I/O compensation cell enable */
    296. 

  296. #define AFIO_CPSCTL_CPS_RDY              BIT(8)              /*!< I/O compensation cell is ready or not */
    297. 

  297. 

  298. /* constants definitions */
    299. 

  299. typedef FlagStatus bit_status;
    300. 

  300. 

  301. /* GPIO mode values set */
    302. 

  302. #define GPIO_MODE_SET(n, mode)           ((uint32_t)((uint32_t)(mode) << (4U * (n))))
    303. 

  303. #define GPIO_MODE_MASK(n)                (0xFU << (4U * (n)))
    304. 

  304. 

  305. /* GPIO mode definitions */
    306. 

  306. #define GPIO_MODE_AIN                    ((uint8_t)0x00U)          /*!< analog input mode */
    307. 

  307. #define GPIO_MODE_IN_FLOATING            ((uint8_t)0x04U)          /*!< floating input mode */
    308. 

  308. #define GPIO_MODE_IPD                    ((uint8_t)0x28U)          /*!< pull-down input mode */
    309. 

  309. #define GPIO_MODE_IPU                    ((uint8_t)0x48U)          /*!< pull-up input mode */
    310. 

  310. #define GPIO_MODE_OUT_OD                 ((uint8_t)0x14U)          /*!< GPIO output with open-drain */
    311. 

  311. #define GPIO_MODE_OUT_PP                 ((uint8_t)0x10U)          /*!< GPIO output with push-pull */
    312. 

  312. #define GPIO_MODE_AF_OD                  ((uint8_t)0x1CU)          /*!< AFIO output with open-drain */
    313. 

  313. #define GPIO_MODE_AF_PP                  ((uint8_t)0x18U)          /*!< AFIO output with push-pull */
    314. 

  314. 

  315. /* GPIO output max speed value */
    316. 

  316. #define GPIO_OSPEED_10MHZ                ((uint8_t)0x01U)          /*!< output max speed 10MHz */
    317. 

  317. #define GPIO_OSPEED_2MHZ                 ((uint8_t)0x02U)          /*!< output max speed 2MHz */
    318. 

  318. #define GPIO_OSPEED_50MHZ                ((uint8_t)0x03U)          /*!< output max speed 50MHz */
    319. 

  319. #define GPIO_OSPEED_MAX                  ((uint8_t)0x04U)          /*!< GPIO very high output speed, max speed more than 50MHz */
    320. 

  320. 

  321. /* GPIO event output port definitions */
    322. 

  322. #define GPIO_EVENT_PORT_GPIOA            ((uint8_t)0x00U)          /*!< event output port A */
    323. 

  323. #define GPIO_EVENT_PORT_GPIOB            ((uint8_t)0x01U)          /*!< event output port B */
    324. 

  324. #define GPIO_EVENT_PORT_GPIOC            ((uint8_t)0x02U)          /*!< event output port C */
    325. 

  325. #define GPIO_EVENT_PORT_GPIOD            ((uint8_t)0x03U)          /*!< event output port D */
    326. 

  326. #define GPIO_EVENT_PORT_GPIOE            ((uint8_t)0x04U)          /*!< event output port E */
    327. 

  327. 

  328. /* GPIO output port source definitions */
    329. 

  329. #define GPIO_PORT_SOURCE_GPIOA           ((uint8_t)0x00U)          /*!< output port source A */
    330. 

  330. #define GPIO_PORT_SOURCE_GPIOB           ((uint8_t)0x01U)          /*!< output port source B */
    331. 

  331. #define GPIO_PORT_SOURCE_GPIOC           ((uint8_t)0x02U)          /*!< output port source C */
    332. 

  332. #define GPIO_PORT_SOURCE_GPIOD           ((uint8_t)0x03U)          /*!< output port source D */
    333. 

  333. #define GPIO_PORT_SOURCE_GPIOE           ((uint8_t)0x04U)          /*!< output port source E */
    334. 

  334. #define GPIO_PORT_SOURCE_GPIOF           ((uint8_t)0x05U)          /*!< output port source F */
    335. 

  335. #define GPIO_PORT_SOURCE_GPIOG           ((uint8_t)0x06U)          /*!< output port source G */
    336. 

  336. 

  337. /* GPIO event output pin definitions */
    338. 

  338. #define GPIO_EVENT_PIN_0                 ((uint8_t)0x00U)          /*!< GPIO event pin 0 */
    339. 

  339. #define GPIO_EVENT_PIN_1                 ((uint8_t)0x01U)          /*!< GPIO event pin 1 */
    340. 

  340. #define GPIO_EVENT_PIN_2                 ((uint8_t)0x02U)          /*!< GPIO event pin 2 */
    341. 

  341. #define GPIO_EVENT_PIN_3                 ((uint8_t)0x03U)          /*!< GPIO event pin 3 */
    342. 

  342. #define GPIO_EVENT_PIN_4                 ((uint8_t)0x04U)          /*!< GPIO event pin 4 */
    343. 

  343. #define GPIO_EVENT_PIN_5                 ((uint8_t)0x05U)          /*!< GPIO event pin 5 */
    344. 

  344. #define GPIO_EVENT_PIN_6                 ((uint8_t)0x06U)          /*!< GPIO event pin 6 */
    345. 

  345. #define GPIO_EVENT_PIN_7                 ((uint8_t)0x07U)          /*!< GPIO event pin 7 */
    346. 

  346. #define GPIO_EVENT_PIN_8                 ((uint8_t)0x08U)          /*!< GPIO event pin 8 */
    347. 

  347. #define GPIO_EVENT_PIN_9                 ((uint8_t)0x09U)          /*!< GPIO event pin 9 */
    348. 

  348. #define GPIO_EVENT_PIN_10                ((uint8_t)0x0AU)          /*!< GPIO event pin 10 */
    349. 

  349. #define GPIO_EVENT_PIN_11                ((uint8_t)0x0BU)          /*!< GPIO event pin 11 */
    350. 

  350. #define GPIO_EVENT_PIN_12                ((uint8_t)0x0CU)          /*!< GPIO event pin 12 */
    351. 

  351. #define GPIO_EVENT_PIN_13                ((uint8_t)0x0DU)          /*!< GPIO event pin 13 */
    352. 

  352. #define GPIO_EVENT_PIN_14                ((uint8_t)0x0EU)          /*!< GPIO event pin 14 */
    353. 

  353. #define GPIO_EVENT_PIN_15                ((uint8_t)0x0FU)          /*!< GPIO event pin 15 */
    354. 

  354. 

  355. /* GPIO output pin source definitions */
    356. 

  356. #define GPIO_PIN_SOURCE_0                ((uint8_t)0x00U)          /*!< GPIO pin source 0 */
    357. 

  357. #define GPIO_PIN_SOURCE_1                ((uint8_t)0x01U)          /*!< GPIO pin source 1 */
    358. 

  358. #define GPIO_PIN_SOURCE_2                ((uint8_t)0x02U)          /*!< GPIO pin source 2 */
    359. 

  359. #define GPIO_PIN_SOURCE_3                ((uint8_t)0x03U)          /*!< GPIO pin source 3 */
    360. 

  360. #define GPIO_PIN_SOURCE_4                ((uint8_t)0x04U)          /*!< GPIO pin source 4 */
    361. 

  361. #define GPIO_PIN_SOURCE_5                ((uint8_t)0x05U)          /*!< GPIO pin source 5 */
    362. 

  362. #define GPIO_PIN_SOURCE_6                ((uint8_t)0x06U)          /*!< GPIO pin source 6 */
    363. 

  363. #define GPIO_PIN_SOURCE_7                ((uint8_t)0x07U)          /*!< GPIO pin source 7 */
    364. 

  364. #define GPIO_PIN_SOURCE_8                ((uint8_t)0x08U)          /*!< GPIO pin source 8 */
    365. 

  365. #define GPIO_PIN_SOURCE_9                ((uint8_t)0x09U)          /*!< GPIO pin source 9 */
    366. 

  366. #define GPIO_PIN_SOURCE_10               ((uint8_t)0x0AU)          /*!< GPIO pin source 10 */
    367. 

  367. #define GPIO_PIN_SOURCE_11               ((uint8_t)0x0BU)          /*!< GPIO pin source 11 */
    368. 

  368. #define GPIO_PIN_SOURCE_12               ((uint8_t)0x0CU)          /*!< GPIO pin source 12 */
    369. 

  369. #define GPIO_PIN_SOURCE_13               ((uint8_t)0x0DU)          /*!< GPIO pin source 13 */
    370. 

  370. #define GPIO_PIN_SOURCE_14               ((uint8_t)0x0EU)          /*!< GPIO pin source 14 */
    371. 

  371. #define GPIO_PIN_SOURCE_15               ((uint8_t)0x0FU)          /*!< GPIO pin source 15 */
    372. 

  372. 

  373. /* GPIO pin definitions */
    374. 

  374. #define GPIO_PIN_0                       BIT(0)                    /*!< GPIO pin 0 */
    375. 

  375. #define GPIO_PIN_1                       BIT(1)                    /*!< GPIO pin 1 */
    376. 

  376. #define GPIO_PIN_2                       BIT(2)                    /*!< GPIO pin 2 */
    377. 

  377. #define GPIO_PIN_3                       BIT(3)                    /*!< GPIO pin 3 */
    378. 

  378. #define GPIO_PIN_4                       BIT(4)                    /*!< GPIO pin 4 */
    379. 

  379. #define GPIO_PIN_5                       BIT(5)                    /*!< GPIO pin 5 */
    380. 

  380. #define GPIO_PIN_6                       BIT(6)                    /*!< GPIO pin 6 */
    381. 

  381. #define GPIO_PIN_7                       BIT(7)                    /*!< GPIO pin 7 */
    382. 

  382. #define GPIO_PIN_8                       BIT(8)                    /*!< GPIO pin 8 */
    383. 

  383. #define GPIO_PIN_9                       BIT(9)                    /*!< GPIO pin 9 */
    384. 

  384. #define GPIO_PIN_10                      BIT(10)                   /*!< GPIO pin 10 */
    385. 

  385. #define GPIO_PIN_11                      BIT(11)                   /*!< GPIO pin 11 */
    386. 

  386. #define GPIO_PIN_12                      BIT(12)                   /*!< GPIO pin 12 */
    387. 

  387. #define GPIO_PIN_13                      BIT(13)                   /*!< GPIO pin 13 */
    388. 

  388. #define GPIO_PIN_14                      BIT(14)                   /*!< GPIO pin 14 */
    389. 

  389. #define GPIO_PIN_15                      BIT(15)                   /*!< GPIO pin 15 */
    390. 

  390. #define GPIO_PIN_ALL                     BITS(0,15)                /*!< GPIO pin all */
    391. 

  391. 

  392. /* GPIO remap definitions */
    393. 

  393. #define GPIO_SPI0_REMAP                  ((uint32_t)0x00000001U)   /*!< SPI0 remapping */
    394. 

  394. #define GPIO_I2C0_REMAP                  ((uint32_t)0x00000002U)   /*!< I2C0 remapping */
    395. 

  395. #define GPIO_USART0_REMAP                ((uint32_t)0x00000004U)   /*!< USART0 remapping */
    396. 

  396. #define GPIO_USART1_REMAP                ((uint32_t)0x00000008U)   /*!< USART1 remapping */
    397. 

  397. #define GPIO_USART2_PARTIAL_REMAP        ((uint32_t)0x00140010U)   /*!< USART2 partial remapping */
    398. 

  398. #define GPIO_USART2_FULL_REMAP           ((uint32_t)0x00140030U)   /*!< USART2 full remapping */
    399. 

  399. #define GPIO_TIMER0_PARTIAL_REMAP        ((uint32_t)0x00160040U)   /*!< TIMER0 partial remapping */
    400. 

  400. #define GPIO_TIMER0_FULL_REMAP           ((uint32_t)0x001600C0U)   /*!< TIMER0 full remapping */
    401. 

  401. #define GPIO_TIMER1_PARTIAL_REMAP0       ((uint32_t)0x00180100U)   /*!< TIMER1 partial remapping */
    402. 

  402. #define GPIO_TIMER1_PARTIAL_REMAP1       ((uint32_t)0x00180200U)   /*!< TIMER1 partial remapping */
    403. 

  403. #define GPIO_TIMER1_FULL_REMAP           ((uint32_t)0x00180300U)   /*!< TIMER1 full remapping */
    404. 

  404. #define GPIO_TIMER2_PARTIAL_REMAP        ((uint32_t)0x001A0800U)   /*!< TIMER2 partial remapping */
    405. 

  405. #define GPIO_TIMER2_FULL_REMAP           ((uint32_t)0x001A0C00U)   /*!< TIMER2 full remapping */
    406. 

  406. #define GPIO_TIMER3_REMAP                ((uint32_t)0x00001000U)   /*!< TIMER3 remapping */
    407. 

  407. #define GPIO_PD01_REMAP                  ((uint32_t)0x00008000U)   /*!< PD01 remapping */
    408. 

  408. #if (defined(GD32F30X_HD) || defined(GD32F30X_XD))
    409. 

  409. #define GPIO_CAN_PARTIAL_REMAP           ((uint32_t)0x001D4000U)   /*!< CAN partial remapping(only for GD32F30X_HD devices and GD32F30X_XD devices) */
    410. 

  410. #define GPIO_CAN_FULL_REMAP              ((uint32_t)0x001D6000U)   /*!< CAN full remapping(only for GD32F30X_HD devices and GD32F30X_XD devices) */
    411. 

  411. #endif /* GD32F30X_HD||GD32F30X_XD */
    412. 

  412. #if (defined(GD32F30X_CL) || defined(GD32F30X_HD))
    413. 

  413. #define GPIO_TIMER4CH3_IREMAP            ((uint32_t)0x00200001U)   /*!< TIMER4 channel3 internal remapping(only for GD32F30X_CL devices and GD32F30X_HD devices) */
    414. 

  414. #endif /* GD32F30X_CL||GD32F30X_HD */
    415. 

  415. #if (defined(GD32F30X_HD) || defined(GD32F30X_XD))
    416. 

  416. #define GPIO_ADC0_ETRGINS_REMAP          ((uint32_t)0x00200002U)   /*!< ADC0 external trigger inserted conversion remapping(only for GD32F30X_HD devices and GD32F30X_XD devices) */
    417. 

  417. #define GPIO_ADC0_ETRGREG_REMAP          ((uint32_t)0x00200004U)   /*!< ADC0 external trigger regular conversion remapping(only for GD32F30X_HD devices and GD32F30X_XD devices) */
    418. 

  418. #define GPIO_ADC1_ETRGINS_REMAP          ((uint32_t)0x00200008U)   /*!< ADC1 external trigger inserted conversion remapping(only for GD32F30X_HD devices and GD32F30X_XD devices) */
    419. 

  419. #define GPIO_ADC1_ETRGREG_REMAP          ((uint32_t)0x00200010U)   /*!< ADC1 external trigger regular conversion remapping(only for GD32F30X_HD devices and GD32F30X_XD devices) */
    420. 

  420. #endif /* GD32F30X_HD||GD32F30X_XD */
    421. 

  421. #define GPIO_SWJ_NONJTRST_REMAP          ((uint32_t)0x00300100U)   /*!< full SWJ(JTAG-DP + SW-DP),but without NJTRST */
    422. 

  422. #define GPIO_SWJ_SWDPENABLE_REMAP        ((uint32_t)0x00300200U)   /*!< JTAG-DP disabled and SW-DP enabled */
    423. 

  423. #define GPIO_SWJ_DISABLE_REMAP           ((uint32_t)0x00300400U)   /*!< JTAG-DP disabled and SW-DP disabled */
    424. 

  424. #ifdef GD32F30X_CL
    425. 

  425. #define GPIO_CAN0_PARTIAL_REMAP          ((uint32_t)0x001D4000U)   /*!< CAN0 partial remapping(only for GD32F30X_CL devices) */
    426. 

  426. #define GPIO_CAN0_FULL_REMAP             ((uint32_t)0x001D6000U)   /*!< CAN0 full remapping(only for GD32F30X_CL devices) */
    427. 

  427. #define GPIO_ENET_REMAP                  ((uint32_t)0x00200020U)   /*!< ENET remapping(only for GD32F30X_CL devices) */
    428. 

  428. #define GPIO_CAN1_REMAP                  ((uint32_t)0x00200040U)   /*!< CAN1 remapping(only for GD32F30X_CL devices) */
    429. 

  429. #define GPIO_SPI2_REMAP                  ((uint32_t)0x00201100U)   /*!< SPI2 remapping(only for GD32F30X_CL devices) */
    430. 

  430. #define GPIO_TIMER1ITR0_REMAP            ((uint32_t)0x00202000U)   /*!< TIMER1 internal trigger 0 remapping(only for GD32F30X_CL devices) */
    431. 

  431. #define GPIO_PTP_PPS_REMAP               ((uint32_t)0x00204000U)   /*!< ethernet PTP PPS remapping(only for GD32F30X_CL devices) */
    432. 

  432. #endif /* GD32F30X_CL */
    433. 

  433. #define GPIO_TIMER8_REMAP                ((uint32_t)0x80000020U)   /*!< TIMER8 remapping */
    434. 

  434. #define GPIO_TIMER9_REMAP                ((uint32_t)0x80000040U)   /*!< TIMER9 remapping */
    435. 

  435. #define GPIO_TIMER10_REMAP               ((uint32_t)0x80000080U)   /*!< TIMER10 remapping */
    436. 

  436. #define GPIO_TIMER12_REMAP               ((uint32_t)0x80000100U)   /*!< TIMER12 remapping */
    437. 

  437. #define GPIO_TIMER13_REMAP               ((uint32_t)0x80000200U)   /*!< TIMER13 remapping */
    438. 

  438. #define GPIO_EXMC_NADV_REMAP             ((uint32_t)0x80000400U)   /*!< EXMC_NADV connect/disconnect */
    439. 

  439. #define GPIO_CTC_REMAP0                  ((uint32_t)0x801B0800U)   /*!< CTC remapping(PD15)*/
    440. 

  440. #define GPIO_CTC_REMAP1                  ((uint32_t)0x801B1000U)   /*!< CTC remapping(PF0) */
    441. 

  441. 

  442. #ifdef GD32F30X_CL
    443. 

  443. /* ethernet MII or RMII PHY selection */
    444. 

  444. #define GPIO_ENET_PHY_MII                ((uint32_t)0x00000000U)   /*!< configure ethernet MAC for connection with an MII PHY */
    445. 

  445. #define GPIO_ENET_PHY_RMII               AFIO_PCF0_ENET_PHY_SEL    /*!< configure ethernet MAC for connection with an RMII PHY */
    446. 

  446. #endif /* GD32F30X_CL */
    447. 

  447. 

  448. /* I/O compensation cell enable/disable */
    449. 

  449. #define GPIO_COMPENSATION_ENABLE         AFIO_CPSCTL_CPS_EN        /*!< I/O compensation cell is enable */
    450. 

  450. #define GPIO_COMPENSATION_DISABLE        ((uint32_t)0x00000000U)   /*!< I/O compensation cell is disable */
    451. 

  451. 

  452. /* function declarations */
    453. 

  453. /* reset GPIO port */
    454. 

  454. void gpio_deinit(uint32_t gpio_periph);
    455. 

  455. /* reset alternate function I/O(AFIO) */
    456. 

  456. void gpio_afio_deinit(void);
    457. 

  457. /* GPIO parameter initialization */
    458. 

  458. void gpio_init(uint32_t gpio_periph, uint32_t mode, uint32_t speed, uint32_t pin);
    459. 

  459. 

  460. /* set GPIO pin bit */
    461. 

  461. void gpio_bit_set(uint32_t gpio_periph, uint32_t pin);
    462. 

  462. /* reset GPIO pin bit */
    463. 

  463. void gpio_bit_reset(uint32_t gpio_periph, uint32_t pin);
    464. 

  464. /* write data to the specified GPIO pin */
    465. 

  465. void gpio_bit_write(uint32_t gpio_periph, uint32_t pin, bit_status bit_value);
    466. 

  466. /* write data to the specified GPIO port */
    467. 

  467. void gpio_port_write(uint32_t gpio_periph, uint16_t data);
    468. 

  468. 

  469. /* get GPIO pin input status */
    470. 

  470. FlagStatus gpio_input_bit_get(uint32_t gpio_periph, uint32_t pin);
    471. 

  471. /* get GPIO port input status */
    472. 

  472. uint16_t gpio_input_port_get(uint32_t gpio_periph);
    473. 

  473. /* get GPIO pin output status */
    474. 

  474. FlagStatus gpio_output_bit_get(uint32_t gpio_periph, uint32_t pin);
    475. 

  475. /* get GPIO port output status */
    476. 

  476. uint16_t gpio_output_port_get(uint32_t gpio_periph);
    477. 

  477. 

  478. /* lock GPIO pin bit */
    479. 

  479. void gpio_pin_lock(uint32_t gpio_periph, uint32_t pin);
    480. 

  480. 

  481. /* configure GPIO pin event output */
    482. 

  482. void gpio_event_output_config(uint8_t output_port, uint8_t output_pin);
    483. 

  483. /* enable GPIO pin event output */
    484. 

  484. void gpio_event_output_enable(void);
    485. 

  485. /* disable GPIO pin event output */
    486. 

  486. void gpio_event_output_disable(void);
    487. 

  487. 

  488. /* select GPIO pin exti sources */
    489. 

  489. void gpio_exti_source_select(uint8_t output_port, uint8_t output_pin);
    490. 

  490. 

  491. #ifdef GD32F30X_CL
    492. 

  492. /* select ethernet MII or RMII PHY */
    493. 

  493. void gpio_ethernet_phy_select(uint32_t enet_sel);
    494. 

  494. #endif /* GD32F30X_CL */
    495. 

  495. 

  496. /* configure GPIO pin remap */
    497. 

  497. void gpio_pin_remap_config(uint32_t gpio_remap, ControlStatus newvalue);
    498. 

  498. 

  499. /* configure the I/O compensation cell */
    500. 

  500. void gpio_compensation_config(uint32_t compensation); 
    501. 

  501. /* check the I/O compensation cell is ready or not */
    502. 

  502. FlagStatus gpio_compensation_flag_get(void);
    503. 

  503. 

  504. #endif /* GD32F30X_GPIO_H */
    505.