gd32f30x_pmu.h 8.3 KB

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  1. /*!
  2. \file gd32f30x_pmu.h
  3. \brief definitions for the PMU
  4. */
  5. /*
  6. Copyright (C) 2017 GigaDevice
  7. 2017-02-10, V1.0.0, firmware for GD32F30x
  8. */
  9. #ifndef GD32F30X_PMU_H
  10. #define GD32F30X_PMU_H
  11. #include "gd32f30x.h"
  12. /* PMU definitions */
  13. #define PMU PMU_BASE /*!< PMU base address */
  14. /* registers definitions */
  15. #define PMU_CTL REG32((PMU) + 0x00U) /*!< PMU control register */
  16. #define PMU_CS REG32((PMU) + 0x04U) /*!< PMU control and status register */
  17. /* bits definitions */
  18. /* PMU_CTL */
  19. #define PMU_CTL_LDOLP BIT(0) /*!< LDO low power mode */
  20. #define PMU_CTL_STBMOD BIT(1) /*!< standby mode */
  21. #define PMU_CTL_WURST BIT(2) /*!< wakeup flag reset */
  22. #define PMU_CTL_STBRST BIT(3) /*!< standby flag reset */
  23. #define PMU_CTL_LVDEN BIT(4) /*!< low voltage detector enable */
  24. #define PMU_CTL_LVDT BITS(5,7) /*!< low voltage detector threshold */
  25. #define PMU_CTL_BKPWEN BIT(8) /*!< backup domain write enable */
  26. #define PMU_CTL_LDLP BIT(10) /*!< low-driver mode when use low power LDO */
  27. #define PMU_CTL_LDNP BIT(11) /*!< low-driver mode when use normal power LDO */
  28. #define PMU_CTL_LDOVS BITS(14,15) /*!< LDO output voltage select */
  29. #define PMU_CTL_HDEN BIT(16) /*!< high-driver mode enable */
  30. #define PMU_CTL_HDS BIT(17) /*!< high-driver mode switch */
  31. #define PMU_CTL_LDEN BITS(18,19) /*!< low-driver mode enable in deep-sleep mode */
  32. /* PMU_CS */
  33. #define PMU_CS_WUF BIT(0) /*!< wakeup flag */
  34. #define PMU_CS_STBF BIT(1) /*!< standby flag */
  35. #define PMU_CS_LVDF BIT(2) /*!< low voltage detector status flag */
  36. #define PMU_CS_WUPEN BIT(8) /*!< wakeup pin enable */
  37. #define PMU_CS_LDOVSRF BIT(14) /*!< LDO voltage select ready flag */
  38. #define PMU_CS_HDRF BIT(16) /*!< high-driver ready flag */
  39. #define PMU_CS_HDSRF BIT(17) /*!< high-driver switch ready flag */
  40. #define PMU_CS_LDRF BITS(18,19) /*!< Low-driver mode ready flag */
  41. /* constants definitions */
  42. /* PMU low voltage detector threshold definitions */
  43. #define CTL_LVDT(regval) (BITS(5,7)&((uint32_t)(regval)<<5))
  44. #define PMU_LVDT_0 CTL_LVDT(0) /*!< voltage threshold is 2.1V */
  45. #define PMU_LVDT_1 CTL_LVDT(1) /*!< voltage threshold is 2.3V */
  46. #define PMU_LVDT_2 CTL_LVDT(2) /*!< voltage threshold is 2.4V */
  47. #define PMU_LVDT_3 CTL_LVDT(3) /*!< voltage threshold is 2.6V */
  48. #define PMU_LVDT_4 CTL_LVDT(4) /*!< voltage threshold is 2.7V */
  49. #define PMU_LVDT_5 CTL_LVDT(5) /*!< voltage threshold is 2.9V */
  50. #define PMU_LVDT_6 CTL_LVDT(6) /*!< voltage threshold is 3.0V */
  51. #define PMU_LVDT_7 CTL_LVDT(7) /*!< voltage threshold is 3.1V */
  52. /* PMU LDO output voltage select definitions */
  53. #define CTL_LDOVS(regval) (BITS(14,15)&((uint32_t)(regval)<<14))
  54. #define PMU_LDOVS_LOW CTL_LDOVS(1) /*!< LDO output voltage low mode */
  55. #define PMU_LDOVS_MID CTL_LDOVS(2) /*!< LDO output voltage mid mode */
  56. #define PMU_LDOVS_HIGH CTL_LDOVS(3) /*!< LDO output voltage high mode */
  57. /* PMU high-driver mode switch */
  58. #define CTL_HDS(regval) (BIT(17)&((uint32_t)(regval)<<17))
  59. #define PMU_HIGHDR_SWITCH_NONE CTL_HDS(0) /*!< no high-driver mode switch */
  60. #define PMU_HIGHDR_SWITCH_EN CTL_HDS(1) /*!< high-driver mode switch */
  61. /* PMU low-driver mode when use low power LDO */
  62. #define CTL_LDLP(regval) (BIT(10)&((uint32_t)(regval)<<10))
  63. #define PMU_NORMALDR_LOWPWR CTL_LDLP(0) /*!< normal driver when use low power LDO */
  64. #define PMU_LOWDR_LOWPWR CTL_LDLP(1) /*!< low-driver mode enabled when LDEN is 11 and use low power LDO */
  65. /* PMU low-driver mode when use normal power LDO */
  66. #define CTL_LDNP(regval) (BIT(11)&((uint32_t)(regval)<<11))
  67. #define PMU_NORMALDR_NORMALPWR CTL_LDNP(0) /*!< normal driver when use normal power LDO */
  68. #define PMU_LOWDR_NORMALPWR CTL_LDNP(1) /*!< low-driver mode enabled when LDEN is 11 and use normal power LDO */
  69. /* PMU low power mode ready flag definitions */
  70. #define CS_LDRF(regval) (BITS(18,19)&((uint32_t)(regval)<<18))
  71. #define PMU_LDRF_NORMAL CS_LDRF(0) /*!< normal driver in deep-sleep mode */
  72. #define PMU_LDRF_LOWDRIVER CS_LDRF(3) /*!< low-driver mode in deep-sleep mode */
  73. /* PMU flag definitions */
  74. #define PMU_FLAG_WAKEUP PMU_CS_WUF /*!< wakeup flag status */
  75. #define PMU_FLAG_STANDBY PMU_CS_STBF /*!< standby flag status */
  76. #define PMU_FLAG_LVD PMU_CS_LVDF /*!< lvd flag status */
  77. #define PMU_FLAG_LDOVSRF PMU_CS_LDOVSRF /*!< LDO voltage select ready flag */
  78. #define PMU_FLAG_HDRF PMU_CS_HDRF /*!< high-driver ready flag */
  79. #define PMU_FLAG_HDSRF PMU_CS_HDSRF /*!< high-driver switch ready flag */
  80. #define PMU_FLAG_LDRF PMU_CS_LDRF /*!< low-driver mode ready flag */
  81. /* PMU ldo definitions */
  82. #define PMU_LDO_NORMAL ((uint32_t)0x00000000U) /*!< LDO normal work when PMU enter deepsleep mode */
  83. #define PMU_LDO_LOWPOWER PMU_CTL_LDOLP /*!< LDO work at low power status when PMU enter deepsleep mode */
  84. /* PMU flag reset definitions */
  85. #define PMU_FLAG_RESET_WAKEUP ((uint8_t)0x00U) /*!< wakeup flag reset */
  86. #define PMU_FLAG_RESET_STANDBY ((uint8_t)0x01U) /*!< standby flag reset */
  87. /* PMU command constants definitions */
  88. #define WFI_CMD ((uint8_t)0x00U) /*!< use WFI command */
  89. #define WFE_CMD ((uint8_t)0x01U) /*!< use WFE command */
  90. /* function declarations */
  91. /* reset PMU registers */
  92. void pmu_deinit(void);
  93. /* select low voltage detector threshold */
  94. void pmu_lvd_select(uint32_t lvdt_n);
  95. /* select LDO output voltage */
  96. void pmu_ldo_output_select(uint32_t ldo_output);
  97. /* disable PMU lvd */
  98. void pmu_lvd_disable(void);
  99. /* functions of low-driver mode and high-driver mode in deep-sleep mode */
  100. /* switch high-driver mode */
  101. void pmu_highdriver_switch_select(uint32_t highdr_switch);
  102. /* enable high-driver mode */
  103. void pmu_highdriver_mode_enable(void);
  104. /* disable high-driver mode */
  105. void pmu_highdriver_mode_disable(void);
  106. /* enable low-driver mode in deep-sleep mode */
  107. void pmu_lowdriver_mode_enable(void);
  108. /* disable low-driver mode in deep-sleep mode */
  109. void pmu_lowdriver_mode_disable(void);
  110. /* in deep-sleep mode, driver mode when use low power LDO */
  111. void pmu_lowpower_driver_config(uint32_t mode);
  112. /* in deep-sleep mode, driver mode when use normal power LDO */
  113. void pmu_normalpower_driver_config(uint32_t mode);
  114. /* set PMU mode */
  115. /* PMU work at sleep mode */
  116. void pmu_to_sleepmode(uint8_t sleepmodecmd);
  117. /* PMU work at deepsleep mode */
  118. void pmu_to_deepsleepmode(uint32_t ldo, uint8_t deepsleepmodecmd);
  119. /* PMU work at standby mode */
  120. void pmu_to_standbymode(uint8_t standbymodecmd);
  121. /* enable PMU wakeup pin */
  122. void pmu_wakeup_pin_enable(void);
  123. /* disable PMU wakeup pin */
  124. void pmu_wakeup_pin_disable(void);
  125. /* backup related functions */
  126. /* enable backup domain write */
  127. void pmu_backup_write_enable(void);
  128. /* disable backup domain write */
  129. void pmu_backup_write_disable(void);
  130. /* flag functions */
  131. /* clear flag bit */
  132. void pmu_flag_clear(uint32_t flag_reset);
  133. /* get flag state */
  134. FlagStatus pmu_flag_get(uint32_t flag);
  135. #endif /* GD32F30X_PMU_H */